Attachment 13309 Details for Bug 13778 – first crash

first crash

Xorg.0.log.old (text/plain), 133.13 KB, created by Peter Hjalmarsson on 2007-12-22 04:01:08 UTC

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Creator: Peter Hjalmarsson

Created: 2007-12-22 04:01:08 UTC

Size: 133.13 KB

patch

obsolete

>
>This is a pre-release version of the X server from The X.Org Foundation.
>It is not supported in any way.
>Bugs may be filed in the bugzilla at http://bugs.freedesktop.org/.
>Select the "xorg" product for bugs you find in this release.
>Before reporting bugs in pre-release versions please check the
>latest version in the X.Org Foundation git repository.
>See http://wiki.x.org/wiki/GitPage for git access instructions.
>
>X.Org X Server 1.4.0.90
>Release Date: 5 September 2007
>X Protocol Version 11, Revision 0
>Build Operating System: Linux 2.6.23-gentoo-r3 i686 
>Current Operating System: Linux lillen 2.6.23-gentoo-r4 #1 SMP PREEMPT Thu Dec 20 20:32:50 CET 2007 i686
>Build Date: 17 December 2007  11:56:15AM
> 
>	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>Module Loader present
>Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>(==) Log file: "/var/log/Xorg.0.log", Time: Sat Dec 22 12:13:06 2007
>(==) Using config file: "/etc/X11/xorg.conf"
>(**) Option "defaultserverlayout" "Default"
>(**) ServerLayout "Default"
>(**) |-->Screen "Screen0" (0)
>(**) |   |-->Monitor "<default monitor>"
>(**) |   |-->Device "Videocard0"
>(==) No monitor specified for screen "Screen0".
>	Using a default monitor configuration.
>(**) |-->Input Device "Keyboard0"
>(==) Automatically adding devices
>(==) Automatically enabling devices
>(==) No FontPath specified.  Using compiled-in default.
>(WW) The directory "/usr/share/fonts/TTF/" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/OTF" does not exist.
>	Entry deleted from font path.
>(==) FontPath set to:
>	/usr/share/fonts/misc/,
>	/usr/share/fonts/Type1/,
>	/usr/share/fonts/100dpi/,
>	/usr/share/fonts/75dpi/
>(==) RgbPath set to "/usr/share/X11/rgb"
>(==) ModulePath set to "/usr/lib/xorg/modules"
>(==) |-->Input Device "<default pointer>"
>(==) The core pointer device wasn't specified explicitly in the layout.
>	Using the default mouse configuration.
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) Loader magic: 0x81ce660
>(II) Module ABI versions:
>	X.Org ANSI C Emulation: 0.3
>	X.Org Video Driver: 2.0
>	X.Org XInput driver : 2.0
>	X.Org Server Extension : 0.3
>	X.Org Font Renderer : 0.5
>(II) Loader running on linux
>(II) LoadModule: "pcidata"
>(II) Loading /usr/lib/xorg/modules//libpcidata.so
>(II) Module pcidata: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 2.0
>(++) using VT number 7
>
>(II) PCI: PCI scan (all values are in hex)
>(II) PCI: 00:00:0: chip 8086,2570 card 8086,2570 rev 02 class 06,00,00 hdr 00
>(II) PCI: 00:01:0: chip 8086,2571 card 0000,0000 rev 02 class 06,04,00 hdr 01
>(II) PCI: 00:1d:0: chip 8086,24d2 card a0a0,042d rev 02 class 0c,03,00 hdr 80
>(II) PCI: 00:1d:1: chip 8086,24d4 card a0a0,042d rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:2: chip 8086,24d7 card a0a0,042d rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:3: chip 8086,24de card a0a0,042d rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:7: chip 8086,24dd card a0a0,040a rev 02 class 0c,03,20 hdr 00
>(II) PCI: 00:1e:0: chip 8086,244e card 0000,0000 rev c2 class 06,04,00 hdr 01
>(II) PCI: 00:1f:0: chip 8086,24d0 card 0000,0000 rev 02 class 06,01,00 hdr 80
>(II) PCI: 00:1f:1: chip 8086,24db card a0a0,042d rev 02 class 01,01,8a hdr 00
>(II) PCI: 00:1f:2: chip 8086,24d1 card a0a0,042e rev 02 class 01,01,8f hdr 00
>(II) PCI: 00:1f:3: chip 8086,24d3 card a0a0,042d rev 02 class 0c,05,00 hdr 00
>(II) PCI: 00:1f:5: chip 8086,24d5 card a0a0,03c9 rev 02 class 04,01,00 hdr 00
>(II) PCI: 01:00:0: chip 10de,0312 card 0000,0000 rev a1 class 03,00,00 hdr 00
>(II) PCI: 02:07:0: chip 10ec,8139 card a0a0,01a9 rev 10 class 02,00,00 hdr 00
>(II) PCI: 02:09:0: chip 8086,1229 card 0e11,b01e rev 05 class 02,00,00 hdr 00
>(II) PCI: 02:0a:0: chip 1102,0002 card 1102,8064 rev 07 class 04,01,00 hdr 80
>(II) PCI: 02:0a:1: chip 1102,7002 card 1102,0020 rev 07 class 09,80,00 hdr 80
>(II) PCI: End of PCI scan
>(II) Intel Bridge workaround enabled
>(II) Host-to-PCI bridge:
>(II) Bus 0: bridge is at (0:0:0), (0,0,2), BCTRL: 0x0008 (VGA_EN is set)
>(II) Bus 0 I/O range:
>	[0] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) Bus 0 non-prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>(II) Bus 0 prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 1: bridge is at (0:1:0), (0,1,1), BCTRL: 0x000c (VGA_EN is set)
>(II) Bus 1 non-prefetchable memory range:
>	[0] -1	0	0xf8000000 - 0xf9ffffff (0x2000000) MX[B]
>(II) Bus 1 prefetchable memory range:
>	[0] -1	0	0xe0000000 - 0xefffffff (0x10000000) MX[B]
>(II) Subtractive PCI-to-PCI bridge:
>(II) Bus 2: bridge is at (0:30:0), (0,2,2), BCTRL: 0x0006 (VGA_EN is cleared)
>(II) Bus 2 I/O range:
>	[0] -1	0	0x0000d000 - 0x0000d0ff (0x100) IX[B]
>	[1] -1	0	0x0000d400 - 0x0000d4ff (0x100) IX[B]
>	[2] -1	0	0x0000d800 - 0x0000d8ff (0x100) IX[B]
>	[3] -1	0	0x0000dc00 - 0x0000dcff (0x100) IX[B]
>(II) Bus 2 non-prefetchable memory range:
>	[0] -1	0	0xfa000000 - 0xfbffffff (0x2000000) MX[B]
>(II) Bus 2 prefetchable memory range:
>	[0] -1	0	0xfc000000 - 0xfc0fffff (0x100000) MX[B]
>(II) PCI-to-ISA bridge:
>(II) Bus -1: bridge is at (0:31:0), (0,-1,-1), BCTRL: 0x0008 (VGA_EN is set)
>(--) PCI:*(1:0:0) nVidia Corporation NV31 [GeForce FX 5600] rev 161, Mem @ 0xf8000000/24, 0xe0000000/28
>(II) Addressable bus resource ranges are
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>	[1] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) OS-reported resource ranges:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) PCI Memory resource overlap reduced 0xf0000000 from 0xf7ffffff to 0xefffffff
>(II) Active PCI resource ranges:
>	[0] -1	0	0xfb000000 - 0xfb0fffff (0x100000) MX[B]
>	[1] -1	0	0xfc000000 - 0xfc000fff (0x1000) MX[B]
>	[2] -1	0	0xfb100000 - 0xfb1000ff (0x100) MX[B]
>	[3] -1	0	0xfc102000 - 0xfc1020ff (0x100) MX[B]
>	[4] -1	0	0xfc101000 - 0xfc1011ff (0x200) MX[B]
>	[5] -1	0	0x70000000 - 0x700003ff (0x400) MX[B]
>	[6] -1	0	0xfc100000 - 0xfc1003ff (0x400) MX[B]
>	[7] -1	0	0xf0000000 - 0xefffffff (0x0) MX[B]O
>	[8] -1	0	0xe0000000 - 0xefffffff (0x10000000) MX[B](B)
>	[9] -1	0	0xf8000000 - 0xf8ffffff (0x1000000) MX[B](B)
>	[10] -1	0	0x0000d300 - 0x0000d307 (0x8) IX[B]
>	[11] -1	0	0x0000d200 - 0x0000d21f (0x20) IX[B]
>	[12] -1	0	0x0000d100 - 0x0000d11f (0x20) IX[B]
>	[13] -1	0	0x0000d000 - 0x0000d0ff (0x100) IX[B]
>	[14] -1	0	0x0000eb00 - 0x0000eb3f (0x40) IX[B]
>	[15] -1	0	0x0000ea00 - 0x0000eaff (0x100) IX[B]
>	[16] -1	0	0x00005000 - 0x0000501f (0x20) IX[B]
>	[17] -1	0	0x0000e800 - 0x0000e80f (0x10) IX[B]
>	[18] -1	0	0x0000e700 - 0x0000e703 (0x4) IX[B]
>	[19] -1	0	0x0000e600 - 0x0000e607 (0x8) IX[B]
>	[20] -1	0	0x0000e500 - 0x0000e503 (0x4) IX[B]
>	[21] -1	0	0x0000e400 - 0x0000e407 (0x8) IX[B]
>	[22] -1	0	0x0000f000 - 0x0000f00f (0x10) IX[B]
>	[23] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[24] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[25] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[26] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[27] -1	0	0x0000e200 - 0x0000e21f (0x20) IX[B]
>	[28] -1	0	0x0000e100 - 0x0000e11f (0x20) IX[B]
>	[29] -1	0	0x0000e000 - 0x0000e01f (0x20) IX[B]
>	[30] -1	0	0x0000e300 - 0x0000e31f (0x20) IX[B]
>(II) Active PCI resource ranges after removing overlaps:
>	[0] -1	0	0xfb000000 - 0xfb0fffff (0x100000) MX[B]
>	[1] -1	0	0xfc000000 - 0xfc000fff (0x1000) MX[B]
>	[2] -1	0	0xfb100000 - 0xfb1000ff (0x100) MX[B]
>	[3] -1	0	0xfc102000 - 0xfc1020ff (0x100) MX[B]
>	[4] -1	0	0xfc101000 - 0xfc1011ff (0x200) MX[B]
>	[5] -1	0	0x70000000 - 0x700003ff (0x400) MX[B]
>	[6] -1	0	0xfc100000 - 0xfc1003ff (0x400) MX[B]
>	[7] -1	0	0xf0000000 - 0xefffffff (0x0) MX[B]O
>	[8] -1	0	0xe0000000 - 0xefffffff (0x10000000) MX[B](B)
>	[9] -1	0	0xf8000000 - 0xf8ffffff (0x1000000) MX[B](B)
>	[10] -1	0	0x0000d300 - 0x0000d307 (0x8) IX[B]
>	[11] -1	0	0x0000d200 - 0x0000d21f (0x20) IX[B]
>	[12] -1	0	0x0000d100 - 0x0000d11f (0x20) IX[B]
>	[13] -1	0	0x0000d000 - 0x0000d0ff (0x100) IX[B]
>	[14] -1	0	0x0000eb00 - 0x0000eb3f (0x40) IX[B]
>	[15] -1	0	0x0000ea00 - 0x0000eaff (0x100) IX[B]
>	[16] -1	0	0x00005000 - 0x0000501f (0x20) IX[B]
>	[17] -1	0	0x0000e800 - 0x0000e80f (0x10) IX[B]
>	[18] -1	0	0x0000e700 - 0x0000e703 (0x4) IX[B]
>	[19] -1	0	0x0000e600 - 0x0000e607 (0x8) IX[B]
>	[20] -1	0	0x0000e500 - 0x0000e503 (0x4) IX[B]
>	[21] -1	0	0x0000e400 - 0x0000e407 (0x8) IX[B]
>	[22] -1	0	0x0000f000 - 0x0000f00f (0x10) IX[B]
>	[23] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[24] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[25] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[26] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[27] -1	0	0x0000e200 - 0x0000e21f (0x20) IX[B]
>	[28] -1	0	0x0000e100 - 0x0000e11f (0x20) IX[B]
>	[29] -1	0	0x0000e000 - 0x0000e01f (0x20) IX[B]
>	[30] -1	0	0x0000e300 - 0x0000e31f (0x20) IX[B]
>(II) OS-reported resource ranges after removing overlaps with PCI:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) All system resource ranges:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xfb000000 - 0xfb0fffff (0x100000) MX[B]
>	[5] -1	0	0xfc000000 - 0xfc000fff (0x1000) MX[B]
>	[6] -1	0	0xfb100000 - 0xfb1000ff (0x100) MX[B]
>	[7] -1	0	0xfc102000 - 0xfc1020ff (0x100) MX[B]
>	[8] -1	0	0xfc101000 - 0xfc1011ff (0x200) MX[B]
>	[9] -1	0	0x70000000 - 0x700003ff (0x400) MX[B]
>	[10] -1	0	0xfc100000 - 0xfc1003ff (0x400) MX[B]
>	[11] -1	0	0xf0000000 - 0xefffffff (0x0) MX[B]O
>	[12] -1	0	0xe0000000 - 0xefffffff (0x10000000) MX[B](B)
>	[13] -1	0	0xf8000000 - 0xf8ffffff (0x1000000) MX[B](B)
>	[14] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[15] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[16] -1	0	0x0000d300 - 0x0000d307 (0x8) IX[B]
>	[17] -1	0	0x0000d200 - 0x0000d21f (0x20) IX[B]
>	[18] -1	0	0x0000d100 - 0x0000d11f (0x20) IX[B]
>	[19] -1	0	0x0000d000 - 0x0000d0ff (0x100) IX[B]
>	[20] -1	0	0x0000eb00 - 0x0000eb3f (0x40) IX[B]
>	[21] -1	0	0x0000ea00 - 0x0000eaff (0x100) IX[B]
>	[22] -1	0	0x00005000 - 0x0000501f (0x20) IX[B]
>	[23] -1	0	0x0000e800 - 0x0000e80f (0x10) IX[B]
>	[24] -1	0	0x0000e700 - 0x0000e703 (0x4) IX[B]
>	[25] -1	0	0x0000e600 - 0x0000e607 (0x8) IX[B]
>	[26] -1	0	0x0000e500 - 0x0000e503 (0x4) IX[B]
>	[27] -1	0	0x0000e400 - 0x0000e407 (0x8) IX[B]
>	[28] -1	0	0x0000f000 - 0x0000f00f (0x10) IX[B]
>	[29] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[30] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[31] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[32] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[33] -1	0	0x0000e200 - 0x0000e21f (0x20) IX[B]
>	[34] -1	0	0x0000e100 - 0x0000e11f (0x20) IX[B]
>	[35] -1	0	0x0000e000 - 0x0000e01f (0x20) IX[B]
>	[36] -1	0	0x0000e300 - 0x0000e31f (0x20) IX[B]
>(II) "extmod" will be loaded. This was enabled by default and also specified in the config file.
>(II) "dbe" will be loaded. This was enabled by default and also specified in the config file.
>(II) "glx" will be loaded. This was enabled by default and also specified in the config file.
>(II) "freetype" will be loaded. This was enabled by default and also specified in the config file.
>(II) "type1" will be loaded. This was enabled by default and also specified in the config file.
>(II) "record" will be loaded. This was enabled by default and also specified in the config file.
>(II) "dri" will be loaded by default.
>(II) LoadModule: "glx"
>(II) Loading /usr/lib/xorg/modules/extensions//libglx.so
>(II) Module glx: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(**) AIGLX disabled
>(II) Loading extension GLX
>(II) LoadModule: "extmod"
>(II) Loading /usr/lib/xorg/modules/extensions//libextmod.so
>(II) Module extmod: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension SHAPE
>(II) Loading extension MIT-SUNDRY-NONSTANDARD
>(II) Loading extension BIG-REQUESTS
>(II) Loading extension SYNC
>(II) Loading extension MIT-SCREEN-SAVER
>(II) Loading extension XC-MISC
>(II) Loading extension XFree86-VidModeExtension
>(II) Loading extension XFree86-Misc
>(II) Loading extension XFree86-DGA
>(II) Loading extension DPMS
>(II) Loading extension TOG-CUP
>(II) Loading extension Extended-Visual-Information
>(II) Loading extension XVideo
>(II) Loading extension XVideo-MotionCompensation
>(II) Loading extension X-Resource
>(II) LoadModule: "xtrap"
>(II) Loading /usr/lib/xorg/modules/extensions//libxtrap.so
>(II) Module xtrap: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension DEC-XTRAP
>(II) LoadModule: "record"
>(II) Loading /usr/lib/xorg/modules/extensions//librecord.so
>(II) Module record: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.13.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension RECORD
>(II) LoadModule: "dbe"
>(II) Loading /usr/lib/xorg/modules/extensions//libdbe.so
>(II) Module dbe: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension DOUBLE-BUFFER
>(II) LoadModule: "freetype"
>(II) Loading /usr/lib/xorg/modules/fonts//libfreetype.so
>(II) Module freetype: vendor="X.Org Foundation & the After X-TT Project"
>	compiled for 1.4.0.90, module version = 2.1.0
>	Module class: X.Org Font Renderer
>	ABI class: X.Org Font Renderer, version 0.5
>(II) Loading font FreeType
>(II) LoadModule: "type1"
>(II) Loading /usr/lib/xorg/modules/fonts//libtype1.so
>(II) Module type1: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.2
>	Module class: X.Org Font Renderer
>	ABI class: X.Org Font Renderer, version 0.5
>(II) Loading font Type1
>(II) LoadModule: "dri"
>(II) Loading /usr/lib/xorg/modules/extensions//libdri.so
>(II) Module dri: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension XFree86-DRI
>(II) LoadModule: "nouveau"
>(II) Loading /usr/lib/xorg/modules/drivers//nouveau_drv.so
>(II) Module nouveau: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.2.0
>	Module class: X.Org Video Driver
>	ABI class: X.Org Video Driver, version 2.0
>(II) LoadModule: "kbd"
>(II) Loading /usr/lib/xorg/modules/input//kbd_drv.so
>(II) Module kbd: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.2.2
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.0
>(II) LoadModule: "mouse"
>(II) Loading /usr/lib/xorg/modules/input//mouse_drv.so
>(II) Module mouse: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.2.3
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.0
>(II) NOUVEAU driver 
>(II) NOUVEAU driver for NVIDIA chipset families :
>	RIVA TNT    (NV04)
>	RIVA TNT2   (NV05)
>	GeForce 256 (NV10)
>	GeForce 2   (NV11, NV15)
>	GeForce 4MX (NV17, NV18)
>	GeForce 3   (NV20)
>	GeForce 4Ti (NV25, NV28)
>	GeForce FX  (NV3x)
>	GeForce 6   (NV4x)
>	GeForce 7   (G7x)
>	GeForce 8   (G8x)
>(II) Primary Device is: PCI 01:00:0
>(--) Chipset NVIDIA NV31 found
>(II) resource ranges after xf86ClaimFixedResources() call:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xfb000000 - 0xfb0fffff (0x100000) MX[B]
>	[5] -1	0	0xfc000000 - 0xfc000fff (0x1000) MX[B]
>	[6] -1	0	0xfb100000 - 0xfb1000ff (0x100) MX[B]
>	[7] -1	0	0xfc102000 - 0xfc1020ff (0x100) MX[B]
>	[8] -1	0	0xfc101000 - 0xfc1011ff (0x200) MX[B]
>	[9] -1	0	0x70000000 - 0x700003ff (0x400) MX[B]
>	[10] -1	0	0xfc100000 - 0xfc1003ff (0x400) MX[B]
>	[11] -1	0	0xf0000000 - 0xefffffff (0x0) MX[B]O
>	[12] -1	0	0xe0000000 - 0xefffffff (0x10000000) MX[B](B)
>	[13] -1	0	0xf8000000 - 0xf8ffffff (0x1000000) MX[B](B)
>	[14] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[15] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[16] -1	0	0x0000d300 - 0x0000d307 (0x8) IX[B]
>	[17] -1	0	0x0000d200 - 0x0000d21f (0x20) IX[B]
>	[18] -1	0	0x0000d100 - 0x0000d11f (0x20) IX[B]
>	[19] -1	0	0x0000d000 - 0x0000d0ff (0x100) IX[B]
>	[20] -1	0	0x0000eb00 - 0x0000eb3f (0x40) IX[B]
>	[21] -1	0	0x0000ea00 - 0x0000eaff (0x100) IX[B]
>	[22] -1	0	0x00005000 - 0x0000501f (0x20) IX[B]
>	[23] -1	0	0x0000e800 - 0x0000e80f (0x10) IX[B]
>	[24] -1	0	0x0000e700 - 0x0000e703 (0x4) IX[B]
>	[25] -1	0	0x0000e600 - 0x0000e607 (0x8) IX[B]
>	[26] -1	0	0x0000e500 - 0x0000e503 (0x4) IX[B]
>	[27] -1	0	0x0000e400 - 0x0000e407 (0x8) IX[B]
>	[28] -1	0	0x0000f000 - 0x0000f00f (0x10) IX[B]
>	[29] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[30] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[31] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[32] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[33] -1	0	0x0000e200 - 0x0000e21f (0x20) IX[B]
>	[34] -1	0	0x0000e100 - 0x0000e11f (0x20) IX[B]
>	[35] -1	0	0x0000e000 - 0x0000e01f (0x20) IX[B]
>	[36] -1	0	0x0000e300 - 0x0000e31f (0x20) IX[B]
>(II) resource ranges after probing:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xfb000000 - 0xfb0fffff (0x100000) MX[B]
>	[5] -1	0	0xfc000000 - 0xfc000fff (0x1000) MX[B]
>	[6] -1	0	0xfb100000 - 0xfb1000ff (0x100) MX[B]
>	[7] -1	0	0xfc102000 - 0xfc1020ff (0x100) MX[B]
>	[8] -1	0	0xfc101000 - 0xfc1011ff (0x200) MX[B]
>	[9] -1	0	0x70000000 - 0x700003ff (0x400) MX[B]
>	[10] -1	0	0xfc100000 - 0xfc1003ff (0x400) MX[B]
>	[11] -1	0	0xf0000000 - 0xefffffff (0x0) MX[B]O
>	[12] -1	0	0xe0000000 - 0xefffffff (0x10000000) MX[B](B)
>	[13] -1	0	0xf8000000 - 0xf8ffffff (0x1000000) MX[B](B)
>	[14] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B]
>	[15] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B]
>	[16] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B]
>	[17] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[18] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[19] -1	0	0x0000d300 - 0x0000d307 (0x8) IX[B]
>	[20] -1	0	0x0000d200 - 0x0000d21f (0x20) IX[B]
>	[21] -1	0	0x0000d100 - 0x0000d11f (0x20) IX[B]
>	[22] -1	0	0x0000d000 - 0x0000d0ff (0x100) IX[B]
>	[23] -1	0	0x0000eb00 - 0x0000eb3f (0x40) IX[B]
>	[24] -1	0	0x0000ea00 - 0x0000eaff (0x100) IX[B]
>	[25] -1	0	0x00005000 - 0x0000501f (0x20) IX[B]
>	[26] -1	0	0x0000e800 - 0x0000e80f (0x10) IX[B]
>	[27] -1	0	0x0000e700 - 0x0000e703 (0x4) IX[B]
>	[28] -1	0	0x0000e600 - 0x0000e607 (0x8) IX[B]
>	[29] -1	0	0x0000e500 - 0x0000e503 (0x4) IX[B]
>	[30] -1	0	0x0000e400 - 0x0000e407 (0x8) IX[B]
>	[31] -1	0	0x0000f000 - 0x0000f00f (0x10) IX[B]
>	[32] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[33] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[34] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[35] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[36] -1	0	0x0000e200 - 0x0000e21f (0x20) IX[B]
>	[37] -1	0	0x0000e100 - 0x0000e11f (0x20) IX[B]
>	[38] -1	0	0x0000e000 - 0x0000e01f (0x20) IX[B]
>	[39] -1	0	0x0000e300 - 0x0000e31f (0x20) IX[B]
>	[40] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B]
>	[41] 0	0	0x000003c0 - 0x000003df (0x20) IS[B]
>(II) Setting vga for screen 0.
>(II) Loading sub module "int10"
>(II) LoadModule: "int10"
>(II) Loading /usr/lib/xorg/modules//libint10.so
>(II) Module int10: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 2.0
>(II) NOUVEAU(0): Initializing int10
>(II) NOUVEAU(0): Primary V_BIOS segment is: 0xc000
>(--) NOUVEAU(0): Chipset: "NVIDIA NV31"
>(**) NOUVEAU(0): Depth 24, (--) framebuffer bpp 32
>(==) NOUVEAU(0): RGB weight 888
>(==) NOUVEAU(0): Default visual is TrueColor
>(II) Loading sub module "vgahw"
>(II) LoadModule: "vgahw"
>(II) Loading /usr/lib/xorg/modules//libvgahw.so
>(II) Module vgahw: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 0.1.0
>	ABI class: X.Org Video Driver, version 2.0
>(**) NOUVEAU(0): Option "Randr12" "true"
>(==) NOUVEAU(0): Randr1.2 support enabled
>(==) NOUVEAU(0): Using HW cursor
>(--) NOUVEAU(0): Linear framebuffer at 0xE0000000
>(--) NOUVEAU(0): MMIO registers at 0xF8000000
>(II) Loading sub module "dri"
>(II) LoadModule: "dri"
>(II) Reloading /usr/lib/xorg/modules/extensions//libdri.so
>(II) NOUVEAU(0): Loaded DRI module
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is -1, (No such device or address)
>drmOpenDevice: open result is -1, (No such device or address)
>drmOpenDevice: Open failed
>drmOpenByBusid: Searching for BusID pci:0000:01:00.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 7, (OK)
>drmOpenByBusid: drmOpenMinor returns 7
>drmOpenByBusid: drmGetBusid reports pci:0000:01:00.0
>(II) NOUVEAU(0): [dri] Found DRI library version 1.3.0 and kernel module version 0.0.10
>(II) NOUVEAU(0): Attempting to locate BIOS image in PROM
>(II) NOUVEAU(0): ... appears to be valid
>(II) NOUVEAU(0): Display Configuration Block version 2.2 found
>Raw DCB entry 0: 01000300 00009c40
>Raw DCB entry 1: 02010310 00009c40
>Raw DCB entry 2: 03010312 00000000
>Raw DCB entry 3: 02020321 00000733
>(II) NOUVEAU(0): Found 4 entries in DCB
>(II) NOUVEAU(0): NV signature found
>(II) NOUVEAU(0): PINS version 5.40
>(II) NOUVEAU(0): Bios version 04.31.20.64
>(II) NOUVEAU(0): 0xEE88: Parsing init table 0
>(II) NOUVEAU(0): 0xEE88: ------ EXECUTING FOLLOWING COMMANDS ------
>(II) NOUVEAU(0): 0xEE88: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xEE88: Reg: 0x0060081C, Mask: 0xFFFCCFFF, Data: 0x00022020
>(II) NOUVEAU(0): 	Read:  Reg: 0x0060081C, Data: 0x22022622
>(II) NOUVEAU(0): 	Write: Reg: 0x0060081C, Data: 0x22022622
>(II) NOUVEAU(0): 0xEE95: [ (0x65) - INIT_RESET ]
>(II) NOUVEAU(0): 	Read:  Reg: 0x0000184C, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x0000184C, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00000200, Data: 0x03000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00000200, Data: 0x03110110
>(II) NOUVEAU(0): 	Write: Reg: 0x0000184C, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00001850, Data: 0x00000001
>(II) NOUVEAU(0): 	Write: Reg: 0x00001850, Data: 0x00000000
>(II) NOUVEAU(0): 0xEEA2: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xEEA2: Reg: 0x00101000, Mask: 0x7FFFFFDF, Data: 0x80000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00101000, Data: 0xA140E11F
>(II) NOUVEAU(0): 	Write: Reg: 0x00101000, Data: 0xA140E11F
>(II) NOUVEAU(0): 0xEEAF: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xEEAF: Reg: 0x0010100C, Mask: 0x00000000, Data: 0x80000010
>(II) NOUVEAU(0): 	Read:  Reg: 0x0010100C, Data: 0x80000010
>(II) NOUVEAU(0): 	Write: Reg: 0x0010100C, Data: 0x80000010
>(II) NOUVEAU(0): 0xEEBC: [ (0x75) - INIT_CONDITION ]
>(II) NOUVEAU(0): 0xEEBC: Cond: 0x00, Reg: 0x00101000, Mask: 0x00000040, Cmpval: 0x00000040
>(II) NOUVEAU(0): 	Read:  Reg: 0x00101000, Data: 0xA140E11F
>(II) NOUVEAU(0): 0xEEBC: Checking if 0x00000000 equals 0x00000040
>(II) NOUVEAU(0): 0xEEBC: CONDITION IS NOT FULFILLED
>(II) NOUVEAU(0): 0xEEBC: ------ SKIPPING FOLLOWING COMMANDS  ------
>(II) NOUVEAU(0): 0xEEBE: [ (0x62) - INIT_ZM_INDEX_IO ]
>(II) NOUVEAU(0): 0xEEC3: [ (0x38) - INIT_NOT ]
>(II) NOUVEAU(0): 0xEEC3: ------ EXECUTING FOLLOWING COMMANDS ------
>(II) NOUVEAU(0): 0xEEC4: [ (0x62) - INIT_ZM_INDEX_IO ]
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xEEC9: [ (0x72) - INIT_RESUME ]
>(II) NOUVEAU(0): 0xEECA: [ (0x37) - INIT_COPY ]
>(II) NOUVEAU(0): 0xEECA: Reg: 0x00101000, Shift: 0xFE, SrcMask: 0xF0, Port: 0x03D4, Index: 0x3C, Mask: 0x0F
>(II) NOUVEAU(0): 	Read:  Reg: 0x00101000, Data: 0xA140E11F
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x70
>(II) NOUVEAU(0): 0xEED5: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xEED5: Reg: 0x00680500, Mask: 0xFFFFFFFF, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00680500, Data: 0x00011A07
>(II) NOUVEAU(0): 	Write: Reg: 0x00680500, Data: 0x00011A07
>(II) NOUVEAU(0): 0xEEE2: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xEEE2: Reg: 0x00680528, Mask: 0xFFFFFFFF, Data: 0x40000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00680528, Data: 0x40000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00680528, Data: 0x40000000
>(II) NOUVEAU(0): 0xEEEF: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xEEEF: Port: 0x03D4, Index: 0x35, Mask: 0xFE, Data: 0x01
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x35, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x35, Head: 0x00, Data: 0x01
>(II) NOUVEAU(0): 0xEEF5: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xEEF5: Port: 0x03D4, Index: 0x3C, Mask: 0xF7, Data: 0x08
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x08
>(II) NOUVEAU(0): 0xEEFB: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00000200, Data: 0x07010111
>(II) NOUVEAU(0): 0xEF04: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xEF04: Port: 0x03C4, Index: 0x01, Mask: 0xFF, Data: 0x20
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03C4, Index: 0x01, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03C4, Index: 0x01, Head: 0x00, Data: 0x20
>(II) NOUVEAU(0): 0xEF0A: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x000010B0, Data: 0x00000004
>(II) NOUVEAU(0): 0xEF13: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x000010B4, Data: 0x00000000
>(II) NOUVEAU(0): 0xEF1C: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xEF1C: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x000010B8
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xEF1C: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x000010B8, Data: 0x00000000
>(II) NOUVEAU(0): 0xEF47: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x000010BC, Data: 0x00000000
>(II) NOUVEAU(0): 0xEF50: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xEF50: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x000010C4
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xEF50: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x000010C4, Data: 0x00000000
>(II) NOUVEAU(0): 0xEF7B: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xEF7B: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x000010C8
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xEF7B: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x000010C8, Data: 0x000440FF
>(II) NOUVEAU(0): 0xEFA6: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xEFA6: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x000010CC
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xEFA6: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x000010CC, Data: 0x44444444
>(II) NOUVEAU(0): 0xEFD1: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x000010D4, Data: 0x00000000
>(II) NOUVEAU(0): 0xEFDA: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xEFDA: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x000010D8
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xEFDA: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x000010D8, Data: 0x00008888
>(II) NOUVEAU(0): 0xF005: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x000010DC, Data: 0x00001000
>(II) NOUVEAU(0): 0xF00E: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x000010E8, Data: 0x00014000
>(II) NOUVEAU(0): 0xF017: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00001500, Data: 0x00000000
>(II) NOUVEAU(0): 0xF020: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00001504, Data: 0x88000000
>(II) NOUVEAU(0): 0xF029: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00001508, Data: 0x00000000
>(II) NOUVEAU(0): 0xF032: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x0000150C, Data: 0x00000110
>(II) NOUVEAU(0): 0xF03B: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00001510, Data: 0x00000010
>(II) NOUVEAU(0): 0xF044: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xF044: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x00001514
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF044: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x00001514, Data: 0x00000000
>(II) NOUVEAU(0): 0xF06F: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00001518, Data: 0x00000000
>(II) NOUVEAU(0): 0xF078: [ (0x79) - INIT_PLL ]
>(II) NOUVEAU(0): 0xF078: Reg: 0x00680500, Freq: 200000kHz
>(II) NOUVEAU(0): 0xF078: [ NOT YET IMPLEMENTED ]
>(II) NOUVEAU(0): 0xF07F: [ (0x79) - INIT_PLL ]
>(II) NOUVEAU(0): 0xF07F: Reg: 0x00680504, Freq: 280000kHz
>(II) NOUVEAU(0): 0xF07F: [ NOT YET IMPLEMENTED ]
>(II) NOUVEAU(0): 0xF086: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00680510, Data: 0x0000001C
>(II) NOUVEAU(0): 0xF08F: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x0068050C, Data: 0x00000500
>(II) NOUVEAU(0): 0xF098: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00000140, Data: 0x00000000
>(II) NOUVEAU(0): 0xF0A1: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00000200, Data: 0x07110111
>(II) NOUVEAU(0): 0xF0AA: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xF0AA: Reg: 0x000010E0, Mask: 0xFFFFFFFF, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x000010E0, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x000010E0, Data: 0x00000000
>(II) NOUVEAU(0): 0xF0B7: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00001084, Data: 0x00205749
>(II) NOUVEAU(0): 0xF0C0: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00100080, Data: 0xF0000000
>(II) NOUVEAU(0): 0xF0C9: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00001584, Data: 0x00000000
>(II) NOUVEAU(0): 0xF0D2: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xF0D2: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x00100220
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF0D2: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x00100220, Data: 0x04080E0C
>(II) NOUVEAU(0): 0xF0FD: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xF0FD: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x00100224
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF0FD: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x00100224, Data: 0x05030405
>(II) NOUVEAU(0): 0xF128: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xF128: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x00100228
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF128: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x00100228, Data: 0x00220404
>(II) NOUVEAU(0): 0xF153: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xF153: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x0010022C
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF153: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x0010022C, Data: 0x00070012
>(II) NOUVEAU(0): 0xF17E: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xF17E: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x00100230
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF17E: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x00100230, Data: 0x0000001F
>(II) NOUVEAU(0): 0xF1A9: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xF1A9: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x00100234
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF1A9: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x00100234, Data: 0x00B5FF11
>(II) NOUVEAU(0): 0xF1D4: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00680608, Data: 0xF0010000
>(II) NOUVEAU(0): 0xF1DD: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00682608, Data: 0xF0010000
>(II) NOUVEAU(0): 0xF1E6: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0xF1E7: Parsing init table 1
>(II) NOUVEAU(0): 0xF1E7: ------ EXECUTING FOLLOWING COMMANDS ------
>(II) NOUVEAU(0): 0xF1E7: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF1E7: Port: 0x03C4, Index: 0x01, Mask: 0xFF, Data: 0x20
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03C4, Index: 0x01, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03C4, Index: 0x01, Head: 0x00, Data: 0x20
>(II) NOUVEAU(0): 0xF1ED: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xF1ED: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x00100210
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF1ED: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x00100210, Data: 0x80000000
>(II) NOUVEAU(0): 0xF218: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00001220, Data: 0x00000000
>(II) NOUVEAU(0): 0xF221: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00001228, Data: 0x00000000
>(II) NOUVEAU(0): 0xF22A: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xF22A: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x00001210
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF22A: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x00001210, Data: 0x00000001
>(II) NOUVEAU(0): 0xF255: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xF255: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x00001214
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF255: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x00001214, Data: 0x68686868
>(II) NOUVEAU(0): 0xF280: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xF280: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x00001218
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF280: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x00001218, Data: 0x00010101
>(II) NOUVEAU(0): 0xF2AB: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x0000124C, Data: 0xAA11AA11
>(II) NOUVEAU(0): 0xF2B4: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xF2B4: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x00100200
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF2B4: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x00100200, Data: 0x030F0105
>(II) NOUVEAU(0): 0xF2DF: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xF2DF: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x00100204
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF2DF: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x00100204, Data: 0x11449220
>(II) NOUVEAU(0): 0xF30A: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xF30A: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x00100210
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF30A: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x00100210, Data: 0x80000000
>(II) NOUVEAU(0): 0xF335: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00100214, Data: 0x000000B0
>(II) NOUVEAU(0): 0xF33E: [ (0x6F) - INIT_MACRO ]
>(II) NOUVEAU(0): 0xF33E: Macro: 0x01, MacroTableIndex: 0x01, Count: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x0010021C, Data: 0x00000001
>(II) NOUVEAU(0): 0xF340: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00100208, Data: 0x00000401
>(II) NOUVEAU(0): 0xF349: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0xF34A: Parsing init table 2
>(II) NOUVEAU(0): 0xF34A: ------ EXECUTING FOLLOWING COMMANDS ------
>(II) NOUVEAU(0): 0xF34A: [ (0x79) - INIT_PLL ]
>(II) NOUVEAU(0): 0xF34A: Reg: 0x00680508, Freq: 36000kHz
>(II) NOUVEAU(0): 0xF34A: [ NOT YET IMPLEMENTED ]
>(II) NOUVEAU(0): 0xF351: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xF351: Reg: 0x00001098, Mask: 0x00000018, Data: 0x200A0684
>(II) NOUVEAU(0): 	Read:  Reg: 0x00001098, Data: 0x200A061C
>(II) NOUVEAU(0): 	Write: Reg: 0x00001098, Data: 0x200A069C
>(II) NOUVEAU(0): 0xF35E: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x0000108C, Data: 0x000000A2
>(II) NOUVEAU(0): 0xF367: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xF367: Reg: 0x00680880, Mask: 0xFFFFFFFF, Data: 0x10000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00680880, Data: 0x31101111
>(II) NOUVEAU(0): 	Write: Reg: 0x00680880, Data: 0x31101111
>(II) NOUVEAU(0): 0xF374: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00680610, Data: 0x00000000
>(II) NOUVEAU(0): 0xF37D: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF37D: Port: 0x03D4, Index: 0x38, Mask: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x38, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x38, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF383: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF383: Port: 0x03D4, Index: 0x1A, Mask: 0x00, Data: 0x3F
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x1A, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x1A, Head: 0x00, Data: 0x3F
>(II) NOUVEAU(0): 0xF389: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF389: Port: 0x03D4, Index: 0x28, Mask: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x28, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x28, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF38F: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF38F: Port: 0x03D4, Index: 0x33, Mask: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x33, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x33, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF395: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF395: Port: 0x03D4, Index: 0x21, Mask: 0x00, Data: 0xFA
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x21, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x21, Head: 0x00, Data: 0xFA
>(II) NOUVEAU(0): 0xF39B: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF39B: Port: 0x03D4, Index: 0x2B, Mask: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x2B, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x2B, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF3A1: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF3A1: Port: 0x03D4, Index: 0x2C, Mask: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x2C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x2C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF3A7: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF3A7: Port: 0x03D4, Index: 0x3A, Mask: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3A, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x3A, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF3AD: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF3AD: Port: 0x03D4, Index: 0x3B, Mask: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3B, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x3B, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF3B3: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF3B3: Port: 0x03D4, Index: 0x4A, Mask: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x4A, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x4A, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF3B9: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF3B9: Port: 0x03D4, Index: 0x4B, Mask: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x4B, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x4B, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF3BF: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF3BF: Port: 0x03D4, Index: 0x4C, Mask: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x4C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x4C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF3C5: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF3C5: Port: 0x03D4, Index: 0x57, Mask: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF3CB: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF3CB: Port: 0x03D4, Index: 0x58, Mask: 0x00, Data: 0x7F
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x7F
>(II) NOUVEAU(0): 0xF3D1: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF3D1: Port: 0x03D4, Index: 0x57, Mask: 0x00, Data: 0x02
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x02
>(II) NOUVEAU(0): 0xF3D7: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF3D7: Port: 0x03D4, Index: 0x58, Mask: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF3DD: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF3DD: Port: 0x03D4, Index: 0x57, Mask: 0x00, Data: 0x06
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x06
>(II) NOUVEAU(0): 0xF3E3: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF3E3: Port: 0x03D4, Index: 0x58, Mask: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF3E9: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF3E9: Port: 0x03D4, Index: 0x43, Mask: 0x00, Data: 0x01
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x43, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x43, Head: 0x00, Data: 0x01
>(II) NOUVEAU(0): 0xF3EF: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF3EF: Port: 0x03D4, Index: 0x44, Mask: 0x00, Data: 0x03
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x44, Head: 0x00, Data: 0x04
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x44, Head: 0x00, Data: 0x03
>(II) NOUVEAU(0): 0xF3F5: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF3F5: Port: 0x03D4, Index: 0x21, Mask: 0x00, Data: 0xFA
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x21, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x21, Head: 0x01, Data: 0xFA
>(II) NOUVEAU(0): 0xF3FB: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF3FB: Port: 0x03D4, Index: 0x2B, Mask: 0x10, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x2B, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x2B, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 0xF401: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF401: Port: 0x03D4, Index: 0x2C, Mask: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x2C, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x2C, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 0xF407: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF407: Port: 0x03D4, Index: 0x3A, Mask: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3A, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x3A, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 0xF40D: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF40D: Port: 0x03D4, Index: 0x3B, Mask: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3B, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x3B, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 0xF413: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF413: Port: 0x03D4, Index: 0x3C, Mask: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x3C, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 0xF419: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF419: Port: 0x03D4, Index: 0x4A, Mask: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x4A, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x4A, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 0xF41F: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF41F: Port: 0x03D4, Index: 0x4B, Mask: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x4B, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x4B, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 0xF425: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF425: Port: 0x03D4, Index: 0x4C, Mask: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x4C, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x4C, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 0xF42B: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF42B: Port: 0x03D4, Index: 0x57, Mask: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x57, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 0xF431: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF431: Port: 0x03D4, Index: 0x58, Mask: 0x00, Data: 0x7F
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x58, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x01, Data: 0x7F
>(II) NOUVEAU(0): 0xF437: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF437: Port: 0x03D4, Index: 0x57, Mask: 0x00, Data: 0x02
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x57, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x01, Data: 0x02
>(II) NOUVEAU(0): 0xF43D: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF43D: Port: 0x03D4, Index: 0x58, Mask: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x58, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 0xF443: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF443: Port: 0x03D4, Index: 0x43, Mask: 0x00, Data: 0x01
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x43, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x43, Head: 0x01, Data: 0x01
>(II) NOUVEAU(0): 0xF449: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF449: Port: 0x03D4, Index: 0x44, Mask: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x44, Head: 0x01, Data: 0x04
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x44, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF44F: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF44F: Port: 0x03D4, Index: 0x52, Mask: 0x00, Data: 0x04
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x52, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x52, Head: 0x00, Data: 0x04
>(II) NOUVEAU(0): 0xF455: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF455: Port: 0x03D4, Index: 0x53, Mask: 0x00, Data: 0x40
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x53, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x53, Head: 0x00, Data: 0x40
>(II) NOUVEAU(0): 0xF45B: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00001580, Data: 0x00000000
>(II) NOUVEAU(0): 0xF464: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00001588, Data: 0x00000000
>(II) NOUVEAU(0): 0xF46D: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x0000158C, Data: 0x00440000
>(II) NOUVEAU(0): 0xF476: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00001590, Data: 0x00000000
>(II) NOUVEAU(0): 0xF47F: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00100210, Data: 0x80000000
>(II) NOUVEAU(0): 0xF488: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xF488: Reg: 0x0068052C, Mask: 0xFFFFFEFF, Data: 0x00000001
>(II) NOUVEAU(0): 	Read:  Reg: 0x0068052C, Data: 0x00000001
>(II) NOUVEAU(0): 	Write: Reg: 0x0068052C, Data: 0x00000001
>(II) NOUVEAU(0): 0xF495: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xF495: Reg: 0x0068252C, Mask: 0xFFFFFFFF, Data: 0x00000101
>(II) NOUVEAU(0): 	Read:  Reg: 0x0068252C, Data: 0x00000101
>(II) NOUVEAU(0): 	Write: Reg: 0x0068252C, Data: 0x00000101
>(II) NOUVEAU(0): 0xF4A2: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xF4A2: Reg: 0x00680848, Mask: 0xFFFFFFFF, Data: 0x00100000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00680848, Data: 0x11100011
>(II) NOUVEAU(0): 	Write: Reg: 0x00680848, Data: 0x11100011
>(II) NOUVEAU(0): 0xF4AF: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xF4AF: Reg: 0x00682848, Mask: 0xFFFFFFFF, Data: 0x00100000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00682848, Data: 0x11100011
>(II) NOUVEAU(0): 	Write: Reg: 0x00682848, Data: 0x11100011
>(II) NOUVEAU(0): 0xF4BC: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x0070FFF0, Data: 0x00000000
>(II) NOUVEAU(0): 0xF4C5: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0xF4C6: Parsing init table 3
>(II) NOUVEAU(0): 0xF4C6: ------ EXECUTING FOLLOWING COMMANDS ------
>(II) NOUVEAU(0): 0xF4C6: [ (0x34) - INIT_IO_RESTRICT_PLL ]
>(II) NOUVEAU(0): 0xF4C6: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, IO Flag Condition: 0xFFFFFFFF, Count: 0x08, Reg: 0x00680500
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF4C6: Reg: 0x00680500, Config: 0x00, Freq: 250000kHz
>(II) NOUVEAU(0): 0xF4C6: [ NOT YET IMPLEMENTED ]
>(II) NOUVEAU(0): 0xF4E2: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0xF4E3: Parsing init table 4
>(II) NOUVEAU(0): 0xF4E3: ------ EXECUTING FOLLOWING COMMANDS ------
>(II) NOUVEAU(0): 0xF4E3: [ (0x34) - INIT_IO_RESTRICT_PLL ]
>(II) NOUVEAU(0): 0xF4E3: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, IO Flag Condition: 0x01, Count: 0x08, Reg: 0x00680504
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF4E3: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, FlagArray: 0x6EE2, FAMask: 0x01, Cmpval: 0x01
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF4E3: Checking if 0x01 equals 0x01
>(II) NOUVEAU(0): 0xF4E3: CONDITION FULFILLED - FREQ DOUBLED
>(II) NOUVEAU(0): 0xF4E3: Reg: 0x00680504, Config: 0x00, Freq: 500000kHz
>(II) NOUVEAU(0): 0xF4E3: [ NOT YET IMPLEMENTED ]
>(II) NOUVEAU(0): 0xF4FF: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0xF500: Parsing init table 5
>(II) NOUVEAU(0): 0xF500: ------ EXECUTING FOLLOWING COMMANDS ------
>(II) NOUVEAU(0): 0xF500: [ (0x74) - INIT_TIME ]
>(II) NOUVEAU(0): 0xF500: Sleeping for 0x03E8 microseconds
>(II) NOUVEAU(0): 0xF503: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xF503: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x00100218
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF503: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x00100218, Data: 0x00000001
>(II) NOUVEAU(0): 0xF52E: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00100218, Data: 0x00000001
>(II) NOUVEAU(0): 0xF537: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x0010021C, Data: 0x00000001
>(II) NOUVEAU(0): 0xF540: [ (0x6F) - INIT_MACRO ]
>(II) NOUVEAU(0): 0xF540: Macro: 0x00, MacroTableIndex: 0x00, Count: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x001002D4, Data: 0x00000001
>(II) NOUVEAU(0): 0xF542: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xF542: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x001002CC
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF542: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x001002CC, Data: 0x00100002
>(II) NOUVEAU(0): 0xF56D: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xF56D: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x001002C4
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF56D: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x001002C4, Data: 0x00100002
>(II) NOUVEAU(0): 0xF598: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xF598: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x001002C0
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF598: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x001002C0, Data: 0x00000032
>(II) NOUVEAU(0): 0xF5C3: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xF5C3: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x001002C8
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF5C3: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x001002C8, Data: 0x00000132
>(II) NOUVEAU(0): 0xF5EE: [ (0x74) - INIT_TIME ]
>(II) NOUVEAU(0): 0xF5EE: Sleeping for 0x0005 microseconds
>(II) NOUVEAU(0): 0xF5F1: [ (0x6F) - INIT_MACRO ]
>(II) NOUVEAU(0): 0xF5F1: Macro: 0x00, MacroTableIndex: 0x00, Count: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x001002D4, Data: 0x00000001
>(II) NOUVEAU(0): 0xF5F3: [ (0x6F) - INIT_MACRO ]
>(II) NOUVEAU(0): 0xF5F3: Macro: 0x02, MacroTableIndex: 0x02, Count: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x001002D0, Data: 0x00000001
>(II) NOUVEAU(0): 0xF5F5: [ (0x6F) - INIT_MACRO ]
>(II) NOUVEAU(0): 0xF5F5: Macro: 0x02, MacroTableIndex: 0x02, Count: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x001002D0, Data: 0x00000001
>(II) NOUVEAU(0): 0xF5F7: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xF5F7: Reg: 0x001002C8, Mask: 0xFFFFFEFF, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x001002C8, Data: 0x00000032
>(II) NOUVEAU(0): 	Write: Reg: 0x001002C8, Data: 0x00000032
>(II) NOUVEAU(0): 0xF604: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xF604: Reg: 0x001002C0, Mask: 0xFFFFFEFF, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x001002C0, Data: 0x00000032
>(II) NOUVEAU(0): 	Write: Reg: 0x001002C0, Data: 0x00000032
>(II) NOUVEAU(0): 0xF611: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xF611: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x00100210
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF611: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x00100210, Data: 0x80000000
>(II) NOUVEAU(0): 0xF63C: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x0068052C, Data: 0x00000001
>(II) NOUVEAU(0): 0xF645: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x0068252C, Data: 0x00000001
>(II) NOUVEAU(0): 0xF64E: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00001100, Data: 0xFFFFFFFF
>(II) NOUVEAU(0): 0xF657: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00001140, Data: 0x00000001
>(II) NOUVEAU(0): 0xF660: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00002100, Data: 0xFFFFFFFF
>(II) NOUVEAU(0): 0xF669: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00002140, Data: 0x00001111
>(II) NOUVEAU(0): 0xF672: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00003080, Data: 0x00000000
>(II) NOUVEAU(0): 0xF67B: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00003280, Data: 0x00000000
>(II) NOUVEAU(0): 0xF684: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00000140, Data: 0x00000000
>(II) NOUVEAU(0): 0xF68D: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x0000122C, Data: 0x00470047
>(II) NOUVEAU(0): 0xF696: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00001230, Data: 0x00000000
>(II) NOUVEAU(0): 0xF69F: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xF69F: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x00001234
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF69F: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x00001234, Data: 0x00540054
>(II) NOUVEAU(0): 0xF6CA: [ (0x32) - INIT_IO_RESTRICT_PROG ]
>(II) NOUVEAU(0): 0xF6CA: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x00001238
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF6CA: Writing config 00
>(II) NOUVEAU(0): 	Write: Reg: 0x00001238, Data: 0x00000000
>(II) NOUVEAU(0): 0xF6F5: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x0000123C, Data: 0x00470047
>(II) NOUVEAU(0): 0xF6FE: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00001240, Data: 0x00000000
>(II) NOUVEAU(0): 0xF707: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00001244, Data: 0x00570057
>(II) NOUVEAU(0): 0xF710: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00001248, Data: 0x00000000
>(II) NOUVEAU(0): 0xF719: [ (0x63) - INIT_COMPUTE_MEM ]
>(II) NOUVEAU(0): 0xF719: [ NOT YET IMPLEMENTED ]
>(II) NOUVEAU(0): 0xF71A: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xF71A: Port: 0x03C4, Index: 0x01, Mask: 0xDF, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03C4, Index: 0x01, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03C4, Index: 0x01, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xF720: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0xF721: Parsing init table 6
>(II) NOUVEAU(0): 0xF721: ------ EXECUTING FOLLOWING COMMANDS ------
>(II) NOUVEAU(0): 0xF721: [ (0x71) - INIT_DONE ]
>(II) Loading sub module "i2c"
>(II) LoadModule: "i2c"(II) Module "i2c" already built-in
>(II) Loading sub module "ddc"
>(II) LoadModule: "ddc"(II) Module "ddc" already built-in
>pre-Owner: 0x4
>pbus84: 0x10205749
>pbus84: 0x205749
>post-Owner: 0x0
>pre-Owner: 0x0
>post-Owner: 0x3
>(--) NOUVEAU(0): DCB entry 0: type: 0, i2c_index: 0, heads: 3, bus: 0, or: 1
>(II) NOUVEAU(0): I2C bus "VGA-0" initialized.
>(II) NOUVEAU(0): Output VGA-0 using monitor section LeftScreen
>(**) NOUVEAU(0): Option "PreferredMode" "1280x1024@60"
>(--) NOUVEAU(0): Adding output VGA-0
>(--) NOUVEAU(0): DCB entry 1: type: 0, i2c_index: 1, heads: 3, bus: 1, or: 2
>(II) NOUVEAU(0): I2C bus "DVI-A-0" initialized.
>(II) NOUVEAU(0): Output DVI-A-0 using monitor section RightScreen
>(**) NOUVEAU(0): Option "PreferredMode" "1280x1024@60"
>(**) NOUVEAU(0): Option "RightOf" "LeftScreen"
>(--) NOUVEAU(0): Adding output DVI-A-0
>(--) NOUVEAU(0): DCB entry 2: type: 2, i2c_index: 1, heads: 3, bus: 1, or: 3
>(II) NOUVEAU(0): Output DVI-D-0 has no monitor section
>(--) NOUVEAU(0): Adding output DVI-D-0
>(--) NOUVEAU(0): DCB entry 3: type: 1, i2c_index: 2, heads: 3, bus: 2, or: 2
>nv_analog_output_detect is called
>(II) NOUVEAU(0): I2C device "VGA-0:ddc2" registered at address 0xA0.
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): Printing DDC gathered Modelines:
>(II) NOUVEAU(0): Modeline "1280x1024"x0.0  106.00  1280 1328 1472 1664  1024 1027 1030 1060 -hsync -vsync (63.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   35.50  720 738 846 900  400 421 423 449 -hsync -vsync (39.4 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   44.90  1024 1032 1208 1264  768 768 776 817 interlace +hsync +vsync (35.5 kHz)
>(II) NOUVEAU(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>nv_analog_output_detect is called
>(II) NOUVEAU(0): I2C device "DVI-A-0:ddc2" registered at address 0xA0.
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "CPQ", prod id 12307
>nv_tmds_output_detect is called
>(II) NOUVEAU(0): Output VGA-0 connected
>(II) NOUVEAU(0): Output DVI-A-0 connected
>(II) NOUVEAU(0): Output DVI-D-0 disconnected
>(II) NOUVEAU(0): Output VGA-0 using initial mode 1280x1024@60
>(II) NOUVEAU(0): Output DVI-A-0 using initial mode 1280x1024@60
>(--) NOUVEAU(0): VideoRAM: 262144 kBytes
>(==) NOUVEAU(0): Using gamma correction (1.0, 1.0, 1.0)
>(--) NOUVEAU(0): Virtual size is 2560x1600 (pitch 2560)
>(**) NOUVEAU(0):  Mode "1280x1024@60": 108.0 MHz (scaled from 0.0 MHz), 64.0 kHz, 60.0 Hz
>(II) NOUVEAU(0): Modeline "1280x1024@60"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>(**) NOUVEAU(0):  Driver mode "1280x1024": 106.0 MHz (scaled from 0.0 MHz), 63.7 kHz, 60.1 Hz
>(II) NOUVEAU(0): Modeline "1280x1024"x60.1  106.00  1280 1328 1472 1664  1024 1027 1030 1060 -hsync -vsync (63.7 kHz)
>(**) NOUVEAU(0):  Driver mode "1024x768": 78.8 MHz (scaled from 0.0 MHz), 60.1 kHz, 75.1 Hz
>(II) NOUVEAU(0): Modeline "1024x768"x75.1   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(**) NOUVEAU(0):  Driver mode "1024x768": 75.0 MHz (scaled from 0.0 MHz), 56.5 kHz, 70.1 Hz
>(II) NOUVEAU(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(**) NOUVEAU(0):  Driver mode "1024x768": 65.0 MHz (scaled from 0.0 MHz), 48.4 kHz, 60.0 Hz
>(II) NOUVEAU(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(**) NOUVEAU(0):  Driver mode "1024x768": 44.9 MHz (scaled from 0.0 MHz), 35.5 kHz, 87.0 Hz (I)
>(II) NOUVEAU(0): Modeline "1024x768"x87.0   44.90  1024 1032 1208 1264  768 768 776 817 interlace +hsync +vsync (35.5 kHz)
>(**) NOUVEAU(0):  Driver mode "832x624": 57.3 MHz (scaled from 0.0 MHz), 49.7 kHz, 74.6 Hz
>(II) NOUVEAU(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(**) NOUVEAU(0):  Driver mode "800x600": 50.0 MHz (scaled from 0.0 MHz), 48.1 kHz, 72.2 Hz
>(II) NOUVEAU(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(**) NOUVEAU(0):  Driver mode "800x600": 49.5 MHz (scaled from 0.0 MHz), 46.9 kHz, 75.0 Hz
>(II) NOUVEAU(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(**) NOUVEAU(0):  Driver mode "800x600": 40.0 MHz (scaled from 0.0 MHz), 37.9 kHz, 60.3 Hz
>(II) NOUVEAU(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(**) NOUVEAU(0):  Driver mode "800x600": 36.0 MHz (scaled from 0.0 MHz), 35.2 kHz, 56.2 Hz
>(II) NOUVEAU(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(**) NOUVEAU(0):  Driver mode "640x480": 31.5 MHz (scaled from 0.0 MHz), 37.5 kHz, 75.0 Hz
>(II) NOUVEAU(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(**) NOUVEAU(0):  Driver mode "640x480": 31.5 MHz (scaled from 0.0 MHz), 37.9 kHz, 72.8 Hz
>(II) NOUVEAU(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(**) NOUVEAU(0):  Driver mode "640x480": 30.2 MHz (scaled from 0.0 MHz), 35.0 kHz, 66.7 Hz
>(II) NOUVEAU(0): Modeline "640x480"x66.7   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz)
>(**) NOUVEAU(0):  Driver mode "640x480": 25.2 MHz (scaled from 0.0 MHz), 31.5 kHz, 60.0 Hz
>(II) NOUVEAU(0): Modeline "640x480"x60.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(**) NOUVEAU(0):  Default mode "640x480": 25.2 MHz (scaled from 0.0 MHz), 31.5 kHz, 59.9 Hz
>(II) NOUVEAU(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(**) NOUVEAU(0):  Driver mode "720x400": 35.5 MHz (scaled from 0.0 MHz), 39.4 kHz, 87.8 Hz
>(II) NOUVEAU(0): Modeline "720x400"x87.8   35.50  720 738 846 900  400 421 423 449 -hsync -vsync (39.4 kHz)
>(**) NOUVEAU(0):  Driver mode "720x400": 28.3 MHz (scaled from 0.0 MHz), 31.5 kHz, 70.1 Hz
>(II) NOUVEAU(0): Modeline "720x400"x70.1   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(**) NOUVEAU(0): Display dimensions: (310, 230) mm
>(**) NOUVEAU(0): DPI set to (209, 176)
>(II) Loading sub module "fb"
>(II) LoadModule: "fb"
>(II) Loading /usr/lib/xorg/modules//libfb.so
>(II) Module fb: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	ABI class: X.Org ANSI C Emulation, version 0.3
>(II) Loading sub module "exa"
>(II) LoadModule: "exa"
>(II) Loading /usr/lib/xorg/modules//libexa.so
>(II) Module exa: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 2.2.0
>	ABI class: X.Org Video Driver, version 2.0
>(II) Loading sub module "ramdac"
>(II) LoadModule: "ramdac"(II) Module "ramdac" already built-in
>(--) Depth 24 pixmap format is 32 bpp
>(II) do I need RAC?  No, I don't.
>(II) resource ranges after preInit:
>	[0] 0	0	0xe0000000 - 0xefffffff (0x10000000) MX[B]
>	[1] 0	0	0xf8000000 - 0xf8ffffff (0x1000000) MX[B]
>	[2] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[3] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[4] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[5] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[6] -1	0	0xfb000000 - 0xfb0fffff (0x100000) MX[B]
>	[7] -1	0	0xfc000000 - 0xfc000fff (0x1000) MX[B]
>	[8] -1	0	0xfb100000 - 0xfb1000ff (0x100) MX[B]
>	[9] -1	0	0xfc102000 - 0xfc1020ff (0x100) MX[B]
>	[10] -1	0	0xfc101000 - 0xfc1011ff (0x200) MX[B]
>	[11] -1	0	0x70000000 - 0x700003ff (0x400) MX[B]
>	[12] -1	0	0xfc100000 - 0xfc1003ff (0x400) MX[B]
>	[13] -1	0	0xf0000000 - 0xefffffff (0x0) MX[B]O
>	[14] -1	0	0xe0000000 - 0xefffffff (0x10000000) MX[B](B)
>	[15] -1	0	0xf8000000 - 0xf8ffffff (0x1000000) MX[B](B)
>	[16] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B](OprD)
>	[17] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD)
>	[18] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B](OprD)
>	[19] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[20] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[21] -1	0	0x0000d300 - 0x0000d307 (0x8) IX[B]
>	[22] -1	0	0x0000d200 - 0x0000d21f (0x20) IX[B]
>	[23] -1	0	0x0000d100 - 0x0000d11f (0x20) IX[B]
>	[24] -1	0	0x0000d000 - 0x0000d0ff (0x100) IX[B]
>	[25] -1	0	0x0000eb00 - 0x0000eb3f (0x40) IX[B]
>	[26] -1	0	0x0000ea00 - 0x0000eaff (0x100) IX[B]
>	[27] -1	0	0x00005000 - 0x0000501f (0x20) IX[B]
>	[28] -1	0	0x0000e800 - 0x0000e80f (0x10) IX[B]
>	[29] -1	0	0x0000e700 - 0x0000e703 (0x4) IX[B]
>	[30] -1	0	0x0000e600 - 0x0000e607 (0x8) IX[B]
>	[31] -1	0	0x0000e500 - 0x0000e503 (0x4) IX[B]
>	[32] -1	0	0x0000e400 - 0x0000e407 (0x8) IX[B]
>	[33] -1	0	0x0000f000 - 0x0000f00f (0x10) IX[B]
>	[34] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[35] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[36] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[37] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[38] -1	0	0x0000e200 - 0x0000e21f (0x20) IX[B]
>	[39] -1	0	0x0000e100 - 0x0000e11f (0x20) IX[B]
>	[40] -1	0	0x0000e000 - 0x0000e01f (0x20) IX[B]
>	[41] -1	0	0x0000e300 - 0x0000e31f (0x20) IX[B]
>	[42] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B](OprU)
>	[43] 0	0	0x000003c0 - 0x000003df (0x20) IS[B](OprU)
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 7, (OK)
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 7, (OK)
>drmOpenByBusid: Searching for BusID pci:0000:01:00.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 7, (OK)
>drmOpenByBusid: drmOpenMinor returns 7
>drmOpenByBusid: drmGetBusid reports pci:0000:01:00.0
>(II) [drm] DRM interface version 1.3
>(II) [drm] DRM open master succeeded.
>(II) NOUVEAU(0): [drm] Using the DRM lock SAREA also for drawables.
>(II) NOUVEAU(0): [drm] framebuffer handle = 0xe8000000
>(II) NOUVEAU(0): [drm] added 1 reserved context for kernel
>(II) NOUVEAU(0): X context handle = 0x1
>(II) NOUVEAU(0): [drm] installed DRM signal handler
>(II) NOUVEAU(0): Allocated 128MiB VRAM for framebuffer + offscreen pixmaps
>(II) NOUVEAU(0): AGPGART: 128MiB available
>(II) NOUVEAU(0): GART: Allocated 16MiB as a scratch buffer
>(II) NOUVEAU(0): Opened GPU channel 1
>NVEnterVT is called
>nv_crtc_save is called for CRTC 0
>pre-Owner: 0x3
>post-Owner: 0x0
>pre-Owner: 0x0
>post-Owner: 0x0
>nv_crtc_save is called for CRTC 1
>pre-Owner: 0x0
>post-Owner: 0x3
>pre-Owner: 0x3
>post-Owner: 0x3
>nv_output_save is called
>nv_output_save is called
>nv_output_save is called
>pre-Owner: 0x3
>post-Owner: 0x0
>pre-Owner: 0x0
>post-Owner: 0x3
>nv_analog_output_dpms is called with mode 3
>nv_analog_output_dpms is called for CRTC 0 with mode 3
>nv_analog_output_dpms is called with mode 3
>nv_analog_output_dpms is called for CRTC 1 with mode 3
>nv_tmds_output_dpms is called with mode 3
>nv_crtc_dpms is called for CRTC 0 with mode 3
>pre-Owner: 0x3
>post-Owner: 0x0
>nv_crtc_dpms is called for CRTC 1 with mode 3
>pre-Owner: 0x0
>post-Owner: 0x3
>nv_crtc_lock is called for CRTC 0
>nv_output_mode_fixup is called
>nv_crtc_mode_fixup is called for CRTC 0
>nv_output_prepare is called
>nv_analog_output_dpms is called with mode 3
>nv_analog_output_dpms is called for CRTC 0 with mode 3
>nv_crtc_prepare is called for CRTC 0
>pre-Owner: 0x3
>post-Owner: 0x0
>nv_crtc_dpms is called for CRTC 0 with mode 3
>pre-Owner: 0x0
>post-Owner: 0x0
>pre-Owner: 0x0
>post-Owner: 0x0
>nv_crtc_mode_set is called for CRTC 0
>(WW) NOUVEAU(0): Mode on CRTC 0
>(II) NOUVEAU(0): Modeline "1280x1024@60"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>pre-Owner: 0x0
>post-Owner: 0x0
>Mode clock: 108000
>Adjusted mode clock: 108000
>horizDisplay: 0x9F 
>horizStart: 0xA5 
>horizEnd: 0xB3 
>horizTotal: 0xCE 
>horizBlankStart: 0x9F 
>horizBlankEnd: 0xD2 
>vertDisplay: 0x3FF 
>vertStart: 0x400 
>vertEnd: 0x403 
>vertTotal: 0x428 
>vertBlankStart: 0x3FF 
>vertBlankEnd: 0x429 
>crtc 0 1280 2560
>There are 2 CRTC's enabled
>output 0 debug_0 01101100
>writing vpll 00020802
>writing vpllB 80000401
>writing pllsel 10000700
>writing sel_clk 00000000
>NVCrtcSetBase: x: 0 y: 0
>nv_output_mode_set is called
>0: crtc 0 output 0 twocrt 1 twomon 1
>nv_crtc_commit for CRTC 0
>nv_crtc_dpms is called for CRTC 0 with mode 0
>pre-Owner: 0x0
>post-Owner: 0x0
>nv_output_commit is called
>nv_analog_output_dpms is called with mode 0
>nv_analog_output_dpms is called for CRTC 0 with mode 0
>nv_crtc_lock is called for CRTC 1
>nv_output_mode_fixup is called
>nv_crtc_mode_fixup is called for CRTC 1
>nv_output_prepare is called
>nv_analog_output_dpms is called with mode 3
>nv_analog_output_dpms is called for CRTC 1 with mode 3
>nv_crtc_prepare is called for CRTC 1
>pre-Owner: 0x0
>post-Owner: 0x3
>nv_crtc_dpms is called for CRTC 1 with mode 3
>pre-Owner: 0x3
>post-Owner: 0x3
>pre-Owner: 0x3
>post-Owner: 0x3
>nv_crtc_mode_set is called for CRTC 1
>(WW) NOUVEAU(0): Mode on CRTC 1
>(II) NOUVEAU(0): Modeline "1280x1024@60"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>pre-Owner: 0x3
>post-Owner: 0x3
>Mode clock: 108000
>Adjusted mode clock: 108000
>horizDisplay: 0x9F 
>horizStart: 0xA5 
>horizEnd: 0xB3 
>horizTotal: 0xCE 
>horizBlankStart: 0x9F 
>horizBlankEnd: 0xD2 
>vertDisplay: 0x3FF 
>vertStart: 0x400 
>vertEnd: 0x403 
>vertTotal: 0x428 
>vertBlankStart: 0x3FF 
>vertBlankEnd: 0x429 
>crtc 1 1280 2560
>There are 2 CRTC's enabled
>output 1 debug_0 01101100
>writing vpll2 00020802
>writing vpll2B 80000401
>writing pllsel 30000F00
>writing vpll 00020802
>writing vpllB 80000401
>writing pllsel 30000F00
>writing sel_clk 00000000
>NVCrtcSetBase: x: 1280 y: 0
>nv_output_mode_set is called
>0: crtc 1 output 1 twocrt 1 twomon 1
>nv_crtc_commit for CRTC 1
>nv_crtc_dpms is called for CRTC 1 with mode 0
>pre-Owner: 0x3
>post-Owner: 0x3
>nv_output_commit is called
>nv_analog_output_dpms is called with mode 0
>nv_analog_output_dpms is called for CRTC 1 with mode 0
>nv_tmds_output_dpms is called with mode 3
>pre-Owner: 0x3
>post-Owner: 0x0
>pre-Owner: 0x0
>post-Owner: 0x3
>(II) EXA(0): Offscreen pixmap area of 117833728 bytes
>(II) EXA(0): Driver registered support for the following operations:
>(II)         Solid
>(II)         Copy
>(II)         Composite (RENDER acceleration)
>(II)         UploadToScreen
>(II)         DownloadFromScreen
>(==) NOUVEAU(0): Backing store disabled
>(==) NOUVEAU(0): Silken mouse enabled
>(II) NOUVEAU(0): [DRI] installation complete
>(II) NOUVEAU(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>pre-Owner: 0x3
>post-Owner: 0x0
>pre-Owner: 0x0
>post-Owner: 0x3
>(II) NOUVEAU(0): XV: Composite is enabled, enabling overlay with smart blitter fallback
>(--) RandR disabled
>(II) Initializing built-in extension MIT-SHM
>(II) Initializing built-in extension XInputExtension
>(II) Initializing built-in extension XTEST
>(II) Initializing built-in extension XKEYBOARD
>(II) Initializing built-in extension XC-APPGROUP
>(II) Initializing built-in extension XAccessControlExtension
>(II) Initializing built-in extension SECURITY
>(II) Initializing built-in extension XINERAMA
>(II) Initializing built-in extension XFIXES
>(II) Initializing built-in extension XFree86-Bigfont
>(II) Initializing built-in extension RENDER
>(II) Initializing built-in extension RANDR
>(II) Initializing built-in extension COMPOSITE
>(II) Initializing built-in extension DAMAGE
>(II) Initializing built-in extension XEVIE
>(II) Loading sub module "GLcore"
>(II) LoadModule: "GLcore"
>(II) Loading /usr/lib/xorg/modules/extensions//libGLcore.so
>(II) Module GLcore: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(II) GLX: Initialized MESA-PROXY GL provider for screen 0
>(II) NOUVEAU(0): Setting screen physical size to 612 x 230
>nv_xf86crtc_resize is called with 2560x1024 resolution
>(**) Option "CoreKeyboard"
>(**) Keyboard0: always reports core events
>(**) Option "Protocol" "standard"
>(**) Keyboard0: Protocol: standard
>(**) Option "AutoRepeat" "500 30"
>(**) Option "XkbRules" "xorg"
>(**) Keyboard0: XkbRules: "xorg"
>(**) Option "XkbModel" "pc105"
>(**) Keyboard0: XkbModel: "pc105"
>(**) Option "XkbLayout" "se"
>(**) Keyboard0: XkbLayout: "se"
>(**) Option "CustomKeycodes" "off"
>(**) Keyboard0: CustomKeycodes disabled
>(WW) <default pointer>: No Device specified, looking for one...
>(II) <default pointer>: Setting Device option to "/dev/input/mice"
>(--) <default pointer>: Device: "/dev/input/mice"
>(==) <default pointer>: Protocol: "Auto"
>(**) Option "CorePointer"
>(**) <default pointer>: always reports core events
>(==) <default pointer>: Emulate3Buttons, Emulate3Timeout: 50
>(**) <default pointer>: ZAxisMapping: buttons 4 and 5
>(**) <default pointer>: Buttons: 9
>(**) <default pointer>: Sensitivity: 1
>(II) evaluating device (<default pointer>)
>(II) XINPUT: Adding extended input device "<default pointer>" (type: MOUSE)
>(II) evaluating device (Keyboard0)
>(II) XINPUT: Adding extended input device "Keyboard0" (type: KEYBOARD)
>(--) <default pointer>: PnP-detected protocol: "ExplorerPS/2"
>(II) <default pointer>: ps2EnableDataReporting: succeeded
>pre-Owner: 0x3
>post-Owner: 0x0
>pre-Owner: 0x0
>post-Owner: 0x3
>(II) LoadModule: "evdev"
>(WW) Warning, couldn't open module evdev
>(II) UnloadModule: "evdev"
>(EE) Failed to load module "evdev" (module does not exist, 0)
>(EE) No input driver matching `evdev'
>(II) LoadModule: "evdev"
>(WW) Warning, couldn't open module evdev
>(II) UnloadModule: "evdev"
>(EE) Failed to load module "evdev" (module does not exist, 0)
>(EE) No input driver matching `evdev'
>(II) LoadModule: "evdev"
>(WW) Warning, couldn't open module evdev
>(II) UnloadModule: "evdev"
>(EE) Failed to load module "evdev" (module does not exist, 0)
>(EE) No input driver matching `evdev'
>(II) LoadModule: "evdev"
>(WW) Warning, couldn't open module evdev
>(II) UnloadModule: "evdev"
>(EE) Failed to load module "evdev" (module does not exist, 0)
>(EE) No input driver matching `evdev'
>(II) LoadModule: "evdev"
>(WW) Warning, couldn't open module evdev
>(II) UnloadModule: "evdev"
>(EE) Failed to load module "evdev" (module does not exist, 0)
>(EE) No input driver matching `evdev'
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): Printing DDC gathered Modelines:
>(II) NOUVEAU(0): Modeline "1280x1024"x0.0  106.00  1280 1328 1472 1664  1024 1027 1030 1060 -hsync -vsync (63.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   35.50  720 738 846 900  400 421 423 449 -hsync -vsync (39.4 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   44.90  1024 1032 1208 1264  768 768 776 817 interlace +hsync +vsync (35.5 kHz)
>(II) NOUVEAU(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "CPQ", prod id 12307
>nv_tmds_output_detect is called
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): Printing DDC gathered Modelines:
>(II) NOUVEAU(0): Modeline "1280x1024"x0.0  106.00  1280 1328 1472 1664  1024 1027 1030 1060 -hsync -vsync (63.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   35.50  720 738 846 900  400 421 423 449 -hsync -vsync (39.4 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   44.90  1024 1032 1208 1264  768 768 776 817 interlace +hsync +vsync (35.5 kHz)
>(II) NOUVEAU(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "CPQ", prod id 12307
>nv_tmds_output_detect is called
>nv_analog_output_dpms is called with mode 3
>nv_tmds_output_dpms is called with mode 3
>nv_crtc_dpms is called for CRTC 1 with mode 3
>pre-Owner: 0x3
>post-Owner: 0x3
>nv_xf86crtc_resize is called with 2304x1280 resolution
>nv_crtc_lock is called for CRTC 1
>nv_output_mode_fixup is called
>nv_crtc_mode_fixup is called for CRTC 1
>nv_crtc_shadow_allocate is called
>nv_output_prepare is called
>nv_analog_output_dpms is called with mode 3
>nv_analog_output_dpms is called for CRTC 1 with mode 3
>nv_crtc_prepare is called for CRTC 1
>pre-Owner: 0x3
>post-Owner: 0x3
>nv_crtc_dpms is called for CRTC 1 with mode 3
>pre-Owner: 0x3
>post-Owner: 0x3
>pre-Owner: 0x3
>post-Owner: 0x3
>nv_crtc_mode_set is called for CRTC 1
>(WW) NOUVEAU(0): Mode on CRTC 1
>(II) NOUVEAU(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (6731944.0 kHz)
>pre-Owner: 0x3
>post-Owner: 0x3
>Mode clock: 108000
>Adjusted mode clock: 108000
>horizDisplay: 0x9F 
>horizStart: 0xA5 
>horizEnd: 0xB3 
>horizTotal: 0xCE 
>horizBlankStart: 0x9F 
>horizBlankEnd: 0xD2 
>vertDisplay: 0x3FF 
>vertStart: 0x400 
>vertEnd: 0x403 
>vertTotal: 0x428 
>vertBlankStart: 0x3FF 
>vertBlankEnd: 0x429 
>crtc 1 1280 2560
>There are 2 CRTC's enabled
>output 1 debug_0 01101100
>writing vpll2 00020802
>writing vpll2B 80000401
>writing pllsel 30000F00
>writing vpll 00020802
>writing vpllB 80000401
>writing pllsel 30000F00
>writing sel_clk 00000000
>NVCrtcSetBase: x: 1280 y: 0
>nv_output_mode_set is called
>0: crtc 1 output 1 twocrt 1 twomon 1
>nv_crtc_commit for CRTC 1
>nv_crtc_dpms is called for CRTC 1 with mode 0
>pre-Owner: 0x3
>post-Owner: 0x3
>nv_output_commit is called
>nv_analog_output_dpms is called with mode 0
>nv_analog_output_dpms is called for CRTC 1 with mode 0
>nv_tmds_output_dpms is called with mode 3
>nv_crtc_shadow_create is called
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): Printing DDC gathered Modelines:
>(II) NOUVEAU(0): Modeline "1280x1024"x0.0  106.00  1280 1328 1472 1664  1024 1027 1030 1060 -hsync -vsync (63.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   35.50  720 738 846 900  400 421 423 449 -hsync -vsync (39.4 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   44.90  1024 1032 1208 1264  768 768 776 817 interlace +hsync +vsync (35.5 kHz)
>(II) NOUVEAU(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "CPQ", prod id 12307
>nv_tmds_output_detect is called
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): Printing DDC gathered Modelines:
>(II) NOUVEAU(0): Modeline "1280x1024"x0.0  106.00  1280 1328 1472 1664  1024 1027 1030 1060 -hsync -vsync (63.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   35.50  720 738 846 900  400 421 423 449 -hsync -vsync (39.4 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   44.90  1024 1032 1208 1264  768 768 776 817 interlace +hsync +vsync (35.5 kHz)
>(II) NOUVEAU(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "CPQ", prod id 12307
>nv_tmds_output_detect is called
>(II) 3rd Button detected: disabling emulate3Button
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): Printing DDC gathered Modelines:
>(II) NOUVEAU(0): Modeline "1280x1024"x0.0  106.00  1280 1328 1472 1664  1024 1027 1030 1060 -hsync -vsync (63.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   35.50  720 738 846 900  400 421 423 449 -hsync -vsync (39.4 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   44.90  1024 1032 1208 1264  768 768 776 817 interlace +hsync +vsync (35.5 kHz)
>(II) NOUVEAU(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "CPQ", prod id 12307
>nv_tmds_output_detect is called
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): Printing DDC gathered Modelines:
>(II) NOUVEAU(0): Modeline "1280x1024"x0.0  106.00  1280 1328 1472 1664  1024 1027 1030 1060 -hsync -vsync (63.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   35.50  720 738 846 900  400 421 423 449 -hsync -vsync (39.4 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   44.90  1024 1032 1208 1264  768 768 776 817 interlace +hsync +vsync (35.5 kHz)
>(II) NOUVEAU(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "CPQ", prod id 12307
>nv_tmds_output_detect is called
>nv_analog_output_dpms is called with mode 3
>nv_tmds_output_dpms is called with mode 3
>nv_crtc_dpms is called for CRTC 1 with mode 3
>pre-Owner: 0x3
>post-Owner: 0x3
>nv_xf86crtc_resize is called with 1280x1280 resolution
>nv_crtc_lock is called for CRTC 1
>nv_output_mode_fixup is called
>nv_crtc_mode_fixup is called for CRTC 1
>nv_output_prepare is called
>nv_analog_output_dpms is called with mode 3
>nv_analog_output_dpms is called for CRTC 1 with mode 3
>nv_crtc_prepare is called for CRTC 1
>pre-Owner: 0x3
>post-Owner: 0x3
>nv_crtc_dpms is called for CRTC 1 with mode 3
>pre-Owner: 0x3
>post-Owner: 0x3
>pre-Owner: 0x3
>post-Owner: 0x3
>nv_crtc_mode_set is called for CRTC 1
>(WW) NOUVEAU(0): Mode on CRTC 1
>(II) NOUVEAU(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (6731944.0 kHz)
>pre-Owner: 0x3
>post-Owner: 0x3
>Mode clock: 108000
>Adjusted mode clock: 108000
>horizDisplay: 0x9F 
>horizStart: 0xA5 
>horizEnd: 0xB3 
>horizTotal: 0xCE 
>horizBlankStart: 0x9F 
>horizBlankEnd: 0xD2 
>vertDisplay: 0x3FF 
>vertStart: 0x400 
>vertEnd: 0x403 
>vertTotal: 0x428 
>vertBlankStart: 0x3FF 
>vertBlankEnd: 0x429 
>crtc 1 1280 2560
>There are 2 CRTC's enabled
>output 1 debug_0 01101100
>writing vpll2 00020802
>writing vpll2B 80000401
>writing pllsel 30000F00
>writing vpll 00020802
>writing vpllB 80000401
>writing pllsel 30000F00
>writing sel_clk 00000000
>NVCrtcSetBase: x: 0 y: 0
>nv_output_mode_set is called
>0: crtc 1 output 1 twocrt 1 twomon 1
>nv_crtc_commit for CRTC 1
>nv_crtc_dpms is called for CRTC 1 with mode 0
>pre-Owner: 0x3
>post-Owner: 0x3
>nv_output_commit is called
>nv_analog_output_dpms is called with mode 0
>nv_analog_output_dpms is called for CRTC 1 with mode 0
>nv_tmds_output_dpms is called with mode 3
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): Printing DDC gathered Modelines:
>(II) NOUVEAU(0): Modeline "1280x1024"x0.0  106.00  1280 1328 1472 1664  1024 1027 1030 1060 -hsync -vsync (63.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   35.50  720 738 846 900  400 421 423 449 -hsync -vsync (39.4 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   44.90  1024 1032 1208 1264  768 768 776 817 interlace +hsync +vsync (35.5 kHz)
>(II) NOUVEAU(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "CPQ", prod id 12307
>nv_tmds_output_detect is called
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): Printing DDC gathered Modelines:
>(II) NOUVEAU(0): Modeline "1280x1024"x0.0  106.00  1280 1328 1472 1664  1024 1027 1030 1060 -hsync -vsync (63.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   35.50  720 738 846 900  400 421 423 449 -hsync -vsync (39.4 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   44.90  1024 1032 1208 1264  768 768 776 817 interlace +hsync +vsync (35.5 kHz)
>(II) NOUVEAU(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "CPQ", prod id 12307
>nv_tmds_output_detect is called
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): Printing DDC gathered Modelines:
>(II) NOUVEAU(0): Modeline "1280x1024"x0.0  106.00  1280 1328 1472 1664  1024 1027 1030 1060 -hsync -vsync (63.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   35.50  720 738 846 900  400 421 423 449 -hsync -vsync (39.4 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   44.90  1024 1032 1208 1264  768 768 776 817 interlace +hsync +vsync (35.5 kHz)
>(II) NOUVEAU(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "CPQ", prod id 12307
>nv_tmds_output_detect is called
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): Printing DDC gathered Modelines:
>(II) NOUVEAU(0): Modeline "1280x1024"x0.0  106.00  1280 1328 1472 1664  1024 1027 1030 1060 -hsync -vsync (63.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   35.50  720 738 846 900  400 421 423 449 -hsync -vsync (39.4 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   44.90  1024 1032 1208 1264  768 768 776 817 interlace +hsync +vsync (35.5 kHz)
>(II) NOUVEAU(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "CPQ", prod id 12307
>nv_tmds_output_detect is called
>nv_xf86crtc_resize is called with 2304x1280 resolution
>nv_crtc_lock is called for CRTC 1
>nv_output_mode_fixup is called
>nv_crtc_mode_fixup is called for CRTC 1
>nv_output_prepare is called
>nv_analog_output_dpms is called with mode 3
>nv_analog_output_dpms is called for CRTC 1 with mode 3
>nv_crtc_prepare is called for CRTC 1
>pre-Owner: 0x3
>post-Owner: 0x3
>nv_crtc_dpms is called for CRTC 1 with mode 3
>pre-Owner: 0x3
>post-Owner: 0x3
>pre-Owner: 0x3
>post-Owner: 0x3
>nv_crtc_mode_set is called for CRTC 1
>(WW) NOUVEAU(0): Mode on CRTC 1
>(II) NOUVEAU(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>pre-Owner: 0x3
>post-Owner: 0x3
>Mode clock: 108000
>Adjusted mode clock: 108000
>horizDisplay: 0x9F 
>horizStart: 0xA5 
>horizEnd: 0xB3 
>horizTotal: 0xCE 
>horizBlankStart: 0x9F 
>horizBlankEnd: 0xD2 
>vertDisplay: 0x3FF 
>vertStart: 0x400 
>vertEnd: 0x403 
>vertTotal: 0x428 
>vertBlankStart: 0x3FF 
>vertBlankEnd: 0x429 
>crtc 1 1280 2560
>There are 2 CRTC's enabled
>output 1 debug_0 01101100
>writing vpll2 00020802
>writing vpll2B 80000401
>writing pllsel 30000F00
>writing vpll 00020802
>writing vpllB 80000401
>writing pllsel 30000F00
>writing sel_clk 00000000
>NVCrtcSetBase: x: 1280 y: 0
>nv_output_mode_set is called
>0: crtc 1 output 1 twocrt 1 twomon 1
>nv_crtc_commit for CRTC 1
>nv_crtc_dpms is called for CRTC 1 with mode 0
>pre-Owner: 0x3
>post-Owner: 0x3
>nv_output_commit is called
>nv_analog_output_dpms is called with mode 0
>nv_analog_output_dpms is called for CRTC 1 with mode 0
>nv_tmds_output_dpms is called with mode 3
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): Printing DDC gathered Modelines:
>(II) NOUVEAU(0): Modeline "1280x1024"x0.0  106.00  1280 1328 1472 1664  1024 1027 1030 1060 -hsync -vsync (63.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   35.50  720 738 846 900  400 421 423 449 -hsync -vsync (39.4 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   44.90  1024 1032 1208 1264  768 768 776 817 interlace +hsync +vsync (35.5 kHz)
>(II) NOUVEAU(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "CPQ", prod id 12307
>nv_tmds_output_detect is called
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): Printing DDC gathered Modelines:
>(II) NOUVEAU(0): Modeline "1280x1024"x0.0  106.00  1280 1328 1472 1664  1024 1027 1030 1060 -hsync -vsync (63.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   35.50  720 738 846 900  400 421 423 449 -hsync -vsync (39.4 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   44.90  1024 1032 1208 1264  768 768 776 817 interlace +hsync +vsync (35.5 kHz)
>(II) NOUVEAU(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "CPQ", prod id 12307
>nv_tmds_output_detect is called
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): Printing DDC gathered Modelines:
>(II) NOUVEAU(0): Modeline "1280x1024"x0.0  106.00  1280 1328 1472 1664  1024 1027 1030 1060 -hsync -vsync (63.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   35.50  720 738 846 900  400 421 423 449 -hsync -vsync (39.4 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   44.90  1024 1032 1208 1264  768 768 776 817 interlace +hsync +vsync (35.5 kHz)
>(II) NOUVEAU(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "CPQ", prod id 12307
>nv_tmds_output_detect is called
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): Printing DDC gathered Modelines:
>(II) NOUVEAU(0): Modeline "1280x1024"x0.0  106.00  1280 1328 1472 1664  1024 1027 1030 1060 -hsync -vsync (63.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   35.50  720 738 846 900  400 421 423 449 -hsync -vsync (39.4 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   44.90  1024 1032 1208 1264  768 768 776 817 interlace +hsync +vsync (35.5 kHz)
>(II) NOUVEAU(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "CPQ", prod id 12307
>nv_tmds_output_detect is called
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): Printing DDC gathered Modelines:
>(II) NOUVEAU(0): Modeline "1280x1024"x0.0  106.00  1280 1328 1472 1664  1024 1027 1030 1060 -hsync -vsync (63.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   35.50  720 738 846 900  400 421 423 449 -hsync -vsync (39.4 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   44.90  1024 1032 1208 1264  768 768 776 817 interlace +hsync +vsync (35.5 kHz)
>(II) NOUVEAU(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "CPQ", prod id 12307
>nv_tmds_output_detect is called
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): Printing DDC gathered Modelines:
>(II) NOUVEAU(0): Modeline "1280x1024"x0.0  106.00  1280 1328 1472 1664  1024 1027 1030 1060 -hsync -vsync (63.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   35.50  720 738 846 900  400 421 423 449 -hsync -vsync (39.4 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   44.90  1024 1032 1208 1264  768 768 776 817 interlace +hsync +vsync (35.5 kHz)
>(II) NOUVEAU(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "CPQ", prod id 12307
>nv_tmds_output_detect is called
>nv_analog_output_dpms is called with mode 3
>nv_tmds_output_dpms is called with mode 3
>nv_crtc_dpms is called for CRTC 1 with mode 3
>pre-Owner: 0x3
>post-Owner: 0x3
>nv_xf86crtc_resize is called with 2560x1024 resolution
>nv_crtc_lock is called for CRTC 1
>nv_output_mode_fixup is called
>nv_crtc_mode_fixup is called for CRTC 1
>nv_crtc_shadow_destroy is called
>nv_output_prepare is called
>nv_analog_output_dpms is called with mode 3
>nv_analog_output_dpms is called for CRTC 1 with mode 3
>nv_crtc_prepare is called for CRTC 1
>pre-Owner: 0x3
>post-Owner: 0x3
>nv_crtc_dpms is called for CRTC 1 with mode 3
>pre-Owner: 0x3
>post-Owner: 0x3
>pre-Owner: 0x3
>post-Owner: 0x3
>nv_crtc_mode_set is called for CRTC 1
>(WW) NOUVEAU(0): Mode on CRTC 1
>(II) NOUVEAU(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (6731944.0 kHz)
>pre-Owner: 0x3
>post-Owner: 0x3
>Mode clock: 108000
>Adjusted mode clock: 108000
>horizDisplay: 0x9F 
>horizStart: 0xA5 
>horizEnd: 0xB3 
>horizTotal: 0xCE 
>horizBlankStart: 0x9F 
>horizBlankEnd: 0xD2 
>vertDisplay: 0x3FF 
>vertStart: 0x400 
>vertEnd: 0x403 
>vertTotal: 0x428 
>vertBlankStart: 0x3FF 
>vertBlankEnd: 0x429 
>crtc 1 1280 2560
>There are 2 CRTC's enabled
>output 1 debug_0 01101100
>writing vpll2 00020802
>writing vpll2B 80000401
>writing pllsel 30000F00
>writing vpll 00020802
>writing vpllB 80000401
>writing pllsel 30000F00
>writing sel_clk 00000000
>NVCrtcSetBase: x: 1280 y: 0
>nv_output_mode_set is called
>0: crtc 1 output 1 twocrt 1 twomon 1
>nv_crtc_commit for CRTC 1
>nv_crtc_dpms is called for CRTC 1 with mode 0
>pre-Owner: 0x3
>post-Owner: 0x3
>nv_output_commit is called
>nv_analog_output_dpms is called with mode 0
>nv_analog_output_dpms is called for CRTC 1 with mode 0
>nv_tmds_output_dpms is called with mode 3
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): Printing DDC gathered Modelines:
>(II) NOUVEAU(0): Modeline "1280x1024"x0.0  106.00  1280 1328 1472 1664  1024 1027 1030 1060 -hsync -vsync (63.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   35.50  720 738 846 900  400 421 423 449 -hsync -vsync (39.4 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   44.90  1024 1032 1208 1264  768 768 776 817 interlace +hsync +vsync (35.5 kHz)
>(II) NOUVEAU(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "CPQ", prod id 12307
>nv_tmds_output_detect is called
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): Printing DDC gathered Modelines:
>(II) NOUVEAU(0): Modeline "1280x1024"x0.0  106.00  1280 1328 1472 1664  1024 1027 1030 1060 -hsync -vsync (63.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   35.50  720 738 846 900  400 421 423 449 -hsync -vsync (39.4 kHz)
>(II) NOUVEAU(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x0.0   44.90  1024 1032 1208 1264  768 768 776 817 interlace +hsync +vsync (35.5 kHz)
>(II) NOUVEAU(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) NOUVEAU(0): EDID vendor "SAM", prod id 19824
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>(II) NOUVEAU(0): DDCModeFromDetailedTiming: Ignoring tiny 1x1 mode
>nv_analog_output_detect is called
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID vendor "CPQ", prod id 12307
>nv_tmds_output_detect is called
>(II) NOUVEAU(0): Fifo dump (lockup 0x1152,0x1152):
>(II) NOUVEAU(0): [0x113e] 0x0008e184
>(II) NOUVEAU(0): [0x113f] 0xd8000002
>(II) NOUVEAU(0): [0x1140] 0xd8000001
>(II) NOUVEAU(0): [0x1141] 0x0020e30c
>(II) NOUVEAU(0): [0x1142] 0x00000000
>(II) NOUVEAU(0): [0x1143] 0x00fafa00
>(II) NOUVEAU(0): [0x1144] 0x00000001
>(II) NOUVEAU(0): [0x1145] 0x00000040
>(II) NOUVEAU(0): [0x1146] 0x00000001
>(II) NOUVEAU(0): [0x1147] 0x00000001
>(II) NOUVEAU(0): [0x1148] 0x00000101
>(II) NOUVEAU(0): [0x1149] 0x00000000
>(II) NOUVEAU(0): [0x114a] 0x0004e104
>(II) NOUVEAU(0): [0x114b] 0x00000000
>(II) NOUVEAU(0): [0x114c] 0x0004e100
>(II) NOUVEAU(0): [0x114d] 0x00000000
>(II) NOUVEAU(0): [0x114e] 0x0004c104
>(II) NOUVEAU(0): [0x114f] 0x00000000
>(II) NOUVEAU(0): [0x1150] 0x0004c100
>(II) NOUVEAU(0): [0x1151] 0x00000000
>(II) NOUVEAU(0): [0x1152] 0x00140200
>(II) NOUVEAU(0): [0x1153] 0x03300000
>(II) NOUVEAU(0): [0x1154] 0x00110000
>(II) NOUVEAU(0): [0x1155] 0x00000145
>(II) NOUVEAU(0): [0x1156] 0x0cc00cc0
>(II) NOUVEAU(0): [0x1157] 0x01059400
>(II) NOUVEAU(0): [0x1158] 0x000802c0
>(II) NOUVEAU(0): [0x1159] 0x032f0000
>(II) NOUVEAU(0): [0x115a] 0x00100000
>(II) NOUVEAU(0): [0x115b] 0x000402b8
>(II) NOUVEAU(0): End of fifo dump
>
>Fatal server error:
>DMA queue hang: dmaPut=1152, current=1152, status=c000001
>
>NVLeaveVT is called
>pre-Owner: 0x3
>post-Owner: 0x0
>pre-Owner: 0x0
>post-Owner: 0x3
>Restoring TMDS timings, before restoring anything else
>The original bios clock seems to have been 108000 kHz
>(II) NOUVEAU(0): 0xE367: Parsing digital output script table
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x44, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x02
>(II) NOUVEAU(0): 0xE367: [ (0x6B) - INIT_SUB ]
>(II) NOUVEAU(0): 0xE367: EXECUTING SUB-SCRIPT 15
>(II) NOUVEAU(0): 0xE3A5: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xE3A5: Reg: 0x00680880, Mask: 0xDFFFFFFF, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00680880, Data: 0x01101100
>(II) NOUVEAU(0): 	Write: Reg: 0x00680880, Data: 0x01101100
>(II) NOUVEAU(0): 0xE3B2: [ (0x49) - INIT_INDEX_ADDRESS_LATCHED ]
>(II) NOUVEAU(0): 0xE3B2: ControlReg: 0x006808B0, DataReg: 0x006808B4, Mask: 0x00000000, Data: 0x00000000, Count: 0x07
>(II) NOUVEAU(0): 0xE3B2: Address: 0x04, Data: 0x80
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000080
>(II) NOUVEAU(0): 	Read:  Reg: 0x006808B0, Data: 0x00010004
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000004
>(II) NOUVEAU(0): 0xE3B2: Address: 0x05, Data: 0x6E
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x0000006E
>(II) NOUVEAU(0): 	Read:  Reg: 0x006808B0, Data: 0x00000004
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000005
>(II) NOUVEAU(0): 0xE3B2: Address: 0x2F, Data: 0xFF
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x000000FF
>(II) NOUVEAU(0): 	Read:  Reg: 0x006808B0, Data: 0x00000005
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x0000002F
>(II) NOUVEAU(0): 0xE3B2: Address: 0x30, Data: 0x00
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x006808B0, Data: 0x0000002F
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000030
>(II) NOUVEAU(0): 0xE3B2: Address: 0x31, Data: 0x00
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x006808B0, Data: 0x00000030
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000031
>(II) NOUVEAU(0): 0xE3B2: Address: 0x32, Data: 0x00
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x006808B0, Data: 0x00000031
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000032
>(II) NOUVEAU(0): 0xE3B2: Address: 0x33, Data: 0x00
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x006808B0, Data: 0x00000032
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000033
>(II) NOUVEAU(0): 0xE3D2: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0xE367: END OF SUB-SCRIPT 15
>(II) NOUVEAU(0): 0xE369: [ (0x49) - INIT_INDEX_ADDRESS_LATCHED ]
>(II) NOUVEAU(0): 0xE369: ControlReg: 0x006808B0, DataReg: 0x006808B4, Mask: 0x00000000, Data: 0x00000000, Count: 0x05
>(II) NOUVEAU(0): 0xE369: Address: 0x00, Data: 0x7F
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x0000007F
>(II) NOUVEAU(0): 	Read:  Reg: 0x006808B0, Data: 0x00000033
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000000
>(II) NOUVEAU(0): 0xE369: Address: 0x01, Data: 0xFF
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x000000FF
>(II) NOUVEAU(0): 	Read:  Reg: 0x006808B0, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000001
>(II) NOUVEAU(0): 0xE369: Address: 0x02, Data: 0xA9
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x000000A9
>(II) NOUVEAU(0): 	Read:  Reg: 0x006808B0, Data: 0x00000001
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000002
>(II) NOUVEAU(0): 0xE369: Address: 0x2E, Data: 0xB5
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x000000B5
>(II) NOUVEAU(0): 	Read:  Reg: 0x006808B0, Data: 0x00000002
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x0000002E
>(II) NOUVEAU(0): 0xE369: Address: 0x2F, Data: 0x21
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000021
>(II) NOUVEAU(0): 	Read:  Reg: 0x006808B0, Data: 0x0000002E
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x0000002F
>(II) NOUVEAU(0): 0xE385: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000080
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000004
>(II) NOUVEAU(0): 	Write: Reg: 0x006808BC, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B8, Data: 0x00000004
>nv_crtc_restore is called for CRTC 0
>pre-Owner: 0x0
>post-Owner: 0x0
>pre-Owner: 0x0
>post-Owner: 0x0
>writing vpll2 00020401
>writing vpll2B 80000401
>writing pllsel 30000500
>writing vpll 00020401
>writing vpllB 80000401
>writing pllsel 30000500
>writing sel_clk 00000000
>nv_crtc_restore is called for CRTC 1
>pre-Owner: 0x0
>post-Owner: 0x3
>pre-Owner: 0x3
>post-Owner: 0x3
>writing vpll2 00020401
>writing vpll2B 80000401
>writing pllsel 30000500
>writing vpll 00020401
>writing vpllB 80000401
>writing pllsel 30000500
>writing sel_clk 00000000
>nv_output_restore is called
>nv_output_restore is called
>nv_output_restore is called
>pre-Owner: 0x0
>post-Owner: 0x0
>pre-Owner: 0x0
>post-Owner: 0x0

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Attachments on bug 13778: 13308 | 13309 | 13310

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