Attachment 22309 Details for Bug 19439 – verbose X log

verbose X log

x.verbose.log (text/plain), 341.86 KB, created by Florian Scandella on 2009-01-28 08:15:00 UTC

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Creator: Florian Scandella

Created: 2009-01-28 08:15:00 UTC

Size: 341.86 KB

patch

obsolete

>xauth:  creating new authority file /root/.serverauth.5419
>
>(II) config/hal: initialized_XSERVTransSocketOpenCOTSServer: Unable to open socket for inet6
>_XSERVTransOpen: transport open failed for inet6/spellcaster:0
>_XSERVTransMakeAllCOTSServerListeners: failed to open listener for inet6
>
>This is a pre-release version of the X server from The X.Org Foundation.
>It is not supported in any way.
>Bugs may be filed in the bugzilla at http://bugs.freedesktop.org/.
>Select the "xorg" product for bugs you find in this release.
>Before reporting bugs in pre-release versions please check the
>latest version in the X.Org Foundation git repository.
>See http://wiki.x.org/wiki/GitPage for git access instructions.
>
>X.Org X Server 1.5.99.901 (1.6.0 RC 1)
>Release Date: (unreleased)
>X Protocol Version 11, Revision 0
>Build Operating System: Linux 2.6.28-gentoo x86_64 
>Current Operating System: Linux spellcaster 2.6.28-gentoo-r1 #1 SMP PREEMPT Mon Jan 19 21:43:02 CET 2009 x86_64
>Build Date: 18 January 2009  04:05:42PM
> 
>	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>(==) Log file: "/var/log/Xorg.0.log", Time: Wed Jan 28 07:18:53 2009
>(==) Using config file: "/etc/X11/xorg.conf"
>(==) No Layout section.  Using the first Screen section.
>(**) |-->Screen "screen_0" (0)
>(**) |   |-->Monitor "tft"
>(**) |   |-->Device "device_0"
>(==) Automatically adding devices
>(==) Automatically enabling devices
>(==) No FontPath specified.  Using compiled-in default.
>(==) FontPath set to:
>	built-ins
>(==) ModulePath set to "/usr/lib64/xorg/modules"
>(II) Cannot locate a core pointer device.
>(II) Cannot locate a core keyboard device.
>(II) The server relies on HAL to provide the list of input devices.
>	If no devices become available, reconfigure HAL or disable AllowEmptyInput.
>(II) Loader magic: 0xd60
>(II) Module ABI versions:
>	X.Org ANSI C Emulation: 0.4
>	X.Org Video Driver: 5.0
>	X.Org XInput driver : 4.0
>	X.Org Server Extension : 2.0
>(II) Loader running on linux
>(--) using VT number 7
>
>(--) PCI:*(0@3:0:0) ATI Technologies Inc RV770 [Radeon HD 4850] rev 0, Mem @ 0xe0000000/268435456, 0xfdce0000/65536, I/O @ 0x00008c00/256, BIOS @ 0x????????/131072
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) System resource ranges:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[5] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[6] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[7] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[8] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[9] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[10] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[11] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[12] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[13] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[14] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[15] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[16] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[17] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[18] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[19] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[20] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[21] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[22] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[23] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>(II) LoadModule: "extmod"
>(II) Loading /usr/lib64/xorg/modules/extensions//libextmod.so
>(II) Module extmod: vendor="X.Org Foundation"
>	compiled for 1.5.99.901, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension MIT-SCREEN-SAVER
>(II) Loading extension XFree86-VidModeExtension
>(II) Loading extension XFree86-DGA
>(II) Loading extension DPMS
>(II) Loading extension XVideo
>(II) Loading extension XVideo-MotionCompensation
>(II) Loading extension X-Resource
>(II) LoadModule: "dbe"
>(II) Loading /usr/lib64/xorg/modules/extensions//libdbe.so
>(II) Module dbe: vendor="X.Org Foundation"
>	compiled for 1.5.99.901, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension DOUBLE-BUFFER
>(II) LoadModule: "glx"
>(II) Loading /usr/lib64/xorg/modules/extensions//libglx.so
>(II) Module glx: vendor="X.Org Foundation"
>	compiled for 1.5.99.901, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 2.0
>(==) AIGLX enabled
>(==) Exporting typical set of GLX visuals
>(II) Loading extension GLX
>(II) LoadModule: "record"
>(II) Loading /usr/lib64/xorg/modules/extensions//librecord.so
>(II) Module record: vendor="X.Org Foundation"
>	compiled for 1.5.99.901, module version = 1.13.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension RECORD
>(II) LoadModule: "dri"
>(II) Loading /usr/lib64/xorg/modules/extensions//libdri.so
>(II) Module dri: vendor="X.Org Foundation"
>	compiled for 1.5.99.901, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension XFree86-DRI
>(II) LoadModule: "dri2"
>(II) Loading /usr/lib64/xorg/modules/extensions//libdri2.so
>(II) Module dri2: vendor="X.Org Foundation"
>	compiled for 1.5.99.901, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension DRI2
>(II) LoadModule: "radeonhd"
>(II) Loading /usr/lib64/xorg/modules/drivers//radeonhd_drv.so
>(II) Module radeonhd: vendor="AMD GPG"
>	compiled for 1.5.99.901, module version = 1.2.4
>	Module class: X.Org Video Driver
>	ABI class: X.Org Video Driver, version 5.0
>(II) RADEONHD: X driver for the following AMD GPG (ATI) graphics devices:
>	RV505 : Radeon X1550, X1550 64bit.
>	RV515 : Radeon X1300, X1550, X1600; FireGL V3300, V3350.
>	RV516 : Radeon X1300, X1550, X1550 64-bit, X1600; FireMV 2250.
>	R520  : Radeon X1800; FireGL V5300, V7200, V7300, V7350.
>	RV530 : Radeon X1300 XT, X1600, X1600 Pro, X1650; FireGL V3400, V5200.
>	RV535 : Radeon X1300, X1650.
>	RV550 : Radeon X2300 HD.
>	RV560 : Radeon X1650.
>	RV570 : Radeon X1950, X1950 GT; FireGL V7400.
>	R580  : Radeon X1900, X1950; AMD Stream Processor.
>	R600  : Radeon HD 2900 GT/Pro/XT; FireGL V7600/V8600/V8650.
>	RV610 : Radeon HD 2350, HD 2400 Pro/XT, HD 2400 Pro AGP; FireGL V4000.
>	RV620 : Radeon HD 3450, HD 3470.
>	RV630 : Radeon HD 2600 LE/Pro/XT, HD 2600 Pro/XT AGP; Gemini RV630;
>		FireGL V3600/V5600.
>	RV635 : Radeon HD 3650, HD 3670.
>	RV670 : Radeon HD 3690, 3850, HD 3870, FireGL V7700, FireStream 9170.
>	R680  : Radeon HD 3870 X2.
>	M52   : Mobility Radeon X1300.
>	M54   : Mobility Radeon X1400; M54-GL.
>	M56   : Mobility Radeon X1600; Mobility FireGL V5200.
>	M58   : Mobility Radeon X1800, X1800 XT; Mobility FireGL V7100, V7200.
>	M62   : Mobility Radeon X1350.
>	M64   : Mobility Radeon X1450, X2300.
>	M66   : Mobility Radeon X1700, X1700 XT; FireGL V5250.
>	M68   : Mobility Radeon X1900.
>	M71   : Mobility Radeon HD 2300.
>	M72   : Mobility Radeon HD 2400; Radeon E2400.
>	M74   : Mobility Radeon HD 2400 XT.
>	M76   : Mobility Radeon HD 2600;
>		(Gemini ATI) Mobility Radeon HD 2600 XT.
>	M82   : Mobility Radeon HD 3400.
>	M86   : Mobility Radeon HD 3650, HD 3670, Mobility FireGL V5700.
>	M88   : Mobility Radeon HD 3850, HD 3850 X2, HD 3870, HD3870 X2.
>	RS600 : Radeon Xpress 1200, Xpress 1250.
>	RS690 : Radeon X1200, X1250, X1270.
>	RS740 : RS740, RS740M.
>	RS780 : Radeon HD 3100/3200/3300 Series.
>	RV770 : Radeon HD 4800 Series; Everest, K2, Denali ATI FirePro.
>	R700  : Radeon R700.
>	M98   : Radeon M98 Mobility.
>	RV730 : Radeon HD4670, HD4650.
>	M96   : Radeon M96 Mobility.
>	RV710 : Radeon HD4570, HD4350.
>
>(II) RADEONHD: version 1.2.4, built from git branch master, commit 95aa9113
>
>(II) Primary Device is: PCI 03@00:00:0
>(II) resource ranges after xf86ClaimFixedResources() call:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[5] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[6] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[7] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[8] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[9] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[10] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[11] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[12] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[13] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[14] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[15] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[16] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[17] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[18] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[19] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[20] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[21] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[22] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[23] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>(II) resource ranges after probing:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[5] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[6] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[7] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[8] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[9] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[10] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[11] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[12] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[13] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[14] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[15] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[16] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B]
>	[17] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B]
>	[18] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B]
>	[19] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[20] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[21] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[22] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[23] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[24] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[25] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[26] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[27] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B]
>	[28] 0	0	0x000003c0 - 0x000003df (0x20) IS[B]
>(II) Setting vga for screen 0.
>(**) RADEONHD(0): Depth 24, (--) framebuffer bpp 32
>(**) RADEONHD(0): Selected ShadowFB.
>(II) RADEONHD(0): Unknown card detected: 0x9442:0x1462:0x1510.
>	If - and only if - your card does not work or does not work optimally
>	please contact radeonhd@opensuse.org to help rectify this.
>	Use the subject: 0x9442:0x1462:0x1510: <name of board>
>	and *please* describe the problems you are seeing
>	in your message.
>(--) RADEONHD(0): Detected an RV770 on an unidentified card
>(II) RADEONHD(0): FUNCTION: rhdMapMMIO
>(II) RADEONHD(0): Mapped IO @ 0xfdce0000 to 0x7fa38ba15000 (size 0x00010000)
>(II) RADEONHD(0): PCIE Card Detected
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomInit
>(II) RADEONHD(0): Getting BIOS copy from legacy VBIOS location
>(II) RADEONHD(0): FUNCTION: rhdAtomGetTables
>(II) RADEONHD(0): ATOM BIOS Rom: 
>	SubsystemVendorID: 0x1462 SubsystemID: 0x1510
>	IOBaseAddress: 0x8c00
>	Filename: SV29825a.bin
>	BIOS Bootup Message: 
>113-MSITV151MS.106 RV770PRO SAMSUNG 16MX32 256BIT/512MB                       
>(II) RADEONHD(0): Call to AtomBIOS Init succeeded
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomAnalogTVInfoQuery
>(II) RADEONHD(0): Analog TV Default Mode: 1
>(II) RADEONHD(0): Found default TV Mode NTSC
>(II) RADEONHD(0): FUNCTION: rhdGetVideoRamSize
>(II) RADEONHD(0): The detected amount of videoram exceeds the PCI BAR aperture.
>(II) RADEONHD(0): Using only 262144kB of the total 524288kB.
>(--) RADEONHD(0): VideoRAM: 262144 kByte
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomVramInfoQuery
>(II) RADEONHD(0): Framebuffer space used by Firmware (kb): 20
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomVramInfoQuery
>(II) RADEONHD(0): Start of VRAM area used by Firmware: 0x7ffec
>(II) RADEONHD(0): AtomBIOS requests 20kB of VRAM scratch space
>(II) RADEONHD(0): AtomBIOS VRAM scratch base: 0x7ffec
>(WW) RADEONHD(0): rhdAtomAllocateFbScratch: FW FB scratch area not located at the end of VRAM. Scratch End: 0x84fec VRAM End: 0x10000000
>(II) RADEONHD(0): Cannot get VRAM scratch space. Allocating in main memory instead
>(II) RADEONHD(0): Call to AtomBIOS Set FB Space succeeded
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Default Engine Clock: 625000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Default Memory Clock: 993000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Maximum Pixel ClockPLL Frequency Output: 1200000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Minimum Pixel ClockPLL Frequency Output: 0
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Maximum Pixel ClockPLL Frequency Input: 16000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Minimum Pixel ClockPLL Frequency Input: 6000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Maximum Pixel Clock: 400000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Reference Clock: 100000
>(II) RADEONHD(0): FUNCTION: RHDDRIPreInit
>(II) RADEONHD(0): Direct rendering turned off by default. Use Option "DRI" to enable.
>(II) Loading sub module "i2c"
>(II) LoadModule: "i2c"
>(II) Module "i2c" already built-in
>(II) RADEONHD(0): FUNCTION: RHDI2CFunc
>(II) RADEONHD(0): FUNCTION: rhdGetI2CPrescale
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Reference Clock: 100000
>(II) RADEONHD(0): FUNCTION: rhdInitI2C
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomGPIOI2CInfoQuery
>(II) RADEONHD(0): GPIO_I2C_Clk_Mask: 0x1f90
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomGPIOI2CInfoQuery
>(II) RADEONHD(0): GPIO_I2C_Clk_Mask_Shift: 0x0
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomGPIOI2CInfoQuery
>(II) RADEONHD(0): GPIO_I2C_Data_Mask: 0x1f90
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomGPIOI2CInfoQuery
>(II) RADEONHD(0): GPIO_I2C_Data_Mask_Shift: 0x8
>(II) RADEONHD(0): I2C clock prescale value: 3e8
>(II) RADEONHD(0): I2C bus "RHD I2C line 0" initialized.
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomGPIOI2CInfoQuery
>(II) RADEONHD(0): GPIO_I2C_Clk_Mask: 0x1f94
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomGPIOI2CInfoQuery
>(II) RADEONHD(0): GPIO_I2C_Clk_Mask_Shift: 0x0
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomGPIOI2CInfoQuery
>(II) RADEONHD(0): GPIO_I2C_Data_Mask: 0x1f94
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomGPIOI2CInfoQuery
>(II) RADEONHD(0): GPIO_I2C_Data_Mask_Shift: 0x8
>(II) RADEONHD(0): I2C clock prescale value: 3e8
>(II) RADEONHD(0): I2C bus "RHD I2C line 1" initialized.
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomGPIOI2CInfoQuery
>(II) RADEONHD(0): GPIO_I2C_Clk_Mask: 0x1f98
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomGPIOI2CInfoQuery
>(II) RADEONHD(0): GPIO_I2C_Clk_Mask_Shift: 0x0
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomGPIOI2CInfoQuery
>(II) RADEONHD(0): GPIO_I2C_Data_Mask: 0x1f98
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomGPIOI2CInfoQuery
>(II) RADEONHD(0): GPIO_I2C_Data_Mask_Shift: 0x8
>(II) RADEONHD(0): I2C clock prescale value: 3e8
>(II) RADEONHD(0): I2C bus "RHD I2C line 2" initialized.
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomGPIOI2CInfoQuery
>(II) RADEONHD(0): GPIO_I2C_Clk_Mask: 0x1f88
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomGPIOI2CInfoQuery
>(II) RADEONHD(0): GPIO_I2C_Clk_Mask_Shift: 0x0
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomGPIOI2CInfoQuery
>(II) RADEONHD(0): GPIO_I2C_Data_Mask: 0x1f88
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomGPIOI2CInfoQuery
>(II) RADEONHD(0): GPIO_I2C_Data_Mask_Shift: 0x8
>(II) RADEONHD(0): I2C clock prescale value: 3e8
>(II) RADEONHD(0): I2C bus "RHD I2C line 3" initialized.
>(II) Loading sub module "ddc"
>(II) LoadModule: "ddc"
>(II) Module "ddc" already built-in
>(II) RADEONHD(0): FUNCTION: RHDVGAInit
>(II) RADEONHD(0): Detected VGA mode.
>(II) RADEONHD(0): FUNCTION: RHDMCInit
>(II) RADEONHD(0): MC FB Address: 0x00000000.
>(II) RADEONHD(0): FUNCTION: RHDCrtcsInit
>(**) RADEONHD(0): Using AtomBIOS for Crtcs
>(II) RADEONHD(0): FUNCTION: rhdInitScaleType
>(II) RADEONHD(0): FUNCTION: RHDAtomCrtcsInit
>(II) RADEONHD(0): FUNCTION: RHDPLLsInit
>(**) RADEONHD(0): Using AtomBIOS for PLLs
>(II) RADEONHD(0): FUNCTION: RHDAtomPLLsInit
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Minimum Pixel ClockPLL Frequency Output: 0
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Maximum Pixel ClockPLL Frequency Output: 1200000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Maximum Pixel Clock: 400000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomFirmwareInfoQuery
>(II) RADEONHD(0): Reference Clock: 100000
>(II) RADEONHD(0): rhdAtomSetPixelClockVersion returned version 3 for index 0xc
>(II) RADEONHD(0): rhdAtomSetPixelClockVersion returned version 3 for index 0xc
>(II) RADEONHD(0): FUNCTION: RHDAudioInit
>(II) RADEONHD(0): FUNCTION: RHDLUTsInit
>(II) RADEONHD(0): FUNCTION: RHDCursorsInit
>(II) RADEONHD(0): FB: Allocated Cursor Image at offset 0x00000000 (size = 0x00004000)
>(II) RADEONHD(0): FB: Allocated Cursor Image at offset 0x00004000 (size = 0x00004000)
>(II) RADEONHD(0): FUNCTION: RHDConnectorsInit
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomConnectorInfo
>(II) RADEONHD(0): FUNCTION: rhdAtomConnectorInfoFromObjectHeader
>(II) RADEONHD(0): ObjectTable - size: 350, BIOS - size: 62976 TableOffset: 80 object_header_end: 430
>(II) RADEONHD(0): Object: ID: 3102 name: DUAL_LINK_DVI_I type: 3 id: 2
>(II) RADEONHD(0): FUNCTION: rhdAtomGetConnectorID
>(II) RADEONHD(0):  * SrcObject: ID: 211e name: UNIPHY enum: 1
>(II) RADEONHD(0):  * SrcObject: ID: 2116 name: INTERNAL_KLDSCP_DAC2 enum: 1
>(II) RADEONHD(0):  - Record Type: 1
>(II) RADEONHD(0):    rhdAtomDDCFromI2CRecord:  I2C Record: HW_Line[2] EngineID: 1 I2CAddr: 0
>(II) RADEONHD(0): FUNCTION: rhdAtomGetDDCIndex
>(II) RADEONHD(0):  Found DDC GPIO Index: 2
>(II) RADEONHD(0):  - Record Type: 2
>(II) RADEONHD(0):    rhdAtomHPDFromRecord:  HPD Record: GPIO ID: 6 Plugged_PinState: 0
>(II) RADEONHD(0): FUNCTION: rhdAtomParseGPIOLutForHPD
>(II) RADEONHD(0):    rhdAtomParseGPIOLutForHPD: GPIO PinID: 6 Index: 1fa5 Shift: 0
>(II) RADEONHD(0):  - Record Type: 4
>(II) RADEONHD(0): FUNCTION: rhdAtomDeviceTagsFromRecord
>(II) RADEONHD(0):    NumberOfDevice: 2
>(II) RADEONHD(0):    Devices: DFP1 CRT2
>(II) RADEONHD(0): Object: ID: 310f name: 7PIN_DIN type: 3 id: f
>(II) RADEONHD(0): FUNCTION: rhdAtomGetConnectorID
>(II) RADEONHD(0):  * SrcObject: ID: 2116 name: INTERNAL_KLDSCP_DAC2 enum: 1
>(II) RADEONHD(0):  - Record Type: 4
>(II) RADEONHD(0): FUNCTION: rhdAtomDeviceTagsFromRecord
>(II) RADEONHD(0):    NumberOfDevice: 2
>(II) RADEONHD(0):    Devices: TV1 CV
>(II) RADEONHD(0):  - Record Type: 7
>(II) RADEONHD(0): Object: ID: 3202 name: DUAL_LINK_DVI_I type: 3 id: 2
>(II) RADEONHD(0): FUNCTION: rhdAtomGetConnectorID
>(II) RADEONHD(0):  * SrcObject: ID: 211f name: KLDSCP_LVTMA enum: 1
>(II) RADEONHD(0):  * SrcObject: ID: 2115 name: INTERNAL_KLDSCP_DAC1 enum: 1
>(II) RADEONHD(0):  - Record Type: 1
>(II) RADEONHD(0):    rhdAtomDDCFromI2CRecord:  I2C Record: HW_Line[3] EngineID: 1 I2CAddr: 0
>(II) RADEONHD(0): FUNCTION: rhdAtomGetDDCIndex
>(II) RADEONHD(0):  Found DDC GPIO Index: 3
>(II) RADEONHD(0):  - Record Type: 2
>(II) RADEONHD(0):    rhdAtomHPDFromRecord:  HPD Record: GPIO ID: 7 Plugged_PinState: 0
>(II) RADEONHD(0): FUNCTION: rhdAtomParseGPIOLutForHPD
>(II) RADEONHD(0):    rhdAtomParseGPIOLutForHPD: GPIO PinID: 7 Index: 1fa5 Shift: 8
>(II) RADEONHD(0):  - Record Type: 4
>(II) RADEONHD(0): FUNCTION: rhdAtomDeviceTagsFromRecord
>(II) RADEONHD(0):    NumberOfDevice: 2
>(II) RADEONHD(0):    Devices: CRT1 DFP2
>(II) RADEONHD(0): Object: ID: 3111 name: CROSSFIRE type: 3 id: 11
>(II) RADEONHD(0): FUNCTION: rhdAtomGetConnectorID
>(II) RADEONHD(0):  * SrcObject: ID: 2114 name: INTERNAL_KLDSCP_DVO1 enum: 1
>(II) RADEONHD(0):  - Record Type: 4
>(II) RADEONHD(0): FUNCTION: rhdAtomDeviceTagsFromRecord
>(II) RADEONHD(0):    NumberOfDevice: 0
>(II) RADEONHD(0):  - Record Type: b
>(II) RADEONHD(0): Object: ID: 3211 name: CROSSFIRE type: 3 id: 11
>(II) RADEONHD(0): FUNCTION: rhdAtomGetConnectorID
>(II) RADEONHD(0):  * SrcObject: ID: 2114 name: INTERNAL_KLDSCP_DVO1 enum: 1
>(II) RADEONHD(0):  - Record Type: 4
>(II) RADEONHD(0): FUNCTION: rhdAtomDeviceTagsFromRecord
>(II) RADEONHD(0):    NumberOfDevice: 0
>(II) RADEONHD(0):  - Record Type: b
>(II) RADEONHD(0): Connector[0] {RHD_CONNECTOR_DVI, "DUAL_LINK_DVI_I DFP1 CRT2", RHD_DDC_2, RHD_HPD_0, { RHD_OUTPUT_UNIPHYA, RHD_OUTPUT_DACB } }
>(II) RADEONHD(0): Connector[1] {RHD_CONNECTOR_TV, "7PIN_DIN TV1 CV", RHD_DDC_0, RHD_HPD_NONE, { RHD_OUTPUT_DACB, RHD_OUTPUT_NONE } }
>(II) RADEONHD(0): Connector[2] {RHD_CONNECTOR_DVI, "DUAL_LINK_DVI_I CRT1 DFP2", RHD_DDC_3, RHD_HPD_1, { RHD_OUTPUT_KLDSKP_LVTMA, RHD_OUTPUT_DACA } }
>(II) RADEONHD(0): Call to AtomBIOS Get Connectors succeeded
>(II) RADEONHD(0): FUNCTION: RHDHPDSave
>(II) RADEONHD(0): FUNCTION: RHDHPDSet
>(II) RADEONHD(0): RHDConnectorsInit: 0 (DUAL_LINK_DVI_I DFP1 CRT2) type 2, ddc 2, hpd 1
>(II) RADEONHD(0): FUNCTION: RHDI2CFunc
>(**) RADEONHD(0): Using AtomBIOS for Outputs
>(II) RADEONHD(0): FUNCTION: RHDAtomOutputInit
>(II) RADEONHD(0): FUNCTION: RHDHdmiInit
>(II) RADEONHD(0): FUNCTION: RHDAudioRegisterHdmi
>(II) RADEONHD(0): rhdAtomSelectCrtcSourceVersion returned version 2 for index 0x2a
>(II) RADEONHD(0): FUNCTION: RHDOutputAdd
>(--) RADEONHD(0): Attaching Output AtomOutputUniphyA to Connector DVI-I 1
>(**) RADEONHD(0): Using AtomBIOS for Outputs
>(II) RADEONHD(0): FUNCTION: RHDAtomOutputInit
>(II) RADEONHD(0): rhdAtomSelectCrtcSourceVersion returned version 2 for index 0x2a
>(II) RADEONHD(0): FUNCTION: RHDOutputAdd
>(--) RADEONHD(0): Attaching Output AtomOutputDACB to Connector DVI-I 1
>(II) RADEONHD(0): RHDConnectorsInit: 1 (7PIN_DIN TV1 CV) type 5, ddc 0, hpd 0
>(II) RADEONHD(0): FUNCTION: RHDI2CFunc
>(--) RADEONHD(0): Attaching Output AtomOutputDACB to Connector TV 7PIN_DIN
>(II) RADEONHD(0): RHDConnectorsInit: 2 (DUAL_LINK_DVI_I CRT1 DFP2) type 2, ddc 3, hpd 2
>(II) RADEONHD(0): FUNCTION: RHDI2CFunc
>(**) RADEONHD(0): Using AtomBIOS for Outputs
>(II) RADEONHD(0): FUNCTION: RHDAtomOutputInit
>(==) RADEONHD(0): Setting AtomOutputKldskpLvtma to incoherent
>(II) RADEONHD(0): FUNCTION: RHDHdmiInit
>(II) RADEONHD(0): FUNCTION: RHDAudioRegisterHdmi
>(II) RADEONHD(0): rhdAtomSelectCrtcSourceVersion returned version 2 for index 0x2a
>(II) RADEONHD(0): FUNCTION: RHDOutputAdd
>(--) RADEONHD(0): Attaching Output AtomOutputKldskpLvtma to Connector DVI-I 2
>(**) RADEONHD(0): Using AtomBIOS for Outputs
>(II) RADEONHD(0): FUNCTION: RHDAtomOutputInit
>(II) RADEONHD(0): rhdAtomSelectCrtcSourceVersion returned version 2 for index 0x2a
>(II) RADEONHD(0): FUNCTION: RHDOutputAdd
>(--) RADEONHD(0): Attaching Output AtomOutputDACA to Connector DVI-I 2
>(II) RADEONHD(0): FUNCTION: RHDHPDRestore
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputDeviceList
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputDeviceListFromObjectHeader
>(II) RADEONHD(0): ObjectTable - size: 350, BIOS - size: 62976 TableOffset: 80 object_header_end: 430
>(II) RADEONHD(0): DisplayPathObjectTable: entries: 6 version: 1
>(II) RADEONHD(0):   DisplaPathTable[0]: size: 10 DeviceTag: 0x8 ConnObjId: 0x3102 NAME: DUAL_LINK_DVI_I GPUObjId: 0x1100
>(II) RADEONHD(0):    GraphicsObj[0] ID: 0x211e Type: 0x2 ObjID: 0x1e ENUM: 0x1 NAME: UNIPHY
>(II) RADEONHD(0): FUNCTION: rhdAtomGetConnectorID
>(II) RADEONHD(0):    DeviceIndex: 0x3
>(II) RADEONHD(0):   DisplaPathTable[1]: size: 10 DeviceTag: 0x10 ConnObjId: 0x3102 NAME: DUAL_LINK_DVI_I GPUObjId: 0x1100
>(II) RADEONHD(0):    GraphicsObj[0] ID: 0x2116 Type: 0x2 ObjID: 0x16 ENUM: 0x1 NAME: INTERNAL_KLDSCP_DAC2
>(II) RADEONHD(0): FUNCTION: rhdAtomGetConnectorID
>(II) RADEONHD(0):    DeviceIndex: 0x4
>(II) RADEONHD(0):   DisplaPathTable[2]: size: 10 DeviceTag: 0x4 ConnObjId: 0x310f NAME: 7PIN_DIN GPUObjId: 0x1100
>(II) RADEONHD(0):    GraphicsObj[0] ID: 0x2116 Type: 0x2 ObjID: 0x16 ENUM: 0x1 NAME: INTERNAL_KLDSCP_DAC2
>(II) RADEONHD(0): FUNCTION: rhdAtomGetConnectorID
>(II) RADEONHD(0):    DeviceIndex: 0x2
>(II) RADEONHD(0):   DisplaPathTable[3]: size: 10 DeviceTag: 0x100 ConnObjId: 0x310f NAME: 7PIN_DIN GPUObjId: 0x1100
>(II) RADEONHD(0):    GraphicsObj[0] ID: 0x2116 Type: 0x2 ObjID: 0x16 ENUM: 0x1 NAME: INTERNAL_KLDSCP_DAC2
>(II) RADEONHD(0): FUNCTION: rhdAtomGetConnectorID
>(II) RADEONHD(0):    DeviceIndex: 0x8
>(II) RADEONHD(0):   DisplaPathTable[4]: size: 10 DeviceTag: 0x1 ConnObjId: 0x3202 NAME: DUAL_LINK_DVI_I GPUObjId: 0x1100
>(II) RADEONHD(0):    GraphicsObj[0] ID: 0x2115 Type: 0x2 ObjID: 0x15 ENUM: 0x1 NAME: INTERNAL_KLDSCP_DAC1
>(II) RADEONHD(0): FUNCTION: rhdAtomGetConnectorID
>(II) RADEONHD(0):    DeviceIndex: 0x0
>(II) RADEONHD(0):   DisplaPathTable[5]: size: 10 DeviceTag: 0x80 ConnObjId: 0x3202 NAME: DUAL_LINK_DVI_I GPUObjId: 0x1100
>(II) RADEONHD(0):    GraphicsObj[0] ID: 0x211f Type: 0x2 ObjID: 0x1f ENUM: 0x1 NAME: KLDSCP_LVTMA
>(II) RADEONHD(0): FUNCTION: rhdAtomGetConnectorID
>(II) RADEONHD(0):    DeviceIndex: 0x7
>(II) RADEONHD(0): Call to AtomBIOS Get Output Info succeeded
>(II) RADEONHD(0): FUNCTION: RHDAtomSetupOutputDriverPrivate
>(II) RADEONHD(0):  Output: AtomOutputUniphyA[0x07] - adding devices:
>(II) RADEONHD(0):  Looking at DeviceID: 0x04 OutputType: 0x07 ConnectorType: 0x02
>(II) RADEONHD(0):   >> 0x04
>(II) RADEONHD(0):  Looking at DeviceID: 0x05 OutputType: 0x02 ConnectorType: 0x02
>(II) RADEONHD(0):  Looking at DeviceID: 0x03 OutputType: 0x02 ConnectorType: 0x05
>(II) RADEONHD(0):  Looking at DeviceID: 0x09 OutputType: 0x02 ConnectorType: 0x05
>(II) RADEONHD(0):  Looking at DeviceID: 0x01 OutputType: 0x01 ConnectorType: 0x02
>(II) RADEONHD(0):  Looking at DeviceID: 0x08 OutputType: 0x06 ConnectorType: 0x02
>(II) RADEONHD(0): FUNCTION: RHDAtomSetupOutputDriverPrivate
>(II) RADEONHD(0):  Output: AtomOutputDACB[0x02] - adding devices:
>(II) RADEONHD(0):  Looking at DeviceID: 0x04 OutputType: 0x07 ConnectorType: 0x02
>(II) RADEONHD(0):  Looking at DeviceID: 0x05 OutputType: 0x02 ConnectorType: 0x02
>(II) RADEONHD(0):   >> 0x05
>(II) RADEONHD(0):  Looking at DeviceID: 0x03 OutputType: 0x02 ConnectorType: 0x05
>(II) RADEONHD(0):   >> 0x03
>(II) RADEONHD(0):  Looking at DeviceID: 0x09 OutputType: 0x02 ConnectorType: 0x05
>(II) RADEONHD(0):   >> 0x09
>(II) RADEONHD(0):  Looking at DeviceID: 0x01 OutputType: 0x01 ConnectorType: 0x02
>(II) RADEONHD(0):  Looking at DeviceID: 0x08 OutputType: 0x06 ConnectorType: 0x02
>(II) RADEONHD(0): FUNCTION: RHDAtomSetupOutputDriverPrivate
>(II) RADEONHD(0):  Output: AtomOutputKldskpLvtma[0x06] - adding devices:
>(II) RADEONHD(0):  Looking at DeviceID: 0x04 OutputType: 0x07 ConnectorType: 0x02
>(II) RADEONHD(0):  Looking at DeviceID: 0x05 OutputType: 0x02 ConnectorType: 0x02
>(II) RADEONHD(0):  Looking at DeviceID: 0x03 OutputType: 0x02 ConnectorType: 0x05
>(II) RADEONHD(0):  Looking at DeviceID: 0x09 OutputType: 0x02 ConnectorType: 0x05
>(II) RADEONHD(0):  Looking at DeviceID: 0x01 OutputType: 0x01 ConnectorType: 0x02
>(II) RADEONHD(0):  Looking at DeviceID: 0x08 OutputType: 0x06 ConnectorType: 0x02
>(II) RADEONHD(0):   >> 0x08
>(II) RADEONHD(0): FUNCTION: RHDAtomSetupOutputDriverPrivate
>(II) RADEONHD(0):  Output: AtomOutputDACA[0x01] - adding devices:
>(II) RADEONHD(0):  Looking at DeviceID: 0x04 OutputType: 0x07 ConnectorType: 0x02
>(II) RADEONHD(0):  Looking at DeviceID: 0x05 OutputType: 0x02 ConnectorType: 0x02
>(II) RADEONHD(0):  Looking at DeviceID: 0x03 OutputType: 0x02 ConnectorType: 0x05
>(II) RADEONHD(0):  Looking at DeviceID: 0x09 OutputType: 0x02 ConnectorType: 0x05
>(II) RADEONHD(0):  Looking at DeviceID: 0x01 OutputType: 0x01 ConnectorType: 0x02
>(II) RADEONHD(0):   >> 0x01
>(II) RADEONHD(0):  Looking at DeviceID: 0x08 OutputType: 0x06 ConnectorType: 0x02
>(II) RADEONHD(0): FUNCTION: RHDRandrPreInit
>(II) RADEONHD(0): RandR: Adding RRoutput DVI-I_1/digital for Output AtomOutputUniphyA
>(II) RADEONHD(0): RandR: Adding RRoutput DVI-I_1/analog for Output AtomOutputDACB
>(II) RADEONHD(0): RandR: Adding RRoutput TV_7PIN_DIN for Output AtomOutputDACB
>(II) RADEONHD(0): RandR: Adding RRoutput DVI-I_2/digital for Output AtomOutputKldskpLvtma
>(II) RADEONHD(0): RandR: Adding RRoutput DVI-I_2/analog for Output AtomOutputDACA
>(II) RADEONHD(0): Output DVI-I_1/digital using monitor section tft
>(**) RADEONHD(0): Option "RightOf" "DVI-I_2/analog"
>(II) RADEONHD(0): Output DVI-I_1/analog has no monitor section
>(II) RADEONHD(0): Output TV_7PIN_DIN has no monitor section
>(II) RADEONHD(0): Output DVI-I_2/digital has no monitor section
>(II) RADEONHD(0): Output DVI-I_2/analog has no monitor section
>(II) RADEONHD(0): rhdRROutputDetect: Output DVI-I_1/digital
>(II) RADEONHD(0): FUNCTION: RHDHPDCheck
>(II) RADEONHD(0): RHDHPDCheck returned: 10101 mask: 1
>(II) RADEONHD(0): FUNCTION: RHDBIOSScratchDACSense
>(II) RADEONHD(0): Sensing DACB on Output AtomOutputDACB
>(II) RADEONHD(0): FUNCTION: AtomDACLoadDetection
>(II) RADEONHD(0): Calling DAC_LoadDetection
>(II) RADEONHD(0):  Pspace[01]: 0x00010010
>(II) RADEONHD(0):  Pspace[02]: 0x00000000
>(II) RADEONHD(0):  Pspace[03]: 0x024902a0
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ff4) = 221f00
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7158) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7100) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7150) = 1010101
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(715c) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7100) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7104) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7104,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7100) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7100,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7128) = 70000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7128,70000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7158) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7158,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7140) = 1e6
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7140,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7158) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7158,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(715c) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(715c,70000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ff4) = 221f00
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ff4,221f02)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7150) = 1010101
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7150,1010100)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7150) = 1010100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7150,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7140) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7140,1e6)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(715c) = 70000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(715c,70100)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7160) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ff4) = 221f02
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ff4,221f00)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7158) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7158,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7100) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7100,0)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7150,1010101)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(715c) = 70100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(715c,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(1724) = 10002
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(1724,10002)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): DAC_LoadDetection Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchDACSenseResults
>(II) RADEONHD(0): BIOSScratch_0: 0x10002
>(II) RADEONHD(0): rhdAtomBIOSScratchDACSenseResults: RHD_SENSED_NONE
>(II) RADEONHD(0): rhdRROutputGetModes: Output DVI-I_1/digital
>(II) RADEONHD(0): FUNCTION: RHDMonitorInit
>(II) RADEONHD(0): I2C device "RHD I2C line 2:E-EDID segment register" registered at address 0x60.
>(II) RADEONHD(0): I2C device "RHD I2C line 2:ddc2" registered at address 0xA0.
>(II) RADEONHD(0): FUNCTION: rhdRV620WriteRead
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CSetupStatus
>(II) RADEONHD(0): FUNCTION: rhdRV620Transaction
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x2 0
>(II) RADEONHD(0): SW_STATUS: 0x2 1
>(II) RADEONHD(0): SW_STATUS: 0x2 2
>(II) RADEONHD(0): SW_STATUS: 0x2 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x3 7
>(II) RADEONHD(0): SW_STATUS: 0x10 8
>(II) RADEONHD(0): FUNCTION: rhdRV620Transaction
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x2 0
>(II) RADEONHD(0): SW_STATUS: 0x2 1
>(II) RADEONHD(0): SW_STATUS: 0x2 2
>(II) RADEONHD(0): SW_STATUS: 0x2 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x3 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x3 11
>(II) RADEONHD(0): SW_STATUS: 0x4 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x3 15
>(II) RADEONHD(0): SW_STATUS: 0x4 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x3 19
>(II) RADEONHD(0): SW_STATUS: 0x4 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x3 23
>(II) RADEONHD(0): SW_STATUS: 0x4 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x3 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x3 32
>(II) RADEONHD(0): SW_STATUS: 0x3 33
>(II) RADEONHD(0): SW_STATUS: 0x3 34
>(II) RADEONHD(0): SW_STATUS: 0x3 35
>(II) RADEONHD(0): SW_STATUS: 0x3 36
>(II) RADEONHD(0): SW_STATUS: 0x18 37
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x4 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x3 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x3 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x18 32
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x4 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x4 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x4 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x18 32
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x3 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x4 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x4 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x4 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x4 31
>(II) RADEONHD(0): SW_STATUS: 0x18 32
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x4 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x3 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x3 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x18 32
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x4 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x3 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x3 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x18 32
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x4 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x4 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x4 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x4 31
>(II) RADEONHD(0): SW_STATUS: 0x18 32
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x4 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x4 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x3 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x18 32
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x4 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x4 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x3 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x18 32
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x4 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x3 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x4 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x4 31
>(II) RADEONHD(0): SW_STATUS: 0x18 32
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x4 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x3 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x3 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x18 32
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x4 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x4 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x3 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x18 32
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x3 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x3 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x3 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x18 32
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x3 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x4 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x4 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x4 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x4 31
>(II) RADEONHD(0): SW_STATUS: 0x18 32
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x3 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x3 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x3 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x18 32
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x4 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x3 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x3 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x10 32
>(II) RADEONHD(0): EDID data for PLE481S
>(II) RADEONHD(0): Manufacturer: IVM  Model: 481a  Serial#: 6827
>(II) RADEONHD(0): Year: 2004  Week: 47
>(II) RADEONHD(0): EDID Version: 1.3
>(II) RADEONHD(0): Digital Display Input
>(II) RADEONHD(0): Max Image Size [cm]: horiz.: 38  vert.: 30
>(II) RADEONHD(0): Gamma: 2.20
>(II) RADEONHD(0): DPMS capabilities: Off
>(II) RADEONHD(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) RADEONHD(0): First detailed timing is preferred mode
>(II) RADEONHD(0): redX: 0.640 redY: 0.344   greenX: 0.299 greenY: 0.607
>(II) RADEONHD(0): blueX: 0.145 blueY: 0.073   whiteX: 0.312 whiteY: 0.328
>(II) RADEONHD(0): Supported VESA Video Modes:
>(II) RADEONHD(0): 720x400@70Hz
>(II) RADEONHD(0): 640x480@60Hz
>(II) RADEONHD(0): 640x480@67Hz
>(II) RADEONHD(0): 640x480@72Hz
>(II) RADEONHD(0): 640x480@75Hz
>(II) RADEONHD(0): 800x600@56Hz
>(II) RADEONHD(0): 800x600@60Hz
>(II) RADEONHD(0): 800x600@72Hz
>(II) RADEONHD(0): 800x600@75Hz
>(II) RADEONHD(0): 832x624@75Hz
>(II) RADEONHD(0): 1024x768@60Hz
>(II) RADEONHD(0): 1024x768@70Hz
>(II) RADEONHD(0): 1024x768@75Hz
>(II) RADEONHD(0): 1280x1024@75Hz
>(II) RADEONHD(0): Manufacturer's mask: 0
>(II) RADEONHD(0): Supported Future Video Modes:
>(II) RADEONHD(0): #0: hsize: 1280  vsize 1024  refresh: 60  vid: 32897
>(II) RADEONHD(0): #1: hsize: 1152  vsize 864  refresh: 75  vid: 20337
>(II) RADEONHD(0): Supported additional Video Mode:
>(II) RADEONHD(0): clock: 108.0 MHz   Image Size:  376 x 301 mm
>(II) RADEONHD(0): h_active: 1280  h_sync: 1328  h_sync_end 1440 h_blank_end 1688 h_border: 0
>(II) RADEONHD(0): v_active: 1024  v_sync: 1025  v_sync_end 1028 v_blanking: 1066 v_border: 0
>(II) RADEONHD(0): Serial No: 05370G4B06827
>(II) RADEONHD(0): Ranges: V min: 55 V max: 76 Hz, H min: 24 H max: 83 kHz, PixClock max 140 MHz
>(II) RADEONHD(0): Monitor name: PLE481S
>(II) RADEONHD(0): EDID (in hex):
>(II) RADEONHD(0): 	00ffffffffffff0026cd1a48ab1a0000
>(II) RADEONHD(0): 	2f0e010380261e782aca30a3584c9b25
>(II) RADEONHD(0): 	125054bfef008180714f010101010101
>(II) RADEONHD(0): 	010101010101302a009851002a403070
>(II) RADEONHD(0): 	1300782d1100001e000000ff00303533
>(II) RADEONHD(0): 	37304734423036383237000000fd0037
>(II) RADEONHD(0): 	4c18530e000a202020202020000000fc
>(II) RADEONHD(0): 	00504c45343831530a202020202000e3
>(II) RADEONHD(0): FUNCTION: RHDRRMonitorInit
>(II) RADEONHD(0): EDID vendor "IVM", prod id 18458
>(II) RADEONHD(0): Using EDID range info for horizontal sync
>(II) RADEONHD(0): Using EDID range info for vertical refresh
>(II) RADEONHD(0): Printing DDC gathered Modelines:
>(II) RADEONHD(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>(II) RADEONHD(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) RADEONHD(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) RADEONHD(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) RADEONHD(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
>(II) RADEONHD(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz)
>(II) RADEONHD(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) RADEONHD(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) RADEONHD(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz)
>(II) RADEONHD(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) RADEONHD(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) RADEONHD(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) RADEONHD(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) RADEONHD(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) RADEONHD(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) RADEONHD(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>(II) RADEONHD(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz)
>(II) RADEONHD(0): rhdRROutputGetModes: Adding Output Modes:
>Modeline "800x600"   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync
>Modeline "800x600"   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync
>Modeline "640x480"   31.50  640 656 720 840  480 481 484 500 -hsync -vsync
>Modeline "640x480"   31.50  640 664 704 832  480 489 491 520 -hsync -vsync
>Modeline "640x480"   30.24  640 704 768 864  480 483 486 525 -hsync -vsync
>Modeline "640x480"   25.20  640 656 752 800  480 490 492 525 -hsync -vsync
>Modeline "720x400"   28.32  720 738 846 900  400 412 414 449 -hsync +vsync
>Modeline "1280x1024"  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync
>Modeline "1024x768"   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync
>Modeline "1024x768"   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync
>Modeline "1024x768"   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync
>Modeline "832x624"   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync
>Modeline "800x600"   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync
>Modeline "800x600"   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync
>Modeline "1280x1024"  109.00  1280 1361 1496 1712  1024 1027 1034 1063 -hsync +vsync
>Modeline "1152x864"  104.75  1152 1227 1349 1546  864 867 871 905 -hsync +vsync
>Modeline "1280x1024"  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 800x600
>Modeline "800x600"   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 800x600: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 800x600
>Modeline "800x600"   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 800x600: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 640x480
>Modeline "640x480"   31.50  640 656 720 840  480 481 484 500 -hsync -vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 640x480: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 640x480
>Modeline "640x480"   31.50  640 664 704 832  480 489 491 520 -hsync -vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 640x480: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 640x480
>Modeline "640x480"   30.24  640 704 768 864  480 483 486 525 -hsync -vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 640x480: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 640x480
>Modeline "640x480"   25.20  640 656 752 800  480 490 492 525 -hsync -vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 640x480: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 720x400
>Modeline "720x400"   28.32  720 738 846 900  400 412 414 449 -hsync +vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 720x400: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1280x1024
>Modeline "1280x1024"  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1280x1024: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1024x768
>Modeline "1024x768"   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1024x768: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1024x768
>Modeline "1024x768"   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1024x768: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1024x768
>Modeline "1024x768"   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1024x768: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 832x624
>Modeline "832x624"   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 832x624: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 800x600
>Modeline "800x600"   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 800x600: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 800x600
>Modeline "800x600"   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 800x600: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1280x1024
>Modeline "1280x1024"  109.00  1280 1361 1496 1712  1024 1027 1034 1063 -hsync +vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1280x1024: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1152x864
>Modeline "1152x864"  104.75  1152 1227 1349 1546  864 867 871 905 -hsync +vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1152x864: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_1/digital : 1280x1024
>Modeline "1280x1024"  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1280x1024: Mode OK
>(II) RADEONHD(0): rhdRROutputDetect: Output DVI-I_1/analog
>(II) RADEONHD(0): FUNCTION: RHDHPDCheck
>(II) RADEONHD(0): RHDHPDCheck returned: 10101 mask: 1
>(II) RADEONHD(0): FUNCTION: RHDBIOSScratchDACSense
>(II) RADEONHD(0): Sensing DACB on Output AtomOutputDACB
>(II) RADEONHD(0): FUNCTION: AtomDACLoadDetection
>(II) RADEONHD(0): Calling DAC_LoadDetection
>(II) RADEONHD(0):  Pspace[01]: 0x00010010
>(II) RADEONHD(0):  Pspace[02]: 0x00000000
>(II) RADEONHD(0):  Pspace[03]: 0x87d8c874
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ff4) = 221f00
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7158) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7100) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7150) = 1010101
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(715c) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7100) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7104) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7104,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7100) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7100,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7128) = 70000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7128,70000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7158) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7158,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7140) = 1e6
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7140,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7158) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7158,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(715c) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(715c,70000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ff4) = 221f00
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ff4,221f02)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7150) = 1010101
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7150,1010100)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7150) = 1010100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7150,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7140) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7140,1e6)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(715c) = 70000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(715c,70100)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7160) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ff4) = 221f02
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ff4,221f00)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7158) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7158,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7100) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7100,0)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7150,1010101)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(715c) = 70100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(715c,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(1724) = 10002
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(1724,10002)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): DAC_LoadDetection Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchDACSenseResults
>(II) RADEONHD(0): BIOSScratch_0: 0x10002
>(II) RADEONHD(0): rhdAtomBIOSScratchDACSenseResults: RHD_SENSED_NONE
>(II) RADEONHD(0): rhdRROutputDetect: Output TV_7PIN_DIN
>(II) RADEONHD(0): rhdRROutputDetect: Output DVI-I_2/digital
>(II) RADEONHD(0): FUNCTION: RHDHPDCheck
>(II) RADEONHD(0): RHDHPDCheck returned: 10101 mask: 100
>(II) RADEONHD(0): FUNCTION: RHDBIOSScratchDACSense
>(II) RADEONHD(0): Sensing DACA on Output AtomOutputDACA
>(II) RADEONHD(0): FUNCTION: AtomDACLoadDetection
>(II) RADEONHD(0): Calling DAC_LoadDetection
>(II) RADEONHD(0):  Pspace[01]: 0x00000001
>(II) RADEONHD(0):  Pspace[02]: 0xfefefefe
>(II) RADEONHD(0):  Pspace[03]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ef4) = 221f02
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7058) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7000) = 1
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7050) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(705c) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7000) = 1
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7028) = 70000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7028,70000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7058) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7058,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7040) = 1e6
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7040,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7058) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7058,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(705c) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(705c,70000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ef4) = 221f02
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ef4,221f02)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7050) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7050,0)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7050) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7050,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7040) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7040,1e6)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(705c) = 70000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(705c,70100)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7060) = f
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ef4) = 221f02
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ef4,221f02)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7058) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7058,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7000) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7000,1)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7050,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(705c) = 70100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(705c,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(1724) = 10002
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(1724,10000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(1724) = 10000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(1724,10002)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): DAC_LoadDetection Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchDACSenseResults
>(II) RADEONHD(0): BIOSScratch_0: 0x10002
>(II) RADEONHD(0): rhdAtomBIOSScratchDACSenseResults sensed RHD_SENSED_VGA
>(II) RADEONHD(0): AtomOutputDACA: Sensed Output: none
>(II) RADEONHD(0): rhdRROutputDetect: Output DVI-I_2/analog
>(II) RADEONHD(0): FUNCTION: RHDHPDCheck
>(II) RADEONHD(0): RHDHPDCheck returned: 10101 mask: 100
>(II) RADEONHD(0): FUNCTION: RHDBIOSScratchDACSense
>(II) RADEONHD(0): Sensing DACA on Output AtomOutputDACA
>(II) RADEONHD(0): FUNCTION: AtomDACLoadDetection
>(II) RADEONHD(0): Calling DAC_LoadDetection
>(II) RADEONHD(0):  Pspace[01]: 0x00000001
>(II) RADEONHD(0):  Pspace[02]: 0x00000000
>(II) RADEONHD(0):  Pspace[03]: 0x87da45ad
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ef4) = 221f02
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7058) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7000) = 1
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7050) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(705c) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7000) = 1
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7028) = 70000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7028,70000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7058) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7058,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7040) = 1e6
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7040,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7058) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7058,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(705c) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(705c,70000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ef4) = 221f02
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ef4,221f02)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7050) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7050,0)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7050) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7050,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7040) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7040,1e6)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(705c) = 70000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(705c,70100)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7060) = f
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ef4) = 221f02
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ef4,221f02)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7058) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7058,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7000) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7000,1)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7050,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(705c) = 70100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(705c,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(1724) = 10002
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(1724,10000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(1724) = 10000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(1724,10002)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): DAC_LoadDetection Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchDACSenseResults
>(II) RADEONHD(0): BIOSScratch_0: 0x10002
>(II) RADEONHD(0): rhdAtomBIOSScratchDACSenseResults sensed RHD_SENSED_VGA
>(II) RADEONHD(0): AtomOutputDACA: Sensed Output: VGA
>(II) RADEONHD(0): rhdRROutputGetModes: Output DVI-I_2/analog
>(II) RADEONHD(0): FUNCTION: RHDMonitorInit
>(II) RADEONHD(0): I2C device "RHD I2C line 3:E-EDID segment register" registered at address 0x60.
>(II) RADEONHD(0): I2C device "RHD I2C line 3:ddc2" registered at address 0xA0.
>(II) RADEONHD(0): FUNCTION: rhdRV620WriteRead
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CSetupStatus
>(II) RADEONHD(0): FUNCTION: rhdRV620Transaction
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x2 0
>(II) RADEONHD(0): SW_STATUS: 0x2 1
>(II) RADEONHD(0): SW_STATUS: 0x2 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x3 7
>(II) RADEONHD(0): SW_STATUS: 0x10 8
>(II) RADEONHD(0): FUNCTION: rhdRV620Transaction
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x2 0
>(II) RADEONHD(0): SW_STATUS: 0x2 1
>(II) RADEONHD(0): SW_STATUS: 0x2 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x3 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x3 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x3 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x3 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x3 32
>(II) RADEONHD(0): SW_STATUS: 0x3 33
>(II) RADEONHD(0): SW_STATUS: 0x3 34
>(II) RADEONHD(0): SW_STATUS: 0x3 35
>(II) RADEONHD(0): SW_STATUS: 0x18 36
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x4 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x4 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x3 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x18 32
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x4 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x4 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x4 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x18 32
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x4 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x3 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x3 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x18 32
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x3 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x3 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x3 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x3 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x18 32
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x3 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x3 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x3 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x18 32
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x3 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x3 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x3 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x18 32
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x4 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x3 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x3 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x18 32
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x3 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x3 11
>(II) RADEONHD(0): SW_STATUS: 0x4 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x3 15
>(II) RADEONHD(0): SW_STATUS: 0x4 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x3 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x3 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x3 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x4 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x3 32
>(II) RADEONHD(0): SW_STATUS: 0x3 33
>(II) RADEONHD(0): SW_STATUS: 0x18 34
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x3 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x3 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x3 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x3 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x3 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x3 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x4 32
>(II) RADEONHD(0): SW_STATUS: 0x18 33
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x3 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x3 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x3 19
>(II) RADEONHD(0): SW_STATUS: 0x4 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x3 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x3 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x3 32
>(II) RADEONHD(0): SW_STATUS: 0x4 33
>(II) RADEONHD(0): SW_STATUS: 0x18 34
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x3 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x3 11
>(II) RADEONHD(0): SW_STATUS: 0x4 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x3 15
>(II) RADEONHD(0): SW_STATUS: 0x4 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x3 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x3 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x3 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x3 32
>(II) RADEONHD(0): SW_STATUS: 0x18 33
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x4 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x4 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x4 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x18 32
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x3 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x3 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x3 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x18 32
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x4 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x3 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x3 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x18 32
>(II) RADEONHD(0): FUNCTION: rhdRV620I2CStatus
>(II) RADEONHD(0): SW_STATUS: 0x3 0
>(II) RADEONHD(0): SW_STATUS: 0x3 1
>(II) RADEONHD(0): SW_STATUS: 0x3 2
>(II) RADEONHD(0): SW_STATUS: 0x4 3
>(II) RADEONHD(0): SW_STATUS: 0x3 4
>(II) RADEONHD(0): SW_STATUS: 0x3 5
>(II) RADEONHD(0): SW_STATUS: 0x3 6
>(II) RADEONHD(0): SW_STATUS: 0x4 7
>(II) RADEONHD(0): SW_STATUS: 0x3 8
>(II) RADEONHD(0): SW_STATUS: 0x3 9
>(II) RADEONHD(0): SW_STATUS: 0x3 10
>(II) RADEONHD(0): SW_STATUS: 0x4 11
>(II) RADEONHD(0): SW_STATUS: 0x3 12
>(II) RADEONHD(0): SW_STATUS: 0x3 13
>(II) RADEONHD(0): SW_STATUS: 0x3 14
>(II) RADEONHD(0): SW_STATUS: 0x4 15
>(II) RADEONHD(0): SW_STATUS: 0x3 16
>(II) RADEONHD(0): SW_STATUS: 0x3 17
>(II) RADEONHD(0): SW_STATUS: 0x3 18
>(II) RADEONHD(0): SW_STATUS: 0x3 19
>(II) RADEONHD(0): SW_STATUS: 0x3 20
>(II) RADEONHD(0): SW_STATUS: 0x3 21
>(II) RADEONHD(0): SW_STATUS: 0x3 22
>(II) RADEONHD(0): SW_STATUS: 0x3 23
>(II) RADEONHD(0): SW_STATUS: 0x3 24
>(II) RADEONHD(0): SW_STATUS: 0x3 25
>(II) RADEONHD(0): SW_STATUS: 0x3 26
>(II) RADEONHD(0): SW_STATUS: 0x4 27
>(II) RADEONHD(0): SW_STATUS: 0x3 28
>(II) RADEONHD(0): SW_STATUS: 0x3 29
>(II) RADEONHD(0): SW_STATUS: 0x3 30
>(II) RADEONHD(0): SW_STATUS: 0x3 31
>(II) RADEONHD(0): SW_STATUS: 0x10 32
>(II) RADEONHD(0): EDID data for IMR-986A
>(II) RADEONHD(0): Manufacturer: IMR  Model: 986a  Serial#: 0
>(II) RADEONHD(0): Year: 1999  Week: 24
>(II) RADEONHD(0): EDID Version: 1.1
>(II) RADEONHD(0): Analog Display Input,  Input Voltage Level: 0.700/0.300 V
>(II) RADEONHD(0): Sync:  Separate  Composite
>(II) RADEONHD(0): Max Image Size [cm]: horiz.: 36  vert.: 27
>(II) RADEONHD(0): Gamma: 2.00
>(II) RADEONHD(0): DPMS capabilities: StandBy Suspend Off; RGB/Color Display
>(II) RADEONHD(0): redX: 0.632 redY: 0.330   greenX: 0.273 greenY: 0.605
>(II) RADEONHD(0): blueX: 0.142 blueY: 0.063   whiteX: 0.281 whiteY: 0.311
>(II) RADEONHD(0): Supported VESA Video Modes:
>(II) RADEONHD(0): 720x400@70Hz
>(II) RADEONHD(0): 640x480@60Hz
>(II) RADEONHD(0): 832x624@75Hz
>(II) RADEONHD(0): 1280x1024@75Hz
>(II) RADEONHD(0): Manufacturer's mask: 0
>(II) RADEONHD(0): Supported Future Video Modes:
>(II) RADEONHD(0): #0: hsize: 640  vsize 480  refresh: 85  vid: 22833
>(II) RADEONHD(0): #1: hsize: 800  vsize 600  refresh: 85  vid: 22853
>(II) RADEONHD(0): #2: hsize: 1024  vsize 768  refresh: 85  vid: 22881
>(II) RADEONHD(0): #3: hsize: 1600  vsize 1200  refresh: 75  vid: 20393
>(II) RADEONHD(0): #4: hsize: 1280  vsize 960  refresh: 85  vid: 22913
>(II) RADEONHD(0): #5: hsize: 1152  vsize 864  refresh: 75  vid: 20337
>(II) RADEONHD(0): #6: hsize: 1024  vsize 768  refresh: 100  vid: 26721
>(II) RADEONHD(0): Supported additional Video Mode:
>(II) RADEONHD(0): clock: 55.0 MHz   Image Size:  360 x 270 mm
>(II) RADEONHD(0): h_active: 640  h_sync: 672  h_sync_end 768 h_blank_end 864 h_border: 0
>(II) RADEONHD(0): v_active: 480  v_sync: 488  v_sync_end 494 v_blanking: 536 v_border: 0
>(II) RADEONHD(0): Supported additional Video Mode:
>(II) RADEONHD(0): clock: 157.0 MHz   Image Size:  360 x 270 mm
>(II) RADEONHD(0): h_active: 1280  h_sync: 1344  h_sync_end 1504 h_blank_end 1728 h_border: 0
>(II) RADEONHD(0): v_active: 1024  v_sync: 1025  v_sync_end 1028 v_blanking: 1072 v_border: 0
>(II) RADEONHD(0): Ranges: V min: 45 V max: 150 Hz, H min: 28 H max: 96 kHz,
>(WW) RADEONHD(0): Unknown vendor-specific block 0
>(II) RADEONHD(0): EDID (in hex):
>(II) RADEONHD(0): 	00ffffffffffff0025b26a9800000000
>(II) RADEONHD(0): 	180901010c241b64e8e052a154469b24
>(II) RADEONHD(0): 	10484fa02100315945596159a94f8159
>(II) RADEONHD(0): 	714f616801017c1580e020e038102060
>(II) RADEONHD(0): 	8600680e11000018543d00c051003040
>(II) RADEONHD(0): 	40a01300680e1100001e000000fd002d
>(II) RADEONHD(0): 	961c60ff000a20202020202000000000
>(II) RADEONHD(0): 	00000000000000000000000000000013
>(II) RADEONHD(0): FUNCTION: RHDRRMonitorInit
>(II) RADEONHD(0): rhdRROutputGetModes: Adding Output Modes:
>Modeline "640x480"   25.20  640 656 752 800  480 490 492 525 -hsync -vsync
>Modeline "720x400"   28.32  720 738 846 900  400 412 414 449 -hsync +vsync
>Modeline "1280x1024"  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync
>Modeline "832x624"   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync
>Modeline "640x480"   35.50  640 670 735 830  480 483 487 507 -hsync +vsync
>Modeline "800x600"   56.75  800 846 929 1058  600 603 607 633 -hsync +vsync
>Modeline "1024x768"   94.50  1024 1091 1200 1376  768 771 775 809 -hsync +vsync
>Modeline "1600x1200"  205.50  1600 1720 1893 2186  1200 1203 1207 1255 -hsync +vsync
>Modeline "1280x960"  149.25  1280 1372 1510 1740  960 963 967 1011 -hsync +vsync
>Modeline "1152x864"  104.75  1152 1227 1349 1546  864 867 871 905 -hsync +vsync
>Modeline "1024x768"  113.00  1024 1096 1206 1388  768 771 775 816 -hsync +vsync
>Modeline "640x480"   55.00  640 672 768 864  480 488 494 536 -hsync -vsync
>Modeline "1280x1024"  157.00  1280 1344 1504 1728  1024 1025 1028 1072 +hsync +vsync
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_2/analog : 640x480
>Modeline "640x480"   25.20  640 656 752 800  480 490 492 525 -hsync -vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 640x480: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_2/analog : 720x400
>Modeline "720x400"   28.32  720 738 846 900  400 412 414 449 -hsync +vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 720x400: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_2/analog : 1280x1024
>Modeline "1280x1024"  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1280x1024: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_2/analog : 832x624
>Modeline "832x624"   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 832x624: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_2/analog : 640x480
>Modeline "640x480"   35.50  640 670 735 830  480 483 487 507 -hsync +vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 640x480: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_2/analog : 800x600
>Modeline "800x600"   56.75  800 846 929 1058  600 603 607 633 -hsync +vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 800x600: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_2/analog : 1024x768
>Modeline "1024x768"   94.50  1024 1091 1200 1376  768 771 775 809 -hsync +vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1024x768: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_2/analog : 1280x960
>Modeline "1280x960"  149.25  1280 1372 1510 1740  960 963 967 1011 -hsync +vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1280x960: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_2/analog : 1152x864
>Modeline "1152x864"  104.75  1152 1227 1349 1546  864 867 871 905 -hsync +vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1152x864: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_2/analog : 1024x768
>Modeline "1024x768"  113.00  1024 1096 1206 1388  768 771 775 816 -hsync +vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1024x768: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_2/analog : 640x480
>Modeline "640x480"   55.00  640 672 768 864  480 488 494 536 -hsync -vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 640x480: Mode OK
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: Output DVI-I_2/analog : 1280x1024
>Modeline "1280x1024"  157.00  1280 1344 1504 1728  1024 1025 1028 1072 +hsync +vsync
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): rhdRROutputModeValid: 1280x1024: Mode OK
>(II) RADEONHD(0): Output DVI-I_1/digital connected
>(II) RADEONHD(0): Output DVI-I_1/analog disconnected
>(II) RADEONHD(0): Output TV_7PIN_DIN disconnected
>(II) RADEONHD(0): Output DVI-I_2/digital disconnected
>(II) RADEONHD(0): Output DVI-I_2/analog connected
>(II) RADEONHD(0): Using user preference for initial modes
>(II) RADEONHD(0): Output DVI-I_1/digital using initial mode 1280x1024
>(II) RADEONHD(0): Output DVI-I_2/analog using initial mode 1280x1024
>(II) RADEONHD(0): RandR 1.2 support enabled
>(==) RADEONHD(0): RGB weight 888
>(==) RADEONHD(0): Default visual is TrueColor
>(==) RADEONHD(0): Using gamma correction (1.0, 1.0, 1.0)
>(II) RADEONHD(0): FUNCTION: RHDGetVirtualFromConfig
>(II) RADEONHD(0): FUNCTION: DxFBValid: ATOM CRTC 1
>(II) RADEONHD(0): FUNCTION: DxFBValid: ATOM CRTC 2
>(II) RADEONHD(0): Using 2560x1024 Framebuffer with 2560 pitch
>(II) RADEONHD(0): FB: Allocated ScanoutBuffer at offset 0x00008000 (size = 0x00A00000)
>(**) RADEONHD(0): Display dimensions: (380, 300) mm
>(**) RADEONHD(0): DPI set to (171, 86)
>(II) Loading sub module "fb"
>(II) LoadModule: "fb"
>(II) Loading /usr/lib64/xorg/modules//libfb.so
>(II) Module fb: vendor="X.Org Foundation"
>	compiled for 1.5.99.901, module version = 1.0.0
>	ABI class: X.Org ANSI C Emulation, version 0.4
>(II) Loading sub module "ramdac"
>(II) LoadModule: "ramdac"
>(II) Module "ramdac" already built-in
>(II) RADEONHD(0): FUNCTION: RHDShadowPreInit
>(II) Loading sub module "shadow"
>(II) LoadModule: "shadow"
>(II) Loading /usr/lib64/xorg/modules//libshadow.so
>(II) Module shadow: vendor="X.Org Foundation"
>	compiled for 1.5.99.901, module version = 1.1.0
>	ABI class: X.Org ANSI C Emulation, version 0.4
>(II) RADEONHD(0): Using ShadowFB
>(II) RADEONHD(0): Free FB offset 0x00A08000 (size = 0x0F5F8000)
>(II) RADEONHD(0): FUNCTION: rhdUnmapMMIO
>(--) Depth 24 pixmap format is 32 bpp
>(II) do I need RAC?  No, I don't.
>(II) resource ranges after preInit:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[5] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[6] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[7] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[8] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[9] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[10] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[11] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[12] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[13] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[14] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[15] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[16] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B]
>	[17] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B]
>	[18] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B]
>	[19] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[20] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[21] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[22] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[23] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[24] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[25] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[26] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[27] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B]
>	[28] 0	0	0x000003c0 - 0x000003df (0x20) IS[B]
>(II) RADEONHD(0): FUNCTION: RHDScreenInit
>(II) RADEONHD(0): FUNCTION: rhdMapMMIO
>(II) RADEONHD(0): Mapped IO @ 0xfdce0000 to 0x7fa38ba15000 (size 0x00010000)
>(II) RADEONHD(0): FUNCTION: rhdMapFB
>(II) RADEONHD(0): Physical FB Address: 0xE0000000 (PCI BAR: 0xE0000000)
>(II) RADEONHD(0): Mapped FB @ 0xe0000000 to 0x7fa377926000 (size 0x10000000)
>(II) RADEONHD(0): FUNCTION: rhdSave
>(II) RADEONHD(0): FUNCTION: RHDMCSave
>(II) RADEONHD(0): FUNCTION: RHDVGASave
>(II) RADEONHD(0): FUNCTION: rhdVGASaveFB
>(II) RADEONHD(0): FUNCTION: RHDMCGetFBLocation
>(II) RADEONHD(0): rhdVGASaveFB: VGA FB Offset 0x00000000 [0x00040000]
>(II) RADEONHD(0): FUNCTION: RHDOutputsSave
>(II) RADEONHD(0): FUNCTION: RHDHdmiSave
>(II) RADEONHD(0): FUNCTION: RHDHdmiSave
>(II) RADEONHD(0): FUNCTION: RHDSaveBiosScratchRegisters
>(II) RADEONHD(0): FUNCTION: RHDPLLsSave
>(II) RADEONHD(0): FUNCTION: rhdAtomPLL1Save
>(II) RADEONHD(0): Saving 1080000 kHz clock on PLL1
>(II) RADEONHD(0): FUNCTION: rhdAtomPLLSave
>(II) RADEONHD(0): FUNCTION: RHDGetDeviceOnCrtc
>(II) RADEONHD(0): RHDGetDeviceOnCrtc: BIOS_3 = 0x10000
>(II) RADEONHD(0): Saving PLL 1 on CRTC: 1 not active - device: 0x0
>(II) RADEONHD(0): FUNCTION: rhdAtomPLL2Save
>(II) RADEONHD(0): Saving 1570000 kHz clock on PLL2
>(II) RADEONHD(0): FUNCTION: rhdAtomPLLSave
>(II) RADEONHD(0): FUNCTION: RHDGetDeviceOnCrtc
>(II) RADEONHD(0): RHDGetDeviceOnCrtc: BIOS_3 = 0x10000
>(II) RADEONHD(0): Saving PLL 2 on CRTC: 2 not active - device: 0x0
>(II) RADEONHD(0): FUNCTION: RHDAudioSave
>(II) RADEONHD(0): FUNCTION: RHDLUTsSave
>(II) RADEONHD(0): FUNCTION: LUTxSave
>(II) RADEONHD(0): FUNCTION: LUTxSave
>(II) RADEONHD(0): RHDCrtcSave: ATOM CRTC 1
>(II) RADEONHD(0): FUNCTION: DxFMTSave
>(II) RADEONHD(0): FUNCTION: rhdAtomScaleSave
>(II) RADEONHD(0): RHDCrtcSave: ATOM CRTC 2
>(II) RADEONHD(0): FUNCTION: DxFMTSave
>(II) RADEONHD(0): FUNCTION: rhdAtomScaleSave
>(II) RADEONHD(0): FUNCTION: rhdSaveCursor
>(II) RADEONHD(0): FUNCTION: saveCursor
>(II) RADEONHD(0): FUNCTION: saveCursor
>(II) RADEONHD(0): FUNCTION: RHDShadowScreenInit
>(II) RADEONHD(0): FUNCTION: RHDVGADisable
>(II) RADEONHD(0): FUNCTION: rhdAtomCrtcPower
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomEnableCrtc
>(II) RADEONHD(0): Calling EnableCRTC
>(II) RADEONHD(0):  Pspace[01]: 0x02470000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6080) = 10101
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[0]: MMIO(0x6080) = 0x10101
>(II) RADEONHD(0): CailWriteATIRegister(6080,10100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6080) = 100
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): EnableCRTC Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomEnableCrtcMemReq
>(II) RADEONHD(0): Calling EnableCRTCMemReq
>(II) RADEONHD(0):  Pspace[01]: 0x02470000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6080) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6080,1000100)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): EnableCRTCMemReq Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomCrtcPower
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomEnableCrtc
>(II) RADEONHD(0): Calling EnableCRTC
>(II) RADEONHD(0):  Pspace[01]: 0x02470001
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6880) = 10101
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[0]: MMIO(0x6880) = 0x10101
>(II) RADEONHD(0): CailWriteATIRegister(6880,10100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6880) = 100
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): EnableCRTC Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomEnableCrtcMemReq
>(II) RADEONHD(0): Calling EnableCRTCMemReq
>(II) RADEONHD(0):  Pspace[01]: 0x02470001
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6880) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6880,1000100)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): EnableCRTCMemReq Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: RHDMCIdleWait
>(II) RADEONHD(0): FUNCTION: RHDMCSetupFBLocation
>(II) RADEONHD(0): Setting MC from 0x00000000 to 0xE0000000 [Size 0x1F000000]
>(WW) RADEONHD(0): RHDCSInit: No CS for R600 and up yet.
>(II) RADEONHD(0): FUNCTION: RHDShadowSetup
>(==) RADEONHD(0): Backing store disabled
>(==) RADEONHD(0): Silken mouse enabled
>(II) RADEONHD(0): FUNCTION: RHDRandrScreenInit
>(II) RADEONHD(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>(II) RADEONHD(0): FUNCTION: rhdRROutputCreateResources
>(II) RADEONHD(0): FUNCTION: atomTMDSPropertyControl
>(II) RADEONHD(0): FUNCTION: atomTMDSPropertyControl
>(II) RADEONHD(0): FUNCTION: atomTMDSPropertyControl
>(II) RADEONHD(0): FUNCTION: rhdRROutputCreateResources
>(II) RADEONHD(0): FUNCTION: atomTMDSPropertyControl
>(II) RADEONHD(0): FUNCTION: atomTMDSPropertyControl
>(II) RADEONHD(0): FUNCTION: atomTMDSPropertyControl
>(II) RADEONHD(0): FUNCTION: rhdRROutputCreateResources
>(II) RADEONHD(0): FUNCTION: atomTMDSPropertyControl
>(II) RADEONHD(0): FUNCTION: atomTMDSPropertyControl
>(II) RADEONHD(0): FUNCTION: atomTMDSPropertyControl
>(II) RADEONHD(0): FUNCTION: rhdRROutputCreateResources
>(II) RADEONHD(0): FUNCTION: atomTMDSPropertyControl
>(II) RADEONHD(0): FUNCTION: atomTMDSPropertyControl
>(II) RADEONHD(0): FUNCTION: atomTMDSPropertyControl
>(II) RADEONHD(0): FUNCTION: rhdRROutputCreateResources
>(II) RADEONHD(0): FUNCTION: atomTMDSPropertyControl
>(II) RADEONHD(0): FUNCTION: atomTMDSPropertyControl
>(II) RADEONHD(0): FUNCTION: atomTMDSPropertyControl
>(II) RADEONHD(0): State at POST-ScreenInit:
>   RRCrtc #0 [rhd ATOM CRTC 1]: active 1 [0]  mode unnamed (0x0) +1280+0
>   RRCrtc #1 [rhd ATOM CRTC 2]: active 1 [0]  mode unnamed (0x0) +0+0
>   RROut  DVI-I_1/digital [Out AtomOutputUniphyA Conn DVI-I 1]  Crtc ATOM CRTC 1 [null]  [inactive]  connected
>   RROut  DVI-I_1/analog [Out AtomOutputDACB Conn DVI-I 1]  Crtc null [null]  [inactive]  disconnected
>   RROut  TV_7PIN_DIN [Out AtomOutputDACB Conn TV 7PIN_DIN]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/digital [Out AtomOutputKldskpLvtma Conn DVI-I 2]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/analog [Out AtomOutputDACA Conn DVI-I 2]  Crtc ATOM CRTC 2 [null]  [inactive]  connected
>(II) RADEONHD(0): FUNCTION: RHDPrepareMode
>(II) RADEONHD(0): FUNCTION: rhdAtomCrtcBlank
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomBlankCRTC
>(II) RADEONHD(0): Calling BlankCRTC
>(II) RADEONHD(0):  Pspace[01]: 0x00000100
>(II) RADEONHD(0):  Pspace[02]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(60ec) = 100
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(60ec) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[1]: MMIO(0x60ec) = 0x0100
>(II) RADEONHD(0): CailWriteATIRegister(60ec,10000)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[2]: MMIO(0x6098) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6098,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6084) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[3]: MMIO(0x6084) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6084,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6084) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6084,100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6080) = 1000100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(60ec,100)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): BlankCRTC Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomCrtcBlank
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomBlankCRTC
>(II) RADEONHD(0): Calling BlankCRTC
>(II) RADEONHD(0):  Pspace[01]: 0x00000101
>(II) RADEONHD(0):  Pspace[02]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(68ec) = 100
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(68ec) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[1]: MMIO(0x68ec) = 0x0100
>(II) RADEONHD(0): CailWriteATIRegister(68ec,10000)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[2]: MMIO(0x6898) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6898,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6884) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[3]: MMIO(0x6884) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6884,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6884) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6884,100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6880) = 1000100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(68ec,100)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): BlankCRTC Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: RHDOutputsPower
>(II) RADEONHD(0): FUNCTION: RHDRandrModeInit
>(II) RADEONHD(0): FUNCTION: rhdAtomCrtcBlank
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomBlankCRTC
>(II) RADEONHD(0): Calling BlankCRTC
>(II) RADEONHD(0):  Pspace[01]: 0x00000100
>(II) RADEONHD(0):  Pspace[02]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(60ec) = 100
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(60ec) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(60ec,10000)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6098,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6084) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6084,100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6084) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6084,100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6080) = 1000100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(60ec,100)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): BlankCRTC Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomCrtcBlank
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomBlankCRTC
>(II) RADEONHD(0): Calling BlankCRTC
>(II) RADEONHD(0):  Pspace[01]: 0x00000101
>(II) RADEONHD(0):  Pspace[02]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(68ec) = 100
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(68ec) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(68ec,10000)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6898,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6884) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6884,100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6884) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6884,100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6880) = 1000100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(68ec,100)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): BlankCRTC Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: RHDPrepareMode
>(II) RADEONHD(0): FUNCTION: rhdAtomCrtcBlank
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomBlankCRTC
>(II) RADEONHD(0): Calling BlankCRTC
>(II) RADEONHD(0):  Pspace[01]: 0x00000100
>(II) RADEONHD(0):  Pspace[02]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(60ec) = 100
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(60ec) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(60ec,10000)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6098,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6084) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6084,100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6084) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6084,100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6080) = 1000100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(60ec,100)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): BlankCRTC Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomCrtcBlank
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomBlankCRTC
>(II) RADEONHD(0): Calling BlankCRTC
>(II) RADEONHD(0):  Pspace[01]: 0x00000101
>(II) RADEONHD(0):  Pspace[02]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(68ec) = 100
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(68ec) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(68ec,10000)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6898,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6884) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6884,100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6884) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6884,100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6880) = 1000100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(68ec,100)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): BlankCRTC Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: RHDOutputsPower
>(II) RADEONHD(0): rhdRROutputDpms: Output DVI-I_1/digital : Off
>(II) RADEONHD(0): FUNCTION: rhdBIOSScratchUpdateBIOSScratchForOutput
>(II) RADEONHD(0): FUNCTION: rhdBIOSScratchSetDeviceForOutput
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateOnState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateAttachedState
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputPower
>(II) RADEONHD(0): FUNCTION: RHDConnectorEnableHDMI
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdSetEncoderTransmitterConfig
>(II) RADEONHD(0): RHD_POWER_SHUTDOWN
>(II) RADEONHD(0): FUNCTION: RHDHdmiEnable
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): State at POST-OutputDpms:
>   RRCrtc #0 [rhd ATOM CRTC 1]: active 1 [0]  mode unnamed (0x0) +1280+0
>   RRCrtc #1 [rhd ATOM CRTC 2]: active 1 [0]  mode unnamed (0x0) +0+0
>   RROut  DVI-I_1/digital [Out AtomOutputUniphyA Conn DVI-I 1]  Crtc ATOM CRTC 1 [null]  [inactive]  connected
>   RROut  DVI-I_1/analog [Out AtomOutputDACB Conn DVI-I 1]  Crtc null [null]  [inactive]  disconnected
>   RROut  TV_7PIN_DIN [Out AtomOutputDACB Conn TV 7PIN_DIN]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/digital [Out AtomOutputKldskpLvtma Conn DVI-I 2]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/analog [Out AtomOutputDACA Conn DVI-I 2]  Crtc ATOM CRTC 2 [null]  [inactive]  connected
>(II) RADEONHD(0): rhdRROutputDpms: Output DVI-I_1/analog : Off
>(II) RADEONHD(0): FUNCTION: rhdBIOSScratchUpdateBIOSScratchForOutput
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateOnState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateAttachedState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateOnState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateAttachedState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateOnState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateAttachedState
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputPower
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdSetEncoderTransmitterConfig
>(II) RADEONHD(0): RHD_POWER_SHUTDOWN
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputControl
>(II) RADEONHD(0): Calling DAC2OutputControl
>(II) RADEONHD(0):  Pspace[01]: 0x02478700
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7120) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[0]: MMIO(0x7120) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(7120,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7100) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[1]: MMIO(0x7100) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(7100,0)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): DAC2OutputControl Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomEncoderControl
>(II) RADEONHD(0): Calling DACBEncoderControl
>(II) RADEONHD(0):  Pspace[01]: 0x00010000
>(II) RADEONHD(0):  Pspace[02]: 0x00000000
>(II) RADEONHD(0):  Pspace[03]: 0x00000002
>(II) RADEONHD(0):  Pspace[04]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(1724) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(1724) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7150) = 1010101
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[2]: MMIO(0x7150) = 0x1010101
>(II) RADEONHD(0): CailWriteATIRegister(7150,1010101)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7150) = 1010101
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7150,1010101)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7100) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7100,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7140) = 1e6
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[3]: MMIO(0x7140) = 0x01e6
>(II) RADEONHD(0): CailWriteATIRegister(7140,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(713c) = 701
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[4]: MMIO(0x713c) = 0x0701
>(II) RADEONHD(0): CailWriteATIRegister(713c,701)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): DACBEncoderControl Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): State at POST-OutputDpms:
>   RRCrtc #0 [rhd ATOM CRTC 1]: active 1 [0]  mode unnamed (0x0) +1280+0
>   RRCrtc #1 [rhd ATOM CRTC 2]: active 1 [0]  mode unnamed (0x0) +0+0
>   RROut  DVI-I_1/digital [Out AtomOutputUniphyA Conn DVI-I 1]  Crtc ATOM CRTC 1 [null]  [inactive]  connected
>   RROut  DVI-I_1/analog [Out AtomOutputDACB Conn DVI-I 1]  Crtc null [null]  [inactive]  disconnected
>   RROut  TV_7PIN_DIN [Out AtomOutputDACB Conn TV 7PIN_DIN]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/digital [Out AtomOutputKldskpLvtma Conn DVI-I 2]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/analog [Out AtomOutputDACA Conn DVI-I 2]  Crtc ATOM CRTC 2 [null]  [inactive]  connected
>(II) RADEONHD(0): rhdRROutputDpms: Output TV_7PIN_DIN : Off
>(II) RADEONHD(0): FUNCTION: rhdBIOSScratchUpdateBIOSScratchForOutput
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateOnState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateAttachedState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateOnState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateAttachedState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateOnState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateAttachedState
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputPower
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdSetEncoderTransmitterConfig
>(II) RADEONHD(0): RHD_POWER_SHUTDOWN
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputControl
>(II) RADEONHD(0): Calling DAC2OutputControl
>(II) RADEONHD(0):  Pspace[01]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7120) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7120,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7100) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7100,0)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): DAC2OutputControl Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomEncoderControl
>(II) RADEONHD(0): Calling DACBEncoderControl
>(II) RADEONHD(0):  Pspace[01]: 0x00010000
>(II) RADEONHD(0):  Pspace[02]: 0x00000000
>(II) RADEONHD(0):  Pspace[03]: 0x007cf820
>(II) RADEONHD(0):  Pspace[04]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(1724) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(1724) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7150) = 1010101
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7150,1010101)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7150) = 1010101
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7150,1010101)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7100) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7100,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7140) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7140,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(713c) = 701
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(713c,701)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): DACBEncoderControl Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): State at POST-OutputDpms:
>   RRCrtc #0 [rhd ATOM CRTC 1]: active 1 [0]  mode unnamed (0x0) +1280+0
>   RRCrtc #1 [rhd ATOM CRTC 2]: active 1 [0]  mode unnamed (0x0) +0+0
>   RROut  DVI-I_1/digital [Out AtomOutputUniphyA Conn DVI-I 1]  Crtc ATOM CRTC 1 [null]  [inactive]  connected
>   RROut  DVI-I_1/analog [Out AtomOutputDACB Conn DVI-I 1]  Crtc null [null]  [inactive]  disconnected
>   RROut  TV_7PIN_DIN [Out AtomOutputDACB Conn TV 7PIN_DIN]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/digital [Out AtomOutputKldskpLvtma Conn DVI-I 2]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/analog [Out AtomOutputDACA Conn DVI-I 2]  Crtc ATOM CRTC 2 [null]  [inactive]  connected
>(II) RADEONHD(0): rhdRROutputDpms: Output DVI-I_2/digital : Off
>(II) RADEONHD(0): FUNCTION: rhdBIOSScratchUpdateBIOSScratchForOutput
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateOnState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateAttachedState
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputPower
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdSetEncoderTransmitterConfig
>(II) RADEONHD(0): RHD_POWER_SHUTDOWN
>(II) RADEONHD(0): FUNCTION: RHDHdmiEnable
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): State at POST-OutputDpms:
>   RRCrtc #0 [rhd ATOM CRTC 1]: active 1 [0]  mode unnamed (0x0) +1280+0
>   RRCrtc #1 [rhd ATOM CRTC 2]: active 1 [0]  mode unnamed (0x0) +0+0
>   RROut  DVI-I_1/digital [Out AtomOutputUniphyA Conn DVI-I 1]  Crtc ATOM CRTC 1 [null]  [inactive]  connected
>   RROut  DVI-I_1/analog [Out AtomOutputDACB Conn DVI-I 1]  Crtc null [null]  [inactive]  disconnected
>   RROut  TV_7PIN_DIN [Out AtomOutputDACB Conn TV 7PIN_DIN]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/digital [Out AtomOutputKldskpLvtma Conn DVI-I 2]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/analog [Out AtomOutputDACA Conn DVI-I 2]  Crtc ATOM CRTC 2 [null]  [inactive]  connected
>(II) RADEONHD(0): rhdRROutputDpms: Output DVI-I_2/analog : Off
>(II) RADEONHD(0): FUNCTION: rhdBIOSScratchUpdateBIOSScratchForOutput
>(II) RADEONHD(0): FUNCTION: rhdBIOSScratchSetDeviceForOutput
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateOnState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateAttachedState
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputPower
>(II) RADEONHD(0): FUNCTION: RHDConnectorEnableHDMI
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdSetEncoderTransmitterConfig
>(II) RADEONHD(0): RHD_POWER_SHUTDOWN
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputControl
>(II) RADEONHD(0): Calling DAC1OutputControl
>(II) RADEONHD(0):  Pspace[01]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7020) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[0]: MMIO(0x7020) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(7020,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7000) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[1]: MMIO(0x7000) = 0x0001
>(II) RADEONHD(0): CailWriteATIRegister(7000,0)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): DAC1OutputControl Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomEncoderControl
>(II) RADEONHD(0): Calling DACAEncoderControl
>(II) RADEONHD(0):  Pspace[01]: 0x00010000
>(II) RADEONHD(0):  Pspace[02]: 0x00000000
>(II) RADEONHD(0):  Pspace[03]: 0x007cf820
>(II) RADEONHD(0):  Pspace[04]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(1724) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7050) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[2]: MMIO(0x7050) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(7050,1010100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7050) = 1010100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7050,1010101)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7000) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7000,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7040) = 1e6
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[3]: MMIO(0x7040) = 0x01e6
>(II) RADEONHD(0): CailWriteATIRegister(7040,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(703c) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[4]: MMIO(0x703c) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(703c,701)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): DACAEncoderControl Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): State at POST-OutputDpms:
>   RRCrtc #0 [rhd ATOM CRTC 1]: active 1 [0]  mode unnamed (0x0) +1280+0
>   RRCrtc #1 [rhd ATOM CRTC 2]: active 1 [0]  mode unnamed (0x0) +0+0
>   RROut  DVI-I_1/digital [Out AtomOutputUniphyA Conn DVI-I 1]  Crtc ATOM CRTC 1 [null]  [inactive]  connected
>   RROut  DVI-I_1/analog [Out AtomOutputDACB Conn DVI-I 1]  Crtc null [null]  [inactive]  disconnected
>   RROut  TV_7PIN_DIN [Out AtomOutputDACB Conn TV 7PIN_DIN]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/digital [Out AtomOutputKldskpLvtma Conn DVI-I 2]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/analog [Out AtomOutputDACA Conn DVI-I 2]  Crtc ATOM CRTC 2 [null]  [inactive]  connected
>(II) RADEONHD(0): rhdRRCrtcDpms: ATOM CRTC 1: Off
>(II) RADEONHD(0): FUNCTION: rhdAtomCrtcPower
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomEnableCrtc
>(II) RADEONHD(0): Calling EnableCRTC
>(II) RADEONHD(0):  Pspace[01]: 0x02470000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6080) = 1000100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6080,1000100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6080) = 1000100
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): EnableCRTC Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomEnableCrtcMemReq
>(II) RADEONHD(0): Calling EnableCRTCMemReq
>(II) RADEONHD(0):  Pspace[01]: 0x02470000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6080) = 1000100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6080,1000100)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): EnableCRTCMemReq Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): State at POST-CrtcDpms:
>   RRCrtc #0 [rhd ATOM CRTC 1]: active 1 [0]  mode unnamed (0x0) +1280+0
>   RRCrtc #1 [rhd ATOM CRTC 2]: active 1 [0]  mode unnamed (0x0) +0+0
>   RROut  DVI-I_1/digital [Out AtomOutputUniphyA Conn DVI-I 1]  Crtc ATOM CRTC 1 [null]  [inactive]  connected
>   RROut  DVI-I_1/analog [Out AtomOutputDACB Conn DVI-I 1]  Crtc null [null]  [inactive]  disconnected
>   RROut  TV_7PIN_DIN [Out AtomOutputDACB Conn TV 7PIN_DIN]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/digital [Out AtomOutputKldskpLvtma Conn DVI-I 2]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/analog [Out AtomOutputDACA Conn DVI-I 2]  Crtc ATOM CRTC 2 [null]  [inactive]  connected
>(II) RADEONHD(0): rhdRRCrtcDpms: ATOM CRTC 2: Off
>(II) RADEONHD(0): FUNCTION: rhdAtomCrtcPower
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomEnableCrtc
>(II) RADEONHD(0): Calling EnableCRTC
>(II) RADEONHD(0):  Pspace[01]: 0x02470001
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6880) = 1000100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6880,1000100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6880) = 1000100
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): EnableCRTC Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomEnableCrtcMemReq
>(II) RADEONHD(0): Calling EnableCRTCMemReq
>(II) RADEONHD(0):  Pspace[01]: 0x02470001
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6880) = 1000100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6880,1000100)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): EnableCRTCMemReq Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): State at POST-CrtcDpms:
>   RRCrtc #0 [rhd ATOM CRTC 1]: active 1 [0]  mode unnamed (0x0) +1280+0
>   RRCrtc #1 [rhd ATOM CRTC 2]: active 1 [0]  mode unnamed (0x0) +0+0
>   RROut  DVI-I_1/digital [Out AtomOutputUniphyA Conn DVI-I 1]  Crtc ATOM CRTC 1 [null]  [inactive]  connected
>   RROut  DVI-I_1/analog [Out AtomOutputDACB Conn DVI-I 1]  Crtc null [null]  [inactive]  disconnected
>   RROut  TV_7PIN_DIN [Out AtomOutputDACB Conn TV 7PIN_DIN]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/digital [Out AtomOutputKldskpLvtma Conn DVI-I 2]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/analog [Out AtomOutputDACA Conn DVI-I 2]  Crtc ATOM CRTC 2 [null]  [inactive]  connected
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeFixup
>(II) RADEONHD(0): FUNCTION: RHDAtomOutputAllocFree
>(II) RADEONHD(0): rhdRRFreeOutputs: Freeing Output: AtomOutputKldskpLvtma
>(II) RADEONHD(0): rhdRROutputModeFixup: Output DVI-I_1/digital : 1280x1024
>(II) RADEONHD(0): FUNCTION: RHDAtomOutputAllocFree
>(II) RADEONHD(0): Mapping DIG1 encoder to KLDSKP_UNIPHYA
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: DxFBValid: ATOM CRTC 1
>(II) RADEONHD(0): DxModeValid: ATOM CRTC 1
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): FUNCTION: rhdRROutputPrepare
>(II) RADEONHD(0): FUNCTION: rhdBIOSScratchUpdateBIOSScratchForOutput
>(II) RADEONHD(0): FUNCTION: rhdBIOSScratchSetDeviceForOutput
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateOnState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateAttachedState
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputPower
>(II) RADEONHD(0): FUNCTION: RHDConnectorEnableHDMI
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdSetEncoderTransmitterConfig
>(II) RADEONHD(0): RHD_POWER_RESET
>(II) RADEONHD(0): FUNCTION: rhdAtomDigTransmitterControl
>(II) RADEONHD(0): Calling UNIPHYTransmitterControl
>(II) RADEONHD(0):  Pspace[01]: 0x08010000
>(II) RADEONHD(0):  Pspace[02]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(75a0) = 210
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7fa4) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(75a0) = 210
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7708) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(75a0) = 210
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ed4) = 10f
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[0]: MMIO(0x7ed4) = 0x010f
>(II) RADEONHD(0): CailWriteATIRegister(7ed4,100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7fd4) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[1]: MMIO(0x7fd4) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(7fd4,0)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): UNIPHYTransmitterControl Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdRRCrtcPrepare
>(II) RADEONHD(0): FUNCTION: rhdAtomCrtcPower
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomEnableCrtc
>(II) RADEONHD(0): Calling EnableCRTC
>(II) RADEONHD(0):  Pspace[01]: 0x02470000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6080) = 1000100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6080,1000100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6080) = 1000100
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): EnableCRTC Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomEnableCrtcMemReq
>(II) RADEONHD(0): Calling EnableCRTCMemReq
>(II) RADEONHD(0):  Pspace[01]: 0x02470000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6080) = 1000100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6080,1000100)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): EnableCRTCMemReq Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): rhdRRCrtcModeSet: ATOM CRTC 1 : 1280x1024 at 1280/0
>(II) RADEONHD(0): On Crtc 0 Setting 60.0 Hz Mode: Modeline "1280x1024"  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync
>(II) RADEONHD(0): FUNCTION: DxFBSet: ATOM CRTC 1 (2560[2560]x1024@24bpp)  +0x8000 )
>(II) RADEONHD(0): FUNCTION: rhdAtomModeSet
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomSetCRTCTimings
>(II) RADEONHD(0): Calling SetCRTC_Timing
>(II) RADEONHD(0):  Pspace[01]: 0x05000698
>(II) RADEONHD(0):  Pspace[02]: 0x00700530
>(II) RADEONHD(0):  Pspace[03]: 0x0400042a
>(II) RADEONHD(0):  Pspace[04]: 0x00030401
>(II) RADEONHD(0):  Pspace[05]: 0x00007a00
>(II) RADEONHD(0):  Pspace[06]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6588) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[4]: MMIO(0x6588) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6588,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6588) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6588,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(658c) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[5]: MMIO(0x658c) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(658c,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(658c) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(658c,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6000) = 697
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[6]: MMIO(0x6000) = 0x0697
>(II) RADEONHD(0): CailWriteATIRegister(6000,698)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6000) = 698
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6000,697)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6008) = 700000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[7]: MMIO(0x6008) = 0x700000
>(II) RADEONHD(0): CailWriteATIRegister(6008,700000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6008) = 700000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6008,700000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6004) = 1680668
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[8]: MMIO(0x6004) = 0x1680668
>(II) RADEONHD(0): CailWriteATIRegister(6004,1680668)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6004) = 1680668
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6004,1680668)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(600c) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[9]: MMIO(0x600c) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(600c,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6020) = 429
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[10]: MMIO(0x6020) = 0x0429
>(II) RADEONHD(0): CailWriteATIRegister(6020,42a)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6020) = 42a
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6020,429)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6028) = 30000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[11]: MMIO(0x6028) = 0x30000
>(II) RADEONHD(0): CailWriteATIRegister(6028,30000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6028) = 30000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6028,30000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6024) = 290429
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[12]: MMIO(0x6024) = 0x290429
>(II) RADEONHD(0): CailWriteATIRegister(6024,290429)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6024) = 290429
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6024,290429)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(602c) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[13]: MMIO(0x602c) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(602c,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6088) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[14]: MMIO(0x6088) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6088,0)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): SetCRTC_Timing Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomScaleSet: ATOM CRTC 1 viewport: 1280x1024
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomSetCRTCOverscan
>(II) RADEONHD(0): CallingSetCRTC_OverScan
>(II) RADEONHD(0):  Pspace[01]: 0x00000000
>(II) RADEONHD(0):  Pspace[02]: 0x00000000
>(II) RADEONHD(0):  Pspace[03]: 0x0249d000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6588,0)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(658c,0)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): Set CRTC_OverScan Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomSetScaler
>(II) RADEONHD(0):  Pspace[01]: 0x02470000
>(II) RADEONHD(0): Calling EnableScaler
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6528) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[0]: MMIO(0x6528) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6528,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6d28) = 10000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[1]: MMIO(0x6d28) = 0x10000
>(II) RADEONHD(0): CailWriteATIRegister(6d28,10000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(65cc) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[2]: MMIO(0x65cc) = 0x0100
>(II) RADEONHD(0): CailWriteATIRegister(65cc,10100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(65d8) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[3]: MMIO(0x65d8) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(65d8,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(659c) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[4]: MMIO(0x659c) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(659c,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(659c) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(659c,2)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6590) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[5]: MMIO(0x6590) = 0x0001
>(II) RADEONHD(0): CailWriteATIRegister(6590,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6594) = 101
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[6]: MMIO(0x6594) = 0x0101
>(II) RADEONHD(0): CailWriteATIRegister(6594,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(65a4) = 10001
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[7]: MMIO(0x65a4) = 0x10001
>(II) RADEONHD(0): CailWriteATIRegister(65a4,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(65cc) = 10101
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(65cc,101)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): EnableScaler Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: RHDMCTuneAccessForDisplay
>(II) RADEONHD(0): FUNCTION: D1ViewPortStart
>(II) RADEONHD(0): RHDPLLSet: Setting PLL 1 to 108000kHz
>(II) RADEONHD(0): PLL Calculation: 108000kHz = (((100000 / 0x19) * 0xBD) / 0x7) (0kHz off)
>(II) RADEONHD(0): FUNCTION: rhdAtomPLLSet
>(II) RADEONHD(0): rhdAtomPLLSet: 108000 kHz RefDiv: 19 FeedbackDiv: bd PostDiv: 7
>(II) RADEONHD(0): rhdAtomSetPixelClock PixelClock: 10800 RefDiv: 0x19 FbDiv: 0xbd PostDiv: 0x7 PLL: 0 OutputType: 1e EncoderMode: 2 MiscInfo: 0x1
>(II) RADEONHD(0): Calling SetPixelClock
>(II) RADEONHD(0):  Pspace[01]: 0x00192a30
>(II) RADEONHD(0):  Pspace[02]: 0x000700bd
>(II) RADEONHD(0):  Pspace[03]: 0x01021e00
>(II) RADEONHD(0):  Pspace[04]: 0x00000000
>(II) RADEONHD(0):  Pspace[05]: 0x02478740
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(173c) = 20001010
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6080) = 1000100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6080,1000100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6080) = 1000100
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(538) = 1
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(538) = 1
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(384) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(384,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(38c) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(38c,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(394) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(394,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(458) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(458,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(438) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(438,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(468) = 202
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(468,202)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(470) = 2007
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(470,2007)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(450) = 6c310000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(450,6c310001)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(420) = 100
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(450) = 6c010001
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(450,6c012001)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(39c,159fc704)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(3a0,159fc704)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(3a4,159fc704)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(330) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(330,0)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(448,159ec704)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(450) = 6c012001
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(450,6c012001)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(450) = 6c012001
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(450,6c012001)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(360) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(360,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(368) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(368,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(370) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(370,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(400) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(400,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(410) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(410,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(408) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(408,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(404) = 8019
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(404,8019)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(430) = bd0030
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(430,bd0030)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(430) = bd0030
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(430,bd0030)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(43c) = 7
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(43c,7)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(470) = 2007
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(470,2007)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(408) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(408,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(450) = 6c012001
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(450,6c012001)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(450) = 6c012001
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(450,6c012000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(450) = 6c112000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(450,6c110000)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(450) = 6c310000
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(468) = 202
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(468,2)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(470) = 2007
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(470,2107)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(438) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(438,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(450) = 310000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(450,310000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(480) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(480,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(538) = 1
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6164) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6160) = 0
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): SetPixelClock Successful
>(II) RADEONHD(0): FUNCTION: D1LUTSelect
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeSet
>(II) RADEONHD(0): rhdRROutputModeSet: Output DVI-I_1/digital : 1280x1024 to ATOM CRTC 1
>(II) RADEONHD(0): FUNCTION: rhdBIOSScratchUpdateBIOSScratchForOutput
>(II) RADEONHD(0): FUNCTION: rhdBIOSScratchSetDeviceForOutput
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchSetCrtcState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateOnState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateAttachedState
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputSet
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdSetEncoderTransmitterConfig
>(II) RADEONHD(0): FUNCTION: rhdAtomDigTransmitterControl
>(II) RADEONHD(0): Calling UNIPHYTransmitterControl
>(II) RADEONHD(0):  Pspace[01]: 0x0700a8c0
>(II) RADEONHD(0):  Pspace[02]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(75a0) = 210
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7fa4) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(75a0) = 210
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7708) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(75a0) = 210
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ed8) = 10000141
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[2]: MMIO(0x7ed8) = 0x10000141
>(II) RADEONHD(0): CailWriteATIRegister(7ed8,10000141)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7fd8) = 10000142
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[3]: MMIO(0x7fd8) = 0x10000142
>(II) RADEONHD(0): CailWriteATIRegister(7fd8,10000142)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ed4) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ed4,100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7fd4) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7fd4,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ec4) = 1820010
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[4]: MMIO(0x7ec4) = 0x1820010
>(II) RADEONHD(0): CailWriteATIRegister(7ec4,1820010)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7fc4) = 1820010
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[5]: MMIO(0x7fc4) = 0x1820010
>(II) RADEONHD(0): CailWriteATIRegister(7fc4,1820010)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7f20) = 8090101
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[6]: MMIO(0x7f20) = 0x8090101
>(II) RADEONHD(0): CailWriteATIRegister(7f20,8090101)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[7]: MMIO(0x7f9c) = 0x1bf000
>(II) RADEONHD(0): CailWriteATIRegister(7f9c,1bf000)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): UNIPHYTransmitterControl Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomDigTransmitterControl
>(II) RADEONHD(0): Calling UNIPHYTransmitterControl
>(II) RADEONHD(0):  Pspace[01]: 0x0a00a8c0
>(II) RADEONHD(0):  Pspace[02]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(75a0) = 210
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7fa4) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(75a0) = 210
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7708) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(75a0) = 210
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7edc) = ff0500
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ec4) = 1820010
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7edc) = ff0500
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[8]: MMIO(0x7edc) = 0xff0500
>(II) RADEONHD(0): CailWriteATIRegister(7edc,ff0500)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[9]: MMIO(0x7ec0) = 0x3030303
>(II) RADEONHD(0): CailWriteATIRegister(7ec0,3030303)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ec4,1820010)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(450) = 310000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[10]: MMIO(0x0450) = 0x310000
>(II) RADEONHD(0): CailWriteATIRegister(450,310000)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(420) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[11]: MMIO(0x0420) = 0x0100
>(II) RADEONHD(0): CailWriteATIRegister(420,100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ed8) = 10000141
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ed8,10000141)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ed8) = 10000141
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ed8,10000141)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ed8) = 10000141
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ed8,10000141)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): UNIPHYTransmitterControl Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomSelectCrtcSource
>(II) RADEONHD(0): Calling SelectCRTCSource
>(II) RADEONHD(0):  Pspace[01]: 0x02020300
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(75a0) = 210
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(75a0) = 210
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[12]: MMIO(0x75a0) = 0x0210
>(II) RADEONHD(0): CailWriteATIRegister(75a0,210)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[13]: MMIO(0x6710) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6710,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6700) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[14]: MMIO(0x6700) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6700,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(672c) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[15]: MMIO(0x672c) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(672c,0)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): SelectCRTCSource Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: RHDHdmiSetMode
>(II) RADEONHD(0): FUNCTION: RHDAudioSetClock
>(II) RADEONHD(0): RHDAudioSetClock: using AtomOutputUniphyA as clock source with 108000 khz
>(II) RADEONHD(0): Using ACR timing N=4096 CTS=108000 for frequency 32000
>(II) RADEONHD(0): Using ACR timing N=6272 CTS=120000 for frequency 44100
>(II) RADEONHD(0): Using ACR timing N=6144 CTS=108000 for frequency 48000
>(II) RADEONHD(0): FUNCTION: rhdRRCrtcCommit
>(II) RADEONHD(0): FUNCTION: rhdAtomCrtcPower
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomEnableCrtcMemReq
>(II) RADEONHD(0): Calling EnableCRTCMemReq
>(II) RADEONHD(0):  Pspace[01]: 0x02470100
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6080) = 1000100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6080,100)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): EnableCRTCMemReq Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomEnableCrtc
>(II) RADEONHD(0): Calling EnableCRTC
>(II) RADEONHD(0):  Pspace[01]: 0x02470100
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6080) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6080,101)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): EnableCRTC Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): State at ATOM CRTC 1:
>   RRCrtc #0 [rhd ATOM CRTC 1]: active 1 [1]  mode 1280x1024 (1280x1024) +1280+0
>   RRCrtc #1 [rhd ATOM CRTC 2]: active 1 [0]  mode unnamed (0x0) +0+0
>   RROut  DVI-I_1/digital [Out AtomOutputUniphyA Conn DVI-I 1]  Crtc ATOM CRTC 1 [ATOM CRTC 1]  [inactive]  connected
>   RROut  DVI-I_1/analog [Out AtomOutputDACB Conn DVI-I 1]  Crtc null [null]  [inactive]  disconnected
>   RROut  TV_7PIN_DIN [Out AtomOutputDACB Conn TV 7PIN_DIN]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/digital [Out AtomOutputKldskpLvtma Conn DVI-I 2]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/analog [Out AtomOutputDACA Conn DVI-I 2]  Crtc ATOM CRTC 2 [null]  [inactive]  connected
>(II) RADEONHD(0): FUNCTION: rhdRROutputCommit
>(II) RADEONHD(0): FUNCTION: rhdBIOSScratchUpdateBIOSScratchForOutput
>(II) RADEONHD(0): FUNCTION: rhdBIOSScratchSetDeviceForOutput
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchSetCrtcState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateOnState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateAttachedState
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputPower
>(II) RADEONHD(0): FUNCTION: RHDConnectorEnableHDMI
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdSetEncoderTransmitterConfig
>(II) RADEONHD(0): RHD_POWER_ON
>(II) RADEONHD(0): FUNCTION: rhdAtomEncoderControl
>(II) RADEONHD(0): Calling DIG1EncoderControl
>(II) RADEONHD(0):  Pspace[01]: 0x01002a30
>(II) RADEONHD(0):  Pspace[02]: 0x00000402
>(II) RADEONHD(0):  Pspace[03]: 0x007cf820
>(II) RADEONHD(0):  Pspace[04]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(4b0) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[16]: MMIO(0x04b0) = 0x0001
>(II) RADEONHD(0): CailWriteATIRegister(4b0,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(4b8) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[17]: MMIO(0x04b8) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(4b8,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(75a0) = 210
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(75a0,210)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7fa4) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[18]: MMIO(0x7fa4) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(7fa4,0)
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(75ac) = 1f
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[19]: MMIO(0x75ac) = 0x001f
>(II) RADEONHD(0): CailWriteATIRegister(75ac,1f)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(75c0) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[20]: MMIO(0x75c0) = 0x0001
>(II) RADEONHD(0): CailWriteATIRegister(75c0,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(75a0) = 210
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(75a0,250)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(75a0) = 210
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(75a0,210)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): DIG1EncoderControl Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomDigTransmitterControl
>(II) RADEONHD(0): Calling UNIPHYTransmitterControl
>(II) RADEONHD(0):  Pspace[01]: 0x0100a8c0
>(II) RADEONHD(0):  Pspace[02]: 0x00000402
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(75a0) = 210
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7fa4) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(75a0) = 210
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7708) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(75a0) = 210
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7edc) = ff0500
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ec4) = 1820010
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7edc) = ff0500
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7edc,ff0500)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ec0,3030303)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ec4,1820010)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(450) = 310000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(450,310000)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(420) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(420,100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ed8) = 10000141
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ed8,10000141)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ed8) = 10000141
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ed8,10000141)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ed8) = 10000141
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ed8,10000141)
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ec8) = 11401401
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ed8) = 10000141
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ed8,10000140)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ec8) = 11401401
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[21]: MMIO(0x7ec8) = 0x11401401
>(II) RADEONHD(0): CailWriteATIRegister(7ec8,11401400)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ec8,11011400)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7edc) = ff0500
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7edc,ff0100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7edc) = ff0100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7edc,ff0500)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ec4) = 1820010
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ec4,1820000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ec4) = 1820000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ec4,1820010)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ec8) = 11011400
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ec8,11011401)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ed8) = 10000140
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ed8,10000141)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ed8) = 10000141
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ed8,10000141)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(4b0) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(4b0,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(75a0) = 210
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(75a0,210)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ed0) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[22]: MMIO(0x7ed0) = 0x0001
>(II) RADEONHD(0): CailWriteATIRegister(7ed0,101)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ed4) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ed4,10f)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): UNIPHYTransmitterControl Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomDigTransmitterControl
>(II) RADEONHD(0): Calling UNIPHYTransmitterControl
>(II) RADEONHD(0):  Pspace[01]: 0x0900a8c0
>(II) RADEONHD(0):  Pspace[02]: 0x0002a8c0
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(75a0) = 210
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7fa4) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(75a0) = 210
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7708) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(75a0) = 210
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ed0) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ed0,101)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ed4) = 10f
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ed4,10f)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): UNIPHYTransmitterControl Successful
>(II) RADEONHD(0): FUNCTION: RHDHdmiEnable
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): State at DVI-I_1/digital:
>   RRCrtc #0 [rhd ATOM CRTC 1]: active 1 [1]  mode 1280x1024 (1280x1024) +1280+0
>   RRCrtc #1 [rhd ATOM CRTC 2]: active 1 [0]  mode unnamed (0x0) +0+0
>   RROut  DVI-I_1/digital [Out AtomOutputUniphyA Conn DVI-I 1]  Crtc ATOM CRTC 1 [ATOM CRTC 1]  [active]  connected
>   RROut  DVI-I_1/analog [Out AtomOutputDACB Conn DVI-I 1]  Crtc null [null]  [inactive]  disconnected
>   RROut  TV_7PIN_DIN [Out AtomOutputDACB Conn TV 7PIN_DIN]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/digital [Out AtomOutputKldskpLvtma Conn DVI-I 2]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/analog [Out AtomOutputDACA Conn DVI-I 2]  Crtc ATOM CRTC 2 [null]  [inactive]  connected
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeFixup
>(II) RADEONHD(0): FUNCTION: RHDAtomOutputAllocFree
>(II) RADEONHD(0): rhdRRFreeOutputs: Freeing Output: AtomOutputKldskpLvtma
>(II) RADEONHD(0): rhdRROutputModeFixup: Output DVI-I_2/analog : 1280x1024
>(II) RADEONHD(0): FUNCTION: RHDRRModeFixup
>(II) RADEONHD(0): FUNCTION: DxFBValid: ATOM CRTC 2
>(II) RADEONHD(0): DxModeValid: ATOM CRTC 2
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputModeValid
>(II) RADEONHD(0): FUNCTION: rhdRROutputPrepare
>(II) RADEONHD(0): FUNCTION: rhdBIOSScratchUpdateBIOSScratchForOutput
>(II) RADEONHD(0): FUNCTION: rhdBIOSScratchSetDeviceForOutput
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateOnState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateAttachedState
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputPower
>(II) RADEONHD(0): FUNCTION: RHDConnectorEnableHDMI
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdSetEncoderTransmitterConfig
>(II) RADEONHD(0): RHD_POWER_RESET
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputControl
>(II) RADEONHD(0): Calling DAC1OutputControl
>(II) RADEONHD(0):  Pspace[01]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7020) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7020,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7000) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7000,0)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): DAC1OutputControl Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdRRCrtcPrepare
>(II) RADEONHD(0): FUNCTION: rhdAtomCrtcPower
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomEnableCrtc
>(II) RADEONHD(0): Calling EnableCRTC
>(II) RADEONHD(0):  Pspace[01]: 0x02470001
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6880) = 1000100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6880,1000100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6880) = 1000100
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): EnableCRTC Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomEnableCrtcMemReq
>(II) RADEONHD(0): Calling EnableCRTCMemReq
>(II) RADEONHD(0):  Pspace[01]: 0x02470001
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6880) = 1000100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6880,1000100)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): EnableCRTCMemReq Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): rhdRRCrtcModeSet: ATOM CRTC 2 : 1280x1024 at 0/0
>(II) RADEONHD(0): On Crtc 1 Setting 84.8 Hz Mode: Modeline "1280x1024"  157.00  1280 1344 1504 1728  1024 1025 1028 1072 +hsync +vsync
>(II) RADEONHD(0): FUNCTION: DxFBSet: ATOM CRTC 2 (2560[2560]x1024@24bpp)  +0x8000 )
>(II) RADEONHD(0): FUNCTION: rhdAtomModeSet
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomSetCRTCTimings
>(II) RADEONHD(0): Calling SetCRTC_Timing
>(II) RADEONHD(0):  Pspace[01]: 0x050006c0
>(II) RADEONHD(0):  Pspace[02]: 0x00a00540
>(II) RADEONHD(0):  Pspace[03]: 0x04000430
>(II) RADEONHD(0):  Pspace[04]: 0x00030401
>(II) RADEONHD(0):  Pspace[05]: 0x00010200
>(II) RADEONHD(0):  Pspace[06]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6d88) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[4]: MMIO(0x6d88) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6d88,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6d88) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6d88,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6d8c) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[5]: MMIO(0x6d8c) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6d8c,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6d8c) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6d8c,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6800) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[6]: MMIO(0x6800) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6800,6c0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6800) = 6c0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6800,6bf)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6808) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[7]: MMIO(0x6808) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6808,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6808) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6808,a00000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6804) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[8]: MMIO(0x6804) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6804,1800000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6804) = 1800000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6804,1800680)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(680c) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[9]: MMIO(0x680c) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(680c,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6820) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[10]: MMIO(0x6820) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6820,430)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6820) = 430
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6820,42f)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6828) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[11]: MMIO(0x6828) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6828,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6828) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6828,30000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6824) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[12]: MMIO(0x6824) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6824,2f0000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6824) = 2f0000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6824,2f042f)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(682c) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[13]: MMIO(0x682c) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(682c,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6888) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[14]: MMIO(0x6888) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6888,0)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): SetCRTC_Timing Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomScaleSet: ATOM CRTC 2 viewport: 1280x1024
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomSetCRTCOverscan
>(II) RADEONHD(0): CallingSetCRTC_OverScan
>(II) RADEONHD(0):  Pspace[01]: 0x00000000
>(II) RADEONHD(0):  Pspace[02]: 0x00000000
>(II) RADEONHD(0):  Pspace[03]: 0x00000001
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6d88,0)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6d8c,0)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): Set CRTC_OverScan Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomSetScaler
>(II) RADEONHD(0):  Pspace[01]: 0x00000001
>(II) RADEONHD(0): Calling EnableScaler
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6528) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6528,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6d28) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6d28,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6dcc) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[0]: MMIO(0x6dcc) = 0x0100
>(II) RADEONHD(0): CailWriteATIRegister(6dcc,10100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6dd8) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[1]: MMIO(0x6dd8) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6dd8,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6d9c) = 2
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[2]: MMIO(0x6d9c) = 0x0002
>(II) RADEONHD(0): CailWriteATIRegister(6d9c,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6d9c) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6d9c,2)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6d90) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[3]: MMIO(0x6d90) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6d90,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6d94) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[4]: MMIO(0x6d94) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6d94,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6da4) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[5]: MMIO(0x6da4) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6da4,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6dcc) = 10101
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6dcc,101)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): EnableScaler Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: RHDMCTuneAccessForDisplay
>(II) RADEONHD(0): FUNCTION: D2ViewPortStart
>(II) RADEONHD(0): RHDPLLSet: Setting PLL 2 to 157000kHz
>(II) RADEONHD(0): PLL Calculation: 157000kHz = (((100000 / 0x14) * 0x9D) / 0x5) (0kHz off)
>(II) RADEONHD(0): FUNCTION: rhdAtomPLLSet
>(II) RADEONHD(0): rhdAtomPLLSet: 157000 kHz RefDiv: 14 FeedbackDiv: 9d PostDiv: 5
>(II) RADEONHD(0): rhdAtomSetPixelClock PixelClock: 15700 RefDiv: 0x14 FbDiv: 0x9d PostDiv: 0x5 PLL: 1 OutputType: 15 EncoderMode: 0 MiscInfo: 0x5
>(II) RADEONHD(0): Calling SetPixelClock
>(II) RADEONHD(0):  Pspace[01]: 0x00143d54
>(II) RADEONHD(0):  Pspace[02]: 0x0005009d
>(II) RADEONHD(0):  Pspace[03]: 0x05001501
>(II) RADEONHD(0):  Pspace[04]: 0x00000000
>(II) RADEONHD(0):  Pspace[05]: 0x00026548
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(173c) = 20081010
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6880) = 1000100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6880,1000100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6880) = 1000100
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(538) = 1
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(538) = 1
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(450) = 310000
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(538) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(538,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(384) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(384,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(38c) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(38c,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(394) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(394,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(45c) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(45c,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(440) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(440,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(46c) = 2
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(46c,202)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(474) = 2105
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(474,2005)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(454) = 6c310000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(454,6c310001)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(424) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(454) = 6c010001
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(454,6c010003)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(454) = 6c010003
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(454,6c012003)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(39c,159fc704)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(3a0,159fc704)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(3a4,159fc704)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(338) = 10700
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(338,10000)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(44c,159ec704)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(454) = 6c012003
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(454,6c012003)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(454) = 6c012003
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(454,6c012003)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(360) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(360,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(368) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(368,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(370) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(370,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(400) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(400,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(410) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(410,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(418) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(418,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(414) = 8014
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(414,8014)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(434) = 9d0030
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(434,9d0030)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(434) = 9d0030
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(434,9d0030)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(444) = 5
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(444,5)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(474) = 2005
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(474,2005)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(418) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(418,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(454) = 6c012003
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(454,6c012001)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(454) = 6c012001
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(454,6c012000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(454) = 6c112000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(454,6c110000)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(454) = 6c310000
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(46c) = 202
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(46c,2)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(474) = 2005
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(474,2105)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(440) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(440,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(454) = 310000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(454,310000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(484) = 10000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(484,10000)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(538) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6964) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6960) = 0
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): SetPixelClock Successful
>(II) RADEONHD(0): FUNCTION: D2LUTSelect
>(II) RADEONHD(0): FUNCTION: rhdRROutputModeSet
>(II) RADEONHD(0): rhdRROutputModeSet: Output DVI-I_2/analog : 1280x1024 to ATOM CRTC 2
>(II) RADEONHD(0): FUNCTION: rhdBIOSScratchUpdateBIOSScratchForOutput
>(II) RADEONHD(0): FUNCTION: rhdBIOSScratchSetDeviceForOutput
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchSetCrtcState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateOnState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateAttachedState
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputSet
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdSetEncoderTransmitterConfig
>(II) RADEONHD(0): FUNCTION: rhdAtomSelectCrtcSource
>(II) RADEONHD(0): Calling SelectCRTCSource
>(II) RADEONHD(0):  Pspace[01]: 0x00000001
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7004) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[5]: MMIO(0x7004) = 0x0001
>(II) RADEONHD(0): CailWriteATIRegister(7004,1)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[6]: MMIO(0x6f10) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6f10,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6f00) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[7]: MMIO(0x6f00) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6f00,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6f2c) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[8]: MMIO(0x6f2c) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(6f2c,0)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): SelectCRTCSource Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdRRCrtcCommit
>(II) RADEONHD(0): FUNCTION: rhdAtomCrtcPower
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomEnableCrtcMemReq
>(II) RADEONHD(0): Calling EnableCRTCMemReq
>(II) RADEONHD(0):  Pspace[01]: 0x02470101
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6880) = 1000100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6880,100)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): EnableCRTCMemReq Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomEnableCrtc
>(II) RADEONHD(0): Calling EnableCRTC
>(II) RADEONHD(0):  Pspace[01]: 0x02470101
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6880) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6880,101)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): EnableCRTC Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): State at ATOM CRTC 2:
>   RRCrtc #0 [rhd ATOM CRTC 1]: active 1 [1]  mode 1280x1024 (1280x1024) +1280+0
>   RRCrtc #1 [rhd ATOM CRTC 2]: active 1 [1]  mode 1280x1024 (1280x1024) +0+0
>   RROut  DVI-I_1/digital [Out AtomOutputUniphyA Conn DVI-I 1]  Crtc ATOM CRTC 1 [ATOM CRTC 1]  [active]  connected
>   RROut  DVI-I_1/analog [Out AtomOutputDACB Conn DVI-I 1]  Crtc null [null]  [inactive]  disconnected
>   RROut  TV_7PIN_DIN [Out AtomOutputDACB Conn TV 7PIN_DIN]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/digital [Out AtomOutputKldskpLvtma Conn DVI-I 2]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/analog [Out AtomOutputDACA Conn DVI-I 2]  Crtc ATOM CRTC 2 [ATOM CRTC 2]  [inactive]  connected
>(II) RADEONHD(0): FUNCTION: rhdRROutputCommit
>(II) RADEONHD(0): FUNCTION: rhdBIOSScratchUpdateBIOSScratchForOutput
>(II) RADEONHD(0): FUNCTION: rhdBIOSScratchSetDeviceForOutput
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchSetCrtcState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateOnState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateAttachedState
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputPower
>(II) RADEONHD(0): FUNCTION: RHDConnectorEnableHDMI
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdSetEncoderTransmitterConfig
>(II) RADEONHD(0): RHD_POWER_ON
>(II) RADEONHD(0): FUNCTION: rhdAtomEncoderControl
>(II) RADEONHD(0): Calling DACAEncoderControl
>(II) RADEONHD(0):  Pspace[01]: 0x01013d54
>(II) RADEONHD(0):  Pspace[02]: 0x00000000
>(II) RADEONHD(0):  Pspace[03]: 0x007cf820
>(II) RADEONHD(0):  Pspace[04]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(1724) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ef4) = 221f02
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[9]: MMIO(0x7ef4) = 0x221f02
>(II) RADEONHD(0): CailWriteATIRegister(7ef4,221f02)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7058) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): atomSaveRegisters[10]: MMIO(0x7058) = 0x0000
>(II) RADEONHD(0): CailWriteATIRegister(7058,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7000) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7000,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ef4) = 221f02
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7ef4) = 221f02
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7ef4,221f02)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(703c) = 701
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(703c,701)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7050) = 1010101
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7050,1010100)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7050,0)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7040) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7040,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(703c) = 701
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(703c,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7020) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7020,0)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): DACAEncoderControl Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputControl
>(II) RADEONHD(0): Calling DAC1OutputControl
>(II) RADEONHD(0):  Pspace[01]: 0x0248f801
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7020) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7020,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7000) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7000,1)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): DAC1OutputControl Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): State at DVI-I_2/analog:
>   RRCrtc #0 [rhd ATOM CRTC 1]: active 1 [1]  mode 1280x1024 (1280x1024) +1280+0
>   RRCrtc #1 [rhd ATOM CRTC 2]: active 1 [1]  mode 1280x1024 (1280x1024) +0+0
>   RROut  DVI-I_1/digital [Out AtomOutputUniphyA Conn DVI-I 1]  Crtc ATOM CRTC 1 [ATOM CRTC 1]  [active]  connected
>   RROut  DVI-I_1/analog [Out AtomOutputDACB Conn DVI-I 1]  Crtc null [null]  [inactive]  disconnected
>   RROut  TV_7PIN_DIN [Out AtomOutputDACB Conn TV 7PIN_DIN]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/digital [Out AtomOutputKldskpLvtma Conn DVI-I 2]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/analog [Out AtomOutputDACA Conn DVI-I 2]  Crtc ATOM CRTC 2 [ATOM CRTC 2]  [active]  connected
>(II) RADEONHD(0): rhdRROutputDpms: Output DVI-I_1/analog : Off
>(II) RADEONHD(0): FUNCTION: rhdBIOSScratchUpdateBIOSScratchForOutput
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateOnState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateAttachedState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateOnState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateAttachedState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateOnState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateAttachedState
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputPower
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdSetEncoderTransmitterConfig
>(II) RADEONHD(0): RHD_POWER_SHUTDOWN
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputControl
>(II) RADEONHD(0): Calling DAC2OutputControl
>(II) RADEONHD(0):  Pspace[01]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7120) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7120,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7100) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7100,0)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): DAC2OutputControl Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomEncoderControl
>(II) RADEONHD(0): Calling DACBEncoderControl
>(II) RADEONHD(0):  Pspace[01]: 0x00010000
>(II) RADEONHD(0):  Pspace[02]: 0x00000000
>(II) RADEONHD(0):  Pspace[03]: 0x007cf820
>(II) RADEONHD(0):  Pspace[04]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(1724) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(1724) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7150) = 1010101
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7150,1010101)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7150) = 1010101
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7150,1010101)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7100) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7100,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7140) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7140,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(713c) = 701
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(713c,701)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): DACBEncoderControl Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): State at POST-OutputDpms:
>   RRCrtc #0 [rhd ATOM CRTC 1]: active 1 [1]  mode 1280x1024 (1280x1024) +1280+0
>   RRCrtc #1 [rhd ATOM CRTC 2]: active 1 [1]  mode 1280x1024 (1280x1024) +0+0
>   RROut  DVI-I_1/digital [Out AtomOutputUniphyA Conn DVI-I 1]  Crtc ATOM CRTC 1 [ATOM CRTC 1]  [active]  connected
>   RROut  DVI-I_1/analog [Out AtomOutputDACB Conn DVI-I 1]  Crtc null [null]  [inactive]  disconnected
>   RROut  TV_7PIN_DIN [Out AtomOutputDACB Conn TV 7PIN_DIN]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/digital [Out AtomOutputKldskpLvtma Conn DVI-I 2]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/analog [Out AtomOutputDACA Conn DVI-I 2]  Crtc ATOM CRTC 2 [ATOM CRTC 2]  [active]  connected
>(II) RADEONHD(0): rhdRROutputDpms: Output TV_7PIN_DIN : Off
>(II) RADEONHD(0): FUNCTION: rhdBIOSScratchUpdateBIOSScratchForOutput
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateOnState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateAttachedState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateOnState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateAttachedState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateOnState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateAttachedState
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputPower
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdSetEncoderTransmitterConfig
>(II) RADEONHD(0): RHD_POWER_SHUTDOWN
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputControl
>(II) RADEONHD(0): Calling DAC2OutputControl
>(II) RADEONHD(0):  Pspace[01]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7120) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7120,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7100) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7100,0)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): DAC2OutputControl Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomEncoderControl
>(II) RADEONHD(0): Calling DACBEncoderControl
>(II) RADEONHD(0):  Pspace[01]: 0x00010000
>(II) RADEONHD(0):  Pspace[02]: 0x00000000
>(II) RADEONHD(0):  Pspace[03]: 0x007cf820
>(II) RADEONHD(0):  Pspace[04]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(1724) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(1724) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7150) = 1010101
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7150,1010101)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7150) = 1010101
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7150,1010101)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7100) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7100,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(7140) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(7140,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(713c) = 701
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(713c,701)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): DACBEncoderControl Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): State at POST-OutputDpms:
>   RRCrtc #0 [rhd ATOM CRTC 1]: active 1 [1]  mode 1280x1024 (1280x1024) +1280+0
>   RRCrtc #1 [rhd ATOM CRTC 2]: active 1 [1]  mode 1280x1024 (1280x1024) +0+0
>   RROut  DVI-I_1/digital [Out AtomOutputUniphyA Conn DVI-I 1]  Crtc ATOM CRTC 1 [ATOM CRTC 1]  [active]  connected
>   RROut  DVI-I_1/analog [Out AtomOutputDACB Conn DVI-I 1]  Crtc null [null]  [inactive]  disconnected
>   RROut  TV_7PIN_DIN [Out AtomOutputDACB Conn TV 7PIN_DIN]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/digital [Out AtomOutputKldskpLvtma Conn DVI-I 2]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/analog [Out AtomOutputDACA Conn DVI-I 2]  Crtc ATOM CRTC 2 [ATOM CRTC 2]  [active]  connected
>(II) RADEONHD(0): rhdRROutputDpms: Output DVI-I_2/digital : Off
>(II) RADEONHD(0): FUNCTION: rhdBIOSScratchUpdateBIOSScratchForOutput
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateOnState
>(II) RADEONHD(0): FUNCTION: rhdAtomBIOSScratchUpdateAttachedState
>(II) RADEONHD(0): FUNCTION: rhdAtomOutputPower
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdSetEncoderTransmitterConfig
>(II) RADEONHD(0): RHD_POWER_SHUTDOWN
>(II) RADEONHD(0): FUNCTION: RHDHdmiEnable
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): State at POST-OutputDpms:
>   RRCrtc #0 [rhd ATOM CRTC 1]: active 1 [1]  mode 1280x1024 (1280x1024) +1280+0
>   RRCrtc #1 [rhd ATOM CRTC 2]: active 1 [1]  mode 1280x1024 (1280x1024) +0+0
>   RROut  DVI-I_1/digital [Out AtomOutputUniphyA Conn DVI-I 1]  Crtc ATOM CRTC 1 [ATOM CRTC 1]  [active]  connected
>   RROut  DVI-I_1/analog [Out AtomOutputDACB Conn DVI-I 1]  Crtc null [null]  [inactive]  disconnected
>   RROut  TV_7PIN_DIN [Out AtomOutputDACB Conn TV 7PIN_DIN]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/digital [Out AtomOutputKldskpLvtma Conn DVI-I 2]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/analog [Out AtomOutputDACA Conn DVI-I 2]  Crtc ATOM CRTC 2 [ATOM CRTC 2]  [active]  connected
>(II) RADEONHD(0): State at POST-ModeInit:
>   RRCrtc #0 [rhd ATOM CRTC 1]: active 1 [1]  mode 1280x1024 (1280x1024) +1280+0
>   RRCrtc #1 [rhd ATOM CRTC 2]: active 1 [1]  mode 1280x1024 (1280x1024) +0+0
>   RROut  DVI-I_1/digital [Out AtomOutputUniphyA Conn DVI-I 1]  Crtc ATOM CRTC 1 [ATOM CRTC 1]  [active]  connected
>   RROut  DVI-I_1/analog [Out AtomOutputDACB Conn DVI-I 1]  Crtc null [null]  [inactive]  disconnected
>   RROut  TV_7PIN_DIN [Out AtomOutputDACB Conn TV 7PIN_DIN]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/digital [Out AtomOutputKldskpLvtma Conn DVI-I 2]  Crtc null [null]  [inactive]  disconnected
>   RROut  DVI-I_2/analog [Out AtomOutputDACA Conn DVI-I 2]  Crtc ATOM CRTC 2 [ATOM CRTC 2]  [active]  connected
>(II) RADEONHD(0): FUNCTION: RHDAudioSetEnable
>(II) RADEONHD(0): FUNCTION: RHDAudioSetSupported
>(II) RADEONHD(0): RHDAudioSetSupported: config 0x60040 codec 0x1
>(II) RADEONHD(0): FUNCTION: RHDRRInitCursor
>(II) RADEONHD(0): DPMS enabled
>(WW) RADEONHD(0): Option "DVI-I_1/digital" is not used
>(WW) RADEONHD(0): Option "DVI-I_2/analog" is not used
>(WW) RADEONHD(0): Option "RightOf" is not used
>(--) RandR disabled
>(II) Setting vga for screen 0.
>(II) Initializing built-in extension Generic Event Extension
>(II) Initializing built-in extension SHAPE
>(II) Initializing built-in extension MIT-SHM
>(II) Initializing built-in extension XInputExtension
>(II) Initializing built-in extension XTEST
>(II) Initializing built-in extension BIG-REQUESTS
>(II) Initializing built-in extension SYNC
>(II) Initializing built-in extension XKEYBOARD
>(II) Initializing built-in extension XC-MISC
>(II) Initializing built-in extension XINERAMA
>(II) Initializing built-in extension XFIXES
>(II) Initializing built-in extension RENDER
>(II) Initializing built-in extension RANDR
>(II) Initializing built-in extension COMPOSITE
>(II) Initializing built-in extension DAMAGE
>(II) AIGLX: Screen 0 is not DRI2 capable
>(II) AIGLX: Screen 0 is not DRI capable
>(II) AIGLX: Loaded and initialized /usr/lib64/dri/swrast_dri.so
>(II) GLX: Initialized DRISWRAST GL provider for screen 0
>(II) RADEONHD(0): FUNCTION: rhdShadowCreateScreenResources
>(II) RADEONHD(0): Setting screen physical size to 720 x 270
>(II) RADEONHD(0): FUNCTION: rhdRRXF86CrtcResize
>(II) RADEONHD(0): FUNCTION: RHDSaveScreen
>(II) RADEONHD(0): FUNCTION: rhdAtomCrtcBlank
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomBlankCRTC
>(II) RADEONHD(0): Calling BlankCRTC
>(II) RADEONHD(0):  Pspace[01]: 0x00000000
>(II) RADEONHD(0):  Pspace[02]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(60ec) = 100
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(60ec) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(60ec,10000)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6098,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6084) = 101
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6084,101)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6084) = 101
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6084,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6080) = 10101
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(609c) = 2000d
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(60ec,100)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): BlankCRTC Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomCrtcBlank
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomBlankCRTC
>(II) RADEONHD(0): Calling BlankCRTC
>(II) RADEONHD(0):  Pspace[01]: 0x00000001
>(II) RADEONHD(0):  Pspace[02]: 0x00000000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(68ec) = 100
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(68ec) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(68ec,10000)
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6898,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6884) = 101
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6884,101)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6884) = 101
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6884,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6880) = 10101
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 50002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 10002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 20002
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(689c) = 2000d
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(68ec,100)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): BlankCRTC Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) config/hal: no driver specified for device /org/freedesktop/Hal/devices/platform_pcspkr_logicaldev_input
>(II) config/hal: Adding input device saa7134 IR (AverMedia M156 / Me
>(II) LoadModule: "evdev"
>(II) Loading /usr/lib64/xorg/modules/input//evdev_drv.so
>(II) Module evdev: vendor="X.Org Foundation"
>	compiled for 1.5.99.901, module version = 2.1.1
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 4.0
>(**) saa7134 IR (AverMedia M156 / Me: always reports core events
>(**) saa7134 IR (AverMedia M156 / Me: Device: "/dev/input/event3"
>(II) saa7134 IR (AverMedia M156 / Me: Found keys
>(II) saa7134 IR (AverMedia M156 / Me: Configuring as keyboard
>(II) XINPUT: Adding extended input device "saa7134 IR (AverMedia M156 / Me" (type: KEYBOARD)
>(**) Option "xkb_rules" "evdev"
>(**) saa7134 IR (AverMedia M156 / Me: xkb_rules: "evdev"
>(**) Option "xkb_model" "evdev"
>(**) saa7134 IR (AverMedia M156 / Me: xkb_model: "evdev"
>(**) Option "xkb_layout" "de"
>(**) saa7134 IR (AverMedia M156 / Me: xkb_layout: "de"
>(**) Option "xkb_variant" "nodeadkeys"
>(**) saa7134 IR (AverMedia M156 / Me: xkb_variant: "nodeadkeys"
>The XKEYBOARD keymap compiler (xkbcomp) reports:
>> Warning:          Type "ONE_LEVEL" has 1 levels, but <RALT> has 2 symbols
>>                   Ignoring extra symbols
>Errors from xkbcomp are not fatal to the X server
>(II) config/hal: Adding input device NOVATEK USB Keyboard
>(**) NOVATEK USB Keyboard: always reports core events
>(**) NOVATEK USB Keyboard: Device: "/dev/input/event7"
>(II) NOVATEK USB Keyboard: Found 16 mouse buttons
>(II) NOVATEK USB Keyboard: Found keys
>(II) NOVATEK USB Keyboard: Configuring as keyboard
>(**) NOVATEK USB Keyboard: YAxisMapping: buttons 4 and 5
>(**) NOVATEK USB Keyboard: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>(II) XINPUT: Adding extended input device "NOVATEK USB Keyboard" (type: KEYBOARD)
>(**) Option "xkb_rules" "evdev"
>(**) NOVATEK USB Keyboard: xkb_rules: "evdev"
>(**) Option "xkb_model" "evdev"
>(**) NOVATEK USB Keyboard: xkb_model: "evdev"
>(**) Option "xkb_layout" "de"
>(**) NOVATEK USB Keyboard: xkb_layout: "de"
>(**) Option "xkb_variant" "nodeadkeys"
>(**) NOVATEK USB Keyboard: xkb_variant: "nodeadkeys"
>The XKEYBOARD keymap compiler (xkbcomp) reports:
>> Warning:          Type "ONE_LEVEL" has 1 levels, but <RALT> has 2 symbols
>>                   Ignoring extra symbols
>Errors from xkbcomp are not fatal to the X server
>(II) config/hal: Adding input device NOVATEK USB Keyboard
>(**) NOVATEK USB Keyboard: always reports core events
>(**) NOVATEK USB Keyboard: Device: "/dev/input/event6"
>(II) NOVATEK USB Keyboard: Found keys
>(II) NOVATEK USB Keyboard: Configuring as keyboard
>(II) XINPUT: Adding extended input device "NOVATEK USB Keyboard" (type: KEYBOARD)
>(**) Option "xkb_rules" "evdev"
>(**) NOVATEK USB Keyboard: xkb_rules: "evdev"
>(**) Option "xkb_model" "evdev"
>(**) NOVATEK USB Keyboard: xkb_model: "evdev"
>(**) Option "xkb_layout" "de"
>(**) NOVATEK USB Keyboard: xkb_layout: "de"
>(**) Option "xkb_variant" "nodeadkeys"
>(**) NOVATEK USB Keyboard: xkb_variant: "nodeadkeys"
>The XKEYBOARD keymap compiler (xkbcomp) reports:
>> Warning:          Type "ONE_LEVEL" has 1 levels, but <RALT> has 2 symbols
>>                   Ignoring extra symbols
>Errors from xkbcomp are not fatal to the X server
>(II) config/hal: Adding input device Logitech USB-PS/2 Optical Mouse
>(**) Logitech USB-PS/2 Optical Mouse: always reports core events
>(**) Logitech USB-PS/2 Optical Mouse: Device: "/dev/input/event5"
>(II) Logitech USB-PS/2 Optical Mouse: Found 3 mouse buttons
>(II) Logitech USB-PS/2 Optical Mouse: Found x and y relative axes
>(II) Logitech USB-PS/2 Optical Mouse: Configuring as mouse
>(**) Logitech USB-PS/2 Optical Mouse: YAxisMapping: buttons 4 and 5
>(**) Logitech USB-PS/2 Optical Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>(II) XINPUT: Adding extended input device "Logitech USB-PS/2 Optical Mouse" (type: MOUSE)
>(**) Logitech USB-PS/2 Optical Mouse: (accel) keeping acceleration scheme 1
>(**) Logitech USB-PS/2 Optical Mouse: (accel) filter chain progression: 2.00
>(**) Logitech USB-PS/2 Optical Mouse: (accel) filter stage 0: 20.00 ms
>(**) Logitech USB-PS/2 Optical Mouse: (accel) set acceleration profile 0
>(II) config/hal: Adding input device USB VoIP Device
>(**) USB VoIP Device: always reports core events
>(**) USB VoIP Device: Device: "/dev/input/event4"
>(II) USB VoIP Device: Found keys
>(II) USB VoIP Device: Configuring as keyboard
>(II) XINPUT: Adding extended input device "USB VoIP Device" (type: KEYBOARD)
>(**) Option "xkb_rules" "evdev"
>(**) USB VoIP Device: xkb_rules: "evdev"
>(**) Option "xkb_model" "evdev"
>(**) USB VoIP Device: xkb_model: "evdev"
>(**) Option "xkb_layout" "de"
>(**) USB VoIP Device: xkb_layout: "de"
>(**) Option "xkb_variant" "nodeadkeys"
>(**) USB VoIP Device: xkb_variant: "nodeadkeys"
>The XKEYBOARD keymap compiler (xkbcomp) reports:
>> Warning:          Type "ONE_LEVEL" has 1 levels, but <RALT> has 2 symbols
>>                   Ignoring extra symbols
>Errors from xkbcomp are not fatal to the X server
>(II) config/hal: no driver specified for device /org/freedesktop/Hal/devices/computer_logicaldev_input_0
>(II) config/hal: no driver specified for device /org/freedesktop/Hal/devices/computer_logicaldev_input
>(II) RADEONHD(0): FUNCTION: RHDHdmiUpdateAudioSettings
>(II) RADEONHD(0): RHDHdmiUpdateAudioSettings: stoped with 1 channels, 48000 Hz sampling rate, 8 bits per sample,
>(II) RADEONHD(0): RHDHdmiUpdateAudioSettings: 0x00 IEC60958 status bits and 0x00 category code
>(II) RADEONHD(0): FUNCTION: RHDHdmiUpdateAudioSettings
>(II) RADEONHD(0): RHDHdmiUpdateAudioSettings: stoped with 1 channels, 48000 Hz sampling rate, 8 bits per sample,
>(II) RADEONHD(0): RHDHdmiUpdateAudioSettings: 0x00 IEC60958 status bits and 0x00 category code
>Warning: Cannot convert string "nil2" to type FontStruct
>Warning: Missing charsets in String to FontSet conversion
>Warning: Cannot convert string "nil2" to type FontStruct
>Warning: Cannot convert string "nil2" to type FontStruct
>
>waiting for X server to shut down xterm:  fatal IO error 11 (Resource temporarily unavailable) or KillClient on X server ":0.0"
>XIO:  fatal IO error 0 (Success) on X server ":0.0"
>      after 1266 requests (1264 known processed) with 0 events remaining.
>xterm:  fatal IO error 11 (Resource temporarily unavailable) or KillClient on X server ":0.0"
>(II) saa7134 IR (AverMedia M156 / Me: Close
>(II) UnloadModule: "evdev"
>(II) NOVATEK USB Keyboard: Close
>(II) UnloadModule: "evdev"
>(II) NOVATEK USB Keyboard: Close
>(II) UnloadModule: "evdev"
>(II) Logitech USB-PS/2 Optical Mouse: Close
>(II) UnloadModule: "evdev"
>(II) USB VoIP Device: Close
>(II) UnloadModule: "evdev"
>(II) RADEONHD(0): FUNCTION: RHDShadowCloseScreen
>(II) RADEONHD(0): FUNCTION: rhdAtomCrtcPower
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomEnableCrtc
>(II) RADEONHD(0): Calling EnableCRTC
>(II) RADEONHD(0):  Pspace[01]: 0x02470000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6080) = 10101
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6080,10100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6080) = 100
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): EnableCRTC Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomEnableCrtcMemReq
>(II) RADEONHD(0): Calling EnableCRTCMemReq
>(II) RADEONHD(0):  Pspace[01]: 0x02470000
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6080) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6080,1000100)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): EnableCRTCMemReq Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomCrtcPower
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): FUNCTION: atomRegisterSaveList
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomEnableCrtc
>(II) RADEONHD(0): Calling EnableCRTC
>(II) RADEONHD(0):  Pspace[01]: 0x02470001
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6880) = 10101
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6880,10100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6880) = 100
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): EnableCRTC Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomEnableCrtcMemReq
>(II) RADEONHD(0): Calling EnableCRTCMemReq
>(II) RADEONHD(0):  Pspace[01]: 0x02470001
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6880) = 100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6880,1000100)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): EnableCRTCMemReq Successful
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomSetRegisterListLocation
>(II) RADEONHD(0): Call to Register List Location succeeded
>(II) RADEONHD(0): FUNCTION: RHDMCIdleWait
>(II) RADEONHD(0): FUNCTION: rhdRestore
>(II) RADEONHD(0): FUNCTION: RHDMCRestore
>(II) RADEONHD(0): FUNCTION: R700MCRestore
>(II) RADEONHD(0): FUNCTION: rhdRestoreCursor
>(II) RADEONHD(0): FUNCTION: restoreCursor
>(II) RADEONHD(0): FUNCTION: restoreCursor
>(II) RADEONHD(0): FUNCTION: RHDPLLsRestore
>(II) RADEONHD(0): FUNCTION: rhdAtomPLLRestore
>(II) RADEONHD(0): Restoring PixelClock 0 with 0 kHz, (100000 * 189) / ( 7 * 25 ) on CRTC 1 device: 2477940
>(II) RADEONHD(0): rhdAtomSetPixelClock PixelClock: 0 RefDiv: 0x19 FbDiv: 0xbd PostDiv: 0x7 PLL: 0 OutputType: ab EncoderMode: 26 MiscInfo: 0x9
>(II) RADEONHD(0): Calling SetPixelClock
>(II) RADEONHD(0):  Pspace[01]: 0x00190000
>(II) RADEONHD(0):  Pspace[02]: 0x000700bd
>(II) RADEONHD(0):  Pspace[03]: 0x0926ab00
>(II) RADEONHD(0):  Pspace[04]: 0x00000000
>(II) RADEONHD(0):  Pspace[05]: 0x87daebff
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: rhdAtomExec
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(173c) = 20091010
>(II) RADEONHD(0): CAIL: CailAllocateMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6080) = 1000100
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(6080,1000100)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(6080) = 1000100
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(538) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(538) = 0
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(454) = 310000
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(538) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(538,1)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(384) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(384,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(38c) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(38c,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(394) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(394,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(458) = 0
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(458,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(438) = 1
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(438,0)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(468) = 2
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(468,202)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(470) = 2107
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(470,2007)
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(450) = 6c310000
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(450,6c310001)
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(420) = 100
>(II) RADEONHD(0): CAIL: CailDelayMicroSeconds
>(II) RADEONHD(0): CAIL: CailReadATIRegister
>(II) RADEONHD(0): CailReadATIRegister(450) = 6c010001
>(II) RADEONHD(0): CAIL: CailWriteATIRegister
>(II) RADEONHD(0): FUNCTION: atomSaveRegisters
>(II) RADEONHD(0): CailWriteATIRegister(450,6c012001)
>(II) RADEONHD(0): CAIL: CailReleaseMemory
>(II) RADEONHD(0): ParseTable said: CD_SUCCESS
>(II) RADEONHD(0): Call to AtomBIOS Exec succeeded
>(II) RADEONHD(0): SetPixelClock Successful
>(II) RADEONHD(0): FUNCTION: rhdAtomPLLRestore
>(II) RADEONHD(0): Restoring PixelClock 1 with 0 kHz, (100000 * 157) / ( 5 * 20 ) on CRTC 2 device: 0
>(II) RADEONHD(0): FUNCTION: RHDAudioRestore
>(II) RADEONHD(0): FUNCTION: RHDAudioSetEnable
>(II) RADEONHD(0): FUNCTION: RHDLUTsRestore
>(II) RADEONHD(0): FUNCTION: LUTxRestore
>(II) RADEONHD(0): FUNCTION: LUTxRestore
>(II) RADEONHD(0): FUNCTION: RHDVGARestore
>(II) RADEONHD(0): RHDCrtcRestore: ATOM CRTC 1
>(II) RADEONHD(0): FUNCTION: DxFMTRestore
>(II) RADEONHD(0): FUNCTION: rhdAtomCrtcScaleRestore
>(II) RADEONHD(0): FUNCTION: rhdAtomCrtcRestore
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomRestoreRegisters
>(II) RADEONHD(0): atomRestoreRegisters[8]: MMIO(0x6528) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[8]: MMIO(0x6d28) = 0x10000
>(II) RADEONHD(0): atomRestoreRegisters[8]: MMIO(0x65cc) = 0x0100
>(II) RADEONHD(0): atomRestoreRegisters[8]: MMIO(0x65d8) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[8]: MMIO(0x659c) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[8]: MMIO(0x6590) = 0x0001
>(II) RADEONHD(0): atomRestoreRegisters[8]: MMIO(0x6594) = 0x0101
>(II) RADEONHD(0): atomRestoreRegisters[8]: MMIO(0x65a4) = 0x10001
>(II) RADEONHD(0): FUNCTION: atomUnregisterSaveList
>(II) RADEONHD(0): Call to Restore Registers succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomCrtcRestore
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomRestoreRegisters
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x6080) = 0x10101
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x60ec) = 0x0100
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x6098) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x6084) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x6588) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x658c) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x6000) = 0x0697
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x6008) = 0x700000
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x6004) = 0x1680668
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x600c) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x6020) = 0x0429
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x6028) = 0x30000
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x6024) = 0x290429
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x602c) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x6088) = 0x0000
>(II) RADEONHD(0): FUNCTION: atomUnregisterSaveList
>(II) RADEONHD(0): Call to Restore Registers succeeded
>(II) RADEONHD(0): RHDCrtcRestore: ATOM CRTC 2
>(II) RADEONHD(0): FUNCTION: DxFMTRestore
>(II) RADEONHD(0): FUNCTION: rhdAtomCrtcScaleRestore
>(II) RADEONHD(0): FUNCTION: rhdAtomCrtcRestore
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomRestoreRegisters
>(II) RADEONHD(0): atomRestoreRegisters[6]: MMIO(0x6dcc) = 0x0100
>(II) RADEONHD(0): atomRestoreRegisters[6]: MMIO(0x6dd8) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[6]: MMIO(0x6d9c) = 0x0002
>(II) RADEONHD(0): atomRestoreRegisters[6]: MMIO(0x6d90) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[6]: MMIO(0x6d94) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[6]: MMIO(0x6da4) = 0x0000
>(II) RADEONHD(0): FUNCTION: atomUnregisterSaveList
>(II) RADEONHD(0): Call to Restore Registers succeeded
>(II) RADEONHD(0): FUNCTION: rhdAtomCrtcRestore
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomRestoreRegisters
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x6880) = 0x10101
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x68ec) = 0x0100
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x6898) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x6884) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x6d88) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x6d8c) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x6800) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x6808) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x6804) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x680c) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x6820) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x6828) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x6824) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x682c) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[15]: MMIO(0x6888) = 0x0000
>(II) RADEONHD(0): FUNCTION: atomUnregisterSaveList
>(II) RADEONHD(0): Call to Restore Registers succeeded
>(II) RADEONHD(0): FUNCTION: RHDOutputsRestore
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomRestoreRegisters
>(II) RADEONHD(0): atomRestoreRegisters[23]: MMIO(0x7ed4) = 0x010f
>(II) RADEONHD(0): atomRestoreRegisters[23]: MMIO(0x7fd4) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[23]: MMIO(0x7ed8) = 0x10000141
>(II) RADEONHD(0): atomRestoreRegisters[23]: MMIO(0x7fd8) = 0x10000142
>(II) RADEONHD(0): atomRestoreRegisters[23]: MMIO(0x7ec4) = 0x1820010
>(II) RADEONHD(0): atomRestoreRegisters[23]: MMIO(0x7fc4) = 0x1820010
>(II) RADEONHD(0): atomRestoreRegisters[23]: MMIO(0x7f20) = 0x8090101
>(II) RADEONHD(0): atomRestoreRegisters[23]: MMIO(0x7f9c) = 0x1bf000
>(II) RADEONHD(0): atomRestoreRegisters[23]: MMIO(0x7edc) = 0xff0500
>(II) RADEONHD(0): atomRestoreRegisters[23]: MMIO(0x7ec0) = 0x3030303
>(II) RADEONHD(0): atomRestoreRegisters[23]: MMIO(0x0450) = 0x310000
>(II) RADEONHD(0): atomRestoreRegisters[23]: MMIO(0x0420) = 0x0100
>(II) RADEONHD(0): atomRestoreRegisters[23]: MMIO(0x75a0) = 0x0210
>(II) RADEONHD(0): atomRestoreRegisters[23]: MMIO(0x6710) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[23]: MMIO(0x6700) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[23]: MMIO(0x672c) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[23]: MMIO(0x04b0) = 0x0001
>(II) RADEONHD(0): atomRestoreRegisters[23]: MMIO(0x04b8) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[23]: MMIO(0x7fa4) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[23]: MMIO(0x75ac) = 0x001f
>(II) RADEONHD(0): atomRestoreRegisters[23]: MMIO(0x75c0) = 0x0001
>(II) RADEONHD(0): atomRestoreRegisters[23]: MMIO(0x7ec8) = 0x11401401
>(II) RADEONHD(0): atomRestoreRegisters[23]: MMIO(0x7ed0) = 0x0001
>(II) RADEONHD(0): FUNCTION: atomUnregisterSaveList
>(II) RADEONHD(0): Call to Restore Registers succeeded
>(II) RADEONHD(0): FUNCTION: RHDHdmiRestore
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomRestoreRegisters
>(II) RADEONHD(0): atomRestoreRegisters[5]: MMIO(0x7120) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[5]: MMIO(0x7100) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[5]: MMIO(0x7150) = 0x1010101
>(II) RADEONHD(0): atomRestoreRegisters[5]: MMIO(0x7140) = 0x01e6
>(II) RADEONHD(0): atomRestoreRegisters[5]: MMIO(0x713c) = 0x0701
>(II) RADEONHD(0): FUNCTION: atomUnregisterSaveList
>(II) RADEONHD(0): Call to Restore Registers succeeded
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomRestoreRegisters
>(II) RADEONHD(0): Query for Restore Registers: failed
>(II) RADEONHD(0): FUNCTION: RHDHdmiRestore
>(II) RADEONHD(0): FUNCTION: RHDAtomBiosFunc
>(II) RADEONHD(0): FUNCTION: atomRestoreRegisters
>(II) RADEONHD(0): atomRestoreRegisters[11]: MMIO(0x7020) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[11]: MMIO(0x7000) = 0x0001
>(II) RADEONHD(0): atomRestoreRegisters[11]: MMIO(0x7050) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[11]: MMIO(0x7040) = 0x01e6
>(II) RADEONHD(0): atomRestoreRegisters[11]: MMIO(0x703c) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[11]: MMIO(0x7004) = 0x0001
>(II) RADEONHD(0): atomRestoreRegisters[11]: MMIO(0x6f10) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[11]: MMIO(0x6f00) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[11]: MMIO(0x6f2c) = 0x0000
>(II) RADEONHD(0): atomRestoreRegisters[11]: MMIO(0x7ef4) = 0x221f02
>(II) RADEONHD(0): atomRestoreRegisters[11]: MMIO(0x7058) = 0x0000
>(II) RADEONHD(0): FUNCTION: atomUnregisterSaveList
>(II) RADEONHD(0): Call to Restore Registers succeeded
>(II) RADEONHD(0): FUNCTION: RHDRestoreBiosScratchRegisters
>(II) RADEONHD(0): FUNCTION: rhdUnmapFB
>error setting MTRR (base = 0xe0000000, size = 0x10000000, type = 1) Invalid argument (22)
>(II) RADEONHD(0): FUNCTION: rhdUnmapMMIO
>
>

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Attachments on bug 19439: 21745 | 21746 | 22084 | 22085 | 22309 | 22752 | 22753 | 22754 | 22899 | 22900

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