--- radeontool-regmatch-randr12-1-TVactive	2007-08-15 17:10:07.000000000 +0200
+++ radeontool-regmatch-gatos-1	2007-08-15 17:14:23.000000000 +0200
@@ -19,9 +19,9 @@
 AUX2_SC_LEFT (1674)	0x00000000
 AUX2_SC_RIGHT (1678)	0x00000000
 AUX2_SC_TOP (167c)	0x00000000
-AUX3_SC_BOTTOM (1690)	0x00005959
-AUX3_SC_LEFT (1684)	0x00000459
-AUX3_SC_RIGHT (1688)	0x00002001
+AUX3_SC_BOTTOM (1690)	0x00006767
+AUX3_SC_LEFT (1684)	0x00000666
+AUX3_SC_RIGHT (1688)	0x00000000
 AUX3_SC_TOP (168c)	0x00000000
 AUX_WINDOW_HORZ_CNTL (02d8)	0x4a000000
 AUX_WINDOW_VERT_CNTL (02dc)	0x00000000
@@ -44,8 +44,8 @@
 CAP1_TRIG_CNTL (09c0)	0x00000000
 CAPABILITIES_ID (0f50)	0x06020001
 CAPABILITIES_PTR (0f34)	0x00000058
-CLOCK_CNTL_DATA (000c)	0x00000003
-CLOCK_CNTL_INDEX (0008)	0x00000388
+CLOCK_CNTL_DATA (000c)	0xc0006400
+CLOCK_CNTL_INDEX (0008)	0x000003a2
 CLR_CMP_CLR_3D (1a24)	0x00000000
 CLR_CMP_CLR_DST (15c8)	0x00000000
 CLR_CMP_CLR_SRC (15c4)	0x00000000
@@ -67,51 +67,51 @@
 CONSTANT_COLOR_C (1d34)	0x00000000
 CRC_CMDFIFO_ADDR (0740)	0x42010080
 CRC_CMDFIFO_DOUT (0744)	0x00004d4d
-CRTC_CRNT_FRAME (0214)	0x00063783
+CRTC_CRNT_FRAME (0214)	0x00067216
 CRTC_DEBUG (021c)	0x00000000
-CRTC_EXT_CNTL (0054)	0x00000040
-CRTC_EXT_CNTL_DPMS_BYTE (0055)	0x02000000
+CRTC_EXT_CNTL (0054)	0x00008000
+CRTC_EXT_CNTL_DPMS_BYTE (0055)	0x02000080
 CRTC_GEN_CNTL (0050)	0x03210600
-CRTC2_GEN_CNTL (03f8)	0x02200600
+CRTC2_GEN_CNTL (03f8)	0x06200600
 CRTC_GUI_TRIG_VLINE (0218)	0x00000000
-CRTC_H_SYNC_STRT_WID (0204)	0x000e0528
+CRTC_H_SYNC_STRT_WID (0204)	0x00100330
 CRTC2_H_SYNC_STRT_WID (0304)	0x008a0330
-CRTC_H_TOTAL_DISP (0200)	0x009f00d2
+CRTC_H_TOTAL_DISP (0200)	0x0063008e
 CRTC2_H_TOTAL_DISP (0300)	0x0063008e
 CRTC_OFFSET (0224)	0x00000000
 CRTC2_OFFSET (0324)	0x00000000
-CRTC_OFFSET_CNTL (0228)	0x00018000
-CRTC2_OFFSET_CNTL (0328)	0x00018000
+CRTC_OFFSET_CNTL (0228)	0x00008000
+CRTC2_OFFSET_CNTL (0328)	0x00010000
 CRTC_PITCH (022c)	0x00a000a0
 CRTC2_PITCH (032c)	0x000000a0
-CRTC_STATUS (005c)	0x00000002
-CRTC_V_SYNC_STRT_WID (020c)	0x00030400
+CRTC_STATUS (005c)	0x0000000e
+CRTC_V_SYNC_STRT_WID (020c)	0x0004029c
 CRTC2_V_SYNC_STRT_WID (030c)	0x0004025a
-CRTC_V_TOTAL_DISP (0208)	0x03ff0429
+CRTC_V_TOTAL_DISP (0208)	0x025702c1
 CRTC2_V_TOTAL_DISP (0308)	0x025702c1
-CRTC_VLINE_CRNT_VLINE (0210)	0x030203ff
-CRTC2_CRNT_FRAME (0314)	0x00097087
+CRTC_VLINE_CRNT_VLINE (0210)	0x021b03ff
+CRTC2_CRNT_FRAME (0314)	0x0009a298
 CRTC2_DEBUG (031c)	0x00000000
 CRTC2_GUI_TRIG_VLINE (0318)	0x00000000
-CRTC2_STATUS (03fc)	0x0000000e
-CRTC2_VLINE_CRNT_VLINE (0310)	0x00bd0000
+CRTC2_STATUS (03fc)	0x00000003
+CRTC2_VLINE_CRNT_VLINE (0310)	0x02740000
 CRTC8_DATA (03d5)	0x00000000
 CRTC8_IDX (03d4)	0x00000000
 CUR_CLR0 (026c)	0x00000000
 CUR_CLR1 (0270)	0x00000000
 CUR_HORZ_VERT_OFF (0268)	0x00000000
-CUR_HORZ_VERT_POSN (0264)	0x02cb03e7
-CUR_OFFSET (0260)	0x005dc000
+CUR_HORZ_VERT_POSN (0264)	0x01f801a1
+CUR_OFFSET (0260)	0x00500000
 CUR2_CLR0 (036c)	0x00000000
 CUR2_CLR1 (0370)	0x00000000
 CUR2_HORZ_VERT_OFF (0368)	0x00000000
-CUR2_HORZ_VERT_POSN (0364)	0x016a024b
-CUR2_OFFSET (0360)	0x005dc000
-DAC_CNTL (0058)	0x00008002
-DAC_CNTL2 (007c)	0x00000020
+CUR2_HORZ_VERT_POSN (0364)	0x00c90256
+CUR2_OFFSET (0360)	0x00000000
+DAC_CNTL (0058)	0x00000002
+DAC_CNTL2 (007c)	0x00000200
 DAC_EXT_CNTL (0280)	0x00000000
 DAC_MACRO_CNTL (0d04)	0x00070000
-TV_DAC_CNTL (088c)	0x00680003
+TV_DAC_CNTL (088c)	0x40680013
 DISP_OUTPUT_CNTL (0d64)	0x00000000
 DAC_CRC_SIG (02cc)	0x07ffffff
 DAC_DATA (03c9)	0x00000402
@@ -128,10 +128,10 @@
 DEVICE_ID (0f02)	0x01075961
 DISP_MISC_CNTL (0d00)	0x5b300600
 DP_BRUSH_BKGD_CLR (1478)	0x00000000
-DP_BRUSH_FRGD_CLR (147c)	0x00c7c3c0
+DP_BRUSH_FRGD_CLR (147c)	0x003a374d
 DP_CNTL (16c0)	0x00000003
 DP_CNTL_XDIR_YDIR_YMAJOR (16d0)	0x00000000
-DP_DATATYPE (16c4)	0x00030f06
+DP_DATATYPE (16c4)	0x00030f02
 DP_GUI_MASTER_CNTL (146c)	0x00000000
 DP_GUI_MASTER_CNTL_C (1c84)	0x00000000
 DP_MIX (16c8)	0x00cc0200
@@ -143,7 +143,7 @@
 DST_BRES_INC (162c)	0x00000000
 DST_BRES_LNTH (1634)	0x00000000
 DST_BRES_LNTH_SUB (1638)	0x00000000
-DST_HEIGHT (1410)	0x00000008
+DST_HEIGHT (1410)	0x00000030
 DST_HEIGHT_WIDTH (143c)	0x00000000
 DST_HEIGHT_WIDTH_8 (158c)	0x00000000
 DST_HEIGHT_WIDTH_BW (15b4)	0x00000000
@@ -151,11 +151,11 @@
 DST_LINE_START (1600)	0x00000000
 DST_LINE_END (1604)	0x00000000
 DST_LINE_PATCOUNT (1608)	0x00000001
-DST_OFFSET (1404)	0xec94a000
-DST_PITCH (1408)	0x00000200
+DST_OFFSET (1404)	0xed770000
+DST_PITCH (1408)	0x00000040
 DST_PITCH_OFFSET (142c)	0x00000000
 DST_PITCH_OFFSET_C (1c80)	0xa7e7faff
-DST_WIDTH (140c)	0x00000076
+DST_WIDTH (140c)	0x00000030
 DST_WIDTH_HEIGHT (1598)	0x00000000
 DST_WIDTH_X (1588)	0x00000000
 DST_WIDTH_X_INCY (159c)	0x00000000
@@ -177,18 +177,18 @@
 FOG_3D_TABLE_DENSITY (181c)	0x00000000
 FOG_TABLE_INDEX (1a14)	0x00000000
 FOG_TABLE_DATA (1a18)	0x00000000
-FP_CRTC_H_TOTAL_DISP (0250)	0x009f00d2
-FP_CRTC_V_TOTAL_DISP (0254)	0x03ff0429
+FP_CRTC_H_TOTAL_DISP (0250)	0x00630083
+FP_CRTC_V_TOTAL_DISP (0254)	0x02570273
 FP_CRTC2_H_TOTAL_DISP (0350)	0x00000000
 FP_CRTC2_V_TOTAL_DISP (0354)	0x00000000
 FP_GEN_CNTL (0284)	0x0a03008d
 FP2_GEN_CNTL (0288)	0x00000008
-FP_H_SYNC_STRT_WID (02c4)	0x000e0528
+FP_H_SYNC_STRT_WID (02c4)	0x00100340
 FP_H2_SYNC_STRT_WID (03c4)	0x008a0338
-FP_HORZ_STRETCH (028c)	0x009f0000
+FP_HORZ_STRETCH (028c)	0x00630000
 FP_HORZ2_STRETCH (038c)	0x00000000
-FP_V_SYNC_STRT_WID (02c8)	0x00030400
-FP_VERT_STRETCH (0290)	0x003ff000
+FP_V_SYNC_STRT_WID (02c8)	0x00040258
+FP_VERT_STRETCH (0290)	0x00257000
 FP_V2_SYNC_STRT_WID (03c8)	0x0004025a
 FP_VERT2_STRETCH (0390)	0x00000000
 FW_CNTL (0118)	0x0008bbbb
@@ -209,21 +209,21 @@
 GPIO_VGA_DDC (0060)	0x00000300
 GRPH8_DATA (03cf)	0x00000000
 GRPH8_IDX (03ce)	0x00000000
-GUI_DEBUG0 (16a0)	0xffffff00
-GUI_DEBUG1 (16a4)	0x000701d0
+GUI_DEBUG0 (16a0)	0xffffffff
+GUI_DEBUG1 (16a4)	0x002f0020
 GUI_DEBUG2 (16a8)	0x00000000
 GUI_DEBUG3 (16ac)	0x000000f0
 GUI_DEBUG4 (16b0)	0x00000000
 GUI_DEBUG5 (16b4)	0x00000000
 GUI_DEBUG6 (16b8)	0x00000000
 GUI_SCRATCH_REG0 (15e0)	0x00000000
-GUI_SCRATCH_REG1 (15e4)	0x0011d1e6
+GUI_SCRATCH_REG1 (15e4)	0x000019e3
 GUI_SCRATCH_REG2 (15e8)	0x00000000
 GUI_SCRATCH_REG3 (15ec)	0xcdcdcdcd
 GUI_SCRATCH_REG4 (15f0)	0xcdcdcdcd
 GUI_SCRATCH_REG5 (15f4)	0xcdcdcdcd
 HEADER (0f0e)	0x00080080
-HOST_DATA0 (17c0)	0x00ffffff
+HOST_DATA0 (17c0)	0xffffffff
 HOST_DATA1 (17c4)	0x00000000
 HOST_DATA2 (17c8)	0x00000000
 HOST_DATA3 (17cc)	0x00000000
@@ -248,7 +248,7 @@
 MAX_LATENCY (0f3f)	0x00000000
 MC_AGP_LOCATION (014c)	0xd87fd800
 MC_FB_LOCATION (0148)	0xefffe800
-MC_STATUS (0150)	0x01e1f82b
+MC_STATUS (0150)	0x01e1f82f
 MDGPIO_A_REG (01ac)	0x00000000
 MDGPIO_EN_REG (01b0)	0x00000000
 MDGPIO_MASK (0198)	0x00000000
@@ -259,7 +259,7 @@
 MEM_INIT_LAT_TIMER (0154)	0x775774bf
 MEM_INTF_CNTL (014c)	0xd87fd800
 MEM_SDRAM_MODE_REG (0158)	0x75320032
-MEM_STR_CNTL (0150)	0x01e1f82b
+MEM_STR_CNTL (0150)	0x01e1f82f
 MEM_VGA_RP_SEL (003c)	0x00010000
 MEM_VGA_WP_SEL (0038)	0x00010000
 MIN_GRANT (0f3e)	0x00000008
@@ -313,9 +313,9 @@
 OV0_GRAPHICS_KEY_MSK (04f0)	0xff00001e
 OV0_KEY_CNTL (04f4)	0x00000020
 OV0_TEST (04f8)	0x00000000
-PALETTE_DATA (00b4)	0x000a0a0a
-PALETTE_30_DATA (00b8)	0x02c0b02c
-PALETTE_INDEX (00b0)	0x000c000c
+PALETTE_DATA (00b4)	0x00000000
+PALETTE_30_DATA (00b8)	0x00401004
+PALETTE_INDEX (00b0)	0x00020002
 PCI_GART_PAGE (017c)	0x0abe0abe
 PIXCLKS_CNTL (002d)	0xb0000000
 PLANE_3D_MASK_C (1d44)	0xcff55f5f
@@ -334,11 +334,11 @@
 REG_BASE (0f18)	0xfbe00000
 REGPROG_INF (0f09)	0x10030000
 REVISION_ID (0f08)	0x03000001
-SC_BOTTOM (164c)	0x00000006
+SC_BOTTOM (164c)	0x0000000f
 SC_BOTTOM_RIGHT (16f0)	0x00000000
 SC_BOTTOM_RIGHT_C (1c8c)	0x2100b580
 SC_LEFT (1640)	0x00000000
-SC_RIGHT (1644)	0x00000003
+SC_RIGHT (1644)	0x0000002f
 SC_TOP (1648)	0x00000000
 SC_TOP_LEFT (16ec)	0x00000000
 SC_TOP_LEFT_C (1c88)	0x00000000
@@ -348,8 +348,8 @@
 SNAPSHOT_F_COUNT (0244)	0x00000000
 SNAPSHOT_VH_COUNTS (0240)	0x00000000
 SNAPSHOT_VIF_COUNT (024c)	0x00000000
-SRC_OFFSET (15ac)	0xec898000
-SRC_PITCH (15b0)	0x00000200
+SRC_OFFSET (15ac)	0xef204000
+SRC_PITCH (15b0)	0x00000040
 SRC_PITCH_OFFSET (1428)	0x00000000
 SRC_SC_BOTTOM (165c)	0x00000000
 SRC_SC_BOTTOM_RIGHT (16f4)	0x00000000
@@ -362,9 +362,9 @@
 SUBPIC_CNTL (0540)	0x00000000
 SUB_CLASS (0f0a)	0x40100300
 SURFACE_CNTL (0b00)	0x00000000
-SURFACE0_INFO (0b0c)	0x03010140
+SURFACE0_INFO (0b0c)	0x00010140
 SURFACE0_LOWER_BOUND (0b04)	0x00000000
-SURFACE0_UPPER_BOUND (0b08)	0x005dbfff
+SURFACE0_UPPER_BOUND (0b08)	0x004fffff
 SURFACE1_INFO (0b1c)	0x00000000
 SURFACE1_LOWER_BOUND (0b14)	0x00000000
 SURFACE1_UPPER_BOUND (0b18)	0x000007ff
@@ -402,12 +402,12 @@
 VGA_DDA_ON_OFF (02ec)	0x6332a020
 VID_BUFFER_CONTROL (0900)	0x01000010
 VIDEOMUX_CNTL (0190)	0x00050000
-VIPH_CONTROL (0c40)	0x00000000
-WAIT_UNTIL (1720)	0x000fdbf1
-RB3D_BLENDCNTL (1c20)	0x27210000
+VIPH_CONTROL (0c40)	0x003f0004
+WAIT_UNTIL (1720)	0x000fdff1
+RB3D_BLENDCNTL (1c20)	0x21210000
 RB3D_CNTL (1c3c)	0x00001801
-RB3D_COLOROFFSET (1c40)	0xec898000
-RB3D_COLORPITCH (1c48)	0x00000080
+RB3D_COLOROFFSET (1c40)	0xef1dd000
+RB3D_COLORPITCH (1c48)	0x000000b0
 RB3D_DEPTHOFFSET (1c24)	0x00000000
 RB3D_DEPTHPITCH (1c28)	0x00000000
 RB3D_PLANEMASK (1d84)	0xffffffff
@@ -426,28 +426,28 @@
 TMDS_PLL_CNTL (02a8)	0x01b40191
 TMDS_TRANSMITTER_CNTL (02a4)	0x10000081
 ISYNC_CNTL (1724)	0x00000033
-TV_MASTER_CNTL (0800)	0x80000668
+TV_MASTER_CNTL (0800)	0xc0000620
 TV_PRE_DAC_MUX_CNTL (0888)	0x0000000f
-TV_RGB_CNTL (0804)	0x007b0220
+TV_RGB_CNTL (0804)	0x007b0004
 TV_SYNC_CNTL (0808)	0x00000028
 TV_HTOTAL (080c)	0x00000477
 TV_HDISP (0810)	0x0000031f
 TV_HSTART (0818)	0x0000032c
-TV_HCOUNT (081c)	0x00000199
+TV_HCOUNT (081c)	0x00000257
 TV_VTOTAL (0820)	0x000002c1
 TV_VDISP (0824)	0x00000257
-TV_VCOUNT (0828)	0x000000ca
+TV_VCOUNT (0828)	0x00000237
 TV_FTOTAL (082c)	0x00000003
-TV_FCOUNT (0830)	0x00000000
+TV_FCOUNT (0830)	0x00000003
 TV_FRESTART (0834)	0x00000000
 TV_HRESTART (0838)	0x00000004
 TV_VRESTART (083c)	0x00000261
-TV_VSCALER_CNTL1 (084c)	0x29009096
+TV_VSCALER_CNTL1 (084c)	0x29009097
 TV_TIMING_CNTL (0850)	0x710b0515
-TV_VSCALER_CNTL2 (0854)	0x1000000f
-TV_Y_FALL_CNTL (0858)	0x80030440
-TV_Y_RISE_CNTL (085c)	0x00012bc0
-TV_Y_SAW_TOOTH_CNTL (0860)	0x10002425
+TV_VSCALER_CNTL2 (0854)	0x10000000
+TV_Y_FALL_CNTL (0858)	0x80030400
+TV_Y_RISE_CNTL (085c)	0x000007da
+TV_Y_SAW_TOOTH_CNTL (0860)	0x10002426
 TV_UPSAMP_AND_GAIN_CNTL (0864)	0x00000005
 TV_GAIN_LIMIT_SETTINGS (0868)	0x017f05ff
 TV_LINEAR_GAIN_SETTINGS (086c)	0x01000100