From f4e56bcdc65757d33eedb5a64928fd1f6391b3c5 Mon Sep 17 00:00:00 2001 From: Stuart Bennett Date: Tue, 11 Mar 2008 00:33:58 +0000 Subject: [PATCH] nouveau: move AGP reset to a better place Also, power cycle PGRAPH when resetting AGP -- it seems to fix problems encountered by p0g on nv25 --- shared-core/nouveau_mem.c | 28 ++++++++++++++++++++++++++++ shared-core/nv04_mc.c | 13 ------------- 2 files changed, 28 insertions(+), 13 deletions(-) diff --git a/shared-core/nouveau_mem.c b/shared-core/nouveau_mem.c index 80b2990..54403cf 100644 --- a/shared-core/nouveau_mem.c +++ b/shared-core/nouveau_mem.c @@ -300,6 +300,32 @@ uint64_t nouveau_mem_fb_amount(struct drm_device *dev) return 0; } +static void nouveau_mem_reset_agp(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + uint32_t saved_pci_nv_1, saved_pci_nv_19, pmc_enable; + + saved_pci_nv_1 = NV_READ(NV04_PBUS_PCI_NV_1); + saved_pci_nv_19 = NV_READ(NV04_PBUS_PCI_NV_19); + + /* clear busmaster bit */ + NV_WRITE(NV04_PBUS_PCI_NV_1, saved_pci_nv_1 & ~0x4); + /* clear SBA and AGP bits */ + NV_WRITE(NV04_PBUS_PCI_NV_19, saved_pci_nv_19 & 0xfffff0ff); + + /* power cycle pgraph, if enabled */ + pmc_enable = NV_READ(NV03_PMC_ENABLE); + if (pmc_enable & NV_PMC_ENABLE_PGRAPH) { + NV_WRITE(NV03_PMC_ENABLE, pmc_enable & ~NV_PMC_ENABLE_PGRAPH); + udelay(10); + NV_WRITE(NV03_PMC_ENABLE, pmc_enable); + } + + /* and restore (gives effect of resetting AGP) */ + NV_WRITE(NV04_PBUS_PCI_NV_19, saved_pci_nv_19); + NV_WRITE(NV04_PBUS_PCI_NV_1, saved_pci_nv_1); +} + static int nouveau_mem_init_agp(struct drm_device *dev, int ttm) { @@ -308,6 +334,8 @@ nouveau_mem_init_agp(struct drm_device *dev, int ttm) struct drm_agp_mode mode; int ret; + nouveau_mem_reset_agp(dev); + ret = drm_agp_acquire(dev); if (ret) { DRM_ERROR("Unable to acquire AGP: %d\n", ret); diff --git a/shared-core/nv04_mc.c b/shared-core/nv04_mc.c index 766f3a3..24c1f7b 100644 --- a/shared-core/nv04_mc.c +++ b/shared-core/nv04_mc.c @@ -7,25 +7,12 @@ int nv04_mc_init(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; - uint32_t saved_pci_nv_1, saved_pci_nv_19; - - saved_pci_nv_1 = NV_READ(NV04_PBUS_PCI_NV_1); - saved_pci_nv_19 = NV_READ(NV04_PBUS_PCI_NV_19); - - /* clear busmaster bit */ - NV_WRITE(NV04_PBUS_PCI_NV_1, saved_pci_nv_1 & ~(0x00000001 << 2)); - /* clear SBA and AGP bits */ - NV_WRITE(NV04_PBUS_PCI_NV_19, saved_pci_nv_19 & 0xfffff0ff); /* Power up everything, resetting each individual unit will * be done later if needed. */ NV_WRITE(NV03_PMC_ENABLE, 0xFFFFFFFF); - /* and restore (gives effect of resetting AGP) */ - NV_WRITE(NV04_PBUS_PCI_NV_19, saved_pci_nv_19); - NV_WRITE(NV04_PBUS_PCI_NV_1, saved_pci_nv_1); - return 0; } -- 1.5.3.2