--- regmatch-tv-notworking 2008-03-30 10:29:59.809496376 +0200 +++ regmatch-tv-working 2008-03-30 10:50:16.450138660 +0200 @@ -19,9 +19,9 @@ AUX2_SC_LEFT (1674) 0x00000000 AUX2_SC_RIGHT (1678) 0x00000000 AUX2_SC_TOP (167c) 0x00000000 -AUX3_SC_BOTTOM (1690) 0x00001111 -AUX3_SC_LEFT (1684) 0x00000450 -AUX3_SC_RIGHT (1688) 0x00000000 +AUX3_SC_BOTTOM (1690) 0x00002d2d +AUX3_SC_LEFT (1684) 0x0000056c +AUX3_SC_RIGHT (1688) 0x00004002 AUX3_SC_TOP (168c) 0x00000000 AUX_WINDOW_HORZ_CNTL (02d8) 0x0a000000 AUX_WINDOW_VERT_CNTL (02dc) 0x00000000 @@ -30,7 +30,7 @@ BIOS_1_SCRATCH (0014) 0x0100c000 BIOS_2_SCRATCH (0018) 0x04040400 BIOS_3_SCRATCH (001c) 0x02010000 -BIOS_4_SCRATCH (0020) 0x00000004 +BIOS_4_SCRATCH (0020) 0x00000024 BIOS_5_SCRATCH (0024) 0x01000001 BIOS_6_SCRATCH (0028) 0x40110f00 BIOS_7_SCRATCH (002c) 0x00000000 @@ -67,7 +67,7 @@ CONSTANT_COLOR_C (1d34) 0x00000000 CRC_CMDFIFO_ADDR (0740) 0x40000000 CRC_CMDFIFO_DOUT (0744) 0x00004d4d -CRTC_CRNT_FRAME (0214) 0x00023691 +CRTC_CRNT_FRAME (0214) 0x00002476 CRTC_DEBUG (021c) 0x00000000 CRTC_EXT_CNTL (0054) 0x00000040 CRTC_EXT_CNTL_DPMS_BYTE (0055) 0x02000000 @@ -84,12 +84,12 @@ CRTC2_OFFSET_CNTL (0328) 0x00010000 CRTC_PITCH (022c) 0x01a801a8 CRTC2_PITCH (032c) 0x00000000 -CRTC_STATUS (005c) 0x00000002 +CRTC_STATUS (005c) 0x0000000e CRTC_V_SYNC_STRT_WID (020c) 0x0083041a CRTC2_V_SYNC_STRT_WID (030c) 0x00000000 CRTC_V_TOTAL_DISP (0208) 0x04190429 CRTC2_V_TOTAL_DISP (0308) 0x00000000 -CRTC_VLINE_CRNT_VLINE (0210) 0x010203ff +CRTC_VLINE_CRNT_VLINE (0210) 0x036703ff CRTC2_CRNT_FRAME (0314) 0x00000000 CRTC2_DEBUG (031c) 0x00000000 CRTC2_GUI_TRIG_VLINE (0318) 0x80000000 @@ -100,14 +100,14 @@ CUR_CLR0 (026c) 0x00000000 CUR_CLR1 (0270) 0x00000000 CUR_HORZ_VERT_OFF (0268) 0x00000000 -CUR_HORZ_VERT_POSN (0264) 0x048d0304 +CUR_HORZ_VERT_POSN (0264) 0x05100316 CUR_OFFSET (0260) 0x01b54000 CUR2_CLR0 (036c) 0x00000000 CUR2_CLR1 (0370) 0x00000000 CUR2_HORZ_VERT_OFF (0368) 0x00000000 CUR2_HORZ_VERT_POSN (0364) 0x00000000 CUR2_OFFSET (0360) 0x00000000 -DAC_CNTL (0058) 0xff008002 +DAC_CNTL (0058) 0xff00a002 DAC_CNTL2 (007c) 0x00000000 DAC_EXT_CNTL (0280) 0x00000000 DAC_MACRO_CNTL (0d04) 0x00070808 @@ -128,7 +128,7 @@ DEVICE_ID (0f02) 0x01073150 DISP_MISC_CNTL (0d00) 0x5b300600 DP_BRUSH_BKGD_CLR (1478) 0x00000000 -DP_BRUSH_FRGD_CLR (147c) 0xfff5f6f7 +DP_BRUSH_FRGD_CLR (147c) 0xffc0c0c0 DP_CNTL (16c0) 0x0000000b DP_CNTL_XDIR_YDIR_YMAJOR (16d0) 0x00000000 DP_DATATYPE (16c4) 0x00030d06 @@ -143,7 +143,7 @@ DST_BRES_INC (162c) 0x00000000 DST_BRES_LNTH (1634) 0x00000000 DST_BRES_LNTH_SUB (1638) 0x00000000 -DST_HEIGHT (1410) 0x00000001 +DST_HEIGHT (1410) 0x00000012 DST_HEIGHT_WIDTH (143c) 0x00000000 DST_HEIGHT_WIDTH_8 (158c) 0x00000000 DST_HEIGHT_WIDTH_BW (15b4) 0x00000000 @@ -155,14 +155,14 @@ DST_PITCH (1408) 0x00003500 DST_PITCH_OFFSET (142c) 0x00000000 DST_PITCH_OFFSET_C (1c80) 0x00000000 -DST_WIDTH (140c) 0x00000001 +DST_WIDTH (140c) 0x00000002 DST_WIDTH_HEIGHT (1598) 0x00000000 DST_WIDTH_X (1588) 0x00000000 DST_WIDTH_X_INCY (159c) 0x00000000 -DST_X (141c) 0x00000684 +DST_X (141c) 0x000005a0 DST_X_SUB (15a4) 0x00000000 DST_X_Y (1594) 0x00000000 -DST_Y (1420) 0x000003a3 +DST_Y (1420) 0x00000406 DST_Y_SUB (15a8) 0x00000000 DST_Y_X (1438) 0x00000000 FLUSH_1 (1704) 0x00000000 @@ -209,24 +209,24 @@ GPIO_VGA_DDC (0060) 0x00000300 GRPH8_DATA (03cf) 0x00000000 GRPH8_IDX (03ce) 0x00000000 -GUI_DEBUG0 (16a0) 0xf000f000 -GUI_DEBUG1 (16a4) 0x03a31a10 -GUI_DEBUG2 (16a8) 0x000107ff +GUI_DEBUG0 (16a0) 0xff00ff00 +GUI_DEBUG1 (16a4) 0x04171680 +GUI_DEBUG2 (16a8) 0x0001ffff GUI_DEBUG3 (16ac) 0x000000f0 -GUI_DEBUG4 (16b0) 0x00000034 +GUI_DEBUG4 (16b0) 0x00000004 GUI_DEBUG5 (16b4) 0x00000000 GUI_DEBUG6 (16b8) 0x00000000 GUI_SCRATCH_REG0 (15e0) 0x00000000 -GUI_SCRATCH_REG1 (15e4) 0x0001cfa5 +GUI_SCRATCH_REG1 (15e4) 0x00001610 GUI_SCRATCH_REG2 (15e8) 0x00000000 GUI_SCRATCH_REG3 (15ec) 0xcdcdcdcd GUI_SCRATCH_REG4 (15f0) 0xcdcdcdcd GUI_SCRATCH_REG5 (15f4) 0xcdcdcdcd HEADER (0f0e) 0x00080000 -HOST_DATA0 (17c0) 0xffefefef +HOST_DATA0 (17c0) 0xffffffff HOST_DATA1 (17c4) 0xffffffff -HOST_DATA2 (17c8) 0xffefefef -HOST_DATA3 (17cc) 0xffffffff +HOST_DATA2 (17c8) 0xffffffbf +HOST_DATA3 (17cc) 0x0f4f0f00 HOST_DATA4 (17d0) 0x00000000 HOST_DATA5 (17d4) 0x00000000 HOST_DATA6 (17d8) 0x00000000 @@ -313,9 +313,9 @@ OV0_GRAPHICS_KEY_MSK (04f0) 0xff00001e OV0_KEY_CNTL (04f4) 0x00000020 OV0_TEST (04f8) 0x00000000 -PALETTE_DATA (00b4) 0x00020202 -PALETTE_30_DATA (00b8) 0x00c0300c -PALETTE_INDEX (00b0) 0x00040004 +PALETTE_DATA (00b4) 0x00000000 +PALETTE_30_DATA (00b8) 0x00401004 +PALETTE_INDEX (00b0) 0x00020002 PCI_GART_PAGE (017c) 0x0bbc0bbc PIXCLKS_CNTL (002d) 0x10000000 PLANE_3D_MASK_C (1d44) 0x00000000 @@ -334,11 +334,11 @@ REG_BASE (0f18) 0xb0100000 REGPROG_INF (0f09) 0x08030000 REVISION_ID (0f08) 0x03000000 -SC_BOTTOM (164c) 0x00000002 +SC_BOTTOM (164c) 0x0000000d SC_BOTTOM_RIGHT (16f0) 0x00000000 SC_BOTTOM_RIGHT_C (1c8c) 0x00000000 SC_LEFT (1640) 0x00000000 -SC_RIGHT (1644) 0x00000010 +SC_RIGHT (1644) 0x0000000a SC_TOP (1648) 0x00000000 SC_TOP_LEFT (16ec) 0x00000000 SC_TOP_LEFT_C (1c88) 0x00000000 @@ -348,7 +348,7 @@ SNAPSHOT_F_COUNT (0244) 0x00000000 SNAPSHOT_VH_COUNTS (0240) 0x00000000 SNAPSHOT_VIF_COUNT (024c) 0x00000000 -SRC_OFFSET (15ac) 0xce8f1000 +SRC_OFFSET (15ac) 0xcfa04000 SRC_PITCH (15b0) 0x00000040 SRC_PITCH_OFFSET (1428) 0x00000000 SRC_SC_BOTTOM (165c) 0x00000000 @@ -356,7 +356,7 @@ SRC_SC_RIGHT (1654) 0x00000000 SRC_X (1414) 0x00000000 SRC_X_Y (1590) 0x00000000 -SRC_Y (1418) 0x00000000 +SRC_Y (1418) 0x00000009 SRC_Y_X (1434) 0x00000000 STATUS (0f06) 0x00000010 SUBPIC_CNTL (0540) 0x00000000 @@ -426,7 +426,7 @@ TMDS_PLL_CNTL (02a8) 0x1fbb0116 TMDS_TRANSMITTER_CNTL (02a4) 0x10000040 ISYNC_CNTL (1724) 0x00000033 -TV_MASTER_CNTL (0800) 0x400a0653 +TV_MASTER_CNTL (0800) 0x0000060b TV_PRE_DAC_MUX_CNTL (0888) 0x00000000 TV_RGB_CNTL (0804) 0x047b0010 TV_SYNC_CNTL (0808) 0x00000028