X.Org X Server 1.4.0.90 Release Date: 5 September 2007 X Protocol Version 11, Revision 0 Build Operating System: Linux Debian (xorg-server 2:1.4.1~git20080517-1) Current Operating System: Linux vystava 2.6.25-2-amd64 #1 SMP Tue May 27 12:45:24 UTC 2008 x86_64 Build Date: 18 May 2008 12:41:06PM Before reporting problems, check http://wiki.x.org to make sure that you have the latest version. Module Loader present Markers: (--) probed, (**) from config file, (==) default setting, (++) from command line, (!!) notice, (II) informational, (WW) warning, (EE) error, (NI) not implemented, (??) unknown. (==) Log file: "/var/log/Xorg.0.log", Time: Thu May 29 09:42:21 2008 (==) Using config file: "/etc/X11/xorg.conf" (++) ServerLayout "BigLayout" (**) |-->Screen "Screen0" (0) (**) | |-->Monitor "Monitor0" (**) | |-->Device "Radeon X1650Pro" (**) |-->Input Device "No Mouse" (**) |-->Input Device "No Keyboard" (**) Option "AllowMouseOpenFail" (**) Option "BlankTime" "0" (**) Option "StandbyTime" "0" (**) Option "SuspendTime" "0" (**) Option "OffTime" "0" (==) Automatically adding devices (==) Automatically enabling devices (==) No FontPath specified. Using compiled-in default. (WW) The directory "/usr/share/fonts/X11/cyrillic" does not exist. Entry deleted from font path. (WW) The directory "/var/lib/defoma/x-ttcidfont-conf.d/dirs/TrueType" does not exist. Entry deleted from font path. (==) FontPath set to: /usr/share/fonts/X11/misc, /usr/share/fonts/X11/100dpi/:unscaled, /usr/share/fonts/X11/75dpi/:unscaled, /usr/share/fonts/X11/Type1, /usr/share/fonts/X11/100dpi, /usr/share/fonts/X11/75dpi (==) RgbPath set to "/etc/X11/rgb" (==) ModulePath set to "/usr/lib/xorg/modules" (II) Open ACPI successful (/var/run/acpid.socket) (II) Loader magic: 0x7b2140 (II) Module ABI versions: X.Org ANSI C Emulation: 0.3 X.Org Video Driver: 2.0 X.Org XInput driver : 2.0 X.Org Server Extension : 0.3 X.Org Font Renderer : 0.5 (II) Loader running on linux (II) LoadModule: "pcidata" (II) Loading /usr/lib/xorg/modules//libpcidata.so (II) Module pcidata: vendor="X.Org Foundation" compiled for 1.4.0.90, module version = 1.0.0 ABI class: X.Org Video Driver, version 2.0 (--) using VT number 1 (II) PCI: PCI scan (all values are in hex) (II) PCI: 00:00:0: chip 8086,29c0 card 1043,8276 rev 02 class 06,00,00 hdr 00 (II) PCI: 00:01:0: chip 8086,29c1 card 0000,0000 rev 02 class 06,04,00 hdr 01 (II) PCI: 00:1a:0: chip 8086,2937 card 1043,8277 rev 02 class 0c,03,00 hdr 80 (II) PCI: 00:1a:1: chip 8086,2938 card 1043,8277 rev 02 class 0c,03,00 hdr 00 (II) PCI: 00:1a:2: chip 8086,2939 card 1043,8277 rev 02 class 0c,03,00 hdr 00 (II) PCI: 00:1a:7: chip 8086,293c card 1043,8277 rev 02 class 0c,03,20 hdr 00 (II) PCI: 00:1b:0: chip 8086,293e card 1043,829f rev 02 class 04,03,00 hdr 00 (II) PCI: 00:1c:0: chip 8086,2940 card 0000,0000 rev 02 class 06,04,00 hdr 81 (II) PCI: 00:1c:4: chip 8086,2948 card 0000,0000 rev 02 class 06,04,00 hdr 81 (II) PCI: 00:1c:5: chip 8086,294a card 0000,0000 rev 02 class 06,04,00 hdr 81 (II) PCI: 00:1d:0: chip 8086,2934 card 1043,8277 rev 02 class 0c,03,00 hdr 80 (II) PCI: 00:1d:1: chip 8086,2935 card 1043,8277 rev 02 class 0c,03,00 hdr 00 (II) PCI: 00:1d:2: chip 8086,2936 card 1043,8277 rev 02 class 0c,03,00 hdr 00 (II) PCI: 00:1d:7: chip 8086,293a card 1043,8277 rev 02 class 0c,03,20 hdr 00 (II) PCI: 00:1e:0: chip 8086,244e card 0000,0000 rev 92 class 06,04,01 hdr 01 (II) PCI: 00:1f:0: chip 8086,2918 card 1043,8277 rev 02 class 06,01,00 hdr 80 (II) PCI: 00:1f:2: chip 8086,2921 card 1043,8277 rev 02 class 01,01,8f hdr 00 (II) PCI: 00:1f:3: chip 8086,2930 card 1043,8277 rev 02 class 0c,05,00 hdr 00 (II) PCI: 00:1f:5: chip 8086,2926 card 1043,8277 rev 02 class 01,01,85 hdr 00 (II) PCI: 01:00:0: chip 1002,71c1 card 174b,c880 rev 9e class 03,00,00 hdr 80 (II) PCI: 01:00:1: chip 1002,71e1 card 174b,c881 rev 9e class 03,80,00 hdr 00 (II) PCI: 02:00:0: chip 1969,1048 card 1043,8226 rev b0 class 02,00,00 hdr 00 (II) PCI: 03:00:0: chip 197b,2363 card 1043,824f rev 03 class 01,06,01 hdr 80 (II) PCI: 03:00:1: chip 197b,2363 card 1043,824f rev 03 class 01,01,85 hdr 00 (II) PCI: 05:00:0: chip 1002,5159 card 174b,0020 rev 00 class 03,00,00 hdr 00 (II) PCI: 05:03:0: chip 1106,3044 card 1043,81fe rev c0 class 0c,00,10 hdr 00 (II) PCI: End of PCI scan (II) Intel Bridge workaround enabled (II) Host-to-PCI bridge: (II) Bus 0: bridge is at (0:0:0), (0,0,5), BCTRL: 0x0008 (VGA_EN is set) (II) Bus 0 I/O range: [0] -1 0 0x00000000 - 0x0000ffff (0x10000) IX[B] (II) Bus 0 non-prefetchable memory range: [0] -1 0 0x00000000 - 0xffffffff (0x100000000) MX[B] (II) Bus 0 prefetchable memory range: [0] -1 0 0x00000000 - 0xffffffff (0x100000000) MX[B] (II) PCI-to-PCI bridge: (II) Bus 1: bridge is at (0:1:0), (0,1,1), BCTRL: 0x000a (VGA_EN is set) (II) Bus 1 I/O range: [0] -1 0 0x0000c000 - 0x0000cfff (0x1000) IX[B] (II) Bus 1 non-prefetchable memory range: [0] -1 0 0xfe800000 - 0xfe8fffff (0x100000) MX[B] (II) Bus 1 prefetchable memory range: [0] -1 0 0xd0000000 - 0xdfffffff (0x10000000) MX[B] (II) PCI-to-PCI bridge: (II) Bus 4: bridge is at (0:28:0), (0,4,4), BCTRL: 0x0002 (VGA_EN is cleared) (II) Bus 4 prefetchable memory range: [0] -1 0 0xeff00000 - 0xefffffff (0x100000) MX[B] (II) PCI-to-PCI bridge: (II) Bus 3: bridge is at (0:28:4), (0,3,3), BCTRL: 0x0002 (VGA_EN is cleared) (II) Bus 3 I/O range: [0] -1 0 0x0000d000 - 0x0000dfff (0x1000) IX[B] (II) Bus 3 non-prefetchable memory range: [0] -1 0 0xfea00000 - 0xfeafffff (0x100000) MX[B] (II) PCI-to-PCI bridge: (II) Bus 2: bridge is at (0:28:5), (0,2,2), BCTRL: 0x0002 (VGA_EN is cleared) (II) Bus 2 non-prefetchable memory range: [0] -1 0 0xfe900000 - 0xfe9fffff (0x100000) MX[B] (II) Subtractive PCI-to-PCI bridge: (II) Bus 5: bridge is at (0:30:0), (0,5,5), BCTRL: 0x0002 (VGA_EN is cleared) (II) Bus 5 I/O range: [0] -1 0 0x0000e000 - 0x0000efff (0x1000) IX[B] (II) Bus 5 non-prefetchable memory range: [0] -1 0 0xfeb00000 - 0xfebfffff (0x100000) MX[B] (II) Bus 5 prefetchable memory range: [0] -1 0 0xf0000000 - 0xf7ffffff (0x8000000) MX[B] (II) PCI-to-ISA bridge: (II) Bus -1: bridge is at (0:31:0), (0,-1,-1), BCTRL: 0x0008 (VGA_EN is set) (--) PCI:*(1:0:0) ATI Technologies Inc unknown chipset (0x71c1) rev 158, Mem @ 0xd0000000/28, 0xfe8e0000/16, I/O @ 0xc000/8, BIOS @ 0xfe8c0000/17 (--) PCI: (1:0:1) ATI Technologies Inc unknown chipset (0x71e1) rev 158, Mem @ 0xfe8f0000/16 (--) PCI: (5:0:0) ATI Technologies Inc Radeon RV100 QY [Radeon 7000/VE] rev 0, Mem @ 0xf0000000/27, 0xfebf0000/16, I/O @ 0xe000/8, BIOS @ 0xfebc0000/17 (II) Addressable bus resource ranges are [0] -1 0 0x00000000 - 0xffffffff (0x100000000) MX[B] [1] -1 0 0x00000000 - 0x0000ffff (0x10000) IX[B] (II) OS-reported resource ranges: [0] -1 0 0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B) [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [5] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] (II) Active PCI resource ranges: [0] -1 0 0xfebef800 - 0xfebeffff (0x800) MX[B] [1] -1 0 0xfeafe000 - 0xfeafffff (0x2000) MX[B] [2] -1 0 0xfe9c0000 - 0xfe9fffff (0x40000) MX[B] [3] -1 0 0xfe7ff400 - 0xfe7ff4ff (0x100) MX[B] [4] -1 0 0xfe7ff800 - 0xfe7ffbff (0x400) MX[B] [5] -1 0 0xfe7f8000 - 0xfe7fbfff (0x4000) MX[B] [6] -1 0 0xfe7ffc00 - 0xfe7fffff (0x400) MX[B] [7] -1 0 0xfe8f0000 - 0xfe8fffff (0x10000) MX[B](B) [8] -1 0 0xfe8c0000 - 0xfe8dffff (0x20000) MX[B](B) [9] -1 0 0xfe8e0000 - 0xfe8effff (0x10000) MX[B](B) [10] -1 0 0xd0000000 - 0xdfffffff (0x10000000) MX[B](B) [11] -1 0 0x0000ec00 - 0x0000ec7f (0x80) IX[B] [12] -1 0 0x0000d400 - 0x0000d40f (0x10) IX[B] [13] -1 0 0x0000d480 - 0x0000d483 (0x4) IX[B] [14] -1 0 0x0000d800 - 0x0000d807 (0x8) IX[B] [15] -1 0 0x0000d880 - 0x0000d883 (0x4) IX[B] [16] -1 0 0x0000dc00 - 0x0000dc07 (0x8) IX[B] [17] -1 0 0x0000a400 - 0x0000a40f (0x10) IX[B] [18] -1 0 0x0000a480 - 0x0000a48f (0x10) IX[B] [19] -1 0 0x0000a800 - 0x0000a803 (0x4) IX[B] [20] -1 0 0x0000a880 - 0x0000a887 (0x8) IX[B] [21] -1 0 0x0000ac00 - 0x0000ac03 (0x4) IX[B] [22] -1 0 0x0000b000 - 0x0000b007 (0x8) IX[B] [23] -1 0 0x00000400 - 0x0000041f (0x20) IX[B] [24] -1 0 0x00009400 - 0x0000940f (0x10) IX[B] [25] -1 0 0x00009480 - 0x0000948f (0x10) IX[B] [26] -1 0 0x00009800 - 0x00009803 (0x4) IX[B] [27] -1 0 0x00009880 - 0x00009887 (0x8) IX[B] [28] -1 0 0x00009c00 - 0x00009c03 (0x4) IX[B] [29] -1 0 0x0000a000 - 0x0000a007 (0x8) IX[B] [30] -1 0 0x0000b480 - 0x0000b49f (0x20) IX[B] [31] -1 0 0x0000b400 - 0x0000b41f (0x20) IX[B] [32] -1 0 0x0000b080 - 0x0000b09f (0x20) IX[B] [33] -1 0 0x0000bc00 - 0x0000bc1f (0x20) IX[B] [34] -1 0 0x0000b880 - 0x0000b89f (0x20) IX[B] [35] -1 0 0x0000b800 - 0x0000b81f (0x20) IX[B] [36] -1 0 0x0000c000 - 0x0000c0ff (0x100) IX[B](B) (II) Inactive PCI resource ranges: [0] -1 0 0xfeb00000 - 0xfeb1ffff (0x20000) MX[B](B) [1] -1 0 0xfebf0000 - 0xfebfffff (0x10000) MX[B](B) [2] -1 0 0xf0000000 - 0xf7ffffff (0x8000000) MX[B](B) [3] -1 0 0x0000e000 - 0x0000e0ff (0x100) IX[B](B) (II) Active PCI resource ranges after removing overlaps: [0] -1 0 0xfebef800 - 0xfebeffff (0x800) MX[B] [1] -1 0 0xfeafe000 - 0xfeafffff (0x2000) MX[B] [2] -1 0 0xfe9c0000 - 0xfe9fffff (0x40000) MX[B] [3] -1 0 0xfe7ff400 - 0xfe7ff4ff (0x100) MX[B] [4] -1 0 0xfe7ff800 - 0xfe7ffbff (0x400) MX[B] [5] -1 0 0xfe7f8000 - 0xfe7fbfff (0x4000) MX[B] [6] -1 0 0xfe7ffc00 - 0xfe7fffff (0x400) MX[B] [7] -1 0 0xfe8f0000 - 0xfe8fffff (0x10000) MX[B](B) [8] -1 0 0xfe8c0000 - 0xfe8dffff (0x20000) MX[B](B) [9] -1 0 0xfe8e0000 - 0xfe8effff (0x10000) MX[B](B) [10] -1 0 0xd0000000 - 0xdfffffff (0x10000000) MX[B](B) [11] -1 0 0x0000ec00 - 0x0000ec7f (0x80) IX[B] [12] -1 0 0x0000d400 - 0x0000d40f (0x10) IX[B] [13] -1 0 0x0000d480 - 0x0000d483 (0x4) IX[B] [14] -1 0 0x0000d800 - 0x0000d807 (0x8) IX[B] [15] -1 0 0x0000d880 - 0x0000d883 (0x4) IX[B] [16] -1 0 0x0000dc00 - 0x0000dc07 (0x8) IX[B] [17] -1 0 0x0000a400 - 0x0000a40f (0x10) IX[B] [18] -1 0 0x0000a480 - 0x0000a48f (0x10) IX[B] [19] -1 0 0x0000a800 - 0x0000a803 (0x4) IX[B] [20] -1 0 0x0000a880 - 0x0000a887 (0x8) IX[B] [21] -1 0 0x0000ac00 - 0x0000ac03 (0x4) IX[B] [22] -1 0 0x0000b000 - 0x0000b007 (0x8) IX[B] [23] -1 0 0x00000400 - 0x0000041f (0x20) IX[B] [24] -1 0 0x00009400 - 0x0000940f (0x10) IX[B] [25] -1 0 0x00009480 - 0x0000948f (0x10) IX[B] [26] -1 0 0x00009800 - 0x00009803 (0x4) IX[B] [27] -1 0 0x00009880 - 0x00009887 (0x8) IX[B] [28] -1 0 0x00009c00 - 0x00009c03 (0x4) IX[B] [29] -1 0 0x0000a000 - 0x0000a007 (0x8) IX[B] [30] -1 0 0x0000b480 - 0x0000b49f (0x20) IX[B] [31] -1 0 0x0000b400 - 0x0000b41f (0x20) IX[B] [32] -1 0 0x0000b080 - 0x0000b09f (0x20) IX[B] [33] -1 0 0x0000bc00 - 0x0000bc1f (0x20) IX[B] [34] -1 0 0x0000b880 - 0x0000b89f (0x20) IX[B] [35] -1 0 0x0000b800 - 0x0000b81f (0x20) IX[B] [36] -1 0 0x0000c000 - 0x0000c0ff (0x100) IX[B](B) (II) Inactive PCI resource ranges after removing overlaps: [0] -1 0 0xfeb00000 - 0xfeb1ffff (0x20000) MX[B](B) [1] -1 0 0xfebf0000 - 0xfebfffff (0x10000) MX[B](B) [2] -1 0 0xf0000000 - 0xf7ffffff (0x8000000) MX[B](B) [3] -1 0 0x0000e000 - 0x0000e0ff (0x100) IX[B](B) (II) OS-reported resource ranges after removing overlaps with PCI: [0] -1 0 0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B) [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [5] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] (II) All system resource ranges: [0] -1 0 0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B) [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] -1 0 0xfebef800 - 0xfebeffff (0x800) MX[B] [5] -1 0 0xfeafe000 - 0xfeafffff (0x2000) MX[B] [6] -1 0 0xfe9c0000 - 0xfe9fffff (0x40000) MX[B] [7] -1 0 0xfe7ff400 - 0xfe7ff4ff (0x100) MX[B] [8] -1 0 0xfe7ff800 - 0xfe7ffbff (0x400) MX[B] [9] -1 0 0xfe7f8000 - 0xfe7fbfff (0x4000) MX[B] [10] -1 0 0xfe7ffc00 - 0xfe7fffff (0x400) MX[B] [11] -1 0 0xfe8f0000 - 0xfe8fffff (0x10000) MX[B](B) [12] -1 0 0xfe8c0000 - 0xfe8dffff (0x20000) MX[B](B) [13] -1 0 0xfe8e0000 - 0xfe8effff (0x10000) MX[B](B) [14] -1 0 0xd0000000 - 0xdfffffff (0x10000000) MX[B](B) [15] -1 0 0xfeb00000 - 0xfeb1ffff (0x20000) MX[B](B) [16] -1 0 0xfebf0000 - 0xfebfffff (0x10000) MX[B](B) [17] -1 0 0xf0000000 - 0xf7ffffff (0x8000000) MX[B](B) [18] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [19] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] [20] -1 0 0x0000ec00 - 0x0000ec7f (0x80) IX[B] [21] -1 0 0x0000d400 - 0x0000d40f (0x10) IX[B] [22] -1 0 0x0000d480 - 0x0000d483 (0x4) IX[B] [23] -1 0 0x0000d800 - 0x0000d807 (0x8) IX[B] [24] -1 0 0x0000d880 - 0x0000d883 (0x4) IX[B] [25] -1 0 0x0000dc00 - 0x0000dc07 (0x8) IX[B] [26] -1 0 0x0000a400 - 0x0000a40f (0x10) IX[B] [27] -1 0 0x0000a480 - 0x0000a48f (0x10) IX[B] [28] -1 0 0x0000a800 - 0x0000a803 (0x4) IX[B] [29] -1 0 0x0000a880 - 0x0000a887 (0x8) IX[B] [30] -1 0 0x0000ac00 - 0x0000ac03 (0x4) IX[B] [31] -1 0 0x0000b000 - 0x0000b007 (0x8) IX[B] [32] -1 0 0x00000400 - 0x0000041f (0x20) IX[B] [33] -1 0 0x00009400 - 0x0000940f (0x10) IX[B] [34] -1 0 0x00009480 - 0x0000948f (0x10) IX[B] [35] -1 0 0x00009800 - 0x00009803 (0x4) IX[B] [36] -1 0 0x00009880 - 0x00009887 (0x8) IX[B] [37] -1 0 0x00009c00 - 0x00009c03 (0x4) IX[B] [38] -1 0 0x0000a000 - 0x0000a007 (0x8) IX[B] [39] -1 0 0x0000b480 - 0x0000b49f (0x20) IX[B] [40] -1 0 0x0000b400 - 0x0000b41f (0x20) IX[B] [41] -1 0 0x0000b080 - 0x0000b09f (0x20) IX[B] [42] -1 0 0x0000bc00 - 0x0000bc1f (0x20) IX[B] [43] -1 0 0x0000b880 - 0x0000b89f (0x20) IX[B] [44] -1 0 0x0000b800 - 0x0000b81f (0x20) IX[B] [45] -1 0 0x0000c000 - 0x0000c0ff (0x100) IX[B](B) [46] -1 0 0x0000e000 - 0x0000e0ff (0x100) IX[B](B) (II) LoadModule: "extmod" (II) Loading /usr/lib/xorg/modules/extensions//libextmod.so (II) Module extmod: vendor="X.Org Foundation" compiled for 1.4.0.90, module version = 1.0.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 0.3 (II) Loading extension SHAPE (II) Loading extension MIT-SUNDRY-NONSTANDARD (II) Loading extension BIG-REQUESTS (II) Loading extension SYNC (II) Loading extension MIT-SCREEN-SAVER (II) Loading extension XC-MISC (II) Loading extension XFree86-VidModeExtension (II) Loading extension XFree86-Misc (II) Loading extension XFree86-DGA (II) Loading extension DPMS (II) Loading extension TOG-CUP (II) Loading extension Extended-Visual-Information (II) Loading extension XVideo (II) Loading extension XVideo-MotionCompensation (II) Loading extension X-Resource (II) LoadModule: "dbe" (II) Loading /usr/lib/xorg/modules/extensions//libdbe.so (II) Module dbe: vendor="X.Org Foundation" compiled for 1.4.0.90, module version = 1.0.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 0.3 (II) Loading extension DOUBLE-BUFFER (II) LoadModule: "glx" (II) Loading /usr/lib/xorg/modules/extensions//libglx.so (II) Module glx: vendor="X.Org Foundation" compiled for 1.4.0.90, module version = 1.0.0 ABI class: X.Org Server Extension, version 0.3 (==) AIGLX enabled (II) Loading extension GLX (II) LoadModule: "freetype" (II) Loading /usr/lib/xorg/modules//fonts/libfreetype.so (II) Module freetype: vendor="X.Org Foundation & the After X-TT Project" compiled for 1.4.0.90, module version = 2.1.0 Module class: X.Org Font Renderer ABI class: X.Org Font Renderer, version 0.5 (II) Loading font FreeType (II) LoadModule: "record" (II) Loading /usr/lib/xorg/modules/extensions//librecord.so (II) Module record: vendor="X.Org Foundation" compiled for 1.4.0.90, module version = 1.13.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 0.3 (II) Loading extension RECORD (II) LoadModule: "dri" (II) Loading /usr/lib/xorg/modules/extensions//libdri.so (II) Module dri: vendor="X.Org Foundation" compiled for 1.4.0.90, module version = 1.0.0 ABI class: X.Org Server Extension, version 0.3 (II) Loading extension XFree86-DRI (II) LoadModule: "radeon" (II) Loading /usr/lib/xorg/modules/drivers//radeon_drv.so (II) Module radeon: vendor="X.Org Foundation" compiled for 1.4.0.90, module version = 4.3.0 Module class: X.Org Video Driver ABI class: X.Org Video Driver, version 2.0 (II) LoadModule: "void" (II) Loading /usr/lib/xorg/modules/input//void_drv.so (II) Module void: vendor="X.Org Foundation" compiled for 1.4.0, module version = 1.1.1 Module class: X.Org XInput Driver ABI class: X.Org XInput driver, version 2.0 (II) RADEON: Driver for ATI Radeon chipsets: ATI Radeon Mobility X600 (M24) 3150 (PCIE), ATI Radeon Mobility X300 (M24) 3152 (PCIE), ATI FireGL M24 GL 3154 (PCIE), ATI Radeon X600 (RV380) 3E50 (PCIE), ATI FireGL V3200 (RV380) 3E54 (PCIE), ATI Radeon IGP320 (A3) 4136, ATI Radeon IGP330/340/350 (A4) 4137, ATI Radeon 9500 AD (AGP), ATI Radeon 9500 AE (AGP), ATI Radeon 9600TX AF (AGP), ATI FireGL Z1 AG (AGP), ATI Radeon 9800SE AH (AGP), ATI Radeon 9800 AI (AGP), ATI Radeon 9800 AJ (AGP), ATI FireGL X2 AK (AGP), ATI Radeon 9600 AP (AGP), ATI Radeon 9600SE AQ (AGP), ATI Radeon 9600XT AR (AGP), ATI Radeon 9600 AS (AGP), ATI FireGL T2 AT (AGP), ATI Radeon 9650, ATI FireGL RV360 AV (AGP), ATI Radeon 7000 IGP (A4+) 4237, ATI Radeon 8500 AIW BB (AGP), ATI Radeon 8500 AIW BC (AGP), ATI Radeon IGP320M (U1) 4336, ATI Radeon IGP330M/340M/350M (U2) 4337, ATI Radeon Mobility 7000 IGP 4437, ATI Radeon 9000/PRO If (AGP/PCI), ATI Radeon 9000 Ig (AGP/PCI), ATI Radeon X800 (R420) JH (AGP), ATI Radeon X800PRO (R420) JI (AGP), ATI Radeon X800SE (R420) JJ (AGP), ATI Radeon X800 (R420) JK (AGP), ATI Radeon X800 (R420) JL (AGP), ATI FireGL X3 (R420) JM (AGP), ATI Radeon Mobility 9800 (M18) JN (AGP), ATI Radeon X800 SE (R420) (AGP), ATI Radeon X800XT (R420) JP (AGP), ATI Radeon X850 XT (R480) (AGP), ATI Radeon X850 SE (R480) (AGP), ATI Radeon X850 PRO (R480) (AGP), ATI Radeon X850 XT PE (R480) (AGP), ATI Radeon Mobility M7 LW (AGP), ATI Mobility FireGL 7800 M7 LX (AGP), ATI Radeon Mobility M6 LY (AGP), ATI Radeon Mobility M6 LZ (AGP), ATI FireGL Mobility 9000 (M9) Ld (AGP), ATI Radeon Mobility 9000 (M9) Lf (AGP), ATI Radeon Mobility 9000 (M9) Lg (AGP), ATI Radeon 9700 Pro ND (AGP), ATI Radeon 9700/9500Pro NE (AGP), ATI Radeon 9600TX NF (AGP), ATI FireGL X1 NG (AGP), ATI Radeon 9800PRO NH (AGP), ATI Radeon 9800 NI (AGP), ATI FireGL X2 NK (AGP), ATI Radeon 9800XT NJ (AGP), ATI Radeon Mobility 9600/9700 (M10/M11) NP (AGP), ATI Radeon Mobility 9600 (M10) NQ (AGP), ATI Radeon Mobility 9600 (M11) NR (AGP), ATI Radeon Mobility 9600 (M10) NS (AGP), ATI FireGL Mobility T2 (M10) NT (AGP), ATI FireGL Mobility T2e (M11) NV (AGP), ATI Radeon QD (AGP), ATI Radeon QE (AGP), ATI Radeon QF (AGP), ATI Radeon QG (AGP), ATI FireGL 8700/8800 QH (AGP), ATI Radeon 8500 QL (AGP), ATI Radeon 9100 QM (AGP), ATI Radeon 7500 QW (AGP/PCI), ATI Radeon 7500 QX (AGP/PCI), ATI Radeon VE/7000 QY (AGP/PCI), ATI Radeon VE/7000 QZ (AGP/PCI), ATI ES1000 515E (PCI), ATI Radeon Mobility X300 (M22) 5460 (PCIE), ATI Radeon Mobility X600 SE (M24C) 5462 (PCIE), ATI FireGL M22 GL 5464 (PCIE), ATI Radeon X800 (R423) UH (PCIE), ATI Radeon X800PRO (R423) UI (PCIE), ATI Radeon X800LE (R423) UJ (PCIE), ATI Radeon X800SE (R423) UK (PCIE), ATI Radeon X800 XTP (R430) (PCIE), ATI Radeon X800 XL (R430) (PCIE), ATI Radeon X800 SE (R430) (PCIE), ATI Radeon X800 (R430) (PCIE), ATI FireGL V7100 (R423) (PCIE), ATI FireGL V5100 (R423) UQ (PCIE), ATI FireGL unknown (R423) UR (PCIE), ATI FireGL unknown (R423) UT (PCIE), ATI Mobility FireGL V5000 (M26) (PCIE), ATI Mobility FireGL V5000 (M26) (PCIE), ATI Mobility Radeon X700 XL (M26) (PCIE), ATI Mobility Radeon X700 (M26) (PCIE), ATI Mobility Radeon X700 (M26) (PCIE), ATI Radeon 9100 IGP (A5) 5834, ATI Radeon Mobility 9100 IGP (U3) 5835, ATI Radeon XPRESS 200 5954 (PCIE), ATI Radeon XPRESS 200M 5955 (PCIE), ATI Radeon 9250 5960 (AGP), ATI Radeon 9200 5961 (AGP), ATI Radeon 9200 5962 (AGP), ATI Radeon 9200SE 5964 (AGP), ATI FireMV 2200 (PCI), ATI ES1000 5969 (PCI), ATI Radeon XPRESS 200 5974 (PCIE), ATI Radeon XPRESS 200M 5975 (PCIE), ATI Radeon XPRESS 200 5A41 (PCIE), ATI Radeon XPRESS 200M 5A42 (PCIE), ATI Radeon XPRESS 200 5A61 (PCIE), ATI Radeon XPRESS 200M 5A62 (PCIE), ATI Radeon X300 (RV370) 5B60 (PCIE), ATI Radeon X600 (RV370) 5B62 (PCIE), ATI Radeon X550 (RV370) 5B63 (PCIE), ATI Radeon X550XTX (RV370) 5657 (PCIE), ATI FireGL V3100 (RV370) 5B64 (PCIE), ATI FireMV 2200 PCIE (RV370) 5B65 (PCIE), ATI Radeon Mobility 9200 (M9+) 5C61 (AGP), ATI Radeon Mobility 9200 (M9+) 5C63 (AGP), ATI Mobility Radeon X800 XT (M28) (PCIE), ATI Mobility FireGL V5100 (M28) (PCIE), ATI Mobility Radeon X800 (M28) (PCIE), ATI Radeon X850 5D4C (PCIE), ATI Radeon X850 XT PE (R480) (PCIE), ATI Radeon X850 SE (R480) (PCIE), ATI Radeon X850 PRO (R480) (PCIE), ATI unknown Radeon / FireGL (R480) 5D50 (PCIE), ATI Radeon X850 XT (R480) (PCIE), ATI Radeon X800XT (R423) 5D57 (PCIE), ATI FireGL V5000 (RV410) (PCIE), ATI Radeon X700 XT (RV410) (PCIE), ATI Radeon X700 PRO (RV410) (PCIE), ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X700 (RV410) (PCIE), ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X1800, ATI Mobility Radeon X1800 XT, ATI Mobility Radeon X1800, ATI Mobility FireGL V7200, ATI FireGL V7200, ATI FireGL V5300, ATI Mobility FireGL V7100, ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800, ATI FireGL V7300, ATI FireGL V7350, ATI Radeon X1600, ATI RV505, ATI Radeon X1300/X1550, ATI Radeon X1550, ATI M54-GL, ATI Mobility Radeon X1400, ATI Radeon X1300/X1550, ATI Radeon X1550 64-bit, ATI Mobility Radeon X1300, ATI Mobility Radeon X1300, ATI Mobility Radeon X1300, ATI Mobility Radeon X1300, ATI Radeon X1300, ATI Radeon X1300, ATI RV505, ATI RV505, ATI FireGL V3300, ATI FireGL V3350, ATI Radeon X1300, ATI Radeon X1550 64-bit, ATI Radeon X1300/X1550, ATI Radeon X1600, ATI Radeon X1300/X1550, ATI Mobility Radeon X1450, ATI Radeon X1300/X1550, ATI Mobility Radeon X2300, ATI Mobility Radeon X2300, ATI Mobility Radeon X1350, ATI Mobility Radeon X1350, ATI Mobility Radeon X1450, ATI Radeon X1300, ATI Radeon X1550, ATI Mobility Radeon X1350, ATI FireMV 2250, ATI Radeon X1550 64-bit, ATI Radeon X1600, ATI Radeon X1650, ATI Radeon X1600, ATI Radeon X1600, ATI Mobility FireGL V5200, ATI Mobility Radeon X1600, ATI Radeon X1650, ATI Radeon X1650, ATI Radeon X1600, ATI Radeon X1300 XT/X1600 Pro, ATI FireGL V3400, ATI Mobility FireGL V5250, ATI Mobility Radeon X1700, ATI Mobility Radeon X1700 XT, ATI FireGL V5200, ATI Mobility Radeon X1700, ATI Radeon X2300HD, ATI Mobility Radeon HD 2300, ATI Mobility Radeon HD 2300, ATI Radeon X1950, ATI Radeon X1900, ATI Radeon X1950, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI AMD Stream Processor, ATI Radeon X1900, ATI Radeon X1950, ATI RV560, ATI RV560, ATI Mobility Radeon X1900, ATI RV560, ATI Radeon X1950 GT, ATI RV570, ATI RV570, ATI ATI FireGL V7400, ATI RV560, ATI Radeon X1650, ATI Radeon X1650, ATI RV560, ATI Radeon 9100 PRO IGP 7834, ATI Radeon Mobility 9200 IGP 7835, ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200, ATI RS740, ATI RS740M, ATI RS740, ATI RS740M, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 Pro, ATI Radeon HD 2900 GT, ATI FireGL V8650, ATI FireGL V8600, ATI FireGL V7600, ATI RV610, ATI Radeon HD 2400 XT, ATI Radeon HD 2400 Pro, ATI Radeon HD 2400 PRO AGP, ATI FireGL V4000, ATI RV610, ATI ATI Radeon HD 2350, ATI Mobility Radeon HD 2400 XT, ATI Mobility Radeon HD 2400, ATI RADEON E2400, ATI RV610, ATI RV670, ATI Radeon HD3870, ATI Radeon HD3850, ATI RV670, ATI Radeon HD3870 X2, ATI FireGL V7700, ATI RV630, ATI Mobility Radeon HD 2600, ATI Mobility Radeon HD 2600 XT, ATI Radeon HD 2600 XT AGP, ATI Radeon HD 2600 Pro AGP, ATI Radeon HD 2600 XT, ATI Radeon HD 2600 Pro, ATI Gemini RV630, ATI Gemini Mobility Radeon HD 2600 XT, ATI FireGL V5600, ATI FireGL V3600, ATI Radeon HD 2600 LE, ATI Radeon HD 3470, ATI Radeon HD 3450, ATI Radeon HD 3430, ATI Mobility Radeon HD 3430, ATI Mobility Radeon HD 3400 Series, ATI FireMV 2450, ATI FireMV 2260, ATI FireMV 2260, ATI ATI Radeon HD 3600 Series, ATI ATI Radeon HD 3650 AGP, ATI ATI Radeon HD 3600 PRO, ATI ATI Radeon HD 3600 XT, ATI ATI Radeon HD 3600 PRO, ATI Mobility Radeon HD 3650, ATI Mobility Radeon HD 3670, ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics, ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics (II) Primary Device is: PCI 01:00:0 (WW) RADEON: No matching Device section for instance (BusID PCI:1:0:1) found (WW) RADEON: No matching Device section for instance (BusID PCI:5:0:0) found (--) Chipset ATI Radeon X1650 found (II) resource ranges after xf86ClaimFixedResources() call: [0] -1 0 0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B) [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] -1 0 0xfebef800 - 0xfebeffff (0x800) MX[B] [5] -1 0 0xfeafe000 - 0xfeafffff (0x2000) MX[B] [6] -1 0 0xfe9c0000 - 0xfe9fffff (0x40000) MX[B] [7] -1 0 0xfe7ff400 - 0xfe7ff4ff (0x100) MX[B] [8] -1 0 0xfe7ff800 - 0xfe7ffbff (0x400) MX[B] [9] -1 0 0xfe7f8000 - 0xfe7fbfff (0x4000) MX[B] [10] -1 0 0xfe7ffc00 - 0xfe7fffff (0x400) MX[B] [11] -1 0 0xfe8f0000 - 0xfe8fffff (0x10000) MX[B](B) [12] -1 0 0xfe8c0000 - 0xfe8dffff (0x20000) MX[B](B) [13] -1 0 0xfe8e0000 - 0xfe8effff (0x10000) MX[B](B) [14] -1 0 0xd0000000 - 0xdfffffff (0x10000000) MX[B](B) [15] -1 0 0xfeb00000 - 0xfeb1ffff (0x20000) MX[B](B) [16] -1 0 0xfebf0000 - 0xfebfffff (0x10000) MX[B](B) [17] -1 0 0xf0000000 - 0xf7ffffff (0x8000000) MX[B](B) [18] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [19] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] [20] -1 0 0x0000ec00 - 0x0000ec7f (0x80) IX[B] [21] -1 0 0x0000d400 - 0x0000d40f (0x10) IX[B] [22] -1 0 0x0000d480 - 0x0000d483 (0x4) IX[B] [23] -1 0 0x0000d800 - 0x0000d807 (0x8) IX[B] [24] -1 0 0x0000d880 - 0x0000d883 (0x4) IX[B] [25] -1 0 0x0000dc00 - 0x0000dc07 (0x8) IX[B] [26] -1 0 0x0000a400 - 0x0000a40f (0x10) IX[B] [27] -1 0 0x0000a480 - 0x0000a48f (0x10) IX[B] [28] -1 0 0x0000a800 - 0x0000a803 (0x4) IX[B] [29] -1 0 0x0000a880 - 0x0000a887 (0x8) IX[B] [30] -1 0 0x0000ac00 - 0x0000ac03 (0x4) IX[B] [31] -1 0 0x0000b000 - 0x0000b007 (0x8) IX[B] [32] -1 0 0x00000400 - 0x0000041f (0x20) IX[B] [33] -1 0 0x00009400 - 0x0000940f (0x10) IX[B] [34] -1 0 0x00009480 - 0x0000948f (0x10) IX[B] [35] -1 0 0x00009800 - 0x00009803 (0x4) IX[B] [36] -1 0 0x00009880 - 0x00009887 (0x8) IX[B] [37] -1 0 0x00009c00 - 0x00009c03 (0x4) IX[B] [38] -1 0 0x0000a000 - 0x0000a007 (0x8) IX[B] [39] -1 0 0x0000b480 - 0x0000b49f (0x20) IX[B] [40] -1 0 0x0000b400 - 0x0000b41f (0x20) IX[B] [41] -1 0 0x0000b080 - 0x0000b09f (0x20) IX[B] [42] -1 0 0x0000bc00 - 0x0000bc1f (0x20) IX[B] [43] -1 0 0x0000b880 - 0x0000b89f (0x20) IX[B] [44] -1 0 0x0000b800 - 0x0000b81f (0x20) IX[B] [45] -1 0 0x0000c000 - 0x0000c0ff (0x100) IX[B](B) [46] -1 0 0x0000e000 - 0x0000e0ff (0x100) IX[B](B) (II) resource ranges after probing: [0] -1 0 0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B) [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] -1 0 0xfebef800 - 0xfebeffff (0x800) MX[B] [5] -1 0 0xfeafe000 - 0xfeafffff (0x2000) MX[B] [6] -1 0 0xfe9c0000 - 0xfe9fffff (0x40000) MX[B] [7] -1 0 0xfe7ff400 - 0xfe7ff4ff (0x100) MX[B] [8] -1 0 0xfe7ff800 - 0xfe7ffbff (0x400) MX[B] [9] -1 0 0xfe7f8000 - 0xfe7fbfff (0x4000) MX[B] [10] -1 0 0xfe7ffc00 - 0xfe7fffff (0x400) MX[B] [11] -1 0 0xfe8f0000 - 0xfe8fffff (0x10000) MX[B](B) [12] -1 0 0xfe8c0000 - 0xfe8dffff (0x20000) MX[B](B) [13] -1 0 0xfe8e0000 - 0xfe8effff (0x10000) MX[B](B) [14] -1 0 0xd0000000 - 0xdfffffff (0x10000000) MX[B](B) [15] -1 0 0xfeb00000 - 0xfeb1ffff (0x20000) MX[B](B) [16] -1 0 0xfebf0000 - 0xfebfffff (0x10000) MX[B](B) [17] -1 0 0xf0000000 - 0xf7ffffff (0x8000000) MX[B](B) [18] 0 0 0x000a0000 - 0x000affff (0x10000) MS[B] [19] 0 0 0x000b0000 - 0x000b7fff (0x8000) MS[B] [20] 0 0 0x000b8000 - 0x000bffff (0x8000) MS[B] [21] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [22] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] [23] -1 0 0x0000ec00 - 0x0000ec7f (0x80) IX[B] [24] -1 0 0x0000d400 - 0x0000d40f (0x10) IX[B] [25] -1 0 0x0000d480 - 0x0000d483 (0x4) IX[B] [26] -1 0 0x0000d800 - 0x0000d807 (0x8) IX[B] [27] -1 0 0x0000d880 - 0x0000d883 (0x4) IX[B] [28] -1 0 0x0000dc00 - 0x0000dc07 (0x8) IX[B] [29] -1 0 0x0000a400 - 0x0000a40f (0x10) IX[B] [30] -1 0 0x0000a480 - 0x0000a48f (0x10) IX[B] [31] -1 0 0x0000a800 - 0x0000a803 (0x4) IX[B] [32] -1 0 0x0000a880 - 0x0000a887 (0x8) IX[B] [33] -1 0 0x0000ac00 - 0x0000ac03 (0x4) IX[B] [34] -1 0 0x0000b000 - 0x0000b007 (0x8) IX[B] [35] -1 0 0x00000400 - 0x0000041f (0x20) IX[B] [36] -1 0 0x00009400 - 0x0000940f (0x10) IX[B] [37] -1 0 0x00009480 - 0x0000948f (0x10) IX[B] [38] -1 0 0x00009800 - 0x00009803 (0x4) IX[B] [39] -1 0 0x00009880 - 0x00009887 (0x8) IX[B] [40] -1 0 0x00009c00 - 0x00009c03 (0x4) IX[B] [41] -1 0 0x0000a000 - 0x0000a007 (0x8) IX[B] [42] -1 0 0x0000b480 - 0x0000b49f (0x20) IX[B] [43] -1 0 0x0000b400 - 0x0000b41f (0x20) IX[B] [44] -1 0 0x0000b080 - 0x0000b09f (0x20) IX[B] [45] -1 0 0x0000bc00 - 0x0000bc1f (0x20) IX[B] [46] -1 0 0x0000b880 - 0x0000b89f (0x20) IX[B] [47] -1 0 0x0000b800 - 0x0000b81f (0x20) IX[B] [48] -1 0 0x0000c000 - 0x0000c0ff (0x100) IX[B](B) [49] -1 0 0x0000e000 - 0x0000e0ff (0x100) IX[B](B) [50] 0 0 0x000003b0 - 0x000003bb (0xc) IS[B] [51] 0 0 0x000003c0 - 0x000003df (0x20) IS[B] (II) Setting vga for screen 0. (II) RADEON(0): RADEONPreInit (II) RADEON(0): MMIO registers at 0x00000000fe8e0000: size 64KB (II) RADEON(0): PCI bus 1 card 0 func 0 (**) RADEON(0): Depth 24, (--) framebuffer bpp 32 (II) RADEON(0): Pixel depth = 24 bits stored in 4 bytes (32 bpp pixmaps) (==) RADEON(0): Default visual is TrueColor (II) Loading sub module "vgahw" (II) LoadModule: "vgahw" (II) Loading /usr/lib/xorg/modules//libvgahw.so (II) Module vgahw: vendor="X.Org Foundation" compiled for 1.4.0.90, module version = 0.1.0 ABI class: X.Org Video Driver, version 2.0 (II) RADEON(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000 (==) RADEON(0): RGB weight 888 (II) RADEON(0): Using 8 bits per RGB (8 bit DAC) (--) RADEON(0): Chipset: "ATI Radeon X1650" (ChipID = 0x71c1) (WW) RADEON(0): R500 support is under development. Please report any issues to xorg-driver-ati@lists.x.org (--) RADEON(0): Linear framebuffer at 0x00000000d0000000 (--) RADEON(0): BIOS at 0xfe8c0000 (II) RADEON(0): PCIE card detected (II) Attempted to read BIOS 64KB from /sys/bus/pci/devices/0000:01:00.0/rom: got 63KB (II) RADEON(0): ATOM BIOS detected (II) RADEON(0): ATOM BIOS Rom: SubsystemVendorID: 0x174b SubsystemID: 0xc880 IOBaseAddress: 0xc000 Filename: 8C88DCSA.001 BIOS Bootup Message: RV535XT BIOS GDDR3 600E/690M (II) RADEON(0): Framebuffer space used by Firmware (kb): 20 (II) RADEON(0): Start of VRAM area used by Firmware: 0xfffb000 (II) RADEON(0): Call to AtomBIOS Init succeeded (II) RADEON(0): Framebuffer space used by Firmware (kb): 20 (II) RADEON(0): Start of VRAM area used by Firmware: 0xfffb000 (II) RADEON(0): AtomBIOS requests 20kB of VRAM scratch space (II) RADEON(0): AtomBIOS VRAM scratch base: 0xfffb000 (II) RADEON(0): Cannot get VRAM scratch space. Allocating in main memory instead (II) RADEON(0): Call to AtomBIOS Set FB Space succeeded (II) RADEON(0): Default Engine Clock: 600000 (II) RADEON(0): Default Memory Clock: 690000 (II) RADEON(0): Maximum Pixel ClockPLL Frequency Output: 1100000 (II) RADEON(0): Minimum Pixel ClockPLL Frequency Output: 0 (II) RADEON(0): Maximum Pixel ClockPLL Frequency Input: 13500 (II) RADEON(0): Minimum Pixel ClockPLL Frequency Input: 1000 (II) RADEON(0): Maximum Pixel Clock: 400000 (II) RADEON(0): Reference Clock: 27000 drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 9, (OK) drmOpenByBusid: Searching for BusID pci:0000:01:00.0 drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 9, (OK) drmOpenByBusid: drmOpenMinor returns 9 drmOpenByBusid: drmGetBusid reports pci:0000:05:00.0 drmOpenDevice: node name is /dev/dri/card1 drmOpenDevice: open result is 9, (OK) drmOpenByBusid: drmOpenMinor returns 9 drmOpenByBusid: drmGetBusid reports pci:0000:01:00.0 (II) RADEON(0): [dri] Found DRI library version 1.3.0 and kernel module version 1.28.0 (==) RADEON(0): Page Flipping disabled on r5xx and newer chips. (II) RADEON(0): Will try to use DMA for Xv image transfers (II) RADEON(0): Generation 2 PCI interface, using max accessible memory (II) RADEON(0): Detected total video RAM=262144K, accessible=262144K (PCI BAR=262144K) (--) RADEON(0): Mapped VideoRAM: 262144 kByte (64 bit DDR SDRAM) (II) RADEON(0): Color tiling enabled by default (II) RADEON(0): Max desktop size set to 2560x1600 (II) RADEON(0): For a larger or smaller max desktop size, add a Virtual line to your xorg.conf (II) RADEON(0): If you are having trouble with 3D, reduce the desktop size by adjusting the Virtual line to your xorg.conf (II) Loading sub module "ddc" (II) LoadModule: "ddc"(II) Module "ddc" already built-in (II) Loading sub module "i2c" (II) LoadModule: "i2c"(II) Module "i2c" already built-in (II) RADEON(0): ref_freq: 2700, min_out_pll: 64800, max_out_pll: 110000, min_in_pll: 100, max_in_pll: 1350, xclk: 40000, sclk: 600.000000, mclk: 690.000000 (II) RADEON(0): PLL parameters: rf=2700 rd=13 min=64800 max=110000; xclk=40000 (II) RADEON(0): Skipping Component Video (II) RADEON(0): Bios Connector table: (II) RADEON(0): Port2: DDCType-0x0, DACType-2, TMDSType-0, ConnectorType-5, hpd_mask-0x0 (II) RADEON(0): Port3: DDCType-0x7e40, DACType-1, TMDSType-1, ConnectorType-2, hpd_mask-0x1 (II) RADEON(0): Port9: DDCType-0x7e50, DACType-2, TMDSType-3, ConnectorType-2, hpd_mask-0x100 (II) RADEON(0): Output S-video using monitor section Monitor0 (II) RADEON(0): TV standards supported by chip: NTSC PAL (II) RADEON(0): Output DVI-1 has no monitor section (II) RADEON(0): TMDS PLL from BIOS: 16500 e0153 (II) RADEON(0): I2C bus "DVI-1" initialized. (II) RADEON(0): Output DVI-0 has no monitor section (II) RADEON(0): TMDS PLL from BIOS: 16500 e0153 (II) RADEON(0): I2C bus "DVI-0" initialized. (II) RADEON(0): Port0: Monitor -- AUTO Connector -- STV DAC Type -- TVDAC/ExtDAC TMDS Type -- None DDC Type -- 0x0 (II) RADEON(0): Port1: Monitor -- AUTO Connector -- DVI-I DAC Type -- Primary TMDS Type -- Internal DDC Type -- 0x7e40 (II) RADEON(0): Port2: Monitor -- AUTO Connector -- DVI-I DAC Type -- TVDAC/ExtDAC TMDS Type -- LVTMA DDC Type -- 0x7e50 (II) RADEON(0): Output: S-video, Detected Monitor Type: 0 (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Dac detection success finished output detect: 0 (II) RADEON(0): I2C device "DVI-1:ddc2" registered at address 0xA0. (II) RADEON(0): Output: DVI-1, Detected Monitor Type: 1 (II) RADEON(0): EDID data from the display on output: DVI-1 ---------------------- (II) RADEON(0): Manufacturer: DEL Model: a027 Serial#: 894256725 (II) RADEON(0): Year: 2007 Week: 40 (II) RADEON(0): EDID Version: 1.3 (II) RADEON(0): Analog Display Input, Input Voltage Level: 0.700/0.700 V (II) RADEON(0): Sync: Separate (II) RADEON(0): Max H-Image Size [cm]: horiz.: 34 vert.: 27 (II) RADEON(0): Gamma: 2.20 (II) RADEON(0): DPMS capabilities: StandBy Suspend Off; RGB/Color Display (II) RADEON(0): Default color space is primary color space (II) RADEON(0): First detailed timing is preferred mode (II) RADEON(0): redX: 0.648 redY: 0.339 greenX: 0.292 greenY: 0.603 (II) RADEON(0): blueX: 0.143 blueY: 0.070 whiteX: 0.313 whiteY: 0.329 (II) RADEON(0): Supported VESA Video Modes: (II) RADEON(0): 720x400@70Hz (II) RADEON(0): 640x480@60Hz (II) RADEON(0): 640x480@75Hz (II) RADEON(0): 800x600@60Hz (II) RADEON(0): 800x600@75Hz (II) RADEON(0): 1024x768@60Hz (II) RADEON(0): 1024x768@75Hz (II) RADEON(0): 1280x1024@75Hz (II) RADEON(0): Manufacturer's mask: 0 (II) RADEON(0): Supported Future Video Modes: (II) RADEON(0): #0: hsize: 1152 vsize 864 refresh: 75 vid: 20337 (II) RADEON(0): #1: hsize: 1280 vsize 1024 refresh: 60 vid: 32897 (II) RADEON(0): Supported additional Video Mode: (II) RADEON(0): clock: 108.0 MHz Image Size: 338 x 270 mm (II) RADEON(0): h_active: 1280 h_sync: 1328 h_sync_end 1440 h_blank_end 1688 h_border: 0 (II) RADEON(0): v_active: 1024 v_sync: 1025 v_sync_end 1028 v_blanking: 1066 v_border: 0 (II) RADEON(0): Ranges: V min: 56 V max: 75 Hz, H min: 30 H max: 81 kHz, PixClock max 140 MHz (II) RADEON(0): Serial No: 737317A65MFU (II) RADEON(0): Monitor name: DELL E178FP (II) RADEON(0): EDID (in hex): (II) RADEON(0): 00ffffffffffff0010ac27a055464d35 (II) RADEON(0): 2811010368221b78ee3d85a6564a9a24 (II) RADEON(0): 125054a54b00714f8180010101010101 (II) RADEON(0): 010101010101302a009851002a403070 (II) RADEON(0): 1300520e1100001e000000fd00384b1e (II) RADEON(0): 510e000a202020202020000000ff0037 (II) RADEON(0): 33373331374136354d46550a000000fc (II) RADEON(0): 0044454c4c204531373846500a200074 finished output detect: 1 (II) RADEON(0): I2C device "DVI-0:ddc2" registered at address 0xA0. (II) RADEON(0): Output: DVI-0, Detected Monitor Type: 1 (II) RADEON(0): EDID data from the display on output: DVI-0 ---------------------- (II) RADEON(0): Manufacturer: DEL Model: a027 Serial#: 861155411 (II) RADEON(0): Year: 2007 Week: 23 (II) RADEON(0): EDID Version: 1.3 (II) RADEON(0): Analog Display Input, Input Voltage Level: 0.700/0.700 V (II) RADEON(0): Sync: Separate (II) RADEON(0): Max H-Image Size [cm]: horiz.: 34 vert.: 27 (II) RADEON(0): Gamma: 2.20 (II) RADEON(0): DPMS capabilities: StandBy Suspend Off; RGB/Color Display (II) RADEON(0): Default color space is primary color space (II) RADEON(0): First detailed timing is preferred mode (II) RADEON(0): redX: 0.650 redY: 0.330 greenX: 0.300 greenY: 0.600 (II) RADEON(0): blueX: 0.150 blueY: 0.080 whiteX: 0.313 whiteY: 0.329 (II) RADEON(0): Supported VESA Video Modes: (II) RADEON(0): 720x400@70Hz (II) RADEON(0): 640x480@60Hz (II) RADEON(0): 640x480@75Hz (II) RADEON(0): 800x600@60Hz (II) RADEON(0): 800x600@75Hz (II) RADEON(0): 1024x768@60Hz (II) RADEON(0): 1024x768@75Hz (II) RADEON(0): 1280x1024@75Hz (II) RADEON(0): Manufacturer's mask: 0 (II) RADEON(0): Supported Future Video Modes: (II) RADEON(0): #0: hsize: 1152 vsize 864 refresh: 75 vid: 20337 (II) RADEON(0): #1: hsize: 1280 vsize 1024 refresh: 60 vid: 32897 (II) RADEON(0): Supported additional Video Mode: (II) RADEON(0): clock: 108.0 MHz Image Size: 338 x 270 mm (II) RADEON(0): h_active: 1280 h_sync: 1328 h_sync_end 1440 h_blank_end 1688 h_border: 0 (II) RADEON(0): v_active: 1024 v_sync: 1025 v_sync_end 1028 v_blanking: 1066 v_border: 0 (II) RADEON(0): Ranges: V min: 56 V max: 75 Hz, H min: 30 H max: 81 kHz, PixClock max 140 MHz (II) RADEON(0): Serial No: 737317673T0S (II) RADEON(0): Monitor name: DELL E178FP (II) RADEON(0): EDID (in hex): (II) RADEON(0): 00ffffffffffff0010ac27a053305433 (II) RADEON(0): 1711010368221b78eeaea5a6544c9926 (II) RADEON(0): 145054a54b00714f8180010101010101 (II) RADEON(0): 010101010101302a009851002a403070 (II) RADEON(0): 1300520e1100001e000000fd00384b1e (II) RADEON(0): 510e000a202020202020000000ff0037 (II) RADEON(0): 33373331373637335430530a000000fc (II) RADEON(0): 0044454c4c204531373846500a200021 finished output detect: 2 finished all detect before xf86InitialConfiguration (II) RADEON(0): Output: S-video, Detected Monitor Type: 0 (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Dac detection success (II) RADEON(0): Output: DVI-1, Detected Monitor Type: 1 (II) RADEON(0): EDID data from the display on output: DVI-1 ---------------------- (II) RADEON(0): Manufacturer: DEL Model: a027 Serial#: 894256725 (II) RADEON(0): Year: 2007 Week: 40 (II) RADEON(0): EDID Version: 1.3 (II) RADEON(0): Analog Display Input, Input Voltage Level: 0.700/0.700 V (II) RADEON(0): Sync: Separate (II) RADEON(0): Max H-Image Size [cm]: horiz.: 34 vert.: 27 (II) RADEON(0): Gamma: 2.20 (II) RADEON(0): DPMS capabilities: StandBy Suspend Off; RGB/Color Display (II) RADEON(0): Default color space is primary color space (II) RADEON(0): First detailed timing is preferred mode (II) RADEON(0): redX: 0.648 redY: 0.339 greenX: 0.292 greenY: 0.603 (II) RADEON(0): blueX: 0.143 blueY: 0.070 whiteX: 0.313 whiteY: 0.329 (II) RADEON(0): Supported VESA Video Modes: (II) RADEON(0): 720x400@70Hz (II) RADEON(0): 640x480@60Hz (II) RADEON(0): 640x480@75Hz (II) RADEON(0): 800x600@60Hz (II) RADEON(0): 800x600@75Hz (II) RADEON(0): 1024x768@60Hz (II) RADEON(0): 1024x768@75Hz (II) RADEON(0): 1280x1024@75Hz (II) RADEON(0): Manufacturer's mask: 0 (II) RADEON(0): Supported Future Video Modes: (II) RADEON(0): #0: hsize: 1152 vsize 864 refresh: 75 vid: 20337 (II) RADEON(0): #1: hsize: 1280 vsize 1024 refresh: 60 vid: 32897 (II) RADEON(0): Supported additional Video Mode: (II) RADEON(0): clock: 108.0 MHz Image Size: 338 x 270 mm (II) RADEON(0): h_active: 1280 h_sync: 1328 h_sync_end 1440 h_blank_end 1688 h_border: 0 (II) RADEON(0): v_active: 1024 v_sync: 1025 v_sync_end 1028 v_blanking: 1066 v_border: 0 (II) RADEON(0): Ranges: V min: 56 V max: 75 Hz, H min: 30 H max: 81 kHz, PixClock max 140 MHz (II) RADEON(0): Serial No: 737317A65MFU (II) RADEON(0): Monitor name: DELL E178FP (II) RADEON(0): EDID (in hex): (II) RADEON(0): 00ffffffffffff0010ac27a055464d35 (II) RADEON(0): 2811010368221b78ee3d85a6564a9a24 (II) RADEON(0): 125054a54b00714f8180010101010101 (II) RADEON(0): 010101010101302a009851002a403070 (II) RADEON(0): 1300520e1100001e000000fd00384b1e (II) RADEON(0): 510e000a202020202020000000ff0037 (II) RADEON(0): 33373331374136354d46550a000000fc (II) RADEON(0): 0044454c4c204531373846500a200074 in RADEONProbeOutputModes (II) RADEON(0): EDID vendor "DEL", prod id 40999 (II) RADEON(0): Output: DVI-0, Detected Monitor Type: 1 (II) RADEON(0): EDID data from the display on output: DVI-0 ---------------------- (II) RADEON(0): Manufacturer: DEL Model: a027 Serial#: 861155411 (II) RADEON(0): Year: 2007 Week: 23 (II) RADEON(0): EDID Version: 1.3 (II) RADEON(0): Analog Display Input, Input Voltage Level: 0.700/0.700 V (II) RADEON(0): Sync: Separate (II) RADEON(0): Max H-Image Size [cm]: horiz.: 34 vert.: 27 (II) RADEON(0): Gamma: 2.20 (II) RADEON(0): DPMS capabilities: StandBy Suspend Off; RGB/Color Display (II) RADEON(0): Default color space is primary color space (II) RADEON(0): First detailed timing is preferred mode (II) RADEON(0): redX: 0.650 redY: 0.330 greenX: 0.300 greenY: 0.600 (II) RADEON(0): blueX: 0.150 blueY: 0.080 whiteX: 0.313 whiteY: 0.329 (II) RADEON(0): Supported VESA Video Modes: (II) RADEON(0): 720x400@70Hz (II) RADEON(0): 640x480@60Hz (II) RADEON(0): 640x480@75Hz (II) RADEON(0): 800x600@60Hz (II) RADEON(0): 800x600@75Hz (II) RADEON(0): 1024x768@60Hz (II) RADEON(0): 1024x768@75Hz (II) RADEON(0): 1280x1024@75Hz (II) RADEON(0): Manufacturer's mask: 0 (II) RADEON(0): Supported Future Video Modes: (II) RADEON(0): #0: hsize: 1152 vsize 864 refresh: 75 vid: 20337 (II) RADEON(0): #1: hsize: 1280 vsize 1024 refresh: 60 vid: 32897 (II) RADEON(0): Supported additional Video Mode: (II) RADEON(0): clock: 108.0 MHz Image Size: 338 x 270 mm (II) RADEON(0): h_active: 1280 h_sync: 1328 h_sync_end 1440 h_blank_end 1688 h_border: 0 (II) RADEON(0): v_active: 1024 v_sync: 1025 v_sync_end 1028 v_blanking: 1066 v_border: 0 (II) RADEON(0): Ranges: V min: 56 V max: 75 Hz, H min: 30 H max: 81 kHz, PixClock max 140 MHz (II) RADEON(0): Serial No: 737317673T0S (II) RADEON(0): Monitor name: DELL E178FP (II) RADEON(0): EDID (in hex): (II) RADEON(0): 00ffffffffffff0010ac27a053305433 (II) RADEON(0): 1711010368221b78eeaea5a6544c9926 (II) RADEON(0): 145054a54b00714f8180010101010101 (II) RADEON(0): 010101010101302a009851002a403070 (II) RADEON(0): 1300520e1100001e000000fd00384b1e (II) RADEON(0): 510e000a202020202020000000ff0037 (II) RADEON(0): 33373331373637335430530a000000fc (II) RADEON(0): 0044454c4c204531373846500a200021 in RADEONProbeOutputModes (II) RADEON(0): EDID vendor "DEL", prod id 40999 (II) RADEON(0): Output S-video disconnected (II) RADEON(0): Output DVI-1 connected (II) RADEON(0): Output DVI-0 connected (II) RADEON(0): Output DVI-1 using initial mode 1280x1024 (II) RADEON(0): Output DVI-0 using initial mode 1280x1024 after xf86InitialConfiguration (==) RADEON(0): DPI set to (96, 96) (II) Loading sub module "fb" (II) LoadModule: "fb" (II) Loading /usr/lib/xorg/modules//libfb.so (II) Module fb: vendor="X.Org Foundation" compiled for 1.4.0.90, module version = 1.0.0 ABI class: X.Org ANSI C Emulation, version 0.3 (==) RADEON(0): Using gamma correction (1.0, 1.0, 1.0) (II) Loading sub module "ramdac" (II) LoadModule: "ramdac"(II) Module "ramdac" already built-in (==) RADEON(0): Using XAA acceleration architecture (II) Loading sub module "xaa" (II) LoadModule: "xaa" (II) Loading /usr/lib/xorg/modules//libxaa.so (II) Module xaa: vendor="X.Org Foundation" compiled for 1.4.0.90, module version = 1.2.0 ABI class: X.Org Video Driver, version 2.0 (!!) RADEON(0): For information on using the multimedia capabilities of this adapter, please see http://gatos.sf.net. (!!) RADEON(0): MergedFB support has been removed and replaced with xrandr 1.2 support (--) Depth 24 pixmap format is 32 bpp (II) do I need RAC? No, I don't. (II) resource ranges after preInit: [0] 0 0 0xfe8e0000 - 0xfe8effff (0x10000) MX[B] [1] 0 0 0xd0000000 - 0xdfffffff (0x10000000) MX[B] [2] -1 0 0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B) [3] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [4] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [5] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [6] -1 0 0xfebef800 - 0xfebeffff (0x800) MX[B] [7] -1 0 0xfeafe000 - 0xfeafffff (0x2000) MX[B] [8] -1 0 0xfe9c0000 - 0xfe9fffff (0x40000) MX[B] [9] -1 0 0xfe7ff400 - 0xfe7ff4ff (0x100) MX[B] [10] -1 0 0xfe7ff800 - 0xfe7ffbff (0x400) MX[B] [11] -1 0 0xfe7f8000 - 0xfe7fbfff (0x4000) MX[B] [12] -1 0 0xfe7ffc00 - 0xfe7fffff (0x400) MX[B] [13] -1 0 0xfe8f0000 - 0xfe8fffff (0x10000) MX[B](B) [14] -1 0 0xfe8c0000 - 0xfe8dffff (0x20000) MX[B](B) [15] -1 0 0xfe8e0000 - 0xfe8effff (0x10000) MX[B](B) [16] -1 0 0xd0000000 - 0xdfffffff (0x10000000) MX[B](B) [17] -1 0 0xfeb00000 - 0xfeb1ffff (0x20000) MX[B](B) [18] -1 0 0xfebf0000 - 0xfebfffff (0x10000) MX[B](B) [19] -1 0 0xf0000000 - 0xf7ffffff (0x8000000) MX[B](B) [20] 0 0 0x000a0000 - 0x000affff (0x10000) MS[B](OprU) [21] 0 0 0x000b0000 - 0x000b7fff (0x8000) MS[B](OprU) [22] 0 0 0x000b8000 - 0x000bffff (0x8000) MS[B](OprU) [23] 0 0 0x0000c000 - 0x0000c0ff (0x100) IX[B] [24] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [25] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] [26] -1 0 0x0000ec00 - 0x0000ec7f (0x80) IX[B] [27] -1 0 0x0000d400 - 0x0000d40f (0x10) IX[B] [28] -1 0 0x0000d480 - 0x0000d483 (0x4) IX[B] [29] -1 0 0x0000d800 - 0x0000d807 (0x8) IX[B] [30] -1 0 0x0000d880 - 0x0000d883 (0x4) IX[B] [31] -1 0 0x0000dc00 - 0x0000dc07 (0x8) IX[B] [32] -1 0 0x0000a400 - 0x0000a40f (0x10) IX[B] [33] -1 0 0x0000a480 - 0x0000a48f (0x10) IX[B] [34] -1 0 0x0000a800 - 0x0000a803 (0x4) IX[B] [35] -1 0 0x0000a880 - 0x0000a887 (0x8) IX[B] [36] -1 0 0x0000ac00 - 0x0000ac03 (0x4) IX[B] [37] -1 0 0x0000b000 - 0x0000b007 (0x8) IX[B] [38] -1 0 0x00000400 - 0x0000041f (0x20) IX[B] [39] -1 0 0x00009400 - 0x0000940f (0x10) IX[B] [40] -1 0 0x00009480 - 0x0000948f (0x10) IX[B] [41] -1 0 0x00009800 - 0x00009803 (0x4) IX[B] [42] -1 0 0x00009880 - 0x00009887 (0x8) IX[B] [43] -1 0 0x00009c00 - 0x00009c03 (0x4) IX[B] [44] -1 0 0x0000a000 - 0x0000a007 (0x8) IX[B] [45] -1 0 0x0000b480 - 0x0000b49f (0x20) IX[B] [46] -1 0 0x0000b400 - 0x0000b41f (0x20) IX[B] [47] -1 0 0x0000b080 - 0x0000b09f (0x20) IX[B] [48] -1 0 0x0000bc00 - 0x0000bc1f (0x20) IX[B] [49] -1 0 0x0000b880 - 0x0000b89f (0x20) IX[B] [50] -1 0 0x0000b800 - 0x0000b81f (0x20) IX[B] [51] -1 0 0x0000c000 - 0x0000c0ff (0x100) IX[B](B) [52] -1 0 0x0000e000 - 0x0000e0ff (0x100) IX[B](B) [53] 0 0 0x000003b0 - 0x000003bb (0xc) IS[B](OprU) [54] 0 0 0x000003c0 - 0x000003df (0x20) IS[B](OprU) (II) RADEON(0): RADEONScreenInit d0000000 0 0 (II) RADEON(0): Map: 0xd0000000, 0x10000000 (==) RADEON(0): Write-combining range (0xd0000000,0x10000000) (II) RADEON(0): RADEONSave (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output 68 disable success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output 69 disable success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 1 success (==) RADEON(0): Using 24 bit depth buffer (II) RADEON(0): RADEONInitMemoryMap() : (II) RADEON(0): mem_size : 0x10000000 (II) RADEON(0): MC_FB_LOCATION : 0xdfffd000 (II) RADEON(0): MC_AGP_LOCATION : 0x003f0000 (II) RADEON(0): Depth moves disabled by default (II) RADEON(0): Setting up initial surfaces (II) RADEON(0): Setting up accel memmap (II) RADEON(0): CP in BM mode (II) RADEON(0): Using 8 MB GART aperture (II) RADEON(0): Using 1 MB for the ring buffer (II) RADEON(0): Using 2 MB for vertex/indirect buffers (II) RADEON(0): Using 5 MB for GART textures (II) RADEON(0): Memory manager initialized to (0,0) (1280,8191) (II) RADEON(0): Reserved area from (0,1280) to (1280,1282) (II) RADEON(0): Largest offscreen area available: 1280 x 6909 (II) RADEON(0): Will use front buffer at offset 0x0 (II) RADEON(0): Will use back buffer at offset 0x1b80000 (II) RADEON(0): Will use depth buffer at offset 0x21c0000 (II) RADEON(0): Will use 32 kb for PCI GART table at offset 0xfff8000 (II) RADEON(0): Will use 221184 kb for textures at offset 0x2800000 drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 9, (OK) drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 9, (OK) drmOpenByBusid: Searching for BusID pci:0000:01:00.0 drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 9, (OK) drmOpenByBusid: drmOpenMinor returns 9 drmOpenByBusid: drmGetBusid reports pci:0000:05:00.0 drmOpenDevice: node name is /dev/dri/card1 drmOpenDevice: open result is 9, (OK) drmOpenByBusid: drmOpenMinor returns 9 drmOpenByBusid: drmGetBusid reports pci:0000:01:00.0 (II) [drm] DRM interface version 1.3 (II) [drm] DRM open master succeeded. (II) RADEON(0): [drm] Using the DRM lock SAREA also for drawables. (II) RADEON(0): [drm] framebuffer handle = 0xd0000000 (II) RADEON(0): [drm] added 1 reserved context for kernel (II) RADEON(0): X context handle = 0x1 (II) RADEON(0): [drm] installed DRM signal handler (II) RADEON(0): [pci] 8192 kB allocated with handle 0x00000000 (II) RADEON(0): [pci] ring handle = 0x1efff000 (II) RADEON(0): [pci] Ring mapped at 0x7f50669b4000 (II) RADEON(0): [pci] Ring contents 0x00000000 (II) RADEON(0): [pci] ring read ptr handle = 0x2f000000 (II) RADEON(0): [pci] Ring read ptr mapped at 0x7f50669b3000 (II) RADEON(0): [pci] Ring read ptr contents 0x00000000 (II) RADEON(0): [pci] vertex/indirect buffers handle = 0x1f000000 (II) RADEON(0): [pci] Vertex/indirect buffers mapped at 0x7f50667b3000 (II) RADEON(0): [pci] Vertex/indirect buffers contents 0x00000000 (II) RADEON(0): [pci] GART texture map handle = 0x1f001000 (II) RADEON(0): [pci] GART Texture map mapped at 0x7f50662d3000 (II) RADEON(0): [drm] register handle = 0xfe8e0000 (II) RADEON(0): [dri] Visual configs initialized (II) RADEON(0): Initializing fb layer (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output 68 disable success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output 69 disable success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output 68 disable success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 0 success Mode 1280x1024 - 1688 1066 5 (II) RADEON(0): RADEONRestoreMemMapRegisters() : (II) RADEON(0): MC_FB_LOCATION : 0xdfffd000 0xfffff000 (II) RADEON(0): MC_AGP_LOCATION : 0x003f0000 freq: 108000000 best_freq: 108000000 best_feedback_div: 312 best_ref_div: 13 best_post_div: 6 (II) RADEON(0): crtc(0) Clock: mode 108000, PLL 108000 (II) RADEON(0): crtc(0) PLL : refdiv 13, fbdiv 0x138(312), pdiv 6 (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC PLL success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC Timing success Not using RMX (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded scaler 0 setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC 0 Source success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DAC1 setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Unblank CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output 68 enable success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output 69 disable success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 1 success Mode 1280x1024 - 1688 1066 5 (II) RADEON(0): RADEONRestoreMemMapRegisters() : (II) RADEON(0): MC_FB_LOCATION : 0xdfffd000 0xdfffd000 (II) RADEON(0): MC_AGP_LOCATION : 0x003f0000 freq: 108000000 best_freq: 108000000 best_feedback_div: 312 best_ref_div: 13 best_post_div: 6 (II) RADEON(0): crtc(1) Clock: mode 108000, PLL 108000 (II) RADEON(0): crtc(1) PLL : refdiv 13, fbdiv 0x138(312), pdiv 6 (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC PLL success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC Timing success Not using RMX (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded scaler 1 setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC 1 Source success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DAC2 setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Unblank CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output 69 enable success (II) RADEON(0): RADEONSaveScreen(0) (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output 68 disable success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output 69 disable success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 1 success (II) RADEON(0): Initializing backing store (==) RADEON(0): Backing store disabled (II) RADEON(0): DRI Finishing init ! (II) RADEON(0): [DRI] installation complete (II) RADEON(0): EngineRestore (32/32) (II) RADEON(0): [drm] Added 32 65536 byte vertex/indirect buffers (II) RADEON(0): [drm] Mapped 32 vertex/indirect buffers (II) RADEON(0): [drm] dma control initialized, using IRQ 16 (II) RADEON(0): [drm] Initialized kernel GART heap manager, 5111808 (WW) RADEON(0): DRI init changed memory map, adjusting ... (WW) RADEON(0): MC_FB_LOCATION was: 0xdfffd000 is: 0xdfffd000 (WW) RADEON(0): MC_AGP_LOCATION was: 0x003f0000 is: 0xffffffc0 (II) RADEON(0): RADEONRestoreMemMapRegisters() : (II) RADEON(0): MC_FB_LOCATION : 0xdfffd000 0xdfffd000 (II) RADEON(0): MC_AGP_LOCATION : 0xffffffc0 (II) RADEON(0): Direct rendering enabled (II) RADEON(0): Setting up final surfaces (II) RADEON(0): Initializing Acceleration (II) RADEON(0): XAA Render acceleration unsupported on Radeon 9500/9700 and newer. Please use EXA instead. (II) RADEON(0): Render acceleration disabled (II) RADEON(0): EngineInit (32/32) (EE) RADEON(0): Failed to determine num pipes from DRM, falling back to manual look-up! (II) RADEON(0): num pipes is 1 (II) RADEON(0): Pitch for acceleration = 160 (II) RADEON(0): EngineRestore (32/32) (II) RADEON(0): Using XFree86 Acceleration Architecture (XAA) Screen to screen bit blits Solid filled rectangles 8x8 mono pattern filled rectangles Indirect CPU to Screen color expansion Solid Lines Scanline Image Writes Offscreen Pixmaps Setting up tile and stipple cache: 32 128x128 slots 32 256x256 slots 16 512x512 slots (II) RADEON(0): Acceleration enabled (II) RADEON(0): Initializing DPMS (**) Option "dpms" "true" (**) RADEON(0): DPMS enabled (II) RADEON(0): Initializing Cursor (==) RADEON(0): Silken mouse enabled (II) RADEON(0): Using hardware cursor 0 (scanline 1282) (II) RADEON(0): Using hardware cursor 1 (scanline 1285) (II) RADEON(0): Largest offscreen area available: 1280 x 6902 (II) RADEON(0): Initializing DGA (II) RADEON(0): Initializing Xv (II) RADEON(0): Set up textured video (II) RADEON(0): RandR 1.2 enabled, ignore the following RandR disabled message. (II) RADEON(0): Initializing color map (II) RADEON(0): RADEONScreenInit finished (--) RandR disabled (II) Initializing built-in extension MIT-SHM (II) Initializing built-in extension XInputExtension (II) Initializing built-in extension XTEST (II) Initializing built-in extension XKEYBOARD (II) Initializing built-in extension XC-APPGROUP (II) Initializing built-in extension XAccessControlExtension (II) Initializing built-in extension SECURITY (II) Initializing built-in extension XINERAMA (II) Initializing built-in extension XFIXES (II) Initializing built-in extension XFree86-Bigfont (II) Initializing built-in extension RENDER (II) Initializing built-in extension RANDR (II) Initializing built-in extension COMPOSITE (II) Initializing built-in extension DAMAGE (II) Initializing built-in extension XEVIE drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 10, (OK) drmOpenByBusid: Searching for BusID pci:0000:01:00.0 drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 10, (OK) drmOpenByBusid: drmOpenMinor returns 10 drmOpenByBusid: drmGetBusid reports pci:0000:05:00.0 drmOpenDevice: node name is /dev/dri/card1 drmOpenDevice: open result is 10, (OK) drmOpenByBusid: drmOpenMinor returns 10 drmOpenByBusid: drmGetBusid reports pci:0000:01:00.0 (EE) AIGLX error: Calling driver entry point failed(EE) AIGLX: reverting to software rendering (II) Loading sub module "GLcore" (II) LoadModule: "GLcore" (II) Loading /usr/lib/xorg/modules/extensions//libGLcore.so (II) Module GLcore: vendor="X.Org Foundation" compiled for 1.4.0.90, module version = 1.0.0 ABI class: X.Org Server Extension, version 0.3 (II) GLX: Initialized MESA-PROXY GL provider for screen 0 (II) RADEON(0): Setting screen physical size to 338 x 270 (**) Option "CorePointer" (**) No Mouse: always reports core events (**) Option "CoreKeyboard" (**) No Keyboard: always reports core events (II) evaluating device (No Keyboard) (II) XINPUT: Adding extended input device "No Keyboard" (type: Void) (II) evaluating device (No Mouse) (II) XINPUT: Adding extended input device "No Mouse" (type: Void) (II) RADEON(0): RADEONSaveScreen(2) (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Unblank CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output 68 enable success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Unblank CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output 69 enable success GetModeLine - scrn: 0 clock: 108000 GetModeLine - hdsp: 1280 hbeg: 1328 hend: 1440 httl: 1688 vdsp: 1024 vbeg: 1025 vend: 1028 vttl: 1066 flags: 5 GetModeLine - scrn: 0 clock: 108000 GetModeLine - hdsp: 1280 hbeg: 1328 hend: 1440 httl: 1688 vdsp: 1024 vbeg: 1025 vend: 1028 vttl: 1066 flags: 5