xauth: creating new authority file /root/.serverauth.3794 (II) config/hal: initialized _XSERVTransSocketOpenCOTSServer: Unable to open socket for inet6 _XSERVTransOpen: transport open failed for inet6/spellcaster:0 _XSERVTransMakeAllCOTSServerListeners: failed to open listener for inet6 X.Org X Server 1.5.3 Release Date: 5 November 2008 X Protocol Version 11, Revision 0 Build Operating System: Linux 2.6.28-gentoo-r1 x86_64 Current Operating System: Linux spellcaster 2.6.28-gentoo-r1 #4 SMP PREEMPT Thu Feb 5 16:07:27 CET 2009 x86_64 Build Date: 05 February 2009 02:59:33PM Before reporting problems, check http://wiki.x.org to make sure that you have the latest version. Markers: (--) probed, (**) from config file, (==) default setting, (++) from command line, (!!) notice, (II) informational, (WW) warning, (EE) error, (NI) not implemented, (??) unknown. (==) Log file: "/var/log/Xorg.0.log", Time: Fri Feb 13 15:49:57 2009 (==) Using config file: "/etc/X11/xorg.conf" (==) No Layout section. Using the first Screen section. (==) No screen section available. Using defaults. (**) |-->Screen "Default Screen Section" (0) (**) | |-->Monitor "" (==) No device specified for screen "Default Screen Section". Using the first device section listed. (**) | |-->Device "X4850" (==) No monitor specified for screen "Default Screen Section". Using a default monitor configuration. (==) Automatically adding devices (==) Automatically enabling devices (==) FontPath set to: /usr/share/fonts/misc/, /usr/share/fonts/TTF/, /usr/share/fonts/OTF, /usr/share/fonts/Type1/, /usr/share/fonts/100dpi/, /usr/share/fonts/75dpi/, built-ins (==) ModulePath set to "/usr/lib64/xorg/modules" (II) Cannot locate a core pointer device. (II) Cannot locate a core keyboard device. (II) The server relies on HAL to provide the list of input devices. If no devices become available, reconfigure HAL or disable AllowEmptyInput. (II) Open ACPI successful (/var/run/acpid.socket) (II) Loader magic: 0x7b2e40 (II) Module ABI versions: X.Org ANSI C Emulation: 0.4 X.Org Video Driver: 4.1 X.Org XInput driver : 2.1 X.Org Server Extension : 1.1 X.Org Font Renderer : 0.6 (II) Loader running on linux (--) using VT number 7 (--) PCI:*(0@3:0:0) ATI Technologies Inc RV770 [Radeon HD 4850] rev 0, Mem @ 0xe0000000/268435456, 0xfdce0000/65536, I/O @ 0x00008c00/256, BIOS @ 0x????????/131072 (II) System resource ranges: [0] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [5] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [6] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [7] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [8] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [9] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [10] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [11] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [12] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [13] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [14] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [15] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [16] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [17] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [18] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [19] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [20] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [21] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [22] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [23] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] (II) LoadModule: "extmod" (II) Loading /usr/lib64/xorg/modules/extensions//libextmod.so (II) Module extmod: vendor="X.Org Foundation" compiled for 1.5.3, module version = 1.0.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 1.1 (II) Loading extension SHAPE (II) Loading extension MIT-SUNDRY-NONSTANDARD (II) Loading extension BIG-REQUESTS (II) Loading extension SYNC (II) Loading extension MIT-SCREEN-SAVER (II) Loading extension XC-MISC (II) Loading extension XFree86-VidModeExtension (II) Loading extension XFree86-Misc (II) Loading extension XFree86-DGA (II) Loading extension DPMS (II) Loading extension TOG-CUP (II) Loading extension Extended-Visual-Information (II) Loading extension XVideo (II) Loading extension XVideo-MotionCompensation (II) Loading extension X-Resource (II) LoadModule: "dbe" (II) Loading /usr/lib64/xorg/modules/extensions//libdbe.so (II) Module dbe: vendor="X.Org Foundation" compiled for 1.5.3, module version = 1.0.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 1.1 (II) Loading extension DOUBLE-BUFFER (II) LoadModule: "glx" (II) Loading /usr/lib64/xorg/modules/extensions//libglx.so (II) Module glx: vendor="X.Org Foundation" compiled for 1.5.3, module version = 1.0.0 ABI class: X.Org Server Extension, version 1.1 (==) AIGLX enabled (==) Exporting typical set of GLX visuals (II) Loading extension GLX (II) LoadModule: "freetype" (II) Loading /usr/lib64/xorg/modules/fonts//libfreetype.so (II) Module freetype: vendor="X.Org Foundation & the After X-TT Project" compiled for 1.5.3, module version = 2.1.0 Module class: X.Org Font Renderer ABI class: X.Org Font Renderer, version 0.6 (II) Loading font FreeType (II) LoadModule: "record" (II) Loading /usr/lib64/xorg/modules/extensions//librecord.so (II) Module record: vendor="X.Org Foundation" compiled for 1.5.3, module version = 1.13.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 1.1 (II) Loading extension RECORD (II) LoadModule: "dri" (II) Loading /usr/lib64/xorg/modules/extensions//libdri.so (II) Module dri: vendor="X.Org Foundation" compiled for 7.4.0, module version = 1.0.0 ABI class: X.Org Server Extension, version 1.1 (II) Loading extension XFree86-DRI (II) LoadModule: "ati" (II) Loading /usr/lib64/xorg/modules/drivers//ati_drv.so (II) Module ati: vendor="X.Org Foundation" compiled for 1.5.3, module version = 6.10.99 Module class: X.Org Video Driver ABI class: X.Org Video Driver, version 4.1 (II) LoadModule: "radeon" (II) Loading /usr/lib64/xorg/modules/drivers//radeon_drv.so (II) Module radeon: vendor="X.Org Foundation" compiled for 1.5.3, module version = 6.10.99 Module class: X.Org Video Driver ABI class: X.Org Video Driver, version 4.1 (II) RADEON: Driver for ATI Radeon chipsets: ATI Radeon Mobility X600 (M24) 3150 (PCIE), ATI FireMV 2400 (PCI), ATI Radeon Mobility X300 (M24) 3152 (PCIE), ATI FireGL M24 GL 3154 (PCIE), ATI Radeon X600 (RV380) 3E50 (PCIE), ATI FireGL V3200 (RV380) 3E54 (PCIE), ATI Radeon IGP320 (A3) 4136, ATI Radeon IGP330/340/350 (A4) 4137, ATI Radeon 9500 AD (AGP), ATI Radeon 9500 AE (AGP), ATI Radeon 9600TX AF (AGP), ATI FireGL Z1 AG (AGP), ATI Radeon 9800SE AH (AGP), ATI Radeon 9800 AI (AGP), ATI Radeon 9800 AJ (AGP), ATI FireGL X2 AK (AGP), ATI Radeon 9600 AP (AGP), ATI Radeon 9600SE AQ (AGP), ATI Radeon 9600XT AR (AGP), ATI Radeon 9600 AS (AGP), ATI FireGL T2 AT (AGP), ATI Radeon 9650, ATI FireGL RV360 AV (AGP), ATI Radeon 7000 IGP (A4+) 4237, ATI Radeon 8500 AIW BB (AGP), ATI Radeon 8500 AIW BC (AGP), ATI Radeon IGP320M (U1) 4336, ATI Radeon IGP330M/340M/350M (U2) 4337, ATI Radeon Mobility 7000 IGP 4437, ATI Radeon 9000/PRO If (AGP/PCI), ATI Radeon 9000 Ig (AGP/PCI), ATI Radeon X800 (R420) JH (AGP), ATI Radeon X800PRO (R420) JI (AGP), ATI Radeon X800SE (R420) JJ (AGP), ATI Radeon X800 (R420) JK (AGP), ATI Radeon X800 (R420) JL (AGP), ATI FireGL X3 (R420) JM (AGP), ATI Radeon Mobility 9800 (M18) JN (AGP), ATI Radeon X800 SE (R420) (AGP), ATI Radeon X800XT (R420) JP (AGP), ATI Radeon X850 XT (R480) (AGP), ATI Radeon X850 SE (R480) (AGP), ATI Radeon X850 PRO (R480) (AGP), ATI Radeon X850 XT PE (R480) (AGP), ATI Radeon Mobility M7 LW (AGP), ATI Mobility FireGL 7800 M7 LX (AGP), ATI Radeon Mobility M6 LY (AGP), ATI Radeon Mobility M6 LZ (AGP), ATI FireGL Mobility 9000 (M9) Ld (AGP), ATI Radeon Mobility 9000 (M9) Lf (AGP), ATI Radeon Mobility 9000 (M9) Lg (AGP), ATI Radeon 9700 Pro ND (AGP), ATI Radeon 9700/9500Pro NE (AGP), ATI Radeon 9600TX NF (AGP), ATI FireGL X1 NG (AGP), ATI Radeon 9800PRO NH (AGP), ATI Radeon 9800 NI (AGP), ATI FireGL X2 NK (AGP), ATI Radeon 9800XT NJ (AGP), ATI Radeon Mobility 9600/9700 (M10/M11) NP (AGP), ATI Radeon Mobility 9600 (M10) NQ (AGP), ATI Radeon Mobility 9600 (M11) NR (AGP), ATI Radeon Mobility 9600 (M10) NS (AGP), ATI FireGL Mobility T2 (M10) NT (AGP), ATI FireGL Mobility T2e (M11) NV (AGP), ATI Radeon QD (AGP), ATI Radeon QE (AGP), ATI Radeon QF (AGP), ATI Radeon QG (AGP), ATI FireGL 8700/8800 QH (AGP), ATI Radeon 8500 QL (AGP), ATI Radeon 9100 QM (AGP), ATI Radeon 7500 QW (AGP/PCI), ATI Radeon 7500 QX (AGP/PCI), ATI Radeon VE/7000 QY (AGP/PCI), ATI Radeon VE/7000 QZ (AGP/PCI), ATI ES1000 515E (PCI), ATI Radeon Mobility X300 (M22) 5460 (PCIE), ATI Radeon Mobility X600 SE (M24C) 5462 (PCIE), ATI FireGL M22 GL 5464 (PCIE), ATI Radeon X800 (R423) UH (PCIE), ATI Radeon X800PRO (R423) UI (PCIE), ATI Radeon X800LE (R423) UJ (PCIE), ATI Radeon X800SE (R423) UK (PCIE), ATI Radeon X800 XTP (R430) (PCIE), ATI Radeon X800 XL (R430) (PCIE), ATI Radeon X800 SE (R430) (PCIE), ATI Radeon X800 (R430) (PCIE), ATI FireGL V7100 (R423) (PCIE), ATI FireGL V5100 (R423) UQ (PCIE), ATI FireGL unknown (R423) UR (PCIE), ATI FireGL unknown (R423) UT (PCIE), ATI Mobility FireGL V5000 (M26) (PCIE), ATI Mobility FireGL V5000 (M26) (PCIE), ATI Mobility Radeon X700 XL (M26) (PCIE), ATI Mobility Radeon X700 (M26) (PCIE), ATI Mobility Radeon X700 (M26) (PCIE), ATI Radeon X550XTX 5657 (PCIE), ATI Radeon 9100 IGP (A5) 5834, ATI Radeon Mobility 9100 IGP (U3) 5835, ATI Radeon XPRESS 200 5954 (PCIE), ATI Radeon XPRESS 200M 5955 (PCIE), ATI Radeon 9250 5960 (AGP), ATI Radeon 9200 5961 (AGP), ATI Radeon 9200 5962 (AGP), ATI Radeon 9200SE 5964 (AGP), ATI FireMV 2200 (PCI), ATI ES1000 5969 (PCI), ATI Radeon XPRESS 200 5974 (PCIE), ATI Radeon XPRESS 200M 5975 (PCIE), ATI Radeon XPRESS 200 5A41 (PCIE), ATI Radeon XPRESS 200M 5A42 (PCIE), ATI Radeon XPRESS 200 5A61 (PCIE), ATI Radeon XPRESS 200M 5A62 (PCIE), ATI Radeon X300 (RV370) 5B60 (PCIE), ATI Radeon X600 (RV370) 5B62 (PCIE), ATI Radeon X550 (RV370) 5B63 (PCIE), ATI FireGL V3100 (RV370) 5B64 (PCIE), ATI FireMV 2200 PCIE (RV370) 5B65 (PCIE), ATI Radeon Mobility 9200 (M9+) 5C61 (AGP), ATI Radeon Mobility 9200 (M9+) 5C63 (AGP), ATI Mobility Radeon X800 XT (M28) (PCIE), ATI Mobility FireGL V5100 (M28) (PCIE), ATI Mobility Radeon X800 (M28) (PCIE), ATI Radeon X850 5D4C (PCIE), ATI Radeon X850 XT PE (R480) (PCIE), ATI Radeon X850 SE (R480) (PCIE), ATI Radeon X850 PRO (R480) (PCIE), ATI unknown Radeon / FireGL (R480) 5D50 (PCIE), ATI Radeon X850 XT (R480) (PCIE), ATI Radeon X800XT (R423) 5D57 (PCIE), ATI FireGL V5000 (RV410) (PCIE), ATI Radeon X700 XT (RV410) (PCIE), ATI Radeon X700 PRO (RV410) (PCIE), ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X700 (RV410) (PCIE), ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X1800, ATI Mobility Radeon X1800 XT, ATI Mobility Radeon X1800, ATI Mobility FireGL V7200, ATI FireGL V7200, ATI FireGL V5300, ATI Mobility FireGL V7100, ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800, ATI FireGL V7300, ATI FireGL V7350, ATI Radeon X1600, ATI RV505, ATI Radeon X1300/X1550, ATI Radeon X1550, ATI M54-GL, ATI Mobility Radeon X1400, ATI Radeon X1300/X1550, ATI Radeon X1550 64-bit, ATI Mobility Radeon X1300, ATI Mobility Radeon X1300, ATI Mobility Radeon X1300, ATI Mobility Radeon X1300, ATI Radeon X1300, ATI Radeon X1300, ATI RV505, ATI RV505, ATI FireGL V3300, ATI FireGL V3350, ATI Radeon X1300, ATI Radeon X1550 64-bit, ATI Radeon X1300/X1550, ATI Radeon X1600, ATI Radeon X1300/X1550, ATI Mobility Radeon X1450, ATI Radeon X1300/X1550, ATI Mobility Radeon X2300, ATI Mobility Radeon X2300, ATI Mobility Radeon X1350, ATI Mobility Radeon X1350, ATI Mobility Radeon X1450, ATI Radeon X1300, ATI Radeon X1550, ATI Mobility Radeon X1350, ATI FireMV 2250, ATI Radeon X1550 64-bit, ATI Radeon X1600, ATI Radeon X1650, ATI Radeon X1600, ATI Radeon X1600, ATI Mobility FireGL V5200, ATI Mobility Radeon X1600, ATI Radeon X1650, ATI Radeon X1650, ATI Radeon X1600, ATI Radeon X1300 XT/X1600 Pro, ATI FireGL V3400, ATI Mobility FireGL V5250, ATI Mobility Radeon X1700, ATI Mobility Radeon X1700 XT, ATI FireGL V5200, ATI Mobility Radeon X1700, ATI Radeon X2300HD, ATI Mobility Radeon HD 2300, ATI Mobility Radeon HD 2300, ATI Radeon X1950, ATI Radeon X1900, ATI Radeon X1950, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI AMD Stream Processor, ATI Radeon X1900, ATI Radeon X1950, ATI RV560, ATI RV560, ATI Mobility Radeon X1900, ATI RV560, ATI Radeon X1950 GT, ATI RV570, ATI RV570, ATI FireGL V7400, ATI RV560, ATI Radeon X1650, ATI Radeon X1650, ATI RV560, ATI Radeon 9100 PRO IGP 7834, ATI Radeon Mobility 9200 IGP 7835, ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200, ATI RS740, ATI RS740M, ATI RS740, ATI RS740M, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 Pro, ATI Radeon HD 2900 GT, ATI FireGL V8650, ATI FireGL V8600, ATI FireGL V7600, ATI Radeon 4800 Series, ATI Radeon HD 4870 x2, ATI Radeon 4800 Series, ATI FirePro V8750 (FireGL), ATI FirePro V7760 (FireGL), ATI Mobility RADEON HD 4850, ATI Mobility RADEON HD 4850 X2, ATI Radeon 4800 Series, ATI FirePro RV770, AMD FireStream 9270, AMD FireStream 9250, ATI FirePro V8700 (FireGL), ATI Mobility RADEON HD 4870, ATI Mobility RADEON M98, ATI FirePro M7750, ATI M98, ATI M98, ATI M98, ATI Radeon RV730 (AGP), ATI FirePro M5750, ATI Radeon RV730 (AGP), ATI RV730XT [Radeon HD 4670], ATI RADEON E4600, ATI RV730 PRO [Radeon HD 4650], ATI FirePro V7750 (FireGL), ATI FirePro V5700 (FireGL), ATI FirePro V3750 (FireGL), ATI RV610, ATI Radeon HD 2400 XT, ATI Radeon HD 2400 Pro, ATI Radeon HD 2400 PRO AGP, ATI FireGL V4000, ATI RV610, ATI Radeon HD 2350, ATI Mobility Radeon HD 2400 XT, ATI Mobility Radeon HD 2400, ATI RADEON E2400, ATI RV610, ATI FireMV 2260, ATI RV670, ATI Radeon HD3870, ATI Mobility Radeon HD 3850, ATI Radeon HD3850, ATI Mobility Radeon HD 3850 X2, ATI RV670, ATI Mobility Radeon HD 3870, ATI Mobility Radeon HD 3870 X2, ATI Radeon HD3870 X2, ATI FireGL V7700, ATI Radeon HD3850, ATI Radeon HD3690, AMD Firestream 9170, ATI Radeon HD 4550, ATI Radeon RV710, ATI Radeon RV710, ATI Radeon HD 4350, ATI Mobility Radeon 4300 Series, ATI Mobility Radeon 4500 Series, ATI Mobility Radeon 4500 Series, ATI RV630, ATI Mobility Radeon HD 2600, ATI Mobility Radeon HD 2600 XT, ATI Radeon HD 2600 XT AGP, ATI Radeon HD 2600 Pro AGP, ATI Radeon HD 2600 XT, ATI Radeon HD 2600 Pro, ATI Gemini RV630, ATI Gemini Mobility Radeon HD 2600 XT, ATI FireGL V5600, ATI FireGL V3600, ATI Radeon HD 2600 LE, ATI Mobility FireGL Graphics Processor, ATI Radeon RV710, ATI Radeon HD 3470, ATI Mobility Radeon HD 3430, ATI Mobility Radeon HD 3400 Series, ATI Radeon HD 3450, ATI Radeon HD 3450, ATI Radeon HD 3430, ATI Radeon HD 3450, ATI FirePro V3700, ATI FireMV 2450, ATI FireMV 2260, ATI FireMV 2260, ATI Radeon HD 3600 Series, ATI Radeon HD 3650 AGP, ATI Radeon HD 3600 PRO, ATI Radeon HD 3600 XT, ATI Radeon HD 3600 PRO, ATI Mobility Radeon HD 3650, ATI Mobility Radeon HD 3670, ATI Mobility FireGL V5700, ATI Mobility FireGL V5725, ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics, ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics, ATI Radeon HD 3300 Graphics (II) Primary Device is: PCI 03@00:00:0 (II) resource ranges after xf86ClaimFixedResources() call: [0] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [5] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [6] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [7] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [8] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [9] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [10] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [11] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [12] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [13] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [14] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [15] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [16] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [17] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [18] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [19] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [20] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [21] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [22] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [23] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] (II) resource ranges after probing: [0] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [5] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [6] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [7] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [8] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [9] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [10] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [11] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [12] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [13] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [14] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [15] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [16] 0 0 0x000a0000 - 0x000affff (0x10000) MS[B] [17] 0 0 0x000b0000 - 0x000b7fff (0x8000) MS[B] [18] 0 0 0x000b8000 - 0x000bffff (0x8000) MS[B] [19] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [20] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [21] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [22] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [23] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [24] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [25] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [26] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [27] 0 0 0x000003b0 - 0x000003bb (0xc) IS[B] [28] 0 0 0x000003c0 - 0x000003df (0x20) IS[B] (II) Setting vga for screen 0. (II) RADEON(0): RADEONPreInit (II) RADEON(0): TOTO SAYS 00000000fdce0000 (II) RADEON(0): MMIO registers at 0x00000000fdce0000: size 64KB (II) RADEON(0): PCI bus 3 card 0 func 0 (II) RADEON(0): Creating default Display subsection in Screen section "Default Screen Section" for depth/fbbpp 24/32 (==) RADEON(0): Depth 24, (--) framebuffer bpp 32 (II) RADEON(0): Pixel depth = 24 bits stored in 4 bytes (32 bpp pixmaps) (==) RADEON(0): Default visual is TrueColor (II) Loading sub module "vgahw" (II) LoadModule: "vgahw" (II) Loading /usr/lib64/xorg/modules//libvgahw.so (II) Module vgahw: vendor="X.Org Foundation" compiled for 1.5.3, module version = 0.1.0 ABI class: X.Org Video Driver, version 4.1 (II) RADEON(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000 (==) RADEON(0): RGB weight 888 (II) RADEON(0): Using 8 bits per RGB (8 bit DAC) (--) RADEON(0): Chipset: "ATI Radeon 4800 Series" (ChipID = 0x9442) (WW) RADEON(0): R600 support is mostly incomplete and very experimental (--) RADEON(0): Linear framebuffer at 0x00000000e0000000 (II) RADEON(0): PCIE card detected (II) Loading sub module "int10" (II) LoadModule: "int10" (II) Loading /usr/lib64/xorg/modules//libint10.so (II) Module int10: vendor="X.Org Foundation" compiled for 1.5.3, module version = 1.0.0 ABI class: X.Org Video Driver, version 4.1 (II) RADEON(0): initializing int10 (II) RADEON(0): Primary V_BIOS segment is: 0xc000 (II) RADEON(0): ATOM BIOS detected (II) RADEON(0): ATOM BIOS Rom: SubsystemVendorID: 0x1462 SubsystemID: 0x1510 IOBaseAddress: 0x8c00 Filename: SV29825a.bin BIOS Bootup Message: 113-MSITV151MS.106 RV770PRO SAMSUNG 16MX32 256BIT/512MB (II) RADEON(0): Call to AtomBIOS Init succeeded (II) RADEON(0): Framebuffer space used by Firmware (kb): 20 (II) RADEON(0): Start of VRAM area used by Firmware: 0x7ffec (II) RADEON(0): AtomBIOS requests 20kB of VRAM scratch space (II) RADEON(0): AtomBIOS VRAM scratch base: 0x7ffec (II) RADEON(0): Cannot get VRAM scratch space. Allocating in main memory instead (II) RADEON(0): Call to AtomBIOS Set FB Space succeeded (II) RADEON(0): Default Engine Clock: 625000 (II) RADEON(0): Default Memory Clock: 993000 (II) RADEON(0): Maximum Pixel ClockPLL Frequency Output: 1200000 (II) RADEON(0): Minimum Pixel ClockPLL Frequency Output: 0 (II) RADEON(0): Maximum Pixel ClockPLL Frequency Input: 16000 (II) RADEON(0): Minimum Pixel ClockPLL Frequency Input: 6000 (II) RADEON(0): Maximum Pixel Clock: 400000 (II) RADEON(0): Reference Clock: 100000 (II) RADEON(0): Direct rendering not officially supported on RN50/RS600/R600 (II) RADEON(0): Generation 2 PCI interface, using max accessible memory (II) RADEON(0): Detected total video RAM=524288K, accessible=262144K (PCI BAR=262144K) (--) RADEON(0): Mapped VideoRAM: 262144 kByte (128 bit DDR SDRAM) (II) RADEON(0): Color tiling disabled (II) RADEON(0): Max desktop size set to 2560x1600 (II) RADEON(0): For a larger or smaller max desktop size, add a Virtual line to your xorg.conf (II) RADEON(0): If you are having trouble with 3D, reduce the desktop size by adjusting the Virtual line to your xorg.conf (II) Loading sub module "ddc" (II) LoadModule: "ddc" (II) Module "ddc" already built-in (II) Loading sub module "i2c" (II) LoadModule: "i2c" (II) Module "i2c" already built-in (II) RADEON(0): ref_freq: 10000, min_out_pll: 64800, max_out_pll: 120000, min_in_pll: 600, max_in_pll: 1600, xclk: 40000, sclk: 625.000000, mclk: 993.000000 (II) RADEON(0): PLL parameters: rf=10000 rd=12 min=64800 max=120000; xclk=40000 (II) RADEON(0): Output DVI-1 using monitor section tft (**) RADEON(0): Option "PreferredMode" "1280x1024" (II) RADEON(0): I2C bus "DVI-1" initialized. (II) RADEON(0): Output DVI-0 using monitor section crt (**) RADEON(0): Option "PreferredMode" "1280x1024" (**) RADEON(0): Option "LeftOf" "tft" (II) RADEON(0): I2C bus "DVI-0" initialized. (II) RADEON(0): Port0: XRANDR name: DVI-1 Connector: DVI-I CRT2: INTERNAL_KLDSCP_DAC2 DFP1: INTERNAL_UNIPHY DDC reg: 0x7e60 (II) RADEON(0): Port1: XRANDR name: DVI-0 Connector: DVI-I CRT1: INTERNAL_KLDSCP_DAC1 DFP2: INTERNAL_KLDSCP_LVTMA DDC reg: 0x7e20 (II) RADEON(0): I2C device "DVI-1:ddc2" registered at address 0xA0. (II) RADEON(0): EDID vendor "IVM", prod id 18458 (II) RADEON(0): Using EDID range info for horizontal sync (II) RADEON(0): Using EDID range info for vertical refresh (II) RADEON(0): Printing DDC gathered Modelines: (II) RADEON(0): Modeline "1280x1024"x0.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz) (II) RADEON(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz) (II) RADEON(0): Modeline "800x600"x0.0 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz) (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz) (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 491 520 -hsync -vsync (37.9 kHz) (II) RADEON(0): Modeline "640x480"x0.0 30.24 640 704 768 864 480 483 486 525 -hsync -vsync (35.0 kHz) (II) RADEON(0): Modeline "640x480"x0.0 25.20 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz) (II) RADEON(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz) (II) RADEON(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz) (II) RADEON(0): Modeline "1024x768"x0.0 78.80 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.1 kHz) (II) RADEON(0): Modeline "1024x768"x0.0 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz) (II) RADEON(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz) (II) RADEON(0): Modeline "832x624"x0.0 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz) (II) RADEON(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz) (II) RADEON(0): Modeline "800x600"x0.0 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz) (II) RADEON(0): Modeline "1280x1024"x60.0 108.88 1280 1360 1496 1712 1024 1025 1028 1060 -hsync +vsync (63.6 kHz) (II) RADEON(0): Modeline "1152x864"x75.0 104.99 1152 1224 1352 1552 864 865 868 902 -hsync +vsync (67.7 kHz) (II) RADEON(0): Output: DVI-1, Detected Monitor Type: 3 (II) RADEON(0): EDID data from the display on output: DVI-1 ---------------------- (II) RADEON(0): Manufacturer: IVM Model: 481a Serial#: 6827 (II) RADEON(0): Year: 2004 Week: 47 (II) RADEON(0): EDID Version: 1.3 (II) RADEON(0): Digital Display Input (II) RADEON(0): Max Image Size [cm]: horiz.: 38 vert.: 30 (II) RADEON(0): Gamma: 2.20 (II) RADEON(0): DPMS capabilities: Off (II) RADEON(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 (II) RADEON(0): First detailed timing is preferred mode (II) RADEON(0): redX: 0.640 redY: 0.344 greenX: 0.299 greenY: 0.607 (II) RADEON(0): blueX: 0.145 blueY: 0.073 whiteX: 0.312 whiteY: 0.328 (II) RADEON(0): Supported VESA Video Modes: (II) RADEON(0): 720x400@70Hz (II) RADEON(0): 640x480@60Hz (II) RADEON(0): 640x480@67Hz (II) RADEON(0): 640x480@72Hz (II) RADEON(0): 640x480@75Hz (II) RADEON(0): 800x600@56Hz (II) RADEON(0): 800x600@60Hz (II) RADEON(0): 800x600@72Hz (II) RADEON(0): 800x600@75Hz (II) RADEON(0): 832x624@75Hz (II) RADEON(0): 1024x768@60Hz (II) RADEON(0): 1024x768@70Hz (II) RADEON(0): 1024x768@75Hz (II) RADEON(0): 1280x1024@75Hz (II) RADEON(0): Manufacturer's mask: 0 (II) RADEON(0): Supported Future Video Modes: (II) RADEON(0): #0: hsize: 1280 vsize 1024 refresh: 60 vid: 32897 (II) RADEON(0): #1: hsize: 1152 vsize 864 refresh: 75 vid: 20337 (II) RADEON(0): Supported additional Video Mode: (II) RADEON(0): clock: 108.0 MHz Image Size: 376 x 301 mm (II) RADEON(0): h_active: 1280 h_sync: 1328 h_sync_end 1440 h_blank_end 1688 h_border: 0 (II) RADEON(0): v_active: 1024 v_sync: 1025 v_sync_end 1028 v_blanking: 1066 v_border: 0 (II) RADEON(0): Serial No: 05370G4B06827 (II) RADEON(0): Ranges: V min: 55 V max: 76 Hz, H min: 24 H max: 83 kHz, PixClock max 140 MHz (II) RADEON(0): Monitor name: PLE481S (II) RADEON(0): EDID (in hex): (II) RADEON(0): 00ffffffffffff0026cd1a48ab1a0000 (II) RADEON(0): 2f0e010380261e782aca30a3584c9b25 (II) RADEON(0): 125054bfef008180714f010101010101 (II) RADEON(0): 010101010101302a009851002a403070 (II) RADEON(0): 1300782d1100001e000000ff00303533 (II) RADEON(0): 37304734423036383237000000fd0037 (II) RADEON(0): 4c18530e000a202020202020000000fc (II) RADEON(0): 00504c45343831530a202020202000e3 finished output detect: 0 (II) RADEON(0): I2C device "DVI-0:ddc2" registered at address 0xA0. (II) RADEON(0): Output: DVI-0, Detected Monitor Type: 1 (II) RADEON(0): EDID data from the display on output: DVI-0 ---------------------- (II) RADEON(0): Manufacturer: IMR Model: 986a Serial#: 0 (II) RADEON(0): Year: 1999 Week: 24 (II) RADEON(0): EDID Version: 1.1 (II) RADEON(0): Analog Display Input, Input Voltage Level: 0.700/0.300 V (II) RADEON(0): Sync: Separate Composite (II) RADEON(0): Max Image Size [cm]: horiz.: 36 vert.: 27 (II) RADEON(0): Gamma: 2.00 (II) RADEON(0): DPMS capabilities: StandBy Suspend Off; RGB/Color Display (II) RADEON(0): redX: 0.632 redY: 0.330 greenX: 0.273 greenY: 0.605 (II) RADEON(0): blueX: 0.142 blueY: 0.063 whiteX: 0.281 whiteY: 0.311 (II) RADEON(0): Supported VESA Video Modes: (II) RADEON(0): 720x400@70Hz (II) RADEON(0): 640x480@60Hz (II) RADEON(0): 832x624@75Hz (II) RADEON(0): 1280x1024@75Hz (II) RADEON(0): Manufacturer's mask: 0 (II) RADEON(0): Supported Future Video Modes: (II) RADEON(0): #0: hsize: 640 vsize 480 refresh: 85 vid: 22833 (II) RADEON(0): #1: hsize: 800 vsize 600 refresh: 85 vid: 22853 (II) RADEON(0): #2: hsize: 1024 vsize 768 refresh: 85 vid: 22881 (II) RADEON(0): #3: hsize: 1600 vsize 1200 refresh: 75 vid: 20393 (II) RADEON(0): #4: hsize: 1280 vsize 960 refresh: 85 vid: 22913 (II) RADEON(0): #5: hsize: 1152 vsize 864 refresh: 75 vid: 20337 (II) RADEON(0): #6: hsize: 1024 vsize 768 refresh: 100 vid: 26721 (II) RADEON(0): Supported additional Video Mode: (II) RADEON(0): clock: 55.0 MHz Image Size: 360 x 270 mm (II) RADEON(0): h_active: 640 h_sync: 672 h_sync_end 768 h_blank_end 864 h_border: 0 (II) RADEON(0): v_active: 480 v_sync: 488 v_sync_end 494 v_blanking: 536 v_border: 0 (II) RADEON(0): Supported additional Video Mode: (II) RADEON(0): clock: 157.0 MHz Image Size: 360 x 270 mm (II) RADEON(0): h_active: 1280 h_sync: 1344 h_sync_end 1504 h_blank_end 1728 h_border: 0 (II) RADEON(0): v_active: 1024 v_sync: 1025 v_sync_end 1028 v_blanking: 1072 v_border: 0 (II) RADEON(0): Ranges: V min: 45 V max: 150 Hz, H min: 28 H max: 96 kHz, (WW) RADEON(0): Unknown vendor-specific block 0 (II) RADEON(0): EDID (in hex): (II) RADEON(0): 00ffffffffffff0025b26a9800000000 (II) RADEON(0): 180901010c241b64e8e052a154469b24 (II) RADEON(0): 10484fa02100315945596159a94f8159 (II) RADEON(0): 714f616801017c1580e020e038102060 (II) RADEON(0): 8600680e11000018543d00c051003040 (II) RADEON(0): 40a01300680e1100001e000000fd002d (II) RADEON(0): 961c60ff000a20202020202000000000 (II) RADEON(0): 00000000000000000000000000000013 finished output detect: 1 finished all detect before xf86InitialConfiguration (II) RADEON(0): EDID vendor "IVM", prod id 18458 (II) RADEON(0): Using hsync ranges from config file (II) RADEON(0): Using vrefresh ranges from config file (II) RADEON(0): Printing DDC gathered Modelines: (II) RADEON(0): Modeline "1280x1024"x0.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz) (II) RADEON(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz) (II) RADEON(0): Modeline "800x600"x0.0 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz) (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz) (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 491 520 -hsync -vsync (37.9 kHz) (II) RADEON(0): Modeline "640x480"x0.0 30.24 640 704 768 864 480 483 486 525 -hsync -vsync (35.0 kHz) (II) RADEON(0): Modeline "640x480"x0.0 25.20 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz) (II) RADEON(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz) (II) RADEON(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz) (II) RADEON(0): Modeline "1024x768"x0.0 78.80 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.1 kHz) (II) RADEON(0): Modeline "1024x768"x0.0 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz) (II) RADEON(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz) (II) RADEON(0): Modeline "832x624"x0.0 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz) (II) RADEON(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz) (II) RADEON(0): Modeline "800x600"x0.0 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz) (II) RADEON(0): Modeline "1280x1024"x60.0 108.88 1280 1360 1496 1712 1024 1025 1028 1060 -hsync +vsync (63.6 kHz) (II) RADEON(0): Modeline "1152x864"x75.0 104.99 1152 1224 1352 1552 864 865 868 902 -hsync +vsync (67.7 kHz) (II) RADEON(0): Output: DVI-1, Detected Monitor Type: 3 (II) RADEON(0): EDID data from the display on output: DVI-1 ---------------------- (II) RADEON(0): Manufacturer: IVM Model: 481a Serial#: 6827 (II) RADEON(0): Year: 2004 Week: 47 (II) RADEON(0): EDID Version: 1.3 (II) RADEON(0): Digital Display Input (II) RADEON(0): Max Image Size [cm]: horiz.: 38 vert.: 30 (II) RADEON(0): Gamma: 2.20 (II) RADEON(0): DPMS capabilities: Off (II) RADEON(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 (II) RADEON(0): First detailed timing is preferred mode (II) RADEON(0): redX: 0.640 redY: 0.344 greenX: 0.299 greenY: 0.607 (II) RADEON(0): blueX: 0.145 blueY: 0.073 whiteX: 0.312 whiteY: 0.328 (II) RADEON(0): Supported VESA Video Modes: (II) RADEON(0): 720x400@70Hz (II) RADEON(0): 640x480@60Hz (II) RADEON(0): 640x480@67Hz (II) RADEON(0): 640x480@72Hz (II) RADEON(0): 640x480@75Hz (II) RADEON(0): 800x600@56Hz (II) RADEON(0): 800x600@60Hz (II) RADEON(0): 800x600@72Hz (II) RADEON(0): 800x600@75Hz (II) RADEON(0): 832x624@75Hz (II) RADEON(0): 1024x768@60Hz (II) RADEON(0): 1024x768@70Hz (II) RADEON(0): 1024x768@75Hz (II) RADEON(0): 1280x1024@75Hz (II) RADEON(0): Manufacturer's mask: 0 (II) RADEON(0): Supported Future Video Modes: (II) RADEON(0): #0: hsize: 1280 vsize 1024 refresh: 60 vid: 32897 (II) RADEON(0): #1: hsize: 1152 vsize 864 refresh: 75 vid: 20337 (II) RADEON(0): Supported additional Video Mode: (II) RADEON(0): clock: 108.0 MHz Image Size: 376 x 301 mm (II) RADEON(0): h_active: 1280 h_sync: 1328 h_sync_end 1440 h_blank_end 1688 h_border: 0 (II) RADEON(0): v_active: 1024 v_sync: 1025 v_sync_end 1028 v_blanking: 1066 v_border: 0 (II) RADEON(0): Serial No: 05370G4B06827 (II) RADEON(0): Ranges: V min: 55 V max: 76 Hz, H min: 24 H max: 83 kHz, PixClock max 140 MHz (II) RADEON(0): Monitor name: PLE481S (II) RADEON(0): EDID (in hex): (II) RADEON(0): 00ffffffffffff0026cd1a48ab1a0000 (II) RADEON(0): 2f0e010380261e782aca30a3584c9b25 (II) RADEON(0): 125054bfef008180714f010101010101 (II) RADEON(0): 010101010101302a009851002a403070 (II) RADEON(0): 1300782d1100001e000000ff00303533 (II) RADEON(0): 37304734423036383237000000fd0037 (II) RADEON(0): 4c18530e000a202020202020000000fc (II) RADEON(0): 00504c45343831530a202020202000e3 (II) RADEON(0): Panel infos found from DDC detailed: 1280x1024 (II) RADEON(0): EDID vendor "IVM", prod id 18458 (II) RADEON(0): Output: DVI-0, Detected Monitor Type: 1 (II) RADEON(0): EDID data from the display on output: DVI-0 ---------------------- (II) RADEON(0): Manufacturer: IMR Model: 986a Serial#: 0 (II) RADEON(0): Year: 1999 Week: 24 (II) RADEON(0): EDID Version: 1.1 (II) RADEON(0): Analog Display Input, Input Voltage Level: 0.700/0.300 V (II) RADEON(0): Sync: Separate Composite (II) RADEON(0): Max Image Size [cm]: horiz.: 36 vert.: 27 (II) RADEON(0): Gamma: 2.00 (II) RADEON(0): DPMS capabilities: StandBy Suspend Off; RGB/Color Display (II) RADEON(0): redX: 0.632 redY: 0.330 greenX: 0.273 greenY: 0.605 (II) RADEON(0): blueX: 0.142 blueY: 0.063 whiteX: 0.281 whiteY: 0.311 (II) RADEON(0): Supported VESA Video Modes: (II) RADEON(0): 720x400@70Hz (II) RADEON(0): 640x480@60Hz (II) RADEON(0): 832x624@75Hz (II) RADEON(0): 1280x1024@75Hz (II) RADEON(0): Manufacturer's mask: 0 (II) RADEON(0): Supported Future Video Modes: (II) RADEON(0): #0: hsize: 640 vsize 480 refresh: 85 vid: 22833 (II) RADEON(0): #1: hsize: 800 vsize 600 refresh: 85 vid: 22853 (II) RADEON(0): #2: hsize: 1024 vsize 768 refresh: 85 vid: 22881 (II) RADEON(0): #3: hsize: 1600 vsize 1200 refresh: 75 vid: 20393 (II) RADEON(0): #4: hsize: 1280 vsize 960 refresh: 85 vid: 22913 (II) RADEON(0): #5: hsize: 1152 vsize 864 refresh: 75 vid: 20337 (II) RADEON(0): #6: hsize: 1024 vsize 768 refresh: 100 vid: 26721 (II) RADEON(0): Supported additional Video Mode: (II) RADEON(0): clock: 55.0 MHz Image Size: 360 x 270 mm (II) RADEON(0): h_active: 640 h_sync: 672 h_sync_end 768 h_blank_end 864 h_border: 0 (II) RADEON(0): v_active: 480 v_sync: 488 v_sync_end 494 v_blanking: 536 v_border: 0 (II) RADEON(0): Supported additional Video Mode: (II) RADEON(0): clock: 157.0 MHz Image Size: 360 x 270 mm (II) RADEON(0): h_active: 1280 h_sync: 1344 h_sync_end 1504 h_blank_end 1728 h_border: 0 (II) RADEON(0): v_active: 1024 v_sync: 1025 v_sync_end 1028 v_blanking: 1072 v_border: 0 (II) RADEON(0): Ranges: V min: 45 V max: 150 Hz, H min: 28 H max: 96 kHz, (WW) RADEON(0): Unknown vendor-specific block 0 (II) RADEON(0): EDID (in hex): (II) RADEON(0): 00ffffffffffff0025b26a9800000000 (II) RADEON(0): 180901010c241b64e8e052a154469b24 (II) RADEON(0): 10484fa02100315945596159a94f8159 (II) RADEON(0): 714f616801017c1580e020e038102060 (II) RADEON(0): 8600680e11000018543d00c051003040 (II) RADEON(0): 40a01300680e1100001e000000fd002d (II) RADEON(0): 961c60ff000a20202020202000000000 (II) RADEON(0): 00000000000000000000000000000013 (II) RADEON(0): EDID vendor "IMR", prod id 39018 (II) RADEON(0): Output DVI-1 connected (II) RADEON(0): Output DVI-0 connected (II) RADEON(0): Using user preference for initial modes (II) RADEON(0): Output DVI-1 using initial mode 1280x1024 (II) RADEON(0): Output DVI-0 using initial mode 1280x1024 after xf86InitialConfiguration (**) RADEON(0): Display dimensions: (380, 300) mm (**) RADEON(0): DPI set to (171, 135) (II) Loading sub module "fb" (II) LoadModule: "fb" (II) Loading /usr/lib64/xorg/modules//libfb.so (II) Module fb: vendor="X.Org Foundation" compiled for 1.5.3, module version = 1.0.0 ABI class: X.Org ANSI C Emulation, version 0.4 (==) RADEON(0): Using gamma correction (1.0, 1.0, 1.0) (II) Loading sub module "ramdac" (II) LoadModule: "ramdac" (II) Module "ramdac" already built-in (==) RADEON(0): Experimental R6xx/R7xx EXA support. (==) RADEON(0): Using EXA acceleration architecture (II) Loading sub module "exa" (II) LoadModule: "exa" (II) Loading /usr/lib64/xorg/modules//libexa.so (II) Module exa: vendor="X.Org Foundation" compiled for 1.5.3, module version = 2.4.0 ABI class: X.Org Video Driver, version 4.1 (!!) RADEON(0): For information on using the multimedia capabilities of this adapter, please see http://gatos.sf.net. (!!) RADEON(0): MergedFB support has been removed and replaced with xrandr 1.2 support (--) Depth 24 pixmap format is 32 bpp (II) do I need RAC? No, I don't. (II) resource ranges after preInit: [0] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [5] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [6] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [7] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [8] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [9] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [10] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [11] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [12] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [13] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [14] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [15] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [16] 0 0 0x000a0000 - 0x000affff (0x10000) MS[B](OprU) [17] 0 0 0x000b0000 - 0x000b7fff (0x8000) MS[B](OprU) [18] 0 0 0x000b8000 - 0x000bffff (0x8000) MS[B](OprU) [19] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [20] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [21] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [22] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [23] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [24] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [25] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [26] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [27] 0 0 0x000003b0 - 0x000003bb (0xc) IS[B](OprU) [28] 0 0 0x000003c0 - 0x000003df (0x20) IS[B](OprU) (II) RADEON(0): RADEONScreenInit e0000000 0 0 (II) RADEON(0): Map: 0x00000000e0000000, 0x10000000 (II) RADEON(0): RADEONSave (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG dpms success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC memreq 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output CRT1 disable success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC memreq 1 success mc fb loc is 00ff00e0 (II) RADEON(0): RADEONInitMemoryMap() : (II) RADEON(0): mem_size : 0x20000000 (II) RADEON(0): MC_FB_LOCATION : 0x00ff00e0 (II) RADEON(0): MC_AGP_LOCATION : 0x003f0000 (II) RADEON(0): Depth moves disabled by default (II) RADEON(0): Setting up accel memmap (II) RADEON(0): Allocating from a screen of 262144 kb (II) RADEON(0): Will use 32 kb for hardware cursor 0 at offset 0x00fa0000 (II) RADEON(0): Will use 32 kb for hardware cursor 1 at offset 0x00fa4000 (II) RADEON(0): Will use 16000 kb for front buffer at offset 0x00000000 (II) RADEON(0): Will use 246112 kb for X Server offscreen at offset 0x00fa8000 (II) RADEON(0): Initializing fb layer (II) RADEON(0): RADEONRestoreMemMapRegisters() : (II) RADEON(0): MC_FB_LOCATION : 0x00ff00e0 0x001f0000 (II) RADEON(0): MC_AGP_LOCATION : 0x003f0000 (II) RADEON(0): DC flush timeout: b768eeff (II) RADEON(0): Initializing backing store (==) RADEON(0): Backing store disabled (WW) RADEON(0): Direct rendering disabled (II) RADEON(0): Initializing Acceleration (EE) RADEON(0): Acceleration initialization failed (II) RADEON(0): Acceleration disabled (II) RADEON(0): Initializing DPMS (II) RADEON(0): DPMS enabled (II) RADEON(0): Initializing Cursor (==) RADEON(0): Silken mouse enabled (II) RADEON(0): Initializing DGA (II) RADEON(0): Initializing Xv (II) RADEON(0): Textured video requires CP on R5xx/IGP (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG dpms success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output CRT1 disable success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC memreq 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC memreq 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC memreq 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Lock CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output CRT1 disable success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG dpms success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC memreq 0 success Mode 1280x1024 - 1688 1066 5 (II) RADEON(0): RADEONRestoreMemMapRegisters() : (II) RADEON(0): MC_FB_LOCATION : 0x00ff00e0 0x00ff00e0 (II) RADEON(0): MC_AGP_LOCATION : 0x003f0000 (II) RADEON(0): DC flush timeout: b768eeff freq: 108000000 best_freq: 108000000 best_feedback_div: 108 best_ref_div: 10 best_post_div: 10 (II) RADEON(0): crtc(0) Clock: mode 108000, PLL 108000 (II) RADEON(0): crtc(0) PLL : refdiv 10, fbdiv 0x6C(108), pdiv 10 (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC 0 PLL success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC Timing success Not using RMX (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded scaler 0 setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC 0 Source success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded crtc 0 YUV disable setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG1 encoder setup success (II) RADEON(0): DIG0 transmitter: Coherent Mode enabled (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG0 transmitter setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC memreq 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Unblank CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Unlock CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output CRT1 enable success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG dpms success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC memreq 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Unblank CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC memreq 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Lock CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG dpms success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output CRT1 disable success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC memreq 1 success Mode 1280x1024 - 1728 1072 5 (II) RADEON(0): RADEONRestoreMemMapRegisters() : (II) RADEON(0): MC_FB_LOCATION : 0x00ff00e0 0x00ff00e0 (II) RADEON(0): MC_AGP_LOCATION : 0x003f0000 (II) RADEON(0): DC flush timeout: b768eeff freq: 157500000 best_freq: 157500000 best_feedback_div: 63 best_ref_div: 8 best_post_div: 5 (II) RADEON(0): crtc(1) Clock: mode 157500, PLL 157500 (II) RADEON(0): crtc(1) PLL : refdiv 8, fbdiv 0x3F(63), pdiv 5 (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC 1 PLL success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC Timing success Not using RMX (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded scaler 1 setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC 1 Source success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded crtc 1 YUV disable setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DAC1 setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC memreq 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Unblank CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Unlock CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG dpms success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output CRT1 enable success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC memreq 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Unblank CRTC 1 success (II) RADEON(0): RandR 1.2 enabled, ignore the following RandR disabled message. (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC memreq 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Lock CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output CRT1 disable success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG dpms success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC memreq 0 success Mode 1280x1024 - 1688 1066 5 (II) RADEON(0): RADEONRestoreMemMapRegisters() : (II) RADEON(0): MC_FB_LOCATION : 0x00ff00e0 0x00ff00e0 (II) RADEON(0): MC_AGP_LOCATION : 0x003f0000 (II) RADEON(0): DC flush timeout: b768eeff freq: 108000000 best_freq: 108000000 best_feedback_div: 108 best_ref_div: 10 best_post_div: 10 (II) RADEON(0): crtc(0) Clock: mode 108000, PLL 108000 (II) RADEON(0): crtc(0) PLL : refdiv 10, fbdiv 0x6C(108), pdiv 10 (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC 0 PLL success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC Timing success Not using RMX (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded scaler 0 setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC 0 Source success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded crtc 0 YUV disable setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG1 encoder setup success (II) RADEON(0): DIG0 transmitter: Coherent Mode enabled (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG0 transmitter setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC memreq 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Unblank CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Unlock CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output CRT1 enable success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG dpms success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC memreq 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Unblank CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC memreq 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Lock CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG dpms success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output CRT1 disable success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC memreq 1 success Mode 1280x1024 - 1728 1072 5 (II) RADEON(0): RADEONRestoreMemMapRegisters() : (II) RADEON(0): MC_FB_LOCATION : 0x00ff00e0 0x00ff00e0 (II) RADEON(0): MC_AGP_LOCATION : 0x003f0000 (II) RADEON(0): DC flush timeout: b768eeff freq: 157500000 best_freq: 157500000 best_feedback_div: 63 best_ref_div: 8 best_post_div: 5 (II) RADEON(0): crtc(1) Clock: mode 157500, PLL 157500 (II) RADEON(0): crtc(1) PLL : refdiv 8, fbdiv 0x3F(63), pdiv 5 (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC 1 PLL success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC Timing success Not using RMX (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded scaler 1 setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC 1 Source success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded crtc 1 YUV disable setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DAC1 setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC memreq 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Unblank CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Unlock CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG dpms success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output CRT1 enable success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC memreq 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Unblank CRTC 1 success (II) RADEON(0): Initializing color map (II) RADEON(0): RADEONScreenInit finished (--) RandR disabled (II) Initializing built-in extension MIT-SHM (II) Initializing built-in extension XInputExtension (II) Initializing built-in extension XTEST (II) Initializing built-in extension XKEYBOARD (II) Initializing built-in extension XINERAMA (II) Initializing built-in extension XFIXES (II) Initializing built-in extension RENDER (II) Initializing built-in extension RANDR (II) Initializing built-in extension COMPOSITE (II) Initializing built-in extension DAMAGE (II) Initializing built-in extension XEVIE (II) AIGLX: Screen 0 is not DRI capable (II) AIGLX: Loaded and initialized /usr/lib64/dri/swrast_dri.so (II) GLX: Initialized DRISWRAST GL provider for screen 0 (II) RADEON(0): Setting screen physical size to 752 x 301 (II) RADEON(0): RADEONSaveScreen(2) (II) config/hal: no driver specified for device /org/freedesktop/Hal/devices/platform_pcspkr_logicaldev_input (II) config/hal: Adding input device saa7134 IR (AverMedia M156 / Me (II) LoadModule: "evdev" (II) Loading /usr/lib64/xorg/modules/input//evdev_drv.so (II) Module evdev: vendor="X.Org Foundation" compiled for 1.5.3, module version = 2.1.2 Module class: X.Org XInput Driver ABI class: X.Org XInput driver, version 2.1 (**) saa7134 IR (AverMedia M156 / Me: always reports core events (**) saa7134 IR (AverMedia M156 / Me: Device: "/dev/input/event3" (II) saa7134 IR (AverMedia M156 / Me: Found keys (II) saa7134 IR (AverMedia M156 / Me: Configuring as keyboard (II) XINPUT: Adding extended input device "saa7134 IR (AverMedia M156 / Me" (type: KEYBOARD) (**) Option "xkb_rules" "evdev" (**) Option "xkb_model" "evdev" (**) Option "xkb_layout" "de" (**) Option "xkb_variant" "nodeadkeys" The XKEYBOARD keymap compiler (xkbcomp) reports: > Warning: Type "ONE_LEVEL" has 1 levels, but has 2 symbols > Ignoring extra symbols Errors from xkbcomp are not fatal to the X server (II) config/hal: Adding input device NOVATEK USB Keyboard (**) NOVATEK USB Keyboard: always reports core events (**) NOVATEK USB Keyboard: Device: "/dev/input/event7" (II) NOVATEK USB Keyboard: Found 16 mouse buttons (II) NOVATEK USB Keyboard: Found keys (II) NOVATEK USB Keyboard: Configuring as keyboard (**) NOVATEK USB Keyboard: YAxisMapping: buttons 4 and 5 (**) NOVATEK USB Keyboard: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200 (II) XINPUT: Adding extended input device "NOVATEK USB Keyboard" (type: KEYBOARD) (**) Option "xkb_rules" "evdev" (**) Option "xkb_model" "evdev" (**) Option "xkb_layout" "de" (**) Option "xkb_variant" "nodeadkeys" The XKEYBOARD keymap compiler (xkbcomp) reports: > Warning: Type "ONE_LEVEL" has 1 levels, but has 2 symbols > Ignoring extra symbols Errors from xkbcomp are not fatal to the X server (II) config/hal: Adding input device NOVATEK USB Keyboard (**) NOVATEK USB Keyboard: always reports core events (**) NOVATEK USB Keyboard: Device: "/dev/input/event6" (II) NOVATEK USB Keyboard: Found keys (II) NOVATEK USB Keyboard: Configuring as keyboard (II) XINPUT: Adding extended input device "NOVATEK USB Keyboard" (type: KEYBOARD) (**) Option "xkb_rules" "evdev" (**) Option "xkb_model" "evdev" (**) Option "xkb_layout" "de" (**) Option "xkb_variant" "nodeadkeys" The XKEYBOARD keymap compiler (xkbcomp) reports: > Warning: Type "ONE_LEVEL" has 1 levels, but has 2 symbols > Ignoring extra symbols Errors from xkbcomp are not fatal to the X server (II) config/hal: Adding input device Logitech USB-PS/2 Optical Mouse (**) Logitech USB-PS/2 Optical Mouse: always reports core events (**) Logitech USB-PS/2 Optical Mouse: Device: "/dev/input/event5" (II) Logitech USB-PS/2 Optical Mouse: Found 3 mouse buttons (II) Logitech USB-PS/2 Optical Mouse: Found x and y relative axes (II) Logitech USB-PS/2 Optical Mouse: Configuring as mouse (**) Logitech USB-PS/2 Optical Mouse: YAxisMapping: buttons 4 and 5 (**) Logitech USB-PS/2 Optical Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200 (II) XINPUT: Adding extended input device "Logitech USB-PS/2 Optical Mouse" (type: MOUSE) (II) config/hal: Adding input device USB VoIP Device (**) USB VoIP Device: always reports core events (**) USB VoIP Device: Device: "/dev/input/event4" (II) USB VoIP Device: Found keys (II) USB VoIP Device: Configuring as keyboard (II) XINPUT: Adding extended input device "USB VoIP Device" (type: KEYBOARD) (**) Option "xkb_rules" "evdev" (**) Option "xkb_model" "evdev" (**) Option "xkb_layout" "de" (**) Option "xkb_variant" "nodeadkeys" The XKEYBOARD keymap compiler (xkbcomp) reports: > Warning: Type "ONE_LEVEL" has 1 levels, but has 2 symbols > Ignoring extra symbols Errors from xkbcomp are not fatal to the X server (II) config/hal: no driver specified for device /org/freedesktop/Hal/devices/computer_logicaldev_input_0 (II) config/hal: no driver specified for device /org/freedesktop/Hal/devices/computer_logicaldev_input waiting for X server to shut down XIO: fatal IO error 4 (Interrupted system call) on X server ":0.0" after 999 requests (997 known processed) with 3 events remaining. xterm: fatal IO error 11 (Resource temporarily unavailable) or KillClient on X server ":0.0" xterm: fatal IO error 11 (Resource temporarily unavailable) or KillClient on X server ":0.0" (II) saa7134 IR (AverMedia M156 / Me: Close (II) UnloadModule: "evdev" (II) NOVATEK USB Keyboard: Close (II) UnloadModule: "evdev" (II) NOVATEK USB Keyboard: Close (II) UnloadModule: "evdev" (II) Logitech USB-PS/2 Optical Mouse: Close (II) UnloadModule: "evdev" (II) USB VoIP Device: Close (II) UnloadModule: "evdev" (II) RADEON(0): RADEONCloseScreen (II) RADEON(0): RADEONDRIStop (II) RADEON(0): RADEONRestore (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG dpms success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC memreq 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output CRT1 disable success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC memreq 1 success (II) RADEON(0): RADEONRestoreMemMapRegisters() : (II) RADEON(0): MC_FB_LOCATION : 0x001f0000 0x00ff00e0 (II) RADEON(0): MC_AGP_LOCATION : 0x00000000 .(II) RADEON(0): DC flush timeout: b768eeff (II) RADEON(0): avivo_restore ! (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC memreq 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Unblank CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC memreq 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Unblank CRTC 0 success (II) RADEON(0): Disposing accel... (II) RADEON(0): Disposing cursor info (II) RADEON(0): Disposing DGA (II) RADEON(0): Unmapping memory error setting MTRR (base = 0xe0000000, size = 0x10000000, type = 1) Invalid argument (22)