diff --git a/src/atombios_crtc.c b/src/atombios_crtc.c
index 62402a7..d7e2905 100644
--- a/src/atombios_crtc.c
+++ b/src/atombios_crtc.c
@@ -332,6 +332,17 @@ atombios_crtc_set_pll(xf86CrtcPtr crtc, DisplayModePtr mode)
 	    temp = INREG(AVIVO_P2PLL_INT_SS_CNTL);
 	    OUTREG(AVIVO_P2PLL_INT_SS_CNTL, temp & ~1);
 	}
+	for (i = 0; i < xf86_config->num_output; i++) {
+	    xf86OutputPtr output = xf86_config->output[i];
+	    if (output->crtc == crtc) {
+		radeon_encoder = radeon_get_encoder(output);
+		/* set DVO to single ended clocking */
+		if (radeon_encoder && (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1)) {
+		    temp = INREG(AVIVO_DVOA_OUTPUT);
+		    OUTREG(AVIVO_DVOA_OUTPUT, temp | AVIVO_DVOA_CLOCK_MODE);
+		}
+	    }
+	}
     } else {
 	pll_flags |= RADEON_PLL_LEGACY;
 
diff --git a/src/radeon_reg.h b/src/radeon_reg.h
index 5467286..ad82030 100644
--- a/src/radeon_reg.h
+++ b/src/radeon_reg.h
@@ -4004,6 +4004,8 @@
 #	define AVIVO_LVDS_BACKLIGHT_LEVEL_SHIFT		8
 
 #define AVIVO_DVOA_BIT_DEPTH_CONTROL			0x7988
+#define AVIVO_DVOA_OUTPUT                               0x798c
+#	define AVIVO_DVOA_CLOCK_MODE			(1 << 8)
 
 #define AVIVO_GPIO_0                        0x7e30
 #define AVIVO_GPIO_1                        0x7e40