(II) config/hal: initialized X.Org X Server 1.7.1 Release Date: 2009-10-23 X Protocol Version 11, Revision 0 Build Operating System: 2.6.18-164.2.1.el5 Current Operating System: Linux yrael 2.6.31.6-145.fc12.x86_64 #1 SMP Sat Nov 21 15:57:45 EST 2009 x86_64 Kernel command line: ro root=UUID=7212ade5-7aeb-421a-87b1-dbce5fc125f6 LANG=en_US.UTF-8 SYSFONT=latarcyrheb-sun16 KEYBOARDTYPE=pc KEYTABLE=us debug drm.debug=1 nomodeset 3 Build Date: 05 November 2009 07:43:10PM Build ID: xorg-x11-server 1.7.1-7.fc12 Current version of pixman: 0.16.2 Before reporting problems, check http://bodhi.fedoraproject.org/ to make sure that you have the latest version. Markers: (--) probed, (**) from config file, (==) default setting, (++) from command line, (!!) notice, (II) informational, (WW) warning, (EE) error, (NI) not implemented, (??) unknown. (==) Log file: "/var/log/Xorg.0.log", Time: Wed Dec 9 17:59:03 2009 (II) Loader magic: 0x7c8560 (II) Module ABI versions: X.Org ANSI C Emulation: 0.4 X.Org Video Driver: 6.0 X.Org XInput driver : 7.0 X.Org Server Extension : 2.0 (--) using VT number 7 (--) PCI:*(0:1:5:0) 1002:9610:1043:82f1 ATI Technologies Inc Radeon HD 3200 Graphics rev 0, Mem @ 0xd0000000/268435456, 0xfbdf0000/65536, 0xfbc00000/1048576, I/O @ 0x0000d000/256, BIOS @ 0x????????/131072 (==) Using default built-in configuration (30 lines) (==) --- Start of built-in configuration --- Section "Device" Identifier "Builtin Default ati Device 0" Driver "ati" EndSection Section "Screen" Identifier "Builtin Default ati Screen 0" Device "Builtin Default ati Device 0" EndSection Section "Device" Identifier "Builtin Default vesa Device 0" Driver "vesa" EndSection Section "Screen" Identifier "Builtin Default vesa Screen 0" Device "Builtin Default vesa Device 0" EndSection Section "Device" Identifier "Builtin Default fbdev Device 0" Driver "fbdev" EndSection Section "Screen" Identifier "Builtin Default fbdev Screen 0" Device "Builtin Default fbdev Device 0" EndSection Section "ServerLayout" Identifier "Builtin Default Layout" Screen "Builtin Default ati Screen 0" Screen "Builtin Default vesa Screen 0" Screen "Builtin Default fbdev Screen 0" EndSection (==) --- End of built-in configuration --- (==) ServerLayout "Builtin Default Layout" (**) |-->Screen "Builtin Default ati Screen 0" (0) (**) | |-->Monitor "" (**) | |-->Device "Builtin Default ati Device 0" (==) No monitor specified for screen "Builtin Default ati Screen 0". Using a default monitor configuration. (**) |-->Screen "Builtin Default vesa Screen 0" (1) (**) | |-->Monitor "" (**) | |-->Device "Builtin Default vesa Device 0" (==) No monitor specified for screen "Builtin Default vesa Screen 0". Using a default monitor configuration. (**) |-->Screen "Builtin Default fbdev Screen 0" (2) (**) | |-->Monitor "" (**) | |-->Device "Builtin Default fbdev Device 0" (==) No monitor specified for screen "Builtin Default fbdev Screen 0". Using a default monitor configuration. (==) Automatically adding devices (==) Automatically enabling devices (==) FontPath set to: catalogue:/etc/X11/fontpath.d, built-ins (==) ModulePath set to "/usr/lib64/xorg/modules" (II) Cannot locate a core pointer device. (II) Cannot locate a core keyboard device. (II) The server relies on HAL to provide the list of input devices. If no devices become available, reconfigure HAL or disable AllowEmptyInput. (II) LoadModule: "extmod" (II) Loading /usr/lib64/xorg/modules/extensions/libextmod.so (II) Module extmod: vendor="X.Org Foundation" compiled for 1.7.1, module version = 1.0.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 2.0 (II) Loading extension SELinux (II) Loading extension MIT-SCREEN-SAVER (II) Loading extension XFree86-VidModeExtension (II) Loading extension XFree86-DGA (II) Loading extension DPMS (II) Loading extension XVideo (II) Loading extension XVideo-MotionCompensation (II) Loading extension X-Resource (II) LoadModule: "dbe" (II) Loading /usr/lib64/xorg/modules/extensions/libdbe.so (II) Module dbe: vendor="X.Org Foundation" compiled for 1.7.1, module version = 1.0.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 2.0 (II) Loading extension DOUBLE-BUFFER (II) LoadModule: "glx" (II) Loading /usr/lib64/xorg/modules/extensions/libglx.so (II) Module glx: vendor="X.Org Foundation" compiled for 1.7.1, module version = 1.0.0 ABI class: X.Org Server Extension, version 2.0 (==) AIGLX enabled (II) Loading extension GLX (II) LoadModule: "record" (II) Loading /usr/lib64/xorg/modules/extensions/librecord.so (II) Module record: vendor="X.Org Foundation" compiled for 1.7.1, module version = 1.13.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 2.0 (II) Loading extension RECORD (II) LoadModule: "dri" (II) Loading /usr/lib64/xorg/modules/extensions/libdri.so (II) Module dri: vendor="X.Org Foundation" compiled for 1.7.1, module version = 1.0.0 ABI class: X.Org Server Extension, version 2.0 (II) Loading extension XFree86-DRI (II) LoadModule: "dri2" (II) Loading /usr/lib64/xorg/modules/extensions/libdri2.so (II) Module dri2: vendor="X.Org Foundation" compiled for 1.7.1, module version = 1.1.0 ABI class: X.Org Server Extension, version 2.0 (II) Loading extension DRI2 (II) LoadModule: "ati" (II) Loading /usr/lib64/xorg/modules/drivers/ati_drv.so (II) Module ati: vendor="X.Org Foundation" compiled for 1.7.1, module version = 6.12.99 Module class: X.Org Video Driver ABI class: X.Org Video Driver, version 6.0 (II) LoadModule: "radeon" (II) Loading /usr/lib64/xorg/modules/drivers/radeon_drv.so (II) Module radeon: vendor="X.Org Foundation" compiled for 1.7.1, module version = 6.12.99 Module class: X.Org Video Driver ABI class: X.Org Video Driver, version 6.0 (II) LoadModule: "vesa" (II) Loading /usr/lib64/xorg/modules/drivers/vesa_drv.so (II) Module vesa: vendor="X.Org Foundation" compiled for 1.6.99.1, module version = 2.2.1 Module class: X.Org Video Driver ABI class: X.Org Video Driver, version 6.0 (II) LoadModule: "fbdev" (II) Loading /usr/lib64/xorg/modules/drivers/fbdev_drv.so (II) Module fbdev: vendor="X.Org Foundation" compiled for 1.6.99.1, module version = 0.4.1 ABI class: X.Org Video Driver, version 6.0 (II) RADEON: Driver for ATI Radeon chipsets: ATI Radeon Mobility X600 (M24) 3150 (PCIE), ATI FireMV 2400 (PCI), ATI Radeon Mobility X300 (M24) 3152 (PCIE), ATI FireGL M24 GL 3154 (PCIE), ATI Radeon X600 (RV380) 3E50 (PCIE), ATI FireGL V3200 (RV380) 3E54 (PCIE), ATI Radeon IGP320 (A3) 4136, ATI Radeon IGP330/340/350 (A4) 4137, ATI Radeon 9500 AD (AGP), ATI Radeon 9500 AE (AGP), ATI Radeon 9600TX AF (AGP), ATI FireGL Z1 AG (AGP), ATI Radeon 9800SE AH (AGP), ATI Radeon 9800 AI (AGP), ATI Radeon 9800 AJ (AGP), ATI FireGL X2 AK (AGP), ATI Radeon 9600 AP (AGP), ATI Radeon 9600SE AQ (AGP), ATI Radeon 9600XT AR (AGP), ATI Radeon 9600 AS (AGP), ATI FireGL T2 AT (AGP), ATI Radeon 9650, ATI FireGL RV360 AV (AGP), ATI Radeon 7000 IGP (A4+) 4237, ATI Radeon 8500 AIW BB (AGP), ATI Radeon 8500 AIW BC (AGP), ATI Radeon IGP320M (U1) 4336, ATI Radeon IGP330M/340M/350M (U2) 4337, ATI Radeon Mobility 7000 IGP 4437, ATI Radeon 9000/PRO If (AGP/PCI), ATI Radeon 9000 Ig (AGP/PCI), ATI Radeon X800 (R420) JH (AGP), ATI Radeon X800PRO (R420) JI (AGP), ATI Radeon X800SE (R420) JJ (AGP), ATI Radeon X800 (R420) JK (AGP), ATI Radeon X800 (R420) JL (AGP), ATI FireGL X3 (R420) JM (AGP), ATI Radeon Mobility 9800 (M18) JN (AGP), ATI Radeon X800 SE (R420) (AGP), ATI Radeon X800XT (R420) JP (AGP), ATI Radeon X800 VE (R420) JT (AGP), ATI Radeon X850 (R480) (AGP), ATI Radeon X850 XT (R480) (AGP), ATI Radeon X850 SE (R480) (AGP), ATI Radeon X850 PRO (R480) (AGP), ATI Radeon X850 XT PE (R480) (AGP), ATI Radeon Mobility M7 LW (AGP), ATI Mobility FireGL 7800 M7 LX (AGP), ATI Radeon Mobility M6 LY (AGP), ATI Radeon Mobility M6 LZ (AGP), ATI FireGL Mobility 9000 (M9) Ld (AGP), ATI Radeon Mobility 9000 (M9) Lf (AGP), ATI Radeon Mobility 9000 (M9) Lg (AGP), ATI Radeon 9700 Pro ND (AGP), ATI Radeon 9700/9500Pro NE (AGP), ATI Radeon 9600TX NF (AGP), ATI FireGL X1 NG (AGP), ATI Radeon 9800PRO NH (AGP), ATI Radeon 9800 NI (AGP), ATI FireGL X2 NK (AGP), ATI Radeon 9800XT NJ (AGP), ATI Radeon Mobility 9600/9700 (M10/M11) NP (AGP), ATI Radeon Mobility 9600 (M10) NQ (AGP), ATI Radeon Mobility 9600 (M11) NR (AGP), ATI Radeon Mobility 9600 (M10) NS (AGP), ATI FireGL Mobility T2 (M10) NT (AGP), ATI FireGL Mobility T2e (M11) NV (AGP), ATI Radeon QD (AGP), ATI Radeon QE (AGP), ATI Radeon QF (AGP), ATI Radeon QG (AGP), ATI FireGL 8700/8800 QH (AGP), ATI Radeon 8500 QL (AGP), ATI Radeon 9100 QM (AGP), ATI Radeon 7500 QW (AGP/PCI), ATI Radeon 7500 QX (AGP/PCI), ATI Radeon VE/7000 QY (AGP/PCI), ATI Radeon VE/7000 QZ (AGP/PCI), ATI ES1000 515E (PCI), ATI Radeon Mobility X300 (M22) 5460 (PCIE), ATI Radeon Mobility X600 SE (M24C) 5462 (PCIE), ATI FireGL M22 GL 5464 (PCIE), ATI Radeon X800 (R423) UH (PCIE), ATI Radeon X800PRO (R423) UI (PCIE), ATI Radeon X800LE (R423) UJ (PCIE), ATI Radeon X800SE (R423) UK (PCIE), ATI Radeon X800 XTP (R430) (PCIE), ATI Radeon X800 XL (R430) (PCIE), ATI Radeon X800 SE (R430) (PCIE), ATI Radeon X800 (R430) (PCIE), ATI FireGL V7100 (R423) (PCIE), ATI FireGL V5100 (R423) UQ (PCIE), ATI FireGL unknown (R423) UR (PCIE), ATI FireGL unknown (R423) UT (PCIE), ATI Mobility FireGL V5000 (M26) (PCIE), ATI Mobility FireGL V5000 (M26) (PCIE), ATI Mobility Radeon X700 XL (M26) (PCIE), ATI Mobility Radeon X700 (M26) (PCIE), ATI Mobility Radeon X700 (M26) (PCIE), ATI Radeon X550XTX 5657 (PCIE), ATI Radeon 9100 IGP (A5) 5834, ATI Radeon Mobility 9100 IGP (U3) 5835, ATI Radeon XPRESS 200 5954 (PCIE), ATI Radeon XPRESS 200M 5955 (PCIE), ATI Radeon 9250 5960 (AGP), ATI Radeon 9200 5961 (AGP), ATI Radeon 9200 5962 (AGP), ATI Radeon 9200SE 5964 (AGP), ATI FireMV 2200 (PCI), ATI ES1000 5969 (PCI), ATI Radeon XPRESS 200 5974 (PCIE), ATI Radeon XPRESS 200M 5975 (PCIE), ATI Radeon XPRESS 200 5A41 (PCIE), ATI Radeon XPRESS 200M 5A42 (PCIE), ATI Radeon XPRESS 200 5A61 (PCIE), ATI Radeon XPRESS 200M 5A62 (PCIE), ATI Radeon X300 (RV370) 5B60 (PCIE), ATI Radeon X600 (RV370) 5B62 (PCIE), ATI Radeon X550 (RV370) 5B63 (PCIE), ATI FireGL V3100 (RV370) 5B64 (PCIE), ATI FireMV 2200 PCIE (RV370) 5B65 (PCIE), ATI Radeon Mobility 9200 (M9+) 5C61 (AGP), ATI Radeon Mobility 9200 (M9+) 5C63 (AGP), ATI Mobility Radeon X800 XT (M28) (PCIE), ATI Mobility FireGL V5100 (M28) (PCIE), ATI Mobility Radeon X800 (M28) (PCIE), ATI Radeon X850 5D4C (PCIE), ATI Radeon X850 XT PE (R480) (PCIE), ATI Radeon X850 SE (R480) (PCIE), ATI Radeon X850 PRO (R480) (PCIE), ATI unknown Radeon / FireGL (R480) 5D50 (PCIE), ATI Radeon X850 XT (R480) (PCIE), ATI Radeon X800XT (R423) 5D57 (PCIE), ATI FireGL V5000 (RV410) (PCIE), ATI Radeon X700 XT (RV410) (PCIE), ATI Radeon X700 PRO (RV410) (PCIE), ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X700 (RV410) (PCIE), ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X1800, ATI Mobility Radeon X1800 XT, ATI Mobility Radeon X1800, ATI Mobility FireGL V7200, ATI FireGL V7200, ATI FireGL V5300, ATI Mobility FireGL V7100, ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800, ATI FireGL V7300, ATI FireGL V7350, ATI Radeon X1600, ATI RV505, ATI Radeon X1300/X1550, ATI Radeon X1550, ATI M54-GL, ATI Mobility Radeon X1400, ATI Radeon X1300/X1550, ATI Radeon X1550 64-bit, ATI Mobility Radeon X1300, ATI Mobility Radeon X1300, ATI Mobility Radeon X1300, ATI Mobility Radeon X1300, ATI Radeon X1300, ATI Radeon X1300, ATI RV505, ATI RV505, ATI FireGL V3300, ATI FireGL V3350, ATI Radeon X1300, ATI Radeon X1550 64-bit, ATI Radeon X1300/X1550, ATI Radeon X1600, ATI Radeon X1300/X1550, ATI Mobility Radeon X1450, ATI Radeon X1300/X1550, ATI Mobility Radeon X2300, ATI Mobility Radeon X2300, ATI Mobility Radeon X1350, ATI Mobility Radeon X1350, ATI Mobility Radeon X1450, ATI Radeon X1300, ATI Radeon X1550, ATI Mobility Radeon X1350, ATI FireMV 2250, ATI Radeon X1550 64-bit, ATI Radeon X1600, ATI Radeon X1650, ATI Radeon X1600, ATI Radeon X1600, ATI Mobility FireGL V5200, ATI Mobility Radeon X1600, ATI Radeon X1650, ATI Radeon X1650, ATI Radeon X1600, ATI Radeon X1300 XT/X1600 Pro, ATI FireGL V3400, ATI Mobility FireGL V5250, ATI Mobility Radeon X1700, ATI Mobility Radeon X1700 XT, ATI FireGL V5200, ATI Mobility Radeon X1700, ATI Radeon X2300HD, ATI Mobility Radeon HD 2300, ATI Mobility Radeon HD 2300, ATI Radeon X1950, ATI Radeon X1900, ATI Radeon X1950, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI AMD Stream Processor, ATI Radeon X1900, ATI Radeon X1950, ATI RV560, ATI RV560, ATI Mobility Radeon X1900, ATI RV560, ATI Radeon X1950 GT, ATI RV570, ATI RV570, ATI FireGL V7400, ATI RV560, ATI Radeon X1650, ATI Radeon X1650, ATI RV560, ATI Radeon 9100 PRO IGP 7834, ATI Radeon Mobility 9200 IGP 7835, ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200, ATI RS740, ATI RS740M, ATI RS740, ATI RS740M, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 Pro, ATI Radeon HD 2900 GT, ATI FireGL V8650, ATI FireGL V8600, ATI FireGL V7600, ATI Radeon 4800 Series, ATI Radeon HD 4870 x2, ATI Radeon 4800 Series, ATI Radeon HD 4850 x2, ATI FirePro V8750 (FireGL), ATI FirePro V7760 (FireGL), ATI Mobility RADEON HD 4850, ATI Mobility RADEON HD 4850 X2, ATI Radeon 4800 Series, ATI FirePro RV770, AMD FireStream 9270, AMD FireStream 9250, ATI FirePro V8700 (FireGL), ATI Mobility RADEON HD 4870, ATI Mobility RADEON M98, ATI Radeon 4800 Series, ATI Radeon 4800 Series, ATI FirePro M7750, ATI M98, ATI M98, ATI M98, ATI Mobility Radeon HD 4650, ATI Radeon RV730 (AGP), ATI Mobility Radeon HD 4670, ATI FirePro M5750, ATI Radeon RV730 (AGP), ATI RV730XT [Radeon HD 4670], ATI RADEON E4600, ATI Radeon HD 4600 Series, ATI RV730 PRO [Radeon HD 4650], ATI FirePro V7750 (FireGL), ATI FirePro V5700 (FireGL), ATI FirePro V3750 (FireGL), ATI Mobility Radeon HD 4830, ATI Mobility Radeon HD 4850, ATI FirePro M7740, ATI RV740, ATI Radeon HD 4770, ATI Radeon HD 4700 Series, ATI Radeon HD 4770, ATI FirePro M5750, ATI RV610, ATI Radeon HD 2400 XT, ATI Radeon HD 2400 Pro, ATI Radeon HD 2400 PRO AGP, ATI FireGL V4000, ATI RV610, ATI Radeon HD 2350, ATI Mobility Radeon HD 2400 XT, ATI Mobility Radeon HD 2400, ATI RADEON E2400, ATI RV610, ATI FireMV 2260, ATI RV670, ATI Radeon HD3870, ATI Mobility Radeon HD 3850, ATI Radeon HD3850, ATI Mobility Radeon HD 3850 X2, ATI RV670, ATI Mobility Radeon HD 3870, ATI Mobility Radeon HD 3870 X2, ATI Radeon HD3870 X2, ATI FireGL V7700, ATI Radeon HD3850, ATI Radeon HD3690, AMD Firestream 9170, ATI Radeon HD 4550, ATI Radeon RV710, ATI Radeon RV710, ATI Radeon HD 4350, ATI Mobility Radeon 4300 Series, ATI Mobility Radeon 4500 Series, ATI Mobility Radeon 4500 Series, ATI FirePro RG220, ATI RV630, ATI Mobility Radeon HD 2600, ATI Mobility Radeon HD 2600 XT, ATI Radeon HD 2600 XT AGP, ATI Radeon HD 2600 Pro AGP, ATI Radeon HD 2600 XT, ATI Radeon HD 2600 Pro, ATI Gemini RV630, ATI Gemini Mobility Radeon HD 2600 XT, ATI FireGL V5600, ATI FireGL V3600, ATI Radeon HD 2600 LE, ATI Mobility FireGL Graphics Processor, ATI Radeon RV710, ATI Radeon HD 3470, ATI Mobility Radeon HD 3430, ATI Mobility Radeon HD 3400 Series, ATI Radeon HD 3450, ATI Radeon HD 3450, ATI Radeon HD 3430, ATI Radeon HD 3450, ATI FirePro V3700, ATI FireMV 2450, ATI FireMV 2260, ATI FireMV 2260, ATI Radeon HD 3600 Series, ATI Radeon HD 3650 AGP, ATI Radeon HD 3600 PRO, ATI Radeon HD 3600 XT, ATI Radeon HD 3600 PRO, ATI Mobility Radeon HD 3650, ATI Mobility Radeon HD 3670, ATI Mobility FireGL V5700, ATI Mobility FireGL V5725, ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics, ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics, ATI Radeon HD 3300 Graphics, ATI Radeon HD 3200 Graphics, ATI Radeon 3000 Graphics, ATI Radeon HD 4200, ATI Radeon 4100, ATI Mobility Radeon HD 4200, ATI Mobility Radeon 4100, ATI RS880 (II) VESA: driver for VESA chipsets: vesa (II) FBDEV: driver for framebuffer: fbdev (II) Primary Device is: PCI 01@00:05:0 (II) [KMS] drm report modesetting isn't supported. (WW) Falling back to old probe method for vesa (WW) Falling back to old probe method for fbdev (II) Loading sub module "fbdevhw" (II) LoadModule: "fbdevhw" (II) Loading /usr/lib64/xorg/modules/linux/libfbdevhw.so (II) Module fbdevhw: vendor="X.Org Foundation" compiled for 1.7.1, module version = 0.0.2 ABI class: X.Org Video Driver, version 6.0 (EE) open /dev/fb0: No such file or directory (II) RADEON(0): RADEONPreInit (II) RADEON(0): TOTO SAYS 00000000fbdf0000 (II) RADEON(0): MMIO registers at 0x00000000fbdf0000: size 64KB (II) RADEON(0): PCI bus 1 card 5 func 0 (II) RADEON(0): Creating default Display subsection in Screen section "Builtin Default ati Screen 0" for depth/fbbpp 24/32 (==) RADEON(0): Depth 24, (--) framebuffer bpp 32 (II) RADEON(0): Pixel depth = 24 bits stored in 4 bytes (32 bpp pixmaps) (==) RADEON(0): Default visual is TrueColor (II) Loading sub module "vgahw" (II) LoadModule: "vgahw" (II) Loading /usr/lib64/xorg/modules/libvgahw.so (II) Module vgahw: vendor="X.Org Foundation" compiled for 1.7.1, module version = 0.1.0 ABI class: X.Org Video Driver, version 6.0 (II) RADEON(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000 (==) RADEON(0): RGB weight 888 (II) RADEON(0): Using 8 bits per RGB (8 bit DAC) (--) RADEON(0): Chipset: "ATI Radeon HD 3200 Graphics" (ChipID = 0x9610) (--) RADEON(0): Linear framebuffer at 0x00000000d0000000 (II) RADEON(0): PCI card detected (II) Loading sub module "int10" (II) LoadModule: "int10" (II) Loading /usr/lib64/xorg/modules/libint10.so (II) Module int10: vendor="X.Org Foundation" compiled for 1.7.1, module version = 1.0.0 ABI class: X.Org Video Driver, version 6.0 (II) RADEON(0): initializing int10 (II) RADEON(0): Primary V_BIOS segment is: 0xc000 (II) RADEON(0): ATOM BIOS detected (II) RADEON(0): ATOM BIOS Rom: SubsystemVendorID: 0x1002 SubsystemID: 0x1002 IOBaseAddress: 0xd000 Filename: M3A78_D4.bin BIOS Bootup Message: B27722 RS780 DDR2 200e/500m (II) RADEON(0): Call to AtomBIOS Init succeeded (II) RADEON(0): Framebuffer space used by Firmware (kb): 20 (II) RADEON(0): Start of VRAM area used by Firmware: 0xfffb000 (II) RADEON(0): AtomBIOS requests 20kB of VRAM scratch space (II) RADEON(0): AtomBIOS VRAM scratch base: 0xfffb000 (II) RADEON(0): Cannot get VRAM scratch space. Allocating in main memory instead (II) RADEON(0): Call to AtomBIOS Set FB Space succeeded (II) RADEON(0): Default Engine Clock: 500000 (II) RADEON(0): Default Memory Clock: 400000 (II) RADEON(0): Maximum Pixel ClockPLL Frequency Output: 1200000 (II) RADEON(0): Minimum Pixel ClockPLL Frequency Output: 0 (II) RADEON(0): Maximum Pixel ClockPLL Frequency Input: 13500 (II) RADEON(0): Minimum Pixel ClockPLL Frequency Input: 1000 (II) RADEON(0): Maximum Pixel Clock: 400000 (II) RADEON(0): Reference Clock: 14320 drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 13, (OK) drmOpenByBusid: Searching for BusID pci:0000:01:05.0 drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 13, (OK) drmOpenByBusid: drmOpenMinor returns 13 drmOpenByBusid: drmGetBusid reports pci:0000:01:05.0 (II) RADEON(0): [dri] Found DRI library version 1.3.0 and kernel module version 1.31.0 (==) RADEON(0): Page Flipping disabled on r5xx and newer chips. (II) RADEON(0): Will try to use DMA for Xv image transfers (II) RADEON(0): Detected total video RAM=262144K, accessible=262144K (PCI BAR=262144K) (--) RADEON(0): Mapped VideoRAM: 262144 kByte (128 bit DDR SDRAM) (II) RADEON(0): Color tiling disabled (II) Loading sub module "ddc" (II) LoadModule: "ddc" (II) Module "ddc" already built-in (II) Loading sub module "i2c" (II) LoadModule: "i2c" (II) Module "i2c" already built-in (II) RADEON(0): PLL parameters: rf=1432 rd=12 min=90000 max=120000; xclk=40000 (II) RADEON(0): Output VGA-0 has no monitor section (II) RADEON(0): I2C bus "VGA-0" initialized. (II) RADEON(0): Output DVI-0 has no monitor section (II) RADEON(0): I2C bus "DVI-0" initialized. (II) RADEON(0): Port0: XRANDR name: VGA-0 Connector: VGA CRT1: INTERNAL_KLDSCP_DAC1 DDC reg: 0x7e40 (II) RADEON(0): Port1: XRANDR name: DVI-0 Connector: DVI-D DFP3: INTERNAL_KLDSCP_LVTMA DDC reg: 0x7e50 (II) RADEON(0): I2C device "VGA-0:ddc2" registered at address 0xA0. (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Dac detection success (II) RADEON(0): Output: VGA-0, Detected Monitor Type: 0 finished output detect: 0 (II) RADEON(0): I2C device "DVI-0:ddc2" registered at address 0xA0. (II) RADEON(0): I2C device "DVI-0:E-EDID segment register" registered at address 0x60. (II) RADEON(0): I2C device "DVI-0:DDC control interface" registered at address 0x6E. (II) RADEON(0): Output: DVI-0, Detected Monitor Type: 3 (II) RADEON(0): EDID data from the display on output: DVI-0 ---------------------- (II) RADEON(0): Manufacturer: ACI Model: 22f2 Serial#: 16843009 (II) RADEON(0): Year: 2008 Week: 48 (II) RADEON(0): EDID Version: 1.3 (II) RADEON(0): Digital Display Input (II) RADEON(0): Max Image Size [cm]: horiz.: 48 vert.: 27 (II) RADEON(0): Gamma: 2.20 (II) RADEON(0): DPMS capabilities: StandBy Suspend Off (II) RADEON(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 (II) RADEON(0): Default color space is primary color space (II) RADEON(0): First detailed timing is preferred mode (II) RADEON(0): redX: 0.640 redY: 0.340 greenX: 0.290 greenY: 0.609 (II) RADEON(0): blueX: 0.140 blueY: 0.069 whiteX: 0.310 whiteY: 0.330 (II) RADEON(0): Supported established timings: (II) RADEON(0): 720x400@70Hz (II) RADEON(0): 640x480@60Hz (II) RADEON(0): 640x480@67Hz (II) RADEON(0): 640x480@72Hz (II) RADEON(0): 640x480@75Hz (II) RADEON(0): 800x600@56Hz (II) RADEON(0): 800x600@60Hz (II) RADEON(0): 800x600@72Hz (II) RADEON(0): 800x600@75Hz (II) RADEON(0): 832x624@75Hz (II) RADEON(0): 1024x768@60Hz (II) RADEON(0): 1024x768@70Hz (II) RADEON(0): 1024x768@75Hz (II) RADEON(0): 1280x1024@75Hz (II) RADEON(0): Manufacturer's mask: 0 (II) RADEON(0): Supported standard timings: (II) RADEON(0): #0: hsize: 1152 vsize 864 refresh: 75 vid: 20337 (II) RADEON(0): #1: hsize: 1280 vsize 1024 refresh: 60 vid: 32897 (II) RADEON(0): #2: hsize: 1280 vsize 960 refresh: 60 vid: 16513 (II) RADEON(0): #3: hsize: 1440 vsize 900 refresh: 60 vid: 149 (II) RADEON(0): #4: hsize: 1600 vsize 1200 refresh: 60 vid: 16553 (II) RADEON(0): #5: hsize: 1680 vsize 1050 refresh: 60 vid: 179 (II) RADEON(0): #6: hsize: 1920 vsize 1080 refresh: 60 vid: 49361 (II) RADEON(0): Supported detailed timing: (II) RADEON(0): clock: 148.5 MHz Image Size: 477 x 268 mm (II) RADEON(0): h_active: 1920 h_sync: 2008 h_sync_end 2052 h_blank_end 2200 h_border: 0 (II) RADEON(0): v_active: 1080 v_sync: 1084 v_sync_end 1089 v_blanking: 1125 v_border: 0 (II) RADEON(0): Ranges: V min: 50 V max: 76 Hz, H min: 31 H max: 83 kHz, PixClock max 170 MHz (II) RADEON(0): Monitor name: VH226 (II) RADEON(0): Serial No: 8BLMQS013087 (II) RADEON(0): EDID (in hex): (II) RADEON(0): 00ffffffffffff000469f22201010101 (II) RADEON(0): 3012010380301b78eec4f6a3574a9c23 (II) RADEON(0): 114f54bfef00714f818081409500a940 (II) RADEON(0): b300d1c00101023a801871382d40582c (II) RADEON(0): 4500dd0c1100001e000000fd00324c1f (II) RADEON(0): 5311000a202020202020000000fc0056 (II) RADEON(0): 483232360a20202020202020000000ff (II) RADEON(0): 0038424c4d51533031333038370a0001 finished output detect: 1 finished all detect before xf86InitialConfiguration (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Dac detection success (II) RADEON(0): Output: VGA-0, Detected Monitor Type: 0 (II) RADEON(0): EDID for output VGA-0 (II) RADEON(0): EDID for output DVI-0 (II) RADEON(0): Manufacturer: ACI Model: 22f2 Serial#: 16843009 (II) RADEON(0): Year: 2008 Week: 48 (II) RADEON(0): EDID Version: 1.3 (II) RADEON(0): Digital Display Input (II) RADEON(0): Max Image Size [cm]: horiz.: 48 vert.: 27 (II) RADEON(0): Gamma: 2.20 (II) RADEON(0): DPMS capabilities: StandBy Suspend Off (II) RADEON(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 (II) RADEON(0): Default color space is primary color space (II) RADEON(0): First detailed timing is preferred mode (II) RADEON(0): redX: 0.640 redY: 0.340 greenX: 0.290 greenY: 0.609 (II) RADEON(0): blueX: 0.140 blueY: 0.069 whiteX: 0.310 whiteY: 0.330 (II) RADEON(0): Supported established timings: (II) RADEON(0): 720x400@70Hz (II) RADEON(0): 640x480@60Hz (II) RADEON(0): 640x480@67Hz (II) RADEON(0): 640x480@72Hz (II) RADEON(0): 640x480@75Hz (II) RADEON(0): 800x600@56Hz (II) RADEON(0): 800x600@60Hz (II) RADEON(0): 800x600@72Hz (II) RADEON(0): 800x600@75Hz (II) RADEON(0): 832x624@75Hz (II) RADEON(0): 1024x768@60Hz (II) RADEON(0): 1024x768@70Hz (II) RADEON(0): 1024x768@75Hz (II) RADEON(0): 1280x1024@75Hz (II) RADEON(0): Manufacturer's mask: 0 (II) RADEON(0): Supported standard timings: (II) RADEON(0): #0: hsize: 1152 vsize 864 refresh: 75 vid: 20337 (II) RADEON(0): #1: hsize: 1280 vsize 1024 refresh: 60 vid: 32897 (II) RADEON(0): #2: hsize: 1280 vsize 960 refresh: 60 vid: 16513 (II) RADEON(0): #3: hsize: 1440 vsize 900 refresh: 60 vid: 149 (II) RADEON(0): #4: hsize: 1600 vsize 1200 refresh: 60 vid: 16553 (II) RADEON(0): #5: hsize: 1680 vsize 1050 refresh: 60 vid: 179 (II) RADEON(0): #6: hsize: 1920 vsize 1080 refresh: 60 vid: 49361 (II) RADEON(0): Supported detailed timing: (II) RADEON(0): clock: 148.5 MHz Image Size: 477 x 268 mm (II) RADEON(0): h_active: 1920 h_sync: 2008 h_sync_end 2052 h_blank_end 2200 h_border: 0 (II) RADEON(0): v_active: 1080 v_sync: 1084 v_sync_end 1089 v_blanking: 1125 v_border: 0 (II) RADEON(0): Ranges: V min: 50 V max: 76 Hz, H min: 31 H max: 83 kHz, PixClock max 170 MHz (II) RADEON(0): Monitor name: VH226 (II) RADEON(0): Serial No: 8BLMQS013087 (II) RADEON(0): EDID (in hex): (II) RADEON(0): 00ffffffffffff000469f22201010101 (II) RADEON(0): 3012010380301b78eec4f6a3574a9c23 (II) RADEON(0): 114f54bfef00714f818081409500a940 (II) RADEON(0): b300d1c00101023a801871382d40582c (II) RADEON(0): 4500dd0c1100001e000000fd00324c1f (II) RADEON(0): 5311000a202020202020000000fc0056 (II) RADEON(0): 483232360a20202020202020000000ff (II) RADEON(0): 0038424c4d51533031333038370a0001 (II) RADEON(0): Output: DVI-0, Detected Monitor Type: 3 (II) RADEON(0): EDID data from the display on output: DVI-0 ---------------------- (II) RADEON(0): Manufacturer: ACI Model: 22f2 Serial#: 16843009 (II) RADEON(0): Year: 2008 Week: 48 (II) RADEON(0): EDID Version: 1.3 (II) RADEON(0): Digital Display Input (II) RADEON(0): Max Image Size [cm]: horiz.: 48 vert.: 27 (II) RADEON(0): Gamma: 2.20 (II) RADEON(0): DPMS capabilities: StandBy Suspend Off (II) RADEON(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 (II) RADEON(0): Default color space is primary color space (II) RADEON(0): First detailed timing is preferred mode (II) RADEON(0): redX: 0.640 redY: 0.340 greenX: 0.290 greenY: 0.609 (II) RADEON(0): blueX: 0.140 blueY: 0.069 whiteX: 0.310 whiteY: 0.330 (II) RADEON(0): Supported established timings: (II) RADEON(0): 720x400@70Hz (II) RADEON(0): 640x480@60Hz (II) RADEON(0): 640x480@67Hz (II) RADEON(0): 640x480@72Hz (II) RADEON(0): 640x480@75Hz (II) RADEON(0): 800x600@56Hz (II) RADEON(0): 800x600@60Hz (II) RADEON(0): 800x600@72Hz (II) RADEON(0): 800x600@75Hz (II) RADEON(0): 832x624@75Hz (II) RADEON(0): 1024x768@60Hz (II) RADEON(0): 1024x768@70Hz (II) RADEON(0): 1024x768@75Hz (II) RADEON(0): 1280x1024@75Hz (II) RADEON(0): Manufacturer's mask: 0 (II) RADEON(0): Supported standard timings: (II) RADEON(0): #0: hsize: 1152 vsize 864 refresh: 75 vid: 20337 (II) RADEON(0): #1: hsize: 1280 vsize 1024 refresh: 60 vid: 32897 (II) RADEON(0): #2: hsize: 1280 vsize 960 refresh: 60 vid: 16513 (II) RADEON(0): #3: hsize: 1440 vsize 900 refresh: 60 vid: 149 (II) RADEON(0): #4: hsize: 1600 vsize 1200 refresh: 60 vid: 16553 (II) RADEON(0): #5: hsize: 1680 vsize 1050 refresh: 60 vid: 179 (II) RADEON(0): #6: hsize: 1920 vsize 1080 refresh: 60 vid: 49361 (II) RADEON(0): Supported detailed timing: (II) RADEON(0): clock: 148.5 MHz Image Size: 477 x 268 mm (II) RADEON(0): h_active: 1920 h_sync: 2008 h_sync_end 2052 h_blank_end 2200 h_border: 0 (II) RADEON(0): v_active: 1080 v_sync: 1084 v_sync_end 1089 v_blanking: 1125 v_border: 0 (II) RADEON(0): Ranges: V min: 50 V max: 76 Hz, H min: 31 H max: 83 kHz, PixClock max 170 MHz (II) RADEON(0): Monitor name: VH226 (II) RADEON(0): Serial No: 8BLMQS013087 (II) RADEON(0): EDID (in hex): (II) RADEON(0): 00ffffffffffff000469f22201010101 (II) RADEON(0): 3012010380301b78eec4f6a3574a9c23 (II) RADEON(0): 114f54bfef00714f818081409500a940 (II) RADEON(0): b300d1c00101023a801871382d40582c (II) RADEON(0): 4500dd0c1100001e000000fd00324c1f (II) RADEON(0): 5311000a202020202020000000fc0056 (II) RADEON(0): 483232360a20202020202020000000ff (II) RADEON(0): 0038424c4d51533031333038370a0001 (II) RADEON(0): Panel infos found from DDC detailed: 1920x1080 (II) RADEON(0): EDID vendor "ACI", prod id 8946 (II) RADEON(0): Not using mode "1920x1080" (bad mode clock/interlace/doublescan) (II) RADEON(0): Printing probed modes for output DVI-0 (II) RADEON(0): Modeline "1920x1080"x60.0 148.50 1920 2008 2052 2200 1080 1084 1089 1125 +hsync +vsync (67.5 kHz) (II) RADEON(0): Modeline "1600x1200"x60.0 162.00 1600 1664 1856 2160 1200 1201 1204 1250 +hsync +vsync (75.0 kHz) (II) RADEON(0): Modeline "1680x1050"x59.9 119.00 1680 1728 1760 1840 1050 1053 1059 1080 +hsync -vsync (64.7 kHz) (II) RADEON(0): Modeline "1280x1024"x75.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz) (II) RADEON(0): Modeline "1280x1024"x60.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz) (II) RADEON(0): Modeline "1440x900"x59.9 88.75 1440 1488 1520 1600 900 903 909 926 +hsync -vsync (55.5 kHz) (II) RADEON(0): Modeline "1280x960"x60.0 108.00 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync (60.0 kHz) (II) RADEON(0): Modeline "1152x864"x75.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz) (II) RADEON(0): Modeline "1024x768"x75.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz) (II) RADEON(0): Modeline "1024x768"x70.1 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz) (II) RADEON(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz) (II) RADEON(0): Modeline "832x624"x74.6 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz) (II) RADEON(0): Modeline "800x600"x72.2 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz) (II) RADEON(0): Modeline "800x600"x75.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz) (II) RADEON(0): Modeline "800x600"x60.3 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz) (II) RADEON(0): Modeline "800x600"x56.2 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz) (II) RADEON(0): Modeline "640x480"x75.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz) (II) RADEON(0): Modeline "640x480"x72.8 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz) (II) RADEON(0): Modeline "640x480"x66.7 30.24 640 704 768 864 480 483 486 525 -hsync -vsync (35.0 kHz) (II) RADEON(0): Modeline "640x480"x59.9 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz) (II) RADEON(0): Modeline "720x400"x70.1 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz) (II) RADEON(0): Output VGA-0 disconnected (II) RADEON(0): Output DVI-0 connected (II) RADEON(0): Using exact sizes for initial modes (II) RADEON(0): Output DVI-0 using initial mode 1920x1080 +0+0 (II) RADEON(0): Using default gamma of (1.0, 1.0, 1.0) unless otherwise stated. (==) RADEON(0): DPI set to (96, 96) (II) Loading sub module "fb" (II) LoadModule: "fb" (II) Loading /usr/lib64/xorg/modules/libfb.so (II) Module fb: vendor="X.Org Foundation" compiled for 1.7.1, module version = 1.0.0 ABI class: X.Org ANSI C Emulation, version 0.4 (II) Loading sub module "ramdac" (II) LoadModule: "ramdac" (II) Module "ramdac" already built-in (==) RADEON(0): Will attempt to use R6xx/R7xx EXA support if DRI is enabled. (II) Loading sub module "exa" (II) LoadModule: "exa" (II) Loading /usr/lib64/xorg/modules/libexa.so (II) Module exa: vendor="X.Org Foundation" compiled for 1.7.1, module version = 2.5.0 ABI class: X.Org Video Driver, version 6.0 (!!) RADEON(0): MergedFB support has been removed and replaced with xrandr 1.2 support (II) UnloadModule: "vesa" (II) Unloading /usr/lib64/xorg/modules/drivers/vesa_drv.so (II) UnloadModule: "fbdev" (II) Unloading /usr/lib64/xorg/modules/drivers/fbdev_drv.so (II) UnloadModule: "fbdevhw" (II) Unloading /usr/lib64/xorg/modules/linux/libfbdevhw.so (--) Depth 24 pixmap format is 32 bpp (II) RADEON(0): RADEONScreenInit d0000000 0 0 (II) RADEON(0): Map: 0x00000000d0000000, 0x10000000 (II) RADEON(0): RADEONSave (II) RADEON(0): DIG0 transmitter: Coherent Mode enabled (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG0 transmitter setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC memreq 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC memreq 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 1 success (II) RADEON(0): Dynamic Power Management Disabled (==) RADEON(0): Using 24 bit depth buffer (II) RADEON(0): RADEONInitMemoryMap() : (II) RADEON(0): mem_size : 0x10000000 (II) RADEON(0): MC_FB_LOCATION : 0x00cf00c0 (II) RADEON(0): MC_AGP_LOCATION : 0x003f0000 (II) RADEON(0): Depth moves disabled by default (II) RADEON(0): Setting up accel memmap (II) RADEON(0): Allocating from a screen of 262080 kb (II) RADEON(0): Will use 32 kb for hardware cursor 0 at offset 0x01c20000 (II) RADEON(0): Will use 32 kb for hardware cursor 1 at offset 0x01c24000 (II) RADEON(0): Will use 28800 kb for front buffer at offset 0x00000000 (II) RADEON(0): Will use 64 kb for PCI GART at offset 0x0fff0000 (II) RADEON(0): Will use 28800 kb for back buffer at offset 0x01c28000 (II) RADEON(0): Will use 28800 kb for depth buffer at offset 0x03848000 (II) RADEON(0): Will use 87040 kb for textures at offset 0x05468000 (II) RADEON(0): Will use 88608 kb for X Server offscreen at offset 0x0a968000 drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 13, (OK) drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 13, (OK) drmOpenByBusid: Searching for BusID pci:0000:01:05.0 drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 13, (OK) drmOpenByBusid: drmOpenMinor returns 13 drmOpenByBusid: drmGetBusid reports pci:0000:01:05.0 (II) [drm] DRM interface version 1.3 (II) [drm] DRM open master succeeded. (II) RADEON(0): [drm] Using the DRM lock SAREA also for drawables. (II) RADEON(0): [drm] framebuffer handle = 0xd0000000 (II) RADEON(0): [drm] added 1 reserved context for kernel (II) RADEON(0): X context handle = 0x1 (II) RADEON(0): [drm] installed DRM signal handler (II) RADEON(0): [pci] 32768 kB allocated with handle 0x12cd6900 (II) RADEON(0): [pci] ring handle = 0x2b7fe000 (II) RADEON(0): [pci] Ring mapped at 0x7f7a32ed2000 (II) RADEON(0): [pci] Ring contents 0x00000000 (II) RADEON(0): [pci] ring read ptr handle = 0x1b7fe000 (II) RADEON(0): [pci] Ring read ptr mapped at 0x7f7a34531000 (II) RADEON(0): [pci] Ring read ptr contents 0x00000000 (II) RADEON(0): [pci] vertex/indirect buffers handle = 0x2b800000 (II) RADEON(0): [pci] Vertex/indirect buffers mapped at 0x7f7a2282c000 (II) RADEON(0): [pci] Vertex/indirect buffers contents 0x00000000 (II) RADEON(0): [pci] GART texture map handle = 0x2b801000 (II) RADEON(0): [pci] GART Texture map mapped at 0x7f7a20bac000 (II) RADEON(0): [drm] register handle = 0x2fff8000 (II) RADEON(0): [dri] Visual configs initialized (II) RADEON(0): Initializing fb layer (II) RADEON(0): RADEONRestoreMemMapRegisters() : (II) RADEON(0): MC_FB_LOCATION : 0x00cf00c0 0x00cf00c0 (II) RADEON(0): MC_AGP_LOCATION : 0x003f0000 (II) RADEON(0): Initializing backing store (==) RADEON(0): Backing store disabled (II) RADEON(0): DRI Finishing init ! (II) RADEON(0): [DRI] installation complete (II) RADEON(0): [drm] Added 32 65536 byte vertex/indirect buffers (II) RADEON(0): [drm] Mapped 32 vertex/indirect buffers (II) RADEON(0): [drm] dma control initialized, using IRQ 18 (II) RADEON(0): [drm] Initialized kernel GART heap manager, 29884416 (WW) RADEON(0): DRI init changed memory map, adjusting ... (WW) RADEON(0): MC_FB_LOCATION was: 0x00cf00c0 is: 0x00cf00c0 (WW) RADEON(0): MC_AGP_LOCATION was: 0x003f0000 is: 0x00030000 (II) RADEON(0): RADEONRestoreMemMapRegisters() : (II) RADEON(0): MC_FB_LOCATION : 0x00cf00c0 0x00cf00c0 (II) RADEON(0): MC_AGP_LOCATION : 0x00030000 (II) RADEON(0): Direct rendering enabled (II) RADEON(0): Initializing Acceleration (II) RADEON(0): Setting EXA maxPitchBytes (II) EXA(0): Offscreen pixmap area of 90734592 bytes (II) EXA(0): Driver registered support for the following operations: (II) Solid (II) Copy (II) Composite (RENDER acceleration) (II) UploadToScreen (II) DownloadFromScreen (II) RADEON(0): Acceleration enabled (II) RADEON(0): Initializing DPMS (==) RADEON(0): DPMS enabled (II) RADEON(0): Initializing Cursor (==) RADEON(0): Silken mouse enabled (II) RADEON(0): Initializing Xv (II) RADEON(0): Set up textured video (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output CRT1 disable success (II) RADEON(0): DIG0 transmitter: Coherent Mode enabled (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG0 transmitter setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC memreq 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC memreq 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 1 success (II) RADEON(0): DIG0 transmitter: Coherent Mode enabled (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG0 transmitter setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC memreq 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 0 success Mode 1920x1080 - 2200 1125 5 (II) RADEON(0): RADEONRestoreMemMapRegisters() : (II) RADEON(0): MC_FB_LOCATION : 0x00cf00c0 0x00cf00c0 (II) RADEON(0): MC_AGP_LOCATION : 0x00030000 before 14850 (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded after 14850 ffreq: 148500.000000 best_freq: 148500 best_feedback_div: 165.9 best_ref_div: 2 best_post_div: 8 (II) RADEON(0): crtc(0) Clock: mode 148500, PLL 148500 (II) RADEON(0): crtc(0) PLL : refdiv 2, fbdiv 0xA5(165), fracfbdiv 9, pdiv 8 (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC 0 PLL success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC Timing success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC 0 Overscan success Not using RMX (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded scaler 0 setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC 0 Source success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded crtc 0 YUV disable setup success (II) RADEON(0): DIG0 transmitter: Coherent Mode enabled (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG0 transmitter setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG2 encoder setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG2 encoder setup success (II) RADEON(0): DIG0 transmitter: Coherent Mode enabled (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG0 transmitter setup success (II) RADEON(0): DIG0 transmitter: Coherent Mode enabled (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG0 transmitter setup success (II) RADEON(0): DIG0 transmitter: Coherent Mode enabled (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG0 transmitter setup success (II) RADEON(0): DIG0 transmitter: Coherent Mode enabled (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG0 transmitter setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC memreq 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Unblank CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output CRT1 disable success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC memreq 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 1 success (II) RADEON(0): RandR 1.2 enabled, ignore the following RandR disabled message. (II) RADEON(0): DIG0 transmitter: Coherent Mode enabled (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG0 transmitter setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC memreq 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 0 success Mode 1920x1080 - 2200 1125 5 (II) RADEON(0): RADEONRestoreMemMapRegisters() : (II) RADEON(0): MC_FB_LOCATION : 0x00cf00c0 0x00cf00c0 (II) RADEON(0): MC_AGP_LOCATION : 0x00030000 before 14850 (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded after 14850 ffreq: 148500.000000 best_freq: 148500 best_feedback_div: 165.9 best_ref_div: 2 best_post_div: 8 (II) RADEON(0): crtc(0) Clock: mode 148500, PLL 148500 (II) RADEON(0): crtc(0) PLL : refdiv 2, fbdiv 0xA5(165), fracfbdiv 9, pdiv 8 (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC 0 PLL success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC Timing success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC 0 Overscan success Not using RMX (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded scaler 0 setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Set CRTC 0 Source success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded crtc 0 YUV disable setup success (II) RADEON(0): DIG0 transmitter: Coherent Mode enabled (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG0 transmitter setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG2 encoder setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG2 encoder setup success (II) RADEON(0): DIG0 transmitter: Coherent Mode enabled (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG0 transmitter setup success (II) RADEON(0): DIG0 transmitter: Coherent Mode enabled (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG0 transmitter setup success (II) RADEON(0): DIG0 transmitter: Coherent Mode enabled (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG0 transmitter setup success (II) RADEON(0): DIG0 transmitter: Coherent Mode enabled (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG0 transmitter setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC memreq 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Unblank CRTC 0 success (II) RADEON(0): Initializing color map (II) RADEON(0): RADEONScreenInit finished (--) RandR disabled (II) Initializing built-in extension Generic Event Extension (II) Initializing built-in extension SHAPE (II) Initializing built-in extension MIT-SHM (II) Initializing built-in extension XInputExtension (II) Initializing built-in extension XTEST (II) Initializing built-in extension BIG-REQUESTS (II) Initializing built-in extension SYNC (II) Initializing built-in extension XKEYBOARD (II) Initializing built-in extension XC-MISC (II) Initializing built-in extension XINERAMA (II) Initializing built-in extension XFIXES (II) Initializing built-in extension RENDER (II) Initializing built-in extension RANDR (II) Initializing built-in extension COMPOSITE (II) Initializing built-in extension DAMAGE (II) SELinux: Disabled by boolean record: RECORD extension enabled at configure time. record: This extension is known to be broken, disabling extension now.. record: http://bugs.freedesktop.org/show_bug.cgi?id=20500 (II) AIGLX: Screen 0 is not DRI2 capable drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 14, (OK) drmOpenByBusid: Searching for BusID pci:0000:01:05.0 drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 14, (OK) drmOpenByBusid: drmOpenMinor returns 14 drmOpenByBusid: drmGetBusid reports pci:0000:01:05.0 (II) AIGLX: enabled GLX_MESA_copy_sub_buffer (II) AIGLX: enabled GLX_SGI_make_current_read (II) AIGLX: enabled GLX_texture_from_pixmap with driver support (II) AIGLX: Loaded and initialized /usr/lib64/dri/r600_dri.so (II) GLX: Initialized DRI GL provider for screen 0 (II) RADEON(0): Setting screen physical size to 508 x 285 (II) XKB: Reusing cached keymap (II) RADEON(0): RADEONSaveScreen(2) (II) config/hal: Adding input device AT Translated Set 2 keyboard (II) LoadModule: "evdev" (II) Loading /usr/lib64/xorg/modules/input/evdev_drv.so (II) Module evdev: vendor="X.Org Foundation" compiled for 1.7.1, module version = 2.3.1 Module class: X.Org XInput Driver ABI class: X.Org XInput driver, version 7.0 (**) AT Translated Set 2 keyboard: always reports core events (**) AT Translated Set 2 keyboard: Device: "/dev/input/event3" (II) AT Translated Set 2 keyboard: Found keys (II) AT Translated Set 2 keyboard: Configuring as keyboard (II) XINPUT: Adding extended input device "AT Translated Set 2 keyboard" (type: KEYBOARD) (**) Option "xkb_rules" "evdev" (**) Option "xkb_model" "pc105+inet" (**) Option "xkb_layout" "us" (**) Option "xkb_options" "terminate:ctrl_alt_bksp" (II) config/hal: Adding input device Macintosh mouse button emulation (**) Macintosh mouse button emulation: always reports core events (**) Macintosh mouse button emulation: Device: "/dev/input/event2" (II) Macintosh mouse button emulation: Found 3 mouse buttons (II) Macintosh mouse button emulation: Found relative axes (II) Macintosh mouse button emulation: Found x and y relative axes (II) Macintosh mouse button emulation: Configuring as mouse (**) Macintosh mouse button emulation: YAxisMapping: buttons 4 and 5 (**) Macintosh mouse button emulation: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200 (II) XINPUT: Adding extended input device "Macintosh mouse button emulation" (type: MOUSE) (**) Macintosh mouse button emulation: (accel) keeping acceleration scheme 1 (**) Macintosh mouse button emulation: (accel) acceleration profile 0 (II) Macintosh mouse button emulation: initialized for relative axes. (II) config/hal: no driver specified for device /org/freedesktop/Hal/devices/pci_1002_4383_logicaldev_input (II) config/hal: Adding input device Logitech USB-PS/2 Optical Mouse (**) Logitech USB-PS/2 Optical Mouse: always reports core events (**) Logitech USB-PS/2 Optical Mouse: Device: "/dev/input/event4" (II) Logitech USB-PS/2 Optical Mouse: Found 12 mouse buttons (II) Logitech USB-PS/2 Optical Mouse: Found scroll wheel(s) (II) Logitech USB-PS/2 Optical Mouse: Found relative axes (II) Logitech USB-PS/2 Optical Mouse: Found x and y relative axes (II) Logitech USB-PS/2 Optical Mouse: Configuring as mouse (**) Logitech USB-PS/2 Optical Mouse: YAxisMapping: buttons 4 and 5 (**) Logitech USB-PS/2 Optical Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200 (II) XINPUT: Adding extended input device "Logitech USB-PS/2 Optical Mouse" (type: MOUSE) (**) Logitech USB-PS/2 Optical Mouse: (accel) keeping acceleration scheme 1 (**) Logitech USB-PS/2 Optical Mouse: (accel) acceleration profile 0 (II) Logitech USB-PS/2 Optical Mouse: initialized for relative axes. (II) config/hal: Adding input device Power Button (**) Power Button: always reports core events (**) Power Button: Device: "/dev/input/event1" (II) Power Button: Found keys (II) Power Button: Configuring as keyboard (II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD) (**) Option "xkb_rules" "evdev" (**) Option "xkb_model" "evdev" (**) Option "xkb_layout" "us" (II) config/hal: Adding input device Power Button (**) Power Button: always reports core events (**) Power Button: Device: "/dev/input/event0" (II) Power Button: Found keys (II) Power Button: Configuring as keyboard (II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD) (**) Option "xkb_rules" "evdev" (**) Option "xkb_model" "evdev" (**) Option "xkb_layout" "us" (II) XKB: Reusing cached keymap (II) AT Translated Set 2 keyboard: Close (II) UnloadModule: "evdev" (II) Macintosh mouse button emulation: Close (II) UnloadModule: "evdev" (II) Logitech USB-PS/2 Optical Mouse: Close (II) UnloadModule: "evdev" (II) Power Button: Close (II) UnloadModule: "evdev" (II) Power Button: Close (II) UnloadModule: "evdev" (II) RADEON(0): RADEONCloseScreen (II) RADEON(0): RADEONDRIStop (II) RADEON(0): RADEONRestore (II) RADEON(0): DIG0 transmitter: Coherent Mode enabled (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Output DIG0 transmitter setup success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC memreq 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailDelayMicroSeconds (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Blank CRTC 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC memreq 1 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Disable CRTC 1 success (II) RADEON(0): RADEONRestoreMemMapRegisters() : (II) RADEON(0): MC_FB_LOCATION : 0x00cf00c0 0x00cf00c0 (II) RADEON(0): MC_AGP_LOCATION : 0x00000000 (II) RADEON(0): avivo_restore ! (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Enable CRTC memreq 0 success (II) RADEON(0): CAIL: CailAllocateMemory (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailReadATIRegister (II) RADEON(0): CAIL: CailWriteATIRegister (II) RADEON(0): CAIL: CailReleaseMemory (II) RADEON(0): ParseTable said: CD_SUCCESS (II) RADEON(0): Call to AtomBIOS Exec succeeded Unblank CRTC 0 success (II) RADEON(0): Disposing accel... (II) RADEON(0): Disposing cursor info (II) RADEON(0): Unmapping memory (II) RADEON(0): RADEONDRICloseScreen (II) RADEON(0): [drm] removed 1 reserved context for kernel (II) RADEON(0): [drm] unmapping 8192 bytes of SAREA 0x2b7ff000 at 0x7f7a34532000 (II) RADEON(0): [drm] Closed DRM master.