Attachment 120759 Details for Bug 93555 – dmesg with drm.debug=0x1e log_buf_len=1M, two attempts at [ 89.938216] and [ 148.551328]

dmesg with drm.debug=0x1e log_buf_len=1M, two attempts at [ 89.938216] and [ 148.551328]

dmesg.txt (text/plain), 849.19 KB, created by Bruno Pagani on 2016-01-01 22:26:15 UTC

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Description:

Filename:

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Creator: Bruno Pagani

Created: 2016-01-01 22:26:15 UTC

Size: 849.19 KB

patch

obsolete

>[    0.000000] microcode: CPU0 microcode updated early to revision 0x1c, date = 2014-07-03
>[    0.000000] Initializing cgroup subsys cpuset
>[    0.000000] Initializing cgroup subsys cpu
>[    0.000000] Initializing cgroup subsys cpuacct
>[    0.000000] Linux version 4.3.3-2-ARCH (builduser@tobias) (gcc version 5.3.0 (GCC) ) #1 SMP PREEMPT Wed Dec 23 20:09:18 CET 2015
>[    0.000000] Command line: BOOT_IMAGE=/@boot/vmlinuz-linux root=UUID=63b1b99e-c071-4799-9abc-a6867a0ee3d5 rw rootflags=subvol=@ cryptdevice=UUID=4b2924db-9c94-4123-8836-b1e675bafb11:root:allow-discards drm.vblankoffdelay=1 acpi_enforce_resources=lax drm.debug=0x1e log_buf_len=1M
>[    0.000000] x86/fpu: xstate_offset[2]: 0240, xstate_sizes[2]: 0100
>[    0.000000] x86/fpu: Supporting XSAVE feature 0x01: 'x87 floating point registers'
>[    0.000000] x86/fpu: Supporting XSAVE feature 0x02: 'SSE registers'
>[    0.000000] x86/fpu: Supporting XSAVE feature 0x04: 'AVX registers'
>[    0.000000] x86/fpu: Enabled xstate features 0x7, context size is 0x340 bytes, using 'standard' format.
>[    0.000000] x86/fpu: Using 'eager' FPU context switches.
>[    0.000000] e820: BIOS-provided physical RAM map:
>[    0.000000] BIOS-e820: [mem 0x0000000000000000-0x0000000000057fff] usable
>[    0.000000] BIOS-e820: [mem 0x0000000000058000-0x0000000000058fff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000000059000-0x000000000009dfff] usable
>[    0.000000] BIOS-e820: [mem 0x000000000009e000-0x000000000009ffff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000000100000-0x00000000b85cefff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000b85cf000-0x00000000b85d5fff] ACPI NVS
>[    0.000000] BIOS-e820: [mem 0x00000000b85d6000-0x00000000b8a13fff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000b8a14000-0x00000000b902ffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000b9030000-0x00000000ca795fff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000ca796000-0x00000000cab48fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000cab49000-0x00000000cab69fff] ACPI data
>[    0.000000] BIOS-e820: [mem 0x00000000cab6a000-0x00000000cb53efff] ACPI NVS
>[    0.000000] BIOS-e820: [mem 0x00000000cb53f000-0x00000000cbf66fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000cbf67000-0x00000000cbffefff] type 20
>[    0.000000] BIOS-e820: [mem 0x00000000cbfff000-0x00000000cbffffff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000cd000000-0x00000000cf1fffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000f8000000-0x00000000fbffffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fec00000-0x00000000fec00fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fed00000-0x00000000fed03fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fed1c000-0x00000000fed1ffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fee00000-0x00000000fee00fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000ff000000-0x00000000ffffffff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000100000000-0x000000042fdfffff] usable
>[    0.000000] NX (Execute Disable) protection: active
>[    0.000000] efi: EFI v2.31 by American Megatrends
>[    0.000000] efi:  ACPI 2.0=0xcab4f000  ACPI=0xcab4f000  SMBIOS=0xf0000 
>[    0.000000] SMBIOS 2.7 present.
>[    0.000000] DMI: Dell Inc. XPS 15 9530/XPS 15 9530, BIOS A08 01/08/2015
>[    0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved
>[    0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable
>[    0.000000] e820: last_pfn = 0x42fe00 max_arch_pfn = 0x400000000
>[    0.000000] MTRR default type: uncachable
>[    0.000000] MTRR fixed ranges enabled:
>[    0.000000]   00000-9FFFF write-back
>[    0.000000]   A0000-DFFFF uncachable
>[    0.000000]   E0000-FFFFF write-protect
>[    0.000000] MTRR variable ranges enabled:
>[    0.000000]   0 base 0000000000 mask 7C00000000 write-back
>[    0.000000]   1 base 0400000000 mask 7FE0000000 write-back
>[    0.000000]   2 base 0420000000 mask 7FF0000000 write-back
>[    0.000000]   3 base 00E0000000 mask 7FE0000000 uncachable
>[    0.000000]   4 base 00D0000000 mask 7FF0000000 uncachable
>[    0.000000]   5 base 00CE000000 mask 7FFE000000 uncachable
>[    0.000000]   6 base 00CD000000 mask 7FFF000000 uncachable
>[    0.000000]   7 base 042FE00000 mask 7FFFE00000 uncachable
>[    0.000000]   8 disabled
>[    0.000000]   9 disabled
>[    0.000000] x86/PAT: Configuration [0-7]: WB  WC  UC- UC  WB  WC  UC- WT  
>[    0.000000] e820: update [mem 0xcd000000-0xffffffff] usable ==> reserved
>[    0.000000] e820: last_pfn = 0xcc000 max_arch_pfn = 0x400000000
>[    0.000000] Scanning 1 areas for low memory corruption
>[    0.000000] Base memory trampoline at [ffff880000098000] 98000 size 24576
>[    0.000000] Using GB pages for direct mapping
>[    0.000000] init_memory_mapping: [mem 0x00000000-0x000fffff]
>[    0.000000]  [mem 0x00000000-0x000fffff] page 4k
>[    0.000000] BRK [0x01b3f000, 0x01b3ffff] PGTABLE
>[    0.000000] BRK [0x01b40000, 0x01b40fff] PGTABLE
>[    0.000000] BRK [0x01b41000, 0x01b41fff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0x42fc00000-0x42fdfffff]
>[    0.000000]  [mem 0x42fc00000-0x42fdfffff] page 2M
>[    0.000000] BRK [0x01b42000, 0x01b42fff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0x420000000-0x42fbfffff]
>[    0.000000]  [mem 0x420000000-0x42fbfffff] page 2M
>[    0.000000] init_memory_mapping: [mem 0x400000000-0x41fffffff]
>[    0.000000]  [mem 0x400000000-0x41fffffff] page 2M
>[    0.000000] init_memory_mapping: [mem 0x00100000-0xb85cefff]
>[    0.000000]  [mem 0x00100000-0x001fffff] page 4k
>[    0.000000]  [mem 0x00200000-0x3fffffff] page 2M
>[    0.000000]  [mem 0x40000000-0x7fffffff] page 1G
>[    0.000000]  [mem 0x80000000-0xb83fffff] page 2M
>[    0.000000]  [mem 0xb8400000-0xb85cefff] page 4k
>[    0.000000] init_memory_mapping: [mem 0xb85d6000-0xb8a13fff]
>[    0.000000]  [mem 0xb85d6000-0xb85fffff] page 4k
>[    0.000000]  [mem 0xb8600000-0xb89fffff] page 2M
>[    0.000000]  [mem 0xb8a00000-0xb8a13fff] page 4k
>[    0.000000] BRK [0x01b43000, 0x01b43fff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0xb9030000-0xca795fff]
>[    0.000000]  [mem 0xb9030000-0xb91fffff] page 4k
>[    0.000000]  [mem 0xb9200000-0xca5fffff] page 2M
>[    0.000000]  [mem 0xca600000-0xca795fff] page 4k
>[    0.000000] BRK [0x01b44000, 0x01b44fff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0xcbfff000-0xcbffffff]
>[    0.000000]  [mem 0xcbfff000-0xcbffffff] page 4k
>[    0.000000] init_memory_mapping: [mem 0x100000000-0x3ffffffff]
>[    0.000000]  [mem 0x100000000-0x3ffffffff] page 1G
>[    0.000000] log_buf_len: 1048576 bytes
>[    0.000000] early log buf free: 517700(98%)
>[    0.000000] RAMDISK: [mem 0x36f2c000-0x3778dfff]
>[    0.000000] ACPI: Early table checksum verification disabled
>[    0.000000] ACPI: RSDP 0x00000000CAB4F000 000024 (v02 DELL  )
>[    0.000000] ACPI: XSDT 0x00000000CAB4F0A0 0000C4 (v01 DELL   CL09     01072009 AMI  00010013)
>[    0.000000] ACPI: FACP 0x00000000CAB5CF28 00010C (v05 DELL   CL09     01072009 AMI  00010013)
>[    0.000000] ACPI: DSDT 0x00000000CAB4F1F8 00DD2E (v02 DELL   CL09     00000000 INTL 20120711)
>[    0.000000] ACPI: FACS 0x00000000CB538080 000040
>[    0.000000] ACPI: APIC 0x00000000CAB5D038 000092 (v03 DELL   CL09     01072009 AMI  00010013)
>[    0.000000] ACPI: FPDT 0x00000000CAB5D0D0 000044 (v01 DELL   CL09     01072009 AMI  00010013)
>[    0.000000] ACPI: SSDT 0x00000000CAB5D118 000C9A (v01 TrmRef PtidDevc 00001000 INTL 20091112)
>[    0.000000] ACPI: SSDT 0x00000000CAB5DDB8 000228 (v01 INTEL  sensrhub 00000000 INTL 20120711)
>[    0.000000] ACPI: SLIC 0x00000000CAB5DFE0 000176 (v01 DELL   CL09     01072009 AMI  00010013)
>[    0.000000] ACPI: SSDT 0x00000000CAB5E158 000539 (v01 PmRef  Cpu0Ist  00003000 INTL 20120711)
>[    0.000000] ACPI: SSDT 0x00000000CAB5E698 000AD8 (v01 PmRef  CpuPm    00003000 INTL 20120711)
>[    0.000000] ACPI: SSDT 0x00000000CAB5F170 0002DE (v01 PmRef  Cpu0Tst  00003000 INTL 20120711)
>[    0.000000] ACPI: SSDT 0x00000000CAB5F450 000348 (v01 PmRef  ApTst    00003000 INTL 20120711)
>[    0.000000] ACPI: MCFG 0x00000000CAB5F798 00003C (v01 DELL   CL09     01072009 MSFT 00000097)
>[    0.000000] ACPI: SSDT 0x00000000CAB5F7D8 004F7F (v01 DptfTa DptfTabl 00001000 INTL 20120711)
>[    0.000000] ACPI: HPET 0x00000000CAB64758 000038 (v01 DELL   CL09     01072009 AMI. 00000005)
>[    0.000000] ACPI: SSDT 0x00000000CAB64790 0003AA (v01 SataRe SataTabl 00001000 INTL 20120711)
>[    0.000000] ACPI: SSDT 0x00000000CAB64B40 002B6D (v01 SaSsdt SaSsdt   00003000 INTL 20091112)
>[    0.000000] ACPI: SSDT 0x00000000CAB676B0 000D7C (v01 SgRef  SgPeg    00001000 INTL 20120711)
>[    0.000000] ACPI: MSDM 0x00000000CAB68430 000055 (v03 DELL   CL09     01072009 AMI  00010013)
>[    0.000000] ACPI: BGRT 0x00000000CAB68488 000038 (v00 DELL   CL09     01072009 AMI  00010013)
>[    0.000000] ACPI: DMAR 0x00000000CAB684C0 0000B8 (v01 INTEL  HSW      00000001 INTL 00000001)
>[    0.000000] ACPI: SSDT 0x00000000CAB68578 00123B (v01 OptRef OptTabl  00001000 INTL 20120711)
>[    0.000000] ACPI: Local APIC address 0xfee00000
>[    0.000000] No NUMA configuration found
>[    0.000000] Faking a node at [mem 0x0000000000000000-0x000000042fdfffff]
>[    0.000000] NODE_DATA(0) allocated [mem 0x42fcf7000-0x42fcfafff]
>[    0.000000]  [ffffea0000000000-ffffea0010bfffff] PMD -> [ffff88041f400000-ffff88042f3fffff] on node 0
>[    0.000000] Zone ranges:
>[    0.000000]   DMA      [mem 0x0000000000001000-0x0000000000ffffff]
>[    0.000000]   DMA32    [mem 0x0000000001000000-0x00000000ffffffff]
>[    0.000000]   Normal   [mem 0x0000000100000000-0x000000042fdfffff]
>[    0.000000] Movable zone start for each node
>[    0.000000] Early memory node ranges
>[    0.000000]   node   0: [mem 0x0000000000001000-0x0000000000057fff]
>[    0.000000]   node   0: [mem 0x0000000000059000-0x000000000009dfff]
>[    0.000000]   node   0: [mem 0x0000000000100000-0x00000000b85cefff]
>[    0.000000]   node   0: [mem 0x00000000b85d6000-0x00000000b8a13fff]
>[    0.000000]   node   0: [mem 0x00000000b9030000-0x00000000ca795fff]
>[    0.000000]   node   0: [mem 0x00000000cbfff000-0x00000000cbffffff]
>[    0.000000]   node   0: [mem 0x0000000100000000-0x000000042fdfffff]
>[    0.000000] Initmem setup node 0 [mem 0x0000000000001000-0x000000042fdfffff]
>[    0.000000] On node 0 totalpages: 4169488
>[    0.000000]   DMA zone: 64 pages used for memmap
>[    0.000000]   DMA zone: 23 pages reserved
>[    0.000000]   DMA zone: 3996 pages, LIFO batch:0
>[    0.000000]   DMA32 zone: 12870 pages used for memmap
>[    0.000000]   DMA32 zone: 823668 pages, LIFO batch:31
>[    0.000000]   Normal zone: 52216 pages used for memmap
>[    0.000000]   Normal zone: 3341824 pages, LIFO batch:31
>[    0.000000] Reserving Intel graphics stolen memory at 0xcd200000-0xcf1fffff
>[    0.000000] ACPI: PM-Timer IO Port: 0x1808
>[    0.000000] ACPI: Local APIC address 0xfee00000
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0xff] high edge lint[0x1])
>[    0.000000] IOAPIC[0]: apic_id 8, version 32, address 0xfec00000, GSI 0-23
>[    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
>[    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level)
>[    0.000000] ACPI: IRQ0 used by override.
>[    0.000000] ACPI: IRQ9 used by override.
>[    0.000000] Using ACPI (MADT) for SMP configuration information
>[    0.000000] ACPI: HPET id: 0x8086a701 base: 0xfed00000
>[    0.000000] smpboot: Allowing 8 CPUs, 0 hotplug CPUs
>[    0.000000] PM: Registered nosave memory: [mem 0x00000000-0x00000fff]
>[    0.000000] PM: Registered nosave memory: [mem 0x00058000-0x00058fff]
>[    0.000000] PM: Registered nosave memory: [mem 0x0009e000-0x0009ffff]
>[    0.000000] PM: Registered nosave memory: [mem 0x000a0000-0x000fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xb85cf000-0xb85d5fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xb8a14000-0xb902ffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xca796000-0xcab48fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xcab49000-0xcab69fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xcab6a000-0xcb53efff]
>[    0.000000] PM: Registered nosave memory: [mem 0xcb53f000-0xcbf66fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xcbf67000-0xcbffefff]
>[    0.000000] PM: Registered nosave memory: [mem 0xcc000000-0xccffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xcd000000-0xcf1fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xcf200000-0xf7ffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xf8000000-0xfbffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfc000000-0xfebfffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfec00000-0xfec00fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfec01000-0xfecfffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed00000-0xfed03fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed04000-0xfed1bfff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed1c000-0xfed1ffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed20000-0xfedfffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfee00000-0xfee00fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfee01000-0xfeffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xff000000-0xffffffff]
>[    0.000000] e820: [mem 0xcf200000-0xf7ffffff] available for PCI devices
>[    0.000000] Booting paravirtualized kernel on bare hardware
>[    0.000000] clocksource: refined-jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 6370452778343963 ns
>[    0.000000] setup_percpu: NR_CPUS:128 nr_cpumask_bits:128 nr_cpu_ids:8 nr_node_ids:1
>[    0.000000] PERCPU: Embedded 32 pages/cpu @ffff88042fa00000 s92824 r8192 d30056 u262144
>[    0.000000] pcpu-alloc: s92824 r8192 d30056 u262144 alloc=1*2097152
>[    0.000000] pcpu-alloc: [0] 0 1 2 3 4 5 6 7 
>[    0.000000] Built 1 zonelists in Node order, mobility grouping on.  Total pages: 4104315
>[    0.000000] Policy zone: Normal
>[    0.000000] Kernel command line: BOOT_IMAGE=/@boot/vmlinuz-linux root=UUID=63b1b99e-c071-4799-9abc-a6867a0ee3d5 rw rootflags=subvol=@ cryptdevice=UUID=4b2924db-9c94-4123-8836-b1e675bafb11:root:allow-discards drm.vblankoffdelay=1 acpi_enforce_resources=lax drm.debug=0x1e log_buf_len=1M
>[    0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes)
>[    0.000000] Calgary: detecting Calgary via BIOS EBDA area
>[    0.000000] Calgary: Unable to locate Rio Grande table in EBDA - bailing!
>[    0.000000] Memory: 16287860K/16677952K available (5666K kernel code, 937K rwdata, 1796K rodata, 1188K init, 1164K bss, 390092K reserved, 0K cma-reserved)
>[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
>[    0.000000] Preemptible hierarchical RCU implementation.
>[    0.000000]         Build-time adjustment of leaf fanout to 64.
>[    0.000000]         RCU restricting CPUs from NR_CPUS=128 to nr_cpu_ids=8.
>[    0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=64, nr_cpu_ids=8
>[    0.000000] NR_IRQS:8448 nr_irqs:488 16
>[    0.000000] Console: colour dummy device 80x25
>[    0.000000] console [tty0] enabled
>[    0.000000] clocksource: hpet: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 133484882848 ns
>[    0.000000] hpet clockevent registered
>[    0.000000] tsc: Fast TSC calibration using PIT
>[    0.000000] spurious 8259A interrupt: IRQ7.
>[    0.000000] tsc: Detected 2194.789 MHz processor
>[    0.000024] Calibrating delay loop (skipped), value calculated using timer frequency.. 4391.47 BogoMIPS (lpj=7315963)
>[    0.000025] pid_max: default: 32768 minimum: 301
>[    0.000030] ACPI: Core revision 20150818
>[    0.014189] ACPI: 12 ACPI AML tables successfully acquired and loaded
>[    0.014947] Security Framework initialized
>[    0.014949] Yama: becoming mindful.
>[    0.015756] Dentry cache hash table entries: 2097152 (order: 12, 16777216 bytes)
>[    0.018191] Inode-cache hash table entries: 1048576 (order: 11, 8388608 bytes)
>[    0.019237] Mount-cache hash table entries: 32768 (order: 6, 262144 bytes)
>[    0.019251] Mountpoint-cache hash table entries: 32768 (order: 6, 262144 bytes)
>[    0.019440] Initializing cgroup subsys io
>[    0.019444] Initializing cgroup subsys memory
>[    0.019449] Initializing cgroup subsys devices
>[    0.019451] Initializing cgroup subsys freezer
>[    0.019453] Initializing cgroup subsys net_cls
>[    0.019454] Initializing cgroup subsys pids
>[    0.019472] CPU: Physical Processor ID: 0
>[    0.019473] CPU: Processor Core ID: 0
>[    0.019476] ENERGY_PERF_BIAS: Set to 'normal', was 'performance'
>[    0.019477] ENERGY_PERF_BIAS: View and update with x86_energy_perf_policy(8)
>[    0.020277] mce: CPU supports 9 MCE banks
>[    0.020289] CPU0: Thermal monitoring enabled (TM1)
>[    0.020297] process: using mwait in idle threads
>[    0.020299] Last level iTLB entries: 4KB 1024, 2MB 1024, 4MB 1024
>[    0.020300] Last level dTLB entries: 4KB 1024, 2MB 1024, 4MB 1024, 1GB 4
>[    0.020562] Freeing SMP alternatives memory: 20K (ffffffff81a15000 - ffffffff81a1a000)
>[    0.025427] ftrace: allocating 22571 entries in 89 pages
>[    0.032896] DMAR: Host address width 39
>[    0.032898] DMAR: DRHD base: 0x000000fed90000 flags: 0x0
>[    0.032906] DMAR: dmar0: reg_base_addr fed90000 ver 1:0 cap c0000020660462 ecap f0101a
>[    0.032907] DMAR: DRHD base: 0x000000fed91000 flags: 0x1
>[    0.032911] DMAR: dmar1: reg_base_addr fed91000 ver 1:0 cap d2008020660462 ecap f010da
>[    0.032911] DMAR: RMRR base: 0x000000cbe8a000 end: 0x000000cbe98fff
>[    0.032912] DMAR: RMRR base: 0x000000cd000000 end: 0x000000cf1fffff
>[    0.032914] DMAR-IR: IOAPIC id 8 under DRHD base  0xfed91000 IOMMU 1
>[    0.032915] DMAR-IR: HPET id 0 under DRHD base 0xfed91000
>[    0.032916] DMAR-IR: Queued invalidation will be enabled to support x2apic and Intr-remapping.
>[    0.033164] DMAR-IR: Enabled IRQ remapping in x2apic mode
>[    0.033165] x2apic enabled
>[    0.033170] Switched APIC routing to cluster x2apic.
>[    0.033585] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
>[    0.066624] TSC deadline timer enabled
>[    0.066626] smpboot: CPU0: Intel(R) Core(TM) i7-4702HQ CPU @ 2.20GHz (family: 0x6, model: 0x3c, stepping: 0x3)
>[    0.066646] Performance Events: PEBS fmt2+, 16-deep LBR, Haswell events, full-width counters, Intel PMU driver.
>[    0.066662] ... version:                3
>[    0.066663] ... bit width:              48
>[    0.066663] ... generic registers:      4
>[    0.066664] ... value mask:             0000ffffffffffff
>[    0.066665] ... max period:             0000ffffffffffff
>[    0.066666] ... fixed-purpose events:   3
>[    0.066666] ... event mask:             000000070000000f
>[    0.096732] x86: Booting SMP configuration:
>[    0.096733] .... node  #0, CPUs:      #1
>[    0.108710] microcode: CPU1 microcode updated early to revision 0x1c, date = 2014-07-03
>[    0.111670] NMI watchdog: enabled on all CPUs, permanently consumes one hw-PMU counter.
>[    0.121637]  #2
>[    0.133613] microcode: CPU2 microcode updated early to revision 0x1c, date = 2014-07-03
>[    0.146552]  #3
>[    0.158531] microcode: CPU3 microcode updated early to revision 0x1c, date = 2014-07-03
>[    0.171487]  #4 #5 #6 #7
>[    0.257304] x86: Booted up 1 node, 8 CPUs
>[    0.257307] smpboot: Total of 8 processors activated (35130.81 BogoMIPS)
>[    0.263702] devtmpfs: initialized
>[    0.266001] PM: Registering ACPI NVS region [mem 0xb85cf000-0xb85d5fff] (28672 bytes)
>[    0.266003] PM: Registering ACPI NVS region [mem 0xcab6a000-0xcb53efff] (10309632 bytes)
>[    0.266157] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 6370867519511994 ns
>[    0.266224] pinctrl core: initialized pinctrl subsystem
>[    0.266261] RTC time: 22:09:57, date: 01/01/16
>[    0.266352] NET: Registered protocol family 16
>[    0.276937] cpuidle: using governor ladder
>[    0.290289] cpuidle: using governor menu
>[    0.290356] ACPI: bus type PCI registered
>[    0.290357] acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
>[    0.290423] PCI: MMCONFIG for domain 0000 [bus 00-3f] at [mem 0xf8000000-0xfbffffff] (base 0xf8000000)
>[    0.290425] PCI: MMCONFIG at [mem 0xf8000000-0xfbffffff] reserved in E820
>[    0.290431] pmd_set_huge: Cannot satisfy [mem 0xf8000000-0xf8200000] with a huge-page mapping due to MTRR override.
>[    0.290512] PCI: Using configuration type 1 for base access
>[    0.290914] perf_event_intel: PMU erratum BJ122, BV98, HSD29 worked around, HT is on
>[    0.303940] ACPI: Added _OSI(Module Device)
>[    0.303942] ACPI: Added _OSI(Processor Device)
>[    0.303943] ACPI: Added _OSI(3.0 _SCP Extensions)
>[    0.303944] ACPI: Added _OSI(Processor Aggregator Device)
>[    0.307963] ACPI: Executed 2 blocks of module-level executable AML code
>[    0.310824] [Firmware Bug]: ACPI: BIOS _OSI(Linux) query ignored
>[    0.311785] ACPI: Dynamic OEM Table Load:
>[    0.311791] ACPI: SSDT 0xFFFF88041CF7BC00 0003D3 (v01 PmRef  Cpu0Cst  00003001 INTL 20120711)
>[    0.312384] ACPI: Dynamic OEM Table Load:
>[    0.312389] ACPI: SSDT 0xFFFF88041CF82800 0005AA (v01 PmRef  ApIst    00003000 INTL 20120711)
>[    0.313010] ACPI: Dynamic OEM Table Load:
>[    0.313014] ACPI: SSDT 0xFFFF88041CFDE400 000119 (v01 PmRef  ApCst    00003000 INTL 20120711)
>[    0.314403] ACPI : EC: EC started
>[    0.314615] ACPI: Interpreter enabled
>[    0.314621] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S1_] (20150818/hwxface-580)
>[    0.314627] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S2_] (20150818/hwxface-580)
>[    0.314642] ACPI: (supports S0 S3 S4 S5)
>[    0.314643] ACPI: Using IOAPIC for interrupt routing
>[    0.314662] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
>[    0.459727] ACPI: Power Resource [NVP3] (on)
>[    0.459745] ACPI: Power Resource [NVP2] (on)
>[    0.461258] ACPI: Power Resource [FN00] (off)
>[    0.461313] ACPI: Power Resource [FN01] (off)
>[    0.461954] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-3e])
>[    0.461958] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI]
>[    0.462395] acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug PME AER PCIeCapability]
>[    0.462664] PCI host bridge to bus 0000:00
>[    0.462666] pci_bus 0000:00: root bus resource [bus 00-3e]
>[    0.462668] pci_bus 0000:00: root bus resource [io  0x0000-0x0cf7 window]
>[    0.462669] pci_bus 0000:00: root bus resource [io  0x0d00-0xffff window]
>[    0.462670] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff window]
>[    0.462671] pci_bus 0000:00: root bus resource [mem 0x000c0000-0x000c3fff window]
>[    0.462672] pci_bus 0000:00: root bus resource [mem 0x000c4000-0x000c7fff window]
>[    0.462673] pci_bus 0000:00: root bus resource [mem 0x000c8000-0x000cbfff window]
>[    0.462674] pci_bus 0000:00: root bus resource [mem 0x000cc000-0x000cffff window]
>[    0.462675] pci_bus 0000:00: root bus resource [mem 0x000d0000-0x000d3fff window]
>[    0.462676] pci_bus 0000:00: root bus resource [mem 0x000d4000-0x000d7fff window]
>[    0.462678] pci_bus 0000:00: root bus resource [mem 0x000d8000-0x000dbfff window]
>[    0.462679] pci_bus 0000:00: root bus resource [mem 0x000dc000-0x000dffff window]
>[    0.462680] pci_bus 0000:00: root bus resource [mem 0xcf200000-0xfeafffff window]
>[    0.462685] pci 0000:00:00.0: [8086:0c04] type 00 class 0x060000
>[    0.462752] pci 0000:00:01.0: [8086:0c01] type 01 class 0x060400
>[    0.462777] pci 0000:00:01.0: PME# supported from D0 D3hot D3cold
>[    0.462836] pci 0000:00:01.0: System wakeup disabled by ACPI
>[    0.462866] pci 0000:00:02.0: [8086:0416] type 00 class 0x030000
>[    0.462876] pci 0000:00:02.0: reg 0x10: [mem 0xf7400000-0xf77fffff 64bit]
>[    0.462881] pci 0000:00:02.0: reg 0x18: [mem 0xd0000000-0xdfffffff 64bit pref]
>[    0.462885] pci 0000:00:02.0: reg 0x20: [io  0xf000-0xf03f]
>[    0.462942] pci 0000:00:03.0: [8086:0c0c] type 00 class 0x040300
>[    0.462951] pci 0000:00:03.0: reg 0x10: [mem 0xf7a1c000-0xf7a1ffff 64bit]
>[    0.463009] pci 0000:00:04.0: [8086:0c03] type 00 class 0x118000
>[    0.463020] pci 0000:00:04.0: reg 0x10: [mem 0xf7a10000-0xf7a17fff 64bit]
>[    0.463098] pci 0000:00:14.0: [8086:8c31] type 00 class 0x0c0330
>[    0.463120] pci 0000:00:14.0: reg 0x10: [mem 0xf7a00000-0xf7a0ffff 64bit]
>[    0.463162] pci 0000:00:14.0: PME# supported from D3hot D3cold
>[    0.463192] pci 0000:00:14.0: System wakeup disabled by ACPI
>[    0.463219] pci 0000:00:16.0: [8086:8c3a] type 00 class 0x078000
>[    0.463242] pci 0000:00:16.0: reg 0x10: [mem 0xf7a26000-0xf7a2600f 64bit]
>[    0.463286] pci 0000:00:16.0: PME# supported from D0 D3hot D3cold
>[    0.463347] pci 0000:00:1a.0: [8086:8c2d] type 00 class 0x0c0320
>[    0.463372] pci 0000:00:1a.0: reg 0x10: [mem 0xf7a24000-0xf7a243ff]
>[    0.463431] pci 0000:00:1a.0: PME# supported from D0 D3hot D3cold
>[    0.463471] pci 0000:00:1a.0: System wakeup disabled by ACPI
>[    0.463500] pci 0000:00:1b.0: [8086:8c20] type 00 class 0x040300
>[    0.463522] pci 0000:00:1b.0: reg 0x10: [mem 0xf7a18000-0xf7a1bfff 64bit]
>[    0.463569] pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold
>[    0.463600] pci 0000:00:1b.0: System wakeup disabled by ACPI
>[    0.463627] pci 0000:00:1c.0: [8086:8c10] type 01 class 0x060400
>[    0.463677] pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold
>[    0.463730] pci 0000:00:1c.0: System wakeup disabled by ACPI
>[    0.463758] pci 0000:00:1c.2: [8086:8c14] type 01 class 0x060400
>[    0.463809] pci 0000:00:1c.2: PME# supported from D0 D3hot D3cold
>[    0.463860] pci 0000:00:1c.2: System wakeup disabled by ACPI
>[    0.463887] pci 0000:00:1c.3: [8086:8c16] type 01 class 0x060400
>[    0.463942] pci 0000:00:1c.3: PME# supported from D0 D3hot D3cold
>[    0.463995] pci 0000:00:1c.3: System wakeup disabled by ACPI
>[    0.464027] pci 0000:00:1d.0: [8086:8c26] type 00 class 0x0c0320
>[    0.464051] pci 0000:00:1d.0: reg 0x10: [mem 0xf7a23000-0xf7a233ff]
>[    0.464111] pci 0000:00:1d.0: PME# supported from D0 D3hot D3cold
>[    0.464150] pci 0000:00:1d.0: System wakeup disabled by ACPI
>[    0.464180] pci 0000:00:1f.0: [8086:8c4b] type 00 class 0x060100
>[    0.464315] pci 0000:00:1f.2: [8086:8c03] type 00 class 0x010601
>[    0.464333] pci 0000:00:1f.2: reg 0x10: [io  0xf0b0-0xf0b7]
>[    0.464340] pci 0000:00:1f.2: reg 0x14: [io  0xf0a0-0xf0a3]
>[    0.464347] pci 0000:00:1f.2: reg 0x18: [io  0xf090-0xf097]
>[    0.464353] pci 0000:00:1f.2: reg 0x1c: [io  0xf080-0xf083]
>[    0.464359] pci 0000:00:1f.2: reg 0x20: [io  0xf060-0xf07f]
>[    0.464366] pci 0000:00:1f.2: reg 0x24: [mem 0xf7a22000-0xf7a227ff]
>[    0.464387] pci 0000:00:1f.2: PME# supported from D3hot
>[    0.464439] pci 0000:00:1f.3: [8086:8c22] type 00 class 0x0c0500
>[    0.464454] pci 0000:00:1f.3: reg 0x10: [mem 0xf7a21000-0xf7a210ff 64bit]
>[    0.464471] pci 0000:00:1f.3: reg 0x20: [io  0xf040-0xf05f]
>[    0.464536] pci 0000:00:1f.6: [8086:8c24] type 00 class 0x118000
>[    0.464558] pci 0000:00:1f.6: reg 0x10: [mem 0xf7a20000-0xf7a20fff 64bit]
>[    0.464674] pci 0000:02:00.0: [10de:0fe4] type 00 class 0x030200
>[    0.464700] pci 0000:02:00.0: reg 0x10: [mem 0xf6000000-0xf6ffffff]
>[    0.464713] pci 0000:02:00.0: reg 0x14: [mem 0xe0000000-0xefffffff 64bit pref]
>[    0.464725] pci 0000:02:00.0: reg 0x1c: [mem 0xf0000000-0xf1ffffff 64bit pref]
>[    0.464734] pci 0000:02:00.0: reg 0x24: [io  0xe000-0xe07f]
>[    0.464742] pci 0000:02:00.0: reg 0x30: [mem 0xf7000000-0xf707ffff pref]
>[    0.464821] pci 0000:02:00.0: System wakeup disabled by ACPI
>[    0.464857] pci 0000:00:01.0: PCI bridge to [bus 02-03]
>[    0.464859] pci 0000:00:01.0:   bridge window [io  0xe000-0xefff]
>[    0.464861] pci 0000:00:01.0:   bridge window [mem 0xf6000000-0xf70fffff]
>[    0.464863] pci 0000:00:01.0:   bridge window [mem 0xe0000000-0xf1ffffff 64bit pref]
>[    0.464910] pci 0000:00:1c.0: PCI bridge to [bus 04]
>[    0.465010] pci 0000:06:00.0: [8086:08b1] type 00 class 0x028000
>[    0.465086] pci 0000:06:00.0: reg 0x10: [mem 0xf7900000-0xf7901fff 64bit]
>[    0.465249] pci 0000:06:00.0: PME# supported from D0 D3hot D3cold
>[    0.465301] pci 0000:06:00.0: System wakeup disabled by ACPI
>[    0.470615] pci 0000:00:1c.2: PCI bridge to [bus 06]
>[    0.470620] pci 0000:00:1c.2:   bridge window [mem 0xf7900000-0xf79fffff]
>[    0.470748] pci 0000:07:00.0: [10ec:5249] type 00 class 0xff0000
>[    0.470791] pci 0000:07:00.0: reg 0x10: [mem 0xf7800000-0xf7800fff]
>[    0.471010] pci 0000:07:00.0: supports D1 D2
>[    0.471012] pci 0000:07:00.0: PME# supported from D1 D2 D3hot D3cold
>[    0.471079] pci 0000:07:00.0: System wakeup disabled by ACPI
>[    0.477300] pci 0000:00:1c.3: PCI bridge to [bus 07]
>[    0.477305] pci 0000:00:1c.3:   bridge window [mem 0xf7800000-0xf78fffff]
>[    0.547755] ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.547802] ACPI: PCI Interrupt Link [LNKB] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.547847] ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.547890] ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.547933] ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.547975] ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.548017] ACPI: PCI Interrupt Link [LNKG] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.548059] ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.548398] ACPI: Enabled 4 GPEs in block 00 to 3F
>[    0.548439] ACPI : EC: GPE = 0x17, I/O: command/status = 0x66, data = 0x62
>[    0.548517] vgaarb: setting as boot device: PCI:0000:00:02.0
>[    0.548518] vgaarb: device added: PCI:0000:00:02.0,decodes=io+mem,owns=io+mem,locks=none
>[    0.548520] vgaarb: loaded
>[    0.548521] vgaarb: bridge control possible 0000:00:02.0
>[    0.548607] PCI: Using ACPI for IRQ routing
>[    0.549825] PCI: pci_cache_line_size set to 64 bytes
>[    0.549903] e820: reserve RAM buffer [mem 0x00058000-0x0005ffff]
>[    0.549904] e820: reserve RAM buffer [mem 0x0009e000-0x0009ffff]
>[    0.549905] e820: reserve RAM buffer [mem 0xb85cf000-0xbbffffff]
>[    0.549906] e820: reserve RAM buffer [mem 0xb8a14000-0xbbffffff]
>[    0.549907] e820: reserve RAM buffer [mem 0xca796000-0xcbffffff]
>[    0.549908] e820: reserve RAM buffer [mem 0x42fe00000-0x42fffffff]
>[    0.550016] NetLabel: Initializing
>[    0.550017] NetLabel:  domain hash size = 128
>[    0.550017] NetLabel:  protocols = UNLABELED CIPSOv4
>[    0.550027] NetLabel:  unlabeled traffic allowed by default
>[    0.550060] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0, 0, 0, 0, 0
>[    0.550065] hpet0: 8 comparators, 64-bit 14.318180 MHz counter
>[    0.552092] clocksource: Switched to clocksource hpet
>[    0.556002] pnp: PnP ACPI init
>[    0.556069] system 00:00: [mem 0xfed40000-0xfed44fff] has been reserved
>[    0.556072] system 00:00: Plug and Play ACPI device, IDs PNP0c01 (active)
>[    0.556271] system 00:01: [io  0x0680-0x069f] has been reserved
>[    0.556273] system 00:01: [io  0xffff] has been reserved
>[    0.556274] system 00:01: [io  0xffff] has been reserved
>[    0.556275] system 00:01: [io  0xffff] has been reserved
>[    0.556276] system 00:01: [io  0x1c00-0x1cfe] has been reserved
>[    0.556277] system 00:01: [io  0x1d00-0x1dfe] has been reserved
>[    0.556279] system 00:01: [io  0x1e00-0x1efe] has been reserved
>[    0.556280] system 00:01: [io  0x1f00-0x1ffe] has been reserved
>[    0.556281] system 00:01: [io  0x1800-0x18fe] could not be reserved
>[    0.556282] system 00:01: [io  0x164e-0x164f] has been reserved
>[    0.556284] system 00:01: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.556302] pnp 00:02: Plug and Play ACPI device, IDs PNP0b00 (active)
>[    0.556334] system 00:03: [io  0x1854-0x1857] has been reserved
>[    0.556336] system 00:03: Plug and Play ACPI device, IDs INT3f0d PNP0c02 (active)
>[    0.556368] system 00:04: [io  0x04d0-0x04d1] has been reserved
>[    0.556369] system 00:04: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.556389] pnp 00:05: Plug and Play ACPI device, IDs PNP0303 (active)
>[    0.556409] pnp 00:06: Plug and Play ACPI device, IDs DLL05fe PNP0f13 (active)
>[    0.625803] system 00:07: [mem 0xfed1c000-0xfed1ffff] has been reserved
>[    0.625805] system 00:07: [mem 0xfed10000-0xfed17fff] has been reserved
>[    0.625807] system 00:07: [mem 0xfed18000-0xfed18fff] has been reserved
>[    0.625809] system 00:07: [mem 0xfed19000-0xfed19fff] has been reserved
>[    0.625811] system 00:07: [mem 0xf8000000-0xfbffffff] has been reserved
>[    0.625812] system 00:07: [mem 0xfed20000-0xfed3ffff] has been reserved
>[    0.625814] system 00:07: [mem 0xfed90000-0xfed93fff] could not be reserved
>[    0.625816] system 00:07: [mem 0xfed45000-0xfed8ffff] has been reserved
>[    0.625817] system 00:07: [mem 0xff000000-0xffffffff] has been reserved
>[    0.625819] system 00:07: [mem 0xfee00000-0xfeefffff] could not be reserved
>[    0.625821] system 00:07: [mem 0xf7fee000-0xf7feefff] has been reserved
>[    0.625823] system 00:07: [mem 0xf7fd0000-0xf7fdffff] has been reserved
>[    0.625825] system 00:07: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.626108] pnp: PnP ACPI: found 8 devices
>[    0.632232] clocksource: acpi_pm: mask: 0xffffff max_cycles: 0xffffff, max_idle_ns: 2085701024 ns
>[    0.632247] pci 0000:00:1c.0: bridge window [io  0x1000-0x0fff] to [bus 04] add_size 1000
>[    0.632249] pci 0000:00:1c.0: bridge window [mem 0x00100000-0x000fffff 64bit pref] to [bus 04] add_size 200000 add_align 100000
>[    0.632251] pci 0000:00:1c.0: bridge window [mem 0x00100000-0x000fffff] to [bus 04] add_size 200000 add_align 100000
>[    0.632264] pci 0000:00:1c.0: res[14]=[mem 0x00100000-0x000fffff] res_to_dev_res add_size 200000 min_align 100000
>[    0.632266] pci 0000:00:1c.0: res[14]=[mem 0x00100000-0x002fffff] res_to_dev_res add_size 200000 min_align 100000
>[    0.632267] pci 0000:00:1c.0: res[15]=[mem 0x00100000-0x000fffff 64bit pref] res_to_dev_res add_size 200000 min_align 100000
>[    0.632268] pci 0000:00:1c.0: res[15]=[mem 0x00100000-0x002fffff 64bit pref] res_to_dev_res add_size 200000 min_align 100000
>[    0.632270] pci 0000:00:1c.0: res[13]=[io  0x1000-0x0fff] res_to_dev_res add_size 1000 min_align 1000
>[    0.632271] pci 0000:00:1c.0: res[13]=[io  0x1000-0x1fff] res_to_dev_res add_size 1000 min_align 1000
>[    0.632275] pci 0000:00:1c.0: BAR 14: assigned [mem 0xcf200000-0xcf3fffff]
>[    0.632281] pci 0000:00:1c.0: BAR 15: assigned [mem 0xcf400000-0xcf5fffff 64bit pref]
>[    0.632283] pci 0000:00:1c.0: BAR 13: assigned [io  0x2000-0x2fff]
>[    0.632285] pci 0000:00:01.0: PCI bridge to [bus 02-03]
>[    0.632286] pci 0000:00:01.0:   bridge window [io  0xe000-0xefff]
>[    0.632289] pci 0000:00:01.0:   bridge window [mem 0xf6000000-0xf70fffff]
>[    0.632291] pci 0000:00:01.0:   bridge window [mem 0xe0000000-0xf1ffffff 64bit pref]
>[    0.632294] pci 0000:00:1c.0: PCI bridge to [bus 04]
>[    0.632296] pci 0000:00:1c.0:   bridge window [io  0x2000-0x2fff]
>[    0.632300] pci 0000:00:1c.0:   bridge window [mem 0xcf200000-0xcf3fffff]
>[    0.632304] pci 0000:00:1c.0:   bridge window [mem 0xcf400000-0xcf5fffff 64bit pref]
>[    0.632308] pci 0000:00:1c.2: PCI bridge to [bus 06]
>[    0.632312] pci 0000:00:1c.2:   bridge window [mem 0xf7900000-0xf79fffff]
>[    0.632319] pci 0000:00:1c.3: PCI bridge to [bus 07]
>[    0.632323] pci 0000:00:1c.3:   bridge window [mem 0xf7800000-0xf78fffff]
>[    0.632331] pci_bus 0000:00: resource 4 [io  0x0000-0x0cf7 window]
>[    0.632332] pci_bus 0000:00: resource 5 [io  0x0d00-0xffff window]
>[    0.632333] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff window]
>[    0.632334] pci_bus 0000:00: resource 7 [mem 0x000c0000-0x000c3fff window]
>[    0.632335] pci_bus 0000:00: resource 8 [mem 0x000c4000-0x000c7fff window]
>[    0.632336] pci_bus 0000:00: resource 9 [mem 0x000c8000-0x000cbfff window]
>[    0.632337] pci_bus 0000:00: resource 10 [mem 0x000cc000-0x000cffff window]
>[    0.632338] pci_bus 0000:00: resource 11 [mem 0x000d0000-0x000d3fff window]
>[    0.632340] pci_bus 0000:00: resource 12 [mem 0x000d4000-0x000d7fff window]
>[    0.632341] pci_bus 0000:00: resource 13 [mem 0x000d8000-0x000dbfff window]
>[    0.632342] pci_bus 0000:00: resource 14 [mem 0x000dc000-0x000dffff window]
>[    0.632343] pci_bus 0000:00: resource 15 [mem 0xcf200000-0xfeafffff window]
>[    0.632344] pci_bus 0000:02: resource 0 [io  0xe000-0xefff]
>[    0.632345] pci_bus 0000:02: resource 1 [mem 0xf6000000-0xf70fffff]
>[    0.632346] pci_bus 0000:02: resource 2 [mem 0xe0000000-0xf1ffffff 64bit pref]
>[    0.632348] pci_bus 0000:04: resource 0 [io  0x2000-0x2fff]
>[    0.632349] pci_bus 0000:04: resource 1 [mem 0xcf200000-0xcf3fffff]
>[    0.632350] pci_bus 0000:04: resource 2 [mem 0xcf400000-0xcf5fffff 64bit pref]
>[    0.632351] pci_bus 0000:06: resource 1 [mem 0xf7900000-0xf79fffff]
>[    0.632352] pci_bus 0000:07: resource 1 [mem 0xf7800000-0xf78fffff]
>[    0.632378] NET: Registered protocol family 2
>[    0.632536] TCP established hash table entries: 131072 (order: 8, 1048576 bytes)
>[    0.632694] TCP bind hash table entries: 65536 (order: 8, 1048576 bytes)
>[    0.632798] TCP: Hash tables configured (established 131072 bind 65536)
>[    0.632823] UDP hash table entries: 8192 (order: 6, 262144 bytes)
>[    0.632862] UDP-Lite hash table entries: 8192 (order: 6, 262144 bytes)
>[    0.632920] NET: Registered protocol family 1
>[    0.632931] pci 0000:00:02.0: Video device with shadowed ROM
>[    0.633049] PCI: CLS 64 bytes, default 64
>[    0.633083] Unpacking initramfs...
>[    0.651472] Freeing initrd memory: 8584K (ffff880036f2c000 - ffff88003778e000)
>[    0.651497] PCI-DMA: Using software bounce buffering for IO (SWIOTLB)
>[    0.651499] software IO TLB [mem 0xc3cda000-0xc7cda000] (64MB) mapped at [ffff8800c3cda000-ffff8800c7cd9fff]
>[    0.651558] RAPL PMU detected, API unit is 2^-32 Joules, 4 fixed counters 655360 ms ovfl timer
>[    0.651559] hw unit of domain pp0-core 2^-14 Joules
>[    0.651560] hw unit of domain package 2^-14 Joules
>[    0.651560] hw unit of domain dram 2^-14 Joules
>[    0.651561] hw unit of domain pp1-gpu 2^-14 Joules
>[    0.651622] microcode: CPU0 sig=0x306c3, pf=0x20, revision=0x1c
>[    0.651628] microcode: CPU1 sig=0x306c3, pf=0x20, revision=0x1c
>[    0.651635] microcode: CPU2 sig=0x306c3, pf=0x20, revision=0x1c
>[    0.651642] microcode: CPU3 sig=0x306c3, pf=0x20, revision=0x1c
>[    0.651649] microcode: CPU4 sig=0x306c3, pf=0x20, revision=0x1c
>[    0.651656] microcode: CPU5 sig=0x306c3, pf=0x20, revision=0x1c
>[    0.651662] microcode: CPU6 sig=0x306c3, pf=0x20, revision=0x1c
>[    0.651668] microcode: CPU7 sig=0x306c3, pf=0x20, revision=0x1c
>[    0.651701] microcode: Microcode Update Driver: v2.00 <tigran@aivazian.fsnet.co.uk>, Peter Oruba
>[    0.651732] Scanning for low memory corruption every 60 seconds
>[    0.651944] futex hash table entries: 2048 (order: 5, 131072 bytes)
>[    0.652150] Initialise system trusted keyring
>[    0.652251] HugeTLB registered 2 MB page size, pre-allocated 0 pages
>[    0.653252] zbud: loaded
>[    0.653397] VFS: Disk quotas dquot_6.6.0
>[    0.653420] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
>[    0.653526] Key type big_key registered
>[    0.653730] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 250)
>[    0.653770] io scheduler noop registered
>[    0.653772] io scheduler deadline registered
>[    0.653805] io scheduler cfq registered (default)
>[    0.654492] pcieport 0000:00:01.0: Signaling PME through PCIe PME interrupt
>[    0.654495] pci 0000:02:00.0: Signaling PME through PCIe PME interrupt
>[    0.654497] pcie_pme 0000:00:01.0:pcie01: service driver pcie_pme loaded
>[    0.654515] pcieport 0000:00:1c.0: Signaling PME through PCIe PME interrupt
>[    0.654519] pcie_pme 0000:00:1c.0:pcie01: service driver pcie_pme loaded
>[    0.654537] pcieport 0000:00:1c.2: Signaling PME through PCIe PME interrupt
>[    0.654538] pci 0000:06:00.0: Signaling PME through PCIe PME interrupt
>[    0.654542] pcie_pme 0000:00:1c.2:pcie01: service driver pcie_pme loaded
>[    0.654560] pcieport 0000:00:1c.3: Signaling PME through PCIe PME interrupt
>[    0.654562] pci 0000:07:00.0: Signaling PME through PCIe PME interrupt
>[    0.654566] pcie_pme 0000:00:1c.3:pcie01: service driver pcie_pme loaded
>[    0.654572] pci_hotplug: PCI Hot Plug PCI Core version: 0.5
>[    0.654586] pciehp 0000:00:1c.0:pcie04: Slot #0 AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ Interlock- NoCompl+ LLActRep+
>[    0.654616] pciehp 0000:00:1c.0:pcie04: service driver pciehp loaded
>[    0.654620] pciehp: PCI Express Hot Plug Controller Driver version: 0.4
>[    0.654638] efifb: probing for efifb
>[    0.654677] efifb: framebuffer at 0xd0000000, mapped to 0xffffc90002000000, using 22528k, total 22528k
>[    0.654678] efifb: mode is 3200x1800x32, linelength=12800, pages=1
>[    0.654679] efifb: scrolling: redraw
>[    0.654680] efifb: Truecolor: size=8:8:8:8, shift=24:16:8:0
>[    0.663850] Console: switching to colour frame buffer device 400x112
>[    0.672753] fb0: EFI VGA frame buffer device
>[    0.672763] intel_idle: MWAIT substates: 0x42120
>[    0.672763] intel_idle: v0.4 model 0x3C
>[    0.672764] intel_idle: lapic_timer_reliable_states 0xffffffff
>[    0.673019] GHES: HEST is not enabled!
>[    0.673066] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
>[    0.673383] Linux agpgart interface v0.103
>[    0.673852] rtc_cmos 00:02: RTC can wake from S4
>[    0.673962] rtc_cmos 00:02: rtc core: registered rtc_cmos as rtc0
>[    0.673991] rtc_cmos 00:02: alarms up to one month, y3k, 242 bytes nvram, hpet irqs
>[    0.673999] Intel P-state driver initializing.
>[    0.674163] ledtrig-cpu: registered to indicate activity on CPUs
>[    0.674976] NET: Registered protocol family 10
>[    0.675411] NET: Registered protocol family 17
>[    0.676620] registered taskstats version 1
>[    0.676650] Loading compiled-in X.509 certificates
>[    0.676703] zswap: loaded using pool lzo/zbud
>[    0.678113]   Magic number: 0:992:197
>[    0.678174] acpi device:52: hash matches
>[    0.678203] acpi PNP0100:00: hash matches
>[    0.678334] rtc_cmos 00:02: setting system clock to 2016-01-01 22:09:57 UTC (1451686197)
>[    0.678555] PM: Hibernation image not present or could not be loaded.
>[    0.679227] Freeing unused kernel memory: 1188K (ffffffff818ec000 - ffffffff81a15000)
>[    0.679231] Write protecting the kernel read-only data: 8192k
>[    0.679828] Freeing unused kernel memory: 464K (ffff88000158c000 - ffff880001600000)
>[    0.680029] Freeing unused kernel memory: 252K (ffff8800017c1000 - ffff880001800000)
>[    0.688910] random: systemd-tmpfile urandom read with 1 bits of entropy available
>[    0.693282] [drm] Initialized drm 1.1.0 20060810
>[    0.694809] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input0
>[    0.694813] ACPI: Power Button [PWRB]
>[    0.694847] input: Lid Switch as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0D:00/input/input1
>[    0.694878] ACPI: Lid Switch [LID0]
>[    0.694908] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input2
>[    0.694910] ACPI: Power Button [PWRF]
>[    0.698361] Setting dangerous option enable_rc6 - tainting kernel
>[    0.698364] Setting dangerous option enable_fbc - tainting kernel
>[    0.698365] Setting dangerous option semaphores - tainting kernel
>[    0.698810] [drm:i915_dump_device_info] i915 device info: gen=7, pciid=0x0416 rev=0x06 flags=is_mobile,need_gfx_hws,is_haswell,has_fbc,has_hotplug,has_llc,has_ddi,has_fpga_dbg,
>[    0.698824] [drm:intel_detect_pch] Found LynxPoint PCH
>[    0.698891] [drm] Memory usable by graphics device = 2048M
>[    0.698892] [drm:i915_gem_gtt_init] GMADR size = 256M
>[    0.698893] [drm:i915_gem_gtt_init] GTT stolen size = 32M
>[    0.698894] [drm:i915_gem_gtt_init] ppgtt mode: 1
>[    0.698896] checking generic (d0000000 1600000) vs hw (d0000000 10000000)
>[    0.698897] fb: switching to inteldrmfb from EFI VGA
>[    0.698942] Console: switching to colour dummy device 80x25
>[    0.699041] [drm] Replacing VGA console driver
>[    0.699425] [drm:intel_opregion_setup] graphic opregion physical addr: 0xcb533018
>[    0.699430] [drm:intel_opregion_setup] Public ACPI methods supported
>[    0.699431] [drm:intel_opregion_setup] SWSCI supported
>[    0.705498] [drm:swsci_setup] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00300483
>[    0.705501] [drm:intel_opregion_setup] ASLE supported
>[    0.705687] [drm:intel_device_info_runtime_init] slice total: 0
>[    0.705689] [drm:intel_device_info_runtime_init] subslice total: 0
>[    0.705690] [drm:intel_device_info_runtime_init] subslice per slice: 0
>[    0.705691] [drm:intel_device_info_runtime_init] EU total: 0
>[    0.705692] [drm:intel_device_info_runtime_init] EU per subslice: 0
>[    0.705693] [drm:intel_device_info_runtime_init] has slice power gating: n
>[    0.705694] [drm:intel_device_info_runtime_init] has subslice power gating: n
>[    0.705695] [drm:intel_device_info_runtime_init] has EU power gating: n
>[    0.705696] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
>[    0.705697] [drm] Driver supports precise vblank timestamp query.
>[    0.705699] [drm:init_vbt_defaults] Set default to SSC at 120000 kHz
>[    0.705700] [drm:validate_vbt] Using VBT from OpRegion: $VBT HASWELL        d
>[    0.705702] [drm:parse_general_features] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 0 lvds_use_ssc 0 lvds_ssc_freq 120000 display_clock_mode 0 fdi_rx_polarity_inverted 0
>[    0.705704] [drm:parse_general_definitions] crt_ddc_bus_pin: 2
>[    0.705705] [drm:parse_lfp_panel_data] DRRS supported mode is static
>[    0.705707] [drm:parse_lfp_panel_data] Found panel mode in BIOS VBT tables:
>[    0.705710] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 0 65000 1024 1048 1184 1344 768 771 777 806 0x8 0xa
>[    0.705711] [drm:parse_lfp_panel_data] VBT initial LVDS value 300
>[    0.705713] [drm:parse_lfp_backlight] VBT backlight PWM modulation frequency 200 Hz, active high, min brightness 13, level 255
>[    0.705715] [drm:parse_sdvo_panel_data] Found SDVO panel mode in BIOS VBT tables:
>[    0.705717] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 0 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x8 0xa
>[    0.705718] [drm:parse_sdvo_device_mapping] No SDVO device info is found in VBT
>[    0.705720] [drm:parse_driver_features] DRRS State Enabled:0
>[    0.705721] [drm:parse_edp] VBT has unknown eDP link rate value 2
>[    0.705723] [drm:parse_ddi_port] Port A VBT info: DP:1 HDMI:0 DVI:0 EDP:1 CRT:0
>[    0.705724] [drm:parse_ddi_port] VBT HDMI level shift for port A: 0
>[    0.705725] [drm:parse_ddi_port] Port B VBT info: DP:0 HDMI:1 DVI:1 EDP:0 CRT:0
>[    0.705727] [drm:parse_ddi_port] VBT HDMI level shift for port B: 6
>[    0.705728] [drm:parse_ddi_port] Port C VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0
>[    0.705729] [drm:parse_ddi_port] VBT HDMI level shift for port C: 6
>[    0.705735] [drm:intel_dsm_pci_probe] no _DSM method for intel device
>[    0.705740] [drm:i915_gem_init_stolen] Memory reserved for graphics device: 32768K, usable: 31744K
>[    0.705742] [drm:intel_power_well_enable] enabling always-on
>[    0.705743] [drm:intel_power_well_enable] enabling display
>[    0.705796] [drm:intel_print_wm_latency] Primary WM0 latency 20 (2.0 usec)
>[    0.705797] [drm:intel_print_wm_latency] Primary WM1 latency 4 (2.0 usec)
>[    0.705798] [drm:intel_print_wm_latency] Primary WM2 latency 36 (18.0 usec)
>[    0.705800] [drm:intel_print_wm_latency] Primary WM3 latency 90 (45.0 usec)
>[    0.705801] [drm:intel_print_wm_latency] Primary WM4 latency 160 (80.0 usec)
>[    0.705802] [drm:intel_print_wm_latency] Sprite WM0 latency 20 (2.0 usec)
>[    0.705803] [drm:intel_print_wm_latency] Sprite WM1 latency 4 (2.0 usec)
>[    0.705804] [drm:intel_print_wm_latency] Sprite WM2 latency 36 (18.0 usec)
>[    0.705805] [drm:intel_print_wm_latency] Sprite WM3 latency 90 (45.0 usec)
>[    0.705807] [drm:intel_print_wm_latency] Sprite WM4 latency 160 (80.0 usec)
>[    0.705808] [drm:intel_print_wm_latency] Cursor WM0 latency 20 (2.0 usec)
>[    0.705809] [drm:intel_print_wm_latency] Cursor WM1 latency 4 (2.0 usec)
>[    0.705810] [drm:intel_print_wm_latency] Cursor WM2 latency 36 (18.0 usec)
>[    0.705811] [drm:intel_print_wm_latency] Cursor WM3 latency 90 (45.0 usec)
>[    0.705812] [drm:intel_print_wm_latency] Cursor WM4 latency 160 (80.0 usec)
>[    0.705814] [drm:intel_modeset_init] 3 display pipes available.
>[    0.705825] [drm:intel_update_cdclk] Current CD clock rate: 540000 kHz
>[    0.705826] [drm:intel_update_max_cdclk] Max CD clock rate: 540000 kHz
>[    0.705829] vgaarb: device changed decodes: PCI:0000:00:02.0,olddecodes=io+mem,decodes=io+mem:owns=io+mem
>[    0.706178] [drm:intel_crt_reset] crt adpa set to 0xf40000
>[    0.706182] [drm:intel_dp_init_connector] Adding eDP connector on port A
>[    0.706216] [drm:intel_dp_init_panel_power_sequencer] cur t1_t3 2000 t8 0 t9 2000 t10 500 t11_t12 6000
>[    0.706217] [drm:intel_dp_init_panel_power_sequencer] vbt t1_t3 2000 t8 200 t9 2000 t10 500 t11_t12 5000
>[    0.706219] [drm:intel_dp_init_panel_power_sequencer] panel power up delay 200, power down delay 50, power cycle delay 600
>[    0.706220] [drm:intel_dp_init_panel_power_sequencer] backlight on delay 20, off delay 200
>[    0.706222] [drm:intel_dp_aux_init] registering DPDDC-A bus for card0-eDP-1
>[    0.706251] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[    0.706259] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[    0.706703] [drm:intel_dp_get_dpcd] DPCD: 12 14 c4 40 01 00 00 00 02 00 00 00 10 0b 01
>[    0.707044] [drm:intel_dp_get_dpcd] Detected EDP PSR Panel.
>[    0.707049] [drm:intel_dp_get_dpcd] Displayport TPS3 supported
>[    0.707366] [drm:intel_dp_print_rates] source rates: 162000, 270000, 540000
>[    0.707368] [drm:intel_dp_print_rates] sink rates: 162000, 270000, 540000
>[    0.707370] [drm:intel_dp_print_rates] common rates: 162000, 270000, 540000
>[    0.707382] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x186906
>[    0.710989] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    0.710990] [drm:intel_dp_drrs_init] VBT doesn't support DRRS
>[    0.710994] [drm:intel_panel_setup_backlight] Connector eDP-1 backlight initialized, enabled, brightness 4882/4882
>[    0.711052] [drm:intel_dp_init_connector] Adding DP connector on port C
>[    0.711073] [drm:intel_dp_aux_init] registering DPDDC-C bus for card0-DP-1
>[    0.739023] [drm:intel_modeset_readout_hw_state] [CRTC:21] hw state readout: enabled
>[    0.739027] [drm:intel_modeset_readout_hw_state] [CRTC:25] hw state readout: disabled
>[    0.739029] [drm:intel_modeset_readout_hw_state] [CRTC:29] hw state readout: disabled
>[    0.739032] [drm:intel_modeset_readout_hw_state] WRPLL 1 hw state readout: crtc_mask 0x00000000, on 0
>[    0.739033] [drm:intel_modeset_readout_hw_state] WRPLL 2 hw state readout: crtc_mask 0x00000000, on 0
>[    0.739036] [drm:intel_modeset_readout_hw_state] [ENCODER:32:DAC-32] hw state readout: disabled, pipe A
>[    0.739040] [drm:intel_ddi_get_config] pipe has 24 bpp for eDP panel, overriding BIOS-provided max 18 bpp
>[    0.739041] [drm:intel_modeset_readout_hw_state] [ENCODER:33:TMDS-33] hw state readout: enabled, pipe A
>[    0.739043] [drm:intel_modeset_readout_hw_state] [ENCODER:41:TMDS-41] hw state readout: disabled, pipe A
>[    0.739045] [drm:intel_modeset_readout_hw_state] [ENCODER:44:TMDS-44] hw state readout: disabled, pipe A
>[    0.739046] [drm:intel_modeset_readout_hw_state] [ENCODER:46:DP MST-46] hw state readout: disabled, pipe A
>[    0.739048] [drm:intel_modeset_readout_hw_state] [ENCODER:47:DP MST-47] hw state readout: disabled, pipe B
>[    0.739049] [drm:intel_modeset_readout_hw_state] [ENCODER:48:DP MST-48] hw state readout: disabled, pipe C
>[    0.739051] [drm:intel_modeset_readout_hw_state] [CONNECTOR:34:eDP-1] hw state readout: enabled
>[    0.739053] [drm:intel_modeset_readout_hw_state] [CONNECTOR:31:VGA-1] hw state readout: disabled
>[    0.739055] [drm:intel_modeset_readout_hw_state] [CONNECTOR:42:HDMI-A-1] hw state readout: disabled
>[    0.739056] [drm:intel_modeset_readout_hw_state] [CONNECTOR:45:DP-1] hw state readout: disabled
>[    0.739058] [drm:intel_modeset_readout_hw_state] [CONNECTOR:49:HDMI-A-2] hw state readout: disabled
>[    0.739063] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:3200x1800] for CRTC state ffff88041ae29800
>[    0.739070] [drm:intel_dump_pipe_config] [CRTC:21][setup_hw_state] config ffff88041ae29800 for pipe A
>[    0.739071] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    0.739072] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    0.739074] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.739075] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4348677, gmch_n: 8388608, link_m: 362389, link_n: 524288, tu: 64
>[    0.739077] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    0.739078] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    0.739079] [drm:intel_dump_pipe_config] requested mode:
>[    0.739081] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373249 3200 3248 3280 3360 1800 1803 1808 1852 0x40 0xa
>[    0.739082] [drm:intel_dump_pipe_config] adjusted mode:
>[    0.739084] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373249 3200 3248 3280 3360 1800 1803 1808 1852 0x40 0xa
>[    0.739086] [drm:intel_dump_crtc_timings] crtc timings: 373249 3200 3248 3280 3360 1800 1803 1808 1852, type: 0x40 flags: 0xa
>[    0.739087] [drm:intel_dump_pipe_config] port clock: 540000
>[    0.739089] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    0.739090] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[    0.739091] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    0.739093] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    0.739094] [drm:intel_dump_pipe_config] ips: 0
>[    0.739095] [drm:intel_dump_pipe_config] double wide: 0
>[    0.739096] [drm:intel_dump_pipe_config] ddi_pll_sel: 0; dpll_hw_state: wrpll: 0x0
>[    0.739097] [drm:intel_dump_pipe_config] planes on this crtc
>[    0.739098] [drm:intel_dump_pipe_config] STANDARD PLANE:18 plane: 0.0 idx: 0 disabled, scaler_id = 0
>[    0.739100] [drm:intel_dump_pipe_config] CURSOR PLANE:20 plane: 0.1 idx: 1 disabled, scaler_id = 0
>[    0.739101] [drm:intel_dump_pipe_config] STANDARD PLANE:22 plane: 0.1 idx: 2 disabled, scaler_id = 0
>[    0.739103] [drm:intel_dump_pipe_config] [CRTC:25][setup_hw_state] config ffff88041ae2a800 for pipe B
>[    0.739104] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[    0.739105] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0
>[    0.739107] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.739108] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.739109] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    0.739110] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    0.739111] [drm:intel_dump_pipe_config] requested mode:
>[    0.739113] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    0.739114] [drm:intel_dump_pipe_config] adjusted mode:
>[    0.739115] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    0.739117] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[    0.739118] [drm:intel_dump_pipe_config] port clock: 0
>[    0.739119] [drm:intel_dump_pipe_config] pipe src size: 0x0
>[    0.739120] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[    0.739121] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    0.739123] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    0.739124] [drm:intel_dump_pipe_config] ips: 0
>[    0.739124] [drm:intel_dump_pipe_config] double wide: 0
>[    0.739125] [drm:intel_dump_pipe_config] ddi_pll_sel: 0; dpll_hw_state: wrpll: 0x0
>[    0.739126] [drm:intel_dump_pipe_config] planes on this crtc
>[    0.739128] [drm:intel_dump_pipe_config] STANDARD PLANE:23 plane: 1.0 idx: 3 disabled, scaler_id = 0
>[    0.739129] [drm:intel_dump_pipe_config] CURSOR PLANE:24 plane: 1.2 idx: 4 disabled, scaler_id = 0
>[    0.739130] [drm:intel_dump_pipe_config] STANDARD PLANE:26 plane: 1.1 idx: 5 disabled, scaler_id = 0
>[    0.739132] [drm:intel_dump_pipe_config] [CRTC:29][setup_hw_state] config ffff88041ae2b800 for pipe C
>[    0.739133] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[    0.739134] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0
>[    0.739136] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.739137] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.739138] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    0.739139] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    0.739140] [drm:intel_dump_pipe_config] requested mode:
>[    0.739142] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    0.739142] [drm:intel_dump_pipe_config] adjusted mode:
>[    0.739144] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    0.739146] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[    0.739147] [drm:intel_dump_pipe_config] port clock: 0
>[    0.739148] [drm:intel_dump_pipe_config] pipe src size: 0x0
>[    0.739149] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[    0.739150] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    0.739151] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    0.739152] [drm:intel_dump_pipe_config] ips: 0
>[    0.739153] [drm:intel_dump_pipe_config] double wide: 0
>[    0.739154] [drm:intel_dump_pipe_config] ddi_pll_sel: 0; dpll_hw_state: wrpll: 0x0
>[    0.739155] [drm:intel_dump_pipe_config] planes on this crtc
>[    0.739156] [drm:intel_dump_pipe_config] STANDARD PLANE:27 plane: 2.0 idx: 6 disabled, scaler_id = 0
>[    0.739157] [drm:intel_dump_pipe_config] CURSOR PLANE:28 plane: 2.3 idx: 7 disabled, scaler_id = 0
>[    0.739159] [drm:intel_dump_pipe_config] STANDARD PLANE:30 plane: 2.1 idx: 8 disabled, scaler_id = 0
>[    0.739164] [drm:intel_power_well_disable] disabling display
>[    0.739167] [drm:hsw_set_power_well] Requesting to disable the power well
>[    0.739171] [drm:ironlake_get_initial_plane_config] pipe A with fb: size=3200x1800@32, offset=0, pitch 12800, size 0x15f9000
>[    0.739173] [drm:i915_gem_object_create_stolen_for_preallocated] creating preallocated stolen object: stolen_offset=0, gtt_offset=0, size=15f9000
>[    0.739179] [drm:i915_pages_create_for_stolen] offset=0x0, size=23040000
>[    0.739182] [drm:intel_alloc_initial_plane_obj] initial plane fb obj ffff8800ca294000
>[    0.739245] [drm:i915_gem_setup_global_gtt] reserving preallocated space: 0 + 15f9000
>[    0.739246] [drm:i915_gem_setup_global_gtt] clearing unused GTT space: [15f9000, 7ffff000]
>[    0.741169] [drm:gen6_ppgtt_init] Allocated pde space (2M) at GTT entry: 7fdf0
>[    0.741899] [drm:i915_gem_context_init] HW context support initialized
>[    0.741904] [drm:init_status_page] render ring hws offset: 0x0160a000
>[    0.741951] [drm:intel_init_pipe_control] render ring pipe control offset: 0x0162b000
>[    0.741955] [drm:init_status_page] bsd ring hws offset: 0x0162c000
>[    0.741990] [drm:init_status_page] blitter ring hws offset: 0x0164d000
>[    0.742026] [drm:init_status_page] video enhancement ring hws offset: 0x0166e000
>[    0.744212] [drm:sanitize_rc6_option] Adjusting RC6 mask to 1 (requested 7, valid 1)
>[    0.744216] [drm:intel_update_cdclk] Current CD clock rate: 540000 kHz
>[    0.744444] [drm:intel_backlight_device_register] Connector eDP-1 backlight sysfs interface registered
>[    0.744477] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[    0.744480] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[    0.744587] [drm:intel_didl_outputs] 2 outputs detected
>[    0.744637] [Firmware Bug]: ACPI(PEGP) defines _DOD but not _DOS
>[    0.744972] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] status updated from 3 to 1
>[    0.744985] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    0.744988] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[    0.744990] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[    0.744992] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:VGA-1]
>[    0.744993] [drm:intel_crt_detect] [CONNECTOR:31:VGA-1] force=1
>[    0.744995] [drm:intel_ironlake_crt_detect_hotplug] trigger hotplug detect cycle: adpa=0xf40000
>[    0.745042] ACPI: Video Device [PEGP] (multi-head: yes  rom: yes  post: no)
>[    0.745186] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:4d/LNXVIDEO:00/input/input3
>[    0.745511] ACPI: Video Device [GFX0] (multi-head: yes  rom: no  post: no)
>[    0.745674] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:01/input/input4
>[    0.745691] [drm] Initialized i915 1.6.0 20150731 for 0000:00:02.0 on minor 0
>[    0.754428] [drm:intel_ironlake_crt_detect_hotplug] ironlake hotplug adpa=0xf40000, result 0
>[    0.754431] [drm:intel_crt_detect] CRT not detected via hotplug
>[    0.805737] [drm] GMBUS [i915 gmbus vga] timed out, falling back to bit banging on pin 2
>[    0.819054] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[    0.819056] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found]
>[    0.819059] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:VGA-1] status updated from 3 to 2
>[    0.819062] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:VGA-1] disconnected
>[    0.819076] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:42:HDMI-A-1]
>[    0.819077] [drm:intel_hdmi_detect] [CONNECTOR:42:HDMI-A-1]
>[    0.819317] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[    0.819319] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[    0.819568] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[    0.819573] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[    0.819576] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:42:HDMI-A-1] status updated from 3 to 2
>[    0.819578] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:42:HDMI-A-1] disconnected
>[    0.819581] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:45:DP-1]
>[    0.819582] [drm:intel_dp_detect] [CONNECTOR:45:DP-1]
>[    0.819587] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:45:DP-1] status updated from 3 to 2
>[    0.819588] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:45:DP-1] disconnected
>[    0.819589] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:HDMI-A-2]
>[    0.819591] [drm:intel_hdmi_detect] [CONNECTOR:49:HDMI-A-2]
>[    0.819837] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[    0.819841] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[    0.820059] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[    0.820073] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[    0.820077] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:HDMI-A-2] status updated from 3 to 2
>[    0.820079] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:HDMI-A-2] disconnected
>[    0.820114] [drm:drm_setup_crtcs] 
>[    0.820116] [drm:drm_enable_connectors] connector 34 enabled? yes
>[    0.820117] [drm:drm_enable_connectors] connector 31 enabled? no
>[    0.820118] [drm:drm_enable_connectors] connector 42 enabled? no
>[    0.820119] [drm:drm_enable_connectors] connector 45 enabled? no
>[    0.820120] [drm:drm_enable_connectors] connector 49 enabled? no
>[    0.820123] [drm:intel_fb_initial_config] looking for cmdline mode on connector eDP-1
>[    0.820124] [drm:intel_fb_initial_config] looking for preferred mode on connector eDP-1 0
>[    0.820127] [drm:intel_fb_initial_config] connector eDP-1 on pipe A [CRTC:21]: 3200x1800
>[    0.820128] [drm:intel_fb_initial_config] connector VGA-1 not enabled, skipping
>[    0.820129] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping
>[    0.820130] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping
>[    0.820131] [drm:intel_fb_initial_config] connector HDMI-A-2 not enabled, skipping
>[    0.820134] [drm:drm_setup_crtcs] desired mode 3200x1800 set on crtc 21 (0,0)
>[    0.820137] [drm:intelfb_create] no BIOS fb, allocating a new one
>[    0.820139] [drm:i915_gem_object_create_stolen] creating stolen object: size=15f9000
>[    0.835306] [drm:intelfb_create] allocated 3200x1800 fb: 0x0168f000, bo ffff8800c9afc000
>[    0.835431] fbcon: inteldrmfb (fb0) is primary device
>[    0.835492] [drm:drm_atomic_state_init] Allocated atomic state ffff88041a960a00
>[    0.835494] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800ca2a4840 state to ffff88041a960a00
>[    0.835495] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88041bc4e400 state to ffff88041a960a00
>[    0.835496] [drm:drm_atomic_check_only] checking ffff88041a960a00
>[    0.835500] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 51
>[    0.835501] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 0, on 0, ms 0
>[    0.835502] [drm:drm_atomic_commit] commiting ffff88041a960a00
>[    0.835518] [drm:set_no_fbc_reason] Disabling FBC: framebuffer not tiled or fenced
>[    0.835520] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041a960a00
>[    0.835521] [drm:drm_atomic_state_free] Freeing atomic state ffff88041a960a00
>[    0.835523] [drm:drm_atomic_state_init] Allocated atomic state ffff88041a960a00
>[    0.835523] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ca2a4780 state to ffff88041a960a00
>[    0.835524] [drm:drm_atomic_check_only] checking ffff88041a960a00
>[    0.835525] [drm:drm_atomic_commit] commiting ffff88041a960a00
>[    0.835525] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041a960a00
>[    0.835526] [drm:drm_atomic_state_free] Freeing atomic state ffff88041a960a00
>[    0.835527] [drm:drm_atomic_state_init] Allocated atomic state ffff88041a960a00
>[    0.835527] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800ca2a46c0 state to ffff88041a960a00
>[    0.835528] [drm:drm_atomic_check_only] checking ffff88041a960a00
>[    0.835528] [drm:drm_atomic_commit] commiting ffff88041a960a00
>[    0.835529] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041a960a00
>[    0.835529] [drm:drm_atomic_state_free] Freeing atomic state ffff88041a960a00
>[    0.835530] [drm:drm_atomic_state_init] Allocated atomic state ffff88041a960a00
>[    0.835531] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800ca2a4600 state to ffff88041a960a00
>[    0.835531] [drm:drm_atomic_check_only] checking ffff88041a960a00
>[    0.835532] [drm:drm_atomic_commit] commiting ffff88041a960a00
>[    0.835532] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041a960a00
>[    0.835533] [drm:drm_atomic_state_free] Freeing atomic state ffff88041a960a00
>[    0.835534] [drm:drm_atomic_state_init] Allocated atomic state ffff88041a960a00
>[    0.835534] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff8800ca2a4240 state to ffff88041a960a00
>[    0.835535] [drm:drm_atomic_check_only] checking ffff88041a960a00
>[    0.835535] [drm:drm_atomic_commit] commiting ffff88041a960a00
>[    0.835536] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041a960a00
>[    0.835536] [drm:drm_atomic_state_free] Freeing atomic state ffff88041a960a00
>[    0.835537] [drm:drm_atomic_state_init] Allocated atomic state ffff88041a960a00
>[    0.835538] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800ca2a4180 state to ffff88041a960a00
>[    0.835538] [drm:drm_atomic_check_only] checking ffff88041a960a00
>[    0.835539] [drm:drm_atomic_commit] commiting ffff88041a960a00
>[    0.835539] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041a960a00
>[    0.835540] [drm:drm_atomic_state_free] Freeing atomic state ffff88041a960a00
>[    0.835541] [drm:drm_atomic_state_init] Allocated atomic state ffff88041a960a00
>[    0.835541] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff8800ca2a40c0 state to ffff88041a960a00
>[    0.835542] [drm:drm_atomic_check_only] checking ffff88041a960a00
>[    0.835542] [drm:drm_atomic_commit] commiting ffff88041a960a00
>[    0.835543] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041a960a00
>[    0.835543] [drm:drm_atomic_state_free] Freeing atomic state ffff88041a960a00
>[    0.835544] [drm:drm_atomic_state_init] Allocated atomic state ffff88041a960a00
>[    0.835545] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff8800ca2a4000 state to ffff88041a960a00
>[    0.835545] [drm:drm_atomic_check_only] checking ffff88041a960a00
>[    0.835546] [drm:drm_atomic_commit] commiting ffff88041a960a00
>[    0.835546] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041a960a00
>[    0.835547] [drm:drm_atomic_state_free] Freeing atomic state ffff88041a960a00
>[    0.835547] [drm:drm_atomic_state_init] Allocated atomic state ffff88041a960a00
>[    0.835548] [drm:drm_atomic_get_plane_state] Added [PLANE:30] ffff8800ca2a4300 state to ffff88041a960a00
>[    0.835548] [drm:drm_atomic_check_only] checking ffff88041a960a00
>[    0.835549] [drm:drm_atomic_commit] commiting ffff88041a960a00
>[    0.835550] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041a960a00
>[    0.835550] [drm:drm_atomic_state_free] Freeing atomic state ffff88041a960a00
>[    0.835551] [drm:drm_atomic_state_init] Allocated atomic state ffff88041a960a00
>[    0.835552] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88041bc4e800 state to ffff88041a960a00
>[    0.835552] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800ca2a43c0 state to ffff88041a960a00
>[    0.835554] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:3200x1800] for CRTC state ffff88041bc4e800
>[    0.835555] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ca2a43c0 to [CRTC:21]
>[    0.835555] [drm:drm_atomic_set_fb_for_plane] Set [FB:53] for plane state ffff8800ca2a43c0
>[    0.835557] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:34] ffff88041cc7ac00 state to ffff88041a960a00
>[    0.835558] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88041a960a00
>[    0.835559] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88041cc7ac00 to [NOCRTC]
>[    0.835559] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88041cc7ac00 to [CRTC:21]
>[    0.835560] [drm:drm_atomic_check_only] checking ffff88041a960a00
>[    0.835561] [drm:update_connector_routing] Updating routing for [CONNECTOR:34:eDP-1]
>[    0.835562] [drm:update_connector_routing] [CONNECTOR:34:eDP-1] keeps [ENCODER:33:TMDS-33], now on [CRTC:21]
>[    0.835563] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88041a960a00
>[    0.835564] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[    0.835565] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to EDID reported max of 24
>[    0.835567] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 540000 pixel clock 373250KHz
>[    0.835571] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 24
>[    0.835571] [drm:intel_dp_compute_config] DP link bw required 895800 available 1728000
>[    0.835573] [drm:intel_modeset_pipe_config] plane bpp: 36, pipe bpp: 24, dithering: 0
>[    0.835574] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config ffff88041bc4e800 for pipe A
>[    0.835574] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    0.835575] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    0.835576] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.835577] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4348677, gmch_n: 8388608, link_m: 724779, link_n: 1048576, tu: 64
>[    0.835577] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    0.835578] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    0.835578] [drm:intel_dump_pipe_config] requested mode:
>[    0.835580] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[    0.835580] [drm:intel_dump_pipe_config] adjusted mode:
>[    0.835581] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[    0.835582] [drm:intel_dump_crtc_timings] crtc timings: 373250 3200 3248 3280 3360 1800 1803 1808 1852, type: 0x48 flags: 0xa
>[    0.835583] [drm:intel_dump_pipe_config] port clock: 540000
>[    0.835583] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    0.835584] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[    0.835585] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    0.835585] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    0.835586] [drm:intel_dump_pipe_config] ips: 0
>[    0.835586] [drm:intel_dump_pipe_config] double wide: 0
>[    0.835586] [drm:intel_dump_pipe_config] ddi_pll_sel: 0; dpll_hw_state: wrpll: 0x0
>[    0.835587] [drm:intel_dump_pipe_config] planes on this crtc
>[    0.835588] [drm:intel_dump_pipe_config] STANDARD PLANE:18 plane: 0.0 idx: 0 enabled
>[    0.835589] [drm:intel_dump_pipe_config]         FB:51, fb = 3200x1800 format = 0x34325258
>[    0.835590] [drm:intel_dump_pipe_config]         scaler:0 src (0, 0) 3200x1800 dst (0, 0) 3200x1800
>[    0.835590] [drm:intel_dump_pipe_config] CURSOR PLANE:20 plane: 0.1 idx: 1 disabled, scaler_id = 0
>[    0.835591] [drm:intel_dump_pipe_config] STANDARD PLANE:22 plane: 0.1 idx: 2 disabled, scaler_id = 0
>[    0.835593] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88041bc4fc00 state to ffff88041a960a00
>[    0.835594] [drm:drm_atomic_get_crtc_state] Added [CRTC:29] ffff88041bc4f400 state to ffff88041a960a00
>[    0.835595] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 53
>[    0.835595] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 1, on 1, ms 1
>[    0.835596] [drm:drm_atomic_commit] commiting ffff88041a960a00
>[    0.835600] [drm:intel_edp_backlight_off] 
>[    1.035981] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[    1.035995] [drm:intel_disable_pipe] disabling pipe A
>[    1.038253] [drm:edp_panel_off] Turn eDP port A panel power off
>[    1.038258] [drm:wait_panel_off] Wait for panel power off time
>[    1.038262] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[    1.098549] [drm:wait_panel_status] Wait complete
>[    1.098574] [drm:edp_panel_on] Turn eDP port A panel power on
>[    1.098576] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[    1.639901] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[    1.639904] [drm:wait_panel_status] Wait complete
>[    1.639908] [drm:wait_panel_on] Wait for panel power on
>[    1.639910] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[    1.649942] tsc: Refined TSC clocksource calibration: 2194.917 MHz
>[    1.649944] clocksource: tsc: mask: 0xffffffffffffffff max_cycles: 0x1fa37107ca2, max_idle_ns: 440795258165 ns
>[    1.840866] [drm:wait_panel_status] Wait complete
>[    1.840873] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[    1.840881] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[    1.842284] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[    1.842285] [drm:intel_dp_set_signal_levels] Using vswing level 0
>[    1.842286] [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0
>[    1.846857] [drm:intel_dp_set_signal_levels] Using signal levels 08000000
>[    1.846857] [drm:intel_dp_set_signal_levels] Using vswing level 2
>[    1.846858] [drm:intel_dp_set_signal_levels] Using pre-emphasis level 1
>[    1.851410] [drm:intel_dp_start_link_train] clock recovery OK
>[    1.855972] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[    1.856065] [drm:intel_enable_pipe] enabling pipe A
>[    1.856226] [drm:intel_edp_backlight_on] 
>[    1.856228] [drm:intel_panel_enable_backlight] pipe A
>[    1.856235] [drm:intel_panel_actually_set_backlight] set backlight PWM = 4882
>[    1.863449] [drm:intel_psr_match_conditions] PSR disable by flag
>[    1.863449] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[    1.889572] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[    1.889575] [drm:check_encoder_state] [ENCODER:32:DAC-32]
>[    1.889576] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[    1.889577] [drm:check_encoder_state] [ENCODER:41:TMDS-41]
>[    1.889578] [drm:check_encoder_state] [ENCODER:44:TMDS-44]
>[    1.889579] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[    1.889580] [drm:check_encoder_state] [ENCODER:47:DP MST-47]
>[    1.889580] [drm:check_encoder_state] [ENCODER:48:DP MST-48]
>[    1.889583] [drm:check_crtc_state] [CRTC:21]
>[    1.889590] [drm:check_shared_dpll_state] WRPLL 1
>[    1.889591] [drm:check_shared_dpll_state] WRPLL 2
>[    1.889593] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041a960a00
>[    1.889595] [drm:drm_atomic_state_free] Freeing atomic state ffff88041a960a00
>[    1.889626] [drm:drm_atomic_state_init] Allocated atomic state ffff88041c0f6000
>[    1.889629] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88041ae2b800 state to ffff88041c0f6000
>[    1.889630] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88041bcfe9c0 state to ffff88041c0f6000
>[    1.889631] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88041ae2b800
>[    1.889632] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041bcfe9c0 to [NOCRTC]
>[    1.889632] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88041bcfe9c0
>[    1.889633] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff88041c0f6000
>[    1.889634] [drm:drm_atomic_check_only] checking ffff88041c0f6000
>[    1.889637] [drm:drm_atomic_commit] commiting ffff88041c0f6000
>[    1.889639] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041c0f6000
>[    1.889640] [drm:drm_atomic_state_free] Freeing atomic state ffff88041c0f6000
>[    1.889642] [drm:drm_atomic_state_init] Allocated atomic state ffff88041c0f6000
>[    1.889643] [drm:drm_atomic_get_crtc_state] Added [CRTC:29] ffff88041ae2a800 state to ffff88041c0f6000
>[    1.889644] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff88041bcfea80 state to ffff88041c0f6000
>[    1.889644] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88041ae2a800
>[    1.889645] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041bcfea80 to [NOCRTC]
>[    1.889645] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88041bcfea80
>[    1.889646] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:29] to ffff88041c0f6000
>[    1.889647] [drm:drm_atomic_check_only] checking ffff88041c0f6000
>[    1.889648] [drm:drm_atomic_commit] commiting ffff88041c0f6000
>[    1.889649] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041c0f6000
>[    1.889650] [drm:drm_atomic_state_free] Freeing atomic state ffff88041c0f6000
>[    1.889652] [drm:drm_fb_helper_hotplug_event] 
>[    1.889654] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[    1.889655] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[    1.890162] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    1.890165] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[    1.890167] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[    1.890168] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:VGA-1]
>[    1.890169] [drm:intel_crt_detect] [CONNECTOR:31:VGA-1] force=1
>[    1.890171] [drm:intel_ironlake_crt_detect_hotplug] ironlake hotplug adpa=0xf40000, result 0
>[    1.890172] [drm:intel_crt_detect] CRT not detected via hotplug
>[    1.903471] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[    1.903472] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found]
>[    1.903473] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:VGA-1] disconnected
>[    1.903473] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:42:HDMI-A-1]
>[    1.903474] [drm:intel_hdmi_detect] [CONNECTOR:42:HDMI-A-1]
>[    1.903718] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[    1.903718] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[    1.903957] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[    1.903959] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[    1.903962] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:42:HDMI-A-1] disconnected
>[    1.903964] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:45:DP-1]
>[    1.903965] [drm:intel_dp_detect] [CONNECTOR:45:DP-1]
>[    1.903969] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:45:DP-1] disconnected
>[    1.903970] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:HDMI-A-2]
>[    1.903970] [drm:intel_hdmi_detect] [CONNECTOR:49:HDMI-A-2]
>[    1.904204] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[    1.904205] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[    1.904446] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[    1.904449] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[    1.904451] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:HDMI-A-2] disconnected
>[    1.904456] [drm:drm_setup_crtcs] 
>[    1.904457] [drm:drm_enable_connectors] connector 34 enabled? yes
>[    1.904458] [drm:drm_enable_connectors] connector 31 enabled? no
>[    1.904459] [drm:drm_enable_connectors] connector 42 enabled? no
>[    1.904459] [drm:drm_enable_connectors] connector 45 enabled? no
>[    1.904460] [drm:drm_enable_connectors] connector 49 enabled? no
>[    1.904461] [drm:intel_fb_initial_config] looking for cmdline mode on connector eDP-1
>[    1.904462] [drm:intel_fb_initial_config] looking for preferred mode on connector eDP-1 0
>[    1.904464] [drm:intel_fb_initial_config] connector eDP-1 on pipe A [CRTC:21]: 3200x1800
>[    1.904465] [drm:intel_fb_initial_config] connector VGA-1 not enabled, skipping
>[    1.904465] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping
>[    1.904466] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping
>[    1.904466] [drm:intel_fb_initial_config] connector HDMI-A-2 not enabled, skipping
>[    1.904468] [drm:drm_setup_crtcs] desired mode 3200x1800 set on crtc 21 (0,0)
>[    1.904475] [drm:drm_atomic_state_init] Allocated atomic state ffff88041c0f6000
>[    1.904477] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88041bcfe540 state to ffff88041c0f6000
>[    1.904479] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88041ae2d800 state to ffff88041c0f6000
>[    1.904481] [drm:drm_atomic_check_only] checking ffff88041c0f6000
>[    1.904485] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 53
>[    1.904486] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 0, on 0, ms 0
>[    1.904487] [drm:drm_atomic_commit] commiting ffff88041c0f6000
>[    1.904507] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041c0f6000
>[    1.904508] [drm:drm_atomic_state_free] Freeing atomic state ffff88041c0f6000
>[    1.904510] [drm:drm_atomic_state_init] Allocated atomic state ffff88041c0f6000
>[    1.904511] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041bcfe900 state to ffff88041c0f6000
>[    1.904512] [drm:drm_atomic_check_only] checking ffff88041c0f6000
>[    1.904513] [drm:drm_atomic_commit] commiting ffff88041c0f6000
>[    1.904514] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041c0f6000
>[    1.904514] [drm:drm_atomic_state_free] Freeing atomic state ffff88041c0f6000
>[    1.904515] [drm:drm_atomic_state_init] Allocated atomic state ffff88041c0f6000
>[    1.904516] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88041bcfe840 state to ffff88041c0f6000
>[    1.904517] [drm:drm_atomic_check_only] checking ffff88041c0f6000
>[    1.904517] [drm:drm_atomic_commit] commiting ffff88041c0f6000
>[    1.904518] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041c0f6000
>[    1.904519] [drm:drm_atomic_state_free] Freeing atomic state ffff88041c0f6000
>[    1.904519] [drm:drm_atomic_state_init] Allocated atomic state ffff88041c0f6000
>[    1.904520] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88041bcfecc0 state to ffff88041c0f6000
>[    1.904521] [drm:drm_atomic_check_only] checking ffff88041c0f6000
>[    1.904521] [drm:drm_atomic_commit] commiting ffff88041c0f6000
>[    1.904522] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041c0f6000
>[    1.904523] [drm:drm_atomic_state_free] Freeing atomic state ffff88041c0f6000
>[    1.904524] [drm:drm_atomic_state_init] Allocated atomic state ffff88041c0f6000
>[    1.904524] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88041bcfe9c0 state to ffff88041c0f6000
>[    1.904525] [drm:drm_atomic_check_only] checking ffff88041c0f6000
>[    1.904525] [drm:drm_atomic_commit] commiting ffff88041c0f6000
>[    1.904526] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041c0f6000
>[    1.904527] [drm:drm_atomic_state_free] Freeing atomic state ffff88041c0f6000
>[    1.904528] [drm:drm_atomic_state_init] Allocated atomic state ffff88041c0f6000
>[    1.904528] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88041bcfe780 state to ffff88041c0f6000
>[    1.904529] [drm:drm_atomic_check_only] checking ffff88041c0f6000
>[    1.904530] [drm:drm_atomic_commit] commiting ffff88041c0f6000
>[    1.904530] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041c0f6000
>[    1.904531] [drm:drm_atomic_state_free] Freeing atomic state ffff88041c0f6000
>[    1.904532] [drm:drm_atomic_state_init] Allocated atomic state ffff88041c0f6000
>[    1.904533] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff88041bcfef00 state to ffff88041c0f6000
>[    1.904533] [drm:drm_atomic_check_only] checking ffff88041c0f6000
>[    1.904534] [drm:drm_atomic_commit] commiting ffff88041c0f6000
>[    1.904534] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041c0f6000
>[    1.904535] [drm:drm_atomic_state_free] Freeing atomic state ffff88041c0f6000
>[    1.904536] [drm:drm_atomic_state_init] Allocated atomic state ffff88041c0f6000
>[    1.904537] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff88041bcfea80 state to ffff88041c0f6000
>[    1.904537] [drm:drm_atomic_check_only] checking ffff88041c0f6000
>[    1.904538] [drm:drm_atomic_commit] commiting ffff88041c0f6000
>[    1.904538] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041c0f6000
>[    1.904539] [drm:drm_atomic_state_free] Freeing atomic state ffff88041c0f6000
>[    1.904540] [drm:drm_atomic_state_init] Allocated atomic state ffff88041c0f6000
>[    1.904541] [drm:drm_atomic_get_plane_state] Added [PLANE:30] ffff88041bcfe480 state to ffff88041c0f6000
>[    1.904541] [drm:drm_atomic_check_only] checking ffff88041c0f6000
>[    1.904542] [drm:drm_atomic_commit] commiting ffff88041c0f6000
>[    1.904542] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041c0f6000
>[    1.904543] [drm:drm_atomic_state_free] Freeing atomic state ffff88041c0f6000
>[    1.904544] [drm:drm_atomic_state_init] Allocated atomic state ffff88041c0f6000
>[    1.904545] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88041ae2dc00 state to ffff88041c0f6000
>[    1.904546] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88041bcfed80 state to ffff88041c0f6000
>[    1.904547] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:3200x1800] for CRTC state ffff88041ae2dc00
>[    1.904548] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041bcfed80 to [CRTC:21]
>[    1.904549] [drm:drm_atomic_set_fb_for_plane] Set [FB:53] for plane state ffff88041bcfed80
>[    1.904551] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:34] ffff88041affb2a0 state to ffff88041c0f6000
>[    1.904552] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88041c0f6000
>[    1.904553] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88041affb2a0 to [NOCRTC]
>[    1.904553] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88041affb2a0 to [CRTC:21]
>[    1.904554] [drm:drm_atomic_check_only] checking ffff88041c0f6000
>[    1.904555] [drm:update_connector_routing] Updating routing for [CONNECTOR:34:eDP-1]
>[    1.904556] [drm:update_connector_routing] [CONNECTOR:34:eDP-1] keeps [ENCODER:33:TMDS-33], now on [CRTC:21]
>[    1.904557] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 53
>[    1.904558] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 0, on 0, ms 0
>[    1.904559] [drm:drm_atomic_commit] commiting ffff88041c0f6000
>[    1.904569] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041c0f6000
>[    1.904570] [drm:drm_atomic_state_free] Freeing atomic state ffff88041c0f6000
>[    1.904572] [drm:drm_atomic_state_init] Allocated atomic state ffff88041c0f6000
>[    1.904573] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88041ae2d800 state to ffff88041c0f6000
>[    1.904574] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88041bcfe540 state to ffff88041c0f6000
>[    1.904574] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88041ae2d800
>[    1.904575] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041bcfe540 to [NOCRTC]
>[    1.904575] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88041bcfe540
>[    1.904576] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff88041c0f6000
>[    1.904577] [drm:drm_atomic_check_only] checking ffff88041c0f6000
>[    1.904578] [drm:drm_atomic_commit] commiting ffff88041c0f6000
>[    1.904589] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041c0f6000
>[    1.904590] [drm:drm_atomic_state_free] Freeing atomic state ffff88041c0f6000
>[    1.904591] [drm:drm_atomic_state_init] Allocated atomic state ffff88041c0f6000
>[    1.904592] [drm:drm_atomic_get_crtc_state] Added [CRTC:29] ffff88041ae2b800 state to ffff88041c0f6000
>[    1.904593] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff88041bcfecc0 state to ffff88041c0f6000
>[    1.904593] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88041ae2b800
>[    1.904594] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041bcfecc0 to [NOCRTC]
>[    1.904594] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88041bcfecc0
>[    1.904595] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:29] to ffff88041c0f6000
>[    1.904596] [drm:drm_atomic_check_only] checking ffff88041c0f6000
>[    1.904597] [drm:drm_atomic_commit] commiting ffff88041c0f6000
>[    1.904598] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041c0f6000
>[    1.904599] [drm:drm_atomic_state_free] Freeing atomic state ffff88041c0f6000
>[    1.904605] Console: switching to colour frame buffer device 400x112
>[    1.904614] [drm:drm_atomic_state_init] Allocated atomic state ffff88041c0f6000
>[    1.904614] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88041ae2a800 state to ffff88041c0f6000
>[    1.904615] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88041bcfef00 state to ffff88041c0f6000
>[    1.904616] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:3200x1800] for CRTC state ffff88041ae2a800
>[    1.904617] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041bcfef00 to [CRTC:21]
>[    1.904618] [drm:drm_atomic_set_fb_for_plane] Set [FB:53] for plane state ffff88041bcfef00
>[    1.904619] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:34] ffff88041affb2c0 state to ffff88041c0f6000
>[    1.904620] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88041c0f6000
>[    1.904621] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88041affb2c0 to [NOCRTC]
>[    1.904621] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88041affb2c0 to [CRTC:21]
>[    1.904622] [drm:drm_atomic_check_only] checking ffff88041c0f6000
>[    1.904622] [drm:update_connector_routing] Updating routing for [CONNECTOR:34:eDP-1]
>[    1.904623] [drm:update_connector_routing] [CONNECTOR:34:eDP-1] keeps [ENCODER:33:TMDS-33], now on [CRTC:21]
>[    1.904625] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 53
>[    1.904625] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 0, on 0, ms 0
>[    1.904626] [drm:drm_atomic_commit] commiting ffff88041c0f6000
>[    1.904636] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041c0f6000
>[    1.904637] [drm:drm_atomic_state_free] Freeing atomic state ffff88041c0f6000
>[    1.914955] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device
>[    1.950426] i8042: PNP: PS/2 Controller [PNP0303:PS2K,PNP0f13:PS2M] at 0x60,0x64 irq 1,12
>[    1.982427] serio: i8042 KBD port at 0x60,0x64 irq 1
>[    1.982493] serio: i8042 AUX port at 0x60,0x64 irq 12
>[    1.982886] rtsx_pci 0000:07:00.0: enabling device (0000 -> 0002)
>[    1.983015] rtsx_pci 0000:07:00.0: rtsx_pci_acquire_irq: pcr->msi_en = 1, pci->irq = 31
>[    1.984283] ACPI: bus type USB registered
>[    1.984315] usbcore: registered new interface driver usbfs
>[    1.984332] usbcore: registered new interface driver hub
>[    1.984380] usbcore: registered new device driver usb
>[    1.984407] AVX2 version of gcm_enc/dec engaged.
>[    1.984409] AES CTR mode by8 optimization enabled
>[    1.985354] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
>[    1.985453] SCSI subsystem initialized
>[    1.985669] ehci-pci: EHCI PCI platform driver
>[    1.985863] ehci-pci 0000:00:1a.0: EHCI Host Controller
>[    1.985874] ehci-pci 0000:00:1a.0: new USB bus registered, assigned bus number 1
>[    1.985892] ehci-pci 0000:00:1a.0: debug port 2
>[    1.987148] libata version 3.00 loaded.
>[    1.989814] ehci-pci 0000:00:1a.0: cache line size of 64 is not supported
>[    1.989831] ehci-pci 0000:00:1a.0: irq 16, io mem 0xf7a24000
>[    2.000318] ehci-pci 0000:00:1a.0: USB 2.0 started, EHCI 1.00
>[    2.000637] hub 1-0:1.0: USB hub found
>[    2.000643] hub 1-0:1.0: 2 ports detected
>[    2.000914] ehci-pci 0000:00:1d.0: EHCI Host Controller
>[    2.000920] ehci-pci 0000:00:1d.0: new USB bus registered, assigned bus number 2
>[    2.000931] ehci-pci 0000:00:1d.0: debug port 2
>[    2.004842] ehci-pci 0000:00:1d.0: cache line size of 64 is not supported
>[    2.004856] ehci-pci 0000:00:1d.0: irq 23, io mem 0xf7a23000
>[    2.013645] ehci-pci 0000:00:1d.0: USB 2.0 started, EHCI 1.00
>[    2.013931] hub 2-0:1.0: USB hub found
>[    2.013937] hub 2-0:1.0: 2 ports detected
>[    2.014247] xhci_hcd 0000:00:14.0: xHCI Host Controller
>[    2.014257] xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 3
>[    2.015350] xhci_hcd 0000:00:14.0: hcc params 0x200077c1 hci version 0x100 quirks 0x00009810
>[    2.015358] xhci_hcd 0000:00:14.0: cache line size of 64 is not supported
>[    2.015678] hub 3-0:1.0: USB hub found
>[    2.015694] hub 3-0:1.0: 14 ports detected
>[    2.015907] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input5
>[    2.018380] xhci_hcd 0000:00:14.0: xHCI Host Controller
>[    2.018383] xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 4
>[    2.018574] hub 4-0:1.0: USB hub found
>[    2.018586] hub 4-0:1.0: 6 ports detected
>[    2.019471] ahci 0000:00:1f.2: version 3.0
>[    2.019629] ahci 0000:00:1f.2: AHCI 0001.0300 32 slots 6 ports 6 Gbps 0x3 impl SATA mode
>[    2.019631] ahci 0000:00:1f.2: flags: 64bit ncq pm led clo pio slum part ems apst 
>[    2.024837] scsi host0: ahci
>[    2.024960] scsi host1: ahci
>[    2.025042] scsi host2: ahci
>[    2.025130] scsi host3: ahci
>[    2.025229] scsi host4: ahci
>[    2.025326] scsi host5: ahci
>[    2.025382] ata1: SATA max UDMA/133 abar m2048@0xf7a22000 port 0xf7a22100 irq 33
>[    2.025386] ata2: SATA max UDMA/133 abar m2048@0xf7a22000 port 0xf7a22180 irq 33
>[    2.025388] ata3: DUMMY
>[    2.025389] ata4: DUMMY
>[    2.025390] ata5: DUMMY
>[    2.025391] ata6: DUMMY
>[    2.307302] usb 1-1: new high-speed USB device number 2 using ehci-pci
>[    2.316109] [drm:intel_print_rc6_info] Enabling RC6 states: RC6 on
>[    2.316118] [drm:gen6_enable_rps] Overclocking supported. Max: 1150MHz, Overclock max: 1150MHz
>[    2.320576] usb 2-1: new high-speed USB device number 2 using ehci-pci
>[    2.343946] ata2: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
>[    2.344533] ata2.00: ATA-9: Micron C400 RealSSD mSATA 32GB, 07MH, max UDMA/100
>[    2.344536] ata2.00: 62533296 sectors, multi 16: LBA48 NCQ (depth 31/32), AA
>[    2.345200] ata2.00: configured for UDMA/100
>[    2.347304] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
>[    2.348108] ata1.00: ATA-9: WDC WD10SPCX-75HWST0, 01.01A01, max UDMA/133
>[    2.348111] ata1.00: 1953525168 sectors, multi 16: LBA48 NCQ (depth 31/32), AA
>[    2.349165] ata1.00: configured for UDMA/133
>[    2.349487] scsi 0:0:0:0: Direct-Access     ATA      WDC WD10SPCX-75H 1A01 PQ: 0 ANSI: 5
>[    2.350018] scsi 1:0:0:0: Direct-Access     ATA      Micron C400 Real 07MH PQ: 0 ANSI: 5
>[    2.351990] sd 0:0:0:0: [sda] 1953525168 512-byte logical blocks: (1.00 TB/931 GiB)
>[    2.351993] sd 0:0:0:0: [sda] 4096-byte physical blocks
>[    2.352029] sd 1:0:0:0: [sdb] 62533296 512-byte logical blocks: (32.0 GB/29.8 GiB)
>[    2.352064] sd 0:0:0:0: [sda] Write Protect is off
>[    2.352067] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
>[    2.352099] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
>[    2.352125] sd 1:0:0:0: [sdb] Write Protect is off
>[    2.352128] sd 1:0:0:0: [sdb] Mode Sense: 00 3a 00 00
>[    2.352156] sd 1:0:0:0: [sdb] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
>[    2.353512]  sdb: sdb1 sdb2
>[    2.353804] sd 1:0:0:0: [sdb] Attached SCSI disk
>[    2.377317] usb 3-6: new full-speed USB device number 2 using xhci_hcd
>[    2.399776]  sda: sda1 sda2
>[    2.400500] sd 0:0:0:0: [sda] Attached SCSI disk
>[    2.431364] hub 1-1:1.0: USB hub found
>[    2.431492] hub 1-1:1.0: 6 ports detected
>[    2.444634] hub 2-1:1.0: USB hub found
>[    2.444795] hub 2-1:1.0: 8 ports detected
>[    2.474023] raid6: sse2x1   gen()  9686 MB/s
>[    2.530763] raid6: sse2x1   xor()  7829 MB/s
>[    2.553179] hidraw: raw HID events driver (C) Jiri Kosina
>[    2.554714] usbcore: registered new interface driver usbhid
>[    2.554716] usbhid: USB HID core driver
>[    2.555563] input: SYNAPTICS Synaptics Large Touch Screen as /devices/pci0000:00/0000:00:14.0/usb3/3-6/3-6:1.0/0003:06CB:0AC3.0001/input/input7
>[    2.555658] hid-multitouch 0003:06CB:0AC3.0001: input,hiddev0,hidraw0: USB HID v1.11 Mouse [SYNAPTICS Synaptics Large Touch Screen] on usb-0000:00:14.0-6/input0
>[    2.587491] raid6: sse2x2   gen() 12287 MB/s
>[    2.644211] raid6: sse2x2   xor()  8502 MB/s
>[    2.700956] raid6: sse2x4   gen() 14574 MB/s
>[    2.757661] clocksource: Switched to clocksource tsc
>[    2.757665] usb 3-9: new full-speed USB device number 3 using xhci_hcd
>[    2.757667] raid6: sse2x4   xor()  5435 MB/s
>[    2.814358] raid6: avx2x1   gen() 19392 MB/s
>[    2.871081] raid6: avx2x2   gen() 23013 MB/s
>[    2.927802] raid6: avx2x4   gen() 26464 MB/s
>[    2.927803] raid6: using algorithm avx2x4 gen() 26464 MB/s
>[    2.927804] raid6: using avx2x2 recovery algorithm
>[    2.928025] xor: automatically using best checksumming function:
>[    2.961169]    avx       : 31730.400 MB/sec
>[    2.963789] Btrfs loaded
>[    2.964189] BTRFS: device fsid 5fce4ad4-27a8-4cfc-93b0-03412c538f0d devid 1 transid 1531 /dev/sdb1
>[    2.965421] [drm:drm_atomic_state_init] Allocated atomic state ffff8800ca094c00
>[    2.965424] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800ca1d6000 state to ffff8800ca094c00
>[    2.965425] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88041aa21a80 state to ffff8800ca094c00
>[    2.965427] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:3200x1800] for CRTC state ffff8800ca1d6000
>[    2.965428] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041aa21a80 to [CRTC:21]
>[    2.965429] [drm:drm_atomic_set_fb_for_plane] Set [FB:53] for plane state ffff88041aa21a80
>[    2.965430] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:34] ffff8800c9b61c20 state to ffff8800ca094c00
>[    2.965431] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff8800ca094c00
>[    2.965432] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8800c9b61c20 to [NOCRTC]
>[    2.965433] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8800c9b61c20 to [CRTC:21]
>[    2.965434] [drm:drm_atomic_check_only] checking ffff8800ca094c00
>[    2.965436] [drm:update_connector_routing] Updating routing for [CONNECTOR:34:eDP-1]
>[    2.965437] [drm:update_connector_routing] [CONNECTOR:34:eDP-1] keeps [ENCODER:33:TMDS-33], now on [CRTC:21]
>[    2.965440] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 53
>[    2.965440] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 0, on 0, ms 0
>[    2.965441] [drm:drm_atomic_commit] commiting ffff8800ca094c00
>[    2.965459] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800ca094c00
>[    2.965461] [drm:drm_atomic_state_free] Freeing atomic state ffff8800ca094c00
>[    2.975866] device-mapper: uevent: version 1.0.3
>[    2.975975] device-mapper: ioctl: 4.33.0-ioctl (2015-8-18) initialised: dm-devel@redhat.com
>[    3.091382] usb 3-11: new high-speed USB device number 4 using xhci_hcd
>[    4.893220] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[    4.893241] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[    7.694885] random: nonblocking pool is initialized
>[   11.507711] NET: Registered protocol family 38
>[   11.514662] sha256_ssse3: Using AVX2 optimized SHA-256 implementation
>[   11.796648] BTRFS: device fsid 63b1b99e-c071-4799-9abc-a6867a0ee3d5 devid 1 transid 64138 /dev/dm-0
>[   11.809686] BTRFS info (device dm-0): disk space caching is enabled
>[   11.815149] BTRFS: detected SSD devices, enabling SSD mode
>[   11.915333] ip_tables: (C) 2000-2006 Netfilter Core Team
>[   11.922913][1]: systemd 228 running in system mode. (+PAM -AUDIT -SELINUX -IMA -APPARMOR +SMACK -SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +SECCOMP +BLKID +ELFUTILS +KMOD +IDN)
>[   11.923095][1]: Detected architecture x86-64.
>[   11.923965][1]: Set hostname to <minas-tirith>.
>[   11.964508][1]: Started Dispatch Password Requests to Console Directory Watch.
>[   11.964676][1]: Listening on Journal Socket.
>[   11.964754][1]: Listening on Journal Socket (/dev/log).
>[   11.964829][1]: Listening on /dev/initctl Compatibility Named Pipe.
>[   11.968387][1]: Started Forward Password Requests to Wall Directory Watch.
>[   11.968478][1]: Reached target Paths.
>[   11.968554][1]: Listening on Device-mapper event daemon FIFOs.
>[   11.968637][1]: Listening on udev Control Socket.
>[   11.968803][1]: Set up automount Arbitrary Executable File Formats File System Automount Point.
>[   11.969185][1]: Created slice User and Session Slice.
>[   11.969266][1]: Listening on udev Kernel Socket.
>[   11.969322][1]: Reached target Remote File Systems.
>[   11.969379][1]: Reached target Swap.
>[   11.969525][1]: Created slice System Slice.
>[   11.969689][1]: Created slice system-systemd\x2dfsck.slice.
>[   11.970110][1]: Mounting Temporary Directory...
>[   11.970609][1]: Starting Create list of required static device nodes for the current kernel...
>[   11.971406][1]: Created slice system-getty.slice.
>[   11.971813][1]: Starting Setup Virtual Console...
>[   11.972432][1]: Starting Remount Root and Kernel File Systems...
>[   11.973075][1]: Mounting Debug File System...
>[   11.973733][1]: Starting Journal Service...
>[   11.973934][1]: Created slice system-systemd\x2dcryptsetup.slice.
>[   11.975118][1]: Starting Load Kernel Modules...
>[   11.975160][1]: Reached target Slices.
>[   11.975501][1]: Mounting Huge Pages File System...
>[   11.975545][1]: Reached target Login Prompts.
>[   11.976009][1]: Mounting POSIX Message Queue File System...
>[   11.977517][1]: Started Create list of required static device nodes for the current kernel.
>[   11.978731][1]: Mounted Debug File System.
>[   11.978790][1]: Mounted Huge Pages File System.
>[   11.978832][1]: Mounted Temporary Directory.
>[   11.979231][1]: Mounted POSIX Message Queue File System.
>[   12.013074][1]: Started Load Kernel Modules.
>[   12.013873][1]: Mounting Configuration File System...
>[   12.014471][1]: Starting Apply Kernel Variables...
>[   12.021610][1]: Mounted Configuration File System.
>[   12.036676][1]: Started Apply Kernel Variables.
>[   12.059137][1]: Started Journal Service.
>[   12.127362] BTRFS info (device dm-0): enabling inode map caching
>[   12.127368] BTRFS info (device dm-0): turning on discard
>[   12.127372] BTRFS info (device dm-0): disk space caching is enabled
>[   12.129063] [drm:drm_atomic_state_init] Allocated atomic state ffff8800c9a1be00
>[   12.129065] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c9856c00 state to ffff8800c9a1be00
>[   12.129067] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8804193f9f00 state to ffff8800c9a1be00
>[   12.129070] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:3200x1800] for CRTC state ffff8800c9856c00
>[   12.129070] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804193f9f00 to [CRTC:21]
>[   12.129071] [drm:drm_atomic_set_fb_for_plane] Set [FB:53] for plane state ffff8804193f9f00
>[   12.129073] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:34] ffff88041bee97e0 state to ffff8800c9a1be00
>[   12.129074] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff8800c9a1be00
>[   12.129076] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88041bee97e0 to [NOCRTC]
>[   12.129077] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88041bee97e0 to [CRTC:21]
>[   12.129077] [drm:drm_atomic_check_only] checking ffff8800c9a1be00
>[   12.129080] [drm:update_connector_routing] Updating routing for [CONNECTOR:34:eDP-1]
>[   12.129081] [drm:update_connector_routing] [CONNECTOR:34:eDP-1] keeps [ENCODER:33:TMDS-33], now on [CRTC:21]
>[   12.129085] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 53
>[   12.129086] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 0, on 0, ms 0
>[   12.129087] [drm:drm_atomic_commit] commiting ffff8800c9a1be00
>[   12.129106] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800c9a1be00
>[   12.129108] [drm:drm_atomic_state_free] Freeing atomic state ffff8800c9a1be00
>[   12.192487] FUJITSU Extended Socket Network Device Driver - version 1.0 - Copyright (c) 2015 FUJITSU LIMITED
>[   12.197219] ACPI: AC Adapter [ACAD] (on-line)
>[   12.197233] wmi: Mapper loaded
>[   12.198373] input: DELL Wireless hotkeys as /devices/virtual/input/input9
>[   12.208751] ACPI: Invalid active2 threshold
>[   12.208910] thermal LNXTHERM:00: registered as thermal_zone8
>[   12.208913] ACPI: Thermal Zone [TZ00] (28 C)
>[   12.209121] thermal LNXTHERM:01: registered as thermal_zone9
>[   12.209123] ACPI: Thermal Zone [TZ01] (-267 C)
>[   12.212114] shpchp: Standard Hot Plug PCI Controller Driver version: 0.4
>[   12.212789] EDAC MC: Ver: 3.0.0
>[   12.213436] EDAC ie31200: No ECC support
>[   12.267536] ACPI Warning: SystemIO range 0x000000000000F040-0x000000000000F05F conflicts with OpRegion 0x000000000000F040-0x000000000000F04F (\_SB_.PCI0.SBUS.SMBI)
>[   12.267543] input: PC Speaker as /devices/platform/pcspkr/input/input10
>[   12.267544]  (20150818/utaddress-254)
>[   12.267548] ACPI: This conflict may cause random problems and system instability
>[   12.267685] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
>[   12.267727] i801_smbus 0000:00:1f.3: SMBus using PCI interrupt
>[   12.281495] dcdbas dcdbas: Dell Systems Management Base Driver (version 5.6.0-3.2)
>[   12.282462] Intel(R) Wireless WiFi driver for Linux
>[   12.282464] Copyright(c) 2003- 2015 Intel Corporation
>[   12.282661] iwlwifi 0000:06:00.0: enabling device (0000 -> 0002)
>[   12.283150] snd_hda_intel 0000:00:03.0: enabling device (0000 -> 0002)
>[   12.283176] snd_hda_intel 0000:00:03.0: bound 0000:00:02.0 (ops i915_exit [i915])
>[   12.283380] iwlwifi 0000:06:00.0: Direct firmware load for iwlwifi-7260-17.ucode failed with error -2
>[   12.283399] iwlwifi 0000:06:00.0: Direct firmware load for iwlwifi-7260-16.ucode failed with error -2
>[   12.283827] iwlwifi 0000:06:00.0: Direct firmware load for iwlwifi-7260-15.ucode failed with error -2
>[   12.283855] iwlwifi 0000:06:00.0: Direct firmware load for iwlwifi-7260-14.ucode failed with error -2
>[   12.288535] iwlwifi 0000:06:00.0: loaded firmware version 25.30.13.0 op_mode iwlmvm
>[   12.293560] [drm:drm_atomic_state_init] Allocated atomic state ffff88041ad24800
>[   12.293562] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88041bcb6800 state to ffff88041ad24800
>[   12.293564] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800c991a240 state to ffff88041ad24800
>[   12.293566] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:3200x1800] for CRTC state ffff88041bcb6800
>[   12.293567] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800c991a240 to [CRTC:21]
>[   12.293568] [drm:drm_atomic_set_fb_for_plane] Set [FB:53] for plane state ffff8800c991a240
>[   12.293569] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:34] ffff88041bb39660 state to ffff88041ad24800
>[   12.293570] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88041ad24800
>[   12.293571] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88041bb39660 to [NOCRTC]
>[   12.293572] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88041bb39660 to [CRTC:21]
>[   12.293573] [drm:drm_atomic_check_only] checking ffff88041ad24800
>[   12.293575] [drm:update_connector_routing] Updating routing for [CONNECTOR:34:eDP-1]
>[   12.293576] [drm:update_connector_routing] [CONNECTOR:34:eDP-1] keeps [ENCODER:33:TMDS-33], now on [CRTC:21]
>[   12.293579] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 53
>[   12.293580] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 0, on 0, ms 0
>[   12.293580] [drm:drm_atomic_commit] commiting ffff88041ad24800
>[   12.293597] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041ad24800
>[   12.293599] [drm:drm_atomic_state_free] Freeing atomic state ffff88041ad24800
>[   12.294791] [drm:intel_power_well_enable] enabling display
>[   12.294793] [drm:hsw_set_power_well] Enabling power well
>[   12.309316] [drm:drm_atomic_state_init] Allocated atomic state ffff8800c9863800
>[   12.309319] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88041bbcf800 state to ffff8800c9863800
>[   12.309320] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88041c3e3a80 state to ffff8800c9863800
>[   12.309323] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:3200x1800] for CRTC state ffff88041bbcf800
>[   12.309324] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041c3e3a80 to [CRTC:21]
>[   12.309325] [drm:drm_atomic_set_fb_for_plane] Set [FB:53] for plane state ffff88041c3e3a80
>[   12.309326] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:34] ffff8800ca310f00 state to ffff8800c9863800
>[   12.309327] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff8800c9863800
>[   12.309328] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8800ca310f00 to [NOCRTC]
>[   12.309329] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8800ca310f00 to [CRTC:21]
>[   12.309330] [drm:drm_atomic_check_only] checking ffff8800c9863800
>[   12.309332] [drm:update_connector_routing] Updating routing for [CONNECTOR:34:eDP-1]
>[   12.309333] [drm:update_connector_routing] [CONNECTOR:34:eDP-1] keeps [ENCODER:33:TMDS-33], now on [CRTC:21]
>[   12.309336] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 53
>[   12.309337] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 0, on 0, ms 0
>[   12.309338] [drm:drm_atomic_commit] commiting ffff8800c9863800
>[   12.309354] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800c9863800
>[   12.309356] [drm:drm_atomic_state_free] Freeing atomic state ffff8800c9863800
>[   12.312578] intel_rapl: Found RAPL domain package
>[   12.312580] intel_rapl: Found RAPL domain core
>[   12.312581] intel_rapl: Found RAPL domain uncore
>[   12.312582] intel_rapl: Found RAPL domain dram
>[   12.312939] input: Dell WMI hotkeys as /devices/virtual/input/input12
>[   12.323859] BTRFS info (device sdb1): use ssd allocation scheme
>[   12.323864] BTRFS info (device sdb1): enabling inode map caching
>[   12.323867] BTRFS info (device sdb1): turning on discard
>[   12.323869] BTRFS info (device sdb1): btrfs: use no compression
>[   12.323871] BTRFS info (device sdb1): disk space caching is enabled
>[   12.328596] iTCO_vendor_support: vendor-support=0
>[   12.331718] input: HDA Intel HDMI HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:03.0/sound/card1/input13
>[   12.331786] input: HDA Intel HDMI HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:03.0/sound/card1/input14
>[   12.331854] input: HDA Intel HDMI HDMI/DP,pcm=8 as /devices/pci0000:00/0000:00:03.0/sound/card1/input15
>[   12.331994] iTCO_wdt: Intel TCO WatchDog Timer Driver v1.11
>[   12.332037] iTCO_wdt: Found a Lynx Point TCO device (Version=2, TCOBASE=0x1860)
>[   12.333102] snd_hda_codec_realtek hdaudioC0D0: autoconfig for ALC3661: line_outs=1 (0x14/0x0/0x0/0x0/0x0) type:speaker
>[   12.333106] snd_hda_codec_realtek hdaudioC0D0:    speaker_outs=0 (0x0/0x0/0x0/0x0/0x0)
>[   12.333109] snd_hda_codec_realtek hdaudioC0D0:    hp_outs=1 (0x15/0x0/0x0/0x0/0x0)
>[   12.333111] snd_hda_codec_realtek hdaudioC0D0:    mono: mono_out=0x0
>[   12.333113] snd_hda_codec_realtek hdaudioC0D0:    inputs:
>[   12.333115] snd_hda_codec_realtek hdaudioC0D0:      Headphone Mic=0x19
>[   12.333117] snd_hda_codec_realtek hdaudioC0D0:      Headset Mic=0x1b
>[   12.333119] snd_hda_codec_realtek hdaudioC0D0:      Internal Mic=0x12
>[   12.333906] iTCO_wdt: initialized. heartbeat=30 sec (nowayout=0)
>[   12.353230] cfg80211: World regulatory domain updated:
>[   12.353233] cfg80211:  DFS Master region: unset
>[   12.353234] cfg80211:   (start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp), (dfs_cac_time)
>[   12.353235] cfg80211:   (2402000 KHz - 2472000 KHz @ 40000 KHz), (N/A, 2000 mBm), (N/A)
>[   12.353237] cfg80211:   (2457000 KHz - 2482000 KHz @ 40000 KHz), (N/A, 2000 mBm), (N/A)
>[   12.353238] cfg80211:   (2474000 KHz - 2494000 KHz @ 20000 KHz), (N/A, 2000 mBm), (N/A)
>[   12.353239] cfg80211:   (5170000 KHz - 5250000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A, 2000 mBm), (N/A)
>[   12.353240] cfg80211:   (5250000 KHz - 5330000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A, 2000 mBm), (0 s)
>[   12.353241] cfg80211:   (5490000 KHz - 5730000 KHz @ 160000 KHz), (N/A, 2000 mBm), (0 s)
>[   12.353242] cfg80211:   (5735000 KHz - 5835000 KHz @ 80000 KHz), (N/A, 2000 mBm), (N/A)
>[   12.353243] cfg80211:   (57240000 KHz - 63720000 KHz @ 2160000 KHz), (N/A, 0 mBm), (N/A)
>[   12.356690] cfg80211: Regulatory domain changed to country: FR
>[   12.356692] cfg80211:  DFS Master region: ETSI
>[   12.356693] cfg80211:   (start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp), (dfs_cac_time)
>[   12.356695] cfg80211:   (2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A, 2000 mBm), (N/A)
>[   12.356696] cfg80211:   (5170000 KHz - 5250000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A, 2000 mBm), (N/A)
>[   12.356698] cfg80211:   (5250000 KHz - 5330000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A, 2000 mBm), (0 s)
>[   12.356699] cfg80211:   (5490000 KHz - 5710000 KHz @ 160000 KHz), (N/A, 2700 mBm), (0 s)
>[   12.356700] cfg80211:   (57000000 KHz - 66000000 KHz @ 2160000 KHz), (N/A, 4000 mBm), (N/A)
>[   12.374158] iwlwifi 0000:06:00.0: Detected Intel(R) Dual Band Wireless AC 7260, REV=0x144
>[   12.374245] iwlwifi 0000:06:00.0: L1 Enabled - LTR Enabled
>[   12.374512] iwlwifi 0000:06:00.0: L1 Enabled - LTR Enabled
>[   12.374835] Non-volatile memory driver v1.3
>[   12.374965] input: HDA Digital PCBeep as /devices/pci0000:00/0000:00:1b.0/sound/card0/input16
>[   12.375155] input: HDA Intel PCH Headphone Mic as /devices/pci0000:00/0000:00:1b.0/sound/card0/input17
>[   12.444055] ACPI: Battery Slot [BAT1] (battery present)
>[   12.582178] ieee80211 phy0: Selected rate control algorithm 'iwl-mvm-rs'
>[   12.582893] iwlwifi 0000:06:00.0 wlp6s0: renamed from wlan0
>[   13.250700] mousedev: PS/2 mouse device common for all mice
>[   13.751023] psmouse serio1: synaptics: queried max coordinates: x [..5660], y [..4646]
>[   13.841039] psmouse serio1: synaptics: queried min coordinates: x [1386..], y [1252..]
>[   14.006887] psmouse serio1: synaptics: Touchpad model: 1, fw: 8.1, id: 0x1e2b1, caps: 0xd00123/0x840300/0x126800/0x0, board id: 2733, fw id: 1515627
>[   14.110064] input: SynPS/2 Synaptics TouchPad as /devices/platform/i8042/serio1/input/input11
>[   14.439670] BTRFS: device fsid d4b4956a-1102-465c-92e5-df05db24f9a1 devid 1 transid 713403 /dev/dm-1
>[   14.444428] BTRFS info (device dm-1): enabling auto defrag
>[   14.444430] BTRFS info (device dm-1): disk space caching is enabled
>[   24.156278] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=4882/4882
>[   24.156281] [drm:intel_panel_actually_set_backlight] set backlight PWM = 4882
>[   26.501216] bbswitch: version 0.8
>[   26.501222] bbswitch: Found integrated VGA device 0000:00:02.0: \_SB_.PCI0.GFX0
>[   26.501226] bbswitch: Found discrete VGA device 0000:02:00.0: \_SB_.PCI0.PEG0.PEGP
>[   26.501236] ACPI Warning: \_SB_.PCI0.PEG0.PEGP._DSM: Argument #4 type mismatch - Found [Buffer], ACPI requires [Package] (20150818/nsarguments-95)
>[   26.501321] bbswitch: detected an Optimus _DSM function
>[   26.501332] pci 0000:02:00.0: enabling device (0006 -> 0007)
>[   26.501336] bbswitch: Succesfully loaded. Discrete card 0000:02:00.0 is on
>[   26.502720] bbswitch: disabling discrete graphics
>[   26.502727] ACPI Warning: \_SB_.PCI0.PEG0.PEGP._DSM: Argument #4 type mismatch - Found [Buffer], ACPI requires [Package] (20150818/nsarguments-95)
>[   26.795941] [drm:i915_gem_open] 
>[   26.795951] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[7]
>[   26.795961] [drm:drm_atomic_state_init] Allocated atomic state ffff880413073000
>[   26.795963] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff880418fd8a80 state to ffff880413073000
>[   26.795965] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88041bbcd400 state to ffff880413073000
>[   26.795966] [drm:drm_atomic_check_only] checking ffff880413073000
>[   26.795970] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 53
>[   26.795971] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 0, on 0, ms 0
>[   26.795973] [drm:drm_atomic_commit] commiting ffff880413073000
>[   26.795988] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413073000
>[   26.795989] [drm:drm_atomic_state_free] Freeing atomic state ffff880413073000
>[   26.795991] [drm:drm_atomic_state_init] Allocated atomic state ffff880413073000
>[   26.795992] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880418fd8d80 state to ffff880413073000
>[   26.795993] [drm:drm_atomic_check_only] checking ffff880413073000
>[   26.795994] [drm:drm_atomic_commit] commiting ffff880413073000
>[   26.795994] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413073000
>[   26.795995] [drm:drm_atomic_state_free] Freeing atomic state ffff880413073000
>[   26.795997] [drm:drm_atomic_state_init] Allocated atomic state ffff880413073000
>[   26.795998] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880418fd83c0 state to ffff880413073000
>[   26.795998] [drm:drm_atomic_check_only] checking ffff880413073000
>[   26.795999] [drm:drm_atomic_commit] commiting ffff880413073000
>[   26.796000] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413073000
>[   26.796001] [drm:drm_atomic_state_free] Freeing atomic state ffff880413073000
>[   26.796002] [drm:drm_atomic_state_init] Allocated atomic state ffff880413073000
>[   26.796003] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff880418fd8e40 state to ffff880413073000
>[   26.796004] [drm:drm_atomic_check_only] checking ffff880413073000
>[   26.796004] [drm:drm_atomic_commit] commiting ffff880413073000
>[   26.796005] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413073000
>[   26.796006] [drm:drm_atomic_state_free] Freeing atomic state ffff880413073000
>[   26.796007] [drm:drm_atomic_state_init] Allocated atomic state ffff880413073000
>[   26.796008] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff880418fd8240 state to ffff880413073000
>[   26.796009] [drm:drm_atomic_check_only] checking ffff880413073000
>[   26.796010] [drm:drm_atomic_commit] commiting ffff880413073000
>[   26.796011] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413073000
>[   26.796011] [drm:drm_atomic_state_free] Freeing atomic state ffff880413073000
>[   26.796013] [drm:drm_atomic_state_init] Allocated atomic state ffff880413073000
>[   26.796014] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff880418fd80c0 state to ffff880413073000
>[   26.796014] [drm:drm_atomic_check_only] checking ffff880413073000
>[   26.796015] [drm:drm_atomic_commit] commiting ffff880413073000
>[   26.796016] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413073000
>[   26.796017] [drm:drm_atomic_state_free] Freeing atomic state ffff880413073000
>[   26.796018] [drm:drm_atomic_state_init] Allocated atomic state ffff880413073000
>[   26.796019] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff880418fd8f00 state to ffff880413073000
>[   26.796020] [drm:drm_atomic_check_only] checking ffff880413073000
>[   26.796020] [drm:drm_atomic_commit] commiting ffff880413073000
>[   26.796021] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413073000
>[   26.796022] [drm:drm_atomic_state_free] Freeing atomic state ffff880413073000
>[   26.796023] [drm:drm_atomic_state_init] Allocated atomic state ffff880413073000
>[   26.796024] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff880418fd8b40 state to ffff880413073000
>[   26.796025] [drm:drm_atomic_check_only] checking ffff880413073000
>[   26.796026] [drm:drm_atomic_commit] commiting ffff880413073000
>[   26.796027] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413073000
>[   26.796027] [drm:drm_atomic_state_free] Freeing atomic state ffff880413073000
>[   26.796028] [drm:drm_atomic_state_init] Allocated atomic state ffff880413073000
>[   26.796029] [drm:drm_atomic_get_plane_state] Added [PLANE:30] ffff880418fd8300 state to ffff880413073000
>[   26.796030] [drm:drm_atomic_check_only] checking ffff880413073000
>[   26.796031] [drm:drm_atomic_commit] commiting ffff880413073000
>[   26.796032] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413073000
>[   26.796033] [drm:drm_atomic_state_free] Freeing atomic state ffff880413073000
>[   26.796034] [drm:drm_atomic_state_init] Allocated atomic state ffff880413073000
>[   26.796035] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88041bbcf800 state to ffff880413073000
>[   26.796036] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88041bcfe480 state to ffff880413073000
>[   26.796038] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:3200x1800] for CRTC state ffff88041bbcf800
>[   26.796039] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041bcfe480 to [CRTC:21]
>[   26.796040] [drm:drm_atomic_set_fb_for_plane] Set [FB:53] for plane state ffff88041bcfe480
>[   26.796042] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:34] ffff880413942140 state to ffff880413073000
>[   26.796043] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff880413073000
>[   26.796044] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880413942140 to [NOCRTC]
>[   26.796045] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880413942140 to [CRTC:21]
>[   26.796046] [drm:drm_atomic_check_only] checking ffff880413073000
>[   26.796047] [drm:update_connector_routing] Updating routing for [CONNECTOR:34:eDP-1]
>[   26.796049] [drm:update_connector_routing] [CONNECTOR:34:eDP-1] keeps [ENCODER:33:TMDS-33], now on [CRTC:21]
>[   26.796050] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 53
>[   26.796051] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 0, on 0, ms 0
>[   26.796052] [drm:drm_atomic_commit] commiting ffff880413073000
>[   26.796057] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413073000
>[   26.796059] [drm:drm_atomic_state_free] Freeing atomic state ffff880413073000
>[   26.796061] [drm:drm_atomic_state_init] Allocated atomic state ffff880413073000
>[   26.796062] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88041bbcd400 state to ffff880413073000
>[   26.796063] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88041bcfecc0 state to ffff880413073000
>[   26.796064] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88041bbcd400
>[   26.796064] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041bcfecc0 to [NOCRTC]
>[   26.796065] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88041bcfecc0
>[   26.796066] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff880413073000
>[   26.796067] [drm:drm_atomic_check_only] checking ffff880413073000
>[   26.796068] [drm:drm_atomic_commit] commiting ffff880413073000
>[   26.796070] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413073000
>[   26.796071] [drm:drm_atomic_state_free] Freeing atomic state ffff880413073000
>[   26.796072] [drm:drm_atomic_state_init] Allocated atomic state ffff880413073000
>[   26.796073] [drm:drm_atomic_get_crtc_state] Added [CRTC:29] ffff88041bbcfc00 state to ffff880413073000
>[   26.796074] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff88041bcfe780 state to ffff880413073000
>[   26.796075] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88041bbcfc00
>[   26.796076] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041bcfe780 to [NOCRTC]
>[   26.796076] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88041bcfe780
>[   26.796077] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:29] to ffff880413073000
>[   26.796078] [drm:drm_atomic_check_only] checking ffff880413073000
>[   26.796079] [drm:drm_atomic_commit] commiting ffff880413073000
>[   26.796080] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413073000
>[   26.796081] [drm:drm_atomic_state_free] Freeing atomic state ffff880413073000
>[   26.883137] [drm:i915_gem_open] 
>[   26.883171] [drm:drm_atomic_state_init] Allocated atomic state ffff880413e24e00
>[   26.883173] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800c99189c0 state to ffff880413e24e00
>[   26.883175] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88041b281000 state to ffff880413e24e00
>[   26.883177] [drm:drm_atomic_check_only] checking ffff880413e24e00
>[   26.883181] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 53
>[   26.883182] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 0, on 0, ms 0
>[   26.883183] [drm:drm_atomic_commit] commiting ffff880413e24e00
>[   26.883199] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413e24e00
>[   26.883201] [drm:drm_atomic_state_free] Freeing atomic state ffff880413e24e00
>[   26.883202] [drm:drm_atomic_state_init] Allocated atomic state ffff880413e24e00
>[   26.883204] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041bcfe480 state to ffff880413e24e00
>[   26.883204] [drm:drm_atomic_check_only] checking ffff880413e24e00
>[   26.883205] [drm:drm_atomic_commit] commiting ffff880413e24e00
>[   26.883206] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413e24e00
>[   26.883207] [drm:drm_atomic_state_free] Freeing atomic state ffff880413e24e00
>[   26.883209] [drm:drm_atomic_state_init] Allocated atomic state ffff880413e24e00
>[   26.883210] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800c8f4ec00 state to ffff880413e24e00
>[   26.883211] [drm:drm_atomic_check_only] checking ffff880413e24e00
>[   26.883212] [drm:drm_atomic_commit] commiting ffff880413e24e00
>[   26.883213] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413e24e00
>[   26.883213] [drm:drm_atomic_state_free] Freeing atomic state ffff880413e24e00
>[   26.883215] [drm:drm_atomic_state_init] Allocated atomic state ffff880413e24e00
>[   26.883216] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800c8f4ea80 state to ffff880413e24e00
>[   26.883217] [drm:drm_atomic_check_only] checking ffff880413e24e00
>[   26.883217] [drm:drm_atomic_commit] commiting ffff880413e24e00
>[   26.883218] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413e24e00
>[   26.883219] [drm:drm_atomic_state_free] Freeing atomic state ffff880413e24e00
>[   26.883220] [drm:drm_atomic_state_init] Allocated atomic state ffff880413e24e00
>[   26.883221] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff8800c8f4e0c0 state to ffff880413e24e00
>[   26.883222] [drm:drm_atomic_check_only] checking ffff880413e24e00
>[   26.883223] [drm:drm_atomic_commit] commiting ffff880413e24e00
>[   26.883224] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413e24e00
>[   26.883225] [drm:drm_atomic_state_free] Freeing atomic state ffff880413e24e00
>[   26.883226] [drm:drm_atomic_state_init] Allocated atomic state ffff880413e24e00
>[   26.883227] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800c8f4e240 state to ffff880413e24e00
>[   26.883228] [drm:drm_atomic_check_only] checking ffff880413e24e00
>[   26.883228] [drm:drm_atomic_commit] commiting ffff880413e24e00
>[   26.883229] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413e24e00
>[   26.883230] [drm:drm_atomic_state_free] Freeing atomic state ffff880413e24e00
>[   26.883231] [drm:drm_atomic_state_init] Allocated atomic state ffff880413e24e00
>[   26.883232] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff8800c8f4e180 state to ffff880413e24e00
>[   26.883233] [drm:drm_atomic_check_only] checking ffff880413e24e00
>[   26.883234] [drm:drm_atomic_commit] commiting ffff880413e24e00
>[   26.883235] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413e24e00
>[   26.883236] [drm:drm_atomic_state_free] Freeing atomic state ffff880413e24e00
>[   26.883237] [drm:drm_atomic_state_init] Allocated atomic state ffff880413e24e00
>[   26.883238] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff8800c8f4e6c0 state to ffff880413e24e00
>[   26.883239] [drm:drm_atomic_check_only] checking ffff880413e24e00
>[   26.883239] [drm:drm_atomic_commit] commiting ffff880413e24e00
>[   26.883240] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413e24e00
>[   26.883241] [drm:drm_atomic_state_free] Freeing atomic state ffff880413e24e00
>[   26.883242] [drm:drm_atomic_state_init] Allocated atomic state ffff880413e24e00
>[   26.883243] [drm:drm_atomic_get_plane_state] Added [PLANE:30] ffff8800c8f4e600 state to ffff880413e24e00
>[   26.883244] [drm:drm_atomic_check_only] checking ffff880413e24e00
>[   26.883245] [drm:drm_atomic_commit] commiting ffff880413e24e00
>[   26.883246] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413e24e00
>[   26.883247] [drm:drm_atomic_state_free] Freeing atomic state ffff880413e24e00
>[   26.883248] [drm:drm_atomic_state_init] Allocated atomic state ffff880413e24e00
>[   26.883249] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88041b282800 state to ffff880413e24e00
>[   26.883250] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800c8f4e3c0 state to ffff880413e24e00
>[   26.883252] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:3200x1800] for CRTC state ffff88041b282800
>[   26.883253] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800c8f4e3c0 to [CRTC:21]
>[   26.883254] [drm:drm_atomic_set_fb_for_plane] Set [FB:53] for plane state ffff8800c8f4e3c0
>[   26.883256] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:34] ffff88041b1e4820 state to ffff880413e24e00
>[   26.883257] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff880413e24e00
>[   26.883259] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88041b1e4820 to [NOCRTC]
>[   26.883260] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88041b1e4820 to [CRTC:21]
>[   26.883261] [drm:drm_atomic_check_only] checking ffff880413e24e00
>[   26.883263] [drm:update_connector_routing] Updating routing for [CONNECTOR:34:eDP-1]
>[   26.883264] [drm:update_connector_routing] [CONNECTOR:34:eDP-1] keeps [ENCODER:33:TMDS-33], now on [CRTC:21]
>[   26.883266] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 53
>[   26.883267] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 0, on 0, ms 0
>[   26.883267] [drm:drm_atomic_commit] commiting ffff880413e24e00
>[   26.883273] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413e24e00
>[   26.883275] [drm:drm_atomic_state_free] Freeing atomic state ffff880413e24e00
>[   26.883277] [drm:drm_atomic_state_init] Allocated atomic state ffff880413e24e00
>[   26.883278] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88041b281000 state to ffff880413e24e00
>[   26.883279] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800c8f4ed80 state to ffff880413e24e00
>[   26.883280] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88041b281000
>[   26.883280] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800c8f4ed80 to [NOCRTC]
>[   26.883281] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800c8f4ed80
>[   26.883282] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:25] to ffff880413e24e00
>[   26.883283] [drm:drm_atomic_check_only] checking ffff880413e24e00
>[   26.883284] [drm:drm_atomic_commit] commiting ffff880413e24e00
>[   26.883286] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413e24e00
>[   26.883287] [drm:drm_atomic_state_free] Freeing atomic state ffff880413e24e00
>[   26.883288] [drm:drm_atomic_state_init] Allocated atomic state ffff880413e24e00
>[   26.883289] [drm:drm_atomic_get_crtc_state] Added [CRTC:29] ffff88041b283000 state to ffff880413e24e00
>[   26.883290] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff8800c8f4ea80 state to ffff880413e24e00
>[   26.883291] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff88041b283000
>[   26.883292] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800c8f4ea80 to [NOCRTC]
>[   26.883293] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800c8f4ea80
>[   26.883294] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:29] to ffff880413e24e00
>[   26.883294] [drm:drm_atomic_check_only] checking ffff880413e24e00
>[   26.883295] [drm:drm_atomic_commit] commiting ffff880413e24e00
>[   26.883297] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413e24e00
>[   26.883298] [drm:drm_atomic_state_free] Freeing atomic state ffff880413e24e00
>[   26.909531] [drm:i915_gem_open] 
>[   26.909544] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[7]
>[   26.909816] [drm:i915_gem_open] 
>[   26.909825] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[7]
>[   26.909827] [drm:drm_mode_getresources] [CRTC:21]
>[   26.909827] [drm:drm_mode_getresources] [CRTC:25]
>[   26.909828] [drm:drm_mode_getresources] [CRTC:29]
>[   26.909829] [drm:drm_mode_getresources] [ENCODER:32:DAC-32]
>[   26.909830] [drm:drm_mode_getresources] [ENCODER:33:TMDS-33]
>[   26.909831] [drm:drm_mode_getresources] [ENCODER:41:TMDS-41]
>[   26.909832] [drm:drm_mode_getresources] [ENCODER:44:TMDS-44]
>[   26.909832] [drm:drm_mode_getresources] [ENCODER:46:DP MST-46]
>[   26.909833] [drm:drm_mode_getresources] [ENCODER:47:DP MST-47]
>[   26.909834] [drm:drm_mode_getresources] [ENCODER:48:DP MST-48]
>[   26.909835] [drm:drm_mode_getresources] [CONNECTOR:34:eDP-1]
>[   26.909836] [drm:drm_mode_getresources] [CONNECTOR:31:VGA-1]
>[   26.909836] [drm:drm_mode_getresources] [CONNECTOR:42:HDMI-A-1]
>[   26.909837] [drm:drm_mode_getresources] [CONNECTOR:45:DP-1]
>[   26.909838] [drm:drm_mode_getresources] [CONNECTOR:49:HDMI-A-2]
>[   26.909839] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[7]
>[   26.910028] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[7]
>[   26.910035] [drm:drm_mode_addfb2] [FB:51]
>[   26.910123] [drm:internal_framebuffer_create] could not create framebuffer
>[   26.910127] [drm:internal_framebuffer_create] could not create framebuffer
>[   26.910155] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[7]
>[   26.910157] [drm:drm_mode_getresources] [CRTC:21]
>[   26.910158] [drm:drm_mode_getresources] [CRTC:25]
>[   26.910159] [drm:drm_mode_getresources] [CRTC:29]
>[   26.910160] [drm:drm_mode_getresources] [ENCODER:32:DAC-32]
>[   26.910160] [drm:drm_mode_getresources] [ENCODER:33:TMDS-33]
>[   26.910161] [drm:drm_mode_getresources] [ENCODER:41:TMDS-41]
>[   26.910162] [drm:drm_mode_getresources] [ENCODER:44:TMDS-44]
>[   26.910163] [drm:drm_mode_getresources] [ENCODER:46:DP MST-46]
>[   26.910164] [drm:drm_mode_getresources] [ENCODER:47:DP MST-47]
>[   26.910164] [drm:drm_mode_getresources] [ENCODER:48:DP MST-48]
>[   26.910165] [drm:drm_mode_getresources] [CONNECTOR:34:eDP-1]
>[   26.910166] [drm:drm_mode_getresources] [CONNECTOR:31:VGA-1]
>[   26.910167] [drm:drm_mode_getresources] [CONNECTOR:42:HDMI-A-1]
>[   26.910167] [drm:drm_mode_getresources] [CONNECTOR:45:DP-1]
>[   26.910168] [drm:drm_mode_getresources] [CONNECTOR:49:HDMI-A-2]
>[   26.910169] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[7]
>[   26.910228] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   26.910236] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   26.921890] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[   26.921901] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[   26.921937] [drm:drm_mode_getconnector] [CONNECTOR:42:?]
>[   26.921941] [drm:drm_mode_getconnector] [CONNECTOR:42:?]
>[   26.921979] [drm:drm_mode_getconnector] [CONNECTOR:45:?]
>[   26.921982] [drm:drm_mode_getconnector] [CONNECTOR:45:?]
>[   26.922015] [drm:drm_mode_getconnector] [CONNECTOR:49:?]
>[   26.922019] [drm:drm_mode_getconnector] [CONNECTOR:49:?]
>[   26.955085] [drm:drm_mode_addfb2] [FB:51]
>[   27.167208] [drm:drm_mode_setcrtc] [CRTC:21]
>[   27.167213] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1]
>[   27.167216] [drm:drm_atomic_state_init] Allocated atomic state ffff880413aa7800
>[   27.167218] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff88041b0a6800 state to ffff880413aa7800
>[   27.167220] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8804190950c0 state to ffff880413aa7800
>[   27.167222] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:3200x1800] for CRTC state ffff88041b0a6800
>[   27.167223] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804190950c0 to [CRTC:21]
>[   27.167224] [drm:drm_atomic_set_fb_for_plane] Set [FB:51] for plane state ffff8804190950c0
>[   27.167226] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:34] ffff880413ae70e0 state to ffff880413aa7800
>[   27.167227] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff880413aa7800
>[   27.167228] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880413ae70e0 to [NOCRTC]
>[   27.167229] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880413ae70e0 to [CRTC:21]
>[   27.167230] [drm:drm_atomic_check_only] checking ffff880413aa7800
>[   27.167232] [drm:update_connector_routing] Updating routing for [CONNECTOR:34:eDP-1]
>[   27.167234] [drm:update_connector_routing] [CONNECTOR:34:eDP-1] keeps [ENCODER:33:TMDS-33], now on [CRTC:21]
>[   27.167237] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 51
>[   27.167238] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 1, off 0, on 0, ms 0
>[   27.167240] [drm:drm_atomic_commit] commiting ffff880413aa7800
>[   27.167261] [drm:intel_fbc_alloc_cfb] reserved 23040000 bytes of contiguous stolen space for FBC
>[   27.167262] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   27.172569] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413aa7800
>[   27.172573] [drm:drm_atomic_state_free] Freeing atomic state ffff880413aa7800
>[   27.215466] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   27.314646] [drm:i915_gem_open] 
>[   27.323662] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   27.324345] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   28.701616] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   28.730510] [drm:drm_mode_addfb2] [FB:52]
>[   28.780399] [drm:ilk_fbc_disable] disabled FBC
>[   28.785744] [drm:drm_mode_addfb2] [FB:54]
>[   28.808050] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   28.824725] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   28.841424] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   28.858113] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   28.874802] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   28.891490] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   28.908179] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   28.924473] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   28.924477] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[   28.924478] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[   28.924484] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   28.924491] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[   28.924839] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   28.924968] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   28.924971] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[   28.924973] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   28.924977] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   28.925114] [drm:drm_mode_getconnector] [CONNECTOR:45:?]
>[   28.925115] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:45:DP-1]
>[   28.925116] [drm:intel_dp_detect] [CONNECTOR:45:DP-1]
>[   28.925119] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:45:DP-1] disconnected
>[   28.925121] [drm:drm_mode_getconnector] [CONNECTOR:42:?]
>[   28.925123] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:42:HDMI-A-1]
>[   28.925124] [drm:intel_hdmi_detect] [CONNECTOR:42:HDMI-A-1]
>[   28.925321] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   28.925323] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[   28.925551] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   28.925555] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   28.925557] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:42:HDMI-A-1] disconnected
>[   28.925571] [drm:drm_mode_getconnector] [CONNECTOR:49:?]
>[   28.925572] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:HDMI-A-2]
>[   28.925573] [drm:intel_hdmi_detect] [CONNECTOR:49:HDMI-A-2]
>[   28.925806] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   28.925809] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   28.926035] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   28.926039] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   28.926042] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:HDMI-A-2] disconnected
>[   28.926055] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[   28.926057] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:VGA-1]
>[   28.926059] [drm:intel_crt_detect] [CONNECTOR:31:VGA-1] force=1
>[   28.926062] [drm:intel_ironlake_crt_detect_hotplug] ironlake hotplug adpa=0xf40000, result 0
>[   28.926063] [drm:intel_crt_detect] CRT not detected via hotplug
>[   28.937194] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   28.937195] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found]
>[   28.937196] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:VGA-1] disconnected
>[   28.941588] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   28.958292] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   28.974983] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   28.991675] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   29.008358] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   29.025048] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   29.041741] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   29.058436] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   29.075124] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   29.124100] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   29.444403] [drm:ilk_fbc_disable] disabled FBC
>[   29.507817] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   29.968265] [drm:ilk_fbc_disable] disabled FBC
>[   30.025003] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   30.495436] [drm:ilk_fbc_disable] disabled FBC
>[   30.558872] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   31.017887] [drm:ilk_fbc_disable] disabled FBC
>[   31.076055] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   31.546511] [drm:ilk_fbc_disable] disabled FBC
>[   31.609922] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   31.926887] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[   31.926895] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[   32.050332] [drm:ilk_fbc_disable] disabled FBC
>[   32.110424] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   32.547574] [drm:ilk_fbc_disable] disabled FBC
>[   32.610924] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   33.048299] [drm:ilk_fbc_disable] disabled FBC
>[   33.111424] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   33.340820] [drm:ilk_fbc_disable] disabled FBC
>[   33.395044] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   33.548066] [drm:ilk_fbc_disable] disabled FBC
>[   33.611925] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   33.731701] [drm:ilk_fbc_disable] disabled FBC
>[   33.795442] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   34.031455] [drm:ilk_fbc_disable] disabled FBC
>[   34.064969] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   34.112430] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   34.113719] [drm:ilk_fbc_disable] disabled FBC
>[   34.179160] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   34.324469] [drm:ilk_fbc_disable] disabled FBC
>[   34.379354] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   34.549346] [drm:ilk_fbc_disable] disabled FBC
>[   34.612927] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   34.633931] [drm:ilk_fbc_disable] disabled FBC
>[   34.696347] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   35.014020] [drm:ilk_fbc_disable] disabled FBC
>[   35.066267] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   35.113431] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   35.475597] [drm:ilk_fbc_disable] disabled FBC
>[   35.530512] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   35.550822] [drm:ilk_fbc_disable] disabled FBC
>[   35.613884] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   35.619916] [drm:ilk_fbc_disable] disabled FBC
>[   35.680663] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   35.775046] [drm:ilk_fbc_disable] disabled FBC
>[   35.830767] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   35.831095] [drm:ilk_fbc_disable] disabled FBC
>[   35.897548] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   36.050469] [drm:ilk_fbc_disable] disabled FBC
>[   36.114431] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   36.127090] [drm:ilk_fbc_disable] disabled FBC
>[   36.167704] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   36.184361] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   36.191554] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   36.201023] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   36.247871] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   38.094486] [drm:drm_atomic_state_init] Allocated atomic state ffff88041302e800
>[   38.094491] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880418c93000 state to ffff88041302e800
>[   38.094493] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a69400 state to ffff88041302e800
>[   38.094494] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880418c93000 to [CRTC:21]
>[   38.094495] [drm:drm_atomic_set_fb_for_plane] Set [FB:50] for plane state ffff880418c93000
>[   38.094496] [drm:drm_atomic_check_only] checking ffff88041302e800
>[   38.094500] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 50
>[   38.094501] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[   38.094502] [drm:drm_atomic_commit] commiting ffff88041302e800
>[   38.094527] [drm:ilk_fbc_disable] disabled FBC
>[   38.094529] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041302e800
>[   38.094531] [drm:drm_atomic_state_free] Freeing atomic state ffff88041302e800
>[   38.127997] [drm:i915_gem_open] 
>[   38.135787] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   38.136525] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   38.146401] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   38.243308] [drm:drm_atomic_state_init] Allocated atomic state ffff8800c8e4f400
>[   38.243312] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413278a80 state to ffff8800c8e4f400
>[   38.243315] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413bbc000 state to ffff8800c8e4f400
>[   38.243316] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413278a80 to [NOCRTC]
>[   38.243317] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880413278a80
>[   38.243318] [drm:drm_atomic_check_only] checking ffff8800c8e4f400
>[   38.243322] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb -1
>[   38.243323] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 0, off 1, on 0, ms 0
>[   38.243324] [drm:drm_atomic_commit] commiting ffff8800c8e4f400
>[   38.243341] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8800c8e4f400
>[   38.243343] [drm:drm_atomic_state_free] Freeing atomic state ffff8800c8e4f400
>[   38.251474] [drm:ilk_fbc_disable] disabled FBC
>[   39.192721] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   39.234930] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.255093] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.271747] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.288429] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.305116] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.321936] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.338645] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.355186] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.371881] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.388566] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.405291] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.421974] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.438672] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.455313] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.472023] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.488723] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.505400] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.522093] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.538785] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.555456] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.572132] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.588840] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.605537] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.622255] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.638895] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.655630] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.672317] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.688991] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.705632] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.722343] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.739049] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.755713] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.772393] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.789077] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.805804] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.822469] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.839181] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.855858] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.872540] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.889228] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.905928] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.922602] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.939302] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.955979] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.972685] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   39.989408] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   40.006043] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   40.022740] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   40.039437] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   40.056126] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   40.072806] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   40.080337] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   40.089512] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   40.106185] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   40.122873] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   40.139557] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   40.156255] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   40.172931] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   40.189630] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   40.206308] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   40.223009] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   40.239685] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   40.256351] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   40.311919] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   41.954480] [drm:ilk_fbc_disable] disabled FBC
>[   41.987011] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   42.002996] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   42.018399] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   42.035143] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   42.050877] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   42.066428] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   42.083013] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   42.098843] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   42.114362] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   42.131110] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   42.147705] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   42.162414] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   42.180079] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   42.195023] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   42.211312] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   42.226978] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   42.242444] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   42.356443] [drm:i915_gem_open] 
>[   42.362832] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   42.363573] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   42.410668] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   42.548023] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   42.577092] [drm:ilk_fbc_disable] disabled FBC
>[   42.594224] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   42.597968] [drm:i915_gem_open] 
>[   42.604426] [drm:drm_atomic_state_init] Allocated atomic state ffff88040adb9600
>[   42.604434] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880402ec7b40 state to ffff88040adb9600
>[   42.604438] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8804160d7800 state to ffff88040adb9600
>[   42.604440] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880402ec7b40 to [CRTC:21]
>[   42.604442] [drm:drm_atomic_set_fb_for_plane] Set [FB:50] for plane state ffff880402ec7b40
>[   42.604444] [drm:drm_atomic_check_only] checking ffff88040adb9600
>[   42.604452] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 50
>[   42.604454] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[   42.604456] [drm:drm_atomic_commit] commiting ffff88040adb9600
>[   42.604479] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040adb9600
>[   42.604482] [drm:drm_atomic_state_free] Freeing atomic state ffff88040adb9600
>[   42.604653] [drm:drm_atomic_state_init] Allocated atomic state ffff88040adba000
>[   42.604657] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880402ec7a80 state to ffff88040adba000
>[   42.604660] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8804160d6c00 state to ffff88040adba000
>[   42.604661] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880402ec7a80 to [NOCRTC]
>[   42.604663] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880402ec7a80
>[   42.604665] [drm:drm_atomic_check_only] checking ffff88040adba000
>[   42.604669] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb -1
>[   42.604671] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 0, off 1, on 0, ms 0
>[   42.604673] [drm:drm_atomic_commit] commiting ffff88040adba000
>[   42.604684] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040adba000
>[   42.604687] [drm:drm_atomic_state_free] Freeing atomic state ffff88040adba000
>[   42.606068] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   42.611709] [drm:drm_mode_addfb2] [FB:50]
>[   42.654255] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   42.722963] [drm:ilk_fbc_disable] disabled FBC
>[   42.759589] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   42.776295] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   42.824414] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   42.841157] [drm:i915_gem_open] 
>[   42.848372] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   42.849066] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   42.919571] [drm:ilk_fbc_disable] disabled FBC
>[   42.993297] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   43.902068] [drm:ilk_fbc_disable] disabled FBC
>[   43.927821] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   43.944503] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   43.982969] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   43.982975] [drm:drm_mode_addfb2] [FB:57]
>[   43.994559] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   44.011256] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   44.028006] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   44.044595] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   44.061281] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   44.077967] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   44.094686] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   44.128062] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   44.144721] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   44.150517] [drm:i915_gem_open] 
>[   44.161409] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   44.194786] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   44.242518] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   44.537634] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   44.537638] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[   44.537639] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[   44.537646] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   44.537654] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[   44.538122] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   44.538125] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[   44.538127] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   44.538130] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   44.538213] [drm:drm_mode_getconnector] [CONNECTOR:45:?]
>[   44.538214] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:45:DP-1]
>[   44.538215] [drm:intel_dp_detect] [CONNECTOR:45:DP-1]
>[   44.538218] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:45:DP-1] disconnected
>[   44.538221] [drm:drm_mode_getconnector] [CONNECTOR:42:?]
>[   44.538222] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:42:HDMI-A-1]
>[   44.538223] [drm:intel_hdmi_detect] [CONNECTOR:42:HDMI-A-1]
>[   44.538378] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   44.538379] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[   44.538535] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   44.538536] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   44.538537] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:42:HDMI-A-1] disconnected
>[   44.538540] [drm:drm_mode_getconnector] [CONNECTOR:49:?]
>[   44.538541] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:HDMI-A-2]
>[   44.538541] [drm:intel_hdmi_detect] [CONNECTOR:49:HDMI-A-2]
>[   44.538721] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   44.538722] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[   44.538894] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[   44.538896] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   44.538897] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:HDMI-A-2] disconnected
>[   44.538902] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[   44.538903] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:VGA-1]
>[   44.538905] [drm:intel_crt_detect] [CONNECTOR:31:VGA-1] force=1
>[   44.538908] [drm:intel_ironlake_crt_detect_hotplug] ironlake hotplug adpa=0xf40000, result 0
>[   44.538908] [drm:intel_crt_detect] CRT not detected via hotplug
>[   44.549512] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga
>[   44.549514] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found]
>[   44.549515] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:VGA-1] disconnected
>[   44.574363] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   44.646246] [drm:ilk_fbc_disable] disabled FBC
>[   44.649771] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   44.671432] [drm:drm_mode_addfb2] [FB:56]
>[   44.701552] [drm:drm_mode_addfb2] [FB:59]
>[   44.728848] [drm:set_no_fbc_reason] Disabling FBC: framebuffer not tiled or fenced
>[   44.745541] [drm:intel_fbc_alloc_cfb] reserved 23040000 bytes of contiguous stolen space for FBC
>[   44.762226] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   44.778910] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   44.795596] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   44.812285] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   44.859813] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   45.567114] [drm:ilk_fbc_disable] disabled FBC
>[   45.595973] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   45.613915] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   45.630730] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   45.648668] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   45.697312] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   45.725492] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   47.451185] [drm:ilk_fbc_disable] disabled FBC
>[   47.509143] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   47.539174] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[   47.539182] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[   47.636824] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   47.637427] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f93e1e00
>[   47.637433] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e49aa240 state to ffff8803f93e1e00
>[   47.637437] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413bb8c00 state to ffff8803f93e1e00
>[   47.637438] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e49aa240 to [CRTC:21]
>[   47.637440] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e49aa240
>[   47.637442] [drm:drm_atomic_check_only] checking ffff8803f93e1e00
>[   47.637448] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   47.637459] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[   47.637461] [drm:drm_atomic_commit] commiting ffff8803f93e1e00
>[   47.637482] [drm:ilk_fbc_disable] disabled FBC
>[   47.637487] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f93e1e00
>[   47.637490] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f93e1e00
>[   47.666030] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   47.682686] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   47.699388] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   47.716057] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   47.732775] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   47.749456] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   47.766140] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   47.782833] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   47.816219] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   47.832893] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   47.849586] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   47.866266] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   47.882970] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   47.899647] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   47.916335] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   47.933028] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   47.949716] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   47.966409] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   47.983092] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   47.999779] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.016472] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.049857] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.066545] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.083244] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.099925] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.116592] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.133307] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.149960] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.166675] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.183409] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.200102] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.216742] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.233451] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.250161] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.266837] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.300187] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.316881] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.333569] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.350263] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.366944] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.383631] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.400349] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.417016] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.433659] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.450351] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.467038] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.483725] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.500414] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.517103] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.550484] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.567171] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.583880] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.600572] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.617256] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.633925] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.650648] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.667333] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.684037] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.687384] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fc4be800
>[   48.687388] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8804010b2180 state to ffff8803fc4be800
>[   48.687390] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a6bc00 state to ffff8803fc4be800
>[   48.687391] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804010b2180 to [CRTC:21]
>[   48.687392] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8804010b2180
>[   48.687394] [drm:drm_atomic_check_only] checking ffff8803fc4be800
>[   48.687398] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   48.687400] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   48.687401] [drm:drm_atomic_commit] commiting ffff8803fc4be800
>[   48.687407] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.687410] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fc4be800
>[   48.687412] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fc4be800
>[   48.689094] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fc4bd600
>[   48.689097] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8804010b2000 state to ffff8803fc4bd600
>[   48.689099] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a6a000 state to ffff8803fc4bd600
>[   48.689100] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804010b2000 to [CRTC:21]
>[   48.689101] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8804010b2000
>[   48.689102] [drm:drm_atomic_check_only] checking ffff8803fc4bd600
>[   48.689104] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   48.689106] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   48.689107] [drm:drm_atomic_commit] commiting ffff8803fc4bd600
>[   48.689112] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.689115] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fc4bd600
>[   48.689116] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fc4bd600
>[   48.697450] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2800
>[   48.697454] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a746c0 state to ffff8803f8bd2800
>[   48.697457] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd2800
>[   48.697458] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a746c0 to [CRTC:21]
>[   48.697459] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a746c0
>[   48.697460] [drm:drm_atomic_check_only] checking ffff8803f8bd2800
>[   48.697464] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   48.697465] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   48.697467] [drm:drm_atomic_commit] commiting ffff8803f8bd2800
>[   48.697477] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.697481] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2800
>[   48.697483] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2800
>[   48.700713] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.707420] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3600
>[   48.707424] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a749c0 state to ffff8803f8bd3600
>[   48.707426] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd3600
>[   48.707427] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a749c0 to [CRTC:21]
>[   48.707428] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a749c0
>[   48.707429] [drm:drm_atomic_check_only] checking ffff8803f8bd3600
>[   48.707433] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   48.707434] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   48.707436] [drm:drm_atomic_commit] commiting ffff8803f8bd3600
>[   48.707443] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.707446] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3600
>[   48.707447] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3600
>[   48.717348] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.717421] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3e00
>[   48.717424] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a746c0 state to ffff8803f8bd3e00
>[   48.717434] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd3e00
>[   48.717435] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a746c0 to [CRTC:21]
>[   48.717436] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a746c0
>[   48.717437] [drm:drm_atomic_check_only] checking ffff8803f8bd3e00
>[   48.717440] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   48.717441] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   48.717443] [drm:drm_atomic_commit] commiting ffff8803f8bd3e00
>[   48.717451] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.717454] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3e00
>[   48.717455] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3e00
>[   48.727472] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3c00
>[   48.727475] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a749c0 state to ffff8803f8bd3c00
>[   48.727476] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd3c00
>[   48.727477] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a749c0 to [CRTC:21]
>[   48.727478] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a749c0
>[   48.727479] [drm:drm_atomic_check_only] checking ffff8803f8bd3c00
>[   48.727482] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   48.727483] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   48.727484] [drm:drm_atomic_commit] commiting ffff8803f8bd3c00
>[   48.727492] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.727495] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3c00
>[   48.727496] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3c00
>[   48.737501] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3a00
>[   48.737503] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a746c0 state to ffff8803f8bd3a00
>[   48.737505] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd3a00
>[   48.737506] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a746c0 to [CRTC:21]
>[   48.737507] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a746c0
>[   48.737508] [drm:drm_atomic_check_only] checking ffff8803f8bd3a00
>[   48.737510] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   48.737511] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   48.737512] [drm:drm_atomic_commit] commiting ffff8803f8bd3a00
>[   48.737520] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.737523] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3a00
>[   48.737524] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3a00
>[   48.747534] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3c00
>[   48.747537] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a749c0 state to ffff8803f8bd3c00
>[   48.747539] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd3c00
>[   48.747540] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a749c0 to [CRTC:21]
>[   48.747541] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a749c0
>[   48.747542] [drm:drm_atomic_check_only] checking ffff8803f8bd3c00
>[   48.747544] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   48.747545] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   48.747546] [drm:drm_atomic_commit] commiting ffff8803f8bd3c00
>[   48.747554] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.747557] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3c00
>[   48.747558] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3c00
>[   48.757587] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3e00
>[   48.757590] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a746c0 state to ffff8803f8bd3e00
>[   48.757592] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd3e00
>[   48.757593] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a746c0 to [CRTC:21]
>[   48.757594] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a746c0
>[   48.757595] [drm:drm_atomic_check_only] checking ffff8803f8bd3e00
>[   48.757597] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   48.757598] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   48.757599] [drm:drm_atomic_commit] commiting ffff8803f8bd3e00
>[   48.757607] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.757610] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3e00
>[   48.757611] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3e00
>[   48.767631] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3800
>[   48.767634] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a749c0 state to ffff8803f8bd3800
>[   48.767635] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd3800
>[   48.767636] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a749c0 to [CRTC:21]
>[   48.767637] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a749c0
>[   48.767638] [drm:drm_atomic_check_only] checking ffff8803f8bd3800
>[   48.767641] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   48.767642] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   48.767643] [drm:drm_atomic_commit] commiting ffff8803f8bd3800
>[   48.767651] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.767653] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3800
>[   48.767655] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3800
>[   48.777691] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3600
>[   48.777693] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a746c0 state to ffff8803f8bd3600
>[   48.777695] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd3600
>[   48.777696] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a746c0 to [CRTC:21]
>[   48.777697] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a746c0
>[   48.777698] [drm:drm_atomic_check_only] checking ffff8803f8bd3600
>[   48.777700] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   48.777701] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   48.777702] [drm:drm_atomic_commit] commiting ffff8803f8bd3600
>[   48.777710] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.777713] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3600
>[   48.777714] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3600
>[   48.787735] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3400
>[   48.787738] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a749c0 state to ffff8803f8bd3400
>[   48.787739] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd3400
>[   48.787740] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a749c0 to [CRTC:21]
>[   48.787741] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a749c0
>[   48.787742] [drm:drm_atomic_check_only] checking ffff8803f8bd3400
>[   48.787745] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   48.787746] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   48.787747] [drm:drm_atomic_commit] commiting ffff8803f8bd3400
>[   48.787755] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.787758] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3400
>[   48.787759] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3400
>[   48.798807] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2e00
>[   48.798810] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a746c0 state to ffff8803f8bd2e00
>[   48.798812] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd2e00
>[   48.798813] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a746c0 to [CRTC:21]
>[   48.798814] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a746c0
>[   48.798815] [drm:drm_atomic_check_only] checking ffff8803f8bd2e00
>[   48.798817] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   48.798818] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   48.798819] [drm:drm_atomic_commit] commiting ffff8803f8bd2e00
>[   48.798827] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.798830] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2e00
>[   48.798831] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2e00
>[   48.808852] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2600
>[   48.808855] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a749c0 state to ffff8803f8bd2600
>[   48.808856] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd2600
>[   48.808857] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a749c0 to [CRTC:21]
>[   48.808858] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a749c0
>[   48.808859] [drm:drm_atomic_check_only] checking ffff8803f8bd2600
>[   48.808862] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   48.808863] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   48.808864] [drm:drm_atomic_commit] commiting ffff8803f8bd2600
>[   48.808872] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.808875] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2600
>[   48.808876] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2600
>[   48.818895] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3200
>[   48.818898] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a746c0 state to ffff8803f8bd3200
>[   48.818900] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd3200
>[   48.818901] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a746c0 to [CRTC:21]
>[   48.818902] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a746c0
>[   48.818903] [drm:drm_atomic_check_only] checking ffff8803f8bd3200
>[   48.818905] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   48.818906] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   48.818907] [drm:drm_atomic_commit] commiting ffff8803f8bd3200
>[   48.818915] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.818918] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3200
>[   48.818919] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3200
>[   48.828936] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3000
>[   48.828939] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a749c0 state to ffff8803f8bd3000
>[   48.828941] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd3000
>[   48.828942] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a749c0 to [CRTC:21]
>[   48.828943] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a749c0
>[   48.828944] [drm:drm_atomic_check_only] checking ffff8803f8bd3000
>[   48.828946] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   48.828947] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   48.828948] [drm:drm_atomic_commit] commiting ffff8803f8bd3000
>[   48.828956] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.828959] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3000
>[   48.828960] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3000
>[   48.838981] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2c00
>[   48.838983] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a746c0 state to ffff8803f8bd2c00
>[   48.838985] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd2c00
>[   48.838986] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a746c0 to [CRTC:21]
>[   48.838987] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a746c0
>[   48.838988] [drm:drm_atomic_check_only] checking ffff8803f8bd2c00
>[   48.838990] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   48.838991] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   48.838992] [drm:drm_atomic_commit] commiting ffff8803f8bd2c00
>[   48.839000] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.839003] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2c00
>[   48.839004] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2c00
>[   48.849019] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2a00
>[   48.849022] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a749c0 state to ffff8803f8bd2a00
>[   48.849023] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd2a00
>[   48.849024] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a749c0 to [CRTC:21]
>[   48.849025] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a749c0
>[   48.849026] [drm:drm_atomic_check_only] checking ffff8803f8bd2a00
>[   48.849029] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   48.849030] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   48.849031] [drm:drm_atomic_commit] commiting ffff8803f8bd2a00
>[   48.849039] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.849041] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2a00
>[   48.849043] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2a00
>[   48.859063] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2800
>[   48.859065] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a746c0 state to ffff8803f8bd2800
>[   48.859067] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd2800
>[   48.859068] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a746c0 to [CRTC:21]
>[   48.859069] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a746c0
>[   48.859070] [drm:drm_atomic_check_only] checking ffff8803f8bd2800
>[   48.859072] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   48.859074] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   48.859075] [drm:drm_atomic_commit] commiting ffff8803f8bd2800
>[   48.859082] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.859085] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2800
>[   48.859087] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2800
>[   48.869086] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2400
>[   48.869089] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a749c0 state to ffff8803f8bd2400
>[   48.869090] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd2400
>[   48.869091] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a749c0 to [CRTC:21]
>[   48.869092] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a749c0
>[   48.869093] [drm:drm_atomic_check_only] checking ffff8803f8bd2400
>[   48.869096] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   48.869097] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   48.869098] [drm:drm_atomic_commit] commiting ffff8803f8bd2400
>[   48.869106] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.869108] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2400
>[   48.869110] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2400
>[   48.879111] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1c00
>[   48.879114] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a746c0 state to ffff8803f8bd1c00
>[   48.879115] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd1c00
>[   48.879116] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a746c0 to [CRTC:21]
>[   48.879117] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a746c0
>[   48.879118] [drm:drm_atomic_check_only] checking ffff8803f8bd1c00
>[   48.879121] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   48.879122] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   48.879123] [drm:drm_atomic_commit] commiting ffff8803f8bd1c00
>[   48.879131] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   48.879134] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1c00
>[   48.879135] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1c00
>[   48.927209] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   49.113563] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2000
>[   49.113566] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74840 state to ffff8803f8bd2000
>[   49.113568] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd2000
>[   49.113569] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74840 to [CRTC:21]
>[   49.113570] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74840
>[   49.113571] [drm:drm_atomic_check_only] checking ffff8803f8bd2000
>[   49.113574] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.113575] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.113577] [drm:drm_atomic_commit] commiting ffff8803f8bd2000
>[   49.113588] [drm:ilk_fbc_disable] disabled FBC
>[   49.113591] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2000
>[   49.113592] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2000
>[   49.123588] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1400
>[   49.123591] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a746c0 state to ffff8803f8bd1400
>[   49.123592] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd1400
>[   49.123593] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a746c0 to [CRTC:21]
>[   49.123594] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a746c0
>[   49.123595] [drm:drm_atomic_check_only] checking ffff8803f8bd1400
>[   49.123598] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.123599] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.123600] [drm:drm_atomic_commit] commiting ffff8803f8bd1400
>[   49.123608] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.123611] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1400
>[   49.123612] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1400
>[   49.133616] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1e00
>[   49.133619] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74840 state to ffff8803f8bd1e00
>[   49.133620] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd1e00
>[   49.133621] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74840 to [CRTC:21]
>[   49.133622] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74840
>[   49.133623] [drm:drm_atomic_check_only] checking ffff8803f8bd1e00
>[   49.133625] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.133627] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.133628] [drm:drm_atomic_commit] commiting ffff8803f8bd1e00
>[   49.133636] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.133639] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1e00
>[   49.133640] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1e00
>[   49.143670] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd0800
>[   49.143672] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a746c0 state to ffff8803f8bd0800
>[   49.143674] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd0800
>[   49.143675] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a746c0 to [CRTC:21]
>[   49.143676] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a746c0
>[   49.143676] [drm:drm_atomic_check_only] checking ffff8803f8bd0800
>[   49.143678] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.143680] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.143681] [drm:drm_atomic_commit] commiting ffff8803f8bd0800
>[   49.143687] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.143690] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd0800
>[   49.143691] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd0800
>[   49.153696] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1a00
>[   49.153698] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74840 state to ffff8803f8bd1a00
>[   49.153699] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd1a00
>[   49.153700] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74840 to [CRTC:21]
>[   49.153701] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74840
>[   49.153702] [drm:drm_atomic_check_only] checking ffff8803f8bd1a00
>[   49.153704] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.153705] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.153706] [drm:drm_atomic_commit] commiting ffff8803f8bd1a00
>[   49.153712] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.153714] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1a00
>[   49.153716] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1a00
>[   49.163732] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2200
>[   49.163735] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74600 state to ffff8803f8bd2200
>[   49.163737] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd2200
>[   49.163738] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74600 to [CRTC:21]
>[   49.163739] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74600
>[   49.163740] [drm:drm_atomic_check_only] checking ffff8803f8bd2200
>[   49.163742] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.163743] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.163744] [drm:drm_atomic_commit] commiting ffff8803f8bd2200
>[   49.163752] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.163755] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2200
>[   49.163756] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2200
>[   49.173765] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd0a00
>[   49.173767] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74840 state to ffff8803f8bd0a00
>[   49.173769] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd0a00
>[   49.173770] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74840 to [CRTC:21]
>[   49.173771] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74840
>[   49.173772] [drm:drm_atomic_check_only] checking ffff8803f8bd0a00
>[   49.173774] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.173775] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.173776] [drm:drm_atomic_commit] commiting ffff8803f8bd0a00
>[   49.173784] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.173787] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd0a00
>[   49.173788] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd0a00
>[   49.183795] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1800
>[   49.183798] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74600 state to ffff8803f8bd1800
>[   49.183799] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd1800
>[   49.183801] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74600 to [CRTC:21]
>[   49.183802] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74600
>[   49.183802] [drm:drm_atomic_check_only] checking ffff8803f8bd1800
>[   49.183805] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.183806] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.183807] [drm:drm_atomic_commit] commiting ffff8803f8bd1800
>[   49.183815] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.183818] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1800
>[   49.183819] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1800
>[   49.193819] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1600
>[   49.193821] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74840 state to ffff8803f8bd1600
>[   49.193823] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd1600
>[   49.193824] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74840 to [CRTC:21]
>[   49.193825] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74840
>[   49.193826] [drm:drm_atomic_check_only] checking ffff8803f8bd1600
>[   49.193828] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.193830] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.193831] [drm:drm_atomic_commit] commiting ffff8803f8bd1600
>[   49.193838] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.193841] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1600
>[   49.193843] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1600
>[   49.203848] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd0600
>[   49.203851] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74600 state to ffff8803f8bd0600
>[   49.203852] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd0600
>[   49.203853] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74600 to [CRTC:21]
>[   49.203854] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74600
>[   49.203855] [drm:drm_atomic_check_only] checking ffff8803f8bd0600
>[   49.203857] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.203859] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.203859] [drm:drm_atomic_commit] commiting ffff8803f8bd0600
>[   49.203867] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.203870] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd0600
>[   49.203871] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd0600
>[   49.203922] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd0a00
>[   49.203923] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74840 state to ffff8803f8bd0a00
>[   49.203925] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd0a00
>[   49.203926] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74840 to [CRTC:21]
>[   49.203927] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74840
>[   49.203927] [drm:drm_atomic_check_only] checking ffff8803f8bd0a00
>[   49.203929] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.203930] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.203931] [drm:drm_atomic_commit] commiting ffff8803f8bd0a00
>[   49.203937] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.203939] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd0a00
>[   49.203940] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd0a00
>[   49.204116] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd0800
>[   49.204118] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74600 state to ffff8803f8bd0800
>[   49.204119] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd0800
>[   49.204129] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74600 to [CRTC:21]
>[   49.204130] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74600
>[   49.204131] [drm:drm_atomic_check_only] checking ffff8803f8bd0800
>[   49.204133] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.204134] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.204135] [drm:drm_atomic_commit] commiting ffff8803f8bd0800
>[   49.204141] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.204143] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd0800
>[   49.204144] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd0800
>[   49.213886] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2600
>[   49.213889] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74840 state to ffff8803f8bd2600
>[   49.213891] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd2600
>[   49.213892] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74840 to [CRTC:21]
>[   49.213892] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74840
>[   49.213893] [drm:drm_atomic_check_only] checking ffff8803f8bd2600
>[   49.213896] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.213897] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.213898] [drm:drm_atomic_commit] commiting ffff8803f8bd2600
>[   49.213903] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.213906] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2600
>[   49.213907] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2600
>[   49.218296] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.236343] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.253984] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.271674] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.289337] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.307889] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.326053] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.343942] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.361629] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.379190] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.396980] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.414610] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.425583] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1400
>[   49.425586] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74000 state to ffff8803f8bd1400
>[   49.425588] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f8bd1400
>[   49.425589] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74000 to [CRTC:21]
>[   49.425590] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74000
>[   49.425591] [drm:drm_atomic_check_only] checking ffff8803f8bd1400
>[   49.425596] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.425597] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.425598] [drm:drm_atomic_commit] commiting ffff8803f8bd1400
>[   49.425605] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.425608] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1400
>[   49.425609] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1400
>[   49.432322] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.435592] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2e00
>[   49.435595] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74480 state to ffff8803f8bd2e00
>[   49.435597] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd2e00
>[   49.435598] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74480 to [CRTC:21]
>[   49.435599] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74480
>[   49.435600] [drm:drm_atomic_check_only] checking ffff8803f8bd2e00
>[   49.435604] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.435605] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.435606] [drm:drm_atomic_commit] commiting ffff8803f8bd2e00
>[   49.435612] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.435615] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2e00
>[   49.435617] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2e00
>[   49.445608] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3e00
>[   49.445610] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74000 state to ffff8803f8bd3e00
>[   49.445612] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f8bd3e00
>[   49.445613] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74000 to [CRTC:21]
>[   49.445614] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74000
>[   49.445615] [drm:drm_atomic_check_only] checking ffff8803f8bd3e00
>[   49.445617] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.445618] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.445619] [drm:drm_atomic_commit] commiting ffff8803f8bd3e00
>[   49.445624] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.445627] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3e00
>[   49.445628] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3e00
>[   49.450589] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.455639] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3600
>[   49.455642] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74780 state to ffff8803f8bd3600
>[   49.455644] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd3600
>[   49.455645] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74780 to [CRTC:21]
>[   49.455646] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74780
>[   49.455646] [drm:drm_atomic_check_only] checking ffff8803f8bd3600
>[   49.455649] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.455650] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.455651] [drm:drm_atomic_commit] commiting ffff8803f8bd3600
>[   49.455658] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3600
>[   49.455659] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3600
>[   49.465668] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2800
>[   49.465670] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74900 state to ffff8803f8bd2800
>[   49.465672] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f8bd2800
>[   49.465673] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74900 to [CRTC:21]
>[   49.465674] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74900
>[   49.465675] [drm:drm_atomic_check_only] checking ffff8803f8bd2800
>[   49.465677] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.465678] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.465679] [drm:drm_atomic_commit] commiting ffff8803f8bd2800
>[   49.465684] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.465687] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2800
>[   49.465688] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2800
>[   49.468293] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.475690] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1c00
>[   49.475693] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74c00 state to ffff8803f8bd1c00
>[   49.475695] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd1c00
>[   49.475696] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74c00 to [CRTC:21]
>[   49.475697] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74c00
>[   49.475698] [drm:drm_atomic_check_only] checking ffff8803f8bd1c00
>[   49.475700] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.475701] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.475702] [drm:drm_atomic_commit] commiting ffff8803f8bd1c00
>[   49.475709] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1c00
>[   49.475710] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1c00
>[   49.485707] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1e00
>[   49.485710] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74000 state to ffff8803f8bd1e00
>[   49.485712] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f8bd1e00
>[   49.485713] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74000 to [CRTC:21]
>[   49.485713] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74000
>[   49.485714] [drm:drm_atomic_check_only] checking ffff8803f8bd1e00
>[   49.485717] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.485718] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.485719] [drm:drm_atomic_commit] commiting ffff8803f8bd1e00
>[   49.485726] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.485729] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1e00
>[   49.485730] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1e00
>[   49.485947] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.495741] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd0c00
>[   49.495744] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74480 state to ffff8803f8bd0c00
>[   49.495745] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd0c00
>[   49.495746] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74480 to [CRTC:21]
>[   49.495747] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74480
>[   49.495748] [drm:drm_atomic_check_only] checking ffff8803f8bd0c00
>[   49.495751] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.495752] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.495753] [drm:drm_atomic_commit] commiting ffff8803f8bd0c00
>[   49.495759] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.495762] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd0c00
>[   49.495763] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd0c00
>[   49.504131] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.505765] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1400
>[   49.505768] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74900 state to ffff8803f8bd1400
>[   49.505769] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f8bd1400
>[   49.505770] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74900 to [CRTC:21]
>[   49.505771] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74900
>[   49.505772] [drm:drm_atomic_check_only] checking ffff8803f8bd1400
>[   49.505775] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.505776] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.505777] [drm:drm_atomic_commit] commiting ffff8803f8bd1400
>[   49.505785] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1400
>[   49.505786] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1400
>[   49.515785] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3e00
>[   49.515788] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74600 state to ffff8803f8bd3e00
>[   49.515789] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd3e00
>[   49.515790] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74600 to [CRTC:21]
>[   49.515791] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74600
>[   49.515792] [drm:drm_atomic_check_only] checking ffff8803f8bd3e00
>[   49.515794] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.515796] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.515797] [drm:drm_atomic_commit] commiting ffff8803f8bd3e00
>[   49.515802] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.515804] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3e00
>[   49.515806] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3e00
>[   49.521946] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.525819] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1400
>[   49.525821] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74840 state to ffff8803f8bd1400
>[   49.525823] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f8bd1400
>[   49.525824] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74840 to [CRTC:21]
>[   49.525825] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74840
>[   49.525826] [drm:drm_atomic_check_only] checking ffff8803f8bd1400
>[   49.525828] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.525829] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.525830] [drm:drm_atomic_commit] commiting ffff8803f8bd1400
>[   49.525836] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.525838] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1400
>[   49.525839] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1400
>[   49.535833] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1e00
>[   49.535835] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74600 state to ffff8803f8bd1e00
>[   49.535837] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd1e00
>[   49.535838] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74600 to [CRTC:21]
>[   49.535839] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74600
>[   49.535840] [drm:drm_atomic_check_only] checking ffff8803f8bd1e00
>[   49.535842] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.535843] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.535844] [drm:drm_atomic_commit] commiting ffff8803f8bd1e00
>[   49.535851] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.535854] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1e00
>[   49.535855] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1e00
>[   49.540543] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.545860] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd0c00
>[   49.545862] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74480 state to ffff8803f8bd0c00
>[   49.545864] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f8bd0c00
>[   49.545865] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74480 to [CRTC:21]
>[   49.545865] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74480
>[   49.545866] [drm:drm_atomic_check_only] checking ffff8803f8bd0c00
>[   49.545869] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.545870] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.545871] [drm:drm_atomic_commit] commiting ffff8803f8bd0c00
>[   49.545877] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd0c00
>[   49.545878] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd0c00
>[   49.555884] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd0000
>[   49.555887] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a749c0 state to ffff8803f8bd0000
>[   49.555888] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd0000
>[   49.555889] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a749c0 to [CRTC:21]
>[   49.555890] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a749c0
>[   49.555891] [drm:drm_atomic_check_only] checking ffff8803f8bd0000
>[   49.555893] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.555894] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.555895] [drm:drm_atomic_commit] commiting ffff8803f8bd0000
>[   49.555903] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.555906] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd0000
>[   49.555907] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd0000
>[   49.559012] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.565898] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3400
>[   49.565900] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74600 state to ffff8803f8bd3400
>[   49.565902] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f8bd3400
>[   49.565903] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74600 to [CRTC:21]
>[   49.565904] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74600
>[   49.565904] [drm:drm_atomic_check_only] checking ffff8803f8bd3400
>[   49.565907] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.565908] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.565909] [drm:drm_atomic_commit] commiting ffff8803f8bd3400
>[   49.565915] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3400
>[   49.565916] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3400
>[   49.575928] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3200
>[   49.575931] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74540 state to ffff8803f8bd3200
>[   49.575932] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd3200
>[   49.575934] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74540 to [CRTC:21]
>[   49.575934] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74540
>[   49.575935] [drm:drm_atomic_check_only] checking ffff8803f8bd3200
>[   49.575938] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.575939] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.575940] [drm:drm_atomic_commit] commiting ffff8803f8bd3200
>[   49.575945] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.575947] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3200
>[   49.575949] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3200
>[   49.577598] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.585954] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2000
>[   49.585957] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a746c0 state to ffff8803f8bd2000
>[   49.585958] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f8bd2000
>[   49.585959] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a746c0 to [CRTC:21]
>[   49.585960] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a746c0
>[   49.585961] [drm:drm_atomic_check_only] checking ffff8803f8bd2000
>[   49.585963] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.585964] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.585965] [drm:drm_atomic_commit] commiting ffff8803f8bd2000
>[   49.585973] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.585975] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2000
>[   49.585977] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2000
>[   49.595950] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd0200
>[   49.595952] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74540 state to ffff8803f8bd0200
>[   49.595954] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd0200
>[   49.595955] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74540 to [CRTC:21]
>[   49.595956] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74540
>[   49.595956] [drm:drm_atomic_check_only] checking ffff8803f8bd0200
>[   49.595959] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.595960] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.595961] [drm:drm_atomic_commit] commiting ffff8803f8bd0200
>[   49.595966] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.595969] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd0200
>[   49.595970] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd0200
>[   49.596175] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.605993] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2c00
>[   49.605996] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a743c0 state to ffff8803f8bd2c00
>[   49.605998] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f8bd2c00
>[   49.605999] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a743c0 to [CRTC:21]
>[   49.605999] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a743c0
>[   49.606000] [drm:drm_atomic_check_only] checking ffff8803f8bd2c00
>[   49.606003] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.606004] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.606005] [drm:drm_atomic_commit] commiting ffff8803f8bd2c00
>[   49.606010] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.606013] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2c00
>[   49.606014] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2c00
>[   49.613986] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.616037] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2400
>[   49.616039] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a749c0 state to ffff8803f8bd2400
>[   49.616041] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd2400
>[   49.616042] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a749c0 to [CRTC:21]
>[   49.616043] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a749c0
>[   49.616043] [drm:drm_atomic_check_only] checking ffff8803f8bd2400
>[   49.616046] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.616047] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.616048] [drm:drm_atomic_commit] commiting ffff8803f8bd2400
>[   49.616053] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2400
>[   49.616055] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2400
>[   49.631659] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.636138] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd0800
>[   49.636141] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74180 state to ffff8803f8bd0800
>[   49.636142] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f8bd0800
>[   49.636143] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74180 to [CRTC:21]
>[   49.636144] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74180
>[   49.636145] [drm:drm_atomic_check_only] checking ffff8803f8bd0800
>[   49.636148] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.636149] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.636150] [drm:drm_atomic_commit] commiting ffff8803f8bd0800
>[   49.636155] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.636158] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd0800
>[   49.636159] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd0800
>[   49.646171] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1000
>[   49.646174] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a749c0 state to ffff8803f8bd1000
>[   49.646176] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd1000
>[   49.646177] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a749c0 to [CRTC:21]
>[   49.646178] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a749c0
>[   49.646178] [drm:drm_atomic_check_only] checking ffff8803f8bd1000
>[   49.646181] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.646182] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.646183] [drm:drm_atomic_commit] commiting ffff8803f8bd1000
>[   49.646188] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.646190] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1000
>[   49.646192] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1000
>[   49.650266] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.668624] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.686372] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.697389] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2400
>[   49.697392] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74180 state to ffff8803f8bd2400
>[   49.697394] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f8bd2400
>[   49.697395] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74180 to [CRTC:21]
>[   49.697396] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74180
>[   49.697397] [drm:drm_atomic_check_only] checking ffff8803f8bd2400
>[   49.697400] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.697401] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.697402] [drm:drm_atomic_commit] commiting ffff8803f8bd2400
>[   49.697408] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.697411] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2400
>[   49.697412] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2400
>[   49.704528] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.722374] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.741051] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.759748] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.797716] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3400
>[   49.797719] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74240 state to ffff8803f8bd3400
>[   49.797720] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd3400
>[   49.797721] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74240 to [CRTC:21]
>[   49.797722] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74240
>[   49.797723] [drm:drm_atomic_check_only] checking ffff8803f8bd3400
>[   49.797726] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.797727] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.797729] [drm:drm_atomic_commit] commiting ffff8803f8bd3400
>[   49.797737] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.797740] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3400
>[   49.797741] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3400
>[   49.807740] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3600
>[   49.807743] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74180 state to ffff8803f8bd3600
>[   49.807744] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f8bd3600
>[   49.807745] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74180 to [CRTC:21]
>[   49.807746] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74180
>[   49.807747] [drm:drm_atomic_check_only] checking ffff8803f8bd3600
>[   49.807749] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.807750] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.807751] [drm:drm_atomic_commit] commiting ffff8803f8bd3600
>[   49.807759] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.807762] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3600
>[   49.807763] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3600
>[   49.817816] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2400
>[   49.817818] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74240 state to ffff8803f8bd2400
>[   49.817820] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd2400
>[   49.817821] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74240 to [CRTC:21]
>[   49.817822] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74240
>[   49.817822] [drm:drm_atomic_check_only] checking ffff8803f8bd2400
>[   49.817825] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.817826] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.817827] [drm:drm_atomic_commit] commiting ffff8803f8bd2400
>[   49.817834] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.817837] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2400
>[   49.817838] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2400
>[   49.827835] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3200
>[   49.827838] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74180 state to ffff8803f8bd3200
>[   49.827839] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f8bd3200
>[   49.827840] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74180 to [CRTC:21]
>[   49.827841] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74180
>[   49.827842] [drm:drm_atomic_check_only] checking ffff8803f8bd3200
>[   49.827844] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.827845] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.827846] [drm:drm_atomic_commit] commiting ffff8803f8bd3200
>[   49.827854] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.827856] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3200
>[   49.827857] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3200
>[   49.837867] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3800
>[   49.837869] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74240 state to ffff8803f8bd3800
>[   49.837871] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd3800
>[   49.837872] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74240 to [CRTC:21]
>[   49.837873] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74240
>[   49.837873] [drm:drm_atomic_check_only] checking ffff8803f8bd3800
>[   49.837876] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.837877] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.837878] [drm:drm_atomic_commit] commiting ffff8803f8bd3800
>[   49.837885] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.837888] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3800
>[   49.837889] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3800
>[   49.847895] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3000
>[   49.847897] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74180 state to ffff8803f8bd3000
>[   49.847899] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f8bd3000
>[   49.847900] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74180 to [CRTC:21]
>[   49.847901] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74180
>[   49.847901] [drm:drm_atomic_check_only] checking ffff8803f8bd3000
>[   49.847904] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.847905] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.847906] [drm:drm_atomic_commit] commiting ffff8803f8bd3000
>[   49.847913] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.847916] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3000
>[   49.847917] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3000
>[   49.857926] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2e00
>[   49.857928] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74240 state to ffff8803f8bd2e00
>[   49.857929] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd2e00
>[   49.857930] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74240 to [CRTC:21]
>[   49.857931] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74240
>[   49.857932] [drm:drm_atomic_check_only] checking ffff8803f8bd2e00
>[   49.857934] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.857936] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.857937] [drm:drm_atomic_commit] commiting ffff8803f8bd2e00
>[   49.857944] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.857947] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2e00
>[   49.857948] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2e00
>[   49.867946] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2a00
>[   49.867947] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74180 state to ffff8803f8bd2a00
>[   49.867949] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f8bd2a00
>[   49.867950] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74180 to [CRTC:21]
>[   49.867951] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74180
>[   49.867951] [drm:drm_atomic_check_only] checking ffff8803f8bd2a00
>[   49.867953] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.867954] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.867955] [drm:drm_atomic_commit] commiting ffff8803f8bd2a00
>[   49.867962] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.867964] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2a00
>[   49.867965] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2a00
>[   49.877995] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1000
>[   49.877997] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74240 state to ffff8803f8bd1000
>[   49.877999] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd1000
>[   49.878000] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74240 to [CRTC:21]
>[   49.878001] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74240
>[   49.878002] [drm:drm_atomic_check_only] checking ffff8803f8bd1000
>[   49.878005] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.878006] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.878007] [drm:drm_atomic_commit] commiting ffff8803f8bd1000
>[   49.878016] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.878019] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1000
>[   49.878021] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1000
>[   49.886429] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.888032] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3600
>[   49.888034] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74900 state to ffff8803f8bd3600
>[   49.888036] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f8bd3600
>[   49.888037] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74900 to [CRTC:21]
>[   49.888038] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74900
>[   49.888048] [drm:drm_atomic_check_only] checking ffff8803f8bd3600
>[   49.888052] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.888053] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.888054] [drm:drm_atomic_commit] commiting ffff8803f8bd3600
>[   49.888060] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3600
>[   49.888061] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3600
>[   49.898037] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3200
>[   49.898040] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74840 state to ffff8803f8bd3200
>[   49.898041] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd3200
>[   49.898043] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74840 to [CRTC:21]
>[   49.898044] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74840
>[   49.898044] [drm:drm_atomic_check_only] checking ffff8803f8bd3200
>[   49.898047] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.898048] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.898049] [drm:drm_atomic_commit] commiting ffff8803f8bd3200
>[   49.898054] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.898057] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3200
>[   49.898058] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3200
>[   49.904484] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.908076] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1000
>[   49.908079] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74480 state to ffff8803f8bd1000
>[   49.908080] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f8bd1000
>[   49.908081] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74480 to [CRTC:21]
>[   49.908082] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74480
>[   49.908083] [drm:drm_atomic_check_only] checking ffff8803f8bd1000
>[   49.908086] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.908087] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.908088] [drm:drm_atomic_commit] commiting ffff8803f8bd1000
>[   49.908093] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.908096] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1000
>[   49.908097] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1000
>[   49.918102] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd0e00
>[   49.918104] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74840 state to ffff8803f8bd0e00
>[   49.918106] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd0e00
>[   49.918107] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74840 to [CRTC:21]
>[   49.918108] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74840
>[   49.918109] [drm:drm_atomic_check_only] checking ffff8803f8bd0e00
>[   49.918111] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.918112] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.918113] [drm:drm_atomic_commit] commiting ffff8803f8bd0e00
>[   49.918118] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.918121] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd0e00
>[   49.918122] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd0e00
>[   49.922654] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.928123] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2000
>[   49.928126] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74240 state to ffff8803f8bd2000
>[   49.928128] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f8bd2000
>[   49.928129] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74240 to [CRTC:21]
>[   49.928130] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74240
>[   49.928131] [drm:drm_atomic_check_only] checking ffff8803f8bd2000
>[   49.928133] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.928134] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.928135] [drm:drm_atomic_commit] commiting ffff8803f8bd2000
>[   49.928142] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2000
>[   49.928143] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2000
>[   49.938147] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2c00
>[   49.938149] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74c00 state to ffff8803f8bd2c00
>[   49.938151] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd2c00
>[   49.938152] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74c00 to [CRTC:21]
>[   49.938153] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74c00
>[   49.938154] [drm:drm_atomic_check_only] checking ffff8803f8bd2c00
>[   49.938156] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.938157] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.938158] [drm:drm_atomic_commit] commiting ffff8803f8bd2c00
>[   49.938164] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.938166] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2c00
>[   49.938168] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2c00
>[   49.941312] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.958234] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1200
>[   49.958237] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74000 state to ffff8803f8bd1200
>[   49.958239] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f8bd1200
>[   49.958240] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74000 to [CRTC:21]
>[   49.958241] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74000
>[   49.958242] [drm:drm_atomic_check_only] checking ffff8803f8bd1200
>[   49.958244] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.958245] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.958246] [drm:drm_atomic_commit] commiting ffff8803f8bd1200
>[   49.958251] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.958254] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1200
>[   49.958256] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1200
>[   49.959495] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.968247] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fc4bf200
>[   49.968250] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8804010b2540 state to ffff8803fc4bf200
>[   49.968252] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a6bc00 state to ffff8803fc4bf200
>[   49.968253] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804010b2540 to [CRTC:21]
>[   49.968254] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8804010b2540
>[   49.968254] [drm:drm_atomic_check_only] checking ffff8803fc4bf200
>[   49.968257] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.968259] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.968260] [drm:drm_atomic_commit] commiting ffff8803fc4bf200
>[   49.968265] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.968268] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fc4bf200
>[   49.968269] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fc4bf200
>[   49.978101] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.978321] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd0c00
>[   49.978324] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74840 state to ffff8803f8bd0c00
>[   49.978326] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd0c00
>[   49.978327] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74840 to [CRTC:21]
>[   49.978327] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74840
>[   49.978328] [drm:drm_atomic_check_only] checking ffff8803f8bd0c00
>[   49.978331] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.978333] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.978334] [drm:drm_atomic_commit] commiting ffff8803f8bd0c00
>[   49.978340] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd0c00
>[   49.978341] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd0c00
>[   49.988318] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd0400
>[   49.988320] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74c00 state to ffff8803f8bd0400
>[   49.988322] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd0400
>[   49.988323] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74c00 to [CRTC:21]
>[   49.988324] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74c00
>[   49.988325] [drm:drm_atomic_check_only] checking ffff8803f8bd0400
>[   49.988327] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.988328] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.988329] [drm:drm_atomic_commit] commiting ffff8803f8bd0400
>[   49.988335] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.988337] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd0400
>[   49.988339] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd0400
>[   49.995834] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   49.999395] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3000
>[   49.999398] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a743c0 state to ffff8803f8bd3000
>[   49.999399] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd3000
>[   49.999400] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a743c0 to [CRTC:21]
>[   49.999401] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a743c0
>[   49.999402] [drm:drm_atomic_check_only] checking ffff8803f8bd3000
>[   49.999405] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   49.999406] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   49.999407] [drm:drm_atomic_commit] commiting ffff8803f8bd3000
>[   49.999413] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3000
>[   49.999414] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3000
>[   50.013638] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.019428] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2200
>[   50.019430] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74240 state to ffff8803f8bd2200
>[   50.019432] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd2200
>[   50.019433] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74240 to [CRTC:21]
>[   50.019434] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74240
>[   50.019435] [drm:drm_atomic_check_only] checking ffff8803f8bd2200
>[   50.019437] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.019438] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.019440] [drm:drm_atomic_commit] commiting ffff8803f8bd2200
>[   50.019445] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.019447] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2200
>[   50.019449] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2200
>[   50.029475] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd0200
>[   50.029478] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a743c0 state to ffff8803f8bd0200
>[   50.029480] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd0200
>[   50.029481] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a743c0 to [CRTC:21]
>[   50.029482] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a743c0
>[   50.029483] [drm:drm_atomic_check_only] checking ffff8803f8bd0200
>[   50.029486] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.029488] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.029489] [drm:drm_atomic_commit] commiting ffff8803f8bd0200
>[   50.029497] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.029500] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd0200
>[   50.029501] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd0200
>[   50.032129] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.049556] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2e00
>[   50.049559] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74480 state to ffff8803f8bd2e00
>[   50.049561] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd2e00
>[   50.049562] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74480 to [CRTC:21]
>[   50.049563] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74480
>[   50.049564] [drm:drm_atomic_check_only] checking ffff8803f8bd2e00
>[   50.049567] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.049568] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.049569] [drm:drm_atomic_commit] commiting ffff8803f8bd2e00
>[   50.049576] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.049578] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2e00
>[   50.049580] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2e00
>[   50.050729] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.059588] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3000
>[   50.059591] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74900 state to ffff8803f8bd3000
>[   50.059593] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd3000
>[   50.059594] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74900 to [CRTC:21]
>[   50.059595] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74900
>[   50.059596] [drm:drm_atomic_check_only] checking ffff8803f8bd3000
>[   50.059599] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.059600] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.059601] [drm:drm_atomic_commit] commiting ffff8803f8bd3000
>[   50.059607] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.059609] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3000
>[   50.059610] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3000
>[   50.069591] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd0600
>[   50.069593] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74480 state to ffff8803f8bd0600
>[   50.069594] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd0600
>[   50.069595] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74480 to [CRTC:21]
>[   50.069596] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74480
>[   50.069597] [drm:drm_atomic_check_only] checking ffff8803f8bd0600
>[   50.069600] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.069601] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.069602] [drm:drm_atomic_commit] commiting ffff8803f8bd0600
>[   50.069971] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.071608] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd0600
>[   50.071610] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd0600
>[   50.071666] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.079633] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd0200
>[   50.079635] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74c00 state to ffff8803f8bd0200
>[   50.079636] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd0200
>[   50.079637] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74c00 to [CRTC:21]
>[   50.079638] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74c00
>[   50.079639] [drm:drm_atomic_check_only] checking ffff8803f8bd0200
>[   50.079641] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.079642] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.079643] [drm:drm_atomic_commit] commiting ffff8803f8bd0200
>[   50.079648] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.079651] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd0200
>[   50.079652] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd0200
>[   50.086561] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.089654] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd0400
>[   50.089657] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74900 state to ffff8803f8bd0400
>[   50.089658] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd0400
>[   50.089659] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74900 to [CRTC:21]
>[   50.089660] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74900
>[   50.089661] [drm:drm_atomic_check_only] checking ffff8803f8bd0400
>[   50.089664] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.089665] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.089666] [drm:drm_atomic_commit] commiting ffff8803f8bd0400
>[   50.089672] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd0400
>[   50.089674] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd0400
>[   50.099672] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2000
>[   50.099674] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74480 state to ffff8803f8bd2000
>[   50.099675] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd2000
>[   50.099676] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74480 to [CRTC:21]
>[   50.099677] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74480
>[   50.099678] [drm:drm_atomic_check_only] checking ffff8803f8bd2000
>[   50.099680] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.099681] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.099682] [drm:drm_atomic_commit] commiting ffff8803f8bd2000
>[   50.099686] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.099689] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2000
>[   50.099690] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2000
>[   50.104169] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.109713] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3e00
>[   50.109715] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74c00 state to ffff8803f8bd3e00
>[   50.109717] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd3e00
>[   50.109718] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74c00 to [CRTC:21]
>[   50.109718] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74c00
>[   50.109719] [drm:drm_atomic_check_only] checking ffff8803f8bd3e00
>[   50.109722] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.109723] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.109724] [drm:drm_atomic_commit] commiting ffff8803f8bd3e00
>[   50.109730] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3e00
>[   50.109731] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3e00
>[   50.119755] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd0400
>[   50.119758] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74540 state to ffff8803f8bd0400
>[   50.119759] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd0400
>[   50.119760] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74540 to [CRTC:21]
>[   50.119761] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74540
>[   50.119762] [drm:drm_atomic_check_only] checking ffff8803f8bd0400
>[   50.119765] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.119766] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.119767] [drm:drm_atomic_commit] commiting ffff8803f8bd0400
>[   50.119773] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.119775] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd0400
>[   50.119777] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd0400
>[   50.121719] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.129778] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1a00
>[   50.129780] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74480 state to ffff8803f8bd1a00
>[   50.129782] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd1a00
>[   50.129783] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74480 to [CRTC:21]
>[   50.129784] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74480
>[   50.129785] [drm:drm_atomic_check_only] checking ffff8803f8bd1a00
>[   50.129788] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.129789] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.129790] [drm:drm_atomic_commit] commiting ffff8803f8bd1a00
>[   50.129796] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1a00
>[   50.129798] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1a00
>[   50.139797] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3600
>[   50.139800] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a746c0 state to ffff8803f8bd3600
>[   50.139801] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd3600
>[   50.139802] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a746c0 to [CRTC:21]
>[   50.139803] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a746c0
>[   50.139804] [drm:drm_atomic_check_only] checking ffff8803f8bd3600
>[   50.139807] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.139808] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.139809] [drm:drm_atomic_commit] commiting ffff8803f8bd3600
>[   50.139815] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.139818] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3600
>[   50.139819] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3600
>[   50.139859] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.149817] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1e00
>[   50.149819] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74600 state to ffff8803f8bd1e00
>[   50.149821] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd1e00
>[   50.149822] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74600 to [CRTC:21]
>[   50.149823] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74600
>[   50.149824] [drm:drm_atomic_check_only] checking ffff8803f8bd1e00
>[   50.149827] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.149828] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.149829] [drm:drm_atomic_commit] commiting ffff8803f8bd1e00
>[   50.149834] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.149837] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1e00
>[   50.149838] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1e00
>[   50.158462] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.159847] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3200
>[   50.159849] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74540 state to ffff8803f8bd3200
>[   50.159851] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd3200
>[   50.159852] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74540 to [CRTC:21]
>[   50.159853] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74540
>[   50.159854] [drm:drm_atomic_check_only] checking ffff8803f8bd3200
>[   50.159857] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.159858] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.159859] [drm:drm_atomic_commit] commiting ffff8803f8bd3200
>[   50.159865] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3200
>[   50.159867] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3200
>[   50.169889] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd0600
>[   50.169892] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a749c0 state to ffff8803f8bd0600
>[   50.169893] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd0600
>[   50.169894] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a749c0 to [CRTC:21]
>[   50.169895] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a749c0
>[   50.169896] [drm:drm_atomic_check_only] checking ffff8803f8bd0600
>[   50.169899] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.169900] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.169901] [drm:drm_atomic_commit] commiting ffff8803f8bd0600
>[   50.169907] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.169909] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd0600
>[   50.169911] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd0600
>[   50.176144] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.179895] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1a00
>[   50.179898] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74300 state to ffff8803f8bd1a00
>[   50.179899] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd1a00
>[   50.179900] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74300 to [CRTC:21]
>[   50.179901] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74300
>[   50.179902] [drm:drm_atomic_check_only] checking ffff8803f8bd1a00
>[   50.179905] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.179906] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.179907] [drm:drm_atomic_commit] commiting ffff8803f8bd1a00
>[   50.179912] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.179915] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1a00
>[   50.179917] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1a00
>[   50.189952] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1a00
>[   50.189955] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a749c0 state to ffff8803f8bd1a00
>[   50.189957] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd1a00
>[   50.189958] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a749c0 to [CRTC:21]
>[   50.189959] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a749c0
>[   50.189960] [drm:drm_atomic_check_only] checking ffff8803f8bd1a00
>[   50.189962] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.189963] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.189964] [drm:drm_atomic_commit] commiting ffff8803f8bd1a00
>[   50.189970] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.189973] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1a00
>[   50.189974] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1a00
>[   50.193790] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.211704] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.220105] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1e00
>[   50.220108] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a746c0 state to ffff8803f8bd1e00
>[   50.220109] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f8bd1e00
>[   50.220110] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a746c0 to [CRTC:21]
>[   50.220111] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a746c0
>[   50.220112] [drm:drm_atomic_check_only] checking ffff8803f8bd1e00
>[   50.220115] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.220116] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.220117] [drm:drm_atomic_commit] commiting ffff8803f8bd1e00
>[   50.220123] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.220126] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1e00
>[   50.220127] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1e00
>[   50.230460] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.240163] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1800
>[   50.240166] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74480 state to ffff8803f8bd1800
>[   50.240168] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd1800
>[   50.240169] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74480 to [CRTC:21]
>[   50.240169] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74480
>[   50.240170] [drm:drm_atomic_check_only] checking ffff8803f8bd1800
>[   50.240173] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.240174] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.240175] [drm:drm_atomic_commit] commiting ffff8803f8bd1800
>[   50.240180] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.240183] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1800
>[   50.240185] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1800
>[   50.249166] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.267747] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.286542] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.304359] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.322545] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.341268] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.359560] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.415342] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   50.486295] [drm:ilk_fbc_disable] disabled FBC
>[   50.504505] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.522376] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.540146] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.557291] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.604705] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.621423] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.652655] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1400
>[   50.652658] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a749c0 state to ffff8803f8bd1400
>[   50.652660] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a60800 state to ffff8803f8bd1400
>[   50.652661] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a749c0 to [CRTC:21]
>[   50.652662] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a749c0
>[   50.652664] [drm:drm_atomic_check_only] checking ffff8803f8bd1400
>[   50.652668] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.652669] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.652670] [drm:drm_atomic_commit] commiting ffff8803f8bd1400
>[   50.652681] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.652684] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1400
>[   50.652685] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1400
>[   50.662687] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1e00
>[   50.662690] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74480 state to ffff8803f8bd1e00
>[   50.662691] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd1e00
>[   50.662692] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74480 to [CRTC:21]
>[   50.662693] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74480
>[   50.662694] [drm:drm_atomic_check_only] checking ffff8803f8bd1e00
>[   50.662696] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.662697] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.662698] [drm:drm_atomic_commit] commiting ffff8803f8bd1e00
>[   50.662706] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.662709] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1e00
>[   50.662710] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1e00
>[   50.672773] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1c00
>[   50.672775] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a749c0 state to ffff8803f8bd1c00
>[   50.672776] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a60800 state to ffff8803f8bd1c00
>[   50.672777] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a749c0 to [CRTC:21]
>[   50.672778] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a749c0
>[   50.672779] [drm:drm_atomic_check_only] checking ffff8803f8bd1c00
>[   50.672781] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.672782] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.672783] [drm:drm_atomic_commit] commiting ffff8803f8bd1c00
>[   50.672789] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.672791] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1c00
>[   50.672793] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1c00
>[   50.673891] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.682817] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2600
>[   50.682819] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a746c0 state to ffff8803f8bd2600
>[   50.682821] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd2600
>[   50.682822] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a746c0 to [CRTC:21]
>[   50.682823] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a746c0
>[   50.682823] [drm:drm_atomic_check_only] checking ffff8803f8bd2600
>[   50.682826] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.682827] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.682828] [drm:drm_atomic_commit] commiting ffff8803f8bd2600
>[   50.682835] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.682838] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2600
>[   50.682839] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2600
>[   50.691967] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.692851] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2c00
>[   50.692853] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74840 state to ffff8803f8bd2c00
>[   50.692854] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a60800 state to ffff8803f8bd2c00
>[   50.692855] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74840 to [CRTC:21]
>[   50.692856] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74840
>[   50.692857] [drm:drm_atomic_check_only] checking ffff8803f8bd2c00
>[   50.692860] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.692861] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.692862] [drm:drm_atomic_commit] commiting ffff8803f8bd2c00
>[   50.692870] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2c00
>[   50.692871] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2c00
>[   50.702904] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2400
>[   50.702909] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74300 state to ffff8803f8bd2400
>[   50.702911] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd2400
>[   50.702912] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74300 to [CRTC:21]
>[   50.702913] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74300
>[   50.702914] [drm:drm_atomic_check_only] checking ffff8803f8bd2400
>[   50.702918] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.702919] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.702921] [drm:drm_atomic_commit] commiting ffff8803f8bd2400
>[   50.702934] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.702937] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2400
>[   50.702938] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2400
>[   50.709187] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.720851] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2800
>[   50.720855] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a746c0 state to ffff8803f8bd2800
>[   50.720857] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a60800 state to ffff8803f8bd2800
>[   50.720859] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a746c0 to [CRTC:21]
>[   50.720860] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a746c0
>[   50.720861] [drm:drm_atomic_check_only] checking ffff8803f8bd2800
>[   50.720865] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.720866] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.720867] [drm:drm_atomic_commit] commiting ffff8803f8bd2800
>[   50.720877] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.720881] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2800
>[   50.720882] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2800
>[   50.727406] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.727730] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2c00
>[   50.727732] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74540 state to ffff8803f8bd2c00
>[   50.727734] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd2c00
>[   50.727735] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74540 to [CRTC:21]
>[   50.727736] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74540
>[   50.727737] [drm:drm_atomic_check_only] checking ffff8803f8bd2c00
>[   50.727740] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.727741] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.727742] [drm:drm_atomic_commit] commiting ffff8803f8bd2c00
>[   50.727748] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2c00
>[   50.727749] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2c00
>[   50.741018] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3800
>[   50.741022] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74000 state to ffff8803f8bd3800
>[   50.741024] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a60800 state to ffff8803f8bd3800
>[   50.741026] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74000 to [CRTC:21]
>[   50.741027] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74000
>[   50.741028] [drm:drm_atomic_check_only] checking ffff8803f8bd3800
>[   50.741032] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.741033] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.741035] [drm:drm_atomic_commit] commiting ffff8803f8bd3800
>[   50.741044] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.741049] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3800
>[   50.741050] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3800
>[   50.745329] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.747856] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2a00
>[   50.747859] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74300 state to ffff8803f8bd2a00
>[   50.747862] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd2a00
>[   50.747863] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74300 to [CRTC:21]
>[   50.747864] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74300
>[   50.747865] [drm:drm_atomic_check_only] checking ffff8803f8bd2a00
>[   50.747869] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.747871] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.747872] [drm:drm_atomic_commit] commiting ffff8803f8bd2a00
>[   50.747880] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2a00
>[   50.747882] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2a00
>[   50.761035] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd3600
>[   50.761039] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74000 state to ffff8803f8bd3600
>[   50.761041] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a60800 state to ffff8803f8bd3600
>[   50.761042] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74000 to [CRTC:21]
>[   50.761043] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74000
>[   50.761044] [drm:drm_atomic_check_only] checking ffff8803f8bd3600
>[   50.761049] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.761050] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.761051] [drm:drm_atomic_commit] commiting ffff8803f8bd3600
>[   50.761061] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.761066] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd3600
>[   50.761067] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd3600
>[   50.762958] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.771048] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd2400
>[   50.771052] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74180 state to ffff8803f8bd2400
>[   50.771054] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66000 state to ffff8803f8bd2400
>[   50.771055] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74180 to [CRTC:21]
>[   50.771056] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74180
>[   50.771058] [drm:drm_atomic_check_only] checking ffff8803f8bd2400
>[   50.771062] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.771063] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.771064] [drm:drm_atomic_commit] commiting ffff8803f8bd2400
>[   50.771071] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.771074] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd2400
>[   50.771076] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd2400
>[   50.780904] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.781067] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd0600
>[   50.781070] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a746c0 state to ffff8803f8bd0600
>[   50.781072] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a60800 state to ffff8803f8bd0600
>[   50.781073] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a746c0 to [CRTC:21]
>[   50.781074] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a746c0
>[   50.781075] [drm:drm_atomic_check_only] checking ffff8803f8bd0600
>[   50.781079] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.781080] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.781082] [drm:drm_atomic_commit] commiting ffff8803f8bd0600
>[   50.781090] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd0600
>[   50.781092] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd0600
>[   50.798784] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.816847] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.829053] [drm:i915_gem_open] 
>[   50.834603] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.852297] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.869798] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.890062] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd0c00
>[   50.890067] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74240 state to ffff8803f8bd0c00
>[   50.890069] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a62000 state to ffff8803f8bd0c00
>[   50.890070] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74240 to [CRTC:21]
>[   50.890072] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74240
>[   50.890073] [drm:drm_atomic_check_only] checking ffff8803f8bd0c00
>[   50.890078] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   50.890079] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   50.890080] [drm:drm_atomic_commit] commiting ffff8803f8bd0c00
>[   50.890090] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.890094] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd0c00
>[   50.890096] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd0c00
>[   50.920241] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.936962] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.953662] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.970372] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   50.987010] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   51.003698] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   51.020411] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   51.037087] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   51.053762] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   51.070451] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   51.087172] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   51.136136] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   51.179196] [drm:ilk_fbc_disable] disabled FBC
>[   51.200197] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   51.214307] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd0000
>[   51.214312] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74480 state to ffff8803f8bd0000
>[   51.214314] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a62400 state to ffff8803f8bd0000
>[   51.214315] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74480 to [CRTC:21]
>[   51.214316] [drm:drm_atomic_set_fb_for_plane] Set [FB:60] for plane state ffff8803e4a74480
>[   51.214317] [drm:drm_atomic_check_only] checking ffff8803f8bd0000
>[   51.214321] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 60
>[   51.214323] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   51.214324] [drm:drm_atomic_commit] commiting ffff8803f8bd0000
>[   51.214337] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   51.214341] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd0000
>[   51.214342] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd0000
>[   51.254014] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   51.302911] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   51.413822] [drm:ilk_fbc_disable] disabled FBC
>[   51.469748] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   51.650500] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f96e3600
>[   51.650504] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e3347d80 state to ffff8803f96e3600
>[   51.650506] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8d9f000 state to ffff8803f96e3600
>[   51.650507] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e3347d80 to [NOCRTC]
>[   51.650508] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8803e3347d80
>[   51.650509] [drm:drm_atomic_check_only] checking ffff8803f96e3600
>[   51.650513] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb -1
>[   51.650514] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 0, off 1, on 0, ms 0
>[   51.650516] [drm:drm_atomic_commit] commiting ffff8803f96e3600
>[   51.650533] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f96e3600
>[   51.650534] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f96e3600
>[   51.669528] [drm:ilk_fbc_disable] disabled FBC
>[   51.726660] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   51.931937] [drm:ilk_fbc_disable] disabled FBC
>[   51.986935] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   52.046609] [drm:ilk_fbc_disable] disabled FBC
>[   52.103755] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   52.130196] [drm:ilk_fbc_disable] disabled FBC
>[   52.187182] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   52.217296] [drm:ilk_fbc_disable] disabled FBC
>[   52.273942] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   52.430277] [drm:ilk_fbc_disable] disabled FBC
>[   52.487488] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   52.804441] [drm:ilk_fbc_disable] disabled FBC
>[   52.871186] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   61.503714] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f8bd1e00
>[   61.503719] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74000 state to ffff8803f8bd1e00
>[   61.503721] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63000 state to ffff8803f8bd1e00
>[   61.503722] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74000 to [CRTC:21]
>[   61.503723] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74000
>[   61.503724] [drm:drm_atomic_check_only] checking ffff8803f8bd1e00
>[   61.503728] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[   61.503729] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[   61.503731] [drm:drm_atomic_commit] commiting ffff8803f8bd1e00
>[   61.503749] [drm:ilk_fbc_disable] disabled FBC
>[   61.503752] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f8bd1e00
>[   61.503753] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f8bd1e00
>[   61.553229] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   61.579873] [drm:ilk_fbc_disable] disabled FBC
>[   61.617617] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   61.650945] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   61.667654] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   61.716723] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   61.740050] [drm:ilk_fbc_disable] disabled FBC
>[   61.816794] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   61.820112] [drm:ilk_fbc_disable] disabled FBC
>[   61.900242] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   61.940262] [drm:ilk_fbc_disable] disabled FBC
>[   62.017024] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   63.872178] [drm:ilk_fbc_disable] disabled FBC
>[   64.002297] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   64.086699] [drm:ilk_fbc_disable] disabled FBC
>[   64.142433] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   64.295945] [drm:ilk_fbc_disable] disabled FBC
>[   64.354462] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   64.371143] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   64.387826] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   64.404527] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   64.421194] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   64.454600] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   64.471258] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   64.504677] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   64.538070] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   64.554751] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   64.571445] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   64.588162] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   64.671554] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   64.719678] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   64.736351] [drm:ilk_fbc_disable] disabled FBC
>[   64.803107] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   65.073358] [drm:ilk_fbc_disable] disabled FBC
>[   65.122124] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   65.155496] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   65.172191] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   65.188879] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   65.205560] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   65.222268] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   65.238943] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   65.255643] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   65.289039] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   65.305772] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   65.322422] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   65.339103] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   65.387007] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   65.617240] [drm:ilk_fbc_disable] disabled FBC
>[   65.656149] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   65.665805] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   65.683566] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   65.708454] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   65.726619] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   65.744766] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   65.789712] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   65.806409] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   65.823078] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   65.870852] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   66.121067] [drm:ilk_fbc_disable] disabled FBC
>[   66.146901] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.169048] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.189498] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.208695] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.226945] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.247223] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.286161] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f911ac00
>[   66.286174] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353600 state to ffff8803f911ac00
>[   66.286180] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8d9b000 state to ffff8803f911ac00
>[   66.286182] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353600 to [CRTC:21]
>[   66.286184] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353600
>[   66.286186] [drm:drm_atomic_check_only] checking ffff8803f911ac00
>[   66.286204] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[   66.286206] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   66.286210] [drm:drm_atomic_commit] commiting ffff8803f911ac00
>[   66.286236] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.286246] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f911ac00
>[   66.286248] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f911ac00
>[   66.290331] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.307022] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.323760] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.340431] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.357142] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.373764] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.407148] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.423834] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.440523] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.457242] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.473980] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.490612] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.507324] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.523992] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.540873] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.557324] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.574013] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.637134] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.665464] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.683342] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.704335] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.722196] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.739515] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.774284] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.791028] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.807659] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.824382] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.857725] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.874456] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.891118] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.907810] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.924498] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.941175] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.957853] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   66.974558] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.007956] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.024630] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.041305] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.058015] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.074695] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.091381] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.108053] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.173197] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.197716] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.216477] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.234939] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.253068] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.273213] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.291695] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.325026] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.341698] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.375134] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.391776] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.408463] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.425161] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.441837] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.458531] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.475230] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.491880] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.508584] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.542008] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.558659] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.575360] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.592043] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.608729] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.625401] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.642105] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.689329] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   67.699334] [drm:ilk_fbc_disable] disabled FBC
>[   67.723166] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.750525] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.770542] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.788401] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.806663] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.830197] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.875733] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.892426] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.909111] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.925811] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.942492] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.959173] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.975893] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   67.992535] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.009224] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.025938] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.042631] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.059296] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.075990] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.092690] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.126053] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.142735] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.159422] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.176126] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.192818] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.209509] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.226204] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.242911] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.259565] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.292969] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.309615] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.313499] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.334153] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.354322] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.371245] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.389541] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.443132] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.459812] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.493260] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.509910] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.526558] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.543272] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.559954] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.576624] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.593357] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.610045] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.626726] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.660106] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.676779] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.693472] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.710154] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.726857] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.743549] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.760245] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.776926] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.810352] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.826983] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.833946] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.858711] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.877392] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.895518] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.914203] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.943770] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.960453] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   68.977157] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.010544] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.027228] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.043920] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.060651] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.077304] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.093986] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.110680] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.127361] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.144060] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.160753] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.194140] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.210803] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.227498] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.244237] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.260888] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.277564] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.294261] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.310924] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.327601] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.391308] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.414550] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.438856] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.456893] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.494512] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.511213] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.527877] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.544586] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.561252] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.577943] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.594700] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.611321] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.628013] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.661406] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.678093] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.694833] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.711476] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.728142] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.744823] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.761514] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.778206] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.794899] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.811571] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.828256] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.861649] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.877402] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.906784] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.924794] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.944044] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.964659] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   69.982915] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.011872] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.028558] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.045222] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.078617] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.095303] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.112006] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.128680] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.145348] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.162038] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.178737] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.195425] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.212116] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.228813] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.245484] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.262191] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.295551] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.312319] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.328989] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.345659] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.362335] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.401911] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.430226] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.448920] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.467625] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.488028] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.529171] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.562568] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.579238] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.612648] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.629315] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.646026] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.662712] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.679745] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.696098] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.712794] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.729475] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.746141] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.762813] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.779500] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.812902] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.829640] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.846296] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.863059] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.879661] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.896328] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.913049] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.929740] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.946423] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   70.963109] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   71.012665] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   71.019349] [drm:ilk_fbc_disable] disabled FBC
>[   71.070600] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   71.088686] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   71.107957] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   71.126312] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   71.150185] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   71.168678] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   71.196729] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   71.230144] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   71.246830] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   71.263532] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   71.280215] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   71.296871] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   71.313559] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   71.330246] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   71.346944] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   71.363643] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   71.397034] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   71.413690] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   71.430395] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   71.447109] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   71.463756] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   71.480445] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   71.497131] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   71.546513] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   72.817775] [drm:ilk_fbc_disable] disabled FBC
>[   72.848879] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   72.882271] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   72.898971] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   72.915634] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   72.932338] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   72.949008] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   72.997946] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   75.770736] [drm:ilk_fbc_disable] disabled FBC
>[   75.802742] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   75.815268] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   75.844700] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   75.863320] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   75.882052] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   75.901853] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   75.920950] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   75.952959] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   75.969647] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   75.986322] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.003010] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.019689] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.053087] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.069775] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.086460] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.103135] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.119846] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.136531] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.153206] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.169916] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.186599] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.203271] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.219956] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.236647] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.255187] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.282949] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.300944] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.321121] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.345385] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.364009] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.403574] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.420272] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.436924] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.453607] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.470285] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.486966] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.520356] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.537057] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.553729] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.570407] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.626799] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.655084] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.673379] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.700519] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.718987] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.736188] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.770668] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.787365] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.804060] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.820736] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.837508] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.854115] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.870819] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.904185] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.920867] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.937548] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.954224] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   76.984312] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.016769] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.035453] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.061792] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.080381] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.097748] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.137821] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.154518] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.171209] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.187877] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.204565] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.221260] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.237953] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.254660] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.271331] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.288004] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.321404] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.331367] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.350322] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.377417] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.402063] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.420662] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.437859] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.455980] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.488278] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.504962] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.521647] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.538342] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.555014] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.588421] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.605143] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.621802] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.638485] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.655186] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.671880] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.685459] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.706637] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.727461] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.744504] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.763812] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.782836] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.799853] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.828200] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.828457] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.855436] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.872124] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.888790] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.905484] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.922176] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.938886] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.955556] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   77.988942] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.005624] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.031337] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.061257] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.079785] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.102293] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.124506] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.147006] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.189177] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.222600] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.239244] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.255931] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.289321] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.306025] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.322708] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.339385] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.356068] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.411214] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.432437] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.454655] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.467930] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.490176] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.539645] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.556323] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.580346] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.599443] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.639788] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.656462] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.673148] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.689836] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.706531] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.723244] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.739911] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.758520] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.786069] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.804500] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.823148] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.842386] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.860179] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.890152] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.923513] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.940175] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.956875] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.973560] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   78.990267] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.006943] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.023643] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.040325] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.056989] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.073672] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.107050] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.118824] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.146823] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.165397] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.184393] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.205111] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.222895] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.257257] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.273938] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.290627] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.307327] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.324001] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.340809] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.357372] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.374055] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.390749] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.424169] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.440823] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.457496] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   79.504458] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   80.330088] [drm:drm_atomic_state_init] Allocated atomic state ffff880413a7dc00
>[   80.330092] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803f0ac7900 state to ffff880413a7dc00
>[   80.330094] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413ba9c00 state to ffff880413a7dc00
>[   80.330096] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803f0ac7900 to [NOCRTC]
>[   80.330097] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8803f0ac7900
>[   80.330098] [drm:drm_atomic_check_only] checking ffff880413a7dc00
>[   80.330102] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb -1
>[   80.330103] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 0, off 1, on 0, ms 0
>[   80.330104] [drm:drm_atomic_commit] commiting ffff880413a7dc00
>[   80.330120] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880413a7dc00
>[   80.330122] [drm:drm_atomic_state_free] Freeing atomic state ffff880413a7dc00
>[   80.348949] [drm:ilk_fbc_disable] disabled FBC
>[   80.405381] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   80.772425] [drm:ilk_fbc_disable] disabled FBC
>[   80.825998] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   80.875902] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   82.878796] [drm:ilk_fbc_disable] disabled FBC
>[   82.934629] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   83.161476] [drm:ilk_fbc_disable] disabled FBC
>[   83.228238] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   83.595207] [drm:ilk_fbc_disable] disabled FBC
>[   83.652021] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   83.882221] [drm:ilk_fbc_disable] disabled FBC
>[   83.962300] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   84.259594] [drm:ilk_fbc_disable] disabled FBC
>[   84.316012] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   84.562287] [drm:ilk_fbc_disable] disabled FBC
>[   84.629590] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   85.134988] [drm:ilk_fbc_disable] disabled FBC
>[   85.190218] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   85.843641] [drm:ilk_fbc_disable] disabled FBC
>[   85.964298] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   89.938216] pci_bus 0000:04: Allocating resources
>[   89.938241] pci_bus 0000:06: Allocating resources
>[   89.938254] pcieport 0000:00:1c.2: bridge window [io  0x1000-0x0fff] to [bus 06] add_size 1000
>[   89.938257] pcieport 0000:00:1c.2: bridge window [mem 0x00100000-0x000fffff 64bit pref] to [bus 06] add_size 200000 add_align 100000
>[   89.938263] pci_bus 0000:07: Allocating resources
>[   89.938272] pcieport 0000:00:1c.3: bridge window [io  0x1000-0x0fff] to [bus 07] add_size 1000
>[   89.938274] pcieport 0000:00:1c.3: bridge window [mem 0x00100000-0x000fffff 64bit pref] to [bus 07] add_size 200000 add_align 100000
>[   89.938276] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[   89.938280] pcieport 0000:00:1c.2: res[15]=[mem 0x00100000-0x000fffff 64bit pref] res_to_dev_res add_size 200000 min_align 100000
>[   89.938282] pcieport 0000:00:1c.2: res[15]=[mem 0x00100000-0x002fffff 64bit pref] res_to_dev_res add_size 200000 min_align 100000
>[   89.938283] pcieport 0000:00:1c.3: res[15]=[mem 0x00100000-0x000fffff 64bit pref] res_to_dev_res add_size 200000 min_align 100000
>[   89.938284] pcieport 0000:00:1c.3: res[15]=[mem 0x00100000-0x002fffff 64bit pref] res_to_dev_res add_size 200000 min_align 100000
>[   89.938285] pcieport 0000:00:1c.2: res[13]=[io  0x1000-0x0fff] res_to_dev_res add_size 1000 min_align 1000
>[   89.938287] pcieport 0000:00:1c.2: res[13]=[io  0x1000-0x1fff] res_to_dev_res add_size 1000 min_align 1000
>[   89.938288] pcieport 0000:00:1c.3: res[13]=[io  0x1000-0x0fff] res_to_dev_res add_size 1000 min_align 1000
>[   89.938289] pcieport 0000:00:1c.3: res[13]=[io  0x1000-0x1fff] res_to_dev_res add_size 1000 min_align 1000
>[   89.938297] pcieport 0000:00:1c.2: BAR 15: assigned [mem 0xcf600000-0xcf7fffff 64bit pref]
>[   89.938302] pcieport 0000:00:1c.3: BAR 15: assigned [mem 0xcf800000-0xcf9fffff 64bit pref]
>[   89.938305] pcieport 0000:00:1c.2: BAR 13: assigned [io  0x3000-0x3fff]
>[   89.938307] pcieport 0000:00:1c.3: BAR 13: assigned [io  0x4000-0x4fff]
>[   89.938421] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[   89.939058] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe134800
>[   89.939062] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8d98000 state to ffff8803fe134800
>[   89.939063] [drm:drm_atomic_check_only] checking ffff8803fe134800
>[   89.939065] [drm:drm_atomic_helper_check_modeset] [CRTC:21] active changed
>[   89.939066] [drm:drm_atomic_helper_check_modeset] [CRTC:21] needs all connectors, enable: y, active: n
>[   89.939068] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff8803fe134800
>[   89.939069] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:34] ffff8800c99d1b00 state to ffff8803fe134800
>[   89.939071] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8804133530c0 state to ffff8803fe134800
>[   89.939073] [drm:drm_atomic_connectors_for_crtc] State ffff8803fe134800 has 1 connectors for [CRTC:21]
>[   89.939074] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff8803fe134800
>[   89.939076] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[   89.939077] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to EDID reported max of 24
>[   89.939080] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 540000 pixel clock 373250KHz
>[   89.939084] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 24
>[   89.939084] [drm:intel_dp_compute_config] DP link bw required 895800 available 1728000
>[   89.939086] [drm:intel_modeset_pipe_config] plane bpp: 36, pipe bpp: 24, dithering: 0
>[   89.939088] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config ffff8800c8d98000 for pipe A
>[   89.939089] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   89.939090] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   89.939091] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   89.939092] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4348677, gmch_n: 8388608, link_m: 724779, link_n: 1048576, tu: 64
>[   89.939094] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   89.939094] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   89.939095] [drm:intel_dump_pipe_config] requested mode:
>[   89.939097] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x0 0xa
>[   89.939098] [drm:intel_dump_pipe_config] adjusted mode:
>[   89.939099] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   89.939101] [drm:intel_dump_crtc_timings] crtc timings: 373250 3200 3248 3280 3360 1800 1803 1808 1852, type: 0x48 flags: 0xa
>[   89.939102] [drm:intel_dump_pipe_config] port clock: 540000
>[   89.939103] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[   89.939104] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[   89.939105] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   89.939106] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   89.939107] [drm:intel_dump_pipe_config] ips: 0
>[   89.939107] [drm:intel_dump_pipe_config] double wide: 0
>[   89.939108] [drm:intel_dump_pipe_config] ddi_pll_sel: 0; dpll_hw_state: wrpll: 0x0
>[   89.939109] [drm:intel_dump_pipe_config] planes on this crtc
>[   89.939110] [drm:intel_dump_pipe_config] STANDARD PLANE:18 plane: 0.0 idx: 0 enabled
>[   89.939112] [drm:intel_dump_pipe_config]         FB:50, fb = 3200x1800 format = 0x34325258
>[   89.939113] [drm:intel_dump_pipe_config]         scaler:0 src (0, 0) 3200x1800 dst (0, 0) 3200x1800
>[   89.939116] [drm:intel_dump_pipe_config] CURSOR PLANE:20 plane: 0.1 idx: 1 disabled, scaler_id = 0
>[   89.939117] [drm:intel_dump_pipe_config] STANDARD PLANE:22 plane: 0.1 idx: 2 disabled, scaler_id = 0
>[   89.939120] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 50
>[   89.939121] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 0, off 1, on 0, ms 1
>[   89.939123] [drm:drm_atomic_commit] commiting ffff8803fe134800
>[   89.939130] [drm:ilk_fbc_disable] disabled FBC
>[   89.939133] [drm:set_no_fbc_reason] Disabling FBC: no output
>[   89.939136] [drm:intel_edp_backlight_off] 
>[   90.008497] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[   90.008549] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[   90.008579] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[   90.008726] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[   90.008737] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[   90.008812] pci_bus 0000:02: Allocating resources
>[   90.008817] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[   90.008845] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[   90.008895] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[   90.141833] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[   90.141844] [drm:intel_disable_pipe] disabling pipe A
>[   90.155537] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   90.155547] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[   90.155721] [drm:edp_panel_off] Turn eDP port A panel power off
>[   90.155725] [drm:wait_panel_off] Wait for panel power off time
>[   90.155728] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[   90.215994] [drm:wait_panel_status] Wait complete
>[   90.216007] [drm:intel_power_well_disable] disabling always-on
>[   90.216013] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[   90.216015] [drm:check_encoder_state] [ENCODER:32:DAC-32]
>[   90.216017] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[   90.216018] [drm:check_encoder_state] [ENCODER:41:TMDS-41]
>[   90.216019] [drm:check_encoder_state] [ENCODER:44:TMDS-44]
>[   90.216020] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[   90.216021] [drm:check_encoder_state] [ENCODER:47:DP MST-47]
>[   90.216022] [drm:check_encoder_state] [ENCODER:48:DP MST-48]
>[   90.216023] [drm:check_crtc_state] [CRTC:21]
>[   90.216025] [drm:check_shared_dpll_state] WRPLL 1
>[   90.216026] [drm:check_shared_dpll_state] WRPLL 2
>[   90.216028] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe134800
>[   90.216030] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe134800
>[   91.137516] pci_bus 0000:04: Allocating resources
>[   91.137529] pci_bus 0000:06: Allocating resources
>[   91.137544] pci_bus 0000:07: Allocating resources
>[   91.137566] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[   91.137698] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[   91.206361] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[   91.206418] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[   91.206449] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[   91.206602] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[   91.206612] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[   91.206686] pci_bus 0000:02: Allocating resources
>[   91.206691] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[   91.206719] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[   91.206773] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[   92.259099] [drm:drm_mode_setcrtc] [CRTC:21]
>[   92.259105] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1]
>[   92.259108] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901c00
>[   92.259111] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a65000 state to ffff8803f0901c00
>[   92.259113] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8800bd45fa80 state to ffff8803f0901c00
>[   92.259115] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:3200x1800] for CRTC state ffff8800c8a65000
>[   92.259116] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fa80 to [CRTC:21]
>[   92.259117] [drm:drm_atomic_set_fb_for_plane] Set [FB:50] for plane state ffff8800bd45fa80
>[   92.259118] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:34] ffff880413ae7720 state to ffff8803f0901c00
>[   92.259119] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff8803f0901c00
>[   92.259121] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880413ae7720 to [NOCRTC]
>[   92.259122] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880413ae7720 to [CRTC:21]
>[   92.259123] [drm:drm_atomic_check_only] checking ffff8803f0901c00
>[   92.259125] [drm:update_connector_routing] Updating routing for [CONNECTOR:34:eDP-1]
>[   92.259127] [drm:update_connector_routing] [CONNECTOR:34:eDP-1] keeps [ENCODER:33:TMDS-33], now on [CRTC:21]
>[   92.259128] [drm:drm_atomic_helper_check_modeset] [CRTC:21] active changed
>[   92.259129] [drm:drm_atomic_helper_check_modeset] [CRTC:21] needs all connectors, enable: y, active: y
>[   92.259130] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff8803f0901c00
>[   92.259131] [drm:drm_atomic_connectors_for_crtc] State ffff8803f0901c00 has 1 connectors for [CRTC:21]
>[   92.259133] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff8803f0901c00
>[   92.259134] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[   92.259135] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to EDID reported max of 24
>[   92.259137] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 540000 pixel clock 373250KHz
>[   92.259141] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 24
>[   92.259142] [drm:intel_dp_compute_config] DP link bw required 895800 available 1728000
>[   92.259143] [drm:intel_modeset_pipe_config] plane bpp: 36, pipe bpp: 24, dithering: 0
>[   92.259145] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config ffff8800c8a65000 for pipe A
>[   92.259146] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   92.259147] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   92.259148] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   92.259149] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4348677, gmch_n: 8388608, link_m: 724779, link_n: 1048576, tu: 64
>[   92.259150] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   92.259151] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   92.259151] [drm:intel_dump_pipe_config] requested mode:
>[   92.259153] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x0 0xa
>[   92.259154] [drm:intel_dump_pipe_config] adjusted mode:
>[   92.259155] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   92.259157] [drm:intel_dump_crtc_timings] crtc timings: 373250 3200 3248 3280 3360 1800 1803 1808 1852, type: 0x48 flags: 0xa
>[   92.259157] [drm:intel_dump_pipe_config] port clock: 540000
>[   92.259158] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[   92.259159] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[   92.259160] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   92.259161] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   92.259162] [drm:intel_dump_pipe_config] ips: 0
>[   92.259162] [drm:intel_dump_pipe_config] double wide: 0
>[   92.259163] [drm:intel_dump_pipe_config] ddi_pll_sel: 0; dpll_hw_state: wrpll: 0x0
>[   92.259164] [drm:intel_dump_pipe_config] planes on this crtc
>[   92.259165] [drm:intel_dump_pipe_config] STANDARD PLANE:18 plane: 0.0 idx: 0 enabled
>[   92.259166] [drm:intel_dump_pipe_config]         FB:50, fb = 3200x1800 format = 0x34325258
>[   92.259167] [drm:intel_dump_pipe_config]         scaler:0 src (0, 0) 0x0 dst (0, 0) 0x0
>[   92.259169] [drm:intel_dump_pipe_config] CURSOR PLANE:20 plane: 0.1 idx: 1 disabled, scaler_id = 0
>[   92.259170] [drm:intel_dump_pipe_config] STANDARD PLANE:22 plane: 0.1 idx: 2 disabled, scaler_id = 0
>[   92.259172] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff8800c8a63000 state to ffff8803f0901c00
>[   92.259174] [drm:drm_atomic_get_crtc_state] Added [CRTC:29] ffff8800c8a63800 state to ffff8803f0901c00
>[   92.259176] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 50
>[   92.259177] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 0 -> 1, off 0, on 1, ms 1
>[   92.259178] [drm:drm_atomic_commit] commiting ffff8803f0901c00
>[   92.259185] [drm:intel_power_well_enable] enabling always-on
>[   92.259196] [drm:edp_panel_on] Turn eDP port A panel power on
>[   92.259198] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   92.259202] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[   92.259204] [drm:wait_panel_status] Wait complete
>[   92.259206] [drm:wait_panel_on] Wait for panel power on
>[   92.259209] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[   92.479644] [drm:wait_panel_status] Wait complete
>[   92.479652] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   92.479660] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[   92.481046] [drm:intel_dp_set_signal_levels] Using signal levels 08000000
>[   92.481049] [drm:intel_dp_set_signal_levels] Using vswing level 2
>[   92.481050] [drm:intel_dp_set_signal_levels] Using pre-emphasis level 1
>[   92.485602] [drm:intel_dp_start_link_train] clock recovery not ok, reset
>[   92.485605] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[   92.485606] [drm:intel_dp_set_signal_levels] Using vswing level 0
>[   92.485607] [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0
>[   92.490145] [drm:intel_dp_start_link_train] clock recovery OK
>[   92.494682] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[   92.494760] [drm:intel_enable_pipe] enabling pipe A
>[   92.494915] [drm:intel_edp_backlight_on] 
>[   92.494916] [drm:intel_panel_enable_backlight] pipe A
>[   92.494920] [drm:intel_panel_actually_set_backlight] set backlight PWM = 4882
>[   92.500833] [drm:intel_psr_match_conditions] PSR disable by flag
>[   92.500837] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[   92.511618] [drm:intel_fbc_alloc_cfb] reserved 23040000 bytes of contiguous stolen space for FBC
>[   92.511624] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   92.511631] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[   92.511635] [drm:check_encoder_state] [ENCODER:32:DAC-32]
>[   92.511637] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[   92.511638] [drm:check_encoder_state] [ENCODER:41:TMDS-41]
>[   92.511639] [drm:check_encoder_state] [ENCODER:44:TMDS-44]
>[   92.511640] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[   92.511641] [drm:check_encoder_state] [ENCODER:47:DP MST-47]
>[   92.511641] [drm:check_encoder_state] [ENCODER:48:DP MST-48]
>[   92.511644] [drm:check_crtc_state] [CRTC:21]
>[   92.511650] [drm:check_shared_dpll_state] WRPLL 1
>[   92.511652] [drm:check_shared_dpll_state] WRPLL 2
>[   92.511653] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901c00
>[   92.511656] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901c00
>[   92.511670] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901c00
>[   92.511673] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0901c00
>[   92.511674] [drm:drm_atomic_check_only] checking ffff8803f0901c00
>[   92.511676] [drm:drm_atomic_commit] commiting ffff8803f0901c00
>[   92.511681] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901c00
>[   92.511682] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901c00
>[   92.511707] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=4882/4882
>[   92.511708] [drm:intel_panel_actually_set_backlight] set backlight PWM = 4882
>[   92.513639] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901000
>[   92.513643] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f6c0 state to ffff8803f0901000
>[   92.513645] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66c00 state to ffff8803f0901000
>[   92.513647] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f6c0 to [CRTC:21]
>[   92.513649] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f6c0
>[   92.513650] [drm:drm_atomic_check_only] checking ffff8803f0901000
>[   92.513655] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[   92.513657] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[   92.513658] [drm:drm_atomic_commit] commiting ffff8803f0901000
>[   92.513675] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   92.513679] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901000
>[   92.513681] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901000
>[   92.520893] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901000
>[   92.520896] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f840 state to ffff8803f0901000
>[   92.520898] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0901000
>[   92.520908] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f840 to [CRTC:21]
>[   92.520909] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f840
>[   92.520910] [drm:drm_atomic_check_only] checking ffff8803f0901000
>[   92.520912] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[   92.520913] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   92.520914] [drm:drm_atomic_commit] commiting ffff8803f0901000
>[   92.520921] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   92.520924] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901000
>[   92.520925] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901000
>[   92.527843] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903c00
>[   92.527848] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f6c0 state to ffff8803f0903c00
>[   92.527850] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66c00 state to ffff8803f0903c00
>[   92.527851] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f6c0 to [CRTC:21]
>[   92.527852] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f6c0
>[   92.527853] [drm:drm_atomic_check_only] checking ffff8803f0903c00
>[   92.527857] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[   92.527859] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   92.527860] [drm:drm_atomic_commit] commiting ffff8803f0903c00
>[   92.527874] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   92.527878] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903c00
>[   92.527880] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903c00
>[   92.541003] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903400
>[   92.541007] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f840 state to ffff8803f0903400
>[   92.541010] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0903400
>[   92.541011] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f840 to [CRTC:21]
>[   92.541012] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f840
>[   92.541013] [drm:drm_atomic_check_only] checking ffff8803f0903400
>[   92.541018] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[   92.541019] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   92.541020] [drm:drm_atomic_commit] commiting ffff8803f0903400
>[   92.541034] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   92.541038] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903400
>[   92.541040] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903400
>[   92.547910] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903000
>[   92.547914] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f6c0 state to ffff8803f0903000
>[   92.547917] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66c00 state to ffff8803f0903000
>[   92.547918] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f6c0 to [CRTC:21]
>[   92.547919] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f6c0
>[   92.547920] [drm:drm_atomic_check_only] checking ffff8803f0903000
>[   92.547925] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[   92.547926] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   92.547927] [drm:drm_atomic_commit] commiting ffff8803f0903000
>[   92.547941] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   92.547945] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903000
>[   92.547947] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903000
>[   92.561060] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901400
>[   92.561065] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f840 state to ffff8803f0901400
>[   92.561067] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0901400
>[   92.561068] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f840 to [CRTC:21]
>[   92.561069] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f840
>[   92.561070] [drm:drm_atomic_check_only] checking ffff8803f0901400
>[   92.561074] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[   92.561076] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   92.561077] [drm:drm_atomic_commit] commiting ffff8803f0901400
>[   92.561091] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   92.561096] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901400
>[   92.561097] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901400
>[   92.571094] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902800
>[   92.571099] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f6c0 state to ffff8803f0902800
>[   92.571101] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66c00 state to ffff8803f0902800
>[   92.571102] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f6c0 to [CRTC:21]
>[   92.571103] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f6c0
>[   92.571104] [drm:drm_atomic_check_only] checking ffff8803f0902800
>[   92.571108] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[   92.571110] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   92.571111] [drm:drm_atomic_commit] commiting ffff8803f0902800
>[   92.571125] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   92.571129] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902800
>[   92.571130] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902800
>[   92.581104] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901400
>[   92.581109] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f840 state to ffff8803f0901400
>[   92.581111] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0901400
>[   92.581112] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f840 to [CRTC:21]
>[   92.581113] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f840
>[   92.581114] [drm:drm_atomic_check_only] checking ffff8803f0901400
>[   92.581118] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[   92.581120] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   92.581121] [drm:drm_atomic_commit] commiting ffff8803f0901400
>[   92.581135] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   92.581139] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901400
>[   92.581141] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901400
>[   92.611196] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903000
>[   92.611200] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f6c0 state to ffff8803f0903000
>[   92.611203] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66c00 state to ffff8803f0903000
>[   92.611204] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f6c0 to [CRTC:21]
>[   92.611205] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f6c0
>[   92.611206] [drm:drm_atomic_check_only] checking ffff8803f0903000
>[   92.611210] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[   92.611211] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   92.611213] [drm:drm_atomic_commit] commiting ffff8803f0903000
>[   92.611227] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   92.611231] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903000
>[   92.611233] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903000
>[   92.621224] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903400
>[   92.621228] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f840 state to ffff8803f0903400
>[   92.621231] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0903400
>[   92.621232] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f840 to [CRTC:21]
>[   92.621233] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f840
>[   92.621234] [drm:drm_atomic_check_only] checking ffff8803f0903400
>[   92.621238] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[   92.621239] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   92.621241] [drm:drm_atomic_commit] commiting ffff8803f0903400
>[   92.621255] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   92.621260] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903400
>[   92.621261] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903400
>[   92.631265] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903c00
>[   92.631270] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f6c0 state to ffff8803f0903c00
>[   92.631272] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66c00 state to ffff8803f0903c00
>[   92.631273] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f6c0 to [CRTC:21]
>[   92.631274] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f6c0
>[   92.631275] [drm:drm_atomic_check_only] checking ffff8803f0903c00
>[   92.631279] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[   92.631280] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   92.631281] [drm:drm_atomic_commit] commiting ffff8803f0903c00
>[   92.631296] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   92.631300] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903c00
>[   92.631302] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903c00
>[   92.641293] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901000
>[   92.641298] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f840 state to ffff8803f0901000
>[   92.641300] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0901000
>[   92.641301] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f840 to [CRTC:21]
>[   92.641302] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f840
>[   92.641303] [drm:drm_atomic_check_only] checking ffff8803f0901000
>[   92.641307] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[   92.641309] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   92.641310] [drm:drm_atomic_commit] commiting ffff8803f0901000
>[   92.641324] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   92.641328] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901000
>[   92.641330] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901000
>[   92.651336] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900000
>[   92.651341] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f6c0 state to ffff8803f0900000
>[   92.651343] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66c00 state to ffff8803f0900000
>[   92.651344] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f6c0 to [CRTC:21]
>[   92.651345] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f6c0
>[   92.651346] [drm:drm_atomic_check_only] checking ffff8803f0900000
>[   92.651351] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[   92.651352] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   92.651353] [drm:drm_atomic_commit] commiting ffff8803f0900000
>[   92.651367] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   92.651371] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900000
>[   92.651373] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900000
>[   92.661387] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903e00
>[   92.661391] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f840 state to ffff8803f0903e00
>[   92.661393] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0903e00
>[   92.661394] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f840 to [CRTC:21]
>[   92.661396] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f840
>[   92.661397] [drm:drm_atomic_check_only] checking ffff8803f0903e00
>[   92.661401] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[   92.661402] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   92.661403] [drm:drm_atomic_commit] commiting ffff8803f0903e00
>[   92.661418] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   92.661422] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903e00
>[   92.661424] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903e00
>[   92.671414] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903600
>[   92.671419] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f6c0 state to ffff8803f0903600
>[   92.671421] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66c00 state to ffff8803f0903600
>[   92.671422] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f6c0 to [CRTC:21]
>[   92.671423] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f6c0
>[   92.671424] [drm:drm_atomic_check_only] checking ffff8803f0903600
>[   92.671428] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[   92.671430] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   92.671431] [drm:drm_atomic_commit] commiting ffff8803f0903600
>[   92.671445] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   92.671449] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903600
>[   92.671451] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903600
>[   92.681439] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902000
>[   92.681444] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f840 state to ffff8803f0902000
>[   92.681446] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0902000
>[   92.681447] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f840 to [CRTC:21]
>[   92.681448] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f840
>[   92.681449] [drm:drm_atomic_check_only] checking ffff8803f0902000
>[   92.681454] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[   92.681455] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   92.681456] [drm:drm_atomic_commit] commiting ffff8803f0902000
>[   92.681471] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   92.681475] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902000
>[   92.681476] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902000
>[   92.691469] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900c00
>[   92.691473] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f6c0 state to ffff8803f0900c00
>[   92.691475] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66c00 state to ffff8803f0900c00
>[   92.691476] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f6c0 to [CRTC:21]
>[   92.691478] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f6c0
>[   92.691479] [drm:drm_atomic_check_only] checking ffff8803f0900c00
>[   92.691483] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[   92.691484] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   92.691485] [drm:drm_atomic_commit] commiting ffff8803f0900c00
>[   92.691499] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   92.691504] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900c00
>[   92.691506] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900c00
>[   92.702531] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901a00
>[   92.702536] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f840 state to ffff8803f0901a00
>[   92.702538] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0901a00
>[   92.702539] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f840 to [CRTC:21]
>[   92.702540] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f840
>[   92.702541] [drm:drm_atomic_check_only] checking ffff8803f0901a00
>[   92.702545] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[   92.702547] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   92.702548] [drm:drm_atomic_commit] commiting ffff8803f0901a00
>[   92.702562] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   92.702567] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901a00
>[   92.702568] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901a00
>[   92.751124] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   92.772749] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902600
>[   92.772754] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f780 state to ffff8803f0902600
>[   92.772756] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66c00 state to ffff8803f0902600
>[   92.772757] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f780 to [CRTC:21]
>[   92.772758] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f780
>[   92.772759] [drm:drm_atomic_check_only] checking ffff8803f0902600
>[   92.772763] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[   92.772764] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   92.772766] [drm:drm_atomic_commit] commiting ffff8803f0902600
>[   92.772780] [drm:ilk_fbc_disable] disabled FBC
>[   92.772784] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902600
>[   92.772785] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902600
>[   92.821158] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   93.270083] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe136a00
>[   93.270087] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8804133539c0 state to ffff8803fe136a00
>[   93.270090] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8d9b000 state to ffff8803fe136a00
>[   93.270091] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804133539c0 to [NOCRTC]
>[   93.270092] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8804133539c0
>[   93.270093] [drm:drm_atomic_check_only] checking ffff8803fe136a00
>[   93.270097] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb -1
>[   93.270098] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 0, off 1, on 0, ms 0
>[   93.270100] [drm:drm_atomic_commit] commiting ffff8803fe136a00
>[   93.270118] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe136a00
>[   93.270120] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe136a00
>[   93.289687] [drm:ilk_fbc_disable] disabled FBC
>[   93.345049] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   93.712052] [drm:ilk_fbc_disable] disabled FBC
>[   93.778816] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   95.497178] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[   95.497186] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[   95.802798] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900200
>[   95.802802] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f840 state to ffff8803f0900200
>[   95.802805] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0900200
>[   95.802806] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f840 to [CRTC:21]
>[   95.802807] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f840
>[   95.802808] [drm:drm_atomic_check_only] checking ffff8803f0900200
>[   95.802811] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[   95.802812] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[   95.802814] [drm:drm_atomic_commit] commiting ffff8803f0900200
>[   95.802832] [drm:ilk_fbc_disable] disabled FBC
>[   95.802835] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900200
>[   95.802836] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900200
>[   95.850890] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   95.891332] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900200
>[   95.891337] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f300 state to ffff8803f0900200
>[   95.891339] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66800 state to ffff8803f0900200
>[   95.891340] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f300 to [CRTC:21]
>[   95.891341] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f300
>[   95.891342] [drm:drm_atomic_check_only] checking ffff8803f0900200
>[   95.891346] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[   95.891348] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[   95.891349] [drm:drm_atomic_commit] commiting ffff8803f0900200
>[   95.891363] [drm:ilk_fbc_disable] disabled FBC
>[   95.891367] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900200
>[   95.891368] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900200
>[   95.940982] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   96.995335] [drm:ilk_fbc_disable] disabled FBC
>[   97.034159] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   97.050846] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   97.067524] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   97.084202] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   97.100917] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   97.134287] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   97.150978] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   97.167655] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   97.184334] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   97.217718] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   97.251099] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   97.395306] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   97.418010] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   97.434713] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   97.451396] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   97.468078] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   97.501439] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   97.549237] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   97.966277] [drm:ilk_fbc_disable] disabled FBC
>[   98.002074] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.013386] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.024213] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.035440] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.052129] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.068822] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.102245] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.118892] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.135622] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.152289] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.168978] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.185662] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.219055] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.235751] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.252400] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.269082] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.302480] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.319166] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.335845] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.369232] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.416722] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   98.640307] [drm:ilk_fbc_disable] disabled FBC
>[   98.669623] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.686292] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.702981] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.736369] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.753059] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.769742] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.786450] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.803128] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.819814] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.853232] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.869875] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.883773] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.894931] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.895190] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.919966] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.936653] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   98.953318] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   99.000640] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   99.234233] [drm:ilk_fbc_disable] disabled FBC
>[   99.257149] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   99.279233] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   99.299947] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   99.311907] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   99.337211] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   99.353898] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   99.370527] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   99.387252] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   99.403924] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   99.420644] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   99.437286] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   99.470678] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   99.567896] [drm:gen7_fbc_enable] enabled fbc on plane A
>[   99.804809] [drm:ilk_fbc_disable] disabled FBC
>[   99.837794] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   99.855151] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   99.866442] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   99.884313] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   99.884364] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   99.904555] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   99.904727] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   99.926491] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   99.940101] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   99.961914] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   99.962028] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[   99.988062] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  100.004699] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  100.021387] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  100.038048] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  100.085057] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  101.202867] [drm:ilk_fbc_disable] disabled FBC
>[  101.256338] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  101.273018] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  101.289705] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  101.306389] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  101.339765] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  101.356469] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  101.373151] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  101.389851] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  101.406540] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  101.439929] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  101.456617] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  101.473303] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  101.489983] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  101.506714] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  101.556602] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  103.611936] [drm:ilk_fbc_disable] disabled FBC
>[  103.642777] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  103.659455] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  103.692861] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  103.709527] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  103.726216] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  103.742903] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  103.759590] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  103.792971] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  103.809669] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  103.826371] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  103.843053] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  103.859732] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  103.876434] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  103.909808] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  103.926504] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  103.943179] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  103.959859] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  104.009002] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  105.080106] [drm:ilk_fbc_disable] disabled FBC
>[  105.111365] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  105.137852] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  105.165668] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  105.176052] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  105.176219] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  105.194832] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  105.211489] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  105.260254] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  105.340343] [drm:ilk_fbc_disable] disabled FBC
>[  105.410421] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  105.420427] [drm:ilk_fbc_disable] disabled FBC
>[  105.457539] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  105.478682] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  105.478939] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  105.495225] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  105.511918] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  105.528623] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  105.545281] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  105.561943] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  105.595337] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  105.612034] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  105.645467] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  105.661377] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  105.689556] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  105.700558] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  105.747394] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  105.780765] [drm:ilk_fbc_disable] disabled FBC
>[  105.844158] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  105.944263] [drm:ilk_fbc_disable] disabled FBC
>[  105.995855] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  106.012531] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  106.031375] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  106.041339] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  106.041498] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  106.062605] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  106.070189] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  106.080813] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  106.080943] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  106.081016] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  106.096006] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  106.112666] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  106.129360] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  106.162809] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  106.179466] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  106.196117] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  106.212806] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  106.229494] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  106.262942] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  106.279558] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  106.306466] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  106.327462] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  106.374759] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  107.672677] [drm:ilk_fbc_disable] disabled FBC
>[  107.729419] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  108.096461] [drm:ilk_fbc_disable] disabled FBC
>[  108.132016] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  108.139352] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  108.150229] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  108.165367] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  108.182096] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  108.215443] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  108.263280] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  108.275944] [drm:ilk_fbc_disable] disabled FBC
>[  108.329978] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  108.376720] [drm:ilk_fbc_disable] disabled FBC
>[  108.546881] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  110.191862] [drm:ilk_fbc_disable] disabled FBC
>[  110.218073] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.234717] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.268099] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.284791] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.301466] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.334896] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.351555] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.356206] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.366608] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.384949] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.401636] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.418314] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.451670] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.498858] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  110.555574] [drm:ilk_fbc_disable] disabled FBC
>[  110.592132] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.626354] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.648437] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.648577] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.668620] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.702012] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.749067] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  110.815806] [drm:ilk_fbc_disable] disabled FBC
>[  110.852214] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.862891] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.873280] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.873542] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.885577] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.902260] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.918966] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.952370] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.969088] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  110.985733] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  111.002444] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  111.049412] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  111.563236] [drm:ilk_fbc_disable] disabled FBC
>[  111.603190] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  111.619874] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  111.636547] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  111.647500] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  111.647583] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  111.669950] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  111.686622] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  111.720022] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  111.736736] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  111.753394] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  111.770072] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  111.786757] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  111.820108] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  111.866853] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  112.465821] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe09a200
>[  112.465826] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e49a3300 state to ffff8803fe09a200
>[  112.465828] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413bbf400 state to ffff8803fe09a200
>[  112.465829] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e49a3300 to [CRTC:21]
>[  112.465830] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e49a3300
>[  112.465831] [drm:drm_atomic_check_only] checking ffff8803fe09a200
>[  112.465836] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.465837] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.465838] [drm:drm_atomic_commit] commiting ffff8803fe09a200
>[  112.465853] [drm:ilk_fbc_disable] disabled FBC
>[  112.465857] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe09a200
>[  112.465858] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe09a200
>[  112.475807] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900c00
>[  112.475810] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f0c0 state to ffff8803f0900c00
>[  112.475811] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0900c00
>[  112.475812] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f0c0 to [CRTC:21]
>[  112.475813] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f0c0
>[  112.475814] [drm:drm_atomic_check_only] checking ffff8803f0900c00
>[  112.475817] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.475818] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.475819] [drm:drm_atomic_commit] commiting ffff8803f0900c00
>[  112.475827] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.475830] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900c00
>[  112.475831] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900c00
>[  112.486890] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902c00
>[  112.486893] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0902c00
>[  112.486895] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0902c00
>[  112.486896] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  112.486897] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  112.486898] [drm:drm_atomic_check_only] checking ffff8803f0902c00
>[  112.486900] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.486901] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.486902] [drm:drm_atomic_commit] commiting ffff8803f0902c00
>[  112.486910] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.486913] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902c00
>[  112.486914] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902c00
>[  112.496922] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903800
>[  112.496925] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f0c0 state to ffff8803f0903800
>[  112.496927] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0903800
>[  112.496928] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f0c0 to [CRTC:21]
>[  112.496929] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f0c0
>[  112.496930] [drm:drm_atomic_check_only] checking ffff8803f0903800
>[  112.496932] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.496933] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.496934] [drm:drm_atomic_commit] commiting ffff8803f0903800
>[  112.496942] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.496945] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903800
>[  112.496946] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903800
>[  112.506952] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903200
>[  112.506955] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0903200
>[  112.506956] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0903200
>[  112.506957] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  112.506958] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  112.506959] [drm:drm_atomic_check_only] checking ffff8803f0903200
>[  112.506962] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.506963] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.506964] [drm:drm_atomic_commit] commiting ffff8803f0903200
>[  112.506972] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.506974] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903200
>[  112.506976] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903200
>[  112.517009] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902400
>[  112.517011] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f0c0 state to ffff8803f0902400
>[  112.517013] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0902400
>[  112.517014] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f0c0 to [CRTC:21]
>[  112.517015] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f0c0
>[  112.517016] [drm:drm_atomic_check_only] checking ffff8803f0902400
>[  112.517018] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.517019] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.517020] [drm:drm_atomic_commit] commiting ffff8803f0902400
>[  112.517028] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.517031] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902400
>[  112.517032] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902400
>[  112.527060] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901800
>[  112.527063] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0901800
>[  112.527064] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0901800
>[  112.527065] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  112.527066] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  112.527067] [drm:drm_atomic_check_only] checking ffff8803f0901800
>[  112.527069] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.527071] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.527072] [drm:drm_atomic_commit] commiting ffff8803f0901800
>[  112.527079] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.527082] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901800
>[  112.527083] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901800
>[  112.537087] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903c00
>[  112.537090] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f0c0 state to ffff8803f0903c00
>[  112.537091] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0903c00
>[  112.537092] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f0c0 to [CRTC:21]
>[  112.537093] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f0c0
>[  112.537094] [drm:drm_atomic_check_only] checking ffff8803f0903c00
>[  112.537096] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.537098] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.537099] [drm:drm_atomic_commit] commiting ffff8803f0903c00
>[  112.537106] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.537109] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903c00
>[  112.537110] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903c00
>[  112.547120] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903a00
>[  112.547122] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0903a00
>[  112.547124] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0903a00
>[  112.547125] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  112.547126] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  112.547126] [drm:drm_atomic_check_only] checking ffff8803f0903a00
>[  112.547129] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.547130] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.547131] [drm:drm_atomic_commit] commiting ffff8803f0903a00
>[  112.547138] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.547141] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903a00
>[  112.547142] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903a00
>[  112.557150] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903000
>[  112.557152] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f0c0 state to ffff8803f0903000
>[  112.557154] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0903000
>[  112.557155] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f0c0 to [CRTC:21]
>[  112.557156] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f0c0
>[  112.557156] [drm:drm_atomic_check_only] checking ffff8803f0903000
>[  112.557159] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.557160] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.557161] [drm:drm_atomic_commit] commiting ffff8803f0903000
>[  112.557168] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.557171] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903000
>[  112.557172] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903000
>[  112.567207] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901000
>[  112.567210] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0901000
>[  112.567211] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0901000
>[  112.567212] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  112.567213] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  112.567214] [drm:drm_atomic_check_only] checking ffff8803f0901000
>[  112.567216] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.567217] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.567218] [drm:drm_atomic_commit] commiting ffff8803f0901000
>[  112.567225] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.567228] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901000
>[  112.567229] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901000
>[  112.577246] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900000
>[  112.577249] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f0c0 state to ffff8803f0900000
>[  112.577250] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0900000
>[  112.577251] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f0c0 to [CRTC:21]
>[  112.577252] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f0c0
>[  112.577253] [drm:drm_atomic_check_only] checking ffff8803f0900000
>[  112.577255] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.577256] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.577257] [drm:drm_atomic_commit] commiting ffff8803f0900000
>[  112.577265] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.577268] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900000
>[  112.577269] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900000
>[  112.587271] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902e00
>[  112.587273] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0902e00
>[  112.587275] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0902e00
>[  112.587276] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  112.587277] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  112.587278] [drm:drm_atomic_check_only] checking ffff8803f0902e00
>[  112.587280] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.587281] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.587282] [drm:drm_atomic_commit] commiting ffff8803f0902e00
>[  112.587290] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.587292] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902e00
>[  112.587294] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902e00
>[  112.597304] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901a00
>[  112.597306] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f0c0 state to ffff8803f0901a00
>[  112.597308] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0901a00
>[  112.597309] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f0c0 to [CRTC:21]
>[  112.597310] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f0c0
>[  112.597310] [drm:drm_atomic_check_only] checking ffff8803f0901a00
>[  112.597313] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.597314] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.597315] [drm:drm_atomic_commit] commiting ffff8803f0901a00
>[  112.597322] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.597325] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901a00
>[  112.597326] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901a00
>[  112.607345] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902a00
>[  112.607348] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0902a00
>[  112.607350] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0902a00
>[  112.607351] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  112.607351] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  112.607352] [drm:drm_atomic_check_only] checking ffff8803f0902a00
>[  112.607355] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.607356] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.607357] [drm:drm_atomic_commit] commiting ffff8803f0902a00
>[  112.607364] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.607367] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902a00
>[  112.607368] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902a00
>[  112.617366] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901600
>[  112.617369] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f0c0 state to ffff8803f0901600
>[  112.617370] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0901600
>[  112.617371] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f0c0 to [CRTC:21]
>[  112.617372] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f0c0
>[  112.617373] [drm:drm_atomic_check_only] checking ffff8803f0901600
>[  112.617375] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.617376] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.617377] [drm:drm_atomic_commit] commiting ffff8803f0901600
>[  112.617385] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.617387] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901600
>[  112.617388] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901600
>[  112.627401] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902800
>[  112.627404] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0902800
>[  112.627405] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0902800
>[  112.627406] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  112.627407] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  112.627408] [drm:drm_atomic_check_only] checking ffff8803f0902800
>[  112.627410] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.627411] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.627412] [drm:drm_atomic_commit] commiting ffff8803f0902800
>[  112.627420] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.627423] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902800
>[  112.627424] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902800
>[  112.637439] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901400
>[  112.637442] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f0c0 state to ffff8803f0901400
>[  112.637443] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0901400
>[  112.637444] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f0c0 to [CRTC:21]
>[  112.637445] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f0c0
>[  112.637446] [drm:drm_atomic_check_only] checking ffff8803f0901400
>[  112.637448] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.637449] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.637450] [drm:drm_atomic_commit] commiting ffff8803f0901400
>[  112.637458] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.637460] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901400
>[  112.637461] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901400
>[  112.647457] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900600
>[  112.647459] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0900600
>[  112.647461] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0900600
>[  112.647462] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  112.647463] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  112.647463] [drm:drm_atomic_check_only] checking ffff8803f0900600
>[  112.647466] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.647467] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.647468] [drm:drm_atomic_commit] commiting ffff8803f0900600
>[  112.647475] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.647478] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900600
>[  112.647479] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900600
>[  112.657511] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902000
>[  112.657514] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f0c0 state to ffff8803f0902000
>[  112.657515] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0902000
>[  112.657516] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f0c0 to [CRTC:21]
>[  112.657517] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f0c0
>[  112.657518] [drm:drm_atomic_check_only] checking ffff8803f0902000
>[  112.657520] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.657522] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.657523] [drm:drm_atomic_commit] commiting ffff8803f0902000
>[  112.657530] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.657533] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902000
>[  112.657534] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902000
>[  112.667547] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900e00
>[  112.667549] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0900e00
>[  112.667551] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0900e00
>[  112.667552] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  112.667553] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  112.667553] [drm:drm_atomic_check_only] checking ffff8803f0900e00
>[  112.667556] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.667557] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.667558] [drm:drm_atomic_commit] commiting ffff8803f0900e00
>[  112.667565] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.667568] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900e00
>[  112.667569] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900e00
>[  112.677588] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900800
>[  112.677590] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f0c0 state to ffff8803f0900800
>[  112.677592] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0900800
>[  112.677593] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f0c0 to [CRTC:21]
>[  112.677594] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f0c0
>[  112.677594] [drm:drm_atomic_check_only] checking ffff8803f0900800
>[  112.677597] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.677598] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.677599] [drm:drm_atomic_commit] commiting ffff8803f0900800
>[  112.677606] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.677609] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900800
>[  112.677610] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900800
>[  112.687606] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900400
>[  112.687608] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0900400
>[  112.687610] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0900400
>[  112.687611] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  112.687612] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  112.687613] [drm:drm_atomic_check_only] checking ffff8803f0900400
>[  112.687615] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.687616] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.687617] [drm:drm_atomic_commit] commiting ffff8803f0900400
>[  112.687624] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.687627] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900400
>[  112.687628] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900400
>[  112.697635] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902200
>[  112.697637] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f0c0 state to ffff8803f0902200
>[  112.697639] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0902200
>[  112.697640] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f0c0 to [CRTC:21]
>[  112.697641] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f0c0
>[  112.697641] [drm:drm_atomic_check_only] checking ffff8803f0902200
>[  112.697644] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.697645] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.697646] [drm:drm_atomic_commit] commiting ffff8803f0902200
>[  112.697653] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.697656] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902200
>[  112.697657] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902200
>[  112.707673] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901e00
>[  112.707676] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0901e00
>[  112.707677] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0901e00
>[  112.707678] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  112.707679] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  112.707680] [drm:drm_atomic_check_only] checking ffff8803f0901e00
>[  112.707682] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.707701] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.707702] [drm:drm_atomic_commit] commiting ffff8803f0901e00
>[  112.707710] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.707713] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901e00
>[  112.707715] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901e00
>[  112.717709] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901c00
>[  112.717712] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f0c0 state to ffff8803f0901c00
>[  112.717713] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0901c00
>[  112.717714] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f0c0 to [CRTC:21]
>[  112.717715] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f0c0
>[  112.717716] [drm:drm_atomic_check_only] checking ffff8803f0901c00
>[  112.717718] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.717719] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.717720] [drm:drm_atomic_commit] commiting ffff8803f0901c00
>[  112.717728] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.717730] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901c00
>[  112.717732] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901c00
>[  112.727733] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901c00
>[  112.727735] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0901c00
>[  112.727737] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0901c00
>[  112.727738] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  112.727739] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  112.727740] [drm:drm_atomic_check_only] checking ffff8803f0901c00
>[  112.727742] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.727743] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.727744] [drm:drm_atomic_commit] commiting ffff8803f0901c00
>[  112.727751] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.727754] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901c00
>[  112.727755] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901c00
>[  112.737771] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901e00
>[  112.737774] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f0c0 state to ffff8803f0901e00
>[  112.737775] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0901e00
>[  112.737776] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f0c0 to [CRTC:21]
>[  112.737777] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f0c0
>[  112.737778] [drm:drm_atomic_check_only] checking ffff8803f0901e00
>[  112.737780] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.737781] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.737782] [drm:drm_atomic_commit] commiting ffff8803f0901e00
>[  112.737790] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.737792] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901e00
>[  112.737793] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901e00
>[  112.747798] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902200
>[  112.747801] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0902200
>[  112.747802] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0902200
>[  112.747803] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  112.747804] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  112.747805] [drm:drm_atomic_check_only] checking ffff8803f0902200
>[  112.747807] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.747808] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.747809] [drm:drm_atomic_commit] commiting ffff8803f0902200
>[  112.747817] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.747819] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902200
>[  112.747821] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902200
>[  112.757828] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900400
>[  112.757830] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f0c0 state to ffff8803f0900400
>[  112.757832] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0900400
>[  112.757833] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f0c0 to [CRTC:21]
>[  112.757833] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f0c0
>[  112.757834] [drm:drm_atomic_check_only] checking ffff8803f0900400
>[  112.757837] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.757838] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.757839] [drm:drm_atomic_commit] commiting ffff8803f0900400
>[  112.757846] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.757849] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900400
>[  112.757850] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900400
>[  112.767864] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900800
>[  112.767867] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0900800
>[  112.767868] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0900800
>[  112.767869] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  112.767870] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  112.767871] [drm:drm_atomic_check_only] checking ffff8803f0900800
>[  112.767873] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.767874] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.767875] [drm:drm_atomic_commit] commiting ffff8803f0900800
>[  112.767882] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.767885] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900800
>[  112.767886] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900800
>[  112.777893] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900e00
>[  112.777896] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f0c0 state to ffff8803f0900e00
>[  112.777897] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0900e00
>[  112.777898] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f0c0 to [CRTC:21]
>[  112.777899] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f0c0
>[  112.777900] [drm:drm_atomic_check_only] checking ffff8803f0900e00
>[  112.777902] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.777903] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.777904] [drm:drm_atomic_commit] commiting ffff8803f0900e00
>[  112.777912] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.777914] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900e00
>[  112.777915] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900e00
>[  112.787925] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902000
>[  112.787928] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0902000
>[  112.787929] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0902000
>[  112.787930] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  112.787931] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  112.787932] [drm:drm_atomic_check_only] checking ffff8803f0902000
>[  112.787934] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  112.787935] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  112.787936] [drm:drm_atomic_commit] commiting ffff8803f0902000
>[  112.788052] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  112.788056] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902000
>[  112.788057] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902000
>[  112.837863] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  113.089924] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900600
>[  113.089927] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0900600
>[  113.089928] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0900600
>[  113.089929] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.089930] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.089931] [drm:drm_atomic_check_only] checking ffff8803f0900600
>[  113.089933] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.089934] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.089935] [drm:drm_atomic_commit] commiting ffff8803f0900600
>[  113.089943] [drm:ilk_fbc_disable] disabled FBC
>[  113.089945] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900600
>[  113.089946] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900600
>[  113.099956] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901400
>[  113.099958] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0901400
>[  113.099960] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0901400
>[  113.099961] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.099961] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.099962] [drm:drm_atomic_check_only] checking ffff8803f0901400
>[  113.099965] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.099966] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.099967] [drm:drm_atomic_commit] commiting ffff8803f0901400
>[  113.099974] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.099977] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901400
>[  113.099978] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901400
>[  113.109986] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902800
>[  113.109989] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0902800
>[  113.109990] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0902800
>[  113.109991] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.109992] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.109993] [drm:drm_atomic_check_only] checking ffff8803f0902800
>[  113.109995] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.109997] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.109998] [drm:drm_atomic_commit] commiting ffff8803f0902800
>[  113.110005] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.110008] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902800
>[  113.110009] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902800
>[  113.120017] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901600
>[  113.120020] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0901600
>[  113.120021] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0901600
>[  113.120022] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.120023] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.120024] [drm:drm_atomic_check_only] checking ffff8803f0901600
>[  113.120026] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.120027] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.120028] [drm:drm_atomic_commit] commiting ffff8803f0901600
>[  113.120036] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.120038] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901600
>[  113.120039] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901600
>[  113.130127] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902a00
>[  113.130131] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0902a00
>[  113.130133] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0902a00
>[  113.130134] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.130136] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.130137] [drm:drm_atomic_check_only] checking ffff8803f0902a00
>[  113.130141] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.130142] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.130143] [drm:drm_atomic_commit] commiting ffff8803f0902a00
>[  113.130157] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.130162] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902a00
>[  113.130163] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902a00
>[  113.140156] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901a00
>[  113.140161] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0901a00
>[  113.140163] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0901a00
>[  113.140164] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.140165] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.140166] [drm:drm_atomic_check_only] checking ffff8803f0901a00
>[  113.140171] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.140172] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.140174] [drm:drm_atomic_commit] commiting ffff8803f0901a00
>[  113.140187] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.140192] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901a00
>[  113.140193] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901a00
>[  113.150219] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902e00
>[  113.150223] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0902e00
>[  113.150226] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0902e00
>[  113.150227] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.150228] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.150229] [drm:drm_atomic_check_only] checking ffff8803f0902e00
>[  113.150233] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.150234] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.150236] [drm:drm_atomic_commit] commiting ffff8803f0902e00
>[  113.150249] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.150254] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902e00
>[  113.150255] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902e00
>[  113.160249] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900000
>[  113.160254] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0900000
>[  113.160256] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0900000
>[  113.160257] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.160258] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.160259] [drm:drm_atomic_check_only] checking ffff8803f0900000
>[  113.160264] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.160265] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.160266] [drm:drm_atomic_commit] commiting ffff8803f0900000
>[  113.160281] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.160285] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900000
>[  113.160287] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900000
>[  113.170311] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901000
>[  113.170316] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0901000
>[  113.170318] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0901000
>[  113.170319] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.170320] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.170321] [drm:drm_atomic_check_only] checking ffff8803f0901000
>[  113.170326] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.170327] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.170328] [drm:drm_atomic_commit] commiting ffff8803f0901000
>[  113.170342] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.170347] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901000
>[  113.170348] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901000
>[  113.180336] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903000
>[  113.180340] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0903000
>[  113.180343] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0903000
>[  113.180344] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.180345] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.180346] [drm:drm_atomic_check_only] checking ffff8803f0903000
>[  113.180350] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.180351] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.180353] [drm:drm_atomic_commit] commiting ffff8803f0903000
>[  113.180366] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.180370] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903000
>[  113.180372] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903000
>[  113.190365] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903a00
>[  113.190370] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0903a00
>[  113.190372] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0903a00
>[  113.190373] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.190374] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.190375] [drm:drm_atomic_check_only] checking ffff8803f0903a00
>[  113.190379] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.190380] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.190381] [drm:drm_atomic_commit] commiting ffff8803f0903a00
>[  113.190395] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.190400] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903a00
>[  113.190401] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903a00
>[  113.200432] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903c00
>[  113.200436] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0903c00
>[  113.200439] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0903c00
>[  113.200440] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.200441] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.200442] [drm:drm_atomic_check_only] checking ffff8803f0903c00
>[  113.200446] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.200448] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.200449] [drm:drm_atomic_commit] commiting ffff8803f0903c00
>[  113.200463] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.200468] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903c00
>[  113.200469] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903c00
>[  113.210468] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901800
>[  113.210472] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0901800
>[  113.210474] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0901800
>[  113.210475] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.210476] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.210478] [drm:drm_atomic_check_only] checking ffff8803f0901800
>[  113.210482] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.210483] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.210485] [drm:drm_atomic_commit] commiting ffff8803f0901800
>[  113.210498] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.210503] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901800
>[  113.210504] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901800
>[  113.220492] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902400
>[  113.220497] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0902400
>[  113.220499] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0902400
>[  113.220500] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.220502] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.220503] [drm:drm_atomic_check_only] checking ffff8803f0902400
>[  113.220507] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.220508] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.220509] [drm:drm_atomic_commit] commiting ffff8803f0902400
>[  113.220523] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.220528] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902400
>[  113.220529] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902400
>[  113.230520] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903200
>[  113.230524] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0903200
>[  113.230527] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0903200
>[  113.230528] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.230529] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.230530] [drm:drm_atomic_check_only] checking ffff8803f0903200
>[  113.230534] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.230536] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.230537] [drm:drm_atomic_commit] commiting ffff8803f0903200
>[  113.230551] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.230555] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903200
>[  113.230556] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903200
>[  113.240580] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903800
>[  113.240585] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0903800
>[  113.240587] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0903800
>[  113.240588] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.240589] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.240590] [drm:drm_atomic_check_only] checking ffff8803f0903800
>[  113.240594] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.240596] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.240597] [drm:drm_atomic_commit] commiting ffff8803f0903800
>[  113.240611] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.240615] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903800
>[  113.240616] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903800
>[  113.250615] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902c00
>[  113.250620] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0902c00
>[  113.250622] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0902c00
>[  113.250623] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.250624] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.250625] [drm:drm_atomic_check_only] checking ffff8803f0902c00
>[  113.250630] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.250631] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.250632] [drm:drm_atomic_commit] commiting ffff8803f0902c00
>[  113.250646] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.250651] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902c00
>[  113.250652] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902c00
>[  113.260645] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900c00
>[  113.260649] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0900c00
>[  113.260651] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0900c00
>[  113.260652] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.260654] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.260655] [drm:drm_atomic_check_only] checking ffff8803f0900c00
>[  113.260659] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.260660] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.260662] [drm:drm_atomic_commit] commiting ffff8803f0900c00
>[  113.260676] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.260681] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900c00
>[  113.260682] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900c00
>[  113.270674] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901200
>[  113.270679] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0901200
>[  113.270681] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0901200
>[  113.270682] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.270683] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.270685] [drm:drm_atomic_check_only] checking ffff8803f0901200
>[  113.270689] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.270690] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.270692] [drm:drm_atomic_commit] commiting ffff8803f0901200
>[  113.270705] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.270710] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901200
>[  113.270711] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901200
>[  113.280706] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903400
>[  113.280711] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0903400
>[  113.280713] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0903400
>[  113.280714] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.280715] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.280716] [drm:drm_atomic_check_only] checking ffff8803f0903400
>[  113.280721] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.280722] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.280723] [drm:drm_atomic_commit] commiting ffff8803f0903400
>[  113.280738] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.280742] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903400
>[  113.280743] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903400
>[  113.290736] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900a00
>[  113.290741] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0900a00
>[  113.290743] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0900a00
>[  113.290744] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.290745] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.290746] [drm:drm_atomic_check_only] checking ffff8803f0900a00
>[  113.290751] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.290752] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.290753] [drm:drm_atomic_commit] commiting ffff8803f0900a00
>[  113.290768] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.290772] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900a00
>[  113.290773] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900a00
>[  113.300770] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900200
>[  113.300775] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0900200
>[  113.300777] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0900200
>[  113.300778] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.300779] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.300780] [drm:drm_atomic_check_only] checking ffff8803f0900200
>[  113.300785] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.300786] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.300787] [drm:drm_atomic_commit] commiting ffff8803f0900200
>[  113.300801] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.300805] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900200
>[  113.300807] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900200
>[  113.310807] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903600
>[  113.310811] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0903600
>[  113.310814] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0903600
>[  113.310815] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.310816] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.310817] [drm:drm_atomic_check_only] checking ffff8803f0903600
>[  113.310822] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.310823] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.310824] [drm:drm_atomic_commit] commiting ffff8803f0903600
>[  113.310838] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.310842] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903600
>[  113.310844] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903600
>[  113.320867] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903e00
>[  113.320871] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0903e00
>[  113.320874] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0903e00
>[  113.320875] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.320876] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.320877] [drm:drm_atomic_check_only] checking ffff8803f0903e00
>[  113.320881] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.320882] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.320884] [drm:drm_atomic_commit] commiting ffff8803f0903e00
>[  113.320898] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.320902] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903e00
>[  113.320903] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903e00
>[  113.330898] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903600
>[  113.330903] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0903600
>[  113.330905] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0903600
>[  113.330906] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.330907] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.330908] [drm:drm_atomic_check_only] checking ffff8803f0903600
>[  113.330913] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.330914] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.330915] [drm:drm_atomic_commit] commiting ffff8803f0903600
>[  113.330929] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.330934] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903600
>[  113.330935] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903600
>[  113.340932] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900200
>[  113.340936] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0900200
>[  113.340939] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0900200
>[  113.340940] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.340941] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.340942] [drm:drm_atomic_check_only] checking ffff8803f0900200
>[  113.340947] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.340948] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.340949] [drm:drm_atomic_commit] commiting ffff8803f0900200
>[  113.340963] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.340967] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900200
>[  113.340969] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900200
>[  113.350961] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900a00
>[  113.350965] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0900a00
>[  113.350968] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0900a00
>[  113.350969] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.350970] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.350971] [drm:drm_atomic_check_only] checking ffff8803f0900a00
>[  113.350975] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.350976] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.350978] [drm:drm_atomic_commit] commiting ffff8803f0900a00
>[  113.350992] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.350996] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900a00
>[  113.350998] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900a00
>[  113.361002] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903400
>[  113.361006] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0903400
>[  113.361008] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0903400
>[  113.361009] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.361010] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.361011] [drm:drm_atomic_check_only] checking ffff8803f0903400
>[  113.361015] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.361017] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.361018] [drm:drm_atomic_commit] commiting ffff8803f0903400
>[  113.361032] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.361036] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903400
>[  113.361038] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903400
>[  113.371024] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901200
>[  113.371029] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0901200
>[  113.371031] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0901200
>[  113.371032] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.371033] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.371034] [drm:drm_atomic_check_only] checking ffff8803f0901200
>[  113.371038] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.371040] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.371041] [drm:drm_atomic_commit] commiting ffff8803f0901200
>[  113.371055] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.371059] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901200
>[  113.371061] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901200
>[  113.381051] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900c00
>[  113.381055] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0900c00
>[  113.381057] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0900c00
>[  113.381058] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.381059] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.381060] [drm:drm_atomic_check_only] checking ffff8803f0900c00
>[  113.381065] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.381066] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.381067] [drm:drm_atomic_commit] commiting ffff8803f0900c00
>[  113.381082] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.381086] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900c00
>[  113.381088] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900c00
>[  113.391081] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902c00
>[  113.391086] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0902c00
>[  113.391088] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0902c00
>[  113.391089] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.391090] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.391091] [drm:drm_atomic_check_only] checking ffff8803f0902c00
>[  113.391096] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.391097] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.391098] [drm:drm_atomic_commit] commiting ffff8803f0902c00
>[  113.391112] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.391116] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902c00
>[  113.391118] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902c00
>[  113.401115] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903800
>[  113.401119] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0903800
>[  113.401122] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0903800
>[  113.401123] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.401124] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.401125] [drm:drm_atomic_check_only] checking ffff8803f0903800
>[  113.401130] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.401131] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.401132] [drm:drm_atomic_commit] commiting ffff8803f0903800
>[  113.401146] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.401151] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903800
>[  113.401152] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903800
>[  113.411140] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903200
>[  113.411144] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0903200
>[  113.411146] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0903200
>[  113.411147] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.411148] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.411150] [drm:drm_atomic_check_only] checking ffff8803f0903200
>[  113.411154] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.411155] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.411156] [drm:drm_atomic_commit] commiting ffff8803f0903200
>[  113.411170] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.411175] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903200
>[  113.411176] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903200
>[  113.431232] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901800
>[  113.431237] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0901800
>[  113.431239] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0901800
>[  113.431240] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.431241] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.431242] [drm:drm_atomic_check_only] checking ffff8803f0901800
>[  113.431247] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.431248] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.431249] [drm:drm_atomic_commit] commiting ffff8803f0901800
>[  113.431263] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.431267] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901800
>[  113.431269] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901800
>[  113.441264] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903c00
>[  113.441269] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0903c00
>[  113.441271] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0903c00
>[  113.441272] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.441273] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.441275] [drm:drm_atomic_check_only] checking ffff8803f0903c00
>[  113.441279] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.441280] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.441282] [drm:drm_atomic_commit] commiting ffff8803f0903c00
>[  113.441296] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.441300] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903c00
>[  113.441302] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903c00
>[  113.471358] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903000
>[  113.471362] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0903000
>[  113.471364] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0903000
>[  113.471366] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.471367] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.471368] [drm:drm_atomic_check_only] checking ffff8803f0903000
>[  113.471372] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.471373] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.471375] [drm:drm_atomic_commit] commiting ffff8803f0903000
>[  113.471389] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.471393] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903000
>[  113.471394] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903000
>[  113.511482] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900000
>[  113.511487] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0900000
>[  113.511489] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0900000
>[  113.511490] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.511491] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.511492] [drm:drm_atomic_check_only] checking ffff8803f0900000
>[  113.511497] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.511498] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.511499] [drm:drm_atomic_commit] commiting ffff8803f0900000
>[  113.511513] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.511518] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900000
>[  113.511519] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900000
>[  113.531548] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901a00
>[  113.531553] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0901a00
>[  113.531555] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0901a00
>[  113.531556] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.531557] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.531558] [drm:drm_atomic_check_only] checking ffff8803f0901a00
>[  113.531563] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.531564] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.531565] [drm:drm_atomic_commit] commiting ffff8803f0901a00
>[  113.531579] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.531583] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901a00
>[  113.531585] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901a00
>[  113.551640] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901600
>[  113.551644] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0901600
>[  113.551646] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0901600
>[  113.551647] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.551648] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.551650] [drm:drm_atomic_check_only] checking ffff8803f0901600
>[  113.551654] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.551655] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.551657] [drm:drm_atomic_commit] commiting ffff8803f0901600
>[  113.551671] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.551675] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901600
>[  113.551677] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901600
>[  113.571730] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902800
>[  113.571735] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0902800
>[  113.571737] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0902800
>[  113.571738] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.571739] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.571740] [drm:drm_atomic_check_only] checking ffff8803f0902800
>[  113.571745] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.571746] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.571747] [drm:drm_atomic_commit] commiting ffff8803f0902800
>[  113.571761] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.571765] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902800
>[  113.571767] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902800
>[  113.591792] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901400
>[  113.591796] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0901400
>[  113.591798] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0901400
>[  113.591799] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.591800] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.591801] [drm:drm_atomic_check_only] checking ffff8803f0901400
>[  113.591805] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.591807] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.591808] [drm:drm_atomic_commit] commiting ffff8803f0901400
>[  113.591822] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.591826] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901400
>[  113.591828] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901400
>[  113.611853] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902000
>[  113.611858] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0902000
>[  113.611860] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0902000
>[  113.611861] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.611862] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.611863] [drm:drm_atomic_check_only] checking ffff8803f0902000
>[  113.611868] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.611869] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.611870] [drm:drm_atomic_commit] commiting ffff8803f0902000
>[  113.611885] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.611889] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902000
>[  113.611890] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902000
>[  113.629832] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900e00
>[  113.629837] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0900e00
>[  113.629839] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0900e00
>[  113.629840] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.629841] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.629842] [drm:drm_atomic_check_only] checking ffff8803f0900e00
>[  113.629847] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.629848] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.629849] [drm:drm_atomic_commit] commiting ffff8803f0900e00
>[  113.629863] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.629867] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900e00
>[  113.629869] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900e00
>[  113.649884] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900400
>[  113.649888] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0900400
>[  113.649890] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0900400
>[  113.649891] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.649892] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.649893] [drm:drm_atomic_check_only] checking ffff8803f0900400
>[  113.649898] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.649899] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.649900] [drm:drm_atomic_commit] commiting ffff8803f0900400
>[  113.649915] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.649919] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900400
>[  113.649920] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900400
>[  113.656774] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902200
>[  113.656779] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0902200
>[  113.656781] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0902200
>[  113.656782] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.656783] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.656784] [drm:drm_atomic_check_only] checking ffff8803f0902200
>[  113.656789] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.656790] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.656791] [drm:drm_atomic_commit] commiting ffff8803f0902200
>[  113.656805] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.656810] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902200
>[  113.656811] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902200
>[  113.669953] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901e00
>[  113.669958] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0901e00
>[  113.669960] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0901e00
>[  113.669961] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.669962] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.669963] [drm:drm_atomic_check_only] checking ffff8803f0901e00
>[  113.669967] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.669969] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.669970] [drm:drm_atomic_commit] commiting ffff8803f0901e00
>[  113.669984] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.669988] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901e00
>[  113.669990] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901e00
>[  113.676842] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901c00
>[  113.676847] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0901c00
>[  113.676849] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0901c00
>[  113.676850] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.676851] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.676852] [drm:drm_atomic_check_only] checking ffff8803f0901c00
>[  113.676857] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.676858] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.676859] [drm:drm_atomic_commit] commiting ffff8803f0901c00
>[  113.676873] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.676878] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901c00
>[  113.676879] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901c00
>[  113.690017] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901e00
>[  113.690021] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0901e00
>[  113.690023] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0901e00
>[  113.690024] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.690025] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.690027] [drm:drm_atomic_check_only] checking ffff8803f0901e00
>[  113.690031] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.690032] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.690033] [drm:drm_atomic_commit] commiting ffff8803f0901e00
>[  113.690047] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.690052] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901e00
>[  113.690053] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901e00
>[  113.696919] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902200
>[  113.696923] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0902200
>[  113.696926] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0902200
>[  113.696927] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.696928] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.696929] [drm:drm_atomic_check_only] checking ffff8803f0902200
>[  113.696933] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.696934] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.696936] [drm:drm_atomic_commit] commiting ffff8803f0902200
>[  113.696950] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.696954] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902200
>[  113.696955] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902200
>[  113.710082] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900400
>[  113.710086] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0900400
>[  113.710089] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0900400
>[  113.710090] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.710091] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.710092] [drm:drm_atomic_check_only] checking ffff8803f0900400
>[  113.710097] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.710098] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.710099] [drm:drm_atomic_commit] commiting ffff8803f0900400
>[  113.710113] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.710117] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900400
>[  113.710118] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900400
>[  113.720132] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900800
>[  113.720137] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0900800
>[  113.720139] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0900800
>[  113.720140] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.720141] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.720142] [drm:drm_atomic_check_only] checking ffff8803f0900800
>[  113.720147] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.720148] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.720149] [drm:drm_atomic_commit] commiting ffff8803f0900800
>[  113.720163] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.720167] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900800
>[  113.720168] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900800
>[  113.730159] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900e00
>[  113.730164] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0900e00
>[  113.730166] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0900e00
>[  113.730167] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.730168] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.730169] [drm:drm_atomic_check_only] checking ffff8803f0900e00
>[  113.730173] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.730174] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.730176] [drm:drm_atomic_commit] commiting ffff8803f0900e00
>[  113.730190] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.730194] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900e00
>[  113.730196] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900e00
>[  113.740180] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902000
>[  113.740184] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0902000
>[  113.740186] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0902000
>[  113.740187] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.740188] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.740189] [drm:drm_atomic_check_only] checking ffff8803f0902000
>[  113.740194] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.740195] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.740196] [drm:drm_atomic_commit] commiting ffff8803f0902000
>[  113.740210] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.740214] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902000
>[  113.740216] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902000
>[  113.750215] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900600
>[  113.750219] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0900600
>[  113.750221] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0900600
>[  113.750222] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.750224] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.750225] [drm:drm_atomic_check_only] checking ffff8803f0900600
>[  113.750229] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.750230] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.750231] [drm:drm_atomic_commit] commiting ffff8803f0900600
>[  113.750245] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.750250] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900600
>[  113.750251] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900600
>[  113.770277] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902800
>[  113.770281] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0902800
>[  113.770284] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0902800
>[  113.770285] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.770286] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.770287] [drm:drm_atomic_check_only] checking ffff8803f0902800
>[  113.770291] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.770293] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.770294] [drm:drm_atomic_commit] commiting ffff8803f0902800
>[  113.770308] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.770312] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902800
>[  113.770313] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902800
>[  113.780342] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901600
>[  113.780346] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0901600
>[  113.780348] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0901600
>[  113.780349] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.780351] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.780352] [drm:drm_atomic_check_only] checking ffff8803f0901600
>[  113.780356] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.780357] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.780359] [drm:drm_atomic_commit] commiting ffff8803f0901600
>[  113.780373] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.780377] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901600
>[  113.780379] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901600
>[  113.800397] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901a00
>[  113.800401] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0901a00
>[  113.800403] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0901a00
>[  113.800404] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.800405] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.800406] [drm:drm_atomic_check_only] checking ffff8803f0901a00
>[  113.800411] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.800412] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.800413] [drm:drm_atomic_commit] commiting ffff8803f0901a00
>[  113.800427] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.800432] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901a00
>[  113.800433] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901a00
>[  113.810426] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902e00
>[  113.810431] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803f0902e00
>[  113.810433] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0902e00
>[  113.810434] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  113.810435] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  113.810436] [drm:drm_atomic_check_only] checking ffff8803f0902e00
>[  113.810441] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.810442] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.810443] [drm:drm_atomic_commit] commiting ffff8803f0902e00
>[  113.810457] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.810462] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902e00
>[  113.810463] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902e00
>[  113.820453] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900000
>[  113.820457] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45fcc0 state to ffff8803f0900000
>[  113.820459] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0900000
>[  113.820461] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45fcc0 to [CRTC:21]
>[  113.820462] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45fcc0
>[  113.820463] [drm:drm_atomic_check_only] checking ffff8803f0900000
>[  113.820467] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  113.820469] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  113.820470] [drm:drm_atomic_commit] commiting ffff8803f0900000
>[  113.820484] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  113.820488] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900000
>[  113.820490] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900000
>[  113.868898] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  119.078182] [drm:drm_atomic_state_init] Allocated atomic state ffff88041b52b400
>[  119.078186] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd60cf00 state to ffff88041b52b400
>[  119.078188] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38e400 state to ffff88041b52b400
>[  119.078189] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd60cf00 to [NOCRTC]
>[  119.078190] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800bd60cf00
>[  119.078192] [drm:drm_atomic_check_only] checking ffff88041b52b400
>[  119.078195] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb -1
>[  119.078197] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 0, off 1, on 0, ms 0
>[  119.078198] [drm:drm_atomic_commit] commiting ffff88041b52b400
>[  119.078214] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041b52b400
>[  119.078216] [drm:drm_atomic_state_free] Freeing atomic state ffff88041b52b400
>[  124.155753] [drm:ilk_fbc_disable] disabled FBC
>[  124.212613] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  124.559048] [drm:drm_atomic_state_init] Allocated atomic state ffff88041b528c00
>[  124.559053] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd60c600 state to ffff88041b528c00
>[  124.559055] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38c800 state to ffff88041b528c00
>[  124.559056] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd60c600 to [CRTC:21]
>[  124.559057] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd60c600
>[  124.559058] [drm:drm_atomic_check_only] checking ffff88041b528c00
>[  124.559071] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  124.559073] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[  124.559074] [drm:drm_atomic_commit] commiting ffff88041b528c00
>[  124.559092] [drm:ilk_fbc_disable] disabled FBC
>[  124.559095] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041b528c00
>[  124.559096] [drm:drm_atomic_state_free] Freeing atomic state ffff88041b528c00
>[  124.603540] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  124.620188] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  124.636878] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  124.653559] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  124.670259] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  124.686945] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  124.703609] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  124.720295] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  124.753688] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  124.770377] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  124.787065] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  124.820439] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  124.837154] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  124.853844] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  124.870515] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  124.903923] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  124.920595] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  124.937308] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  124.986719] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  126.111150] [drm:ilk_fbc_disable] disabled FBC
>[  126.138842] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.155493] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.188898] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.205576] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.222267] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.238937] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.255626] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.276056] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.276110] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.298779] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.298841] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.316769] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.316822] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.339077] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.355773] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.372479] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.389140] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.389383] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.418859] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.448144] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.477023] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.505379] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.526895] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.574908] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  126.614428] [drm:ilk_fbc_disable] disabled FBC
>[  126.637910] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.637973] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.662091] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.662142] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.683807] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.683868] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.702887] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.702935] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.721898] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.721947] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.742060] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.742112] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.761050] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.761124] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.784490] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.813609] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.842680] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.871613] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.900563] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.928841] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.957288] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  126.989937] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.006604] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.055400] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  127.056838] [drm:ilk_fbc_disable] disabled FBC
>[  127.080415] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.080463] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.101643] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.101697] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.123670] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.123719] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.145645] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.145695] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.165990] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.166033] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.186824] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.186882] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.205662] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.205718] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.240261] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.256962] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.263021] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.292181] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.320901] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.349133] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.377909] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.406337] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.434865] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.463188] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.557361] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.563698] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.563756] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.585503] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.585563] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.607684] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.607721] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.629338] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.629398] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.649385] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.649441] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.668043] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.668114] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.690871] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.708017] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.737482] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.767083] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.796015] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.825626] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.854917] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.876786] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.876975] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.891127] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.907805] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.924523] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.987251] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  127.987303] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  128.008024] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  128.066402] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  129.102309] [drm:drm_atomic_state_init] Allocated atomic state ffff88040adbbe00
>[  129.102315] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880411500300 state to ffff88040adbbe00
>[  129.102318] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880402d67c00 state to ffff88040adbbe00
>[  129.102319] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880411500300 to [NOCRTC]
>[  129.102321] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880411500300
>[  129.102323] [drm:drm_atomic_check_only] checking ffff88040adbbe00
>[  129.102328] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb -1
>[  129.102330] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 0, off 1, on 0, ms 0
>[  129.102331] [drm:drm_atomic_commit] commiting ffff88040adbbe00
>[  129.102352] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040adbbe00
>[  129.102355] [drm:drm_atomic_state_free] Freeing atomic state ffff88040adbbe00
>[  129.124469] [drm:ilk_fbc_disable] disabled FBC
>[  129.180917] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  129.597963] [drm:ilk_fbc_disable] disabled FBC
>[  129.643455] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  129.691429] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  130.708132] [drm:ilk_fbc_disable] disabled FBC
>[  130.765836] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  131.151454] [drm:ilk_fbc_disable] disabled FBC
>[  131.162283] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  131.195442] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  131.228888] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  131.276351] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  131.645747] [drm:ilk_fbc_disable] disabled FBC
>[  131.656811] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  131.713452] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  131.825495] [drm:ilk_fbc_disable] disabled FBC
>[  131.883622] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  132.223780] [drm:ilk_fbc_disable] disabled FBC
>[  132.263520] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  132.310687] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  132.647734] [drm:ilk_fbc_disable] disabled FBC
>[  132.704443] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  132.991360] [drm:ilk_fbc_disable] disabled FBC
>[  133.031196] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  133.078155] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  133.295167] [drm:ilk_fbc_disable] disabled FBC
>[  133.351760] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  133.618646] [drm:ilk_fbc_disable] disabled FBC
>[  133.665355] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  133.715426] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  133.936712] [drm:ilk_fbc_disable] disabled FBC
>[  133.992371] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  134.336030] [drm:ilk_fbc_disable] disabled FBC
>[  134.382992] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  134.432841] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  134.671228] [drm:ilk_fbc_disable] disabled FBC
>[  134.726468] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  135.023392] [drm:ilk_fbc_disable] disabled FBC
>[  135.067187] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  135.116831] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  135.316312] [drm:ilk_fbc_disable] disabled FBC
>[  135.373785] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  135.660716] [drm:ilk_fbc_disable] disabled FBC
>[  135.701378] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  135.750827] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  135.941990] [drm:ilk_fbc_disable] disabled FBC
>[  135.997741] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  136.231291] [drm:ilk_fbc_disable] disabled FBC
>[  136.285465] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  136.334746] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  136.545189] [drm:ilk_fbc_disable] disabled FBC
>[  136.601680] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  136.888169] [drm:ilk_fbc_disable] disabled FBC
>[  136.936322] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  136.985397] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  137.165257] [drm:ilk_fbc_disable] disabled FBC
>[  137.222301] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  137.479182] [drm:ilk_fbc_disable] disabled FBC
>[  137.520389] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  137.569284] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  137.731957] [drm:ilk_fbc_disable] disabled FBC
>[  137.786197] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  138.076454] [drm:ilk_fbc_disable] disabled FBC
>[  138.186600] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  138.331429] [drm:ilk_fbc_disable] disabled FBC
>[  138.386800] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  138.690401] [drm:ilk_fbc_disable] disabled FBC
>[  138.738641] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  138.787158] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  138.949803] [drm:ilk_fbc_disable] disabled FBC
>[  139.007420] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  139.260979] [drm:ilk_fbc_disable] disabled FBC
>[  139.306030] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  139.354404] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  139.537490] [drm:ilk_fbc_disable] disabled FBC
>[  139.594675] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  139.891596] [drm:ilk_fbc_disable] disabled FBC
>[  139.940249] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  139.988402] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  140.195894] [drm:ilk_fbc_disable] disabled FBC
>[  140.251998] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  140.515554] [drm:ilk_fbc_disable] disabled FBC
>[  140.557664] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  140.605657] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  140.800778] [drm:ilk_fbc_disable] disabled FBC
>[  140.855939] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  141.129496] [drm:ilk_fbc_disable] disabled FBC
>[  141.175195] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  141.222972] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  141.396618] [drm:ilk_fbc_disable] disabled FBC
>[  141.449867] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  141.683392] [drm:ilk_fbc_disable] disabled FBC
>[  141.725856] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  141.773493] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  141.935752] [drm:ilk_fbc_disable] disabled FBC
>[  141.993742] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  142.220610] [drm:ilk_fbc_disable] disabled FBC
>[  142.274024] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  142.430504] [drm:ilk_fbc_disable] disabled FBC
>[  142.487564] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  142.781137] [drm:ilk_fbc_disable] disabled FBC
>[  142.827320] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  142.874594] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  143.005547] [drm:ilk_fbc_disable] disabled FBC
>[  143.061451] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  143.328366] [drm:ilk_fbc_disable] disabled FBC
>[  143.378069] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  143.425173] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  143.590692] [drm:ilk_fbc_disable] disabled FBC
>[  143.645395] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  143.912297] [drm:ilk_fbc_disable] disabled FBC
>[  143.945448] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  143.992380] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  144.164569] [drm:ilk_fbc_disable] disabled FBC
>[  144.222609] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  144.549598] [drm:ilk_fbc_disable] disabled FBC
>[  144.596276] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  144.646330] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  144.850083] [drm:ilk_fbc_disable] disabled FBC
>[  144.906660] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  145.165257] [drm:ilk_fbc_disable] disabled FBC
>[  145.176035] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  145.213735] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  145.247147] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  145.297020] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  145.663155] [drm:ilk_fbc_disable] disabled FBC
>[  145.674203] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  145.730819] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  145.811777] [drm:ilk_fbc_disable] disabled FBC
>[  145.867592] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  146.095432] [drm:ilk_fbc_disable] disabled FBC
>[  146.148357] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  146.197952] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  146.466110] [drm:ilk_fbc_disable] disabled FBC
>[  146.521608] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  146.758472] [drm:ilk_fbc_disable] disabled FBC
>[  146.799187] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  146.848603] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  148.551328] pci_bus 0000:04: Allocating resources
>[  148.551342] pci_bus 0000:06: Allocating resources
>[  148.551357] pci_bus 0000:07: Allocating resources
>[  148.551368] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[  148.551485] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[  148.552036] [drm:drm_atomic_state_init] Allocated atomic state ffff88040adb9600
>[  148.552039] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880402d67800 state to ffff88040adb9600
>[  148.552041] [drm:drm_atomic_check_only] checking ffff88040adb9600
>[  148.552043] [drm:drm_atomic_helper_check_modeset] [CRTC:21] active changed
>[  148.552044] [drm:drm_atomic_helper_check_modeset] [CRTC:21] needs all connectors, enable: y, active: n
>[  148.552045] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88040adb9600
>[  148.552047] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:34] ffff880413942f20 state to ffff88040adb9600
>[  148.552049] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff8803f9678540 state to ffff88040adb9600
>[  148.552050] [drm:drm_atomic_connectors_for_crtc] State ffff88040adb9600 has 1 connectors for [CRTC:21]
>[  148.552061] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff88040adb9600
>[  148.552063] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[  148.552064] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to EDID reported max of 24
>[  148.552067] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 540000 pixel clock 373250KHz
>[  148.552070] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 24
>[  148.552071] [drm:intel_dp_compute_config] DP link bw required 895800 available 1728000
>[  148.552073] [drm:intel_modeset_pipe_config] plane bpp: 36, pipe bpp: 24, dithering: 0
>[  148.552074] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config ffff880402d67800 for pipe A
>[  148.552075] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  148.552076] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  148.552077] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  148.552078] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4348677, gmch_n: 8388608, link_m: 724779, link_n: 1048576, tu: 64
>[  148.552079] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  148.552080] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  148.552081] [drm:intel_dump_pipe_config] requested mode:
>[  148.552083] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x0 0xa
>[  148.552083] [drm:intel_dump_pipe_config] adjusted mode:
>[  148.552085] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[  148.552086] [drm:intel_dump_crtc_timings] crtc timings: 373250 3200 3248 3280 3360 1800 1803 1808 1852, type: 0x48 flags: 0xa
>[  148.552087] [drm:intel_dump_pipe_config] port clock: 540000
>[  148.552088] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[  148.552089] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[  148.552090] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  148.552091] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  148.552091] [drm:intel_dump_pipe_config] ips: 0
>[  148.552092] [drm:intel_dump_pipe_config] double wide: 0
>[  148.552093] [drm:intel_dump_pipe_config] ddi_pll_sel: 0; dpll_hw_state: wrpll: 0x0
>[  148.552094] [drm:intel_dump_pipe_config] planes on this crtc
>[  148.552095] [drm:intel_dump_pipe_config] STANDARD PLANE:18 plane: 0.0 idx: 0 enabled
>[  148.552096] [drm:intel_dump_pipe_config]         FB:51, fb = 3200x1800 format = 0x34325258
>[  148.552097] [drm:intel_dump_pipe_config]         scaler:0 src (0, 0) 3200x1800 dst (0, 0) 3200x1800
>[  148.552098] [drm:intel_dump_pipe_config] CURSOR PLANE:20 plane: 0.1 idx: 1 disabled, scaler_id = 0
>[  148.552100] [drm:intel_dump_pipe_config] STANDARD PLANE:22 plane: 0.1 idx: 2 disabled, scaler_id = 0
>[  148.552102] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 51
>[  148.552103] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 1 -> 0, off 1, on 0, ms 1
>[  148.552105] [drm:drm_atomic_commit] commiting ffff88040adb9600
>[  148.552111] [drm:ilk_fbc_disable] disabled FBC
>[  148.552115] [drm:set_no_fbc_reason] Disabling FBC: no output
>[  148.552117] [drm:intel_edp_backlight_off] 
>[  148.620496] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[  148.620549] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[  148.620579] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[  148.620728] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[  148.620738] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[  148.620812] pci_bus 0000:02: Allocating resources
>[  148.620818] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[  148.620845] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[  148.620900] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[  148.753832] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  148.753844] [drm:intel_disable_pipe] disabling pipe A
>[  148.769608] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  148.769618] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  148.769799] [drm:edp_panel_off] Turn eDP port A panel power off
>[  148.769805] [drm:wait_panel_off] Wait for panel power off time
>[  148.769808] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  148.830076] [drm:wait_panel_status] Wait complete
>[  148.830089] [drm:intel_power_well_disable] disabling always-on
>[  148.830095] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[  148.830097] [drm:check_encoder_state] [ENCODER:32:DAC-32]
>[  148.830099] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  148.830100] [drm:check_encoder_state] [ENCODER:41:TMDS-41]
>[  148.830101] [drm:check_encoder_state] [ENCODER:44:TMDS-44]
>[  148.830102] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  148.830103] [drm:check_encoder_state] [ENCODER:47:DP MST-47]
>[  148.830103] [drm:check_encoder_state] [ENCODER:48:DP MST-48]
>[  148.830104] [drm:check_crtc_state] [CRTC:21]
>[  148.830107] [drm:check_shared_dpll_state] WRPLL 1
>[  148.830108] [drm:check_shared_dpll_state] WRPLL 2
>[  148.830109] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040adb9600
>[  148.830112] [drm:drm_atomic_state_free] Freeing atomic state ffff88040adb9600
>[  149.823985] pci_bus 0000:04: Allocating resources
>[  149.824000] pci_bus 0000:06: Allocating resources
>[  149.824016] pci_bus 0000:07: Allocating resources
>[  149.824037] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[  149.824168] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[  149.891772] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[  149.891827] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[  149.891857] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[  149.892009] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[  149.892020] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[  149.892093] pci_bus 0000:02: Allocating resources
>[  149.892099] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[  149.892126] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[  149.892180] i915 0000:00:02.0: BAR 6: [??? 0x00000000 flags 0x2] has bogus alignment
>[  150.588740] [drm:drm_mode_setcrtc] [CRTC:21]
>[  150.588746] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1]
>[  150.588749] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903200
>[  150.588752] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a66800 state to ffff8803f0903200
>[  150.588754] [drm:drm_atomic_get_plane_state] Added [PLANE:18] ffff88041be60240 state to ffff8803f0903200
>[  150.588756] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:3200x1800] for CRTC state ffff8800c8a66800
>[  150.588757] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041be60240 to [CRTC:21]
>[  150.588758] [drm:drm_atomic_set_fb_for_plane] Set [FB:51] for plane state ffff88041be60240
>[  150.588760] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:34] ffff880413ae7ee0 state to ffff8803f0903200
>[  150.588761] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff8803f0903200
>[  150.588762] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880413ae7ee0 to [NOCRTC]
>[  150.588763] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880413ae7ee0 to [CRTC:21]
>[  150.588764] [drm:drm_atomic_check_only] checking ffff8803f0903200
>[  150.588766] [drm:update_connector_routing] Updating routing for [CONNECTOR:34:eDP-1]
>[  150.588768] [drm:update_connector_routing] [CONNECTOR:34:eDP-1] keeps [ENCODER:33:TMDS-33], now on [CRTC:21]
>[  150.588769] [drm:drm_atomic_helper_check_modeset] [CRTC:21] active changed
>[  150.588770] [drm:drm_atomic_helper_check_modeset] [CRTC:21] needs all connectors, enable: y, active: y
>[  150.588771] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff8803f0903200
>[  150.588772] [drm:drm_atomic_connectors_for_crtc] State ffff8803f0903200 has 1 connectors for [CRTC:21]
>[  150.588774] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:21] to ffff8803f0903200
>[  150.588775] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[  150.588776] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to EDID reported max of 24
>[  150.588779] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 540000 pixel clock 373250KHz
>[  150.588782] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 24
>[  150.588783] [drm:intel_dp_compute_config] DP link bw required 895800 available 1728000
>[  150.588785] [drm:intel_modeset_pipe_config] plane bpp: 36, pipe bpp: 24, dithering: 0
>[  150.588786] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config ffff8800c8a66800 for pipe A
>[  150.588787] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  150.588788] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  150.588789] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  150.588790] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4348677, gmch_n: 8388608, link_m: 724779, link_n: 1048576, tu: 64
>[  150.588791] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  150.588792] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  150.588793] [drm:intel_dump_pipe_config] requested mode:
>[  150.588795] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x0 0xa
>[  150.588795] [drm:intel_dump_pipe_config] adjusted mode:
>[  150.588797] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[  150.588798] [drm:intel_dump_crtc_timings] crtc timings: 373250 3200 3248 3280 3360 1800 1803 1808 1852, type: 0x48 flags: 0xa
>[  150.588799] [drm:intel_dump_pipe_config] port clock: 540000
>[  150.588800] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[  150.588801] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
>[  150.588802] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  150.588803] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  150.588803] [drm:intel_dump_pipe_config] ips: 0
>[  150.588804] [drm:intel_dump_pipe_config] double wide: 0
>[  150.588805] [drm:intel_dump_pipe_config] ddi_pll_sel: 0; dpll_hw_state: wrpll: 0x0
>[  150.588806] [drm:intel_dump_pipe_config] planes on this crtc
>[  150.588807] [drm:intel_dump_pipe_config] STANDARD PLANE:18 plane: 0.0 idx: 0 enabled
>[  150.588808] [drm:intel_dump_pipe_config]         FB:51, fb = 3200x1800 format = 0x34325258
>[  150.588809] [drm:intel_dump_pipe_config]         scaler:0 src (0, 0) 0x0 dst (0, 0) 0x0
>[  150.588811] [drm:intel_dump_pipe_config] CURSOR PLANE:20 plane: 0.1 idx: 1 disabled, scaler_id = 0
>[  150.588812] [drm:intel_dump_pipe_config] STANDARD PLANE:22 plane: 0.1 idx: 2 disabled, scaler_id = 0
>[  150.588814] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff8800c8a65400 state to ffff8803f0903200
>[  150.588815] [drm:drm_atomic_get_crtc_state] Added [CRTC:29] ffff8800c8a66400 state to ffff8803f0903200
>[  150.588817] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:18] with fb 51
>[  150.588818] [drm:intel_plane_atomic_calc_changes] [PLANE:18] visible 0 -> 1, off 0, on 1, ms 1
>[  150.588820] [drm:drm_atomic_commit] commiting ffff8803f0903200
>[  150.588827] [drm:intel_power_well_enable] enabling always-on
>[  150.588837] [drm:edp_panel_on] Turn eDP port A panel power on
>[  150.588840] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  150.588843] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[  150.588846] [drm:wait_panel_status] Wait complete
>[  150.588848] [drm:wait_panel_on] Wait for panel power on
>[  150.588851] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[  150.809366] [drm:wait_panel_status] Wait complete
>[  150.809375] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  150.809382] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  150.810756] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  150.810758] [drm:intel_dp_set_signal_levels] Using vswing level 0
>[  150.810758] [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0
>[  150.815296] [drm:intel_dp_start_link_train] clock recovery not ok, reset
>[  150.815297] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  150.815299] [drm:intel_dp_set_signal_levels] Using vswing level 0
>[  150.815300] [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0
>[  150.819837] [drm:intel_dp_start_link_train] clock recovery OK
>[  150.824375] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  150.824452] [drm:intel_enable_pipe] enabling pipe A
>[  150.824607] [drm:intel_edp_backlight_on] 
>[  150.824609] [drm:intel_panel_enable_backlight] pipe A
>[  150.824613] [drm:intel_panel_actually_set_backlight] set backlight PWM = 4882
>[  150.832594] [drm:intel_psr_match_conditions] PSR disable by flag
>[  150.832598] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[  150.841310] [drm:intel_fbc_alloc_cfb] reserved 23040000 bytes of contiguous stolen space for FBC
>[  150.841315] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  150.841323] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[  150.841327] [drm:check_encoder_state] [ENCODER:32:DAC-32]
>[  150.841328] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  150.841329] [drm:check_encoder_state] [ENCODER:41:TMDS-41]
>[  150.841330] [drm:check_encoder_state] [ENCODER:44:TMDS-44]
>[  150.841332] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  150.841333] [drm:check_encoder_state] [ENCODER:47:DP MST-47]
>[  150.841333] [drm:check_encoder_state] [ENCODER:48:DP MST-48]
>[  150.841335] [drm:check_crtc_state] [CRTC:21]
>[  150.841342] [drm:check_shared_dpll_state] WRPLL 1
>[  150.841343] [drm:check_shared_dpll_state] WRPLL 2
>[  150.841345] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903200
>[  150.841348] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903200
>[  150.841362] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903200
>[  150.841365] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63800 state to ffff8803f0903200
>[  150.841366] [drm:drm_atomic_check_only] checking ffff8803f0903200
>[  150.841368] [drm:drm_atomic_commit] commiting ffff8803f0903200
>[  150.841374] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903200
>[  150.841375] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903200
>[  150.841383] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=4882/4882
>[  150.841384] [drm:intel_panel_actually_set_backlight] set backlight PWM = 4882
>[  150.843514] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902400
>[  150.843518] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041be60480 state to ffff8803f0902400
>[  150.843521] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63000 state to ffff8803f0902400
>[  150.843522] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041be60480 to [CRTC:21]
>[  150.843524] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041be60480
>[  150.843525] [drm:drm_atomic_check_only] checking ffff8803f0902400
>[  150.843529] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  150.843531] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[  150.843533] [drm:drm_atomic_commit] commiting ffff8803f0902400
>[  150.843549] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  150.843553] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902400
>[  150.843555] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902400
>[  150.892652] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  150.910900] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902400
>[  150.910904] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041be60540 state to ffff8803f0902400
>[  150.910906] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63800 state to ffff8803f0902400
>[  150.910907] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041be60540 to [CRTC:21]
>[  150.910908] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041be60540
>[  150.910909] [drm:drm_atomic_check_only] checking ffff8803f0902400
>[  150.910914] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  150.910915] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  150.910916] [drm:drm_atomic_commit] commiting ffff8803f0902400
>[  150.910931] [drm:ilk_fbc_disable] disabled FBC
>[  150.910935] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902400
>[  150.910936] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902400
>[  150.920945] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900a00
>[  150.920950] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041be60480 state to ffff8803f0900a00
>[  150.920952] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63000 state to ffff8803f0900a00
>[  150.920953] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041be60480 to [CRTC:21]
>[  150.920954] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041be60480
>[  150.920955] [drm:drm_atomic_check_only] checking ffff8803f0900a00
>[  150.920960] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  150.920961] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  150.920962] [drm:drm_atomic_commit] commiting ffff8803f0900a00
>[  150.920976] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  150.920980] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900a00
>[  150.920982] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900a00
>[  150.930974] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901c00
>[  150.930978] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041be60540 state to ffff8803f0901c00
>[  150.930980] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63800 state to ffff8803f0901c00
>[  150.930981] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041be60540 to [CRTC:21]
>[  150.930982] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041be60540
>[  150.930984] [drm:drm_atomic_check_only] checking ffff8803f0901c00
>[  150.930988] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  150.930989] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  150.930991] [drm:drm_atomic_commit] commiting ffff8803f0901c00
>[  150.931005] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  150.931009] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901c00
>[  150.931010] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901c00
>[  150.940993] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901e00
>[  150.940998] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041be60480 state to ffff8803f0901e00
>[  150.941000] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63000 state to ffff8803f0901e00
>[  150.941001] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041be60480 to [CRTC:21]
>[  150.941002] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041be60480
>[  150.941003] [drm:drm_atomic_check_only] checking ffff8803f0901e00
>[  150.941008] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  150.941009] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  150.941010] [drm:drm_atomic_commit] commiting ffff8803f0901e00
>[  150.941024] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  150.941029] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901e00
>[  150.941030] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901e00
>[  150.951041] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902200
>[  150.951045] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041be60540 state to ffff8803f0902200
>[  150.951047] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63800 state to ffff8803f0902200
>[  150.951048] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041be60540 to [CRTC:21]
>[  150.951049] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041be60540
>[  150.951051] [drm:drm_atomic_check_only] checking ffff8803f0902200
>[  150.951055] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  150.951056] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  150.951057] [drm:drm_atomic_commit] commiting ffff8803f0902200
>[  150.951072] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  150.951076] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902200
>[  150.951078] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902200
>[  150.961061] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901600
>[  150.961066] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041be60480 state to ffff8803f0901600
>[  150.961068] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63000 state to ffff8803f0901600
>[  150.961069] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041be60480 to [CRTC:21]
>[  150.961070] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041be60480
>[  150.961071] [drm:drm_atomic_check_only] checking ffff8803f0901600
>[  150.961075] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  150.961077] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  150.961078] [drm:drm_atomic_commit] commiting ffff8803f0901600
>[  150.961092] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  150.961097] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901600
>[  150.961098] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901600
>[  150.971134] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900c00
>[  150.971138] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041be60540 state to ffff8803f0900c00
>[  150.971140] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63800 state to ffff8803f0900c00
>[  150.971142] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041be60540 to [CRTC:21]
>[  150.971143] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041be60540
>[  150.971144] [drm:drm_atomic_check_only] checking ffff8803f0900c00
>[  150.971148] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  150.971149] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  150.971150] [drm:drm_atomic_commit] commiting ffff8803f0900c00
>[  150.971165] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  150.971169] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900c00
>[  150.971171] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900c00
>[  150.981155] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903600
>[  150.981159] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041be60480 state to ffff8803f0903600
>[  150.981161] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63000 state to ffff8803f0903600
>[  150.981162] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041be60480 to [CRTC:21]
>[  150.981164] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041be60480
>[  150.981165] [drm:drm_atomic_check_only] checking ffff8803f0903600
>[  150.981169] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  150.981170] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  150.981172] [drm:drm_atomic_commit] commiting ffff8803f0903600
>[  150.981186] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  150.981190] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903600
>[  150.981192] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903600
>[  151.001223] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900200
>[  151.001227] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041be60540 state to ffff8803f0900200
>[  151.001229] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63800 state to ffff8803f0900200
>[  151.001230] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041be60540 to [CRTC:21]
>[  151.001232] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041be60540
>[  151.001233] [drm:drm_atomic_check_only] checking ffff8803f0900200
>[  151.001237] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  151.001238] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  151.001240] [drm:drm_atomic_commit] commiting ffff8803f0900200
>[  151.001254] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  151.001258] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900200
>[  151.001260] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900200
>[  151.008112] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902a00
>[  151.008116] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041be60480 state to ffff8803f0902a00
>[  151.008119] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63000 state to ffff8803f0902a00
>[  151.008120] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041be60480 to [CRTC:21]
>[  151.008121] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041be60480
>[  151.008122] [drm:drm_atomic_check_only] checking ffff8803f0902a00
>[  151.008129] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  151.008130] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  151.008131] [drm:drm_atomic_commit] commiting ffff8803f0902a00
>[  151.008145] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  151.008149] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902a00
>[  151.008151] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902a00
>[  151.021282] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901800
>[  151.021286] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041be60540 state to ffff8803f0901800
>[  151.021288] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63800 state to ffff8803f0901800
>[  151.021289] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041be60540 to [CRTC:21]
>[  151.021290] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041be60540
>[  151.021292] [drm:drm_atomic_check_only] checking ffff8803f0901800
>[  151.021296] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  151.021297] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  151.021298] [drm:drm_atomic_commit] commiting ffff8803f0901800
>[  151.021312] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  151.021316] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901800
>[  151.021318] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901800
>[  151.028177] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903c00
>[  151.028181] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041be60480 state to ffff8803f0903c00
>[  151.028183] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63000 state to ffff8803f0903c00
>[  151.028184] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041be60480 to [CRTC:21]
>[  151.028185] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041be60480
>[  151.028186] [drm:drm_atomic_check_only] checking ffff8803f0903c00
>[  151.028191] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  151.028192] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  151.028193] [drm:drm_atomic_commit] commiting ffff8803f0903c00
>[  151.028207] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  151.028212] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903c00
>[  151.028213] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903c00
>[  151.041349] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901000
>[  151.041353] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041be60540 state to ffff8803f0901000
>[  151.041355] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63800 state to ffff8803f0901000
>[  151.041356] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041be60540 to [CRTC:21]
>[  151.041357] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041be60540
>[  151.041358] [drm:drm_atomic_check_only] checking ffff8803f0901000
>[  151.041362] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  151.041364] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  151.041365] [drm:drm_atomic_commit] commiting ffff8803f0901000
>[  151.041379] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  151.041383] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901000
>[  151.041384] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901000
>[  151.048248] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900000
>[  151.048253] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041be60480 state to ffff8803f0900000
>[  151.048255] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63000 state to ffff8803f0900000
>[  151.048256] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041be60480 to [CRTC:21]
>[  151.048257] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041be60480
>[  151.048259] [drm:drm_atomic_check_only] checking ffff8803f0900000
>[  151.048263] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  151.048264] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  151.048265] [drm:drm_atomic_commit] commiting ffff8803f0900000
>[  151.048279] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  151.048284] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900000
>[  151.048285] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900000
>[  151.061416] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902600
>[  151.061421] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041be60540 state to ffff8803f0902600
>[  151.061423] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63800 state to ffff8803f0902600
>[  151.061424] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041be60540 to [CRTC:21]
>[  151.061425] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041be60540
>[  151.061426] [drm:drm_atomic_check_only] checking ffff8803f0902600
>[  151.061430] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  151.061432] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  151.061433] [drm:drm_atomic_commit] commiting ffff8803f0902600
>[  151.061447] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  151.061451] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902600
>[  151.061452] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902600
>[  151.071463] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900000
>[  151.071467] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041be60480 state to ffff8803f0900000
>[  151.071470] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63000 state to ffff8803f0900000
>[  151.071471] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041be60480 to [CRTC:21]
>[  151.071472] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041be60480
>[  151.071473] [drm:drm_atomic_check_only] checking ffff8803f0900000
>[  151.071477] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  151.071479] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  151.071480] [drm:drm_atomic_commit] commiting ffff8803f0900000
>[  151.071494] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  151.071499] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900000
>[  151.071500] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900000
>[  151.119543] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  151.528803] [drm:drm_atomic_state_init] Allocated atomic state ffff88041b529c00
>[  151.528808] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803f0844840 state to ffff88041b529c00
>[  151.528811] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38b400 state to ffff88041b529c00
>[  151.528813] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803f0844840 to [NOCRTC]
>[  151.528815] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8803f0844840
>[  151.528816] [drm:drm_atomic_check_only] checking ffff88041b529c00
>[  151.528821] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb -1
>[  151.528823] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 0, off 1, on 0, ms 0
>[  151.528825] [drm:drm_atomic_commit] commiting ffff88041b529c00
>[  151.528846] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041b529c00
>[  151.528849] [drm:drm_atomic_state_free] Freeing atomic state ffff88041b529c00
>[  151.551263] [drm:ilk_fbc_disable] disabled FBC
>[  151.606700] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  151.815218] [drm:ilk_fbc_disable] disabled FBC
>[  151.859318] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  151.906999] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  152.715842] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902200
>[  152.715847] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803f958c6c0 state to ffff8803f0902200
>[  152.715849] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63800 state to ffff8803f0902200
>[  152.715850] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803f958c6c0 to [CRTC:21]
>[  152.715851] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803f958c6c0
>[  152.715852] [drm:drm_atomic_check_only] checking ffff8803f0902200
>[  152.715856] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  152.715857] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[  152.715858] [drm:drm_atomic_commit] commiting ffff8803f0902200
>[  152.715876] [drm:ilk_fbc_disable] disabled FBC
>[  152.715879] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902200
>[  152.715881] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902200
>[  152.764535] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  152.938009] [drm:ilk_fbc_disable] disabled FBC
>[  152.977417] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.010775] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.027455] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.044154] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.060832] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.094243] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.110883] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.127603] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.144258] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.160980] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.194328] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.211016] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.228615] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.239959] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.240165] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.253830] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.275615] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.275709] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.275792] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.294508] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.311188] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.327877] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.344564] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.361253] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.408457] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  153.665371] [drm:ilk_fbc_disable] disabled FBC
>[  153.694978] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.710994] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.711093] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.731004] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.731078] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.752017] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.752068] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.771104] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.771161] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.790989] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.791045] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.811801] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.826400] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[  153.826413] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  153.845193] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.861904] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.878584] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.895243] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  153.942303] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  154.195896] [drm:ilk_fbc_disable] disabled FBC
>[  154.229018] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.243792] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.265672] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.286008] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.297448] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.308190] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.308247] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.327017] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.327108] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.344344] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.355431] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.355573] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.368514] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.389916] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.390112] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.390235] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.412647] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.429336] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.445986] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.492872] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  154.759809] [drm:ilk_fbc_disable] disabled FBC
>[  154.786803] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.798187] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.798343] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.819405] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.847928] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.858092] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.858237] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  154.906598] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  155.103489] [drm:ilk_fbc_disable] disabled FBC
>[  155.146982] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.149406] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.180253] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.193767] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.204401] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.204559] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.222473] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.244248] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.260621] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.281707] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.297076] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.313827] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.363790] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  155.644020] [drm:ilk_fbc_disable] disabled FBC
>[  155.680914] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.693777] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.693834] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.716187] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.716242] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.738086] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.738143] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.755873] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.755931] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.774470] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.774531] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.797738] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.814418] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.831128] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.847849] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.881255] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.897956] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  155.947709] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  156.227970] [drm:ilk_fbc_disable] disabled FBC
>[  156.265021] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  156.276705] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  156.299487] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  156.318417] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  156.329204] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  156.339773] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  156.339818] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  156.365164] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  156.381887] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  156.398556] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  156.448176] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  156.761837] [drm:ilk_fbc_disable] disabled FBC
>[  156.787575] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  156.809293] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  156.830540] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  156.851076] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  156.862245] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  156.872822] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  156.872875] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  156.899219] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  156.915872] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  156.932557] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  156.949243] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  156.965922] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  156.982616] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  157.082106] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  157.625996] [drm:ilk_fbc_disable] disabled FBC
>[  157.682737] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  157.685930] [drm:ilk_fbc_disable] disabled FBC
>[  157.716917] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  157.733593] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  157.766989] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  157.783685] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  157.800376] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  157.817052] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  157.833748] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  157.850423] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  157.899616] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  157.906423] [drm:ilk_fbc_disable] disabled FBC
>[  157.983932] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.009069] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.050315] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.077856] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.088376] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.102731] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.124561] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.150869] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.167519] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.184235] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.200911] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.234276] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.267675] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.284351] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.333390] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  158.563637] [drm:ilk_fbc_disable] disabled FBC
>[  158.601391] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.610631] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.621347] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.632037] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.632095] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.651466] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.684899] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.701544] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.718232] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.734945] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.751616] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  158.800520] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  160.438823] [drm:ilk_fbc_disable] disabled FBC
>[  160.470547] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  160.487198] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  160.503898] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  160.520574] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  160.537265] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  160.635687] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  161.213765] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07a200
>[  161.213768] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba4359c0 state to ffff8803fe07a200
>[  161.213770] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38c000 state to ffff8803fe07a200
>[  161.213771] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba4359c0 to [CRTC:21]
>[  161.213772] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba4359c0
>[  161.213773] [drm:drm_atomic_check_only] checking ffff8803fe07a200
>[  161.213777] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.213778] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.213780] [drm:drm_atomic_commit] commiting ffff8803fe07a200
>[  161.213788] [drm:ilk_fbc_disable] disabled FBC
>[  161.213791] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07a200
>[  161.213792] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07a200
>[  161.223799] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe079200
>[  161.223801] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435cc0 state to ffff8803fe079200
>[  161.223802] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38bc00 state to ffff8803fe079200
>[  161.223803] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435cc0 to [CRTC:21]
>[  161.223804] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba435cc0
>[  161.223805] [drm:drm_atomic_check_only] checking ffff8803fe079200
>[  161.223807] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.223808] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.223809] [drm:drm_atomic_commit] commiting ffff8803fe079200
>[  161.223816] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.223819] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe079200
>[  161.223820] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe079200
>[  161.233821] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07b800
>[  161.233823] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba4359c0 state to ffff8803fe07b800
>[  161.233824] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38c000 state to ffff8803fe07b800
>[  161.233825] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba4359c0 to [CRTC:21]
>[  161.233826] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba4359c0
>[  161.233827] [drm:drm_atomic_check_only] checking ffff8803fe07b800
>[  161.233829] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.233830] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.233831] [drm:drm_atomic_commit] commiting ffff8803fe07b800
>[  161.233837] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.233840] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07b800
>[  161.233841] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07b800
>[  161.244898] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07b400
>[  161.244900] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435cc0 state to ffff8803fe07b400
>[  161.244901] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38bc00 state to ffff8803fe07b400
>[  161.244902] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435cc0 to [CRTC:21]
>[  161.244903] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba435cc0
>[  161.244904] [drm:drm_atomic_check_only] checking ffff8803fe07b400
>[  161.244906] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.244907] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.244908] [drm:drm_atomic_commit] commiting ffff8803fe07b400
>[  161.244914] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.244917] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07b400
>[  161.244918] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07b400
>[  161.254930] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07b000
>[  161.254932] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba4359c0 state to ffff8803fe07b000
>[  161.254933] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38c000 state to ffff8803fe07b000
>[  161.254934] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba4359c0 to [CRTC:21]
>[  161.254935] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba4359c0
>[  161.254935] [drm:drm_atomic_check_only] checking ffff8803fe07b000
>[  161.254937] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.254938] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.254939] [drm:drm_atomic_commit] commiting ffff8803fe07b000
>[  161.254945] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.254948] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07b000
>[  161.254949] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07b000
>[  161.264960] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe078e00
>[  161.264962] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435cc0 state to ffff8803fe078e00
>[  161.264963] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38bc00 state to ffff8803fe078e00
>[  161.264964] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435cc0 to [CRTC:21]
>[  161.264965] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba435cc0
>[  161.264966] [drm:drm_atomic_check_only] checking ffff8803fe078e00
>[  161.264968] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.264969] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.264970] [drm:drm_atomic_commit] commiting ffff8803fe078e00
>[  161.264976] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.264978] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe078e00
>[  161.264979] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe078e00
>[  161.274989] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07bc00
>[  161.274991] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba4359c0 state to ffff8803fe07bc00
>[  161.274992] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38c000 state to ffff8803fe07bc00
>[  161.274993] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba4359c0 to [CRTC:21]
>[  161.274994] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba4359c0
>[  161.274995] [drm:drm_atomic_check_only] checking ffff8803fe07bc00
>[  161.274997] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.274998] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.274999] [drm:drm_atomic_commit] commiting ffff8803fe07bc00
>[  161.275005] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.275007] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07bc00
>[  161.275008] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07bc00
>[  161.285019] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe078000
>[  161.285020] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435cc0 state to ffff8803fe078000
>[  161.285022] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38bc00 state to ffff8803fe078000
>[  161.285023] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435cc0 to [CRTC:21]
>[  161.285023] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba435cc0
>[  161.285024] [drm:drm_atomic_check_only] checking ffff8803fe078000
>[  161.285026] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.285027] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.285028] [drm:drm_atomic_commit] commiting ffff8803fe078000
>[  161.285034] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.285036] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe078000
>[  161.285037] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe078000
>[  161.295085] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07aa00
>[  161.295087] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba4359c0 state to ffff8803fe07aa00
>[  161.295089] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38c000 state to ffff8803fe07aa00
>[  161.295089] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba4359c0 to [CRTC:21]
>[  161.295090] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba4359c0
>[  161.295091] [drm:drm_atomic_check_only] checking ffff8803fe07aa00
>[  161.295093] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.295094] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.295095] [drm:drm_atomic_commit] commiting ffff8803fe07aa00
>[  161.295101] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.295103] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07aa00
>[  161.295104] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07aa00
>[  161.305118] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07ae00
>[  161.305120] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435cc0 state to ffff8803fe07ae00
>[  161.305121] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38bc00 state to ffff8803fe07ae00
>[  161.305122] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435cc0 to [CRTC:21]
>[  161.305123] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba435cc0
>[  161.305123] [drm:drm_atomic_check_only] checking ffff8803fe07ae00
>[  161.305125] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.305126] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.305127] [drm:drm_atomic_commit] commiting ffff8803fe07ae00
>[  161.305133] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.305136] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07ae00
>[  161.305137] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07ae00
>[  161.315147] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07b200
>[  161.315148] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba4359c0 state to ffff8803fe07b200
>[  161.315149] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38c000 state to ffff8803fe07b200
>[  161.315150] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba4359c0 to [CRTC:21]
>[  161.315151] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba4359c0
>[  161.315152] [drm:drm_atomic_check_only] checking ffff8803fe07b200
>[  161.315154] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.315155] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.315156] [drm:drm_atomic_commit] commiting ffff8803fe07b200
>[  161.315162] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.315164] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07b200
>[  161.315165] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07b200
>[  161.325177] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07a800
>[  161.325179] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435cc0 state to ffff8803fe07a800
>[  161.325180] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38bc00 state to ffff8803fe07a800
>[  161.325181] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435cc0 to [CRTC:21]
>[  161.325182] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba435cc0
>[  161.325183] [drm:drm_atomic_check_only] checking ffff8803fe07a800
>[  161.325184] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.325185] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.325186] [drm:drm_atomic_commit] commiting ffff8803fe07a800
>[  161.325192] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.325194] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07a800
>[  161.325195] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07a800
>[  161.335207] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe078200
>[  161.335209] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba4359c0 state to ffff8803fe078200
>[  161.335210] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38c000 state to ffff8803fe078200
>[  161.335211] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba4359c0 to [CRTC:21]
>[  161.335212] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba4359c0
>[  161.335213] [drm:drm_atomic_check_only] checking ffff8803fe078200
>[  161.335215] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.335216] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.335217] [drm:drm_atomic_commit] commiting ffff8803fe078200
>[  161.335223] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.335225] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe078200
>[  161.335226] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe078200
>[  161.345239] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe078a00
>[  161.345241] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435cc0 state to ffff8803fe078a00
>[  161.345242] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38bc00 state to ffff8803fe078a00
>[  161.345243] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435cc0 to [CRTC:21]
>[  161.345244] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba435cc0
>[  161.345245] [drm:drm_atomic_check_only] checking ffff8803fe078a00
>[  161.345247] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.345248] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.345248] [drm:drm_atomic_commit] commiting ffff8803fe078a00
>[  161.345254] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.345257] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe078a00
>[  161.345258] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe078a00
>[  161.355310] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07a000
>[  161.355312] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba4359c0 state to ffff8803fe07a000
>[  161.355313] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38c000 state to ffff8803fe07a000
>[  161.355314] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba4359c0 to [CRTC:21]
>[  161.355315] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba4359c0
>[  161.355315] [drm:drm_atomic_check_only] checking ffff8803fe07a000
>[  161.355317] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.355318] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.355319] [drm:drm_atomic_commit] commiting ffff8803fe07a000
>[  161.355325] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.355327] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07a000
>[  161.355328] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07a000
>[  161.365342] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe078600
>[  161.365344] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435cc0 state to ffff8803fe078600
>[  161.365345] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38bc00 state to ffff8803fe078600
>[  161.365346] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435cc0 to [CRTC:21]
>[  161.365347] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba435cc0
>[  161.365347] [drm:drm_atomic_check_only] checking ffff8803fe078600
>[  161.365349] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.365350] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.365351] [drm:drm_atomic_commit] commiting ffff8803fe078600
>[  161.365357] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.365359] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe078600
>[  161.365360] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe078600
>[  161.375367] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07be00
>[  161.375369] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba4359c0 state to ffff8803fe07be00
>[  161.375370] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38c000 state to ffff8803fe07be00
>[  161.375371] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba4359c0 to [CRTC:21]
>[  161.375372] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba4359c0
>[  161.375372] [drm:drm_atomic_check_only] checking ffff8803fe07be00
>[  161.375374] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.375375] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.375376] [drm:drm_atomic_commit] commiting ffff8803fe07be00
>[  161.375382] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.375384] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07be00
>[  161.375385] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07be00
>[  161.385399] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07b600
>[  161.385401] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435cc0 state to ffff8803fe07b600
>[  161.385402] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38bc00 state to ffff8803fe07b600
>[  161.385403] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435cc0 to [CRTC:21]
>[  161.385404] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba435cc0
>[  161.385405] [drm:drm_atomic_check_only] checking ffff8803fe07b600
>[  161.385406] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.385407] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.385408] [drm:drm_atomic_commit] commiting ffff8803fe07b600
>[  161.385414] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.385416] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07b600
>[  161.385417] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07b600
>[  161.395434] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe079800
>[  161.395436] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba4359c0 state to ffff8803fe079800
>[  161.395437] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38c000 state to ffff8803fe079800
>[  161.395438] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba4359c0 to [CRTC:21]
>[  161.395439] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba4359c0
>[  161.395439] [drm:drm_atomic_check_only] checking ffff8803fe079800
>[  161.395441] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.395442] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.395443] [drm:drm_atomic_commit] commiting ffff8803fe079800
>[  161.395449] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.395451] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe079800
>[  161.395452] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe079800
>[  161.405464] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe079400
>[  161.405466] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435cc0 state to ffff8803fe079400
>[  161.405467] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38bc00 state to ffff8803fe079400
>[  161.405468] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435cc0 to [CRTC:21]
>[  161.405468] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba435cc0
>[  161.405469] [drm:drm_atomic_check_only] checking ffff8803fe079400
>[  161.405471] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.405472] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.405473] [drm:drm_atomic_commit] commiting ffff8803fe079400
>[  161.405479] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.405481] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe079400
>[  161.405482] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe079400
>[  161.415497] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe078400
>[  161.415499] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba4359c0 state to ffff8803fe078400
>[  161.415500] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38c000 state to ffff8803fe078400
>[  161.415501] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba4359c0 to [CRTC:21]
>[  161.415502] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba4359c0
>[  161.415503] [drm:drm_atomic_check_only] checking ffff8803fe078400
>[  161.415505] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.415506] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.415506] [drm:drm_atomic_commit] commiting ffff8803fe078400
>[  161.415512] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.415514] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe078400
>[  161.415515] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe078400
>[  161.445621] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe079600
>[  161.445623] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435cc0 state to ffff8803fe079600
>[  161.445624] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38bc00 state to ffff8803fe079600
>[  161.445625] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435cc0 to [CRTC:21]
>[  161.445626] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba435cc0
>[  161.445627] [drm:drm_atomic_check_only] checking ffff8803fe079600
>[  161.445629] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.445630] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.445631] [drm:drm_atomic_commit] commiting ffff8803fe079600
>[  161.445637] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.445639] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe079600
>[  161.445640] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe079600
>[  161.485904] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe079e00
>[  161.485909] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba4359c0 state to ffff8803fe079e00
>[  161.485911] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38c000 state to ffff8803fe079e00
>[  161.485912] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba4359c0 to [CRTC:21]
>[  161.485913] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba4359c0
>[  161.485914] [drm:drm_atomic_check_only] checking ffff8803fe079e00
>[  161.485918] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.485920] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.485921] [drm:drm_atomic_commit] commiting ffff8803fe079e00
>[  161.485935] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.485940] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe079e00
>[  161.485941] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe079e00
>[  161.495933] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe078800
>[  161.495938] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435cc0 state to ffff8803fe078800
>[  161.495940] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38bc00 state to ffff8803fe078800
>[  161.495941] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435cc0 to [CRTC:21]
>[  161.495942] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba435cc0
>[  161.495944] [drm:drm_atomic_check_only] checking ffff8803fe078800
>[  161.495948] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.495949] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.495950] [drm:drm_atomic_commit] commiting ffff8803fe078800
>[  161.495965] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.495970] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe078800
>[  161.495971] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe078800
>[  161.536055] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07ac00
>[  161.536060] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba4359c0 state to ffff8803fe07ac00
>[  161.536062] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38c000 state to ffff8803fe07ac00
>[  161.536063] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba4359c0 to [CRTC:21]
>[  161.536064] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba4359c0
>[  161.536065] [drm:drm_atomic_check_only] checking ffff8803fe07ac00
>[  161.536070] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.536071] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.536072] [drm:drm_atomic_commit] commiting ffff8803fe07ac00
>[  161.536086] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.536091] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07ac00
>[  161.536092] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07ac00
>[  161.556146] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07ba00
>[  161.556151] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435cc0 state to ffff8803fe07ba00
>[  161.556153] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38bc00 state to ffff8803fe07ba00
>[  161.556154] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435cc0 to [CRTC:21]
>[  161.556155] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba435cc0
>[  161.556157] [drm:drm_atomic_check_only] checking ffff8803fe07ba00
>[  161.556161] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.556162] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.556163] [drm:drm_atomic_commit] commiting ffff8803fe07ba00
>[  161.556178] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.556182] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07ba00
>[  161.556184] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07ba00
>[  161.603373] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  161.606316] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe079000
>[  161.606320] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435540 state to ffff8803fe079000
>[  161.606323] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38c000 state to ffff8803fe079000
>[  161.606324] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435540 to [CRTC:21]
>[  161.606325] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba435540
>[  161.606326] [drm:drm_atomic_check_only] checking ffff8803fe079000
>[  161.606331] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.606332] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.606333] [drm:drm_atomic_commit] commiting ffff8803fe079000
>[  161.606348] [drm:ilk_fbc_disable] disabled FBC
>[  161.606351] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe079000
>[  161.606353] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe079000
>[  161.636410] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07ba00
>[  161.636415] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435cc0 state to ffff8803fe07ba00
>[  161.636417] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38bc00 state to ffff8803fe07ba00
>[  161.636418] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435cc0 to [CRTC:21]
>[  161.636419] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba435cc0
>[  161.636420] [drm:drm_atomic_check_only] checking ffff8803fe07ba00
>[  161.636424] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.636426] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.636427] [drm:drm_atomic_commit] commiting ffff8803fe07ba00
>[  161.636440] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.636445] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07ba00
>[  161.636446] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07ba00
>[  161.646476] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07ac00
>[  161.646481] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435540 state to ffff8803fe07ac00
>[  161.646483] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38c000 state to ffff8803fe07ac00
>[  161.646484] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435540 to [CRTC:21]
>[  161.646486] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba435540
>[  161.646487] [drm:drm_atomic_check_only] checking ffff8803fe07ac00
>[  161.646491] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.646492] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.646494] [drm:drm_atomic_commit] commiting ffff8803fe07ac00
>[  161.646508] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.646512] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07ac00
>[  161.646514] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07ac00
>[  161.666543] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe078800
>[  161.666548] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435cc0 state to ffff8803fe078800
>[  161.666550] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38bc00 state to ffff8803fe078800
>[  161.666551] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435cc0 to [CRTC:21]
>[  161.666552] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba435cc0
>[  161.666553] [drm:drm_atomic_check_only] checking ffff8803fe078800
>[  161.666558] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.666559] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.666560] [drm:drm_atomic_commit] commiting ffff8803fe078800
>[  161.666575] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.666580] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe078800
>[  161.666581] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe078800
>[  161.676579] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe079e00
>[  161.676584] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435540 state to ffff8803fe079e00
>[  161.676586] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38c000 state to ffff8803fe079e00
>[  161.676587] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435540 to [CRTC:21]
>[  161.676588] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba435540
>[  161.676589] [drm:drm_atomic_check_only] checking ffff8803fe079e00
>[  161.676594] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.676595] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.676596] [drm:drm_atomic_commit] commiting ffff8803fe079e00
>[  161.676610] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.676615] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe079e00
>[  161.676616] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe079e00
>[  161.686608] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe078c00
>[  161.686612] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435cc0 state to ffff8803fe078c00
>[  161.686614] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38bc00 state to ffff8803fe078c00
>[  161.686615] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435cc0 to [CRTC:21]
>[  161.686616] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba435cc0
>[  161.686618] [drm:drm_atomic_check_only] checking ffff8803fe078c00
>[  161.686622] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.686623] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.686625] [drm:drm_atomic_commit] commiting ffff8803fe078c00
>[  161.686639] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.686643] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe078c00
>[  161.686645] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe078c00
>[  161.726737] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe079c00
>[  161.726741] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435540 state to ffff8803fe079c00
>[  161.726743] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38c000 state to ffff8803fe079c00
>[  161.726744] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435540 to [CRTC:21]
>[  161.726746] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba435540
>[  161.726747] [drm:drm_atomic_check_only] checking ffff8803fe079c00
>[  161.726777] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.726778] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.726779] [drm:drm_atomic_commit] commiting ffff8803fe079c00
>[  161.726794] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  161.726798] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe079c00
>[  161.726800] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe079c00
>[  161.776839] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  161.817011] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe079400
>[  161.817015] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba4359c0 state to ffff8803fe079400
>[  161.817017] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38bc00 state to ffff8803fe079400
>[  161.817018] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba4359c0 to [CRTC:21]
>[  161.817019] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba4359c0
>[  161.817020] [drm:drm_atomic_check_only] checking ffff8803fe079400
>[  161.817025] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  161.817026] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  161.817027] [drm:drm_atomic_commit] commiting ffff8803fe079400
>[  161.817041] [drm:ilk_fbc_disable] disabled FBC
>[  161.817045] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe079400
>[  161.817046] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe079400
>[  161.866969] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  162.635032] [drm:ilk_fbc_disable] disabled FBC
>[  162.687729] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  162.784102] [drm:ilk_fbc_disable] disabled FBC
>[  162.834608] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  163.587165] [drm:drm_atomic_state_init] Allocated atomic state ffff88040138aa00
>[  163.587168] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8804116813c0 state to ffff88040138aa00
>[  163.587171] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413baf400 state to ffff88040138aa00
>[  163.587172] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804116813c0 to [CRTC:21]
>[  163.587173] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8804116813c0
>[  163.587174] [drm:drm_atomic_check_only] checking ffff88040138aa00
>[  163.587178] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  163.587179] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  163.587180] [drm:drm_atomic_commit] commiting ffff88040138aa00
>[  163.587194] [drm:ilk_fbc_disable] disabled FBC
>[  163.587197] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040138aa00
>[  163.587198] [drm:drm_atomic_state_free] Freeing atomic state ffff88040138aa00
>[  163.597180] [drm:drm_atomic_state_init] Allocated atomic state ffff88040138b800
>[  163.597182] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880411681b40 state to ffff88040138b800
>[  163.597183] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413ba9000 state to ffff88040138b800
>[  163.597184] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880411681b40 to [CRTC:21]
>[  163.597185] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880411681b40
>[  163.597186] [drm:drm_atomic_check_only] checking ffff88040138b800
>[  163.597188] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  163.597189] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  163.597190] [drm:drm_atomic_commit] commiting ffff88040138b800
>[  163.597197] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  163.597200] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040138b800
>[  163.597201] [drm:drm_atomic_state_free] Freeing atomic state ffff88040138b800
>[  163.607239] [drm:drm_atomic_state_init] Allocated atomic state ffff880401388c00
>[  163.607241] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8804116813c0 state to ffff880401388c00
>[  163.607242] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413baf400 state to ffff880401388c00
>[  163.607243] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804116813c0 to [CRTC:21]
>[  163.607244] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8804116813c0
>[  163.607245] [drm:drm_atomic_check_only] checking ffff880401388c00
>[  163.607247] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  163.607248] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  163.607249] [drm:drm_atomic_commit] commiting ffff880401388c00
>[  163.607255] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  163.607257] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401388c00
>[  163.607258] [drm:drm_atomic_state_free] Freeing atomic state ffff880401388c00
>[  163.617278] [drm:drm_atomic_state_init] Allocated atomic state ffff880401388200
>[  163.617280] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880411681b40 state to ffff880401388200
>[  163.617281] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413ba9000 state to ffff880401388200
>[  163.617282] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880411681b40 to [CRTC:21]
>[  163.617283] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880411681b40
>[  163.617284] [drm:drm_atomic_check_only] checking ffff880401388200
>[  163.617286] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  163.617287] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  163.617288] [drm:drm_atomic_commit] commiting ffff880401388200
>[  163.617294] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  163.617296] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401388200
>[  163.617297] [drm:drm_atomic_state_free] Freeing atomic state ffff880401388200
>[  163.627317] [drm:drm_atomic_state_init] Allocated atomic state ffff88040138ae00
>[  163.627319] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8804116813c0 state to ffff88040138ae00
>[  163.627320] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413baf400 state to ffff88040138ae00
>[  163.627321] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804116813c0 to [CRTC:21]
>[  163.627322] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8804116813c0
>[  163.627322] [drm:drm_atomic_check_only] checking ffff88040138ae00
>[  163.627324] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  163.627325] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  163.627326] [drm:drm_atomic_commit] commiting ffff88040138ae00
>[  163.627332] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  163.627335] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040138ae00
>[  163.627336] [drm:drm_atomic_state_free] Freeing atomic state ffff88040138ae00
>[  163.637333] [drm:drm_atomic_state_init] Allocated atomic state ffff880401389600
>[  163.637335] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880411681b40 state to ffff880401389600
>[  163.637336] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413ba9000 state to ffff880401389600
>[  163.637337] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880411681b40 to [CRTC:21]
>[  163.637338] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880411681b40
>[  163.637339] [drm:drm_atomic_check_only] checking ffff880401389600
>[  163.637341] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  163.637342] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  163.637343] [drm:drm_atomic_commit] commiting ffff880401389600
>[  163.637349] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  163.637351] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401389600
>[  163.637352] [drm:drm_atomic_state_free] Freeing atomic state ffff880401389600
>[  163.647368] [drm:drm_atomic_state_init] Allocated atomic state ffff88040138bc00
>[  163.647370] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8804116813c0 state to ffff88040138bc00
>[  163.647371] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413baf400 state to ffff88040138bc00
>[  163.647372] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804116813c0 to [CRTC:21]
>[  163.647373] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8804116813c0
>[  163.647373] [drm:drm_atomic_check_only] checking ffff88040138bc00
>[  163.647375] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  163.647376] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  163.647377] [drm:drm_atomic_commit] commiting ffff88040138bc00
>[  163.647383] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  163.647385] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040138bc00
>[  163.647386] [drm:drm_atomic_state_free] Freeing atomic state ffff88040138bc00
>[  163.657397] [drm:drm_atomic_state_init] Allocated atomic state ffff880401389600
>[  163.657399] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880411681b40 state to ffff880401389600
>[  163.657400] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413ba9000 state to ffff880401389600
>[  163.657401] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880411681b40 to [CRTC:21]
>[  163.657402] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880411681b40
>[  163.657403] [drm:drm_atomic_check_only] checking ffff880401389600
>[  163.657404] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  163.657405] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  163.657406] [drm:drm_atomic_commit] commiting ffff880401389600
>[  163.657412] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  163.657414] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401389600
>[  163.657415] [drm:drm_atomic_state_free] Freeing atomic state ffff880401389600
>[  163.667430] [drm:drm_atomic_state_init] Allocated atomic state ffff88040138ae00
>[  163.667432] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8804116813c0 state to ffff88040138ae00
>[  163.667433] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413baf400 state to ffff88040138ae00
>[  163.667434] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804116813c0 to [CRTC:21]
>[  163.667434] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8804116813c0
>[  163.667435] [drm:drm_atomic_check_only] checking ffff88040138ae00
>[  163.667437] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  163.667438] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  163.667439] [drm:drm_atomic_commit] commiting ffff88040138ae00
>[  163.667445] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  163.667447] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040138ae00
>[  163.667448] [drm:drm_atomic_state_free] Freeing atomic state ffff88040138ae00
>[  163.677462] [drm:drm_atomic_state_init] Allocated atomic state ffff880401388200
>[  163.677463] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880411681b40 state to ffff880401388200
>[  163.677464] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413ba9000 state to ffff880401388200
>[  163.677465] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880411681b40 to [CRTC:21]
>[  163.677466] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880411681b40
>[  163.677467] [drm:drm_atomic_check_only] checking ffff880401388200
>[  163.677469] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  163.677470] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  163.677470] [drm:drm_atomic_commit] commiting ffff880401388200
>[  163.677476] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  163.677478] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401388200
>[  163.677479] [drm:drm_atomic_state_free] Freeing atomic state ffff880401388200
>[  163.687492] [drm:drm_atomic_state_init] Allocated atomic state ffff880401388c00
>[  163.687493] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8804116813c0 state to ffff880401388c00
>[  163.687494] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413baf400 state to ffff880401388c00
>[  163.687495] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804116813c0 to [CRTC:21]
>[  163.687496] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8804116813c0
>[  163.687497] [drm:drm_atomic_check_only] checking ffff880401388c00
>[  163.687499] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  163.687500] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  163.687501] [drm:drm_atomic_commit] commiting ffff880401388c00
>[  163.687507] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  163.687509] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401388c00
>[  163.687510] [drm:drm_atomic_state_free] Freeing atomic state ffff880401388c00
>[  163.697524] [drm:drm_atomic_state_init] Allocated atomic state ffff88040138b800
>[  163.697525] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880411681b40 state to ffff88040138b800
>[  163.697527] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413ba9000 state to ffff88040138b800
>[  163.697527] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880411681b40 to [CRTC:21]
>[  163.697528] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880411681b40
>[  163.697529] [drm:drm_atomic_check_only] checking ffff88040138b800
>[  163.697531] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  163.697532] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  163.697533] [drm:drm_atomic_commit] commiting ffff88040138b800
>[  163.697538] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  163.697541] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040138b800
>[  163.697542] [drm:drm_atomic_state_free] Freeing atomic state ffff88040138b800
>[  163.707553] [drm:drm_atomic_state_init] Allocated atomic state ffff88040138aa00
>[  163.707555] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8804116813c0 state to ffff88040138aa00
>[  163.707556] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413baf400 state to ffff88040138aa00
>[  163.707557] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804116813c0 to [CRTC:21]
>[  163.707558] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8804116813c0
>[  163.707559] [drm:drm_atomic_check_only] checking ffff88040138aa00
>[  163.707560] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  163.707561] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  163.707562] [drm:drm_atomic_commit] commiting ffff88040138aa00
>[  163.707568] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  163.707570] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040138aa00
>[  163.707571] [drm:drm_atomic_state_free] Freeing atomic state ffff88040138aa00
>[  163.717586] [drm:drm_atomic_state_init] Allocated atomic state ffff88040138b000
>[  163.717587] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880411681b40 state to ffff88040138b000
>[  163.717588] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413ba9000 state to ffff88040138b000
>[  163.717589] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880411681b40 to [CRTC:21]
>[  163.717590] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880411681b40
>[  163.717591] [drm:drm_atomic_check_only] checking ffff88040138b000
>[  163.717593] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  163.717594] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  163.717595] [drm:drm_atomic_commit] commiting ffff88040138b000
>[  163.717600] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  163.717603] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040138b000
>[  163.717604] [drm:drm_atomic_state_free] Freeing atomic state ffff88040138b000
>[  163.727619] [drm:drm_atomic_state_init] Allocated atomic state ffff88040138a200
>[  163.727620] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8804116813c0 state to ffff88040138a200
>[  163.727622] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413baf400 state to ffff88040138a200
>[  163.727622] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804116813c0 to [CRTC:21]
>[  163.727623] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8804116813c0
>[  163.727624] [drm:drm_atomic_check_only] checking ffff88040138a200
>[  163.727626] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  163.727627] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  163.727628] [drm:drm_atomic_commit] commiting ffff88040138a200
>[  163.727634] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  163.727636] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040138a200
>[  163.727637] [drm:drm_atomic_state_free] Freeing atomic state ffff88040138a200
>[  163.737650] [drm:drm_atomic_state_init] Allocated atomic state ffff880401389c00
>[  163.737652] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880411681b40 state to ffff880401389c00
>[  163.737653] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413ba9000 state to ffff880401389c00
>[  163.737654] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880411681b40 to [CRTC:21]
>[  163.737655] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880411681b40
>[  163.737656] [drm:drm_atomic_check_only] checking ffff880401389c00
>[  163.737658] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  163.737659] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  163.737659] [drm:drm_atomic_commit] commiting ffff880401389c00
>[  163.737665] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  163.737668] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401389c00
>[  163.737669] [drm:drm_atomic_state_free] Freeing atomic state ffff880401389c00
>[  163.785493] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  164.048701] [drm:drm_atomic_state_init] Allocated atomic state ffff88040138a000
>[  164.048703] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880411681600 state to ffff88040138a000
>[  164.048704] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413baf400 state to ffff88040138a000
>[  164.048705] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880411681600 to [CRTC:21]
>[  164.048706] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880411681600
>[  164.048706] [drm:drm_atomic_check_only] checking ffff88040138a000
>[  164.048708] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.048709] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.048710] [drm:drm_atomic_commit] commiting ffff88040138a000
>[  164.048717] [drm:ilk_fbc_disable] disabled FBC
>[  164.048719] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040138a000
>[  164.048720] [drm:drm_atomic_state_free] Freeing atomic state ffff88040138a000
>[  164.058734] [drm:drm_atomic_state_init] Allocated atomic state ffff880401389a00
>[  164.058736] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880411681b40 state to ffff880401389a00
>[  164.058737] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413ba9000 state to ffff880401389a00
>[  164.058738] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880411681b40 to [CRTC:21]
>[  164.058739] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880411681b40
>[  164.058740] [drm:drm_atomic_check_only] checking ffff880401389a00
>[  164.058742] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.058743] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.058744] [drm:drm_atomic_commit] commiting ffff880401389a00
>[  164.058750] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.058752] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401389a00
>[  164.058753] [drm:drm_atomic_state_free] Freeing atomic state ffff880401389a00
>[  164.076714] [drm:drm_atomic_state_init] Allocated atomic state ffff88040138be00
>[  164.076716] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880411681600 state to ffff88040138be00
>[  164.076717] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413baf400 state to ffff88040138be00
>[  164.076718] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880411681600 to [CRTC:21]
>[  164.076719] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880411681600
>[  164.076720] [drm:drm_atomic_check_only] checking ffff88040138be00
>[  164.076721] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.076722] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.076723] [drm:drm_atomic_commit] commiting ffff88040138be00
>[  164.076729] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.076732] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040138be00
>[  164.076733] [drm:drm_atomic_state_free] Freeing atomic state ffff88040138be00
>[  164.086748] [drm:drm_atomic_state_init] Allocated atomic state ffff880401389400
>[  164.086750] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880411681b40 state to ffff880401389400
>[  164.086751] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413ba9000 state to ffff880401389400
>[  164.086752] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880411681b40 to [CRTC:21]
>[  164.086753] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880411681b40
>[  164.086754] [drm:drm_atomic_check_only] checking ffff880401389400
>[  164.086756] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.086757] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.086757] [drm:drm_atomic_commit] commiting ffff880401389400
>[  164.086764] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.086766] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401389400
>[  164.086767] [drm:drm_atomic_state_free] Freeing atomic state ffff880401389400
>[  164.093630] [drm:drm_atomic_state_init] Allocated atomic state ffff880401388e00
>[  164.093632] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880411681600 state to ffff880401388e00
>[  164.093633] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413baf400 state to ffff880401388e00
>[  164.093634] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880411681600 to [CRTC:21]
>[  164.093635] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880411681600
>[  164.093635] [drm:drm_atomic_check_only] checking ffff880401388e00
>[  164.093637] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.093638] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.093639] [drm:drm_atomic_commit] commiting ffff880401388e00
>[  164.093645] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.093647] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401388e00
>[  164.093648] [drm:drm_atomic_state_free] Freeing atomic state ffff880401388e00
>[  164.106820] [drm:drm_atomic_state_init] Allocated atomic state ffff880401388600
>[  164.106822] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880411681b40 state to ffff880401388600
>[  164.106823] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413ba9000 state to ffff880401388600
>[  164.106824] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880411681b40 to [CRTC:21]
>[  164.106825] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880411681b40
>[  164.106825] [drm:drm_atomic_check_only] checking ffff880401388600
>[  164.106827] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.106828] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.106829] [drm:drm_atomic_commit] commiting ffff880401388600
>[  164.106835] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.106837] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401388600
>[  164.106838] [drm:drm_atomic_state_free] Freeing atomic state ffff880401388600
>[  164.113697] [drm:drm_atomic_state_init] Allocated atomic state ffff880401388e00
>[  164.113699] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880411681600 state to ffff880401388e00
>[  164.113700] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413baf400 state to ffff880401388e00
>[  164.113701] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880411681600 to [CRTC:21]
>[  164.113702] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880411681600
>[  164.113703] [drm:drm_atomic_check_only] checking ffff880401388e00
>[  164.113704] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.113705] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.113706] [drm:drm_atomic_commit] commiting ffff880401388e00
>[  164.113712] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.113714] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401388e00
>[  164.113715] [drm:drm_atomic_state_free] Freeing atomic state ffff880401388e00
>[  164.126873] [drm:drm_atomic_state_init] Allocated atomic state ffff880401389400
>[  164.126874] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880411681b40 state to ffff880401389400
>[  164.126876] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413ba9000 state to ffff880401389400
>[  164.126876] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880411681b40 to [CRTC:21]
>[  164.126877] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880411681b40
>[  164.126878] [drm:drm_atomic_check_only] checking ffff880401389400
>[  164.126880] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.126881] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.126882] [drm:drm_atomic_commit] commiting ffff880401389400
>[  164.126887] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.126890] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401389400
>[  164.126891] [drm:drm_atomic_state_free] Freeing atomic state ffff880401389400
>[  164.133769] [drm:drm_atomic_state_init] Allocated atomic state ffff88040138be00
>[  164.133771] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880411681600 state to ffff88040138be00
>[  164.133772] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413baf400 state to ffff88040138be00
>[  164.133773] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880411681600 to [CRTC:21]
>[  164.133773] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880411681600
>[  164.133774] [drm:drm_atomic_check_only] checking ffff88040138be00
>[  164.133776] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.133777] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.133778] [drm:drm_atomic_commit] commiting ffff88040138be00
>[  164.133784] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.133786] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040138be00
>[  164.133787] [drm:drm_atomic_state_free] Freeing atomic state ffff88040138be00
>[  164.133918] [drm:drm_atomic_state_init] Allocated atomic state ffff880401389a00
>[  164.133920] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880411681b40 state to ffff880401389a00
>[  164.133921] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413ba9000 state to ffff880401389a00
>[  164.133922] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880411681b40 to [CRTC:21]
>[  164.133922] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880411681b40
>[  164.133923] [drm:drm_atomic_check_only] checking ffff880401389a00
>[  164.133925] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.133926] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.133927] [drm:drm_atomic_commit] commiting ffff880401389a00
>[  164.133932] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.133934] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401389a00
>[  164.133935] [drm:drm_atomic_state_free] Freeing atomic state ffff880401389a00
>[  164.145136] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.146959] [drm:drm_atomic_state_init] Allocated atomic state ffff88040138b000
>[  164.146961] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880411681600 state to ffff88040138b000
>[  164.146962] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413baf400 state to ffff88040138b000
>[  164.146963] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880411681600 to [CRTC:21]
>[  164.146964] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880411681600
>[  164.146965] [drm:drm_atomic_check_only] checking ffff88040138b000
>[  164.146967] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.146968] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.146969] [drm:drm_atomic_commit] commiting ffff88040138b000
>[  164.146976] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040138b000
>[  164.146978] [drm:drm_atomic_state_free] Freeing atomic state ffff88040138b000
>[  164.153830] [drm:drm_atomic_state_init] Allocated atomic state ffff88040138aa00
>[  164.153832] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8804116813c0 state to ffff88040138aa00
>[  164.153833] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413ba9000 state to ffff88040138aa00
>[  164.153834] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804116813c0 to [CRTC:21]
>[  164.153835] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8804116813c0
>[  164.153836] [drm:drm_atomic_check_only] checking ffff88040138aa00
>[  164.153838] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.153839] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.153840] [drm:drm_atomic_commit] commiting ffff88040138aa00
>[  164.153846] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.153848] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040138aa00
>[  164.153849] [drm:drm_atomic_state_free] Freeing atomic state ffff88040138aa00
>[  164.167020] [drm:drm_atomic_state_init] Allocated atomic state ffff88040138b800
>[  164.167022] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880411681600 state to ffff88040138b800
>[  164.167023] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413baf400 state to ffff88040138b800
>[  164.167024] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880411681600 to [CRTC:21]
>[  164.167025] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880411681600
>[  164.167026] [drm:drm_atomic_check_only] checking ffff88040138b800
>[  164.167028] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.167029] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.167029] [drm:drm_atomic_commit] commiting ffff88040138b800
>[  164.167036] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.167038] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040138b800
>[  164.167039] [drm:drm_atomic_state_free] Freeing atomic state ffff88040138b800
>[  164.177049] [drm:drm_atomic_state_init] Allocated atomic state ffff880401388c00
>[  164.177051] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8804116813c0 state to ffff880401388c00
>[  164.177052] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413ba9000 state to ffff880401388c00
>[  164.177053] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804116813c0 to [CRTC:21]
>[  164.177054] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8804116813c0
>[  164.177055] [drm:drm_atomic_check_only] checking ffff880401388c00
>[  164.177057] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.177058] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.177059] [drm:drm_atomic_commit] commiting ffff880401388c00
>[  164.177065] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.177067] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401388c00
>[  164.177068] [drm:drm_atomic_state_free] Freeing atomic state ffff880401388c00
>[  164.187214] [drm:drm_atomic_state_init] Allocated atomic state ffff880401388200
>[  164.187218] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880411681600 state to ffff880401388200
>[  164.187221] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413baf400 state to ffff880401388200
>[  164.187222] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880411681600 to [CRTC:21]
>[  164.187223] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880411681600
>[  164.187224] [drm:drm_atomic_check_only] checking ffff880401388200
>[  164.187228] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.187229] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.187230] [drm:drm_atomic_commit] commiting ffff880401388200
>[  164.187245] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.187249] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880401388200
>[  164.187251] [drm:drm_atomic_state_free] Freeing atomic state ffff880401388200
>[  164.187350] [drm:drm_atomic_state_init] Allocated atomic state ffff88040138a000
>[  164.187352] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8804116813c0 state to ffff88040138a000
>[  164.187354] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413ba9000 state to ffff88040138a000
>[  164.187355] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804116813c0 to [CRTC:21]
>[  164.187357] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8804116813c0
>[  164.187359] [drm:drm_atomic_check_only] checking ffff88040138a000
>[  164.187361] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.187363] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.187364] [drm:drm_atomic_commit] commiting ffff88040138a000
>[  164.187370] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.187373] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040138a000
>[  164.187374] [drm:drm_atomic_state_free] Freeing atomic state ffff88040138a000
>[  164.187866] [drm:drm_atomic_state_init] Allocated atomic state ffff88040138a000
>[  164.187869] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880411681600 state to ffff88040138a000
>[  164.187870] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413ba9800 state to ffff88040138a000
>[  164.187871] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880411681600 to [CRTC:21]
>[  164.187872] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880411681600
>[  164.187873] [drm:drm_atomic_check_only] checking ffff88040138a000
>[  164.187875] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.187877] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.187878] [drm:drm_atomic_commit] commiting ffff88040138a000
>[  164.187886] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.187888] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040138a000
>[  164.187890] [drm:drm_atomic_state_free] Freeing atomic state ffff88040138a000
>[  164.197240] [drm:drm_atomic_state_init] Allocated atomic state ffff88040138bc00
>[  164.197243] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880411681b40 state to ffff88040138bc00
>[  164.197245] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413ba9000 state to ffff88040138bc00
>[  164.197246] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880411681b40 to [CRTC:21]
>[  164.197247] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880411681b40
>[  164.197248] [drm:drm_atomic_check_only] checking ffff88040138bc00
>[  164.197251] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.197252] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.197253] [drm:drm_atomic_commit] commiting ffff88040138bc00
>[  164.197260] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.197263] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040138bc00
>[  164.197265] [drm:drm_atomic_state_free] Freeing atomic state ffff88040138bc00
>[  164.199526] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.199721] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.207329] [drm:drm_atomic_state_init] Allocated atomic state ffff8804064a8c00
>[  164.207334] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041b05d0c0 state to ffff8804064a8c00
>[  164.207336] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413bba400 state to ffff8804064a8c00
>[  164.207337] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041b05d0c0 to [CRTC:21]
>[  164.207338] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041b05d0c0
>[  164.207339] [drm:drm_atomic_check_only] checking ffff8804064a8c00
>[  164.207344] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.207345] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.207346] [drm:drm_atomic_commit] commiting ffff8804064a8c00
>[  164.207356] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.207361] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8804064a8c00
>[  164.207362] [drm:drm_atomic_state_free] Freeing atomic state ffff8804064a8c00
>[  164.210606] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.217252] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900e00
>[  164.217255] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74240 state to ffff8803f0900e00
>[  164.217257] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a60800 state to ffff8803f0900e00
>[  164.217258] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74240 to [CRTC:21]
>[  164.217259] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74240
>[  164.217259] [drm:drm_atomic_check_only] checking ffff8803f0900e00
>[  164.217262] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.217263] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.217264] [drm:drm_atomic_commit] commiting ffff8803f0900e00
>[  164.217269] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.217272] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900e00
>[  164.217273] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900e00
>[  164.222487] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.227342] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902800
>[  164.227346] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74540 state to ffff8803f0902800
>[  164.227348] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a62800 state to ffff8803f0902800
>[  164.227350] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74540 to [CRTC:21]
>[  164.227351] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74540
>[  164.227352] [drm:drm_atomic_check_only] checking ffff8803f0902800
>[  164.227356] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.227358] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.227359] [drm:drm_atomic_commit] commiting ffff8803f0902800
>[  164.227373] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.227377] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902800
>[  164.227379] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902800
>[  164.237374] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901600
>[  164.237378] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74900 state to ffff8803f0901600
>[  164.237381] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a60800 state to ffff8803f0901600
>[  164.237382] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74900 to [CRTC:21]
>[  164.237383] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74900
>[  164.237384] [drm:drm_atomic_check_only] checking ffff8803f0901600
>[  164.237389] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.237390] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.237391] [drm:drm_atomic_commit] commiting ffff8803f0901600
>[  164.237402] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.237407] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901600
>[  164.237408] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901600
>[  164.239070] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.247445] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901000
>[  164.247449] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74240 state to ffff8803f0901000
>[  164.247451] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a62800 state to ffff8803f0901000
>[  164.247452] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74240 to [CRTC:21]
>[  164.247453] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74240
>[  164.247454] [drm:drm_atomic_check_only] checking ffff8803f0901000
>[  164.247459] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.247460] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.247461] [drm:drm_atomic_commit] commiting ffff8803f0901000
>[  164.247471] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.247476] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901000
>[  164.247477] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901000
>[  164.254925] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.257481] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900000
>[  164.257486] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74900 state to ffff8803f0900000
>[  164.257488] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a60800 state to ffff8803f0900000
>[  164.257489] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74900 to [CRTC:21]
>[  164.257491] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74900
>[  164.257492] [drm:drm_atomic_check_only] checking ffff8803f0900000
>[  164.257496] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.257497] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.257499] [drm:drm_atomic_commit] commiting ffff8803f0900000
>[  164.257509] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900000
>[  164.257511] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900000
>[  164.267514] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900200
>[  164.267519] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74600 state to ffff8803f0900200
>[  164.267521] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a62800 state to ffff8803f0900200
>[  164.267522] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74600 to [CRTC:21]
>[  164.267523] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74600
>[  164.267524] [drm:drm_atomic_check_only] checking ffff8803f0900200
>[  164.267529] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.267530] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.267531] [drm:drm_atomic_commit] commiting ffff8803f0900200
>[  164.267541] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.267546] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900200
>[  164.267547] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900200
>[  164.270268] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.277549] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903e00
>[  164.277553] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74240 state to ffff8803f0903e00
>[  164.277555] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a60800 state to ffff8803f0903e00
>[  164.277556] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74240 to [CRTC:21]
>[  164.277557] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74240
>[  164.277558] [drm:drm_atomic_check_only] checking ffff8803f0903e00
>[  164.277563] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.277564] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.277565] [drm:drm_atomic_commit] commiting ffff8803f0903e00
>[  164.277575] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.277580] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903e00
>[  164.277581] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903e00
>[  164.286490] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.287510] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900600
>[  164.287513] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74540 state to ffff8803f0900600
>[  164.287515] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a62800 state to ffff8803f0900600
>[  164.287517] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74540 to [CRTC:21]
>[  164.287518] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74540
>[  164.287519] [drm:drm_atomic_check_only] checking ffff8803f0900600
>[  164.287523] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.287524] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.287525] [drm:drm_atomic_commit] commiting ffff8803f0900600
>[  164.287534] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900600
>[  164.287536] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900600
>[  164.297617] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901800
>[  164.297622] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74900 state to ffff8803f0901800
>[  164.297625] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a60800 state to ffff8803f0901800
>[  164.297626] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74900 to [CRTC:21]
>[  164.297627] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74900
>[  164.297628] [drm:drm_atomic_check_only] checking ffff8803f0901800
>[  164.297632] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.297633] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.297635] [drm:drm_atomic_commit] commiting ffff8803f0901800
>[  164.297645] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.297649] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901800
>[  164.297650] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901800
>[  164.303130] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.307642] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901800
>[  164.307646] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74240 state to ffff8803f0901800
>[  164.307648] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a62800 state to ffff8803f0901800
>[  164.307649] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74240 to [CRTC:21]
>[  164.307651] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74240
>[  164.307652] [drm:drm_atomic_check_only] checking ffff8803f0901800
>[  164.307656] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.307658] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.307659] [drm:drm_atomic_commit] commiting ffff8803f0901800
>[  164.307669] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.307674] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901800
>[  164.307675] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901800
>[  164.317690] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902400
>[  164.317695] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74900 state to ffff8803f0902400
>[  164.317697] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a60800 state to ffff8803f0902400
>[  164.317698] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74900 to [CRTC:21]
>[  164.317699] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74900
>[  164.317700] [drm:drm_atomic_check_only] checking ffff8803f0902400
>[  164.317705] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.317706] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.317707] [drm:drm_atomic_commit] commiting ffff8803f0902400
>[  164.317718] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.317722] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902400
>[  164.317724] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902400
>[  164.319806] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.327640] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900600
>[  164.327644] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74600 state to ffff8803f0900600
>[  164.327646] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a62800 state to ffff8803f0900600
>[  164.327647] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74600 to [CRTC:21]
>[  164.327649] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74600
>[  164.327650] [drm:drm_atomic_check_only] checking ffff8803f0900600
>[  164.327654] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.327655] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.327656] [drm:drm_atomic_commit] commiting ffff8803f0900600
>[  164.327664] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.327667] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900600
>[  164.327669] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900600
>[  164.336511] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.337689] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902600
>[  164.337692] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74540 state to ffff8803f0902600
>[  164.337694] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a60800 state to ffff8803f0902600
>[  164.337695] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74540 to [CRTC:21]
>[  164.337696] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74540
>[  164.337697] [drm:drm_atomic_check_only] checking ffff8803f0902600
>[  164.337701] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.337702] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.337703] [drm:drm_atomic_commit] commiting ffff8803f0902600
>[  164.337711] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.337713] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902600
>[  164.337715] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902600
>[  164.347801] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900c00
>[  164.347805] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74600 state to ffff8803f0900c00
>[  164.347807] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a62800 state to ffff8803f0900c00
>[  164.347808] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74600 to [CRTC:21]
>[  164.347810] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74600
>[  164.347811] [drm:drm_atomic_check_only] checking ffff8803f0900c00
>[  164.347815] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.347816] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.347817] [drm:drm_atomic_commit] commiting ffff8803f0900c00
>[  164.347828] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.347832] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900c00
>[  164.347833] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900c00
>[  164.353200] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.357839] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901600
>[  164.357844] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74240 state to ffff8803f0901600
>[  164.357846] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a60800 state to ffff8803f0901600
>[  164.357847] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74240 to [CRTC:21]
>[  164.357848] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74240
>[  164.357849] [drm:drm_atomic_check_only] checking ffff8803f0901600
>[  164.357854] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.357855] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.357856] [drm:drm_atomic_commit] commiting ffff8803f0901600
>[  164.357866] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.357871] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901600
>[  164.357872] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901600
>[  164.367864] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902400
>[  164.367869] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74600 state to ffff8803f0902400
>[  164.367871] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a62800 state to ffff8803f0902400
>[  164.367872] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74600 to [CRTC:21]
>[  164.367873] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74600
>[  164.367874] [drm:drm_atomic_check_only] checking ffff8803f0902400
>[  164.367879] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.367880] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.367881] [drm:drm_atomic_commit] commiting ffff8803f0902400
>[  164.367891] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.367896] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902400
>[  164.367897] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902400
>[  164.369867] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.377895] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903a00
>[  164.377899] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74900 state to ffff8803f0903a00
>[  164.377902] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a60800 state to ffff8803f0903a00
>[  164.377903] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74900 to [CRTC:21]
>[  164.377904] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74900
>[  164.377905] [drm:drm_atomic_check_only] checking ffff8803f0903a00
>[  164.377909] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.377910] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.377912] [drm:drm_atomic_commit] commiting ffff8803f0903a00
>[  164.377922] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.377926] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903a00
>[  164.377928] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903a00
>[  164.386575] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.387856] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900200
>[  164.387859] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74540 state to ffff8803f0900200
>[  164.387861] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a62800 state to ffff8803f0900200
>[  164.387862] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74540 to [CRTC:21]
>[  164.387863] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74540
>[  164.387864] [drm:drm_atomic_check_only] checking ffff8803f0900200
>[  164.387868] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.387869] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.387871] [drm:drm_atomic_commit] commiting ffff8803f0900200
>[  164.387878] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.387880] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900200
>[  164.387882] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900200
>[  164.397960] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901000
>[  164.397965] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74900 state to ffff8803f0901000
>[  164.397967] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a60800 state to ffff8803f0901000
>[  164.397968] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74900 to [CRTC:21]
>[  164.397969] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74900
>[  164.397970] [drm:drm_atomic_check_only] checking ffff8803f0901000
>[  164.397975] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.397976] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.397977] [drm:drm_atomic_commit] commiting ffff8803f0901000
>[  164.397988] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.397993] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901000
>[  164.397994] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901000
>[  164.403259] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.407994] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902200
>[  164.407999] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74240 state to ffff8803f0902200
>[  164.408001] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a62800 state to ffff8803f0902200
>[  164.408002] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74240 to [CRTC:21]
>[  164.408003] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74240
>[  164.408004] [drm:drm_atomic_check_only] checking ffff8803f0902200
>[  164.408008] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.408010] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.408011] [drm:drm_atomic_commit] commiting ffff8803f0902200
>[  164.408021] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.408025] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902200
>[  164.408027] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902200
>[  164.419016] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901e00
>[  164.419039] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74900 state to ffff8803f0901e00
>[  164.419041] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a60800 state to ffff8803f0901e00
>[  164.419042] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74900 to [CRTC:21]
>[  164.419044] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74900
>[  164.419045] [drm:drm_atomic_check_only] checking ffff8803f0901e00
>[  164.419049] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.419050] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.419051] [drm:drm_atomic_commit] commiting ffff8803f0901e00
>[  164.419060] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.419064] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901e00
>[  164.419065] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901e00
>[  164.420521] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.429078] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903a00
>[  164.429083] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74600 state to ffff8803f0903a00
>[  164.429085] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a62800 state to ffff8803f0903a00
>[  164.429086] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74600 to [CRTC:21]
>[  164.429087] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74600
>[  164.429088] [drm:drm_atomic_check_only] checking ffff8803f0903a00
>[  164.429092] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.429094] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.429095] [drm:drm_atomic_commit] commiting ffff8803f0903a00
>[  164.429105] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.429110] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903a00
>[  164.429111] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903a00
>[  164.437639] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.439076] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901c00
>[  164.439079] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74240 state to ffff8803f0901c00
>[  164.439081] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a60800 state to ffff8803f0901c00
>[  164.439082] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74240 to [CRTC:21]
>[  164.439083] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74240
>[  164.439084] [drm:drm_atomic_check_only] checking ffff8803f0901c00
>[  164.439088] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.439089] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.439090] [drm:drm_atomic_commit] commiting ffff8803f0901c00
>[  164.439099] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901c00
>[  164.439100] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901c00
>[  164.449209] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900c00
>[  164.449214] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74540 state to ffff8803f0900c00
>[  164.449216] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a62800 state to ffff8803f0900c00
>[  164.449217] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74540 to [CRTC:21]
>[  164.449218] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74540
>[  164.449219] [drm:drm_atomic_check_only] checking ffff8803f0900c00
>[  164.449224] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.449225] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.449227] [drm:drm_atomic_commit] commiting ffff8803f0900c00
>[  164.449237] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.449242] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900c00
>[  164.449243] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900c00
>[  164.453894] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.459163] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900200
>[  164.459167] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74900 state to ffff8803f0900200
>[  164.459169] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a60800 state to ffff8803f0900200
>[  164.459171] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74900 to [CRTC:21]
>[  164.459172] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74900
>[  164.459173] [drm:drm_atomic_check_only] checking ffff8803f0900200
>[  164.459177] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.459178] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.459179] [drm:drm_atomic_commit] commiting ffff8803f0900200
>[  164.459190] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900200
>[  164.459192] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900200
>[  164.469280] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900a00
>[  164.469285] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74600 state to ffff8803f0900a00
>[  164.469287] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a62800 state to ffff8803f0900a00
>[  164.469289] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74600 to [CRTC:21]
>[  164.469290] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74600
>[  164.469291] [drm:drm_atomic_check_only] checking ffff8803f0900a00
>[  164.469295] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.469297] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.469298] [drm:drm_atomic_commit] commiting ffff8803f0900a00
>[  164.469308] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.469313] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900a00
>[  164.469314] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900a00
>[  164.470895] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.479306] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901a00
>[  164.479310] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74540 state to ffff8803f0901a00
>[  164.479313] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a60800 state to ffff8803f0901a00
>[  164.479314] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74540 to [CRTC:21]
>[  164.479315] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74540
>[  164.479316] [drm:drm_atomic_check_only] checking ffff8803f0901a00
>[  164.479320] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.479322] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.479323] [drm:drm_atomic_commit] commiting ffff8803f0901a00
>[  164.479333] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.479338] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901a00
>[  164.479339] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901a00
>[  164.486815] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.489337] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902e00
>[  164.489342] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74600 state to ffff8803f0902e00
>[  164.489344] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a62800 state to ffff8803f0902e00
>[  164.489345] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74600 to [CRTC:21]
>[  164.489346] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74600
>[  164.489347] [drm:drm_atomic_check_only] checking ffff8803f0902e00
>[  164.489351] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.489353] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.489354] [drm:drm_atomic_commit] commiting ffff8803f0902e00
>[  164.489365] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902e00
>[  164.489367] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902e00
>[  164.499344] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe078c00
>[  164.499348] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba4359c0 state to ffff8803fe078c00
>[  164.499350] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38c000 state to ffff8803fe078c00
>[  164.499351] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba4359c0 to [CRTC:21]
>[  164.499353] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba4359c0
>[  164.499354] [drm:drm_atomic_check_only] checking ffff8803fe078c00
>[  164.499358] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.499359] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.499360] [drm:drm_atomic_commit] commiting ffff8803fe078c00
>[  164.499369] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.499373] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe078c00
>[  164.499375] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe078c00
>[  164.503790] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.509359] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe079c00
>[  164.509372] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435840 state to ffff8803fe079c00
>[  164.509374] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38b800 state to ffff8803fe079c00
>[  164.509375] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435840 to [CRTC:21]
>[  164.509376] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba435840
>[  164.509377] [drm:drm_atomic_check_only] checking ffff8803fe079c00
>[  164.509381] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.509382] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.509384] [drm:drm_atomic_commit] commiting ffff8803fe079c00
>[  164.509392] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.509396] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe079c00
>[  164.509398] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe079c00
>[  164.519463] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902200
>[  164.519467] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74600 state to ffff8803f0902200
>[  164.519469] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a60800 state to ffff8803f0902200
>[  164.519470] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74600 to [CRTC:21]
>[  164.519472] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74600
>[  164.519473] [drm:drm_atomic_check_only] checking ffff8803f0902200
>[  164.519477] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.519478] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.519480] [drm:drm_atomic_commit] commiting ffff8803f0902200
>[  164.519490] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.519494] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902200
>[  164.519495] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902200
>[  164.520853] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.529488] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901000
>[  164.529493] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74240 state to ffff8803f0901000
>[  164.529495] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a67c00 state to ffff8803f0901000
>[  164.529496] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74240 to [CRTC:21]
>[  164.529497] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74240
>[  164.529498] [drm:drm_atomic_check_only] checking ffff8803f0901000
>[  164.529503] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.529504] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.529505] [drm:drm_atomic_commit] commiting ffff8803f0901000
>[  164.529515] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.529520] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901000
>[  164.529521] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901000
>[  164.536965] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.539525] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903600
>[  164.539529] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e4a74540 state to ffff8803f0903600
>[  164.539531] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a60800 state to ffff8803f0903600
>[  164.539532] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e4a74540 to [CRTC:21]
>[  164.539533] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e4a74540
>[  164.539534] [drm:drm_atomic_check_only] checking ffff8803f0903600
>[  164.539539] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.539540] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.539541] [drm:drm_atomic_commit] commiting ffff8803f0903600
>[  164.539552] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903600
>[  164.539554] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903600
>[  164.549592] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07bc00
>[  164.549596] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba4359c0 state to ffff8803fe07bc00
>[  164.549599] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38c000 state to ffff8803fe07bc00
>[  164.549600] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba4359c0 to [CRTC:21]
>[  164.549601] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba4359c0
>[  164.549602] [drm:drm_atomic_check_only] checking ffff8803fe07bc00
>[  164.549606] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.549607] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.549608] [drm:drm_atomic_commit] commiting ffff8803fe07bc00
>[  164.549619] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.549624] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07bc00
>[  164.549626] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07bc00
>[  164.554100] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.559534] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903000
>[  164.559539] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353a80 state to ffff8803f0903000
>[  164.559542] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a67c00 state to ffff8803f0903000
>[  164.559543] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353a80 to [CRTC:21]
>[  164.559545] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353a80
>[  164.559546] [drm:drm_atomic_check_only] checking ffff8803f0903000
>[  164.559552] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.559553] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.559555] [drm:drm_atomic_commit] commiting ffff8803f0903000
>[  164.559564] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.559568] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903000
>[  164.559570] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903000
>[  164.569632] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903800
>[  164.569636] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8804133539c0 state to ffff8803f0903800
>[  164.569638] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64000 state to ffff8803f0903800
>[  164.569639] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804133539c0 to [CRTC:21]
>[  164.569640] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8804133539c0
>[  164.569641] [drm:drm_atomic_check_only] checking ffff8803f0903800
>[  164.569646] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.569647] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.569648] [drm:drm_atomic_commit] commiting ffff8803f0903800
>[  164.569658] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.569662] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903800
>[  164.569663] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903800
>[  164.570773] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.587280] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.589608] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900400
>[  164.589610] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353600 state to ffff8803f0900400
>[  164.589612] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a67c00 state to ffff8803f0900400
>[  164.589638] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353600 to [CRTC:21]
>[  164.589639] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353600
>[  164.589640] [drm:drm_atomic_check_only] checking ffff8803f0900400
>[  164.589644] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.589645] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.589648] [drm:drm_atomic_commit] commiting ffff8803f0900400
>[  164.589657] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900400
>[  164.589659] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900400
>[  164.599730] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07ac00
>[  164.599735] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435600 state to ffff8803fe07ac00
>[  164.599737] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38b400 state to ffff8803fe07ac00
>[  164.599738] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435600 to [CRTC:21]
>[  164.599739] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba435600
>[  164.599740] [drm:drm_atomic_check_only] checking ffff8803fe07ac00
>[  164.599745] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.599746] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.599747] [drm:drm_atomic_commit] commiting ffff8803fe07ac00
>[  164.599757] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.599761] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07ac00
>[  164.599763] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07ac00
>[  164.603951] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.609666] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901e00
>[  164.609672] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353240 state to ffff8803f0901e00
>[  164.609674] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64000 state to ffff8803f0901e00
>[  164.609675] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353240 to [CRTC:21]
>[  164.609677] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353240
>[  164.609678] [drm:drm_atomic_check_only] checking ffff8803f0901e00
>[  164.609683] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.609685] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.609686] [drm:drm_atomic_commit] commiting ffff8803f0901e00
>[  164.609700] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.609704] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901e00
>[  164.609706] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901e00
>[  164.619782] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903800
>[  164.619786] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353b40 state to ffff8803f0903800
>[  164.619788] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63c00 state to ffff8803f0903800
>[  164.619790] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353b40 to [CRTC:21]
>[  164.619791] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353b40
>[  164.619792] [drm:drm_atomic_check_only] checking ffff8803f0903800
>[  164.619796] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.619797] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.619799] [drm:drm_atomic_commit] commiting ffff8803f0903800
>[  164.619809] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.619813] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903800
>[  164.619814] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903800
>[  164.620971] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.629811] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900c00
>[  164.629816] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353540 state to ffff8803f0900c00
>[  164.629818] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64000 state to ffff8803f0900c00
>[  164.629819] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353540 to [CRTC:21]
>[  164.629820] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353540
>[  164.629821] [drm:drm_atomic_check_only] checking ffff8803f0900c00
>[  164.629825] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.629827] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.629828] [drm:drm_atomic_commit] commiting ffff8803f0900c00
>[  164.629838] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.629843] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900c00
>[  164.629844] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900c00
>[  164.637132] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.639772] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe079600
>[  164.639775] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435b40 state to ffff8803fe079600
>[  164.639778] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38b000 state to ffff8803fe079600
>[  164.639779] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435b40 to [CRTC:21]
>[  164.639780] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba435b40
>[  164.639781] [drm:drm_atomic_check_only] checking ffff8803fe079600
>[  164.639785] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.639786] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.639787] [drm:drm_atomic_commit] commiting ffff8803fe079600
>[  164.639796] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe079600
>[  164.639798] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe079600
>[  164.649871] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903200
>[  164.649876] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353000 state to ffff8803f0903200
>[  164.649878] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63c00 state to ffff8803f0903200
>[  164.649879] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353000 to [CRTC:21]
>[  164.649880] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353000
>[  164.649881] [drm:drm_atomic_check_only] checking ffff8803f0903200
>[  164.649886] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.649887] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.649888] [drm:drm_atomic_commit] commiting ffff8803f0903200
>[  164.649899] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.649904] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903200
>[  164.649905] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903200
>[  164.653694] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.659822] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900800
>[  164.659828] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353240 state to ffff8803f0900800
>[  164.659830] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64000 state to ffff8803f0900800
>[  164.659832] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353240 to [CRTC:21]
>[  164.659834] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353240
>[  164.659835] [drm:drm_atomic_check_only] checking ffff8803f0900800
>[  164.659841] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.659843] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.659845] [drm:drm_atomic_commit] commiting ffff8803f0900800
>[  164.659856] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.659861] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900800
>[  164.659863] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900800
>[  164.670369] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.679964] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903c00
>[  164.679968] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353b40 state to ffff8803f0903c00
>[  164.679970] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63c00 state to ffff8803f0903c00
>[  164.679971] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353b40 to [CRTC:21]
>[  164.679973] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353b40
>[  164.679974] [drm:drm_atomic_check_only] checking ffff8803f0903c00
>[  164.679978] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.679980] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.679981] [drm:drm_atomic_commit] commiting ffff8803f0903c00
>[  164.679991] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.679996] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903c00
>[  164.679997] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903c00
>[  164.686867] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900000
>[  164.686872] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353240 state to ffff8803f0900000
>[  164.686875] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64000 state to ffff8803f0900000
>[  164.686876] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353240 to [CRTC:21]
>[  164.686878] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353240
>[  164.686879] [drm:drm_atomic_check_only] checking ffff8803f0900000
>[  164.686885] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.686887] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.686889] [drm:drm_atomic_commit] commiting ffff8803f0900000
>[  164.686902] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.686908] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900000
>[  164.686910] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900000
>[  164.687021] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.703776] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.720329] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.737219] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.753711] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.770605] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.787070] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.803953] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.820403] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901c00
>[  164.820409] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353000 state to ffff8803f0901c00
>[  164.820411] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63c00 state to ffff8803f0901c00
>[  164.820412] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353000 to [CRTC:21]
>[  164.820413] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353000
>[  164.820414] [drm:drm_atomic_check_only] checking ffff8803f0901c00
>[  164.820419] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.820420] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.820421] [drm:drm_atomic_commit] commiting ffff8803f0901c00
>[  164.820431] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.820436] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901c00
>[  164.820438] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901c00
>[  164.820551] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.830453] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901400
>[  164.830457] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353b40 state to ffff8803f0901400
>[  164.830459] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64000 state to ffff8803f0901400
>[  164.830460] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353b40 to [CRTC:21]
>[  164.830461] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353b40
>[  164.830462] [drm:drm_atomic_check_only] checking ffff8803f0901400
>[  164.830467] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.830468] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.830469] [drm:drm_atomic_commit] commiting ffff8803f0901400
>[  164.830479] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.830483] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901400
>[  164.830484] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901400
>[  164.837231] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.840503] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903a00
>[  164.840507] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353240 state to ffff8803f0903a00
>[  164.840510] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63c00 state to ffff8803f0903a00
>[  164.840511] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353240 to [CRTC:21]
>[  164.840512] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353240
>[  164.840513] [drm:drm_atomic_check_only] checking ffff8803f0903a00
>[  164.840518] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.840519] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.840520] [drm:drm_atomic_commit] commiting ffff8803f0903a00
>[  164.840531] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903a00
>[  164.840533] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903a00
>[  164.850586] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903200
>[  164.850590] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353cc0 state to ffff8803f0903200
>[  164.850592] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64000 state to ffff8803f0903200
>[  164.850594] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353cc0 to [CRTC:21]
>[  164.850595] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353cc0
>[  164.850596] [drm:drm_atomic_check_only] checking ffff8803f0903200
>[  164.850600] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.850602] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.850603] [drm:drm_atomic_commit] commiting ffff8803f0903200
>[  164.850613] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.850617] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903200
>[  164.850619] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903200
>[  164.850707] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903600
>[  164.850709] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353240 state to ffff8803f0903600
>[  164.850710] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63c00 state to ffff8803f0903600
>[  164.850711] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353240 to [CRTC:21]
>[  164.850712] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353240
>[  164.850712] [drm:drm_atomic_check_only] checking ffff8803f0903600
>[  164.850714] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.850715] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.850716] [drm:drm_atomic_commit] commiting ffff8803f0903600
>[  164.850720] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.850722] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903600
>[  164.850723] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903600
>[  164.853935] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.860544] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900a00
>[  164.860548] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353b40 state to ffff8803f0900a00
>[  164.860550] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a67c00 state to ffff8803f0900a00
>[  164.860551] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353b40 to [CRTC:21]
>[  164.860553] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353b40
>[  164.860554] [drm:drm_atomic_check_only] checking ffff8803f0900a00
>[  164.860558] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.860559] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.860560] [drm:drm_atomic_commit] commiting ffff8803f0900a00
>[  164.860568] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.860572] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900a00
>[  164.860573] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900a00
>[  164.860770] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903200
>[  164.860772] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353240 state to ffff8803f0903200
>[  164.860773] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63c00 state to ffff8803f0903200
>[  164.860774] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353240 to [CRTC:21]
>[  164.860775] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353240
>[  164.860775] [drm:drm_atomic_check_only] checking ffff8803f0903200
>[  164.860777] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.860778] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.860779] [drm:drm_atomic_commit] commiting ffff8803f0903200
>[  164.860783] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.860785] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903200
>[  164.860796] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903200
>[  164.865713] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.870664] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901400
>[  164.870669] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353000 state to ffff8803f0901400
>[  164.870671] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a67c00 state to ffff8803f0901400
>[  164.870672] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353000 to [CRTC:21]
>[  164.870673] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353000
>[  164.870674] [drm:drm_atomic_check_only] checking ffff8803f0901400
>[  164.870678] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.870680] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.870681] [drm:drm_atomic_commit] commiting ffff8803f0901400
>[  164.870691] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.870696] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901400
>[  164.870697] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901400
>[  164.877191] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.880728] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902600
>[  164.880733] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353b40 state to ffff8803f0902600
>[  164.880735] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63c00 state to ffff8803f0902600
>[  164.880736] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353b40 to [CRTC:21]
>[  164.880738] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353b40
>[  164.880739] [drm:drm_atomic_check_only] checking ffff8803f0902600
>[  164.880743] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.880744] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.880745] [drm:drm_atomic_commit] commiting ffff8803f0902600
>[  164.880756] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902600
>[  164.880758] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902600
>[  164.888070] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.890753] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900200
>[  164.890758] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353240 state to ffff8803f0900200
>[  164.890760] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a67c00 state to ffff8803f0900200
>[  164.890761] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353240 to [CRTC:21]
>[  164.890762] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353240
>[  164.890763] [drm:drm_atomic_check_only] checking ffff8803f0900200
>[  164.890768] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.890769] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.890770] [drm:drm_atomic_commit] commiting ffff8803f0900200
>[  164.890781] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900200
>[  164.890783] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900200
>[  164.900780] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901800
>[  164.900785] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353cc0 state to ffff8803f0901800
>[  164.900787] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63c00 state to ffff8803f0901800
>[  164.900788] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353cc0 to [CRTC:21]
>[  164.900789] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353cc0
>[  164.900790] [drm:drm_atomic_check_only] checking ffff8803f0901800
>[  164.900795] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.900796] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.900797] [drm:drm_atomic_commit] commiting ffff8803f0901800
>[  164.900808] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.900812] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901800
>[  164.900814] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901800
>[  164.904042] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.910750] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901c00
>[  164.910754] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353b40 state to ffff8803f0901c00
>[  164.910756] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a67c00 state to ffff8803f0901c00
>[  164.910757] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353b40 to [CRTC:21]
>[  164.910758] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353b40
>[  164.910759] [drm:drm_atomic_check_only] checking ffff8803f0901c00
>[  164.910763] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.910765] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.910766] [drm:drm_atomic_commit] commiting ffff8803f0901c00
>[  164.910773] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.910776] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901c00
>[  164.910778] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901c00
>[  164.920568] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.920792] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902400
>[  164.920795] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353180 state to ffff8803f0902400
>[  164.920797] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63c00 state to ffff8803f0902400
>[  164.920798] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353180 to [CRTC:21]
>[  164.920800] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353180
>[  164.920801] [drm:drm_atomic_check_only] checking ffff8803f0902400
>[  164.920805] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.920806] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.920807] [drm:drm_atomic_commit] commiting ffff8803f0902400
>[  164.920816] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902400
>[  164.920818] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902400
>[  164.930884] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901200
>[  164.930889] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353240 state to ffff8803f0901200
>[  164.930891] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a67c00 state to ffff8803f0901200
>[  164.930892] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353240 to [CRTC:21]
>[  164.930893] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353240
>[  164.930894] [drm:drm_atomic_check_only] checking ffff8803f0901200
>[  164.930899] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.930900] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.930901] [drm:drm_atomic_commit] commiting ffff8803f0901200
>[  164.930912] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.930916] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901200
>[  164.930917] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901200
>[  164.937392] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.940962] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901a00
>[  164.940967] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353cc0 state to ffff8803f0901a00
>[  164.940969] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63c00 state to ffff8803f0901a00
>[  164.940970] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353cc0 to [CRTC:21]
>[  164.940971] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353cc0
>[  164.940972] [drm:drm_atomic_check_only] checking ffff8803f0901a00
>[  164.940976] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.940977] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.940978] [drm:drm_atomic_commit] commiting ffff8803f0901a00
>[  164.940989] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901a00
>[  164.940991] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901a00
>[  164.950983] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900a00
>[  164.950988] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353b40 state to ffff8803f0900a00
>[  164.950990] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a67c00 state to ffff8803f0900a00
>[  164.950991] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353b40 to [CRTC:21]
>[  164.950992] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353b40
>[  164.950993] [drm:drm_atomic_check_only] checking ffff8803f0900a00
>[  164.950998] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.950999] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.951000] [drm:drm_atomic_commit] commiting ffff8803f0900a00
>[  164.951011] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.951015] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900a00
>[  164.951016] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900a00
>[  164.954007] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.960942] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900000
>[  164.960947] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353240 state to ffff8803f0900000
>[  164.960948] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63c00 state to ffff8803f0900000
>[  164.960949] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353240 to [CRTC:21]
>[  164.960951] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353240
>[  164.960952] [drm:drm_atomic_check_only] checking ffff8803f0900000
>[  164.960956] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.960957] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.960959] [drm:drm_atomic_commit] commiting ffff8803f0900000
>[  164.960966] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.960969] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900000
>[  164.960971] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900000
>[  164.970777] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.970998] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900c00
>[  164.971002] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353cc0 state to ffff8803f0900c00
>[  164.971004] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a67c00 state to ffff8803f0900c00
>[  164.971005] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353cc0 to [CRTC:21]
>[  164.971006] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353cc0
>[  164.971007] [drm:drm_atomic_check_only] checking ffff8803f0900c00
>[  164.971011] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.971012] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.971013] [drm:drm_atomic_commit] commiting ffff8803f0900c00
>[  164.971022] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900c00
>[  164.971024] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900c00
>[  164.981081] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902800
>[  164.981086] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353180 state to ffff8803f0902800
>[  164.981088] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63c00 state to ffff8803f0902800
>[  164.981089] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353180 to [CRTC:21]
>[  164.981090] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353180
>[  164.981091] [drm:drm_atomic_check_only] checking ffff8803f0902800
>[  164.981096] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.981097] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.981098] [drm:drm_atomic_commit] commiting ffff8803f0902800
>[  164.981108] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.981113] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902800
>[  164.981114] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902800
>[  164.987391] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  164.991111] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900e00
>[  164.991115] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353b40 state to ffff8803f0900e00
>[  164.991117] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a67c00 state to ffff8803f0900e00
>[  164.991118] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353b40 to [CRTC:21]
>[  164.991120] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353b40
>[  164.991121] [drm:drm_atomic_check_only] checking ffff8803f0900e00
>[  164.991125] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  164.991126] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  164.991127] [drm:drm_atomic_commit] commiting ffff8803f0900e00
>[  164.991138] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900e00
>[  164.991140] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900e00
>[  165.001144] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903a00
>[  165.001149] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353240 state to ffff8803f0903a00
>[  165.001151] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63c00 state to ffff8803f0903a00
>[  165.001152] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353240 to [CRTC:21]
>[  165.001153] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353240
>[  165.001154] [drm:drm_atomic_check_only] checking ffff8803f0903a00
>[  165.001159] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  165.001160] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  165.001161] [drm:drm_atomic_commit] commiting ffff8803f0903a00
>[  165.001172] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  165.001176] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903a00
>[  165.001177] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903a00
>[  165.004152] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  165.011140] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900a00
>[  165.011144] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353180 state to ffff8803f0900a00
>[  165.011146] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a67c00 state to ffff8803f0900a00
>[  165.011147] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353180 to [CRTC:21]
>[  165.011149] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353180
>[  165.011150] [drm:drm_atomic_check_only] checking ffff8803f0900a00
>[  165.011154] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  165.011155] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  165.011157] [drm:drm_atomic_commit] commiting ffff8803f0900a00
>[  165.011164] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  165.011166] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900a00
>[  165.011168] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900a00
>[  165.020760] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  165.037508] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  165.054149] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  165.070878] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  165.087471] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  165.104216] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  165.120845] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  165.137633] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  165.154191] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  165.206979] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  165.600318] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe079600
>[  165.600324] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435600 state to ffff8803fe079600
>[  165.600327] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38ac00 state to ffff8803fe079600
>[  165.600329] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435600 to [NOCRTC]
>[  165.600330] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800ba435600
>[  165.600332] [drm:drm_atomic_check_only] checking ffff8803fe079600
>[  165.600337] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb -1
>[  165.600339] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 0, off 1, on 0, ms 0
>[  165.600341] [drm:drm_atomic_commit] commiting ffff8803fe079600
>[  165.600359] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe079600
>[  165.600361] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe079600
>[  166.025638] [drm:drm_atomic_state_init] Allocated atomic state ffff8804064aae00
>[  166.025642] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041b05d600 state to ffff8804064aae00
>[  166.025645] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413bb8c00 state to ffff8804064aae00
>[  166.025646] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041b05d600 to [CRTC:21]
>[  166.025647] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041b05d600
>[  166.025648] [drm:drm_atomic_check_only] checking ffff8804064aae00
>[  166.025652] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  166.025653] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[  166.025654] [drm:drm_atomic_commit] commiting ffff8804064aae00
>[  166.025670] [drm:ilk_fbc_disable] disabled FBC
>[  166.025673] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8804064aae00
>[  166.025674] [drm:drm_atomic_state_free] Freeing atomic state ffff8804064aae00
>[  166.025812] [drm:drm_atomic_state_init] Allocated atomic state ffff8804064ab400
>[  166.025815] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041b05d300 state to ffff8804064ab400
>[  166.025816] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413bbb000 state to ffff8804064ab400
>[  166.025817] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041b05d300 to [CRTC:21]
>[  166.025818] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041b05d300
>[  166.025819] [drm:drm_atomic_check_only] checking ffff8804064ab400
>[  166.025821] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  166.025822] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  166.025823] [drm:drm_atomic_commit] commiting ffff8804064ab400
>[  166.025831] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  166.025834] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8804064ab400
>[  166.025835] [drm:drm_atomic_state_free] Freeing atomic state ffff8804064ab400
>[  166.026425] [drm:drm_atomic_state_init] Allocated atomic state ffff8804064a8600
>[  166.026428] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041b05d600 state to ffff8804064a8600
>[  166.026429] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413bb8c00 state to ffff8804064a8600
>[  166.026430] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041b05d600 to [CRTC:21]
>[  166.026431] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041b05d600
>[  166.026432] [drm:drm_atomic_check_only] checking ffff8804064a8600
>[  166.026434] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  166.026435] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  166.026436] [drm:drm_atomic_commit] commiting ffff8804064a8600
>[  166.026444] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  166.026446] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8804064a8600
>[  166.026447] [drm:drm_atomic_state_free] Freeing atomic state ffff8804064a8600
>[  166.035505] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  166.035600] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  166.035648] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  166.035708] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  166.046296] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  166.077902] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  166.127837] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  166.241521] [drm:ilk_fbc_disable] disabled FBC
>[  166.252333] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  166.280014] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  166.338112] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  166.442911] [drm:ilk_fbc_disable] disabled FBC
>[  166.494937] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  166.505885] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903a00
>[  166.505891] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353d80 state to ffff8803f0903a00
>[  166.505895] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a62800 state to ffff8803f0903a00
>[  166.505896] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353d80 to [NOCRTC]
>[  166.505898] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880413353d80
>[  166.505899] [drm:drm_atomic_check_only] checking ffff8803f0903a00
>[  166.505905] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb -1
>[  166.505906] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 0, off 1, on 0, ms 0
>[  166.505908] [drm:drm_atomic_commit] commiting ffff8803f0903a00
>[  166.505929] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903a00
>[  166.505931] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903a00
>[  166.527869] [drm:ilk_fbc_disable] disabled FBC
>[  166.585026] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  166.684559] [drm:ilk_fbc_disable] disabled FBC
>[  166.741847] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  166.825219] [drm:ilk_fbc_disable] disabled FBC
>[  166.881989] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  166.968078] [drm:ilk_fbc_disable] disabled FBC
>[  167.025464] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  167.066032] [drm:ilk_fbc_disable] disabled FBC
>[  167.122229] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  167.226419] [drm:ilk_fbc_disable] disabled FBC
>[  167.282387] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  167.339908] [drm:ilk_fbc_disable] disabled FBC
>[  167.395836] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  167.439159] [drm:ilk_fbc_disable] disabled FBC
>[  167.495936] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  167.597047] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe078600
>[  167.597051] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800ba435d80 state to ffff8803fe078600
>[  167.597054] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38a000 state to ffff8803fe078600
>[  167.597055] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800ba435d80 to [CRTC:21]
>[  167.597056] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800ba435d80
>[  167.597057] [drm:drm_atomic_check_only] checking ffff8803fe078600
>[  167.597061] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  167.597062] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[  167.597063] [drm:drm_atomic_commit] commiting ffff8803fe078600
>[  167.597081] [drm:ilk_fbc_disable] disabled FBC
>[  167.597084] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe078600
>[  167.597085] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe078600
>[  167.609083] [drm:drm_atomic_state_init] Allocated atomic state ffff8804064a9c00
>[  167.609089] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041b05d780 state to ffff8804064a9c00
>[  167.609092] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413bbd400 state to ffff8804064a9c00
>[  167.609093] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041b05d780 to [NOCRTC]
>[  167.609095] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88041b05d780
>[  167.609096] [drm:drm_atomic_check_only] checking ffff8804064a9c00
>[  167.609102] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb -1
>[  167.609103] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 0, off 1, on 0, ms 0
>[  167.609105] [drm:drm_atomic_commit] commiting ffff8804064a9c00
>[  167.609125] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8804064a9c00
>[  167.609128] [drm:drm_atomic_state_free] Freeing atomic state ffff8804064a9c00
>[  167.611441] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902600
>[  167.611446] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353d80 state to ffff8803f0902600
>[  167.611449] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63800 state to ffff8803f0902600
>[  167.611450] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353d80 to [CRTC:21]
>[  167.611451] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353d80
>[  167.611452] [drm:drm_atomic_check_only] checking ffff8803f0902600
>[  167.611456] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  167.611457] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[  167.611458] [drm:drm_atomic_commit] commiting ffff8803f0902600
>[  167.611475] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  167.611479] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902600
>[  167.611480] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902600
>[  167.618084] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902600
>[  167.618089] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353cc0 state to ffff8803f0902600
>[  167.618091] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a62400 state to ffff8803f0902600
>[  167.618092] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353cc0 to [CRTC:21]
>[  167.618093] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353cc0
>[  167.618094] [drm:drm_atomic_check_only] checking ffff8803f0902600
>[  167.618098] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  167.618100] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  167.618101] [drm:drm_atomic_commit] commiting ffff8803f0902600
>[  167.618115] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  167.618119] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902600
>[  167.618120] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902600
>[  167.630203] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901e00
>[  167.630207] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353d80 state to ffff8803f0901e00
>[  167.630209] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63800 state to ffff8803f0901e00
>[  167.630210] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353d80 to [CRTC:21]
>[  167.630211] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353d80
>[  167.630213] [drm:drm_atomic_check_only] checking ffff8803f0901e00
>[  167.630217] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  167.630218] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  167.630219] [drm:drm_atomic_commit] commiting ffff8803f0901e00
>[  167.630233] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  167.630237] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901e00
>[  167.630239] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901e00
>[  167.631270] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  167.640237] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900a00
>[  167.640241] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8804133530c0 state to ffff8803f0900a00
>[  167.640244] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a62400 state to ffff8803f0900a00
>[  167.640245] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804133530c0 to [CRTC:21]
>[  167.640246] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8804133530c0
>[  167.640247] [drm:drm_atomic_check_only] checking ffff8803f0900a00
>[  167.640251] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  167.640253] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  167.640254] [drm:drm_atomic_commit] commiting ffff8803f0900a00
>[  167.640268] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  167.640272] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900a00
>[  167.640274] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900a00
>[  167.660324] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900e00
>[  167.660329] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff880413353d80 state to ffff8803f0900e00
>[  167.660331] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a63800 state to ffff8803f0900e00
>[  167.660332] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880413353d80 to [CRTC:21]
>[  167.660333] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff880413353d80
>[  167.660334] [drm:drm_atomic_check_only] checking ffff8803f0900e00
>[  167.660339] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  167.660340] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  167.660341] [drm:drm_atomic_commit] commiting ffff8803f0900e00
>[  167.660355] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  167.660359] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900e00
>[  167.660361] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900e00
>[  167.670356] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903200
>[  167.670361] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8804133530c0 state to ffff8803f0903200
>[  167.670363] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a62400 state to ffff8803f0903200
>[  167.670364] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804133530c0 to [CRTC:21]
>[  167.670365] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8804133530c0
>[  167.670366] [drm:drm_atomic_check_only] checking ffff8803f0903200
>[  167.670370] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  167.670372] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  167.670373] [drm:drm_atomic_commit] commiting ffff8803f0903200
>[  167.670387] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  167.670392] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903200
>[  167.670393] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903200
>[  167.719493] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  167.747781] [drm:drm_atomic_state_init] Allocated atomic state ffff88041b52ae00
>[  167.747785] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea7089c0 state to ffff88041b52ae00
>[  167.747787] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8d9b000 state to ffff88041b52ae00
>[  167.747788] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea7089c0 to [NOCRTC]
>[  167.747790] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8803ea7089c0
>[  167.747791] [drm:drm_atomic_check_only] checking ffff88041b52ae00
>[  167.747795] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb -1
>[  167.747796] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 0, off 1, on 0, ms 0
>[  167.747797] [drm:drm_atomic_commit] commiting ffff88041b52ae00
>[  167.747815] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88041b52ae00
>[  167.747816] [drm:drm_atomic_state_free] Freeing atomic state ffff88041b52ae00
>[  167.769982] [drm:ilk_fbc_disable] disabled FBC
>[  167.826269] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  167.920536] [drm:ilk_fbc_disable] disabled FBC
>[  167.976418] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  168.031635] [drm:ilk_fbc_disable] disabled FBC
>[  168.089864] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  168.267186] [drm:ilk_fbc_disable] disabled FBC
>[  168.323406] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  168.387577] [drm:ilk_fbc_disable] disabled FBC
>[  168.443551] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  169.062728] [drm:ilk_fbc_disable] disabled FBC
>[  169.119652] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  169.177629] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  169.225292] [drm:ilk_fbc_disable] disabled FBC
>[  169.281054] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  169.318229] [drm:ilk_fbc_disable] disabled FBC
>[  169.374483] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  169.491611] [drm:ilk_fbc_disable] disabled FBC
>[  169.547989] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  169.604042] [drm:ilk_fbc_disable] disabled FBC
>[  169.661436] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  169.797684] [drm:ilk_fbc_disable] disabled FBC
>[  169.854963] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  170.060976] [drm:ilk_fbc_disable] disabled FBC
>[  170.107944] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  170.165275] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  170.191615] [drm:ilk_fbc_disable] disabled FBC
>[  170.201786] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  170.258702] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  172.988615] [drm:ilk_fbc_disable] disabled FBC
>[  173.005702] iwlwifi 0000:06:00.0: L1 Disabled - LTR Enabled
>[  173.005938] iwlwifi 0000:06:00.0: L1 Disabled - LTR Enabled
>[  173.044789] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  173.207337] iwlwifi 0000:06:00.0: L1 Disabled - LTR Enabled
>[  173.207572] iwlwifi 0000:06:00.0: L1 Disabled - LTR Enabled
>[  173.223725] IPv6: ADDRCONF(NETDEV_UP): wlp6s0: link is not ready
>[  176.016701] wlp6s0: authenticate with 00:24:b2:c5:7a:d4
>[  176.019041] wlp6s0: send auth to 00:24:b2:c5:7a:d4 (try 1/3)
>[  176.122893] wlp6s0: authenticated
>[  176.124523] wlp6s0: associate with 00:24:b2:c5:7a:d4 (try 1/3)
>[  176.127866] wlp6s0: RX AssocResp from 00:24:b2:c5:7a:d4 (capab=0x431 status=0 aid=2)
>[  176.129071] wlp6s0: associated
>[  176.129086] IPv6: ADDRCONF(NETDEV_CHANGE): wlp6s0: link becomes ready
>[  182.415923] [drm:drm_atomic_state_init] Allocated atomic state ffff8804064aaa00
>[  182.415928] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803fc6a36c0 state to ffff8804064aaa00
>[  182.415931] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413bb9400 state to ffff8804064aaa00
>[  182.415932] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fc6a36c0 to [CRTC:21]
>[  182.415933] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803fc6a36c0
>[  182.415945] [drm:drm_atomic_check_only] checking ffff8804064aaa00
>[  182.415949] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  182.415950] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[  182.415951] [drm:drm_atomic_commit] commiting ffff8804064aaa00
>[  182.415978] [drm:ilk_fbc_disable] disabled FBC
>[  182.415981] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8804064aaa00
>[  182.415982] [drm:drm_atomic_state_free] Freeing atomic state ffff8804064aaa00
>[  182.416083] [drm:drm_atomic_state_init] Allocated atomic state ffff8804064a8200
>[  182.416085] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803fc6a3600 state to ffff8804064a8200
>[  182.416086] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413bbb800 state to ffff8804064a8200
>[  182.416087] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fc6a3600 to [CRTC:21]
>[  182.416088] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803fc6a3600
>[  182.416088] [drm:drm_atomic_check_only] checking ffff8804064a8200
>[  182.416090] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  182.416091] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  182.416092] [drm:drm_atomic_commit] commiting ffff8804064a8200
>[  182.416098] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  182.416100] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8804064a8200
>[  182.416101] [drm:drm_atomic_state_free] Freeing atomic state ffff8804064a8200
>[  182.417984] [drm:drm_atomic_state_init] Allocated atomic state ffff8804064abe00
>[  182.417986] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803fc6a36c0 state to ffff8804064abe00
>[  182.417987] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413bb9400 state to ffff8804064abe00
>[  182.417988] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803fc6a36c0 to [CRTC:21]
>[  182.417988] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803fc6a36c0
>[  182.417989] [drm:drm_atomic_check_only] checking ffff8804064abe00
>[  182.417991] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  182.417992] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  182.417993] [drm:drm_atomic_commit] commiting ffff8804064abe00
>[  182.417998] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  182.418000] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8804064abe00
>[  182.418001] [drm:drm_atomic_state_free] Freeing atomic state ffff8804064abe00
>[  182.430179] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  182.443839] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  182.444181] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  182.444414] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  182.444609] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  182.444797] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  182.465953] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  182.514301] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  182.700402] [drm:ilk_fbc_disable] disabled FBC
>[  182.700594] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  182.757881] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  182.997841] [drm:ilk_fbc_disable] disabled FBC
>[  183.033301] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.049987] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.066665] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.100060] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.103494] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.103545] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.123544] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.123595] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.144633] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.144687] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.164653] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.164707] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.185597] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.185652] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.216888] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.233583] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.250251] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.298371] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  183.505244] [drm:ilk_fbc_disable] disabled FBC
>[  183.550644] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.551841] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.574156] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.595082] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.615934] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.626966] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.637441] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.637500] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.642438] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.654120] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.654197] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.676029] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.704824] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.734039] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.763378] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.793636] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.823298] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.852044] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.873006] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.922353] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  183.927995] [drm:ilk_fbc_disable] disabled FBC
>[  183.951158] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.973026] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.973077] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.995847] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  183.995896] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.018631] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.018667] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.038167] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.038223] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.058554] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.058598] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.080118] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.109836] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.139560] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.168762] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.198368] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.223705] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.237800] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.266736] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.288231] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.334995] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.352517] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.352566] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.376218] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.376261] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.399664] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.399710] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.419683] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.419761] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.439976] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.440076] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.457630] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.487272] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.518596] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.535252] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  184.582985] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  185.388572] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe136000
>[  185.388577] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e49b1300 state to ffff8803fe136000
>[  185.388580] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880402d62800 state to ffff8803fe136000
>[  185.388582] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e49b1300 to [NOCRTC]
>[  185.388583] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8803e49b1300
>[  185.388585] [drm:drm_atomic_check_only] checking ffff8803fe136000
>[  185.388590] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb -1
>[  185.388592] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 0, off 1, on 0, ms 0
>[  185.388593] [drm:drm_atomic_commit] commiting ffff8803fe136000
>[  185.388610] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe136000
>[  185.388611] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe136000
>[  185.390985] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe135600
>[  185.390988] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e49b1840 state to ffff8803fe135600
>[  185.390990] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880402d62400 state to ffff8803fe135600
>[  185.390991] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e49b1840 to [CRTC:21]
>[  185.390992] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e49b1840
>[  185.390993] [drm:drm_atomic_check_only] checking ffff8803fe135600
>[  185.390995] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  185.390996] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[  185.390998] [drm:drm_atomic_commit] commiting ffff8803fe135600
>[  185.391012] [drm:ilk_fbc_disable] disabled FBC
>[  185.391015] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe135600
>[  185.391016] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe135600
>[  185.440511] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  185.564664] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe137400
>[  185.564667] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e49b1480 state to ffff8803fe137400
>[  185.564669] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880402d62800 state to ffff8803fe137400
>[  185.564670] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e49b1480 to [NOCRTC]
>[  185.564671] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8803e49b1480
>[  185.564672] [drm:drm_atomic_check_only] checking ffff8803fe137400
>[  185.564674] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb -1
>[  185.564676] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 0, off 1, on 0, ms 0
>[  185.564677] [drm:drm_atomic_commit] commiting ffff8803fe137400
>[  185.564689] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe137400
>[  185.564691] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe137400
>[  185.564710] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe137400
>[  185.564711] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e49b1840 state to ffff8803fe137400
>[  185.564712] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880402d62400 state to ffff8803fe137400
>[  185.564713] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e49b1840 to [CRTC:21]
>[  185.564714] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e49b1840
>[  185.564715] [drm:drm_atomic_check_only] checking ffff8803fe137400
>[  185.564717] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  185.564718] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[  185.564719] [drm:drm_atomic_commit] commiting ffff8803fe137400
>[  185.564728] [drm:ilk_fbc_disable] disabled FBC
>[  185.564730] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe137400
>[  185.564731] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe137400
>[  185.564777] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe134600
>[  185.564778] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e49b1480 state to ffff8803fe134600
>[  185.564780] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880402d62800 state to ffff8803fe134600
>[  185.564781] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e49b1480 to [CRTC:21]
>[  185.564782] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e49b1480
>[  185.564782] [drm:drm_atomic_check_only] checking ffff8803fe134600
>[  185.564784] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  185.564785] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  185.564786] [drm:drm_atomic_commit] commiting ffff8803fe134600
>[  185.564792] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  185.564794] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe134600
>[  185.564795] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe134600
>[  185.565092] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe137800
>[  185.565094] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e49b1840 state to ffff8803fe137800
>[  185.565096] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880402d62400 state to ffff8803fe137800
>[  185.565097] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e49b1840 to [CRTC:21]
>[  185.565098] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e49b1840
>[  185.565099] [drm:drm_atomic_check_only] checking ffff8803fe137800
>[  185.565101] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  185.565102] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  185.565103] [drm:drm_atomic_commit] commiting ffff8803fe137800
>[  185.565111] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  185.565114] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe137800
>[  185.565115] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe137800
>[  185.576856] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  185.576939] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  185.577005] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  185.577080] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  185.620042] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  185.667429] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  186.350489] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07ae00
>[  186.350494] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f780 state to ffff8803fe07ae00
>[  186.350497] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb388000 state to ffff8803fe07ae00
>[  186.350498] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f780 to [NOCRTC]
>[  186.350500] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800bd45f780
>[  186.350501] [drm:drm_atomic_check_only] checking ffff8803fe07ae00
>[  186.350507] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb -1
>[  186.350508] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 0, off 1, on 0, ms 0
>[  186.350510] [drm:drm_atomic_commit] commiting ffff8803fe07ae00
>[  186.350539] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07ae00
>[  186.350542] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07ae00
>[  186.350559] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07ae00
>[  186.350560] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803fe07ae00
>[  186.350561] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38f800 state to ffff8803fe07ae00
>[  186.350562] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  186.350563] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  186.350564] [drm:drm_atomic_check_only] checking ffff8803fe07ae00
>[  186.350566] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  186.350567] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[  186.350568] [drm:drm_atomic_commit] commiting ffff8803fe07ae00
>[  186.350579] [drm:ilk_fbc_disable] disabled FBC
>[  186.350582] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07ae00
>[  186.350583] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07ae00
>[  186.350669] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07be00
>[  186.350671] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f780 state to ffff8803fe07be00
>[  186.350673] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb388000 state to ffff8803fe07be00
>[  186.350675] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f780 to [CRTC:21]
>[  186.350676] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f780
>[  186.350677] [drm:drm_atomic_check_only] checking ffff8803fe07be00
>[  186.350690] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  186.350691] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  186.350692] [drm:drm_atomic_commit] commiting ffff8803fe07be00
>[  186.350698] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  186.350701] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07be00
>[  186.350702] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07be00
>[  186.352461] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe079200
>[  186.352464] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803fe079200
>[  186.352465] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38f800 state to ffff8803fe079200
>[  186.352466] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  186.352467] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  186.352468] [drm:drm_atomic_check_only] checking ffff8803fe079200
>[  186.352470] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  186.352471] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  186.352472] [drm:drm_atomic_commit] commiting ffff8803fe079200
>[  186.352479] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  186.352482] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe079200
>[  186.352483] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe079200
>[  186.365624] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  186.365733] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  186.365850] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  186.365893] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  186.404383] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  186.451576] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  187.112060] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07aa00
>[  187.112065] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f180 state to ffff8803fe07aa00
>[  187.112068] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb388000 state to ffff8803fe07aa00
>[  187.112069] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f180 to [NOCRTC]
>[  187.112071] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800bd45f180
>[  187.112072] [drm:drm_atomic_check_only] checking ffff8803fe07aa00
>[  187.112077] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb -1
>[  187.112079] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 0, off 1, on 0, ms 0
>[  187.112081] [drm:drm_atomic_commit] commiting ffff8803fe07aa00
>[  187.112124] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07aa00
>[  187.112126] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07aa00
>[  187.112140] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07aa00
>[  187.112141] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803fe07aa00
>[  187.112143] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38f800 state to ffff8803fe07aa00
>[  187.112143] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  187.112144] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  187.112145] [drm:drm_atomic_check_only] checking ffff8803fe07aa00
>[  187.112147] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  187.112148] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[  187.112149] [drm:drm_atomic_commit] commiting ffff8803fe07aa00
>[  187.112185] [drm:ilk_fbc_disable] disabled FBC
>[  187.112198] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07aa00
>[  187.112199] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07aa00
>[  187.112268] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe079c00
>[  187.112270] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f180 state to ffff8803fe079c00
>[  187.112272] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb388000 state to ffff8803fe079c00
>[  187.112274] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f180 to [CRTC:21]
>[  187.112275] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f180
>[  187.112276] [drm:drm_atomic_check_only] checking ffff8803fe079c00
>[  187.112278] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  187.112279] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  187.112280] [drm:drm_atomic_commit] commiting ffff8803fe079c00
>[  187.112286] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  187.112289] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe079c00
>[  187.112290] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe079c00
>[  187.112505] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe079400
>[  187.112507] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f540 state to ffff8803fe079400
>[  187.112508] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38f800 state to ffff8803fe079400
>[  187.112509] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f540 to [CRTC:21]
>[  187.112510] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f540
>[  187.112511] [drm:drm_atomic_check_only] checking ffff8803fe079400
>[  187.112513] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  187.112514] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  187.112514] [drm:drm_atomic_commit] commiting ffff8803fe079400
>[  187.112521] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  187.112523] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe079400
>[  187.112524] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe079400
>[  187.124587] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  187.124703] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  187.124770] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  187.155392] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  187.202337] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  187.559254] [drm:drm_atomic_state_init] Allocated atomic state ffff88040641f200
>[  187.559260] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041adc2000 state to ffff88040641f200
>[  187.559263] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413bbb000 state to ffff88040641f200
>[  187.559264] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041adc2000 to [NOCRTC]
>[  187.559266] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88041adc2000
>[  187.559268] [drm:drm_atomic_check_only] checking ffff88040641f200
>[  187.559287] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb -1
>[  187.559289] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 0, off 1, on 0, ms 0
>[  187.559290] [drm:drm_atomic_commit] commiting ffff88040641f200
>[  187.559311] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040641f200
>[  187.559314] [drm:drm_atomic_state_free] Freeing atomic state ffff88040641f200
>[  187.559340] [drm:drm_atomic_state_init] Allocated atomic state ffff88040641f200
>[  187.559342] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041adc2480 state to ffff88040641f200
>[  187.559343] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413bba400 state to ffff88040641f200
>[  187.559344] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041adc2480 to [CRTC:21]
>[  187.559345] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041adc2480
>[  187.559345] [drm:drm_atomic_check_only] checking ffff88040641f200
>[  187.559348] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  187.559349] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 0 -> 1, off 0, on 1, ms 0
>[  187.559349] [drm:drm_atomic_commit] commiting ffff88040641f200
>[  187.559361] [drm:ilk_fbc_disable] disabled FBC
>[  187.559363] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040641f200
>[  187.559364] [drm:drm_atomic_state_free] Freeing atomic state ffff88040641f200
>[  187.559434] [drm:drm_atomic_state_init] Allocated atomic state ffff88040641d600
>[  187.559435] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041adc2000 state to ffff88040641d600
>[  187.559437] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413bbb000 state to ffff88040641d600
>[  187.559438] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041adc2000 to [CRTC:21]
>[  187.559439] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041adc2000
>[  187.559440] [drm:drm_atomic_check_only] checking ffff88040641d600
>[  187.559442] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  187.559443] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  187.559444] [drm:drm_atomic_commit] commiting ffff88040641d600
>[  187.559451] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  187.559453] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040641d600
>[  187.559454] [drm:drm_atomic_state_free] Freeing atomic state ffff88040641d600
>[  187.561149] [drm:drm_atomic_state_init] Allocated atomic state ffff88040641f600
>[  187.561151] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041adc2480 state to ffff88040641f600
>[  187.561153] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880413bba400 state to ffff88040641f600
>[  187.561154] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041adc2480 to [CRTC:21]
>[  187.561155] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041adc2480
>[  187.561156] [drm:drm_atomic_check_only] checking ffff88040641f600
>[  187.561158] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  187.561159] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  187.561160] [drm:drm_atomic_commit] commiting ffff88040641f600
>[  187.561167] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  187.561170] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88040641f600
>[  187.561171] [drm:drm_atomic_state_free] Freeing atomic state ffff88040641f600
>[  187.573402] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  187.573564] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  187.573723] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  187.573880] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  187.605973] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  187.652779] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  188.077889] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900800
>[  188.077893] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448780 state to ffff8803f0900800
>[  188.077895] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0900800
>[  188.077896] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448780 to [CRTC:21]
>[  188.077897] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448780
>[  188.077898] [drm:drm_atomic_check_only] checking ffff8803f0900800
>[  188.077902] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.077904] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.077905] [drm:drm_atomic_commit] commiting ffff8803f0900800
>[  188.077919] [drm:ilk_fbc_disable] disabled FBC
>[  188.077922] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900800
>[  188.077924] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900800
>[  188.087912] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903600
>[  188.087915] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448480 state to ffff8803f0903600
>[  188.087916] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0903600
>[  188.087917] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448480 to [CRTC:21]
>[  188.087918] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448480
>[  188.087919] [drm:drm_atomic_check_only] checking ffff8803f0903600
>[  188.087922] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.087923] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.087923] [drm:drm_atomic_commit] commiting ffff8803f0903600
>[  188.087931] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.087934] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903600
>[  188.087935] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903600
>[  188.097949] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903e00
>[  188.097951] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448780 state to ffff8803f0903e00
>[  188.097953] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0903e00
>[  188.097954] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448780 to [CRTC:21]
>[  188.097955] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448780
>[  188.097955] [drm:drm_atomic_check_only] checking ffff8803f0903e00
>[  188.097958] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.097959] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.097960] [drm:drm_atomic_commit] commiting ffff8803f0903e00
>[  188.097967] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.097970] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903e00
>[  188.097971] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903e00
>[  188.107985] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900c00
>[  188.107988] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448480 state to ffff8803f0900c00
>[  188.107989] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0900c00
>[  188.107990] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448480 to [CRTC:21]
>[  188.107991] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448480
>[  188.107992] [drm:drm_atomic_check_only] checking ffff8803f0900c00
>[  188.107994] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.107996] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.107997] [drm:drm_atomic_commit] commiting ffff8803f0900c00
>[  188.108004] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.108007] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900c00
>[  188.108008] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900c00
>[  188.118020] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901a00
>[  188.118022] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448780 state to ffff8803f0901a00
>[  188.118024] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0901a00
>[  188.118025] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448780 to [CRTC:21]
>[  188.118026] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448780
>[  188.118027] [drm:drm_atomic_check_only] checking ffff8803f0901a00
>[  188.118029] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.118030] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.118031] [drm:drm_atomic_commit] commiting ffff8803f0901a00
>[  188.118038] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.118041] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901a00
>[  188.118042] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901a00
>[  188.128055] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903c00
>[  188.128057] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448480 state to ffff8803f0903c00
>[  188.128059] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0903c00
>[  188.128060] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448480 to [CRTC:21]
>[  188.128061] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448480
>[  188.128062] [drm:drm_atomic_check_only] checking ffff8803f0903c00
>[  188.128064] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.128065] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.128066] [drm:drm_atomic_commit] commiting ffff8803f0903c00
>[  188.128073] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.128076] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903c00
>[  188.128077] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903c00
>[  188.138084] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901200
>[  188.138087] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448780 state to ffff8803f0901200
>[  188.138088] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0901200
>[  188.138089] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448780 to [CRTC:21]
>[  188.138090] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448780
>[  188.138091] [drm:drm_atomic_check_only] checking ffff8803f0901200
>[  188.138093] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.138094] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.138095] [drm:drm_atomic_commit] commiting ffff8803f0901200
>[  188.138103] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.138106] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901200
>[  188.138107] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901200
>[  188.148119] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901000
>[  188.148121] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448480 state to ffff8803f0901000
>[  188.148123] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0901000
>[  188.148124] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448480 to [CRTC:21]
>[  188.148125] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448480
>[  188.148126] [drm:drm_atomic_check_only] checking ffff8803f0901000
>[  188.148128] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.148129] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.148130] [drm:drm_atomic_commit] commiting ffff8803f0901000
>[  188.148137] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.148140] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901000
>[  188.148141] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901000
>[  188.158159] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900000
>[  188.158162] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448780 state to ffff8803f0900000
>[  188.158163] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0900000
>[  188.158164] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448780 to [CRTC:21]
>[  188.158165] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448780
>[  188.158166] [drm:drm_atomic_check_only] checking ffff8803f0900000
>[  188.158168] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.158169] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.158170] [drm:drm_atomic_commit] commiting ffff8803f0900000
>[  188.158178] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.158180] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900000
>[  188.158181] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900000
>[  188.168190] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903000
>[  188.168193] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448480 state to ffff8803f0903000
>[  188.168194] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0903000
>[  188.168195] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448480 to [CRTC:21]
>[  188.168196] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448480
>[  188.168197] [drm:drm_atomic_check_only] checking ffff8803f0903000
>[  188.168199] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.168200] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.168201] [drm:drm_atomic_commit] commiting ffff8803f0903000
>[  188.168209] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.168211] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903000
>[  188.168213] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903000
>[  188.178222] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900a00
>[  188.178225] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448780 state to ffff8803f0900a00
>[  188.178226] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0900a00
>[  188.178227] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448780 to [CRTC:21]
>[  188.178228] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448780
>[  188.178229] [drm:drm_atomic_check_only] checking ffff8803f0900a00
>[  188.178231] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.178232] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.178233] [drm:drm_atomic_commit] commiting ffff8803f0900a00
>[  188.178240] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.178243] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900a00
>[  188.178244] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900a00
>[  188.188257] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900400
>[  188.188259] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448480 state to ffff8803f0900400
>[  188.188261] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0900400
>[  188.188262] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448480 to [CRTC:21]
>[  188.188263] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448480
>[  188.188264] [drm:drm_atomic_check_only] checking ffff8803f0900400
>[  188.188266] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.188267] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.188268] [drm:drm_atomic_commit] commiting ffff8803f0900400
>[  188.188275] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.188278] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900400
>[  188.188279] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900400
>[  188.188452] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901600
>[  188.188455] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448780 state to ffff8803f0901600
>[  188.188456] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0901600
>[  188.188457] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448780 to [CRTC:21]
>[  188.188458] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448780
>[  188.188459] [drm:drm_atomic_check_only] checking ffff8803f0901600
>[  188.188461] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.188463] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.188464] [drm:drm_atomic_commit] commiting ffff8803f0901600
>[  188.188481] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.188483] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901600
>[  188.188484] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901600
>[  188.199858] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.199996] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.256683] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  188.402845] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe078400
>[  188.402848] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f9c0 state to ffff8803fe078400
>[  188.402849] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb388000 state to ffff8803fe078400
>[  188.402850] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f9c0 to [CRTC:21]
>[  188.402851] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f9c0
>[  188.402852] [drm:drm_atomic_check_only] checking ffff8803fe078400
>[  188.402855] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.402856] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.402857] [drm:drm_atomic_commit] commiting ffff8803fe078400
>[  188.402865] [drm:ilk_fbc_disable] disabled FBC
>[  188.402867] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe078400
>[  188.402869] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe078400
>[  188.412881] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe078e00
>[  188.412884] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f900 state to ffff8803fe078e00
>[  188.412885] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38fc00 state to ffff8803fe078e00
>[  188.412886] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f900 to [CRTC:21]
>[  188.412887] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f900
>[  188.412888] [drm:drm_atomic_check_only] checking ffff8803fe078e00
>[  188.412890] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.412891] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.412892] [drm:drm_atomic_commit] commiting ffff8803fe078e00
>[  188.412899] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.412902] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe078e00
>[  188.412903] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe078e00
>[  188.422930] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe079800
>[  188.422932] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f9c0 state to ffff8803fe079800
>[  188.422934] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb388000 state to ffff8803fe079800
>[  188.422935] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f9c0 to [CRTC:21]
>[  188.422936] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f9c0
>[  188.422937] [drm:drm_atomic_check_only] checking ffff8803fe079800
>[  188.422939] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.422940] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.422941] [drm:drm_atomic_commit] commiting ffff8803fe079800
>[  188.422948] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.422951] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe079800
>[  188.422952] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe079800
>[  188.432979] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07ba00
>[  188.432982] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f900 state to ffff8803fe07ba00
>[  188.432983] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb38fc00 state to ffff8803fe07ba00
>[  188.432984] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f900 to [CRTC:21]
>[  188.432985] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f900
>[  188.432986] [drm:drm_atomic_check_only] checking ffff8803fe07ba00
>[  188.432988] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.432989] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.432990] [drm:drm_atomic_commit] commiting ffff8803fe07ba00
>[  188.432998] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.433000] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07ba00
>[  188.433002] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07ba00
>[  188.433052] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe07a200
>[  188.433053] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8800bd45f9c0 state to ffff8803fe07a200
>[  188.433054] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8803eb388000 state to ffff8803fe07a200
>[  188.433055] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8800bd45f9c0 to [CRTC:21]
>[  188.433056] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8800bd45f9c0
>[  188.433057] [drm:drm_atomic_check_only] checking ffff8803fe07a200
>[  188.433059] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.433060] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.433061] [drm:drm_atomic_commit] commiting ffff8803fe07a200
>[  188.433066] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.433068] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe07a200
>[  188.433069] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe07a200
>[  188.442980] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903200
>[  188.442985] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448480 state to ffff8803f0903200
>[  188.442987] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0903200
>[  188.442988] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448480 to [CRTC:21]
>[  188.442989] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448480
>[  188.442990] [drm:drm_atomic_check_only] checking ffff8803f0903200
>[  188.442994] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.442995] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.442997] [drm:drm_atomic_commit] commiting ffff8803f0903200
>[  188.443010] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.443015] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903200
>[  188.443016] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903200
>[  188.444309] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.444513] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.453036] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900000
>[  188.453040] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448900 state to ffff8803f0900000
>[  188.453042] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0900000
>[  188.453043] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448900 to [CRTC:21]
>[  188.453044] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448900
>[  188.453045] [drm:drm_atomic_check_only] checking ffff8803f0900000
>[  188.453050] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.453051] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.453052] [drm:drm_atomic_commit] commiting ffff8803f0900000
>[  188.453060] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.453064] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900000
>[  188.453065] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900000
>[  188.461278] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.463053] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901e00
>[  188.463056] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448d80 state to ffff8803f0901e00
>[  188.463057] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0901e00
>[  188.463058] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448d80 to [CRTC:21]
>[  188.463060] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448d80
>[  188.463061] [drm:drm_atomic_check_only] checking ffff8803f0901e00
>[  188.463065] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.463066] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.463067] [drm:drm_atomic_commit] commiting ffff8803f0901e00
>[  188.463075] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.463077] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901e00
>[  188.463079] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901e00
>[  188.472237] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.473078] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902e00
>[  188.473080] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448480 state to ffff8803f0902e00
>[  188.473082] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0902e00
>[  188.473083] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448480 to [CRTC:21]
>[  188.473085] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448480
>[  188.473086] [drm:drm_atomic_check_only] checking ffff8803f0902e00
>[  188.473090] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.473091] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.473092] [drm:drm_atomic_commit] commiting ffff8803f0902e00
>[  188.473100] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902e00
>[  188.473102] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902e00
>[  188.483184] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901c00
>[  188.483188] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448b40 state to ffff8803f0901c00
>[  188.483190] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0901c00
>[  188.483191] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448b40 to [CRTC:21]
>[  188.483192] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448b40
>[  188.483193] [drm:drm_atomic_check_only] checking ffff8803f0901c00
>[  188.483198] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.483199] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.483200] [drm:drm_atomic_commit] commiting ffff8803f0901c00
>[  188.483210] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.483215] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901c00
>[  188.483216] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901c00
>[  188.484604] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.493208] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900c00
>[  188.493213] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448d80 state to ffff8803f0900c00
>[  188.493215] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0900c00
>[  188.493216] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448d80 to [CRTC:21]
>[  188.493217] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448d80
>[  188.493218] [drm:drm_atomic_check_only] checking ffff8803f0900c00
>[  188.493223] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.493224] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.493225] [drm:drm_atomic_commit] commiting ffff8803f0900c00
>[  188.493236] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.493241] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900c00
>[  188.493242] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900c00
>[  188.501624] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.503198] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901000
>[  188.503201] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448480 state to ffff8803f0901000
>[  188.503203] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0901000
>[  188.503204] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448480 to [CRTC:21]
>[  188.503205] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448480
>[  188.503206] [drm:drm_atomic_check_only] checking ffff8803f0901000
>[  188.503210] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.503211] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.503213] [drm:drm_atomic_commit] commiting ffff8803f0901000
>[  188.503221] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901000
>[  188.503223] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901000
>[  188.518144] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.523359] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903600
>[  188.523364] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448b40 state to ffff8803f0903600
>[  188.523366] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0903600
>[  188.523367] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448b40 to [CRTC:21]
>[  188.523368] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448b40
>[  188.523370] [drm:drm_atomic_check_only] checking ffff8803f0903600
>[  188.523374] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.523375] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.523377] [drm:drm_atomic_commit] commiting ffff8803f0903600
>[  188.523387] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903600
>[  188.523388] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903600
>[  188.533346] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902200
>[  188.533350] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448d80 state to ffff8803f0902200
>[  188.533352] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0902200
>[  188.533354] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448d80 to [CRTC:21]
>[  188.533355] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448d80
>[  188.533356] [drm:drm_atomic_check_only] checking ffff8803f0902200
>[  188.533361] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.533362] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.533363] [drm:drm_atomic_commit] commiting ffff8803f0902200
>[  188.533373] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.533377] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902200
>[  188.533378] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902200
>[  188.534891] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.543413] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901400
>[  188.543418] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448480 state to ffff8803f0901400
>[  188.543420] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0901400
>[  188.543421] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448480 to [CRTC:21]
>[  188.543422] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448480
>[  188.543423] [drm:drm_atomic_check_only] checking ffff8803f0901400
>[  188.543427] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.543429] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.543430] [drm:drm_atomic_commit] commiting ffff8803f0901400
>[  188.543440] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.543444] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901400
>[  188.543445] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901400
>[  188.551516] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.553459] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901c00
>[  188.553464] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448d80 state to ffff8803f0901c00
>[  188.553466] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0901c00
>[  188.553467] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448d80 to [CRTC:21]
>[  188.553468] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448d80
>[  188.553469] [drm:drm_atomic_check_only] checking ffff8803f0901c00
>[  188.553473] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.553475] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.553476] [drm:drm_atomic_commit] commiting ffff8803f0901c00
>[  188.553487] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901c00
>[  188.553489] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901c00
>[  188.563448] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901200
>[  188.563453] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448cc0 state to ffff8803f0901200
>[  188.563455] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0901200
>[  188.563456] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448cc0 to [CRTC:21]
>[  188.563457] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448cc0
>[  188.563458] [drm:drm_atomic_check_only] checking ffff8803f0901200
>[  188.563463] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.563464] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.563466] [drm:drm_atomic_commit] commiting ffff8803f0901200
>[  188.563476] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.563480] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901200
>[  188.563491] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901200
>[  188.568437] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.573524] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903c00
>[  188.573528] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448d80 state to ffff8803f0903c00
>[  188.573531] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0903c00
>[  188.573532] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448d80 to [CRTC:21]
>[  188.573533] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448d80
>[  188.573534] [drm:drm_atomic_check_only] checking ffff8803f0903c00
>[  188.573538] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.573539] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.573541] [drm:drm_atomic_commit] commiting ffff8803f0903c00
>[  188.573551] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903c00
>[  188.573553] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903c00
>[  188.583518] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900400
>[  188.583522] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448480 state to ffff8803f0900400
>[  188.583524] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0900400
>[  188.583525] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448480 to [CRTC:21]
>[  188.583526] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448480
>[  188.583527] [drm:drm_atomic_check_only] checking ffff8803f0900400
>[  188.583532] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.583533] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.583534] [drm:drm_atomic_commit] commiting ffff8803f0900400
>[  188.583545] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.583549] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900400
>[  188.583551] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900400
>[  188.584760] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.593578] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902a00
>[  188.593583] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448a80 state to ffff8803f0902a00
>[  188.593585] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0902a00
>[  188.593586] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448a80 to [CRTC:21]
>[  188.593587] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448a80
>[  188.593588] [drm:drm_atomic_check_only] checking ffff8803f0902a00
>[  188.593593] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.593594] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.593595] [drm:drm_atomic_commit] commiting ffff8803f0902a00
>[  188.593605] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.593610] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902a00
>[  188.593612] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902a00
>[  188.601734] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.618262] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.623726] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902e00
>[  188.623731] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448540 state to ffff8803f0902e00
>[  188.623733] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0902e00
>[  188.623734] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448540 to [CRTC:21]
>[  188.623735] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448540
>[  188.623736] [drm:drm_atomic_check_only] checking ffff8803f0902e00
>[  188.623741] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.623742] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.623743] [drm:drm_atomic_commit] commiting ffff8803f0902e00
>[  188.623754] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902e00
>[  188.623755] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902e00
>[  188.635061] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.643815] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901e00
>[  188.643819] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448a80 state to ffff8803f0901e00
>[  188.643822] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0901e00
>[  188.643823] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448a80 to [CRTC:21]
>[  188.643824] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448a80
>[  188.643825] [drm:drm_atomic_check_only] checking ffff8803f0901e00
>[  188.643829] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.643831] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.643832] [drm:drm_atomic_commit] commiting ffff8803f0901e00
>[  188.643842] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.643846] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901e00
>[  188.643848] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901e00
>[  188.651659] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.663896] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902e00
>[  188.663901] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448d80 state to ffff8803f0902e00
>[  188.663903] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0902e00
>[  188.663904] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448d80 to [CRTC:21]
>[  188.663905] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448d80
>[  188.663907] [drm:drm_atomic_check_only] checking ffff8803f0902e00
>[  188.663911] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.663912] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.663913] [drm:drm_atomic_commit] commiting ffff8803f0902e00
>[  188.663923] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.663928] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902e00
>[  188.663929] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902e00
>[  188.668417] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.683965] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901600
>[  188.683969] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448480 state to ffff8803f0901600
>[  188.683971] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0901600
>[  188.683972] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448480 to [CRTC:21]
>[  188.683974] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448480
>[  188.683975] [drm:drm_atomic_check_only] checking ffff8803f0901600
>[  188.683980] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.683981] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.683982] [drm:drm_atomic_commit] commiting ffff8803f0901600
>[  188.683993] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.683998] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901600
>[  188.684000] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901600
>[  188.684899] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.701840] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.718424] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.734130] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900a00
>[  188.734134] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448d80 state to ffff8803f0900a00
>[  188.734137] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0900a00
>[  188.734138] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448d80 to [CRTC:21]
>[  188.734139] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448d80
>[  188.734140] [drm:drm_atomic_check_only] checking ffff8803f0900a00
>[  188.734145] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.734146] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.734147] [drm:drm_atomic_commit] commiting ffff8803f0900a00
>[  188.734158] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.734162] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900a00
>[  188.734163] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900a00
>[  188.735202] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.744165] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903600
>[  188.744170] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448540 state to ffff8803f0903600
>[  188.744172] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0903600
>[  188.744173] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448540 to [CRTC:21]
>[  188.744174] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448540
>[  188.744175] [drm:drm_atomic_check_only] checking ffff8803f0903600
>[  188.744179] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.744181] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.744182] [drm:drm_atomic_commit] commiting ffff8803f0903600
>[  188.744192] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.744197] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903600
>[  188.744198] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903600
>[  188.751726] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.754165] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902600
>[  188.754169] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448480 state to ffff8803f0902600
>[  188.754171] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0902600
>[  188.754173] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448480 to [CRTC:21]
>[  188.754174] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448480
>[  188.754175] [drm:drm_atomic_check_only] checking ffff8803f0902600
>[  188.754179] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.754180] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.754181] [drm:drm_atomic_commit] commiting ffff8803f0902600
>[  188.754193] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902600
>[  188.754194] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902600
>[  188.764265] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902000
>[  188.764270] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448a80 state to ffff8803f0902000
>[  188.764272] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0902000
>[  188.764273] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448a80 to [CRTC:21]
>[  188.764274] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448a80
>[  188.764275] [drm:drm_atomic_check_only] checking ffff8803f0902000
>[  188.764280] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.764281] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.764282] [drm:drm_atomic_commit] commiting ffff8803f0902000
>[  188.764293] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.764297] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902000
>[  188.764299] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902000
>[  188.768524] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.774249] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901400
>[  188.774254] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448480 state to ffff8803f0901400
>[  188.774256] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0901400
>[  188.774257] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448480 to [CRTC:21]
>[  188.774258] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448480
>[  188.774259] [drm:drm_atomic_check_only] checking ffff8803f0901400
>[  188.774263] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.774264] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.774266] [drm:drm_atomic_commit] commiting ffff8803f0901400
>[  188.774277] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901400
>[  188.774279] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901400
>[  188.784337] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902200
>[  188.784342] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea4486c0 state to ffff8803f0902200
>[  188.784344] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0902200
>[  188.784345] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea4486c0 to [CRTC:21]
>[  188.784346] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea4486c0
>[  188.784347] [drm:drm_atomic_check_only] checking ffff8803f0902200
>[  188.784351] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.784353] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.784354] [drm:drm_atomic_commit] commiting ffff8803f0902200
>[  188.784364] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.784368] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902200
>[  188.784370] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902200
>[  188.785222] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.794374] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903e00
>[  188.794379] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448a80 state to ffff8803f0903e00
>[  188.794381] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0903e00
>[  188.794382] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448a80 to [CRTC:21]
>[  188.794383] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448a80
>[  188.794384] [drm:drm_atomic_check_only] checking ffff8803f0903e00
>[  188.794389] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.794390] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.794391] [drm:drm_atomic_commit] commiting ffff8803f0903e00
>[  188.794402] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.794406] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903e00
>[  188.794407] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903e00
>[  188.802004] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.804402] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901e00
>[  188.804407] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448300 state to ffff8803f0901e00
>[  188.804409] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0901e00
>[  188.804410] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448300 to [CRTC:21]
>[  188.804411] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448300
>[  188.804412] [drm:drm_atomic_check_only] checking ffff8803f0901e00
>[  188.804417] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.804418] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.804419] [drm:drm_atomic_commit] commiting ffff8803f0901e00
>[  188.804430] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901e00
>[  188.804431] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901e00
>[  188.814439] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900600
>[  188.814444] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448480 state to ffff8803f0900600
>[  188.814446] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0900600
>[  188.814447] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448480 to [CRTC:21]
>[  188.814448] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448480
>[  188.814449] [drm:drm_atomic_check_only] checking ffff8803f0900600
>[  188.814453] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.814454] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.814455] [drm:drm_atomic_commit] commiting ffff8803f0900600
>[  188.814466] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.814470] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900600
>[  188.814472] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900600
>[  188.818448] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.835367] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.835507] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901e00
>[  188.835510] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448f00 state to ffff8803f0901e00
>[  188.835512] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0901e00
>[  188.835513] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448f00 to [CRTC:21]
>[  188.835514] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448f00
>[  188.835515] [drm:drm_atomic_check_only] checking ffff8803f0901e00
>[  188.835530] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.835531] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.835532] [drm:drm_atomic_commit] commiting ffff8803f0901e00
>[  188.835541] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901e00
>[  188.835542] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901e00
>[  188.851885] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.868732] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.885223] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.934037] [drm:gen7_fbc_enable] enabled fbc on plane A
>[  188.986136] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901c00
>[  188.986140] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448480 state to ffff8803f0901c00
>[  188.986142] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0901c00
>[  188.986143] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448480 to [CRTC:21]
>[  188.986145] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448480
>[  188.986146] [drm:drm_atomic_check_only] checking ffff8803f0901c00
>[  188.986150] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.986151] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.986152] [drm:drm_atomic_commit] commiting ffff8803f0901c00
>[  188.986166] [drm:ilk_fbc_disable] disabled FBC
>[  188.986170] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901c00
>[  188.986172] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901c00
>[  188.996180] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901400
>[  188.996185] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448f00 state to ffff8803f0901400
>[  188.996187] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0901400
>[  188.996188] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448f00 to [CRTC:21]
>[  188.996189] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448f00
>[  188.996190] [drm:drm_atomic_check_only] checking ffff8803f0901400
>[  188.996194] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  188.996195] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  188.996197] [drm:drm_atomic_commit] commiting ffff8803f0901400
>[  188.996211] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  188.996215] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901400
>[  188.996217] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901400
>[  189.016254] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903a00
>[  189.016258] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448480 state to ffff8803f0903a00
>[  189.016260] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0903a00
>[  189.016261] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448480 to [CRTC:21]
>[  189.016262] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448480
>[  189.016263] [drm:drm_atomic_check_only] checking ffff8803f0903a00
>[  189.016268] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.016269] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.016270] [drm:drm_atomic_commit] commiting ffff8803f0903a00
>[  189.016284] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.016289] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903a00
>[  189.016290] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903a00
>[  189.036328] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902a00
>[  189.036332] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448f00 state to ffff8803f0902a00
>[  189.036334] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0902a00
>[  189.036335] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448f00 to [CRTC:21]
>[  189.036336] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448f00
>[  189.036337] [drm:drm_atomic_check_only] checking ffff8803f0902a00
>[  189.036342] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.036343] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.036344] [drm:drm_atomic_commit] commiting ffff8803f0902a00
>[  189.036359] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.036363] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902a00
>[  189.036364] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902a00
>[  189.056394] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902400
>[  189.056399] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448480 state to ffff8803f0902400
>[  189.056401] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0902400
>[  189.056402] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448480 to [CRTC:21]
>[  189.056403] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448480
>[  189.056404] [drm:drm_atomic_check_only] checking ffff8803f0902400
>[  189.056409] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.056410] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.056411] [drm:drm_atomic_commit] commiting ffff8803f0902400
>[  189.056425] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.056430] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902400
>[  189.056431] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902400
>[  189.066433] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900e00
>[  189.066438] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448f00 state to ffff8803f0900e00
>[  189.066440] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0900e00
>[  189.066441] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448f00 to [CRTC:21]
>[  189.066442] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448f00
>[  189.066443] [drm:drm_atomic_check_only] checking ffff8803f0900e00
>[  189.066447] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.066449] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.066450] [drm:drm_atomic_commit] commiting ffff8803f0900e00
>[  189.066464] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.066468] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900e00
>[  189.066469] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900e00
>[  189.076462] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902800
>[  189.076466] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448480 state to ffff8803f0902800
>[  189.076468] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0902800
>[  189.076469] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448480 to [CRTC:21]
>[  189.076471] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448480
>[  189.076472] [drm:drm_atomic_check_only] checking ffff8803f0902800
>[  189.076476] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.076477] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.076479] [drm:drm_atomic_commit] commiting ffff8803f0902800
>[  189.076493] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.076497] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902800
>[  189.076499] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902800
>[  189.086494] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903600
>[  189.086499] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448f00 state to ffff8803f0903600
>[  189.086501] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0903600
>[  189.086502] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448f00 to [CRTC:21]
>[  189.086503] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448f00
>[  189.086504] [drm:drm_atomic_check_only] checking ffff8803f0903600
>[  189.086509] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.086510] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.086511] [drm:drm_atomic_commit] commiting ffff8803f0903600
>[  189.086525] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.086530] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903600
>[  189.086532] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903600
>[  189.096532] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903e00
>[  189.096536] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448480 state to ffff8803f0903e00
>[  189.096538] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0903e00
>[  189.096539] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448480 to [CRTC:21]
>[  189.096540] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448480
>[  189.096541] [drm:drm_atomic_check_only] checking ffff8803f0903e00
>[  189.096546] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.096547] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.096548] [drm:drm_atomic_commit] commiting ffff8803f0903e00
>[  189.096563] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.096567] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903e00
>[  189.096569] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903e00
>[  189.106578] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901a00
>[  189.106582] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448f00 state to ffff8803f0901a00
>[  189.106585] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0901a00
>[  189.106586] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448f00 to [CRTC:21]
>[  189.106587] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448f00
>[  189.106588] [drm:drm_atomic_check_only] checking ffff8803f0901a00
>[  189.106592] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.106593] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.106595] [drm:drm_atomic_commit] commiting ffff8803f0901a00
>[  189.106609] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.106613] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901a00
>[  189.106615] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901a00
>[  189.116647] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900c00
>[  189.116651] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448480 state to ffff8803f0900c00
>[  189.116653] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0900c00
>[  189.116654] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448480 to [CRTC:21]
>[  189.116655] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448480
>[  189.116656] [drm:drm_atomic_check_only] checking ffff8803f0900c00
>[  189.116661] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.116662] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.116663] [drm:drm_atomic_commit] commiting ffff8803f0900c00
>[  189.116678] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.116682] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900c00
>[  189.116683] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900c00
>[  189.126673] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901600
>[  189.126677] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448f00 state to ffff8803f0901600
>[  189.126679] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0901600
>[  189.126680] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448f00 to [CRTC:21]
>[  189.126681] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448f00
>[  189.126682] [drm:drm_atomic_check_only] checking ffff8803f0901600
>[  189.126687] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.126688] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.126689] [drm:drm_atomic_commit] commiting ffff8803f0901600
>[  189.126704] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.126708] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901600
>[  189.126709] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901600
>[  189.136711] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900000
>[  189.136715] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448480 state to ffff8803f0900000
>[  189.136718] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0900000
>[  189.136719] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448480 to [CRTC:21]
>[  189.136720] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448480
>[  189.136721] [drm:drm_atomic_check_only] checking ffff8803f0900000
>[  189.136725] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.136727] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.136728] [drm:drm_atomic_commit] commiting ffff8803f0900000
>[  189.136742] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.136746] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900000
>[  189.136748] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900000
>[  189.146765] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903000
>[  189.146770] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448f00 state to ffff8803f0903000
>[  189.146772] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0903000
>[  189.146773] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448f00 to [CRTC:21]
>[  189.146774] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448f00
>[  189.146775] [drm:drm_atomic_check_only] checking ffff8803f0903000
>[  189.146779] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.146780] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.146782] [drm:drm_atomic_commit] commiting ffff8803f0903000
>[  189.146796] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.146800] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903000
>[  189.146802] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903000
>[  189.166822] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900a00
>[  189.166826] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448480 state to ffff8803f0900a00
>[  189.166828] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0900a00
>[  189.166829] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448480 to [CRTC:21]
>[  189.166831] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448480
>[  189.166832] [drm:drm_atomic_check_only] checking ffff8803f0900a00
>[  189.166836] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.166838] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.166839] [drm:drm_atomic_commit] commiting ffff8803f0900a00
>[  189.166853] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.166857] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900a00
>[  189.166859] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900a00
>[  189.186911] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901600
>[  189.186915] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448f00 state to ffff8803f0901600
>[  189.186917] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0901600
>[  189.186918] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448f00 to [CRTC:21]
>[  189.186920] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448f00
>[  189.186921] [drm:drm_atomic_check_only] checking ffff8803f0901600
>[  189.186925] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.186926] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.186928] [drm:drm_atomic_commit] commiting ffff8803f0901600
>[  189.186942] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.186946] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901600
>[  189.186948] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901600
>[  189.196843] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903c00
>[  189.196847] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea4483c0 state to ffff8803f0903c00
>[  189.196849] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0903c00
>[  189.196850] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea4483c0 to [CRTC:21]
>[  189.196852] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea4483c0
>[  189.196853] [drm:drm_atomic_check_only] checking ffff8803f0903c00
>[  189.196858] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.196859] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.196860] [drm:drm_atomic_commit] commiting ffff8803f0903c00
>[  189.196875] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.196879] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903c00
>[  189.196881] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903c00
>[  189.217015] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900a00
>[  189.217019] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448f00 state to ffff8803f0900a00
>[  189.217021] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0900a00
>[  189.217022] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448f00 to [CRTC:21]
>[  189.217023] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448f00
>[  189.217024] [drm:drm_atomic_check_only] checking ffff8803f0900a00
>[  189.217029] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.217030] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.217031] [drm:drm_atomic_commit] commiting ffff8803f0900a00
>[  189.217045] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.217049] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900a00
>[  189.217051] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900a00
>[  189.220829] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.237019] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900c00
>[  189.237022] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448300 state to ffff8803f0900c00
>[  189.237024] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0900c00
>[  189.237026] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448300 to [CRTC:21]
>[  189.237027] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448300
>[  189.237028] [drm:drm_atomic_check_only] checking ffff8803f0900c00
>[  189.237032] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.237033] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.237034] [drm:drm_atomic_commit] commiting ffff8803f0900c00
>[  189.237045] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.237048] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900c00
>[  189.237050] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900c00
>[  189.257135] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903200
>[  189.257139] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448f00 state to ffff8803f0903200
>[  189.257141] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0903200
>[  189.257143] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448f00 to [CRTC:21]
>[  189.257144] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448f00
>[  189.257145] [drm:drm_atomic_check_only] checking ffff8803f0903200
>[  189.257149] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.257150] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.257151] [drm:drm_atomic_commit] commiting ffff8803f0903200
>[  189.257162] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.257166] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903200
>[  189.257168] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903200
>[  189.262993] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.274108] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.277196] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901400
>[  189.277199] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448a80 state to ffff8803f0901400
>[  189.277202] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0901400
>[  189.277203] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448a80 to [CRTC:21]
>[  189.277204] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448a80
>[  189.277205] [drm:drm_atomic_check_only] checking ffff8803f0901400
>[  189.277211] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.277212] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.277213] [drm:drm_atomic_commit] commiting ffff8803f0901400
>[  189.277225] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901400
>[  189.277227] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901400
>[  189.284277] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.295321] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.297243] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902e00
>[  189.297246] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448c00 state to ffff8803f0902e00
>[  189.297248] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0902e00
>[  189.297249] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448c00 to [CRTC:21]
>[  189.297250] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448c00
>[  189.297251] [drm:drm_atomic_check_only] checking ffff8803f0902e00
>[  189.297256] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.297257] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.297258] [drm:drm_atomic_commit] commiting ffff8803f0902e00
>[  189.297270] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902e00
>[  189.297272] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902e00
>[  189.306314] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.307284] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902800
>[  189.307287] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea448f00 state to ffff8803f0902800
>[  189.307289] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0902800
>[  189.307290] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea448f00 to [CRTC:21]
>[  189.307291] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea448f00
>[  189.307292] [drm:drm_atomic_check_only] checking ffff8803f0902800
>[  189.307296] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.307298] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.307299] [drm:drm_atomic_commit] commiting ffff8803f0902800
>[  189.307312] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902800
>[  189.307313] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902800
>[  189.317328] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.328274] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.339200] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.355825] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.355936] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.372388] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.372576] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.388992] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.389174] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.404674] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.404872] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.421342] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.421540] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.437182] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.451771] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.451903] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.469276] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.469364] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.479012] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900a00
>[  189.479015] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803ea4483c0 state to ffff8803f0900a00
>[  189.479017] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0900a00
>[  189.479019] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803ea4483c0 to [CRTC:21]
>[  189.479020] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803ea4483c0
>[  189.479021] [drm:drm_atomic_check_only] checking ffff8803f0900a00
>[  189.479025] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.479027] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.479028] [drm:drm_atomic_commit] commiting ffff8803f0900a00
>[  189.479036] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.479040] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900a00
>[  189.479041] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900a00
>[  189.485932] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.486074] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.502411] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.512776] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.512955] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.523459] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.523592] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.535147] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.535311] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.552641] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.552752] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.568613] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.568754] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.586315] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.586383] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.598229] [drm:i915_gem_open] 
>[  189.602966] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.603014] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.604905] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[  189.605605] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[  189.619474] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.619565] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900c00
>[  189.619567] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041aab13c0 state to ffff8803f0900c00
>[  189.619569] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0900c00
>[  189.619571] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041aab13c0 to [CRTC:21]
>[  189.619582] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041aab13c0
>[  189.619583] [drm:drm_atomic_check_only] checking ffff8803f0900c00
>[  189.619587] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.619588] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.619590] [drm:drm_atomic_commit] commiting ffff8803f0900c00
>[  189.619597] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900c00
>[  189.619599] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900c00
>[  189.619648] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.639650] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901e00
>[  189.639652] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041aab1e40 state to ffff8803f0901e00
>[  189.639654] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0901e00
>[  189.639655] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041aab1e40 to [CRTC:21]
>[  189.639656] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041aab1e40
>[  189.639657] [drm:drm_atomic_check_only] checking ffff8803f0901e00
>[  189.639659] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.639660] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.639661] [drm:drm_atomic_commit] commiting ffff8803f0901e00
>[  189.639668] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.639671] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901e00
>[  189.639672] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901e00
>[  189.669757] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902400
>[  189.669760] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041aab13c0 state to ffff8803f0902400
>[  189.669761] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0902400
>[  189.669762] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041aab13c0 to [CRTC:21]
>[  189.669763] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041aab13c0
>[  189.669764] [drm:drm_atomic_check_only] checking ffff8803f0902400
>[  189.669766] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.669768] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.669769] [drm:drm_atomic_commit] commiting ffff8803f0902400
>[  189.669776] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.669779] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902400
>[  189.669780] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902400
>[  189.679789] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902e00
>[  189.679792] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041aab1e40 state to ffff8803f0902e00
>[  189.679793] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0902e00
>[  189.679794] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041aab1e40 to [CRTC:21]
>[  189.679795] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041aab1e40
>[  189.679796] [drm:drm_atomic_check_only] checking ffff8803f0902e00
>[  189.679798] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.679799] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.679800] [drm:drm_atomic_commit] commiting ffff8803f0902e00
>[  189.679808] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.679811] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902e00
>[  189.679812] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902e00
>[  189.689832] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902000
>[  189.689834] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041aab13c0 state to ffff8803f0902000
>[  189.689836] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0902000
>[  189.689837] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041aab13c0 to [CRTC:21]
>[  189.689838] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041aab13c0
>[  189.689839] [drm:drm_atomic_check_only] checking ffff8803f0902000
>[  189.689841] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.689842] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.689843] [drm:drm_atomic_commit] commiting ffff8803f0902000
>[  189.689851] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.689853] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902000
>[  189.689855] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902000
>[  189.699894] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903200
>[  189.699896] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041aab1e40 state to ffff8803f0903200
>[  189.699898] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0903200
>[  189.699899] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041aab1e40 to [CRTC:21]
>[  189.699900] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041aab1e40
>[  189.699900] [drm:drm_atomic_check_only] checking ffff8803f0903200
>[  189.699903] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.699904] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.699905] [drm:drm_atomic_commit] commiting ffff8803f0903200
>[  189.699912] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.699915] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903200
>[  189.699916] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903200
>[  189.709881] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0901400
>[  189.709884] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041aab13c0 state to ffff8803f0901400
>[  189.709886] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61000 state to ffff8803f0901400
>[  189.709887] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041aab13c0 to [CRTC:21]
>[  189.709888] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041aab13c0
>[  189.709889] [drm:drm_atomic_check_only] checking ffff8803f0901400
>[  189.709893] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.709894] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.709895] [drm:drm_atomic_commit] commiting ffff8803f0901400
>[  189.709906] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.709909] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0901400
>[  189.709911] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0901400
>[  189.709949] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902a00
>[  189.709951] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041aab1e40 state to ffff8803f0902a00
>[  189.709952] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0902a00
>[  189.709953] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041aab1e40 to [CRTC:21]
>[  189.709954] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041aab1e40
>[  189.709955] [drm:drm_atomic_check_only] checking ffff8803f0902a00
>[  189.709956] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.709957] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.709958] [drm:drm_atomic_commit] commiting ffff8803f0902a00
>[  189.709964] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.709966] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902a00
>[  189.709967] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902a00
>[  189.710512] [drm:i915_gem_open] 
>[  189.719946] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903000
>[  189.719952] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041aab13c0 state to ffff8803f0903000
>[  189.719955] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61400 state to ffff8803f0903000
>[  189.719957] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041aab13c0 to [CRTC:21]
>[  189.719959] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041aab13c0
>[  189.719961] [drm:drm_atomic_check_only] checking ffff8803f0903000
>[  189.719966] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.719968] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.719970] [drm:drm_atomic_commit] commiting ffff8803f0903000
>[  189.719981] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.719987] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903000
>[  189.719989] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903000
>[  189.726445] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.726602] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.729972] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903c00
>[  189.729974] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041aab1e40 state to ffff8803f0903c00
>[  189.729976] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0903c00
>[  189.729977] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041aab1e40 to [CRTC:21]
>[  189.729978] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041aab1e40
>[  189.729979] [drm:drm_atomic_check_only] checking ffff8803f0903c00
>[  189.729982] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.729983] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.729984] [drm:drm_atomic_commit] commiting ffff8803f0903c00
>[  189.729993] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903c00
>[  189.729994] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903c00
>[  189.740022] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900c00
>[  189.740026] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041aab1480 state to ffff8803f0900c00
>[  189.740028] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61400 state to ffff8803f0900c00
>[  189.740029] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041aab1480 to [CRTC:21]
>[  189.740030] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041aab1480
>[  189.740031] [drm:drm_atomic_check_only] checking ffff8803f0900c00
>[  189.740035] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.740036] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.740037] [drm:drm_atomic_commit] commiting ffff8803f0900c00
>[  189.740045] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.740048] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900c00
>[  189.740049] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900c00
>[  189.740109] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900000
>[  189.740111] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041aab1e40 state to ffff8803f0900000
>[  189.740112] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64c00 state to ffff8803f0900000
>[  189.740113] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041aab1e40 to [CRTC:21]
>[  189.740114] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041aab1e40
>[  189.740115] [drm:drm_atomic_check_only] checking ffff8803f0900000
>[  189.740116] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.740117] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.740118] [drm:drm_atomic_commit] commiting ffff8803f0900000
>[  189.740122] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.740124] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900000
>[  189.740125] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900000
>[  189.740434] [drm:drm_atomic_state_init] Allocated atomic state ffff8803fe137e00
>[  189.740437] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff8803e48b9240 state to ffff8803fe137e00
>[  189.740438] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff880402d61400 state to ffff8803fe137e00
>[  189.740439] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8803e48b9240 to [CRTC:21]
>[  189.740440] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff8803e48b9240
>[  189.740441] [drm:drm_atomic_check_only] checking ffff8803fe137e00
>[  189.740443] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.740444] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.740445] [drm:drm_atomic_commit] commiting ffff8803fe137e00
>[  189.740450] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.740453] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803fe137e00
>[  189.740454] [drm:drm_atomic_state_free] Freeing atomic state ffff8803fe137e00
>[  189.744511] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.744660] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.750062] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902400
>[  189.750067] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041aab1600 state to ffff8803f0902400
>[  189.750070] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61400 state to ffff8803f0902400
>[  189.750072] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041aab1600 to [CRTC:21]
>[  189.750074] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041aab1600
>[  189.750076] [drm:drm_atomic_check_only] checking ffff8803f0902400
>[  189.750081] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.750083] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.750086] [drm:drm_atomic_commit] commiting ffff8803f0902400
>[  189.750096] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.750101] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902400
>[  189.750103] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902400
>[  189.759719] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.760096] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903800
>[  189.760099] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041aab1300 state to ffff8803f0903800
>[  189.760101] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0903800
>[  189.760102] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041aab1300 to [CRTC:21]
>[  189.760103] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041aab1300
>[  189.760104] [drm:drm_atomic_check_only] checking ffff8803f0903800
>[  189.760108] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.760109] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.760110] [drm:drm_atomic_commit] commiting ffff8803f0903800
>[  189.760120] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903800
>[  189.760121] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903800
>[  189.770145] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903200
>[  189.770147] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041aab1480 state to ffff8803f0903200
>[  189.770149] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61400 state to ffff8803f0903200
>[  189.770150] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041aab1480 to [CRTC:21]
>[  189.770151] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041aab1480
>[  189.770152] [drm:drm_atomic_check_only] checking ffff8803f0903200
>[  189.770154] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.770155] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.770157] [drm:drm_atomic_commit] commiting ffff8803f0903200
>[  189.770162] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.770165] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903200
>[  189.770167] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903200
>[  189.775558] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.775762] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.780224] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900a00
>[  189.780227] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041aab10c0 state to ffff8803f0900a00
>[  189.780230] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0900a00
>[  189.780231] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041aab10c0 to [CRTC:21]
>[  189.780232] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041aab10c0
>[  189.780233] [drm:drm_atomic_check_only] checking ffff8803f0900a00
>[  189.780237] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.780238] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.780239] [drm:drm_atomic_commit] commiting ffff8803f0900a00
>[  189.780249] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900a00
>[  189.780251] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900a00
>[  189.790327] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903c00
>[  189.790331] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041aab1300 state to ffff8803f0903c00
>[  189.790333] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61400 state to ffff8803f0903c00
>[  189.790334] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041aab1300 to [CRTC:21]
>[  189.790336] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041aab1300
>[  189.790337] [drm:drm_atomic_check_only] checking ffff8803f0903c00
>[  189.790341] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.790342] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.790343] [drm:drm_atomic_commit] commiting ffff8803f0903c00
>[  189.790353] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.790358] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903c00
>[  189.790359] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903c00
>[  189.792317] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.792477] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.800295] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900e00
>[  189.800298] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041aab1600 state to ffff8803f0900e00
>[  189.800300] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0900e00
>[  189.800301] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041aab1600 to [CRTC:21]
>[  189.800302] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041aab1600
>[  189.800303] [drm:drm_atomic_check_only] checking ffff8803f0900e00
>[  189.800307] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.800308] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.800310] [drm:drm_atomic_commit] commiting ffff8803f0900e00
>[  189.800317] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.800320] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900e00
>[  189.800322] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900e00
>[  189.807798] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.807948] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.810306] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0903200
>[  189.810309] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041aab1480 state to ffff8803f0903200
>[  189.810311] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61400 state to ffff8803f0903200
>[  189.810312] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041aab1480 to [CRTC:21]
>[  189.810313] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041aab1480
>[  189.810313] [drm:drm_atomic_check_only] checking ffff8803f0903200
>[  189.810316] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.810317] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.810318] [drm:drm_atomic_commit] commiting ffff8803f0903200
>[  189.810325] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.810328] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0903200
>[  189.810330] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0903200
>[  189.820438] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0900400
>[  189.820443] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041aab1600 state to ffff8803f0900400
>[  189.820445] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a64800 state to ffff8803f0900400
>[  189.820446] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041aab1600 to [CRTC:21]
>[  189.820447] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041aab1600
>[  189.820448] [drm:drm_atomic_check_only] checking ffff8803f0900400
>[  189.820452] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.820453] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.820455] [drm:drm_atomic_commit] commiting ffff8803f0900400
>[  189.820465] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.820469] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0900400
>[  189.820471] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0900400
>[  189.825635] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.825854] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.830453] [drm:drm_atomic_state_init] Allocated atomic state ffff8803f0902e00
>[  189.830457] [drm:drm_atomic_get_plane_state] Added [PLANE:20] ffff88041aab10c0 state to ffff8803f0902e00
>[  189.830459] [drm:drm_atomic_get_crtc_state] Added [CRTC:21] ffff8800c8a61400 state to ffff8803f0902e00
>[  189.830460] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88041aab10c0 to [CRTC:21]
>[  189.830461] [drm:drm_atomic_set_fb_for_plane] Set [FB:52] for plane state ffff88041aab10c0
>[  189.830462] [drm:drm_atomic_check_only] checking ffff8803f0902e00
>[  189.830466] [drm:intel_plane_atomic_calc_changes] [CRTC:21] has [PLANE:20] with fb 52
>[  189.830468] [drm:intel_plane_atomic_calc_changes] [PLANE:20] visible 1 -> 1, off 0, on 0, ms 0
>[  189.830469] [drm:drm_atomic_commit] commiting ffff8803f0902e00
>[  189.830476] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.830479] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8803f0902e00
>[  189.830481] [drm:drm_atomic_state_free] Freeing atomic state ffff8803f0902e00
>[  189.840552] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.840715] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.856385] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.856538] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.872955] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.873110] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.888597] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.888746] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.903594] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.903746] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.920043] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.920195] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.936890] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.937043] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.953638] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.964206] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.975834] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.986614] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  189.997284] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.007825] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.018370] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.028963] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.039504] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.050181] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.060875] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.071614] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.082241] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.092902] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.103473] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.114176] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.124856] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.135540] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.146110] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.156818] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.167475] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.178100] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.188731] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.199348] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.209962] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.220538] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.231108] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.241635] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.252184] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.262718] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.273422] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.283916] [drm:intel_fbc_cancel_work] cancelling pending FBC enable
>[  190.342080] [drm:gen7_fbc_enable] enabled fbc on plane A

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Attachments on bug 93555: 120759 | 124230

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