Attachment 45502 Details for Bug 36147 – Turn off relaxed fencing by default

[patch] Turn off relaxed fencing by default

0001-Turn-relaxed-fencing-off-by-default-for-older-pre-G3.patch (text/plain), 5.04 KB, created by Chris Wilson on 2011-04-12 00:27:53 UTC

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Creator: Chris Wilson

Created: 2011-04-12 00:27:53 UTC

Size: 5.04 KB

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obsolete

>From a5df981db04c4622cd36620f1be020532736c40a Mon Sep 17 00:00:00 2001
>From: Chris Wilson <chris@chris-wilson.co.uk>
>Date: Tue, 12 Apr 2011 08:23:04 +0100
>Subject: [PATCH] Turn relaxed-fencing off by default for older (pre-G33) chipsets
>
>There are still too many unresolved bugs, typically GPU hangs, that are
>related to using relaxed fencing (i.e. only allocating the minimal
>amount of memory required for a buffer) on older hardware, so turn off
>the feature by default for the release.
>
>Reported-by: Knut Petersen <Knut_Petersen@t-online.de>
>Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=36147
>Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
>---
> man/intel.man      |    9 +++++++++
> src/intel_driver.c |   36 ++++++++++++++++++++++++++++++------
> src/intel_memory.c |    7 -------
> 3 files changed, 39 insertions(+), 13 deletions(-)
>
>diff --git a/man/intel.man b/man/intel.man
>index 4fd0ce7..85e2b2e 100644
>--- a/man/intel.man
>+++ b/man/intel.man
>@@ -195,6 +195,15 @@ you may wish to override this and force a linear layout.
> .IP
> Default: disabled
> .TP
>+.BI "Option \*qRelaxedFencing\*q \*q" boolean \*q
>+This option controls whether we attempt to allocate the minimal amount of
>+memory required for the buffers. The reduction in working set has a substantial
>+improvement on system performance. However, this has been demonstrate to be
>+buggy on older hardware (845-865 and 915-945, but ok on PineView and later)
>+so on those chipsets defaults to off.
>+.IP
>+Default: Enabled for G33 (includes PineView), and later, class machines.
>+.TP
> .BI "Option \*qXvMC\*q \*q" boolean \*q
> Enable XvMC driver. Current support MPEG2 MC on 915/945 and G33 series.
> User should provide absolute path to libIntelXvMC.so in XvMCConfig file.
>diff --git a/src/intel_driver.c b/src/intel_driver.c
>index 1b0d740..549e89a 100644
>--- a/src/intel_driver.c
>+++ b/src/intel_driver.c
>@@ -101,6 +101,7 @@ typedef enum {
>    OPTION_DEBUG_FLUSH_CACHES,
>    OPTION_DEBUG_WAIT,
>    OPTION_HOTPLUG,
>+   OPTION_RELAXED_FENCING,
> } I830Opts;
> 
> static OptionInfoRec I830Options[] = {
>@@ -121,6 +122,7 @@ static OptionInfoRec I830Options[] = {
>    {OPTION_DEBUG_FLUSH_CACHES, "DebugFlushCaches", OPTV_BOOLEAN, {0}, FALSE},
>    {OPTION_DEBUG_WAIT, "DebugWait", OPTV_BOOLEAN, {0}, FALSE},
>    {OPTION_HOTPLUG,	"HotPlug",	OPTV_BOOLEAN,	{0},	TRUE},
>+   {OPTION_RELAXED_FENCING,	"RelaxedFencing",	OPTV_BOOLEAN,	{0},	TRUE},
>    {-1,			NULL,		OPTV_NONE,	{0},	FALSE}
> };
> /* *INDENT-ON* */
>@@ -448,23 +450,33 @@ static void I830XvInit(ScrnInfoPtr scrn)
> 		   intel->colorKey);
> }
> 
>-static Bool has_kernel_flush(struct intel_screen_private *intel)
>+static Bool drm_has_boolean_param(struct intel_screen_private *intel,
>+				  int param)
> {
> 	drm_i915_getparam_t gp;
> 	int value;
> 
>-	/* The BLT ring was introduced at the same time as the
>-	 * automatic flush for the busy-ioctl.
>-	 */
>-
> 	gp.value = &value;
>-	gp.param = I915_PARAM_HAS_BLT;
>+	gp.param = param;
> 	if (drmIoctl(intel->drmSubFD, DRM_IOCTL_I915_GETPARAM, &gp))
> 		return FALSE;
> 
> 	return value;
> }
> 
>+static Bool has_kernel_flush(struct intel_screen_private *intel)
>+{
>+	/* The BLT ring was introduced at the same time as the
>+	 * automatic flush for the busy-ioctl.
>+	 */
>+	return drm_has_boolean_param(intel, I915_PARAM_HAS_BLT);
>+}
>+
>+static Bool has_relaxed_fencing(struct intel_screen_private *intel)
>+{
>+	return drm_has_boolean_param(intel, I915_PARAM_HAS_RELAXED_FENCING);
>+}
>+
> static Bool can_accelerate_blt(struct intel_screen_private *intel)
> {
> 	if (0 && (IS_I830(intel) || IS_845G(intel))) {
>@@ -630,6 +642,18 @@ static Bool I830PreInit(ScrnInfoPtr scrn, int flags)
> 			   " 2D GPU acceleration disabled.\n");
> 	}
> 
>+	intel->has_relaxed_fencing =
>+		xf86ReturnOptValBool(intel->Options,
>+				     OPTION_RELAXED_FENCING,
>+				     INTEL_INFO(intel)->gen >= 33);
>+	/* And override the user if there is no kernel support */
>+	if (intel->has_relaxed_fencing)
>+		intel->has_relaxed_fencing = has_relaxed_fencing(intel);
>+
>+	xf86DrvMsg(scrn->scrnIndex, X_CONFIG,
>+		   "Relaxed fencing %s\n"
>+		   intel->has_relaxed_fencing ? "enabled" : "disabled");
>+
> 	/* SwapBuffers delays to avoid tearing */
> 	intel->swapbuffers_wait = xf86ReturnOptValBool(intel->Options,
> 						       OPTION_SWAPBUFFERS_WAIT,
>diff --git a/src/intel_memory.c b/src/intel_memory.c
>index 64dfd8e..763a6ad 100644
>--- a/src/intel_memory.c
>+++ b/src/intel_memory.c
>@@ -294,8 +294,6 @@ void intel_set_gem_max_sizes(ScrnInfoPtr scrn)
> {
> 	intel_screen_private *intel = intel_get_screen_private(scrn);
> 	struct drm_i915_gem_get_aperture aperture;
>-	drm_i915_getparam_t gp;
>-	int ret, value;
> 
> 	aperture.aper_available_size = 0;
> 	drmIoctl(intel->drmSubFD, DRM_IOCTL_I915_GEM_GET_APERTURE, &aperture);
>@@ -303,9 +301,4 @@ void intel_set_gem_max_sizes(ScrnInfoPtr scrn)
> 	intel_set_max_bo_size(intel, &aperture);
> 	intel_set_max_gtt_map_size(intel, &aperture);
> 	intel_set_max_tiling_size(intel, &aperture);
>-
>-	gp.value = &value;
>-	gp.param = I915_PARAM_HAS_RELAXED_FENCING;
>-	ret = drmIoctl(intel->drmSubFD, DRM_IOCTL_I915_GETPARAM, &gp);
>-	intel->has_relaxed_fencing = ret == 0;
> }
>-- 
>1.7.4.1
>

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Attachments on bug 36147: 45499 | 45500 | 45501 | 45502 | 45503

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