From 93dcdddb89bca100b2dcc455f386d1631244125f Mon Sep 17 00:00:00 2001 From: Paulo Zanoni Date: Mon, 7 Jul 2014 18:50:58 -0300 Subject: [PATCH] drm/i915: make HSW S3 WARN-free again Revert "drm/i915: make sure PC8 is enabled on suspend and disabled on resume v4" This reverts commit 8abdc17941c71b37311bb93876ac83dce58160c8. Conflicts: drivers/gpu/drm/i915/i915_drv.c Revert "drm/i915: use runtime irq suspend/resume in freeze/thaw" This reverts commit e11aa362308f5de467ce355a2a2471321b15a35c. Conflicts: drivers/gpu/drm/i915/i915_drv.c Revert "drm/i915: disable power wells on suspend" This reverts commit 85e90679335f56d162f4a0ff525573818e17ce44. --- drivers/gpu/drm/i915/i915_drv.c | 15 +++------------ drivers/gpu/drm/i915/intel_pm.c | 4 ++-- 2 files changed, 5 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 8a0cb0c..8aba6ad 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -521,8 +521,7 @@ static int i915_drm_freeze(struct drm_device *dev) } flush_delayed_work(&dev_priv->rps.delayed_resume_work); - - intel_runtime_pm_disable_interrupts(dev); + drm_irq_uninstall(dev); dev_priv->enable_hotplug_processing = false; intel_suspend_gt_powersave(dev); @@ -559,8 +558,6 @@ static int i915_drm_freeze(struct drm_device *dev) dev_priv->suspend_count++; - intel_display_set_init_power(dev_priv, false); - return 0; } @@ -610,9 +607,6 @@ static int i915_drm_thaw_early(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; - if (IS_HASWELL(dev) || IS_BROADWELL(dev)) - hsw_disable_pc8(dev_priv); - intel_uncore_early_sanitize(dev, true); intel_uncore_sanitize(dev); intel_power_domains_init_hw(dev_priv); @@ -646,7 +640,8 @@ static int __i915_drm_thaw(struct drm_device *dev, bool restore_gtt_mappings) } mutex_unlock(&dev->struct_mutex); - intel_runtime_pm_restore_interrupts(dev); + /* We need working interrupts for modeset enabling ... */ + drm_irq_install(dev, dev->pdev->irq); intel_modeset_init_hw(dev); @@ -894,7 +889,6 @@ static int i915_pm_suspend_late(struct device *dev) { struct pci_dev *pdev = to_pci_dev(dev); struct drm_device *drm_dev = pci_get_drvdata(pdev); - struct drm_i915_private *dev_priv = drm_dev->dev_private; /* * We have a suspedn ordering issue with the snd-hda driver also @@ -908,9 +902,6 @@ static int i915_pm_suspend_late(struct device *dev) if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF) return 0; - if (IS_HASWELL(drm_dev) || IS_BROADWELL(drm_dev)) - hsw_enable_pc8(dev_priv); - pci_disable_device(pdev); pci_set_power_state(pdev, PCI_D3hot); diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index f2a4056..5fd423d 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4934,7 +4934,7 @@ void intel_suspend_gt_powersave(struct drm_device *dev) struct drm_i915_private *dev_priv = dev->dev_private; /* Interrupts should be disabled already to avoid re-arming. */ - WARN_ON(dev->irq_enabled && !dev_priv->pm.irqs_disabled); + WARN_ON(dev->irq_enabled); flush_delayed_work(&dev_priv->rps.delayed_resume_work); @@ -4946,7 +4946,7 @@ void intel_disable_gt_powersave(struct drm_device *dev) struct drm_i915_private *dev_priv = dev->dev_private; /* Interrupts should be disabled already to avoid re-arming. */ - WARN_ON(dev->irq_enabled && !dev_priv->pm.irqs_disabled); + WARN_ON(dev->irq_enabled); if (IS_IRONLAKE_M(dev)) { ironlake_disable_drps(dev); -- 2.0.0