[ 890.895107] [drm:i915_gem_open] [ 890.895139] [drm:intel_crtc_set_config] [CRTC:7] [FB:33] #connectors=1 (x y) (0 0) [ 890.895143] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:7], mode_changed=1, fb_changed=0 [ 890.895145] [drm:intel_modeset_stage_output_state] [CONNECTOR:18:eDP-1] to [CRTC:7] [ 890.895148] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 890.895151] [drm:connected_sink_compute_bpp] [CONNECTOR:18:eDP-1] checking for sink bpp constrains [ 890.895154] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz [ 890.895155] [drm:intel_dp_compute_config] forcing lane count to max (2) on BDW [ 890.895157] [drm:intel_dp_compute_config] using min 06 link bw per VBT [ 890.895166] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24 [ 890.895168] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000 [ 890.895171] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 [ 890.895173] [drm:intel_dump_pipe_config] [CRTC:7][modeset] config for pipe A [ 890.895174] [drm:intel_dump_pipe_config] cpu_transcoder: D [ 890.895175] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 [ 890.895177] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 890.895180] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64 [ 890.895181] [drm:intel_dump_pipe_config] requested mode: [ 890.895184] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa [ 890.895185] [drm:intel_dump_pipe_config] adjusted mode: [ 890.895188] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa [ 890.895190] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa [ 890.895191] [drm:intel_dump_pipe_config] port clock: 270000 [ 890.895193] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 [ 890.895195] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 890.895196] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 890.895198] [drm:intel_dump_pipe_config] ips: 1 [ 890.895199] [drm:intel_dump_pipe_config] double wide: 0 [ 890.895203] [drm:intel_display_power_get] enabling always-on [ 890.895215] [drm:ironlake_update_primary_plane] Writing base 00882000 00000000 0 0 7680 [ 890.895220] [drm:intel_edp_panel_on] Turn eDP power on [ 890.895224] [drm:wait_panel_power_cycle] Wait for panel power cycle [ 890.895228] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000 [ 890.895230] [drm:wait_panel_status] Wait complete [ 890.895233] [drm:wait_panel_on] Wait for panel power on [ 890.895236] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003 [ 891.104134] [drm:wait_panel_status] Wait complete [ 891.104139] [drm:_edp_panel_vdd_on] Turning eDP VDD on [ 891.104145] [drm:_edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b [ 891.105199] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 [ 891.105645] [drm:intel_dp_start_link_train] clock recovery OK [ 891.106391] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful [ 891.106583] [drm:intel_edp_backlight_on] [ 891.106584] [drm:intel_panel_enable_backlight] pipe A [ 891.106591] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937 [ 891.106596] [drm:intel_edp_psr_enable] PSR not supported by this panel [ 891.142151] [drm:intel_update_fbc] disabled per chip default [ 891.142156] [drm:intel_connector_check_state] [CONNECTOR:18:eDP-1] [ 891.142159] [drm:check_encoder_state] [ENCODER:17:TMDS-17] [ 891.142161] [drm:check_encoder_state] [ENCODER:26:TMDS-26] [ 891.142162] [drm:check_encoder_state] [ENCODER:29:TMDS-29] [ 891.142164] [drm:check_crtc_state] [CRTC:7] [ 891.142170] [drm:check_crtc_state] [CRTC:11] [ 891.142172] [drm:check_crtc_state] [CRTC:15] [ 891.142174] [drm:check_shared_dpll_state] WRPLL 1 [ 891.142176] [drm:check_shared_dpll_state] WRPLL 2 [ 891.142178] [drm:intel_crtc_set_config] [CRTC:11] [NOFB] [ 891.142180] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=0, fb_changed=0 [ 891.142182] [drm:intel_modeset_stage_output_state] [CONNECTOR:18:eDP-1] to [CRTC:7] [ 891.142184] [drm:intel_crtc_set_config] [CRTC:15] [NOFB] [ 891.142186] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:15], mode_changed=0, fb_changed=0 [ 891.142187] [drm:intel_modeset_stage_output_state] [CONNECTOR:18:eDP-1] to [CRTC:7] [ 891.142200] [drm:i915_gem_open] [ 894.107694] [drm:edp_panel_vdd_off_sync] Turning eDP VDD off [ 894.107703] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007 [ 897.217339] [drm] stuck on bsd ring [ 897.217343] [drm] stuck on video enhancement ring [ 897.218338] [drm] GPU HANG: ecode 1:0xb1bf6ffc, in gem_reset_stats [4678], reason: Ring hung, action: reset [ 897.218405] [drm:i915_error_work_func] resetting chip [ 897.218423] [drm:i915_context_is_banned] *ERROR* gpu hanging too fast, banning! [ 897.220323] [drm:init_status_page] render ring hws offset: 0x007fc000 [ 897.220334] [drm:init_status_page] bsd ring hws offset: 0x0081e000 [ 897.220341] [drm:init_status_page] blitter ring hws offset: 0x0083f000 [ 897.220348] [drm:init_status_page] video enhancement ring hws offset: 0x00860000 [ 897.220374] [drm:ironlake_update_primary_plane] Writing base 00882000 00000000 0 0 7680 [ 897.220447] [drm:i915_gem_open] [ 897.220466] [drm:i915_gem_open] [ 897.220478] [drm:i915_gem_context_create_ioctl] HW context 1 created [ 897.220481] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed [ 897.220510] [drm:i915_gem_open] [ 897.220521] [drm:i915_gem_open] [ 897.220538] [drm:i915_gem_open] [ 897.220547] [drm:i915_gem_open] [ 897.220584] [drm:i915_gem_open] [ 897.220593] [drm:i915_gem_open] [ 897.220638] [drm:i915_gem_open] [ 897.220647] [drm:i915_gem_open] [ 897.220752] [drm:i915_gem_open] [ 897.220772] [drm:i915_gem_open] [ 897.220825] [drm:i915_ring_stop_set] Stopping rings 0xc0000002 [ 899.218341] [drm] Enabling RC6 states: RC6 on, RC6p off, RC6pp off [ 903.220392] [drm] stuck on bsd ring [ 903.221355] [drm] GPU HANG: ecode 1:0xa77ffffe, reason: Ring hung, action: reset [ 903.221403] [drm:i915_error_work_func] resetting chip [ 903.223375] [drm] Simulated gpu hang, resetting stop_rings [ 903.223410] [drm:init_status_page] render ring hws offset: 0x007fc000 [ 903.223420] [drm:init_status_page] bsd ring hws offset: 0x0081e000 [ 903.223427] [drm:init_status_page] blitter ring hws offset: 0x0083f000 [ 903.223433] [drm:init_status_page] video enhancement ring hws offset: 0x00860000 [ 903.223459] [drm:ironlake_update_primary_plane] Writing base 00882000 00000000 0 0 7680 [ 903.224321] [drm:i915_gem_open] [ 903.224340] [drm:i915_gem_open] [ 905.221430] [drm] Enabling RC6 states: RC6 on, RC6p off, RC6pp off [ 909.223515] [drm] stuck on bsd ring [ 909.223521] [drm] stuck on video enhancement ring [ 909.224508] [drm] GPU HANG: ecode 1:0xb1bf6ffc, in gem_reset_stats [4678], reason: Ring hung, action: reset [ 909.224562] [drm:i915_error_work_func] resetting chip [ 909.224583] [drm:i915_context_is_banned] *ERROR* gpu hanging too fast, banning! [ 909.226501] [drm:init_status_page] render ring hws offset: 0x007fc000 [ 909.226512] [drm:init_status_page] bsd ring hws offset: 0x0081e000 [ 909.226519] [drm:init_status_page] blitter ring hws offset: 0x0083f000 [ 909.226525] [drm:init_status_page] video enhancement ring hws offset: 0x00860000 [ 909.226552] [drm:ironlake_update_primary_plane] Writing base 00882000 00000000 0 0 7680 [ 909.226683] [drm:i915_gem_open] [ 909.226707] [drm:i915_gem_open] [ 909.226820] [drm:intel_crtc_set_config] [CRTC:7] [FB:33] #connectors=1 (x y) (0 0) [ 909.226824] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:7], mode_changed=0, fb_changed=0 [ 909.226826] [drm:intel_modeset_stage_output_state] [CONNECTOR:18:eDP-1] to [CRTC:7] [ 909.226828] [drm:intel_crtc_set_config] [CRTC:11] [NOFB] [ 909.226830] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=0, fb_changed=0 [ 909.226832] [drm:intel_modeset_stage_output_state] [CONNECTOR:18:eDP-1] to [CRTC:7] [ 909.226834] [drm:intel_crtc_set_config] [CRTC:15] [NOFB] [ 909.226835] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:15], mode_changed=0, fb_changed=0 [ 909.226837] [drm:intel_modeset_stage_output_state] [CONNECTOR:18:eDP-1] to [CRTC:7] [ 911.224542] [drm] Enabling RC6 states: RC6 on, RC6p off, RC6pp off