From e91601a78c3e5df6afa6d101dad24299dcbdf281 Mon Sep 17 00:00:00 2001 From: Pierre Moreau Date: Wed, 24 Sep 2014 19:03:21 +0200 Subject: [PATCH 2/2] drm/nouveau/disp/nv50: Add PFB writes To: nouveau@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Ben Skeggs This fix a GPU lockup on 9400M (NVAC) when using acceleration, see #27501. Signed-off-by: Pierre Moreau --- drivers/gpu/drm/nouveau/core/engine/disp/nv50.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c index a7efbff..e425604 100644 --- a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c +++ b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c @@ -1137,6 +1137,15 @@ nv50_disp_base_init(struct nouveau_object *object) if (ret) return ret; + if (nv_device(priv)->chipset == 0xac) { + nv_mask(priv, 0x100c18, 0x00000000, 0x000027ff); + nv_mask(priv, 0x100c14, 0x00000000, 0x00000001); + nv_mask(priv, 0x100c1c, 0x00000000, 0x000027fc); + nv_mask(priv, 0x100c14, 0x00000000, 0x00000002); + nv_mask(priv, 0x100c24, 0x00000002, 0x000027fd); + nv_mask(priv, 0x100c14, 0x00000000, 0x00010000); + } + /* The below segments of code copying values from one register to * another appear to inform EVO of the display capabilities or * something similar. NFI what the 0x614004 caps are for.. -- 2.1.0