[ 355.730930] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 [ 355.730931] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 355.730931] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 355.730932] [drm:intel_dump_pipe_config] ips: 0 [ 355.730932] [drm:intel_dump_pipe_config] double wide: 0 [ 355.730933] [drm:intel_get_shared_dpll] CRTC:20 allocated DPLL 1 [ 355.730933] [drm:intel_get_shared_dpll] using DPLL 1 for pipe A [ 355.730934] [drm:intel_display_power_get] enabling power well 1 [ 355.730935] [drm:skl_set_power_well] Enabling power well 1 [ 355.730936] [drm:intel_display_power_get] enabling MISC IO power well [ 355.730936] [drm:skl_set_power_well] Enabling MISC IO power well [ 355.730937] [drm:intel_display_power_get] enabling power well 2 [ 355.730937] [drm:skl_set_power_well] Enabling power well 2 [ 355.730937] [drm:intel_display_power_get] enabling DDI D power well [ 355.730938] [drm:skl_set_power_well] Enabling DDI D power well [ 355.730939] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043ad27120 [ 355.730939] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880435114e40 state to ffff88043ad27120 [ 355.730940] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880434df7800 state to ffff88043ad27120 [ 355.730940] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880435114e40 to [CRTC:20] [ 355.730940] [drm:drm_atomic_set_fb_for_plane] Set [FB:79] for plane state ffff880435114e40 [ 355.730941] [drm:drm_atomic_check_only] checking ffff88043ad27120 [ 355.730941] [drm:drm_atomic_commit] commiting ffff88043ad27120 [ 355.730942] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043ad27120 [ 355.730942] [drm:drm_atomic_state_free] Freeing atomic state ffff88043ad27120 [ 355.730943] [drm:intel_enable_shared_dpll] enable DPLL 1 (active 0, on? 0) for crtc 20 [ 355.730943] [drm:intel_enable_shared_dpll] enabling DPLL 1 [ 355.732287] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 [ 355.733995] [drm:intel_dp_set_signal_levels] Using signal levels 03000000 [ 355.734824] [drm:intel_dp_start_link_train] clock recovery OK [ 355.735824] [drm:intel_dp_set_signal_levels] Using signal levels 02000000 [ 355.736716] [drm:intel_dp_set_signal_levels] Using signal levels 01000000 [ 355.737640] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 [ 355.738972] [drm:intel_dp_set_signal_levels] Using signal levels 01000000 [ 355.740514] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful [ 355.740612] [drm:skl_wm_flush_pipe] flush pipe A (pass 3) [ 355.740624] [drm:intel_audio_codec_enable] ELD on [CONNECTOR:45:DP-2], [ENCODER:44:TMDS-44] [ 355.740624] [drm:hsw_audio_codec_enable] Enable audio codec on pipe A, 36 bytes ELD [ 355.740626] [drm:skylake_update_primary_plane] Writing base 008C0000 0,0,1920,1080 pitch=7680 [ 355.740627] [drm:intel_fbc_update] disabled per chip default [ 355.740636] [drm:intel_connector_check_state] [CONNECTOR:45:DP-2] [ 355.740637] [drm:check_encoder_state] [ENCODER:33:TMDS-33] [ 355.740637] [drm:check_encoder_state] [ENCODER:35:DP MST-35] [ 355.740637] [drm:check_encoder_state] [ENCODER:36:DP MST-36] [ 355.740638] [drm:check_encoder_state] [ENCODER:37:DP MST-37] [ 355.740638] [drm:check_encoder_state] [ENCODER:42:TMDS-42] [ 355.740638] [drm:check_encoder_state] [ENCODER:44:TMDS-44] [ 355.740639] [drm:check_encoder_state] [ENCODER:46:DP MST-46] [ 355.740639] [drm:check_encoder_state] [ENCODER:47:DP MST-47] [ 355.740639] [drm:check_encoder_state] [ENCODER:48:DP MST-48] [ 355.740640] [drm:check_crtc_state] [CRTC:20] [ 355.740645] [drm:check_crtc_state] [CRTC:25] [ 355.740647] [drm:check_crtc_state] [CRTC:30] [ 355.740650] [drm:check_shared_dpll_state] DPLL 1 [ 355.740652] [drm:check_shared_dpll_state] DPLL 2 [ 355.740654] [drm:check_shared_dpll_state] DPLL 3 [ 355.740655] [drm:intel_crtc_set_config] [CRTC:25] [NOFB] [ 355.740656] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0 [ 355.740656] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 355.740657] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 [ 355.740658] [drm:intel_crtc_set_config] [CRTC:30] [NOFB] [ 355.740658] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=0, fb_changed=0 [ 355.740658] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 355.740659] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 [ 355.754754] [drm:intel_crtc_set_config] [CRTC:20] [FB:79] #connectors=1 (x y) (0 0) [ 355.754755] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 355.754755] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 355.754756] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 355.754756] [drm:connected_sink_compute_bpp] [CONNECTOR:45:DP-2] checking for sink bpp constrains [ 355.754757] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 148500KHz [ 355.754757] [drm:intel_dp_compute_config] DP link bw 06 lane count 4 clock 162000 bpp 24 [ 355.754758] [drm:intel_dp_compute_config] DP link bw required 356400 available 518400 [ 355.754758] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 [ 355.754758] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 355.754759] [drm:intel_dump_pipe_config] cpu_transcoder: A [ 355.754759] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 [ 355.754759] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 355.754760] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64 [ 355.754760] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 355.754760] [drm:intel_dump_pipe_config] audio: 1, infoframes: 0 [ 355.754760] [drm:intel_dump_pipe_config] requested mode: [ 355.754761] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 355.754761] [drm:intel_dump_pipe_config] adjusted mode: [ 355.754761] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 355.754762] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5 [ 355.754762] [drm:intel_dump_pipe_config] port clock: 162000 [ 355.754762] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 [ 355.754763] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 355.754763] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 355.754763] [drm:intel_dump_pipe_config] ips: 0 [ 355.754763] [drm:intel_dump_pipe_config] double wide: 0 [ 355.756603] [drm:i915_gem_open] [ 355.756983] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted) [ 355.756984] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted) [ 355.756986] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 355.757082] [drm:i915_gem_open] [ 355.757362] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted) [ 355.757363] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted) [ 355.757364] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 355.757365] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 355.757450] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 355.757453] [drm:add_framebuffer_internal] [FB:78] [ 355.757479] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 355.757479] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 355.757511] [drm:drm_mode_getconnector] [CONNECTOR:34:?] [ 355.757513] [drm:drm_mode_getconnector] [CONNECTOR:34:?] [ 355.757522] [drm:drm_mode_getconnector] [CONNECTOR:40:?] [ 355.757523] [drm:drm_mode_getconnector] [CONNECTOR:40:?] [ 355.757531] [drm:drm_mode_getconnector] [CONNECTOR:43:?] [ 355.757531] [drm:drm_mode_getconnector] [CONNECTOR:43:?] [ 355.757539] [drm:drm_mode_getconnector] [CONNECTOR:45:?] [ 355.757540] [drm:drm_mode_getconnector] [CONNECTOR:45:?] [ 355.757547] [drm:drm_mode_getconnector] [CONNECTOR:49:?] [ 355.757548] [drm:drm_mode_getconnector] [CONNECTOR:49:?] [ 355.765493] [drm:add_framebuffer_internal] [FB:78] [ 355.786041] [drm:drm_mode_setcrtc] [CRTC:20] [ 355.786042] [drm:drm_mode_setcrtc] [CONNECTOR:45:DP-2] [ 355.786043] [drm:intel_crtc_set_config] [CRTC:20] [FB:78] #connectors=1 (x y) (0 0) [ 355.786044] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1 [ 355.786044] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 355.786045] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 355.786046] [drm:connected_sink_compute_bpp] [CONNECTOR:45:DP-2] checking for sink bpp constrains [ 355.786046] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 148500KHz [ 355.786047] [drm:intel_dp_compute_config] DP link bw 06 lane count 4 clock 162000 bpp 24 [ 355.786048] [drm:intel_dp_compute_config] DP link bw required 356400 available 518400 [ 355.786048] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 [ 355.786049] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 355.786049] [drm:intel_dump_pipe_config] cpu_transcoder: A [ 355.786049] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 [ 355.786050] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 355.786050] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64 [ 355.786051] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 355.786051] [drm:intel_dump_pipe_config] audio: 1, infoframes: 0 [ 355.786051] [drm:intel_dump_pipe_config] requested mode: [ 355.786052] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0x5 [ 355.786052] [drm:intel_dump_pipe_config] adjusted mode: [ 355.786053] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0x5 [ 355.786053] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x0 flags: 0x5 [ 355.786054] [drm:intel_dump_pipe_config] port clock: 162000 [ 355.786054] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 [ 355.786054] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 355.786055] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 355.786055] [drm:intel_dump_pipe_config] ips: 0 [ 355.786055] [drm:intel_dump_pipe_config] double wide: 0 [ 355.786056] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043b508de0 [ 355.786057] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88043b0d7840 state to ffff88043b508de0 [ 355.786057] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880002ce0800 state to ffff88043b508de0 [ 355.786058] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88043b0d7840 to [CRTC:20] [ 355.786058] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88043b0d7840 [ 355.786058] [drm:drm_atomic_check_only] checking ffff88043b508de0 [ 355.786059] [drm:drm_atomic_commit] commiting ffff88043b508de0 [ 355.786635] [drm:skylake_update_primary_plane] Writing base 00000000 0,0,1920,1080 pitch=7680 [ 355.786636] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043b508de0 [ 355.786637] [drm:drm_atomic_state_free] Freeing atomic state ffff88043b508de0 [ 356.023024] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00800000, dig 0x10111010 [ 356.023025] [drm:intel_hpd_irq_handler] digital hpd port D - short [ 356.023027] [drm:intel_dp_hpd_pulse] got hpd irq on port D - short [ 356.023325] [drm:intel_dp_get_dpcd] DPCD: 11 0a 84 00 01 00 00 00 00 00 00 00 00 00 00 [ 356.023505] [drm:intel_dp_check_link_status] TMDS-44: channel EQ not ok, retraining [ 356.023847] [drm:gen8_irq_handler [i915]] *ERROR* CPU pipe A FIFO underrun [ 356.024250] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 [ 356.024626] [drm:intel_dp_set_signal_levels] Using signal levels 03000000 [ 356.024944] [drm:intel_dp_start_link_train] clock recovery OK [ 356.025566] [drm:intel_dp_set_signal_levels] Using signal levels 02000000 [ 356.026194] [drm:intel_dp_set_signal_levels] Using signal levels 01000000 [ 356.026807] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 [ 356.027445] [drm:intel_dp_set_signal_levels] Using signal levels 01000000 [ 356.029653] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful [ 367.609304] [drm:i915_gem_open] [ 367.609588] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted) [ 367.609588] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted) [ 367.616011] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted) [ 367.616012] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted) [ 367.616013] [drm:i915_gem_context_create_ioctl] HW context 1 created [ 369.359667] [drm] stuck on render ring [ 369.359739] [drm] GPU HANG: ecode 9:0:0x85dffffb, in copyteximage [5218], reason: Ring hung, action: reset [ 369.359740] [drm] GPU hangs can indicate a bug anywhere in the entire gfx stack, including userspace. [ 369.359740] [drm] Please file a _new_ bug report on bugs.freedesktop.org against DRI -> DRM/Intel [ 369.359740] [drm] drm/i915 developers can then reassign to the right component if it's not a kernel issue. [ 369.359740] [drm] The gpu crash dump is required to analyze gpu hangs, so please always attach it. [ 369.359741] [drm] GPU crash dump saved to /sys/class/drm/card0/error [ 369.359745] [drm:i915_reset_and_wakeup] resetting chip [ 369.360176] drm/i915: Resetting chip after gpu hang [ 369.360196] [drm:gen8_init_common_ring] Execlists enabled for render ring [ 369.360202] [drm:gen8_init_common_ring] Execlists enabled for bsd ring [ 369.360207] [drm:gen8_init_common_ring] Execlists enabled for blitter ring [ 369.360207] [drm:gen8_init_common_ring] Execlists enabled for video enhancement ring [ 369.360214] [drm:skylake_update_primary_plane] Writing base 00000000 0,0,1920,1080 pitch=7680 [ 370.522616] [drm] RC6 on [ 372.581466] [drm] stuck on render ring [ 372.581567] [drm] GPU HANG: ecode 9:0:0x85dffffb, in copyteximage [5218], reason: Ring hung, action: reset [ 372.581577] [drm:i915_reset_and_wakeup] resetting chip [ 372.582383] drm/i915: Resetting chip after gpu hang [ 372.582409] [drm:gen8_init_common_ring] Execlists enabled for render ring [ 372.582415] [drm:gen8_init_common_ring] Execlists enabled for bsd ring [ 372.582416] [drm:gen8_init_common_ring] Execlists enabled for blitter ring [ 372.582417] [drm:gen8_init_common_ring] Execlists enabled for video enhancement ring [ 372.582424] [drm:skylake_update_primary_plane] Writing base 00000000 0,0,1920,1080 pitch=7680 [ 372.883144] [drm] RC6 on [ 466.095005] stack segment: 0000 [#1] SMP [ 466.095298] Modules linked in: ipv6 dm_mod acpi_cpufreq i915 button video drm_kms_helper drm cfbfillrect cfbimgblt cfbcopyarea [ 466.095687] CPU: 4 PID: 5405 Comm: mkdir Tainted: G W 3.19.0-rc7_drm-intel-nightly_b4442e_20150209+ #238 [ 466.096094] task: ffff880434fb8000 ti: ffff88043b858000 task.ti: ffff88043b858000 [ 466.096504] RIP: 0010:[] [] kmem_cache_alloc+0xd9/0x113 [ 466.096924] RSP: 0018:ffff88043b85b9c8 EFLAGS: 00010082 [ 466.097341] RAX: 0000000000000000 RBX: ffff880002cb8600 RCX: 0000000000003094 [ 466.097765] RDX: 0000000000003093 RSI: 0000000000000020 RDI: ffff88043dc03900 [ 466.098190] RBP: ff88043b45d97f00 R08: 0000000000015520 R09: 0000000000000000 [ 466.098619] R10: 0000000000000000 R11: 0000000000000000 R12: ffff88043dc03900 [ 466.099049] R13: 0000000000000020 R14: ffffffff81400806 R15: 0000000000e8089e [ 466.099480] FS: 00007f8826a17840(0000) GS:ffff88044e500000(0000) knlGS:0000000000000000 [ 466.099917] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 466.100357] CR2: 00007fe845d80b98 CR3: 0000000435b0c000 CR4: 00000000003407e0 [ 466.100801] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 [ 466.101245] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 [ 466.101683] Stack: [ 466.102114] 0000000000000000 ffff880002cb8600 ffffffff81c01120 0000000000000020 [ 466.102560] ffff88043be69800 ffff88043be69800 0000000000e8089e ffffffff81400806 [ 466.103010] ffff880435a0b988 ffff880435a0b988 ffff88043baf9000 ffff88043be69800 [ 466.103461] Call Trace: [ 466.103914] [] ? scsi_host_alloc_command+0x3d/0x9e [ 466.104374] [] ? scsi_get_command+0x16/0x128 [ 466.104830] [] ? scsi_prep_fn+0x58/0x139 [ 466.105284] [] ? blk_peek_request+0xf7/0x216 [ 466.105742] [] ? scsi_request_fn+0x2f/0x5cc [ 466.106201] [] ? __blk_run_queue+0x29/0x31 [ 466.106659] [] ? blk_queue_bio+0x27d/0x2be [ 466.107117] [] ? generic_make_request+0x93/0xd0 [ 466.107578] [] ? submit_bio+0xff/0x11d [ 466.108040] [] ? _submit_bh+0x104/0x122 [ 466.108500] [] ? ll_rw_block+0x6d/0x77 [ 466.108957] [] ? __breadahead+0x2c/0x40 [ 466.109409] [] ? __ext4_get_inode_loc+0x287/0x396 [ 466.109860] [] ? ext4_ext_tree_init+0x2b/0x30 [ 466.110308] [] ? ext4_reserve_inode_write+0x1c/0x7f [ 466.110758] [] ? ext4_mark_inode_dirty+0x61/0x1cb [ 466.111211] [] ? ext4_ext_tree_init+0x2b/0x30 [ 466.111662] [] ? __ext4_new_inode+0xf0d/0x110d [ 466.112115] [] ? ext4_lookup+0xf6/0x12d [ 466.112567] [] ? __lookup_hash+0x2a/0x31 [ 466.113018] [] ? kern_path_create+0x70/0x112 [ 466.113471] [] ? ext4_mkdir+0xdb/0x35c [ 466.113926] [] ? kmem_cache_alloc+0x27/0x113 [ 466.114382] [] ? vfs_mkdir+0xac/0x128 [ 466.114838] [] ? SyS_mkdirat+0x6b/0xa9 [ 466.115295] [] ? system_call_fastpath+0x12/0x17 [ 466.115753] Code: e9 4d 89 f8 4c 89 f1 48 89 ea 48 89 de 41 ff 14 24 49 83 c4 10 49 83 3c 24 00 eb 36 eb 38 49 63 44 24 20 4d 8b 04 24 48 8d 4a 01 <48> 8b 5c 05 00 48 89 e8 65 49 0f c7 08 0f 94 c0 84 c0 0f 85 78 [ 466.116276] RIP [] kmem_cache_alloc+0xd9/0x113 [ 466.116772] RSP [ 466.121844] ---[ end trace b809efb3ce78ceb0 ]---