[ 3.653569] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 [ 3.653931] [drm:intel_dp_set_signal_levels] Using signal levels 03000000 [ 3.654271] [drm:intel_dp_start_link_train] clock recovery OK [ 3.654918] [drm:intel_dp_set_signal_levels] Using signal levels 02000000 [ 3.655562] [drm:intel_dp_set_signal_levels] Using signal levels 01000000 [ 3.656193] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 [ 3.656833] [drm:intel_dp_set_signal_levels] Using signal levels 01000000 [ 3.659083] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful [ 3.659207] [drm:skl_wm_flush_pipe] flush pipe A (pass 3) [ 3.659213] [drm:intel_audio_codec_enable] ELD on [CONNECTOR:45:DP-2], [ENCODER:44:TMDS-44] [ 3.659213] [drm:hsw_audio_codec_enable] Enable audio codec on pipe A, 36 bytes ELD [ 3.659216] [drm:skylake_update_primary_plane] Writing base 008C0000 0,0,1920,1080 pitch=7680 [ 3.659217] [drm:intel_fbc_update] disabled per chip default [ 3.659223] [drm:intel_connector_check_state] [CONNECTOR:45:DP-2] [ 3.659225] [drm:check_encoder_state] [ENCODER:33:TMDS-33] [ 3.659225] [drm:check_encoder_state] [ENCODER:35:DP MST-35] [ 3.659225] [drm:check_encoder_state] [ENCODER:36:DP MST-36] [ 3.659225] [drm:check_encoder_state] [ENCODER:37:DP MST-37] [ 3.659225] [drm:check_encoder_state] [ENCODER:42:TMDS-42] [ 3.659225] [drm:check_encoder_state] [ENCODER:44:TMDS-44] [ 3.659226] [drm:check_encoder_state] [ENCODER:46:DP MST-46] [ 3.659226] [drm:check_encoder_state] [ENCODER:47:DP MST-47] [ 3.659226] [drm:check_encoder_state] [ENCODER:48:DP MST-48] [ 3.659226] [drm:check_crtc_state] [CRTC:20] [ 3.659228] [drm:check_crtc_state] [CRTC:25] [ 3.659229] [drm:check_crtc_state] [CRTC:30] [ 3.659229] [drm:check_shared_dpll_state] DPLL 1 [ 3.659229] [drm:check_shared_dpll_state] DPLL 2 [ 3.659229] [drm:check_shared_dpll_state] DPLL 3 [ 3.659232] [drm:intel_crtc_set_config] [CRTC:25] [NOFB] [ 3.659233] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0 [ 3.659233] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 3.659233] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 [ 3.659234] [drm:intel_crtc_set_config] [CRTC:30] [NOFB] [ 3.659234] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=0, fb_changed=0 [ 3.659234] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 3.659235] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 [ 3.659235] [drm:drm_fb_helper_hotplug_event] [ 3.659235] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:DP-1] [ 3.659235] [drm:intel_dp_detect] [CONNECTOR:34:DP-1] [ 3.659236] [drm:intel_display_power_get] enabling DDI B power well [ 3.659236] [drm:skl_set_power_well] Enabling DDI B power well [ 3.659241] [drm:intel_display_power_put] disabling DDI B power well [ 3.659241] [drm:skl_set_power_well] Disabling DDI B power well [ 3.659242] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:DP-1] disconnected [ 3.659242] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] [ 3.659242] [drm:intel_hdmi_detect] [CONNECTOR:40:HDMI-A-1] [ 3.659242] [drm:intel_display_power_get] enabling DDI B power well [ 3.659243] [drm:skl_set_power_well] Enabling DDI B power well [ 3.659353] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) [ 3.659353] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb [ 3.659353] [drm:intel_display_power_put] disabling DDI B power well [ 3.659354] [drm:skl_set_power_well] Disabling DDI B power well [ 3.659354] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] disconnected [ 3.659354] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-2] [ 3.659354] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-2] [ 3.659355] [drm:intel_display_power_get] enabling DDI C power well [ 3.659355] [drm:skl_set_power_well] Enabling DDI C power well [ 3.659467] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) [ 3.659468] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc [ 3.659468] [drm:intel_display_power_put] disabling DDI C power well [ 3.659469] [drm:skl_set_power_well] Disabling DDI C power well [ 3.659469] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-2] disconnected [ 3.659470] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:45:DP-2] [ 3.659471] [drm:intel_dp_detect] [CONNECTOR:45:DP-2] [ 3.659636] [drm:intel_dp_get_dpcd] DPCD: 11 0a 84 00 01 00 00 00 00 00 00 00 00 00 00 [ 3.678470] [drm:drm_dp_i2c_do_msg] native defer [ 3.678470] [drm:drm_detect_monitor_audio] Monitor has basic audio support [ 3.678523] [drm:drm_edid_to_eld] ELD monitor ASUS PA238 [ 3.678523] [drm:drm_edid_to_eld] ELD size 36, SAD count 1 [ 3.678532] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:45:DP-2] probed modes : [ 3.678533] [drm:drm_mode_debug_printmodeline] Modeline 52:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 3.678533] [drm:drm_mode_debug_printmodeline] Modeline 92:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 [ 3.678534] [drm:drm_mode_debug_printmodeline] Modeline 85:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 [ 3.678534] [drm:drm_mode_debug_printmodeline] Modeline 100:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 [ 3.678535] [drm:drm_mode_debug_printmodeline] Modeline 86:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5 [ 3.678535] [drm:drm_mode_debug_printmodeline] Modeline 84:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15 [ 3.678535] [drm:drm_mode_debug_printmodeline] Modeline 61:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9 [ 3.678536] [drm:drm_mode_debug_printmodeline] Modeline 70:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5 [ 3.678536] [drm:drm_mode_debug_printmodeline] Modeline 59:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 [ 3.678537] [drm:drm_mode_debug_printmodeline] Modeline 60:"1440x900" 75 136750 1440 1536 1688 1936 900 903 909 942 0x40 0x6 [ 3.678537] [drm:drm_mode_debug_printmodeline] Modeline 57:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9 [ 3.678537] [drm:drm_mode_debug_printmodeline] Modeline 58:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5 [ 3.678538] [drm:drm_mode_debug_printmodeline] Modeline 62:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5 [ 3.678538] [drm:drm_mode_debug_printmodeline] Modeline 54:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5 [ 3.678538] [drm:drm_mode_debug_printmodeline] Modeline 94:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5 [ 3.678539] [drm:drm_mode_debug_printmodeline] Modeline 55:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5 [ 3.678539] [drm:drm_mode_debug_printmodeline] Modeline 90:"1440x576" 50 54000 1440 1464 1592 1728 576 581 586 625 0x40 0xa [ 3.678539] [drm:drm_mode_debug_printmodeline] Modeline 71:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5 [ 3.678540] [drm:drm_mode_debug_printmodeline] Modeline 72:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa [ 3.678540] [drm:drm_mode_debug_printmodeline] Modeline 73:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa [ 3.678541] [drm:drm_mode_debug_printmodeline] Modeline 102:"1440x480" 60 54054 1440 1472 1596 1716 480 489 495 525 0x40 0xa [ 3.678541] [drm:drm_mode_debug_printmodeline] Modeline 88:"1440x480" 60 54000 1440 1472 1596 1716 480 489 495 525 0x40 0xa [ 3.678541] [drm:drm_mode_debug_printmodeline] Modeline 74:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa [ 3.678542] [drm:drm_mode_debug_printmodeline] Modeline 75:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5 [ 3.678542] [drm:drm_mode_debug_printmodeline] Modeline 76:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5 [ 3.678543] [drm:drm_mode_debug_printmodeline] Modeline 63:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 [ 3.678543] [drm:drm_mode_debug_printmodeline] Modeline 64:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5 [ 3.678543] [drm:drm_mode_debug_printmodeline] Modeline 56:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa [ 3.678544] [drm:drm_mode_debug_printmodeline] Modeline 93:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa [ 3.678544] [drm:drm_mode_debug_printmodeline] Modeline 53:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa [ 3.678544] [drm:drm_mode_debug_printmodeline] Modeline 65:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa [ 3.678545] [drm:drm_mode_debug_printmodeline] Modeline 66:"640x480" 73 31500 640 664 704 832 480 489 491 520 0x40 0xa [ 3.678545] [drm:drm_mode_debug_printmodeline] Modeline 67:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa [ 3.678545] [drm:drm_mode_debug_printmodeline] Modeline 68:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa [ 3.678546] [drm:drm_mode_debug_printmodeline] Modeline 77:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa [ 3.678546] [drm:drm_mode_debug_printmodeline] Modeline 69:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6 [ 3.678546] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:HDMI-A-3] [ 3.678547] [drm:intel_hdmi_detect] [CONNECTOR:49:HDMI-A-3] [ 3.678628] [drm:gmbus_xfer] GMBUS [i915 gmbus dpd] NAK for addr: 0050 r(1) [ 3.678628] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpd [ 3.678629] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:HDMI-A-3] disconnected [ 3.678629] [drm:drm_setup_crtcs] [ 3.678630] [drm:drm_enable_connectors] connector 34 enabled? no [ 3.678630] [drm:drm_enable_connectors] connector 40 enabled? no [ 3.678630] [drm:drm_enable_connectors] connector 43 enabled? no [ 3.678630] [drm:drm_enable_connectors] connector 45 enabled? yes [ 3.678630] [drm:drm_enable_connectors] connector 49 enabled? no [ 3.678631] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping [ 3.678631] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping [ 3.678631] [drm:intel_fb_initial_config] connector HDMI-A-2 not enabled, skipping [ 3.678631] [drm:intel_fb_initial_config] looking for cmdline mode on connector DP-2 [ 3.678632] [drm:intel_fb_initial_config] looking for preferred mode on connector DP-2 0 [ 3.678632] [drm:intel_fb_initial_config] connector DP-2 on pipe A [CRTC:20]: 1920x1080 [ 3.678632] [drm:intel_fb_initial_config] connector HDMI-A-3 not enabled, skipping [ 3.678632] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 20 (0,0) [ 3.678633] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043b4a0000 [ 3.678634] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88043be46600 state to ffff88043b4a0000 [ 3.678634] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8804368fc400 state to ffff88043b4a0000 [ 3.678635] [drm:drm_atomic_check_only] checking ffff88043b4a0000 [ 3.678635] [drm:drm_atomic_commit] commiting ffff88043b4a0000 [ 3.678644] [drm:skylake_update_primary_plane] Writing base 008C0000 0,0,1920,1080 pitch=7680 [ 3.678645] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043b4a0000 [ 3.678645] [drm:drm_atomic_state_free] Freeing atomic state ffff88043b4a0000 [ 3.678645] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043b4a0000 [ 3.678646] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff88043be460c0 state to ffff88043b4a0000 [ 3.678646] [drm:drm_atomic_check_only] checking ffff88043b4a0000 [ 3.678646] [drm:drm_atomic_commit] commiting ffff88043b4a0000 [ 3.678646] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043b4a0000 [ 3.678647] [drm:drm_atomic_state_free] Freeing atomic state ffff88043b4a0000 [ 3.678647] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043b4a0000 [ 3.678647] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff88043be46a80 state to ffff88043b4a0000 [ 3.678647] [drm:drm_atomic_check_only] checking ffff88043b4a0000 [ 3.678647] [drm:drm_atomic_commit] commiting ffff88043b4a0000 [ 3.678648] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043b4a0000 [ 3.678648] [drm:drm_atomic_state_free] Freeing atomic state ffff88043b4a0000 [ 3.678648] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043b4a0000 [ 3.678648] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88043be46480 state to ffff88043b4a0000 [ 3.678648] [drm:drm_atomic_check_only] checking ffff88043b4a0000 [ 3.678649] [drm:drm_atomic_commit] commiting ffff88043b4a0000 [ 3.678649] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043b4a0000 [ 3.678649] [drm:drm_atomic_state_free] Freeing atomic state ffff88043b4a0000 [ 3.678649] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043b4a0000 [ 3.678650] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88043be463c0 state to ffff88043b4a0000 [ 3.678650] [drm:drm_atomic_check_only] checking ffff88043b4a0000 [ 3.678650] [drm:drm_atomic_commit] commiting ffff88043b4a0000 [ 3.678650] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043b4a0000 [ 3.678650] [drm:drm_atomic_state_free] Freeing atomic state ffff88043b4a0000 [ 3.678650] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043b4a0000 [ 3.678651] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88043be46780 state to ffff88043b4a0000 [ 3.678651] [drm:drm_atomic_check_only] checking ffff88043b4a0000 [ 3.678651] [drm:drm_atomic_commit] commiting ffff88043b4a0000 [ 3.678651] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043b4a0000 [ 3.678651] [drm:drm_atomic_state_free] Freeing atomic state ffff88043b4a0000 [ 3.678652] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043b4a0000 [ 3.678652] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff880436b87840 state to ffff88043b4a0000 [ 3.678652] [drm:drm_atomic_check_only] checking ffff88043b4a0000 [ 3.678652] [drm:drm_atomic_commit] commiting ffff88043b4a0000 [ 3.678652] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043b4a0000 [ 3.678653] [drm:drm_atomic_state_free] Freeing atomic state ffff88043b4a0000 [ 3.678653] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043b4a0000 [ 3.678653] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff880436b876c0 state to ffff88043b4a0000 [ 3.678653] [drm:drm_atomic_check_only] checking ffff88043b4a0000 [ 3.678653] [drm:drm_atomic_commit] commiting ffff88043b4a0000 [ 3.678654] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043b4a0000 [ 3.678654] [drm:drm_atomic_state_free] Freeing atomic state ffff88043b4a0000 [ 3.678654] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043b4a0000 [ 3.678654] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff880436b87540 state to ffff88043b4a0000 [ 3.678654] [drm:drm_atomic_check_only] checking ffff88043b4a0000 [ 3.678655] [drm:drm_atomic_commit] commiting ffff88043b4a0000 [ 3.678655] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043b4a0000 [ 3.678655] [drm:drm_atomic_state_free] Freeing atomic state ffff88043b4a0000 [ 3.678655] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043b4a0000 [ 3.678655] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff880436b873c0 state to ffff88043b4a0000 [ 3.678655] [drm:drm_atomic_check_only] checking ffff88043b4a0000 [ 3.678656] [drm:drm_atomic_commit] commiting ffff88043b4a0000 [ 3.678656] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043b4a0000 [ 3.678656] [drm:drm_atomic_state_free] Freeing atomic state ffff88043b4a0000 [ 3.678656] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043b4a0000 [ 3.678657] [drm:drm_atomic_get_plane_state] Added [PLANE:31] ffff880436b87240 state to ffff88043b4a0000 [ 3.678657] [drm:drm_atomic_check_only] checking ffff88043b4a0000 [ 3.678657] [drm:drm_atomic_commit] commiting ffff88043b4a0000 [ 3.678657] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043b4a0000 [ 3.678657] [drm:drm_atomic_state_free] Freeing atomic state ffff88043b4a0000 [ 3.678657] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043b4a0000 [ 3.678658] [drm:drm_atomic_get_plane_state] Added [PLANE:32] ffff880436b870c0 state to ffff88043b4a0000 [ 3.678658] [drm:drm_atomic_check_only] checking ffff88043b4a0000 [ 3.678658] [drm:drm_atomic_commit] commiting ffff88043b4a0000 [ 3.678658] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043b4a0000 [ 3.678658] [drm:drm_atomic_state_free] Freeing atomic state ffff88043b4a0000 [ 3.678659] [drm:intel_crtc_set_config] [CRTC:20] [FB:79] #connectors=1 (x y) (0 0) [ 3.678659] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 3.678660] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 3.678660] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 3.678660] [drm:connected_sink_compute_bpp] [CONNECTOR:45:DP-2] checking for sink bpp constrains [ 3.678661] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 148500KHz [ 3.678661] [drm:intel_dp_compute_config] DP link bw 06 lane count 4 clock 162000 bpp 24 [ 3.678662] [drm:intel_dp_compute_config] DP link bw required 356400 available 518400 [ 3.678662] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 [ 3.678662] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 3.678662] [drm:intel_dump_pipe_config] cpu_transcoder: A [ 3.678663] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 [ 3.678663] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 3.678663] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64 [ 3.678664] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 3.678664] [drm:intel_dump_pipe_config] audio: 1, infoframes: 0 [ 3.678664] [drm:intel_dump_pipe_config] requested mode: [ 3.678664] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 3.678664] [drm:intel_dump_pipe_config] adjusted mode: [ 3.678665] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 3.678665] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5 [ 3.678665] [drm:intel_dump_pipe_config] port clock: 162000 [ 3.678666] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 [ 3.678666] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 3.678666] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 3.678666] [drm:intel_dump_pipe_config] ips: 0 [ 3.678666] [drm:intel_dump_pipe_config] double wide: 0 [ 3.678667] [drm:intel_crtc_set_config] [CRTC:25] [NOFB] [ 3.678667] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0 [ 3.678667] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 3.678668] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 [ 3.678668] [drm:intel_crtc_set_config] [CRTC:30] [NOFB] [ 3.678668] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=0, fb_changed=0 [ 3.678668] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 3.678668] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 [ 3.678670] Console: switching to colour frame buffer device 240x67 [ 3.678671] [drm:intel_crtc_set_config] [CRTC:20] [FB:79] #connectors=1 (x y) (0 0) [ 3.678672] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 3.678672] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 3.678672] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 3.678672] [drm:connected_sink_compute_bpp] [CONNECTOR:45:DP-2] checking for sink bpp constrains [ 3.678673] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 148500KHz [ 3.678673] [drm:intel_dp_compute_config] DP link bw 06 lane count 4 clock 162000 bpp 24 [ 3.678673] [drm:intel_dp_compute_config] DP link bw required 356400 available 518400 [ 3.678674] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 [ 3.678674] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 3.678674] [drm:intel_dump_pipe_config] cpu_transcoder: A [ 3.678674] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 [ 3.678674] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 3.678675] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64 [ 3.678675] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 3.678675] [drm:intel_dump_pipe_config] audio: 1, infoframes: 0 [ 3.678675] [drm:intel_dump_pipe_config] requested mode: [ 3.678676] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 3.678676] [drm:intel_dump_pipe_config] adjusted mode: [ 3.678676] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 3.678676] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5 [ 3.678677] [drm:intel_dump_pipe_config] port clock: 162000 [ 3.678677] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 [ 3.678677] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 3.678677] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 3.678677] [drm:intel_dump_pipe_config] ips: 0 [ 3.678677] [drm:intel_dump_pipe_config] double wide: 0 [ 3.680074] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device [ 3.680081] i915 0000:00:02.0: registered panic notifier [ 3.681329] dracut: Starting plymouth daemon [ 3.683102] [drm:intel_crtc_set_config] [CRTC:20] [FB:79] #connectors=1 (x y) (0 0) [ 3.683103] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 3.683103] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 3.683104] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 3.683104] [drm:connected_sink_compute_bpp] [CONNECTOR:45:DP-2] checking for sink bpp constrains [ 3.683105] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 148500KHz [ 3.683105] [drm:intel_dp_compute_config] DP link bw 06 lane count 4 clock 162000 bpp 24 [ 3.683106] [drm:intel_dp_compute_config] DP link bw required 356400 available 518400 [ 3.683106] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 [ 3.683106] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 3.683106] [drm:intel_dump_pipe_config] cpu_transcoder: A [ 3.683107] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 [ 3.683107] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 3.683107] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64 [ 3.683108] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 3.683108] [drm:intel_dump_pipe_config] audio: 1, infoframes: 0 [ 3.683108] [drm:intel_dump_pipe_config] requested mode: [ 3.683108] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 3.683109] [drm:intel_dump_pipe_config] adjusted mode: [ 3.683109] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 3.683109] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5 [ 3.683110] [drm:intel_dump_pipe_config] port clock: 162000 [ 3.683110] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 [ 3.683110] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 3.683110] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 3.683110] [drm:intel_dump_pipe_config] ips: 0 [ 3.683110] [drm:intel_dump_pipe_config] double wide: 0 [ 3.686075] [drm:intel_crtc_set_config] [CRTC:20] [FB:79] #connectors=1 (x y) (0 0) [ 3.686076] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 3.686077] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 3.686077] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 3.686077] [drm:connected_sink_compute_bpp] [CONNECTOR:45:DP-2] checking for sink bpp constrains [ 3.686078] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 148500KHz [ 3.686079] [drm:intel_dp_compute_config] DP link bw 06 lane count 4 clock 162000 bpp 24 [ 3.686079] [drm:intel_dp_compute_config] DP link bw required 356400 available 518400 [ 3.686079] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 [ 3.686079] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 3.686080] [drm:intel_dump_pipe_config] cpu_transcoder: A [ 3.686080] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 [ 3.686080] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 3.686080] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64 [ 3.686081] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 3.686081] [drm:intel_dump_pipe_config] audio: 1, infoframes: 0 [ 3.686081] [drm:intel_dump_pipe_config] requested mode: [ 3.686081] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 3.686082] [drm:intel_dump_pipe_config] adjusted mode: [ 3.686082] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 3.686082] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5 [ 3.686083] [drm:intel_dump_pipe_config] port clock: 162000 [ 3.686083] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 [ 3.686083] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 3.686083] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 3.686083] [drm:intel_dump_pipe_config] ips: 0 [ 3.686084] [drm:intel_dump_pipe_config] double wide: 0 [ 3.709350] EXT4-fs (sda3): mounted filesystem with ordered data mode. Opts: (null) [ 3.720483] dracut: Checking ext4: /dev/sda3 [ 3.720518] dracut: issuing e2fsck -a /dev/sda3 [ 3.722178] dracut: /dev/sda3: clean, 731822/4751360 files, 10596313/19000576 blocks [ 3.722268] dracut: Remounting /dev/sda3 with -o errors=remount-ro,ro [ 3.723769] EXT4-fs (sda3): mounted filesystem with ordered data mode. Opts: errors=remount-ro [ 3.725031] dracut: Mounted root filesystem /dev/sda3 [ 3.727668] device-mapper: uevent: version 1.0.3 [ 3.727701] device-mapper: ioctl: 4.29.0-ioctl (2014-10-28) initialised: dm-devel@redhat.com [ 3.745111] dracut: Switching root [ 3.760500] random: init urandom read with 101 bits of entropy available [ 3.766238] init: plymouth-upstart-bridge main process (2876) terminated with status 1 [ 3.766251] init: plymouth-upstart-bridge main process ended, respawning [ 3.767011] init: plymouth-upstart-bridge main process (2885) terminated with status 1 [ 3.767025] init: plymouth-upstart-bridge main process ended, respawning [ 3.767426] init: plymouth-upstart-bridge main process (2888) terminated with status 1 [ 3.767440] init: plymouth-upstart-bridge main process ended, respawning [ 3.768084] init: plymouth-upstart-bridge main process (2889) terminated with status 1 [ 3.768098] init: plymouth-upstart-bridge main process ended, respawning [ 3.768832] init: plymouth-upstart-bridge main process (2891) terminated with status 1 [ 3.768843] init: plymouth-upstart-bridge main process ended, respawning [ 3.769473] init: plymouth-upstart-bridge main process (2893) terminated with status 1 [ 3.769485] init: plymouth-upstart-bridge main process ended, respawning [ 3.773244] init: ureadahead main process (2879) terminated with status 5 [ 3.808457] random: nonblocking pool is initialized [ 3.821814] systemd-udevd[3009]: starting version 204 [ 3.881544] [drm:intel_crtc_set_config] [CRTC:20] [FB:79] #connectors=1 (x y) (0 0) [ 3.881545] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 3.881545] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 3.881546] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 3.881546] [drm:connected_sink_compute_bpp] [CONNECTOR:45:DP-2] checking for sink bpp constrains [ 3.881547] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 148500KHz [ 3.881548] [drm:intel_dp_compute_config] DP link bw 06 lane count 4 clock 162000 bpp 24 [ 3.881548] [drm:intel_dp_compute_config] DP link bw required 356400 available 518400 [ 3.881549] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 [ 3.881549] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 3.881549] [drm:intel_dump_pipe_config] cpu_transcoder: A [ 3.881550] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 [ 3.881550] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 3.881550] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64 [ 3.881551] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 3.881551] [drm:intel_dump_pipe_config] audio: 1, infoframes: 0 [ 3.881551] [drm:intel_dump_pipe_config] requested mode: [ 3.881552] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 3.881552] [drm:intel_dump_pipe_config] adjusted mode: [ 3.881553] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 3.881553] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5 [ 3.881554] [drm:intel_dump_pipe_config] port clock: 162000 [ 3.881554] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 [ 3.881554] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 3.881555] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 3.881555] [drm:intel_dump_pipe_config] ips: 0 [ 3.881555] [drm:intel_dump_pipe_config] double wide: 0 [ 3.882920] asix 1-4:1.0 eth2: renamed from eth0 [ 3.883976] [drm:intel_crtc_set_config] [CRTC:20] [FB:79] #connectors=1 (x y) (0 0) [ 3.883977] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 3.883977] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 3.883978] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 3.883978] [drm:connected_sink_compute_bpp] [CONNECTOR:45:DP-2] checking for sink bpp constrains [ 3.883979] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 148500KHz [ 3.883980] [drm:intel_dp_compute_config] DP link bw 06 lane count 4 clock 162000 bpp 24 [ 3.883980] [drm:intel_dp_compute_config] DP link bw required 356400 available 518400 [ 3.883981] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 [ 3.883981] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 3.883981] [drm:intel_dump_pipe_config] cpu_transcoder: A [ 3.883981] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 [ 3.883982] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 3.883983] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64 [ 3.883983] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 3.883983] [drm:intel_dump_pipe_config] audio: 1, infoframes: 0 [ 3.883983] [drm:intel_dump_pipe_config] requested mode: [ 3.883984] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 3.883984] [drm:intel_dump_pipe_config] adjusted mode: [ 3.883985] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 3.883985] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5 [ 3.883985] [drm:intel_dump_pipe_config] port clock: 162000 [ 3.883986] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 [ 3.883986] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 3.883986] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 3.883986] [drm:intel_dump_pipe_config] ips: 0 [ 3.883986] [drm:intel_dump_pipe_config] double wide: 0 [ 3.887445] systemd-udevd[3746]: renamed network interface eth0 to eth2 [ 3.887541] [drm:intel_crtc_set_config] [CRTC:20] [FB:79] #connectors=1 (x y) (0 0) [ 3.887542] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 3.887542] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 3.887543] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 3.887543] [drm:connected_sink_compute_bpp] [CONNECTOR:45:DP-2] checking for sink bpp constrains [ 3.887544] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 148500KHz [ 3.887545] [drm:intel_dp_compute_config] DP link bw 06 lane count 4 clock 162000 bpp 24 [ 3.887545] [drm:intel_dp_compute_config] DP link bw required 356400 available 518400 [ 3.887546] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 [ 3.887546] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 3.887546] [drm:intel_dump_pipe_config] cpu_transcoder: A [ 3.887547] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 [ 3.887547] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 3.887548] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64 [ 3.887548] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 3.887548] [drm:intel_dump_pipe_config] audio: 1, infoframes: 0 [ 3.887548] [drm:intel_dump_pipe_config] requested mode: [ 3.887549] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 3.887549] [drm:intel_dump_pipe_config] adjusted mode: [ 3.887550] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 3.887550] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5 [ 3.887552] [drm:intel_dump_pipe_config] port clock: 162000 [ 3.887552] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 [ 3.887552] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 3.887552] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 3.887552] [drm:intel_dump_pipe_config] ips: 0 [ 3.887553] [drm:intel_dump_pipe_config] double wide: 0 [ 3.898441] [drm:i915_gem_open] [ 3.899526] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted) [ 3.899527] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted) [ 3.899665] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043672d8a0 [ 3.899668] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880436db9300 state to ffff88043672d8a0 [ 3.899669] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88043ac95400 state to ffff88043672d8a0 [ 3.899670] [drm:drm_atomic_check_only] checking ffff88043672d8a0 [ 3.899671] [drm:drm_atomic_commit] commiting ffff88043672d8a0 [ 3.899701] [drm:skylake_update_primary_plane] Writing base 008C0000 0,0,1920,1080 pitch=7680 [ 3.899708] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043672d8a0 [ 3.899709] [drm:drm_atomic_state_free] Freeing atomic state ffff88043672d8a0 [ 3.899710] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043672d8a0 [ 3.899711] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff880436db9cc0 state to ffff88043672d8a0 [ 3.899712] [drm:drm_atomic_check_only] checking ffff88043672d8a0 [ 3.899712] [drm:drm_atomic_commit] commiting ffff88043672d8a0 [ 3.899713] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043672d8a0 [ 3.899713] [drm:drm_atomic_state_free] Freeing atomic state ffff88043672d8a0 [ 3.899714] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043672d8a0 [ 3.899715] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff88043c398300 state to ffff88043672d8a0 [ 3.899715] [drm:drm_atomic_check_only] checking ffff88043672d8a0 [ 3.899716] [drm:drm_atomic_commit] commiting ffff88043672d8a0 [ 3.899716] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043672d8a0 [ 3.899717] [drm:drm_atomic_state_free] Freeing atomic state ffff88043672d8a0 [ 3.899717] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043672d8a0 [ 3.899718] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88043c398d80 state to ffff88043672d8a0 [ 3.899719] [drm:drm_atomic_check_only] checking ffff88043672d8a0 [ 3.899719] [drm:drm_atomic_commit] commiting ffff88043672d8a0 [ 3.899720] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043672d8a0 [ 3.899720] [drm:drm_atomic_state_free] Freeing atomic state ffff88043672d8a0 [ 3.899722] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043672d8a0 [ 3.899722] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88043c398600 state to ffff88043672d8a0 [ 3.899723] [drm:drm_atomic_check_only] checking ffff88043672d8a0 [ 3.899723] [drm:drm_atomic_commit] commiting ffff88043672d8a0 [ 3.899724] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043672d8a0 [ 3.899724] [drm:drm_atomic_state_free] Freeing atomic state ffff88043672d8a0 [ 3.899725] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043672d8a0 [ 3.899725] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88043c398480 state to ffff88043672d8a0 [ 3.899726] [drm:drm_atomic_check_only] checking ffff88043672d8a0 [ 3.899728] [drm:drm_atomic_commit] commiting ffff88043672d8a0 [ 3.899728] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043672d8a0 [ 3.899728] [drm:drm_atomic_state_free] Freeing atomic state ffff88043672d8a0 [ 3.899729] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043672d8a0 [ 3.899729] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88043c398240 state to ffff88043672d8a0 [ 3.899730] [drm:drm_atomic_check_only] checking ffff88043672d8a0 [ 3.899730] [drm:drm_atomic_commit] commiting ffff88043672d8a0 [ 3.899731] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043672d8a0 [ 3.899731] [drm:drm_atomic_state_free] Freeing atomic state ffff88043672d8a0 [ 3.899733] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043672d8a0 [ 3.899734] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff88043c398540 state to ffff88043672d8a0 [ 3.899734] [drm:drm_atomic_check_only] checking ffff88043672d8a0 [ 3.899735] [drm:drm_atomic_commit] commiting ffff88043672d8a0 [ 3.899735] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043672d8a0 [ 3.899736] [drm:drm_atomic_state_free] Freeing atomic state ffff88043672d8a0 [ 3.899736] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043672d8a0 [ 3.899737] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff88043c3980c0 state to ffff88043672d8a0 [ 3.899738] [drm:drm_atomic_check_only] checking ffff88043672d8a0 [ 3.899738] [drm:drm_atomic_commit] commiting ffff88043672d8a0 [ 3.899739] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043672d8a0 [ 3.899739] [drm:drm_atomic_state_free] Freeing atomic state ffff88043672d8a0 [ 3.899740] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043672d8a0 [ 3.899740] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff88043c398180 state to ffff88043672d8a0 [ 3.899740] [drm:drm_atomic_check_only] checking ffff88043672d8a0 [ 3.899741] [drm:drm_atomic_commit] commiting ffff88043672d8a0 [ 3.899741] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043672d8a0 [ 3.899742] [drm:drm_atomic_state_free] Freeing atomic state ffff88043672d8a0 [ 3.899742] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043672d8a0 [ 3.899743] [drm:drm_atomic_get_plane_state] Added [PLANE:31] ffff88043c3999c0 state to ffff88043672d8a0 [ 3.899743] [drm:drm_atomic_check_only] checking ffff88043672d8a0 [ 3.899744] [drm:drm_atomic_commit] commiting ffff88043672d8a0 [ 3.899744] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043672d8a0 [ 3.899745] [drm:drm_atomic_state_free] Freeing atomic state ffff88043672d8a0 [ 3.899745] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043672d8a0 [ 3.899746] [drm:drm_atomic_get_plane_state] Added [PLANE:32] ffff88043c399240 state to ffff88043672d8a0 [ 3.899746] [drm:drm_atomic_check_only] checking ffff88043672d8a0 [ 3.899747] [drm:drm_atomic_commit] commiting ffff88043672d8a0 [ 3.899747] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043672d8a0 [ 3.899748] [drm:drm_atomic_state_free] Freeing atomic state ffff88043672d8a0 [ 3.899748] [drm:intel_crtc_set_config] [CRTC:20] [FB:79] #connectors=1 (x y) (0 0) [ 3.899751] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 3.899752] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 3.899753] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 3.899754] [drm:connected_sink_compute_bpp] [CONNECTOR:45:DP-2] checking for sink bpp constrains [ 3.899755] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 148500KHz [ 3.899756] [drm:intel_dp_compute_config] DP link bw 06 lane count 4 clock 162000 bpp 24 [ 3.899756] [drm:intel_dp_compute_config] DP link bw required 356400 available 518400 [ 3.899757] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 [ 3.899758] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 3.899758] [drm:intel_dump_pipe_config] cpu_transcoder: A [ 3.899759] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 [ 3.899759] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 3.899760] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64 [ 3.899761] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 3.899761] [drm:intel_dump_pipe_config] audio: 1, infoframes: 0 [ 3.899762] [drm:intel_dump_pipe_config] requested mode: [ 3.899763] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 3.899763] [drm:intel_dump_pipe_config] adjusted mode: [ 3.899764] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 3.899765] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5 [ 3.899765] [drm:intel_dump_pipe_config] port clock: 162000 [ 3.899766] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 [ 3.899766] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 3.899768] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 3.899768] [drm:intel_dump_pipe_config] ips: 0 [ 3.899769] [drm:intel_dump_pipe_config] double wide: 0 [ 3.899772] [drm:intel_crtc_set_config] [CRTC:25] [NOFB] [ 3.899775] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0 [ 3.899775] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 3.899776] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 [ 3.899777] [drm:intel_crtc_set_config] [CRTC:30] [NOFB] [ 3.899777] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=0, fb_changed=0 [ 3.899778] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 3.899778] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 [ 3.899791] [drm:i915_gem_open] [ 3.900840] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted) [ 3.900840] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted) [ 3.900930] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043672d8a0 [ 3.900931] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88043c3990c0 state to ffff88043672d8a0 [ 3.900931] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88043ac95400 state to ffff88043672d8a0 [ 3.900932] [drm:drm_atomic_check_only] checking ffff88043672d8a0 [ 3.900933] [drm:drm_atomic_commit] commiting ffff88043672d8a0 [ 3.900962] [drm:skylake_update_primary_plane] Writing base 008C0000 0,0,1920,1080 pitch=7680 [ 3.900974] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043672d8a0 [ 3.900974] [drm:drm_atomic_state_free] Freeing atomic state ffff88043672d8a0 [ 3.900975] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043672d8a0 [ 3.900976] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff88043c399540 state to ffff88043672d8a0 [ 3.900976] [drm:drm_atomic_check_only] checking ffff88043672d8a0 [ 3.900977] [drm:drm_atomic_commit] commiting ffff88043672d8a0 [ 3.900977] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043672d8a0 [ 3.900978] [drm:drm_atomic_state_free] Freeing atomic state ffff88043672d8a0 [ 3.900978] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043672d8a0 [ 3.900980] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff88043c399cc0 state to ffff88043672d8a0 [ 3.900980] [drm:drm_atomic_check_only] checking ffff88043672d8a0 [ 3.900981] [drm:drm_atomic_commit] commiting ffff88043672d8a0 [ 3.900981] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043672d8a0 [ 3.900982] [drm:drm_atomic_state_free] Freeing atomic state ffff88043672d8a0 [ 3.900982] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043672d8a0 [ 3.900984] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88043c3993c0 state to ffff88043672d8a0 [ 3.900984] [drm:drm_atomic_check_only] checking ffff88043672d8a0 [ 3.900984] [drm:drm_atomic_commit] commiting ffff88043672d8a0 [ 3.900985] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043672d8a0 [ 3.900985] [drm:drm_atomic_state_free] Freeing atomic state ffff88043672d8a0 [ 3.900986] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043672d8a0 [ 3.900987] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88043c399840 state to ffff88043672d8a0 [ 3.900988] [drm:drm_atomic_check_only] checking ffff88043672d8a0 [ 3.900989] [drm:drm_atomic_commit] commiting ffff88043672d8a0 [ 3.900989] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043672d8a0 [ 3.900990] [drm:drm_atomic_state_free] Freeing atomic state ffff88043672d8a0 [ 3.900990] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043672d8a0 [ 3.900991] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88043c399b40 state to ffff88043672d8a0 [ 3.900991] [drm:drm_atomic_check_only] checking ffff88043672d8a0 [ 3.900992] [drm:drm_atomic_commit] commiting ffff88043672d8a0 [ 3.900992] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043672d8a0 [ 3.900993] [drm:drm_atomic_state_free] Freeing atomic state ffff88043672d8a0 [ 3.900994] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043672d8a0 [ 3.900994] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88043c399e40 state to ffff88043672d8a0 [ 3.900995] [drm:drm_atomic_check_only] checking ffff88043672d8a0 [ 3.900995] [drm:drm_atomic_commit] commiting ffff88043672d8a0 [ 3.900996] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043672d8a0 [ 3.900997] [drm:drm_atomic_state_free] Freeing atomic state ffff88043672d8a0 [ 3.900997] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043672d8a0 [ 3.900998] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff88043c398240 state to ffff88043672d8a0 [ 3.900998] [drm:drm_atomic_check_only] checking ffff88043672d8a0 [ 3.900999] [drm:drm_atomic_commit] commiting ffff88043672d8a0 [ 3.900999] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043672d8a0 [ 3.901000] [drm:drm_atomic_state_free] Freeing atomic state ffff88043672d8a0 [ 3.901000] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043672d8a0 [ 3.901001] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff88043c398540 state to ffff88043672d8a0 [ 3.901001] [drm:drm_atomic_check_only] checking ffff88043672d8a0 [ 3.901002] [drm:drm_atomic_commit] commiting ffff88043672d8a0 [ 3.901004] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043672d8a0 [ 3.901004] [drm:drm_atomic_state_free] Freeing atomic state ffff88043672d8a0 [ 3.901005] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043672d8a0 [ 3.901005] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff88043c3980c0 state to ffff88043672d8a0 [ 3.901006] [drm:drm_atomic_check_only] checking ffff88043672d8a0 [ 3.901006] [drm:drm_atomic_commit] commiting ffff88043672d8a0 [ 3.901007] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043672d8a0 [ 3.901007] [drm:drm_atomic_state_free] Freeing atomic state ffff88043672d8a0 [ 3.901009] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043672d8a0 [ 3.901009] [drm:drm_atomic_get_plane_state] Added [PLANE:31] ffff88043c398180 state to ffff88043672d8a0 [ 3.901009] [drm:drm_atomic_check_only] checking ffff88043672d8a0 [ 3.901010] [drm:drm_atomic_commit] commiting ffff88043672d8a0 [ 3.901010] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043672d8a0 [ 3.901010] [drm:drm_atomic_state_free] Freeing atomic state ffff88043672d8a0 [ 3.901011] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043672d8a0 [ 3.901012] [drm:drm_atomic_get_plane_state] Added [PLANE:32] ffff88043c398480 state to ffff88043672d8a0 [ 3.901012] [drm:drm_atomic_check_only] checking ffff88043672d8a0 [ 3.901013] [drm:drm_atomic_commit] commiting ffff88043672d8a0 [ 3.901013] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043672d8a0 [ 3.901014] [drm:drm_atomic_state_free] Freeing atomic state ffff88043672d8a0 [ 3.901014] [drm:intel_crtc_set_config] [CRTC:20] [FB:79] #connectors=1 (x y) (0 0) [ 3.901015] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 3.901016] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 3.901017] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 3.901017] [drm:connected_sink_compute_bpp] [CONNECTOR:45:DP-2] checking for sink bpp constrains [ 3.901018] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 148500KHz [ 3.901019] [drm:intel_dp_compute_config] DP link bw 06 lane count 4 clock 162000 bpp 24 [ 3.901020] [drm:intel_dp_compute_config] DP link bw required 356400 available 518400 [ 3.901020] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 [ 3.901021] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 3.901021] [drm:intel_dump_pipe_config] cpu_transcoder: A [ 3.901022] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 [ 3.901022] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 3.901023] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64 [ 3.901024] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 3.901024] [drm:intel_dump_pipe_config] audio: 1, infoframes: 0 [ 3.901025] [drm:intel_dump_pipe_config] requested mode: [ 3.901025] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 3.901026] [drm:intel_dump_pipe_config] adjusted mode: [ 3.901026] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 3.901027] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5 [ 3.901027] [drm:intel_dump_pipe_config] port clock: 162000 [ 3.901028] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 [ 3.901028] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 3.901029] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 3.901029] [drm:intel_dump_pipe_config] ips: 0 [ 3.901029] [drm:intel_dump_pipe_config] double wide: 0 [ 3.901030] [drm:intel_crtc_set_config] [CRTC:25] [NOFB] [ 3.901031] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0 [ 3.901032] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 3.901033] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 [ 3.901033] [drm:intel_crtc_set_config] [CRTC:30] [NOFB] [ 3.901034] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=0, fb_changed=0 [ 3.901034] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 3.901035] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 [ 3.901040] [drm:i915_gem_open] [ 3.901708] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted) [ 3.901709] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted) [ 3.901728] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 3.901729] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 3.901732] [drm:drm_mode_getconnector] [CONNECTOR:34:?] [ 3.901732] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:DP-1] [ 3.901733] [drm:intel_dp_detect] [CONNECTOR:34:DP-1] [ 3.901733] [drm:intel_display_power_get] enabling DDI B power well [ 3.901738] [drm:skl_set_power_well] Enabling DDI B power well [ 3.901743] [drm:intel_display_power_put] disabling DDI B power well [ 3.901747] [drm:skl_set_power_well] Disabling DDI B power well [ 3.901747] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:DP-1] disconnected [ 3.901748] [drm:drm_mode_getconnector] [CONNECTOR:34:?] [ 3.901748] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:DP-1] [ 3.901748] [drm:intel_dp_detect] [CONNECTOR:34:DP-1] [ 3.901749] [drm:intel_display_power_get] enabling DDI B power well [ 3.901752] [drm:skl_set_power_well] Enabling DDI B power well [ 3.901757] [drm:intel_display_power_put] disabling DDI B power well [ 3.901759] [drm:skl_set_power_well] Disabling DDI B power well [ 3.901760] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:DP-1] disconnected [ 3.901761] [drm:drm_mode_getconnector] [CONNECTOR:40:?] [ 3.901761] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] [ 3.901761] [drm:intel_hdmi_detect] [CONNECTOR:40:HDMI-A-1] [ 3.901762] [drm:intel_display_power_get] enabling DDI B power well [ 3.901764] [drm:skl_set_power_well] Enabling DDI B power well [ 3.901891] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) [ 3.901891] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb [ 3.901892] [drm:intel_display_power_put] disabling DDI B power well [ 3.901896] [drm:skl_set_power_well] Disabling DDI B power well [ 3.901896] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] disconnected [ 3.901899] [drm:drm_mode_getconnector] [CONNECTOR:40:?] [ 3.901900] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] [ 3.901900] [drm:intel_hdmi_detect] [CONNECTOR:40:HDMI-A-1] [ 3.901901] [drm:intel_display_power_get] enabling DDI B power well [ 3.901905] [drm:skl_set_power_well] Enabling DDI B power well [ 3.902026] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) [ 3.902027] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb [ 3.902028] [drm:intel_display_power_put] disabling DDI B power well [ 3.902033] [drm:skl_set_power_well] Disabling DDI B power well [ 3.902033] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] disconnected [ 3.902038] [drm:drm_mode_getconnector] [CONNECTOR:43:?] [ 3.902038] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-2] [ 3.902039] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-2] [ 3.902040] [drm:intel_display_power_get] enabling DDI C power well [ 3.902044] [drm:skl_set_power_well] Enabling DDI C power well [ 3.902147] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) [ 3.902148] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc [ 3.902148] [drm:intel_display_power_put] disabling DDI C power well [ 3.902150] [drm:skl_set_power_well] Disabling DDI C power well [ 3.902151] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-2] disconnected [ 3.902152] [drm:drm_mode_getconnector] [CONNECTOR:43:?] [ 3.902153] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-2] [ 3.902153] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-2] [ 3.902153] [drm:intel_display_power_get] enabling DDI C power well [ 3.902155] [drm:skl_set_power_well] Enabling DDI C power well [ 3.902272] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) [ 3.902275] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc [ 3.902277] [drm:intel_display_power_put] disabling DDI C power well [ 3.902283] [drm:skl_set_power_well] Disabling DDI C power well [ 3.902285] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-2] disconnected [ 3.902293] [drm:drm_mode_getconnector] [CONNECTOR:45:?] [ 3.902295] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:45:DP-2] [ 3.902300] [drm:intel_dp_detect] [CONNECTOR:45:DP-2] [ 3.902472] [drm:intel_dp_get_dpcd] DPCD: 11 0a 84 00 01 00 00 00 00 00 00 00 00 00 00 [ 3.907679] Adding 1952764k swap on /dev/sda2. Priority:-1 extents:1 across:1952764k SS [ 3.916552] EXT4-fs (sda3): re-mounted. Opts: errors=remount-ro [ 3.920670] [drm:drm_detect_monitor_audio] Monitor has basic audio support [ 3.920712] [drm:drm_edid_to_eld] ELD monitor ASUS PA238 [ 3.920713] [drm:drm_edid_to_eld] ELD size 36, SAD count 1 [ 3.920728] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:45:DP-2] probed modes : [ 3.920729] [drm:drm_mode_debug_printmodeline] Modeline 52:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 3.920730] [drm:drm_mode_debug_printmodeline] Modeline 92:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 [ 3.920730] [drm:drm_mode_debug_printmodeline] Modeline 85:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 [ 3.920731] [drm:drm_mode_debug_printmodeline] Modeline 100:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 [ 3.920731] [drm:drm_mode_debug_printmodeline] Modeline 86:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5 [ 3.920732] [drm:drm_mode_debug_printmodeline] Modeline 84:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15 [ 3.920732] [drm:drm_mode_debug_printmodeline] Modeline 61:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9 [ 3.920733] [drm:drm_mode_debug_printmodeline] Modeline 70:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5 [ 3.920734] [drm:drm_mode_debug_printmodeline] Modeline 59:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 [ 3.920734] [drm:drm_mode_debug_printmodeline] Modeline 60:"1440x900" 75 136750 1440 1536 1688 1936 900 903 909 942 0x40 0x6 [ 3.920735] [drm:drm_mode_debug_printmodeline] Modeline 57:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9 [ 3.920735] [drm:drm_mode_debug_printmodeline] Modeline 58:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5 [ 3.920736] [drm:drm_mode_debug_printmodeline] Modeline 62:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5 [ 3.920736] [drm:drm_mode_debug_printmodeline] Modeline 54:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5 [ 3.920737] [drm:drm_mode_debug_printmodeline] Modeline 94:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5 [ 3.920737] [drm:drm_mode_debug_printmodeline] Modeline 55:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5 [ 3.920738] [drm:drm_mode_debug_printmodeline] Modeline 90:"1440x576" 50 54000 1440 1464 1592 1728 576 581 586 625 0x40 0xa [ 3.920738] [drm:drm_mode_debug_printmodeline] Modeline 71:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5 [ 3.920739] [drm:drm_mode_debug_printmodeline] Modeline 72:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa [ 3.920739] [drm:drm_mode_debug_printmodeline] Modeline 73:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa [ 3.920740] [drm:drm_mode_debug_printmodeline] Modeline 102:"1440x480" 60 54054 1440 1472 1596 1716 480 489 495 525 0x40 0xa [ 3.920740] [drm:drm_mode_debug_printmodeline] Modeline 88:"1440x480" 60 54000 1440 1472 1596 1716 480 489 495 525 0x40 0xa [ 3.920741] [drm:drm_mode_debug_printmodeline] Modeline 74:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa [ 3.920741] [drm:drm_mode_debug_printmodeline] Modeline 75:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5 [ 3.920742] [drm:drm_mode_debug_printmodeline] Modeline 76:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5 [ 3.920743] [drm:drm_mode_debug_printmodeline] Modeline 63:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 [ 3.920743] [drm:drm_mode_debug_printmodeline] Modeline 64:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5 [ 3.920744] [drm:drm_mode_debug_printmodeline] Modeline 56:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa [ 3.920744] [drm:drm_mode_debug_printmodeline] Modeline 93:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa [ 3.920745] [drm:drm_mode_debug_printmodeline] Modeline 53:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa [ 3.920745] [drm:drm_mode_debug_printmodeline] Modeline 65:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa [ 3.920746] [drm:drm_mode_debug_printmodeline] Modeline 66:"640x480" 73 31500 640 664 704 832 480 489 491 520 0x40 0xa [ 3.920746] [drm:drm_mode_debug_printmodeline] Modeline 67:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa [ 3.920747] [drm:drm_mode_debug_printmodeline] Modeline 68:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa [ 3.920747] [drm:drm_mode_debug_printmodeline] Modeline 77:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa [ 3.920748] [drm:drm_mode_debug_printmodeline] Modeline 69:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6 [ 3.920751] [drm:drm_mode_getconnector] [CONNECTOR:45:?] [ 3.923070] [drm:drm_mode_getconnector] [CONNECTOR:49:?] [ 3.923071] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:HDMI-A-3] [ 3.923071] [drm:intel_hdmi_detect] [CONNECTOR:49:HDMI-A-3] [ 3.923240] [drm:gmbus_xfer] GMBUS [i915 gmbus dpd] NAK for addr: 0050 r(1) [ 3.923242] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpd [ 3.923243] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:HDMI-A-3] disconnected [ 3.923247] [drm:drm_mode_getconnector] [CONNECTOR:49:?] [ 3.923248] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:HDMI-A-3] [ 3.923248] [drm:intel_hdmi_detect] [CONNECTOR:49:HDMI-A-3] [ 3.923369] [drm:gmbus_xfer] GMBUS [i915 gmbus dpd] NAK for addr: 0050 r(1) [ 3.923370] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpd [ 3.923371] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:HDMI-A-3] disconnected [ 3.923376] [drm:add_framebuffer_internal] [FB:78] [ 3.946737] EXT4-fs (sda4): warning: mounting unchecked fs, running e2fsck is recommended [ 3.946815] EXT4-fs (sda4): mounted filesystem without journal. Opts: (null) [ 3.976821] init: Failed to obtain startpar-bridge instance: Unknown parameter: INSTANCE [ 4.012525] init: failsafe main process (4037) killed by TERM signal [ 4.045992] init: bluetooth main process (4157) terminated with status 1 [ 4.045995] init: bluetooth main process ended, respawning [ 4.094802] init: bluetooth main process (4313) terminated with status 1 [ 4.094808] init: bluetooth main process ended, respawning [ 4.103887] [drm] RC6 on [ 4.105358] init: alsa-restore main process (4356) terminated with status 19 [ 4.109207] ------------[ cut here ]------------ [ 4.109213] WARNING: CPU: 0 PID: 4332 at drivers/gpu/drm/i915/i915_irq.c:1750 gen6_rps_irq_handler+0x38/0xfb [i915]() [ 4.109214] GEN9+: unexpected RPS IRQ [ 4.109214] Modules linked in: parport_pc parport ac dm_mod acpi_cpufreq i915 button video drm_kms_helper drm cfbfillrect cfbimgblt cfbcopyarea [ 4.109216] CPU: 0 PID: 4332 Comm: lsb_release Not tainted 3.19.0-rc7_drm-intel-nightly_b4442e_20150209+ #238 [ 4.109217] 0000000000000000 0000000000000009 ffffffff8179a69b ffff88044e403de8 [ 4.109217] ffffffff8103bdec ffff88043524e868 ffffffffa00b4976 0000000000000000 [ 4.109218] ffff880097ac0000 0000000000000001 0000000000000010 0000000000000010 [ 4.109218] Call Trace: [ 4.109219] [] ? dump_stack+0x40/0x50 [ 4.109221] [] ? warn_slowpath_common+0x98/0xb0 [ 4.109223] [] ? gen6_rps_irq_handler+0x38/0xfb [i915] [ 4.109224] [] ? warn_slowpath_fmt+0x45/0x4a [ 4.109227] [] ? gen9_write32+0x79/0x29a [i915] [ 4.109230] [] ? gen6_rps_irq_handler+0x38/0xfb [i915] [ 4.109232] [] ? gen8_gt_irq_handler.isra.15+0x192/0x21d [i915] [ 4.109234] [] ? gen8_irq_handler+0x81/0x334 [i915] [ 4.109238] [] ? handle_irq_event_percpu+0x4f/0x179 [ 4.109239] [] ? handle_irq_event+0x2e/0x4f [ 4.109239] [] ? handle_edge_irq+0xbc/0xd1 [ 4.109240] [] ? handle_irq+0x15/0x20 [ 4.109240] [] ? do_IRQ+0x41/0xc0 [ 4.109241] [] ? common_interrupt+0x6a/0x6a [ 4.109241] [ 4.109242] ---[ end trace 9d88ad47048c3274 ]--- [ 4.137867] init: bluetooth main process (4580) terminated with status 1 [ 4.137872] init: bluetooth main process ended, respawning [ 4.144321] asix 1-4:1.0 eth2: link up, 100Mbps, full-duplex, lpa 0xC5E1 [ 4.150238] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ceba0 [ 4.150240] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88043bc17480 state to ffff8804364ceba0 [ 4.150241] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88043ac92400 state to ffff8804364ceba0 [ 4.150242] [drm:drm_atomic_check_only] checking ffff8804364ceba0 [ 4.150243] [drm:drm_atomic_commit] commiting ffff8804364ceba0 [ 4.150256] [drm:skylake_update_primary_plane] Writing base 008C0000 0,0,1920,1080 pitch=7680 [ 4.150258] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ceba0 [ 4.150259] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ceba0 [ 4.150259] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ceba0 [ 4.150260] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff88043bc17300 state to ffff8804364ceba0 [ 4.150260] [drm:drm_atomic_check_only] checking ffff8804364ceba0 [ 4.150261] [drm:drm_atomic_commit] commiting ffff8804364ceba0 [ 4.150261] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ceba0 [ 4.150262] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ceba0 [ 4.150262] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ceba0 [ 4.150263] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff88043bc17240 state to ffff8804364ceba0 [ 4.150263] [drm:drm_atomic_check_only] checking ffff8804364ceba0 [ 4.150264] [drm:drm_atomic_commit] commiting ffff8804364ceba0 [ 4.150264] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ceba0 [ 4.150264] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ceba0 [ 4.150265] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ceba0 [ 4.150266] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88043bc17c00 state to ffff8804364ceba0 [ 4.150266] [drm:drm_atomic_check_only] checking ffff8804364ceba0 [ 4.150267] [drm:drm_atomic_commit] commiting ffff8804364ceba0 [ 4.150267] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ceba0 [ 4.150268] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ceba0 [ 4.150268] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ceba0 [ 4.150269] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88043bc17f00 state to ffff8804364ceba0 [ 4.150269] [drm:drm_atomic_check_only] checking ffff8804364ceba0 [ 4.150270] [drm:drm_atomic_commit] commiting ffff8804364ceba0 [ 4.150270] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ceba0 [ 4.150270] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ceba0 [ 4.150271] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ceba0 [ 4.150271] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88043bc17540 state to ffff8804364ceba0 [ 4.150272] [drm:drm_atomic_check_only] checking ffff8804364ceba0 [ 4.150272] [drm:drm_atomic_commit] commiting ffff8804364ceba0 [ 4.150273] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ceba0 [ 4.150273] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ceba0 [ 4.150274] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ceba0 [ 4.150274] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88043bc17e40 state to ffff8804364ceba0 [ 4.150275] [drm:drm_atomic_check_only] checking ffff8804364ceba0 [ 4.150275] [drm:drm_atomic_commit] commiting ffff8804364ceba0 [ 4.150276] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ceba0 [ 4.150276] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ceba0 [ 4.150277] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ceba0 [ 4.150278] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff88043bc17cc0 state to ffff8804364ceba0 [ 4.150278] [drm:drm_atomic_check_only] checking ffff8804364ceba0 [ 4.150278] [drm:drm_atomic_commit] commiting ffff8804364ceba0 [ 4.150279] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ceba0 [ 4.150279] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ceba0 [ 4.150280] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ceba0 [ 4.150281] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff8804364b4900 state to ffff8804364ceba0 [ 4.150281] [drm:drm_atomic_check_only] checking ffff8804364ceba0 [ 4.150281] [drm:drm_atomic_commit] commiting ffff8804364ceba0 [ 4.150282] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ceba0 [ 4.150282] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ceba0 [ 4.150283] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ceba0 [ 4.150283] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff8804364b4840 state to ffff8804364ceba0 [ 4.150284] [drm:drm_atomic_check_only] checking ffff8804364ceba0 [ 4.150284] [drm:drm_atomic_commit] commiting ffff8804364ceba0 [ 4.150285] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ceba0 [ 4.150285] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ceba0 [ 4.150286] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ceba0 [ 4.150286] [drm:drm_atomic_get_plane_state] Added [PLANE:31] ffff8804364b4b40 state to ffff8804364ceba0 [ 4.150287] [drm:drm_atomic_check_only] checking ffff8804364ceba0 [ 4.150287] [drm:drm_atomic_commit] commiting ffff8804364ceba0 [ 4.150288] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ceba0 [ 4.150288] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ceba0 [ 4.150289] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ceba0 [ 4.150289] [drm:drm_atomic_get_plane_state] Added [PLANE:32] ffff8804364b43c0 state to ffff8804364ceba0 [ 4.150290] [drm:drm_atomic_check_only] checking ffff8804364ceba0 [ 4.150290] [drm:drm_atomic_commit] commiting ffff8804364ceba0 [ 4.150291] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ceba0 [ 4.150291] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ceba0 [ 4.150292] [drm:intel_crtc_set_config] [CRTC:20] [FB:79] #connectors=1 (x y) (0 0) [ 4.150293] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 4.150294] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 4.150295] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 4.150296] [drm:connected_sink_compute_bpp] [CONNECTOR:45:DP-2] checking for sink bpp constrains [ 4.150297] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 148500KHz [ 4.150297] [drm:intel_dp_compute_config] DP link bw 06 lane count 4 clock 162000 bpp 24 [ 4.150298] [drm:intel_dp_compute_config] DP link bw required 356400 available 518400 [ 4.150299] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 [ 4.150299] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 4.150299] [drm:intel_dump_pipe_config] cpu_transcoder: A [ 4.150300] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 [ 4.150300] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 4.150301] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64 [ 4.150301] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 4.150302] [drm:intel_dump_pipe_config] audio: 1, infoframes: 0 [ 4.150302] [drm:intel_dump_pipe_config] requested mode: [ 4.150303] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 4.150304] [drm:intel_dump_pipe_config] adjusted mode: [ 4.150304] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 4.150305] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5 [ 4.150306] [drm:intel_dump_pipe_config] port clock: 162000 [ 4.150306] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 [ 4.150307] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 4.150307] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 4.150308] [drm:intel_dump_pipe_config] ips: 0 [ 4.150308] [drm:intel_dump_pipe_config] double wide: 0 [ 4.150309] [drm:intel_crtc_set_config] [CRTC:25] [NOFB] [ 4.150309] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0 [ 4.150310] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 4.150311] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 [ 4.150311] [drm:intel_crtc_set_config] [CRTC:30] [NOFB] [ 4.150312] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=0, fb_changed=0 [ 4.150312] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 4.150313] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 [ 4.150390] [drm:intel_crtc_set_config] [CRTC:20] [FB:79] #connectors=1 (x y) (0 0) [ 4.150391] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 4.150391] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 4.150392] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 4.150392] [drm:connected_sink_compute_bpp] [CONNECTOR:45:DP-2] checking for sink bpp constrains [ 4.150393] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 148500KHz [ 4.150393] [drm:intel_dp_compute_config] DP link bw 06 lane count 4 clock 162000 bpp 24 [ 4.150394] [drm:intel_dp_compute_config] DP link bw required 356400 available 518400 [ 4.150394] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 [ 4.150394] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 4.150395] [drm:intel_dump_pipe_config] cpu_transcoder: A [ 4.150395] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 [ 4.150395] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 4.150396] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64 [ 4.150396] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 4.150396] [drm:intel_dump_pipe_config] audio: 1, infoframes: 0 [ 4.150397] [drm:intel_dump_pipe_config] requested mode: [ 4.150397] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 4.150397] [drm:intel_dump_pipe_config] adjusted mode: [ 4.150398] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 4.150399] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5 [ 4.150399] [drm:intel_dump_pipe_config] port clock: 162000 [ 4.150399] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 [ 4.150400] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 4.150400] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 4.150400] [drm:intel_dump_pipe_config] ips: 0 [ 4.150400] [drm:intel_dump_pipe_config] double wide: 0 [ 4.152768] init: plymouth-upstart-bridge main process ended, respawning [ 4.157522] init: bluetooth main process (4673) terminated with status 1 [ 4.157529] init: bluetooth main process ended, respawning [ 4.166176] init: bluetooth main process (4726) terminated with status 1 [ 4.166184] init: bluetooth main process ended, respawning [ 4.171272] init: bluetooth main process (4750) terminated with status 1 [ 4.171276] init: bluetooth main process ended, respawning [ 4.176386] init: bluetooth main process (4774) terminated with status 1 [ 4.176402] init: bluetooth main process ended, respawning [ 4.182431] init: bluetooth main process (4814) terminated with status 1 [ 4.182435] init: bluetooth main process ended, respawning [ 4.182661] asix 1-4:1.0 eth2: link up, 100Mbps, full-duplex, lpa 0xC5E1 [ 4.187326] init: bluetooth main process (4844) terminated with status 1 [ 4.187331] init: bluetooth main process ended, respawning [ 4.191628] init: bluetooth main process (4868) terminated with status 1 [ 4.191632] init: bluetooth main process ended, respawning [ 4.195816] init: bluetooth main process (4893) terminated with status 1 [ 4.195821] init: bluetooth respawning too fast, stopped [ 5.613728] NET: Registered protocol family 10 [ 19.479016] [drm:i915_gem_open] [ 19.479306] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted) [ 19.479307] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted) [ 19.479393] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ce2a0 [ 19.479394] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880435a7e180 state to ffff8804364ce2a0 [ 19.479394] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88043ac92800 state to ffff8804364ce2a0 [ 19.479395] [drm:drm_atomic_check_only] checking ffff8804364ce2a0 [ 19.479395] [drm:drm_atomic_commit] commiting ffff8804364ce2a0 [ 19.479416] [drm:skylake_update_primary_plane] Writing base 008C0000 0,0,1920,1080 pitch=7680 [ 19.479420] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ce2a0 [ 19.479421] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ce2a0 [ 19.479421] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ce2a0 [ 19.479421] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff880435a7e6c0 state to ffff8804364ce2a0 [ 19.479422] [drm:drm_atomic_check_only] checking ffff8804364ce2a0 [ 19.479422] [drm:drm_atomic_commit] commiting ffff8804364ce2a0 [ 19.479423] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ce2a0 [ 19.479423] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ce2a0 [ 19.479423] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ce2a0 [ 19.479424] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff880435a7e000 state to ffff8804364ce2a0 [ 19.479424] [drm:drm_atomic_check_only] checking ffff8804364ce2a0 [ 19.479424] [drm:drm_atomic_commit] commiting ffff8804364ce2a0 [ 19.479425] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ce2a0 [ 19.479425] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ce2a0 [ 19.479425] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ce2a0 [ 19.479426] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880435a7ee40 state to ffff8804364ce2a0 [ 19.479426] [drm:drm_atomic_check_only] checking ffff8804364ce2a0 [ 19.479426] [drm:drm_atomic_commit] commiting ffff8804364ce2a0 [ 19.479427] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ce2a0 [ 19.479427] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ce2a0 [ 19.479428] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ce2a0 [ 19.479428] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff880435a7ed80 state to ffff8804364ce2a0 [ 19.479428] [drm:drm_atomic_check_only] checking ffff8804364ce2a0 [ 19.479429] [drm:drm_atomic_commit] commiting ffff8804364ce2a0 [ 19.479429] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ce2a0 [ 19.479429] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ce2a0 [ 19.479430] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ce2a0 [ 19.479430] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff880435a7eb40 state to ffff8804364ce2a0 [ 19.479430] [drm:drm_atomic_check_only] checking ffff8804364ce2a0 [ 19.479431] [drm:drm_atomic_commit] commiting ffff8804364ce2a0 [ 19.479431] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ce2a0 [ 19.479431] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ce2a0 [ 19.479432] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ce2a0 [ 19.479432] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff880435a7ecc0 state to ffff8804364ce2a0 [ 19.479432] [drm:drm_atomic_check_only] checking ffff8804364ce2a0 [ 19.479433] [drm:drm_atomic_commit] commiting ffff8804364ce2a0 [ 19.479433] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ce2a0 [ 19.479433] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ce2a0 [ 19.479434] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ce2a0 [ 19.479434] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff880435a7ea80 state to ffff8804364ce2a0 [ 19.479434] [drm:drm_atomic_check_only] checking ffff8804364ce2a0 [ 19.479435] [drm:drm_atomic_commit] commiting ffff8804364ce2a0 [ 19.479435] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ce2a0 [ 19.479435] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ce2a0 [ 19.479436] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ce2a0 [ 19.479436] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff880435a7e9c0 state to ffff8804364ce2a0 [ 19.479437] [drm:drm_atomic_check_only] checking ffff8804364ce2a0 [ 19.479437] [drm:drm_atomic_commit] commiting ffff8804364ce2a0 [ 19.479437] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ce2a0 [ 19.479438] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ce2a0 [ 19.479438] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ce2a0 [ 19.479438] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff880435a7ef00 state to ffff8804364ce2a0 [ 19.479439] [drm:drm_atomic_check_only] checking ffff8804364ce2a0 [ 19.479439] [drm:drm_atomic_commit] commiting ffff8804364ce2a0 [ 19.479439] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ce2a0 [ 19.479440] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ce2a0 [ 19.479440] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ce2a0 [ 19.479440] [drm:drm_atomic_get_plane_state] Added [PLANE:31] ffff880435a7e480 state to ffff8804364ce2a0 [ 19.479441] [drm:drm_atomic_check_only] checking ffff8804364ce2a0 [ 19.479441] [drm:drm_atomic_commit] commiting ffff8804364ce2a0 [ 19.479441] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ce2a0 [ 19.479442] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ce2a0 [ 19.479442] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ce2a0 [ 19.479443] [drm:drm_atomic_get_plane_state] Added [PLANE:32] ffff880435a7e300 state to ffff8804364ce2a0 [ 19.479443] [drm:drm_atomic_check_only] checking ffff8804364ce2a0 [ 19.479443] [drm:drm_atomic_commit] commiting ffff8804364ce2a0 [ 19.479443] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ce2a0 [ 19.479444] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ce2a0 [ 19.479444] [drm:intel_crtc_set_config] [CRTC:20] [FB:79] #connectors=1 (x y) (0 0) [ 19.479445] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 19.479446] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 19.479447] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 19.479447] [drm:connected_sink_compute_bpp] [CONNECTOR:45:DP-2] checking for sink bpp constrains [ 19.479448] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 148500KHz [ 19.479449] [drm:intel_dp_compute_config] DP link bw 06 lane count 4 clock 162000 bpp 24 [ 19.479449] [drm:intel_dp_compute_config] DP link bw required 356400 available 518400 [ 19.479449] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 [ 19.479450] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 19.479450] [drm:intel_dump_pipe_config] cpu_transcoder: A [ 19.479450] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 [ 19.479451] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 19.479451] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64 [ 19.479452] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 19.479452] [drm:intel_dump_pipe_config] audio: 1, infoframes: 0 [ 19.479452] [drm:intel_dump_pipe_config] requested mode: [ 19.479453] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 19.479453] [drm:intel_dump_pipe_config] adjusted mode: [ 19.479454] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 19.479455] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5 [ 19.479455] [drm:intel_dump_pipe_config] port clock: 162000 [ 19.479455] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 [ 19.479456] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 19.479456] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 19.479456] [drm:intel_dump_pipe_config] ips: 0 [ 19.479457] [drm:intel_dump_pipe_config] double wide: 0 [ 19.479457] [drm:intel_crtc_set_config] [CRTC:25] [NOFB] [ 19.479457] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0 [ 19.479458] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 19.479458] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 [ 19.479459] [drm:intel_crtc_set_config] [CRTC:30] [NOFB] [ 19.479459] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=0, fb_changed=0 [ 19.479459] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 19.479460] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 [ 19.486911] [drm:intel_crtc_set_config] [CRTC:20] [FB:79] #connectors=1 (x y) (0 0) [ 19.486911] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 19.486912] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 19.486912] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 19.486913] [drm:connected_sink_compute_bpp] [CONNECTOR:45:DP-2] checking for sink bpp constrains [ 19.486913] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 148500KHz [ 19.486914] [drm:intel_dp_compute_config] DP link bw 06 lane count 4 clock 162000 bpp 24 [ 19.486914] [drm:intel_dp_compute_config] DP link bw required 356400 available 518400 [ 19.486915] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 [ 19.486915] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 19.486915] [drm:intel_dump_pipe_config] cpu_transcoder: A [ 19.486915] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 [ 19.486916] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 19.486916] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64 [ 19.486916] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 19.486916] [drm:intel_dump_pipe_config] audio: 1, infoframes: 0 [ 19.486917] [drm:intel_dump_pipe_config] requested mode: [ 19.486917] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 19.486917] [drm:intel_dump_pipe_config] adjusted mode: [ 19.486918] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 19.486918] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5 [ 19.486918] [drm:intel_dump_pipe_config] port clock: 162000 [ 19.486918] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 [ 19.486919] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 19.486919] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 19.486919] [drm:intel_dump_pipe_config] ips: 0 [ 19.486919] [drm:intel_dump_pipe_config] double wide: 0 [ 19.488270] [drm:i915_gem_open] [ 19.488674] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted) [ 19.488675] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted) [ 19.488677] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 19.489256] [drm:i915_gem_open] [ 19.489552] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted) [ 19.489553] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted) [ 19.489555] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 19.489556] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 19.489836] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 19.489839] [drm:add_framebuffer_internal] [FB:78] [ 19.489868] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 19.489869] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 19.489898] [drm:drm_mode_getconnector] [CONNECTOR:34:?] [ 19.489906] [drm:drm_mode_getconnector] [CONNECTOR:34:?] [ 19.489916] [drm:drm_mode_getconnector] [CONNECTOR:40:?] [ 19.489917] [drm:drm_mode_getconnector] [CONNECTOR:40:?] [ 19.489925] [drm:drm_mode_getconnector] [CONNECTOR:43:?] [ 19.489925] [drm:drm_mode_getconnector] [CONNECTOR:43:?] [ 19.489933] [drm:drm_mode_getconnector] [CONNECTOR:45:?] [ 19.489935] [drm:drm_mode_getconnector] [CONNECTOR:45:?] [ 19.489941] [drm:drm_mode_getconnector] [CONNECTOR:49:?] [ 19.489942] [drm:drm_mode_getconnector] [CONNECTOR:49:?] [ 19.504470] [drm:add_framebuffer_internal] [FB:78] [ 19.547402] [drm:drm_mode_setcrtc] [CRTC:20] [ 19.547404] [drm:drm_mode_setcrtc] [CONNECTOR:45:DP-2] [ 19.547405] [drm:intel_crtc_set_config] [CRTC:20] [FB:78] #connectors=1 (x y) (0 0) [ 19.547406] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1 [ 19.547409] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 19.547410] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 19.547411] [drm:connected_sink_compute_bpp] [CONNECTOR:45:DP-2] checking for sink bpp constrains [ 19.547411] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 148500KHz [ 19.547413] [drm:intel_dp_compute_config] DP link bw 06 lane count 4 clock 162000 bpp 24 [ 19.547413] [drm:intel_dp_compute_config] DP link bw required 356400 available 518400 [ 19.547414] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 [ 19.547414] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 19.547415] [drm:intel_dump_pipe_config] cpu_transcoder: A [ 19.547415] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 [ 19.547416] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 19.547416] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64 [ 19.547417] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 19.547417] [drm:intel_dump_pipe_config] audio: 1, infoframes: 0 [ 19.547417] [drm:intel_dump_pipe_config] requested mode: [ 19.547418] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0x5 [ 19.547418] [drm:intel_dump_pipe_config] adjusted mode: [ 19.547419] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0x5 [ 19.547419] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x0 flags: 0x5 [ 19.547420] [drm:intel_dump_pipe_config] port clock: 162000 [ 19.547420] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 [ 19.547420] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 19.547421] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 19.547421] [drm:intel_dump_pipe_config] ips: 0 [ 19.547421] [drm:intel_dump_pipe_config] double wide: 0 [ 19.547422] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88043659a420 [ 19.547423] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880439c0a000 state to ffff88043659a420 [ 19.547423] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8804371c7000 state to ffff88043659a420 [ 19.547424] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880439c0a000 to [CRTC:20] [ 19.547424] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff880439c0a000 [ 19.547424] [drm:drm_atomic_check_only] checking ffff88043659a420 [ 19.547425] [drm:drm_atomic_commit] commiting ffff88043659a420 [ 19.548129] [drm:skylake_update_primary_plane] Writing base 00000000 0,0,1920,1080 pitch=7680 [ 19.548130] [drm:drm_atomic_state_clear] Clearing atomic state ffff88043659a420 [ 19.548130] [drm:drm_atomic_state_free] Freeing atomic state ffff88043659a420 [ 20.677270] [drm:drm_mode_getconnector] [CONNECTOR:34:?] [ 20.677271] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:DP-1] [ 20.677272] [drm:intel_dp_detect] [CONNECTOR:34:DP-1] [ 20.677272] [drm:intel_display_power_get] enabling DDI B power well [ 20.677273] [drm:skl_set_power_well] Enabling DDI B power well [ 20.677278] [drm:intel_display_power_put] disabling DDI B power well [ 20.677278] [drm:skl_set_power_well] Disabling DDI B power well [ 20.677279] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:DP-1] disconnected [ 20.677281] [drm:drm_mode_getconnector] [CONNECTOR:45:?] [ 20.677281] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:45:DP-2] [ 20.677282] [drm:intel_dp_detect] [CONNECTOR:45:DP-2] [ 20.677459] [drm:intel_dp_get_dpcd] DPCD: 11 0a 84 00 01 00 00 00 00 00 00 00 00 00 00 [ 20.696450] [drm:drm_detect_monitor_audio] Monitor has basic audio support [ 20.696500] [drm:drm_edid_to_eld] ELD monitor ASUS PA238 [ 20.696500] [drm:drm_edid_to_eld] ELD size 36, SAD count 1 [ 20.696509] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:45:DP-2] probed modes : [ 20.696510] [drm:drm_mode_debug_printmodeline] Modeline 52:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 20.696511] [drm:drm_mode_debug_printmodeline] Modeline 92:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 [ 20.696511] [drm:drm_mode_debug_printmodeline] Modeline 85:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 [ 20.696512] [drm:drm_mode_debug_printmodeline] Modeline 100:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 [ 20.696512] [drm:drm_mode_debug_printmodeline] Modeline 86:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5 [ 20.696513] [drm:drm_mode_debug_printmodeline] Modeline 84:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15 [ 20.696514] [drm:drm_mode_debug_printmodeline] Modeline 61:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9 [ 20.696514] [drm:drm_mode_debug_printmodeline] Modeline 70:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5 [ 20.696515] [drm:drm_mode_debug_printmodeline] Modeline 59:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 [ 20.696515] [drm:drm_mode_debug_printmodeline] Modeline 60:"1440x900" 75 136750 1440 1536 1688 1936 900 903 909 942 0x40 0x6 [ 20.696516] [drm:drm_mode_debug_printmodeline] Modeline 57:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9 [ 20.696516] [drm:drm_mode_debug_printmodeline] Modeline 58:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5 [ 20.696517] [drm:drm_mode_debug_printmodeline] Modeline 62:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5 [ 20.696517] [drm:drm_mode_debug_printmodeline] Modeline 54:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5 [ 20.696518] [drm:drm_mode_debug_printmodeline] Modeline 94:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5 [ 20.696518] [drm:drm_mode_debug_printmodeline] Modeline 55:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5 [ 20.696519] [drm:drm_mode_debug_printmodeline] Modeline 90:"1440x576" 50 54000 1440 1464 1592 1728 576 581 586 625 0x40 0xa [ 20.696519] [drm:drm_mode_debug_printmodeline] Modeline 71:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5 [ 20.696520] [drm:drm_mode_debug_printmodeline] Modeline 72:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa [ 20.696521] [drm:drm_mode_debug_printmodeline] Modeline 73:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa [ 20.696521] [drm:drm_mode_debug_printmodeline] Modeline 102:"1440x480" 60 54054 1440 1472 1596 1716 480 489 495 525 0x40 0xa [ 20.696522] [drm:drm_mode_debug_printmodeline] Modeline 88:"1440x480" 60 54000 1440 1472 1596 1716 480 489 495 525 0x40 0xa [ 20.696522] [drm:drm_mode_debug_printmodeline] Modeline 74:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa [ 20.696523] [drm:drm_mode_debug_printmodeline] Modeline 75:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5 [ 20.696523] [drm:drm_mode_debug_printmodeline] Modeline 76:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5 [ 20.696524] [drm:drm_mode_debug_printmodeline] Modeline 63:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 [ 20.696524] [drm:drm_mode_debug_printmodeline] Modeline 64:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5 [ 20.696525] [drm:drm_mode_debug_printmodeline] Modeline 56:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa [ 20.696525] [drm:drm_mode_debug_printmodeline] Modeline 93:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa [ 20.696526] [drm:drm_mode_debug_printmodeline] Modeline 53:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa [ 20.696527] [drm:drm_mode_debug_printmodeline] Modeline 65:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa [ 20.696527] [drm:drm_mode_debug_printmodeline] Modeline 66:"640x480" 73 31500 640 664 704 832 480 489 491 520 0x40 0xa [ 20.696528] [drm:drm_mode_debug_printmodeline] Modeline 67:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa [ 20.696528] [drm:drm_mode_debug_printmodeline] Modeline 68:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa [ 20.696529] [drm:drm_mode_debug_printmodeline] Modeline 77:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa [ 20.696529] [drm:drm_mode_debug_printmodeline] Modeline 69:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6 [ 20.696535] [drm:drm_mode_getconnector] [CONNECTOR:45:?] [ 20.696548] [drm:drm_mode_getconnector] [CONNECTOR:40:?] [ 20.696548] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] [ 20.696549] [drm:intel_hdmi_detect] [CONNECTOR:40:HDMI-A-1] [ 20.696549] [drm:intel_display_power_get] enabling DDI B power well [ 20.696549] [drm:skl_set_power_well] Enabling DDI B power well [ 20.696632] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) [ 20.696632] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb [ 20.696633] [drm:intel_display_power_put] disabling DDI B power well [ 20.696633] [drm:skl_set_power_well] Disabling DDI B power well [ 20.696633] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] disconnected [ 20.696634] [drm:drm_mode_getconnector] [CONNECTOR:43:?] [ 20.696635] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-2] [ 20.696635] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-2] [ 20.696635] [drm:intel_display_power_get] enabling DDI C power well [ 20.696636] [drm:skl_set_power_well] Enabling DDI C power well [ 20.696717] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) [ 20.696717] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc [ 20.696717] [drm:intel_display_power_put] disabling DDI C power well [ 20.696718] [drm:skl_set_power_well] Disabling DDI C power well [ 20.696718] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-2] disconnected [ 20.696719] [drm:drm_mode_getconnector] [CONNECTOR:49:?] [ 20.696719] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:HDMI-A-3] [ 20.696720] [drm:intel_hdmi_detect] [CONNECTOR:49:HDMI-A-3] [ 20.696801] [drm:gmbus_xfer] GMBUS [i915 gmbus dpd] NAK for addr: 0050 r(1) [ 20.696801] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpd [ 20.696802] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:HDMI-A-3] disconnected [ 29.238361] [drm:drm_mode_getconnector] [CONNECTOR:34:?] [ 29.238363] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:DP-1] [ 29.238363] [drm:intel_dp_detect] [CONNECTOR:34:DP-1] [ 29.238364] [drm:intel_display_power_get] enabling DDI B power well [ 29.238365] [drm:skl_set_power_well] Enabling DDI B power well [ 29.238370] [drm:intel_display_power_put] disabling DDI B power well [ 29.238370] [drm:skl_set_power_well] Disabling DDI B power well [ 29.238371] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:DP-1] disconnected [ 29.238374] [drm:drm_mode_getconnector] [CONNECTOR:45:?] [ 29.238374] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:45:DP-2] [ 29.238375] [drm:intel_dp_detect] [CONNECTOR:45:DP-2] [ 29.238525] [drm:intel_dp_get_dpcd] DPCD: 11 0a 84 00 01 00 00 00 00 00 00 00 00 00 00 [ 29.240773] [drm:drm_dp_i2c_do_msg] native defer [ 29.254046] [drm:drm_dp_i2c_do_msg] native defer<7>[ 29.257044] [drm:drm_detect_monitor_audio] Monitor has basic audio support [ 29.257082] [drm:drm_edid_to_eld] ELD monitor ASUS PA238 [ 29.257082] [drm:drm_edid_to_eld] ELD size 36, SAD count 1 [ 29.257091] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:45:DP-2] probed modes : [ 29.257092] [drm:drm_mode_debug_printmodeline] Modeline 52:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 29.257093] [drm:drm_mode_debug_printmodeline] Modeline 92:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 [ 29.257093] [drm:drm_mode_debug_printmodeline] Modeline 85:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 [ 29.257094] [drm:drm_mode_debug_printmodeline] Modeline 100:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 [ 29.257094] [drm:drm_mode_debug_printmodeline] Modeline 86:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5 [ 29.257095] [drm:drm_mode_debug_printmodeline] Modeline 84:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15 [ 29.257096] [drm:drm_mode_debug_printmodeline] Modeline 61:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9 [ 29.257096] [drm:drm_mode_debug_printmodeline] Modeline 70:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5 [ 29.257097] [drm:drm_mode_debug_printmodeline] Modeline 59:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 [ 29.257097] [drm:drm_mode_debug_printmodeline] Modeline 60:"1440x900" 75 136750 1440 1536 1688 1936 900 903 909 942 0x40 0x6 [ 29.257098] [drm:drm_mode_debug_printmodeline] Modeline 57:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9 [ 29.257098] [drm:drm_mode_debug_printmodeline] Modeline 58:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5 [ 29.257099] [drm:drm_mode_debug_printmodeline] Modeline 62:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5 [ 29.257099] [drm:drm_mode_debug_printmodeline] Modeline 54:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5 [ 29.257100] [drm:drm_mode_debug_printmodeline] Modeline 94:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5 [ 29.257100] [drm:drm_mode_debug_printmodeline] Modeline 55:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5 [ 29.257101] [drm:drm_mode_debug_printmodeline] Modeline 90:"1440x576" 50 54000 1440 1464 1592 1728 576 581 586 625 0x40 0xa [ 29.257101] [drm:drm_mode_debug_printmodeline] Modeline 71:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5 [ 29.257102] [drm:drm_mode_debug_printmodeline] Modeline 72:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa [ 29.257102] [drm:drm_mode_debug_printmodeline] Modeline 73:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa [ 29.257103] [drm:drm_mode_debug_printmodeline] Modeline 102:"1440x480" 60 54054 1440 1472 1596 1716 480 489 495 525 0x40 0xa [ 29.257104] [drm:drm_mode_debug_printmodeline] Modeline 88:"1440x480" 60 54000 1440 1472 1596 1716 480 489 495 525 0x40 0xa [ 29.257104] [drm:drm_mode_debug_printmodeline] Modeline 74:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa [ 29.257105] [drm:drm_mode_debug_printmodeline] Modeline 75:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5 [ 29.257105] [drm:drm_mode_debug_printmodeline] Modeline 76:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5 [ 29.257106] [drm:drm_mode_debug_printmodeline] Modeline 63:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 [ 29.257106] [drm:drm_mode_debug_printmodeline] Modeline 64:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5 [ 29.257107] [drm:drm_mode_debug_printmodeline] Modeline 56:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa [ 29.257107] [drm:drm_mode_debug_printmodeline] Modeline 93:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa [ 29.257108] [drm:drm_mode_debug_printmodeline] Modeline 53:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa [ 29.257109] [drm:drm_mode_debug_printmodeline] Modeline 65:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa [ 29.257109] [drm:drm_mode_debug_printmodeline] Modeline 66:"640x480" 73 31500 640 664 704 832 480 489 491 520 0x40 0xa [ 29.257110] [drm:drm_mode_debug_printmodeline] Modeline 67:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa [ 29.257110] [drm:drm_mode_debug_printmodeline] Modeline 68:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa [ 29.257111] [drm:drm_mode_debug_printmodeline] Modeline 77:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa [ 29.257111] [drm:drm_mode_debug_printmodeline] Modeline 69:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6 [ 29.257115] [drm:drm_mode_getconnector] [CONNECTOR:45:?] [ 29.257125] [drm:drm_mode_getconnector] [CONNECTOR:40:?] [ 29.257126] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] [ 29.257126] [drm:intel_hdmi_detect] [CONNECTOR:40:HDMI-A-1] [ 29.257127] [drm:intel_display_power_get] enabling DDI B power well [ 29.257127] [drm:skl_set_power_well] Enabling DDI B power well [ 29.257216] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) [ 29.257216] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb [ 29.257217] [drm:intel_display_power_put] disabling DDI B power well [ 29.257217] [drm:skl_set_power_well] Disabling DDI B power well [ 29.257217] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] disconnected [ 29.257218] [drm:drm_mode_getconnector] [CONNECTOR:43:?] [ 29.257219] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-2] [ 29.257219] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-2] [ 29.257219] [drm:intel_display_power_get] enabling DDI C power well [ 29.257220] [drm:skl_set_power_well] Enabling DDI C power well [ 29.257313] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) [ 29.257314] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc [ 29.257314] [drm:intel_display_power_put] disabling DDI C power well [ 29.257319] [drm:skl_set_power_well] Disabling DDI C power well [ 29.257319] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-2] disconnected [ 29.257320] [drm:drm_mode_getconnector] [CONNECTOR:49:?] [ 29.257320] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:HDMI-A-3] [ 29.257320] [drm:intel_hdmi_detect] [CONNECTOR:49:HDMI-A-3] [ 29.257421] [drm:gmbus_xfer] GMBUS [i915 gmbus dpd] NAK for addr: 0050 r(1) [ 29.257422] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpd [ 29.257422] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:HDMI-A-3] disconnected [ 29.257850] [drm:drm_mode_setcrtc] [CRTC:20] [ 29.257851] [drm:intel_crtc_set_config] [CRTC:20] [NOFB] [ 29.257851] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0 [ 29.257852] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [NOCRTC] [ 29.257852] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch [ 29.257853] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch [ 29.257853] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch [ 29.257853] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1 [ 29.257855] [drm:hsw_audio_codec_disable] Disable audio codec on pipe A [ 29.258432] [drm:intel_fbc_update] no output, disabling [ 29.258433] [drm:intel_disable_shared_dpll] disable DPLL 1 (active 1, on? 1) for crtc 20 [ 29.258434] [drm:intel_disable_shared_dpll] disabling DPLL 1 [ 29.258437] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ce180 [ 29.258437] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff8804368f2000 state to ffff8804364ce180 [ 29.258438] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88043ac90800 state to ffff8804364ce180 [ 29.258438] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804368f2000 to [NOCRTC] [ 29.258439] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8804368f2000 [ 29.258439] [drm:drm_atomic_check_only] checking ffff8804364ce180 [ 29.258440] [drm:drm_atomic_commit] commiting ffff8804364ce180 [ 29.258441] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ce180 [ 29.258441] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ce180 [ 29.258442] [drm:intel_display_power_put] disabling DDI D power well [ 29.258443] [drm:skl_set_power_well] Disabling DDI D power well [ 29.258443] [drm:intel_display_power_put] disabling power well 2 [ 29.258443] [drm:skl_set_power_well] Disabling power well 2 [ 29.258444] [drm:intel_display_power_put] disabling MISC IO power well [ 29.258444] [drm:skl_set_power_well] Disabling MISC IO power well [ 29.258444] [drm:intel_display_power_put] disabling power well 1 [ 29.258445] [drm:skl_set_power_well] Disabling power well 1 [ 29.258448] [drm:check_encoder_state] [ENCODER:33:TMDS-33] [ 29.258449] [drm:check_encoder_state] [ENCODER:35:DP MST-35] [ 29.258449] [drm:check_encoder_state] [ENCODER:36:DP MST-36] [ 29.258449] [drm:check_encoder_state] [ENCODER:37:DP MST-37] [ 29.258449] [drm:check_encoder_state] [ENCODER:42:TMDS-42] [ 29.258450] [drm:check_encoder_state] [ENCODER:44:TMDS-44] [ 29.258450] [drm:check_encoder_state] [ENCODER:46:DP MST-46] [ 29.258450] [drm:check_encoder_state] [ENCODER:47:DP MST-47] [ 29.258451] [drm:check_encoder_state] [ENCODER:48:DP MST-48] [ 29.258451] [drm:check_crtc_state] [CRTC:20] [ 29.258451] [drm:check_crtc_state] [CRTC:25] [ 29.258452] [drm:check_crtc_state] [CRTC:30] [ 29.258452] [drm:check_shared_dpll_state] DPLL 1 [ 29.258452] [drm:check_shared_dpll_state] DPLL 2 [ 29.258453] [drm:check_shared_dpll_state] DPLL 3 [ 29.259009] [drm:add_framebuffer_internal] [FB:80] [ 29.259139] [drm:drm_mode_setcrtc] [CRTC:20] [ 29.259140] [drm:drm_mode_setcrtc] [CONNECTOR:45:DP-2] [ 29.259141] [drm:intel_crtc_set_config] [CRTC:20] [FB:78] #connectors=1 (x y) (0 0) [ 29.259141] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set [ 29.259142] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0 [ 29.259142] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch [ 29.259143] [drm:intel_modeset_stage_output_state] [CONNECTOR:45:DP-2] to [CRTC:20] [ 29.259143] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch [ 29.259143] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch [ 29.259144] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 29.259144] [drm:connected_sink_compute_bpp] [CONNECTOR:45:DP-2] checking for sink bpp constrains [ 29.259145] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 148500KHz [ 29.259146] [drm:intel_dp_compute_config] DP link bw 06 lane count 4 clock 162000 bpp 24 [ 29.259146] [drm:intel_dp_compute_config] DP link bw required 356400 available 518400 [ 29.259147] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 [ 29.259147] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 29.259148] [drm:intel_dump_pipe_config] cpu_transcoder: A [ 29.259148] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 [ 29.259148] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 29.259149] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64 [ 29.259149] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 29.259150] [drm:intel_dump_pipe_config] audio: 1, infoframes: 0 [ 29.259150] [drm:intel_dump_pipe_config] requested mode: [ 29.259151] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0x5 [ 29.259151] [drm:intel_dump_pipe_config] adjusted mode: [ 29.259152] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0x5 [ 29.259152] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x0 flags: 0x5 [ 29.259152] [drm:intel_dump_pipe_config] port clock: 162000 [ 29.259153] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 [ 29.259153] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 29.259154] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 29.259154] [drm:intel_dump_pipe_config] ips: 0 [ 29.259154] [drm:intel_dump_pipe_config] double wide: 0 [ 29.259155] [drm:intel_get_shared_dpll] CRTC:20 allocated DPLL 1 [ 29.259155] [drm:intel_get_shared_dpll] using DPLL 1 for pipe A [ 29.259156] [drm:intel_display_power_get] enabling power well 1 [ 29.259157] [drm:skl_set_power_well] Enabling power well 1 [ 29.259158] [drm:intel_display_power_get] enabling MISC IO power well [ 29.259158] [drm:skl_set_power_well] Enabling MISC IO power well [ 29.259158] [drm:intel_display_power_get] enabling power well 2 [ 29.259159] [drm:skl_set_power_well] Enabling power well 2 [ 29.259159] [drm:intel_display_power_get] enabling DDI D power well [ 29.259160] [drm:skl_set_power_well] Enabling DDI D power well [ 29.259160] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8804364ce120 [ 29.259161] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff8804368f29c0 state to ffff8804364ce120 [ 29.259161] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88043ac93400 state to ffff8804364ce120 [ 29.259162] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8804368f29c0 to [CRTC:20] [ 29.259162] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8804368f29c0 [ 29.259162] [drm:drm_atomic_check_only] checking ffff8804364ce120 [ 29.259163] [drm:drm_atomic_commit] commiting ffff8804364ce120 [ 29.261879] [drm:drm_atomic_state_clear] Clearing atomic state ffff8804364ce120 [ 29.261879] [drm:drm_atomic_state_free] Freeing atomic state ffff8804364ce120 [ 29.261880] [drm:intel_enable_shared_dpll] enable DPLL 1 (active 0, on? 0) for crtc 20 [ 29.261880] [drm:intel_enable_shared_dpll] enabling DPLL 1 [ 29.263520] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 [ 29.263877] [drm:intel_dp_set_signal_levels] Using signal levels 03000000 [ 29.264196] [drm:intel_dp_start_link_train] clock recovery OK [ 29.264841] [drm:intel_dp_set_signal_levels] Using signal levels 02000000 [ 29.265462] [drm:intel_dp_set_signal_levels] Using signal levels 01000000 [ 29.266095] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 [ 29.266727] [drm:intel_dp_set_signal_levels] Using signal levels 01000000 [ 29.268853] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful [ 29.268962] [drm:skl_wm_flush_pipe] flush pipe A (pass 3) [ 29.268968] [drm:intel_audio_codec_enable] ELD on [CONNECTOR:45:DP-2], [ENCODER:44:TMDS-44] [ 29.268969] [drm:hsw_audio_codec_enable] Enable audio codec on pipe A, 36 bytes ELD [ 29.268972] [drm:skylake_update_primary_plane] Writing base 00000000 0,0,1920,1080 pitch=7680 [ 29.268973] [drm:intel_fbc_update] disabled per chip default [ 29.268980] [drm:intel_connector_check_state] [CONNECTOR:45:DP-2] [ 29.268981] [drm:check_encoder_state] [ENCODER:33:TMDS-33] [ 29.268981] [drm:check_encoder_state] [ENCODER:35:DP MST-35] [ 29.268982] [drm:check_encoder_state] [ENCODER:36:DP MST-36] [ 29.268982] [drm:check_encoder_state] [ENCODER:37:DP MST-37] [ 29.268982] [drm:check_encoder_state] [ENCODER:42:TMDS-42] [ 29.268982] [drm:check_encoder_state] [ENCODER:44:TMDS-44] [ 29.268983] [drm:check_encoder_state] [ENCODER:46:DP MST-46] [ 29.268983] [drm:check_encoder_state] [ENCODER:47:DP MST-47] [ 29.268983] [drm:check_encoder_state] [ENCODER:48:DP MST-48] [ 29.268984] [drm:check_crtc_state] [CRTC:20] [ 29.268986] [drm:check_crtc_state] [CRTC:25] [ 29.268986] [drm:check_crtc_state] [CRTC:30] [ 29.268987] [drm:check_shared_dpll_state] DPLL 1 [ 29.268987] [drm:check_shared_dpll_state] DPLL 2 [ 29.268988] [drm:check_shared_dpll_state] DPLL 3