[ 2.382355] [drm:i915_gem_gtt_init] GMADR size = 256M [ 2.382359] [drm:i915_gem_gtt_init] GTT stolen size = 32M [ 2.382363] [drm:i915_gem_gtt_init] ppgtt mode: 2 [ 2.382367] [drm] Replacing VGA console driver [ 2.385223] [drm:intel_opregion_setup] graphic opregion physical addr: 0x9df8b018 [ 2.385244] [drm:intel_opregion_setup] Public ACPI methods supported [ 2.385247] [drm:intel_opregion_setup] SWSCI supported [ 2.390959] [drm:swsci_setup] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00300483 [ 2.390966] [drm:intel_opregion_setup] ASLE supported [ 2.391159] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 2.391169] [drm] Driver supports precise vblank timestamp query. [ 2.391178] [drm:init_vbt_defaults] Set default to SSC at 120000 kHz [ 2.391185] [drm:validate_vbt] Using VBT from OpRegion: $VBT SKYLAKE d [ 2.391192] [drm:parse_general_features] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 0 lvds_use_ssc 0 lvds_ssc_freq 120000 display_clock_mode 0 fdi_rx_polarity_inverted 0 [ 2.391196] [drm:parse_general_definitions] crt_ddc_bus_pin: 2 [ 2.391200] [drm:parse_lfp_panel_data] DRRS supported mode is static [ 2.391205] [drm:parse_lfp_panel_data] Found panel mode in BIOS VBT tables: [ 2.391213] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 0 65000 1024 1048 1184 1344 768 771 777 806 0x8 0xa [ 2.391218] [drm:parse_lfp_panel_data] VBT initial LVDS value 300 [ 2.391224] [drm:parse_lfp_backlight] VBT backlight PWM modulation frequency 200 Hz, active high, min brightness 0, level 255 [ 2.391229] [drm:parse_sdvo_device_mapping] No SDVO device info is found in VBT [ 2.391234] [drm:parse_driver_features] DRRS State Enabled:1 [ 2.391240] [drm:parse_ddi_port] Port A VBT info: DP:1 HDMI:0 DVI:0 EDP:1 CRT:0 [ 2.391245] [drm:parse_ddi_port] VBT HDMI level shift for port A: 0 [ 2.391250] [drm:parse_ddi_port] Port B VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0 [ 2.391253] [drm:parse_ddi_port] VBT HDMI level shift for port B: 3 [ 2.391257] [drm:parse_ddi_port] Port C VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0 [ 2.391259] [drm:parse_ddi_port] VBT HDMI level shift for port C: 3 [ 2.391328] [drm:intel_dsm_pci_probe] no _DSM method for intel device [ 2.391340] [drm:i915_gem_init_stolen] found 33554432 bytes of stolen memory at ad800000 [ 2.391343] [drm:intel_display_power_get] enabling always-on [ 2.391346] [drm:intel_display_power_get] enabling power well 1 [ 2.391350] [drm:skl_set_power_well] Enabling power well 1 [ 2.391352] [drm:intel_display_power_get] enabling MISC IO power well [ 2.391355] [drm:skl_set_power_well] Enabling MISC IO power well [ 2.391356] [drm:intel_display_power_get] enabling power well 2 [ 2.391359] [drm:skl_set_power_well] Enabling power well 2 [ 2.391361] [drm:intel_display_power_get] enabling DDI A/E power well [ 2.391363] [drm:skl_set_power_well] Enabling DDI A/E power well [ 2.391365] [drm:intel_display_power_get] enabling DDI B power well [ 2.391368] [drm:skl_set_power_well] Enabling DDI B power well [ 2.391371] [drm:intel_display_power_get] enabling DDI C power well [ 2.391375] [drm:skl_set_power_well] Enabling DDI C power well [ 2.391378] [drm:intel_display_power_get] enabling DDI D power well [ 2.391380] [drm:skl_set_power_well] Enabling DDI D power well [ 2.392784] [drm:intel_print_wm_latency] Gen9 Plane WM0 latency 2 (2.0 usec) [ 2.392791] [drm:intel_print_wm_latency] Gen9 Plane WM1 latency 19 (19.0 usec) [ 2.392796] [drm:intel_print_wm_latency] Gen9 Plane WM2 latency 28 (28.0 usec) [ 2.392800] [drm:intel_print_wm_latency] Gen9 Plane WM3 latency 32 (32.0 usec) [ 2.392804] [drm:intel_print_wm_latency] Gen9 Plane WM4 latency 63 (63.0 usec) [ 2.392808] [drm:intel_print_wm_latency] Gen9 Plane WM5 latency 77 (77.0 usec) [ 2.392812] [drm:intel_print_wm_latency] Gen9 Plane WM6 latency 83 (83.0 usec) [ 2.392816] [drm:intel_print_wm_latency] Gen9 Plane WM7 latency 99 (99.0 usec) [ 2.392823] [drm:intel_modeset_init] 3 display pipes available. [ 2.392855] [drm:intel_ddi_pll_init] CDCLK running at 675000KHz [ 2.392864] vgaarb: device changed decodes: PCI:0000:00:02.0,olddecodes=io+mem,decodes=io+mem:owns=io+mem [ 2.393211] [drm:intel_dp_init_connector] Adding eDP connector on port A [ 2.393360] [drm:intel_dp_init_panel_power_sequencer] cur t1_t3 2000 t8 0 t9 2000 t10 500 t11_t12 6000 [ 2.393367] [drm:intel_dp_init_panel_power_sequencer] vbt t1_t3 2000 t8 10 t9 2000 t10 500 t11_t12 5000 [ 2.393372] [drm:intel_dp_init_panel_power_sequencer] panel power up delay 200, power down delay 50, power cycle delay 600 [ 2.393376] [drm:intel_dp_init_panel_power_sequencer] backlight on delay 1, off delay 200 [ 2.393380] [drm:intel_dp_aux_init] registering DPDDC-A bus for card0-eDP-1 [ 2.393634] [drm:edp_panel_vdd_on] Turning eDP port A VDD on [ 2.393682] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f [ 2.394141] [drm:intel_dp_get_dpcd] DPCD: 12 14 c4 41 00 00 01 c0 02 00 00 00 1f 0b 00 [ 2.394476] [drm:intel_dp_get_dpcd] Detected EDP PSR Panel. [ 2.394479] [drm:intel_dp_get_dpcd] Displayport TPS3 supported [ 2.394537] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x4af06 [ 2.420253] [drm:drm_edid_to_eld] ELD: no CEA Extension found [ 2.420258] [drm:intel_dp_drrs_init] VBT doesn't support DRRS [ 2.420284] [drm:intel_panel_setup_backlight] Connector eDP-1 backlight initialized, enabled, brightness 937/937 [ 2.420308] [drm:intel_dp_init_connector] Adding DP connector on port B [ 2.420400] [drm:intel_dp_aux_init] registering DPDDC-B bus for card0-DP-1 [ 2.420713] [drm:intel_dp_init_connector] Adding DP connector on port C [ 2.420801] [drm:intel_dp_aux_init] registering DPDDC-C bus for card0-DP-2 [ 2.421153] [drm:intel_modeset_readout_hw_state] [CRTC:20] hw state readout: enabled [ 2.421159] [drm:intel_modeset_readout_hw_state] [CRTC:25] hw state readout: disabled [ 2.421164] [drm:intel_modeset_readout_hw_state] [CRTC:30] hw state readout: disabled [ 2.421170] [drm:intel_modeset_readout_hw_state] DPLL 1 hw state readout: crtc_mask 0x00000000, on 0 [ 2.421175] [drm:intel_modeset_readout_hw_state] DPLL 2 hw state readout: crtc_mask 0x00000000, on 0 [ 2.421180] [drm:intel_modeset_readout_hw_state] DPLL 3 hw state readout: crtc_mask 0x00000000, on 0 [ 2.421190] [drm:intel_modeset_readout_hw_state] [ENCODER:33:TMDS-33] hw state readout: enabled, pipe A [ 2.421194] [drm:intel_modeset_readout_hw_state] [ENCODER:42:TMDS-42] hw state readout: disabled, pipe A [ 2.421197] [drm:intel_modeset_readout_hw_state] [ENCODER:44:DP MST-44] hw state readout: disabled, pipe A [ 2.421200] [drm:intel_modeset_readout_hw_state] [ENCODER:45:DP MST-45] hw state readout: disabled, pipe B [ 2.421203] [drm:intel_modeset_readout_hw_state] [ENCODER:46:DP MST-46] hw state readout: disabled, pipe C [ 2.421207] [drm:intel_modeset_readout_hw_state] [ENCODER:49:TMDS-49] hw state readout: disabled, pipe A [ 2.421210] [drm:intel_modeset_readout_hw_state] [ENCODER:51:DP MST-51] hw state readout: disabled, pipe A [ 2.421213] [drm:intel_modeset_readout_hw_state] [ENCODER:52:DP MST-52] hw state readout: disabled, pipe B [ 2.421216] [drm:intel_modeset_readout_hw_state] [ENCODER:53:DP MST-53] hw state readout: disabled, pipe C [ 2.421221] [drm:intel_modeset_readout_hw_state] [CONNECTOR:34:eDP-1] hw state readout: enabled [ 2.421225] [drm:intel_modeset_readout_hw_state] [CONNECTOR:43:DP-1] hw state readout: disabled [ 2.421229] [drm:intel_modeset_readout_hw_state] [CONNECTOR:47:HDMI-A-1] hw state readout: disabled [ 2.421233] [drm:intel_modeset_readout_hw_state] [CONNECTOR:50:DP-2] hw state readout: disabled [ 2.421236] [drm:intel_modeset_readout_hw_state] [CONNECTOR:54:HDMI-A-2] hw state readout: disabled [ 2.421242] [drm:intel_dump_pipe_config] [CRTC:20][setup_hw_state] config for pipe A [ 2.421245] [drm:intel_dump_pipe_config] cpu_transcoder: D [ 2.421248] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 0 [ 2.421252] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 2.421256] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 350797, link_n: 524288, tu: 64 [ 2.421260] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 2.421263] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 2.421266] [drm:intel_dump_pipe_config] requested mode: [ 2.421271] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 3200 0 0 0 1800 0 0 0 0x0 0x0 [ 2.421273] [drm:intel_dump_pipe_config] adjusted mode: [ 2.421278] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0xa [ 2.421283] [drm:intel_dump_crtc_timings] crtc timings: 361309 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x0 flags: 0xa [ 2.421285] [drm:intel_dump_pipe_config] port clock: 540000 [ 2.421288] [drm:intel_dump_pipe_config] pipe src size: 3200x1800 [ 2.421292] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 2.421295] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 2.421297] [drm:intel_dump_pipe_config] ips: 0 [ 2.421300] [drm:intel_dump_pipe_config] double wide: 0 [ 2.421304] [drm:i915_get_vblank_timestamp] crtc 1 is disabled [ 2.421308] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe B [ 2.421311] [drm:i915_get_vblank_timestamp] crtc 1 is disabled [ 2.421314] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe B [ 2.421318] [drm:intel_dump_pipe_config] [CRTC:25][setup_hw_state] config for pipe B [ 2.421321] [drm:intel_dump_pipe_config] cpu_transcoder: B [ 2.421323] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0 [ 2.421327] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 2.421331] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 2.421334] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 2.421337] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 2.421339] [drm:intel_dump_pipe_config] requested mode: [ 2.421344] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 [ 2.421346] [drm:intel_dump_pipe_config] adjusted mode: [ 2.421350] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 [ 2.421354] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 [ 2.421357] [drm:intel_dump_pipe_config] port clock: 0 [ 2.421359] [drm:intel_dump_pipe_config] pipe src size: 0x0 [ 2.421363] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 2.421366] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 2.421368] [drm:intel_dump_pipe_config] ips: 0 [ 2.421370] [drm:intel_dump_pipe_config] double wide: 0 [ 2.421374] [drm:i915_get_vblank_timestamp] crtc 2 is disabled [ 2.421378] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe C [ 2.421380] [drm:i915_get_vblank_timestamp] crtc 2 is disabled [ 2.421384] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe C [ 2.421387] [drm:intel_dump_pipe_config] [CRTC:30][setup_hw_state] config for pipe C [ 2.421389] [drm:intel_dump_pipe_config] cpu_transcoder: C [ 2.421392] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0 [ 2.421395] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 2.421399] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 2.421402] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 2.421405] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 2.421407] [drm:intel_dump_pipe_config] requested mode: [ 2.421411] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 [ 2.421414] [drm:intel_dump_pipe_config] adjusted mode: [ 2.421418] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 [ 2.421422] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 [ 2.421424] [drm:intel_dump_pipe_config] port clock: 0 [ 2.421427] [drm:intel_dump_pipe_config] pipe src size: 0x0 [ 2.421430] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 2.421433] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 2.421435] [drm:intel_dump_pipe_config] ips: 0 [ 2.421438] [drm:intel_dump_pipe_config] double wide: 0 [ 2.421486] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1] [ 2.421492] [drm:check_encoder_state] [ENCODER:33:TMDS-33] [ 2.421496] [drm:check_encoder_state] [ENCODER:42:TMDS-42] [ 2.421499] [drm:check_encoder_state] [ENCODER:44:DP MST-44] [ 2.421502] [drm:check_encoder_state] [ENCODER:45:DP MST-45] [ 2.421504] [drm:check_encoder_state] [ENCODER:46:DP MST-46] [ 2.421507] [drm:check_encoder_state] [ENCODER:49:TMDS-49] [ 2.421509] [drm:check_encoder_state] [ENCODER:51:DP MST-51] [ 2.421512] [drm:check_encoder_state] [ENCODER:52:DP MST-52] [ 2.421514] [drm:check_encoder_state] [ENCODER:53:DP MST-53] [ 2.421517] [drm:check_crtc_state] [CRTC:20] [ 2.421530] [drm:check_crtc_state] [CRTC:25] [ 2.421534] [drm:check_crtc_state] [CRTC:30] [ 2.421537] [drm:check_shared_dpll_state] DPLL 1 [ 2.421540] [drm:check_shared_dpll_state] DPLL 2 [ 2.421543] [drm:check_shared_dpll_state] DPLL 3 [ 2.421555] [drm:skylake_get_initial_plane_config] pipe A with fb: size=3200x1800@32, offset=0, pitch 12800, size 0x15f9000 [ 2.421559] [drm:i915_gem_object_create_stolen_for_preallocated] creating preallocated stolen object: stolen_offset=0, gtt_offset=0, size=15f9000 [ 2.421565] [drm:i915_pages_create_for_stolen] offset=0x0, size=23040000 [ 2.421571] [drm:intel_alloc_plane_obj] plane fb obj ffff880004d38000 [ 2.421577] [drm:i915_gem_setup_global_gtt] reserving preallocated space: 0 + 15f9000 [ 2.421580] [drm:i915_gem_setup_global_gtt] clearing unused GTT space: [15f9000, fffff000] [ 2.426445] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted) [ 2.426448] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted) [ 2.426452] [drm:i915_gem_context_init] LR context support initialized [ 2.426846] [drm:intel_init_pipe_control] render ring pipe control offset: 0x0162f000 [ 2.427066] [drm:gen8_init_common_ring] Execlists enabled for render ring [ 2.427076] [drm:gen8_init_common_ring] Execlists enabled for bsd ring [ 2.427083] [drm:gen8_init_common_ring] Execlists enabled for blitter ring [ 2.427089] [drm:gen8_init_common_ring] Execlists enabled for video enhancement ring [ 2.427351] [drm:intel_backlight_device_register] Connector eDP-1 backlight sysfs interface registered [ 2.427419] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] [ 2.427424] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1] [ 2.427795] [drm:intel_dp_probe_oui] Sink OUI: 0022b9 [ 2.428162] [drm:intel_dp_probe_oui] Branch OUI: 000000 [ 2.428170] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] status updated from 3 to 1 [ 2.428185] [drm:drm_edid_to_eld] ELD: no CEA Extension found [ 2.428191] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes : [ 2.428197] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 2.428203] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa [ 2.428207] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] [ 2.428209] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] [ 2.428220] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] status updated from 3 to 2 [ 2.428223] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected [ 2.428227] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] [ 2.428230] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1] [ 2.428484] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) [ 2.428488] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb [ 2.428492] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] status updated from 3 to 2 [ 2.428501] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected [ 2.428505] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] [ 2.428510] [drm:intel_dp_detect] [CONNECTOR:50:DP-2] [ 2.428531] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] status updated from 3 to 2 [ 2.428535] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected [ 2.428540] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] [ 2.428542] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2] [ 2.428799] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) [ 2.428802] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc [ 2.428805] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] status updated from 3 to 2 [ 2.428808] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected [ 2.428812] [drm:drm_setup_crtcs] [ 2.428817] [drm:drm_enable_connectors] connector 34 enabled? yes [ 2.428820] [drm:drm_enable_connectors] connector 43 enabled? no [ 2.428824] [drm:drm_enable_connectors] connector 47 enabled? no [ 2.428828] [drm:drm_enable_connectors] connector 50 enabled? no [ 2.428831] [drm:drm_enable_connectors] connector 54 enabled? no [ 2.428839] [drm:intel_fb_initial_config] looking for cmdline mode on connector eDP-1 [ 2.428844] [drm:intel_fb_initial_config] looking for preferred mode on connector eDP-1 0 [ 2.428850] [drm:intel_fb_initial_config] connector eDP-1 on pipe A [CRTC:20]: 3200x1800 [ 2.428854] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping [ 2.428858] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping [ 2.428861] [drm:intel_fb_initial_config] connector DP-2 not enabled, skipping [ 2.428865] [drm:intel_fb_initial_config] connector HDMI-A-2 not enabled, skipping [ 2.428871] [drm:drm_setup_crtcs] desired mode 3200x1800 set on crtc 20 (0,0) [ 2.428876] [drm:intelfb_create] no BIOS fb, allocating a new one [ 2.428881] [drm:i915_gem_object_create_stolen] creating stolen object: size=15f9000 [ 2.431896] ACPI: Video Device [GFX0] (multi-head: yes rom: no post: no) [ 2.432234] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:00/input/input5 [ 2.432750] [drm] Initialized i915 1.6.0 20150130 for 0000:00:02.0 on minor 0 [ 2.439565] [drm:intelfb_create] allocated 3200x1800 fb: 0x016c0000, bo ffff880143e50000 [ 2.439695] fbcon: inteldrmfb (fb0) is primary device [ 2.439892] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880144109f60 [ 2.439897] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88009b885b40 state to ffff880144109f60 [ 2.439902] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004d0a400 state to ffff880144109f60 [ 2.439904] [drm:drm_atomic_check_only] checking ffff880144109f60 [ 2.439911] [drm:drm_atomic_commit] commiting ffff880144109f60 [ 2.439936] [drm:intel_fbc_update] no output, disabling [ 2.439942] [drm:drm_atomic_state_clear] Clearing atomic state ffff880144109f60 [ 2.439945] [drm:drm_atomic_state_free] Freeing atomic state ffff880144109f60 [ 2.439948] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880144109f60 [ 2.439951] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff88009b885840 state to ffff880144109f60 [ 2.439953] [drm:drm_atomic_check_only] checking ffff880144109f60 [ 2.439955] [drm:drm_atomic_commit] commiting ffff880144109f60 [ 2.439957] [drm:drm_atomic_state_clear] Clearing atomic state ffff880144109f60 [ 2.439959] [drm:drm_atomic_state_free] Freeing atomic state ffff880144109f60 [ 2.439961] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880144109f60 [ 2.439963] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff88009b885cc0 state to ffff880144109f60 [ 2.439964] [drm:drm_atomic_check_only] checking ffff880144109f60 [ 2.439966] [drm:drm_atomic_commit] commiting ffff880144109f60 [ 2.439968] [drm:drm_atomic_state_clear] Clearing atomic state ffff880144109f60 [ 2.439970] [drm:drm_atomic_state_free] Freeing atomic state ffff880144109f60 [ 2.439972] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880144109f60 [ 2.439974] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88009b883a80 state to ffff880144109f60 [ 2.439976] [drm:drm_atomic_check_only] checking ffff880144109f60 [ 2.439977] [drm:drm_atomic_commit] commiting ffff880144109f60 [ 2.439979] [drm:drm_atomic_state_clear] Clearing atomic state ffff880144109f60 [ 2.439981] [drm:drm_atomic_state_free] Freeing atomic state ffff880144109f60 [ 2.439983] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880144109f60 [ 2.439986] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88009b8833c0 state to ffff880144109f60 [ 2.439987] [drm:drm_atomic_check_only] checking ffff880144109f60 [ 2.439989] [drm:drm_atomic_commit] commiting ffff880144109f60 [ 2.439991] [drm:drm_atomic_state_clear] Clearing atomic state ffff880144109f60 [ 2.439992] [drm:drm_atomic_state_free] Freeing atomic state ffff880144109f60 [ 2.439994] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880144109f60 [ 2.439996] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88009b8839c0 state to ffff880144109f60 [ 2.439997] [drm:drm_atomic_check_only] checking ffff880144109f60 [ 2.439999] [drm:drm_atomic_commit] commiting ffff880144109f60 [ 2.440001] [drm:drm_atomic_state_clear] Clearing atomic state ffff880144109f60 [ 2.440002] [drm:drm_atomic_state_free] Freeing atomic state ffff880144109f60 [ 2.440004] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880144109f60 [ 2.440006] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88009b883240 state to ffff880144109f60 [ 2.440007] [drm:drm_atomic_check_only] checking ffff880144109f60 [ 2.440009] [drm:drm_atomic_commit] commiting ffff880144109f60 [ 2.440011] [drm:drm_atomic_state_clear] Clearing atomic state ffff880144109f60 [ 2.440012] [drm:drm_atomic_state_free] Freeing atomic state ffff880144109f60 [ 2.440014] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880144109f60 [ 2.440016] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff88009b883f00 state to ffff880144109f60 [ 2.440018] [drm:drm_atomic_check_only] checking ffff880144109f60 [ 2.440019] [drm:drm_atomic_commit] commiting ffff880144109f60 [ 2.440021] [drm:drm_atomic_state_clear] Clearing atomic state ffff880144109f60 [ 2.440022] [drm:drm_atomic_state_free] Freeing atomic state ffff880144109f60 [ 2.440025] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880144109f60 [ 2.440027] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff88009b883540 state to ffff880144109f60 [ 2.440028] [drm:drm_atomic_check_only] checking ffff880144109f60 [ 2.440029] [drm:drm_atomic_commit] commiting ffff880144109f60 [ 2.440031] [drm:drm_atomic_state_clear] Clearing atomic state ffff880144109f60 [ 2.440033] [drm:drm_atomic_state_free] Freeing atomic state ffff880144109f60 [ 2.440035] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880144109f60 [ 2.440037] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff88009b8830c0 state to ffff880144109f60 [ 2.440038] [drm:drm_atomic_check_only] checking ffff880144109f60 [ 2.440039] [drm:drm_atomic_commit] commiting ffff880144109f60 [ 2.440041] [drm:drm_atomic_state_clear] Clearing atomic state ffff880144109f60 [ 2.440043] [drm:drm_atomic_state_free] Freeing atomic state ffff880144109f60 [ 2.440045] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880144109f60 [ 2.440047] [drm:drm_atomic_get_plane_state] Added [PLANE:31] ffff880004c2c9c0 state to ffff880144109f60 [ 2.440048] [drm:drm_atomic_check_only] checking ffff880144109f60 [ 2.440050] [drm:drm_atomic_commit] commiting ffff880144109f60 [ 2.440051] [drm:drm_atomic_state_clear] Clearing atomic state ffff880144109f60 [ 2.440053] [drm:drm_atomic_state_free] Freeing atomic state ffff880144109f60 [ 2.440055] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880144109f60 [ 2.440057] [drm:drm_atomic_get_plane_state] Added [PLANE:32] ffff880004c2c840 state to ffff880144109f60 [ 2.440058] [drm:drm_atomic_check_only] checking ffff880144109f60 [ 2.440060] [drm:drm_atomic_commit] commiting ffff880144109f60 [ 2.440062] [drm:drm_atomic_state_clear] Clearing atomic state ffff880144109f60 [ 2.440063] [drm:drm_atomic_state_free] Freeing atomic state ffff880144109f60 [ 2.440067] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0) [ 2.440071] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set [ 2.440075] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 [ 2.440079] [drm:drm_mode_debug_printmodeline] Modeline 56:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 2.440081] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=1 [ 2.440084] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 2.440089] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 2.440092] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains [ 2.440096] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz [ 2.440098] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18 [ 2.440101] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18 [ 2.440103] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000 [ 2.440106] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 [ 2.440108] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 2.440110] [drm:intel_dump_pipe_config] cpu_transcoder: D [ 2.440111] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 [ 2.440115] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 2.440119] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64 [ 2.440122] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 2.440124] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 2.440125] [drm:intel_dump_pipe_config] requested mode: [ 2.440131] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 2.440133] [drm:intel_dump_pipe_config] adjusted mode: [ 2.440137] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 2.440141] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa [ 2.440143] [drm:intel_dump_pipe_config] port clock: 540000 [ 2.440145] [drm:intel_dump_pipe_config] pipe src size: 3200x1800 [ 2.440148] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 2.440150] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 2.440151] [drm:intel_dump_pipe_config] ips: 0 [ 2.440152] [drm:intel_dump_pipe_config] double wide: 0 [ 2.440169] [drm:intel_edp_backlight_off] [ 2.526955] usb 1-7: new full-speed USB device number 3 using xhci_hcd [ 2.640916] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0 [ 2.645129] [drm:edp_panel_off] Turn eDP port A panel power off [ 2.645154] [drm:wait_panel_off] Wait for panel power off time [ 2.645172] [drm:wait_panel_status] mask b0000000 value 00000000 status a0000003 control abcd0000 [ 2.695070] usb 1-7: New USB device found, idVendor=ffff, idProduct=0a5a [ 2.695074] usb 1-7: New USB device strings: Mfr=1, Product=2, SerialNumber=3 [ 2.695077] usb 1-7: Product: Intel(R) Wilkins Peak 2x2 [ 2.695079] usb 1-7: Manufacturer: Intel(R) Corporation [ 2.695081] usb 1-7: SerialNumber: 001122334455 WP_A0 [ 2.699929] [drm:wait_panel_status] Wait complete [ 2.699951] [drm:intel_display_power_put] disabling DDI D power well [ 2.699954] [drm:skl_set_power_well] Disabling DDI D power well [ 2.699955] [drm:intel_display_power_put] disabling DDI C power well [ 2.699958] [drm:skl_set_power_well] Disabling DDI C power well [ 2.699959] [drm:intel_display_power_put] disabling DDI B power well [ 2.699962] [drm:skl_set_power_well] Disabling DDI B power well [ 2.699963] [drm:intel_display_power_put] disabling power well 2 [ 2.699965] [drm:skl_set_power_well] Disabling power well 2 [ 2.699967] [drm:intel_display_power_put] disabling always-on [ 2.699973] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88014512e240 [ 2.699978] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88014895d600 state to ffff88014512e240 [ 2.699982] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880144241000 state to ffff88014512e240 [ 2.699984] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88014895d600 to [CRTC:20] [ 2.699986] [drm:drm_atomic_set_fb_for_plane] Set [FB:57] for plane state ffff88014895d600 [ 2.699987] [drm:drm_atomic_check_only] checking ffff88014512e240 [ 2.699993] [drm:drm_atomic_commit] commiting ffff88014512e240 [ 2.700006] [drm:drm_atomic_state_clear] Clearing atomic state ffff88014512e240 [ 2.700008] [drm:drm_atomic_state_free] Freeing atomic state ffff88014512e240 [ 2.700024] [drm:edp_panel_on] Turn eDP port A panel power on [ 2.700032] [drm:wait_panel_power_cycle] Wait for panel power cycle [ 2.759941] tsc: Refined TSC clocksource calibration: 1008.000 MHz [ 2.764992] usb 1-5.4: new high-speed USB device number 4 using xhci_hcd [ 2.874683] usb 1-5.4: New USB device found, idVendor=0b95, idProduct=772a [ 2.874686] usb 1-5.4: New USB device strings: Mfr=1, Product=2, SerialNumber=3 [ 2.874689] usb 1-5.4: Product: AX88x72A [ 2.874692] usb 1-5.4: Manufacturer: ASIX Elec. Corp. [ 2.874694] usb 1-5.4: SerialNumber: 0001E6 [ 3.246005] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000 [ 3.246013] [drm:wait_panel_status] Wait complete [ 3.246036] [drm:wait_panel_on] Wait for panel power on [ 3.246052] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003 [ 3.454926] [drm:wait_panel_status] Wait complete [ 3.454943] [drm:edp_panel_vdd_on] Turning eDP port A VDD on [ 3.454990] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b [ 3.456114] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 [ 3.456785] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 [ 3.457446] [drm:intel_dp_start_link_train] clock recovery OK [ 3.458416] [drm:intel_dp_set_signal_levels] Using signal levels 05000000 [ 3.459376] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful [ 3.459676] [drm:skl_wm_flush_pipe] flush pipe A (pass 3) [ 3.459690] [drm:intel_edp_backlight_on] [ 3.459693] [drm:intel_panel_enable_backlight] pipe A [ 3.459732] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937 [ 3.459771] [drm:intel_psr_match_conditions] PSR disable by flag [ 3.459772] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS [ 3.459779] [drm:skylake_update_primary_plane] Writing base 016C0000 0,0,3200,1800 pitch=12800 [ 3.459785] [drm:intel_fbc_update] disabled per chip default [ 3.459801] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1] [ 3.459806] [drm:check_encoder_state] [ENCODER:33:TMDS-33] [ 3.459809] [drm:check_encoder_state] [ENCODER:42:TMDS-42] [ 3.459811] [drm:check_encoder_state] [ENCODER:44:DP MST-44] [ 3.459812] [drm:check_encoder_state] [ENCODER:45:DP MST-45] [ 3.459813] [drm:check_encoder_state] [ENCODER:46:DP MST-46] [ 3.459815] [drm:check_encoder_state] [ENCODER:49:TMDS-49] [ 3.459816] [drm:check_encoder_state] [ENCODER:51:DP MST-51] [ 3.459817] [drm:check_encoder_state] [ENCODER:52:DP MST-52] [ 3.459819] [drm:check_encoder_state] [ENCODER:53:DP MST-53] [ 3.459820] [drm:check_crtc_state] [CRTC:20] [ 3.459836] [drm:check_crtc_state] [CRTC:25] [ 3.459837] [drm:check_crtc_state] [CRTC:30] [ 3.459839] [drm:check_shared_dpll_state] DPLL 1 [ 3.459842] [drm:check_shared_dpll_state] DPLL 2 [ 3.459843] [drm:check_shared_dpll_state] DPLL 3 [ 3.459871] [drm:intel_crtc_set_config] [CRTC:25] [NOFB] [ 3.459875] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0 [ 3.459877] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 3.459881] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 [ 3.459894] [drm:intel_crtc_set_config] [CRTC:30] [NOFB] [ 3.459896] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=0, fb_changed=0 [ 3.459898] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 3.459901] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 [ 3.459905] [drm:drm_fb_helper_hotplug_event] [ 3.459908] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] [ 3.459909] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1] [ 3.460256] [drm:intel_dp_probe_oui] Sink OUI: 0022b9 [ 3.460601] [drm:intel_dp_probe_oui] Branch OUI: 000000 [ 3.460617] [drm:drm_edid_to_eld] ELD: no CEA Extension found [ 3.460622] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes : [ 3.460627] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 3.460630] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa [ 3.460632] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] [ 3.460634] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] [ 3.460635] [drm:intel_display_power_get] enabling power well 2 [ 3.460638] [drm:skl_set_power_well] Enabling power well 2 [ 3.460641] [drm:intel_display_power_get] enabling DDI B power well [ 3.460643] [drm:skl_set_power_well] Enabling DDI B power well [ 3.460651] [drm:intel_display_power_put] disabling DDI B power well [ 3.460654] [drm:skl_set_power_well] Disabling DDI B power well [ 3.460655] [drm:intel_display_power_put] disabling power well 2 [ 3.460658] [drm:skl_set_power_well] Disabling power well 2 [ 3.460660] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected [ 3.460662] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] [ 3.460664] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1] [ 3.460665] [drm:intel_display_power_get] enabling power well 2 [ 3.460667] [drm:skl_set_power_well] Enabling power well 2 [ 3.460669] [drm:intel_display_power_get] enabling DDI B power well [ 3.460671] [drm:skl_set_power_well] Enabling DDI B power well [ 3.460938] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) [ 3.460940] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb [ 3.460942] [drm:intel_display_power_put] disabling DDI B power well [ 3.460944] [drm:skl_set_power_well] Disabling DDI B power well [ 3.460946] [drm:intel_display_power_put] disabling power well 2 [ 3.460948] [drm:skl_set_power_well] Disabling power well 2 [ 3.460950] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected [ 3.460953] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] [ 3.460954] [drm:intel_dp_detect] [CONNECTOR:50:DP-2] [ 3.460956] [drm:intel_display_power_get] enabling power well 2 [ 3.460958] [drm:skl_set_power_well] Enabling power well 2 [ 3.460960] [drm:intel_display_power_get] enabling DDI C power well [ 3.460962] [drm:skl_set_power_well] Enabling DDI C power well [ 3.460970] [drm:intel_display_power_put] disabling DDI C power well [ 3.460973] [drm:skl_set_power_well] Disabling DDI C power well [ 3.460974] [drm:intel_display_power_put] disabling power well 2 [ 3.460976] [drm:skl_set_power_well] Disabling power well 2 [ 3.460978] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected [ 3.460980] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] [ 3.460981] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2] [ 3.460982] [drm:intel_display_power_get] enabling power well 2 [ 3.460984] [drm:skl_set_power_well] Enabling power well 2 [ 3.460986] [drm:intel_display_power_get] enabling DDI C power well [ 3.460988] [drm:skl_set_power_well] Enabling DDI C power well [ 3.461234] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) [ 3.461235] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc [ 3.461237] [drm:intel_display_power_put] disabling DDI C power well [ 3.461239] [drm:skl_set_power_well] Disabling DDI C power well [ 3.461240] [drm:intel_display_power_put] disabling power well 2 [ 3.461243] [drm:skl_set_power_well] Disabling power well 2 [ 3.461244] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected [ 3.461249] [drm:drm_setup_crtcs] [ 3.461251] [drm:drm_enable_connectors] connector 34 enabled? yes [ 3.461253] [drm:drm_enable_connectors] connector 43 enabled? no [ 3.461254] [drm:drm_enable_connectors] connector 47 enabled? no [ 3.461256] [drm:drm_enable_connectors] connector 50 enabled? no [ 3.461257] [drm:drm_enable_connectors] connector 54 enabled? no [ 3.461260] [drm:intel_fb_initial_config] looking for cmdline mode on connector eDP-1 [ 3.461261] [drm:intel_fb_initial_config] looking for preferred mode on connector eDP-1 0 [ 3.461264] [drm:intel_fb_initial_config] connector eDP-1 on pipe A [CRTC:20]: 3200x1800 [ 3.461266] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping [ 3.461267] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping [ 3.461269] [drm:intel_fb_initial_config] connector DP-2 not enabled, skipping [ 3.461270] [drm:intel_fb_initial_config] connector HDMI-A-2 not enabled, skipping [ 3.461273] [drm:drm_setup_crtcs] desired mode 3200x1800 set on crtc 20 (0,0) [ 3.461281] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801440fe600 [ 3.461285] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff8801440e6240 state to ffff8801440fe600 [ 3.461288] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880143e73400 state to ffff8801440fe600 [ 3.461290] [drm:drm_atomic_check_only] checking ffff8801440fe600 [ 3.461295] [drm:drm_atomic_commit] commiting ffff8801440fe600 [ 3.461318] [drm:skylake_update_primary_plane] Writing base 016C0000 0,0,3200,1800 pitch=12800 [ 3.461327] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801440fe600 [ 3.461329] [drm:drm_atomic_state_free] Freeing atomic state ffff8801440fe600 [ 3.461332] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801440fe600 [ 3.461334] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff8801440e6540 state to ffff8801440fe600 [ 3.461335] [drm:drm_atomic_check_only] checking ffff8801440fe600 [ 3.461337] [drm:drm_atomic_commit] commiting ffff8801440fe600 [ 3.461340] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801440fe600 [ 3.461341] [drm:drm_atomic_state_free] Freeing atomic state ffff8801440fe600 [ 3.461344] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801440fe600 [ 3.461346] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff8801440e6840 state to ffff8801440fe600 [ 3.461347] [drm:drm_atomic_check_only] checking ffff8801440fe600 [ 3.461349] [drm:drm_atomic_commit] commiting ffff8801440fe600 [ 3.461351] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801440fe600 [ 3.461352] [drm:drm_atomic_state_free] Freeing atomic state ffff8801440fe600 [ 3.461354] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801440fe600 [ 3.461357] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8801440e69c0 state to ffff8801440fe600 [ 3.461358] [drm:drm_atomic_check_only] checking ffff8801440fe600 [ 3.461359] [drm:drm_atomic_commit] commiting ffff8801440fe600 [ 3.461361] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801440fe600 [ 3.461363] [drm:drm_atomic_state_free] Freeing atomic state ffff8801440fe600 [ 3.461365] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801440fe600 [ 3.461367] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8801440e6c00 state to ffff8801440fe600 [ 3.461369] [drm:drm_atomic_check_only] checking ffff8801440fe600 [ 3.461371] [drm:drm_atomic_commit] commiting ffff8801440fe600 [ 3.461372] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801440fe600 [ 3.461374] [drm:drm_atomic_state_free] Freeing atomic state ffff8801440fe600 [ 3.461376] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801440fe600 [ 3.461378] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff8801440e6780 state to ffff8801440fe600 [ 3.461379] [drm:drm_atomic_check_only] checking ffff8801440fe600 [ 3.461381] [drm:drm_atomic_commit] commiting ffff8801440fe600 [ 3.461382] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801440fe600 [ 3.461384] [drm:drm_atomic_state_free] Freeing atomic state ffff8801440fe600 [ 3.461386] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801440fe600 [ 3.461388] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8801440e60c0 state to ffff8801440fe600 [ 3.461389] [drm:drm_atomic_check_only] checking ffff8801440fe600 [ 3.461391] [drm:drm_atomic_commit] commiting ffff8801440fe600 [ 3.461393] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801440fe600 [ 3.461394] [drm:drm_atomic_state_free] Freeing atomic state ffff8801440fe600 [ 3.461396] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801440fe600 [ 3.461398] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff8801440e63c0 state to ffff8801440fe600 [ 3.461399] [drm:drm_atomic_check_only] checking ffff8801440fe600 [ 3.461401] [drm:drm_atomic_commit] commiting ffff8801440fe600 [ 3.461403] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801440fe600 [ 3.461404] [drm:drm_atomic_state_free] Freeing atomic state ffff8801440fe600 [ 3.461406] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801440fe600 [ 3.461408] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff88009b885cc0 state to ffff8801440fe600 [ 3.461410] [drm:drm_atomic_check_only] checking ffff8801440fe600 [ 3.461411] [drm:drm_atomic_commit] commiting ffff8801440fe600 [ 3.461413] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801440fe600 [ 3.461414] [drm:drm_atomic_state_free] Freeing atomic state ffff8801440fe600 [ 3.461417] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801440fe600 [ 3.461419] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff88009b885840 state to ffff8801440fe600 [ 3.461420] [drm:drm_atomic_check_only] checking ffff8801440fe600 [ 3.461422] [drm:drm_atomic_commit] commiting ffff8801440fe600 [ 3.461423] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801440fe600 [ 3.461425] [drm:drm_atomic_state_free] Freeing atomic state ffff8801440fe600 [ 3.461427] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801440fe600 [ 3.461429] [drm:drm_atomic_get_plane_state] Added [PLANE:31] ffff88009b885b40 state to ffff8801440fe600 [ 3.461430] [drm:drm_atomic_check_only] checking ffff8801440fe600 [ 3.461432] [drm:drm_atomic_commit] commiting ffff8801440fe600 [ 3.461434] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801440fe600 [ 3.461435] [drm:drm_atomic_state_free] Freeing atomic state ffff8801440fe600 [ 3.461437] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801440fe600 [ 3.461439] [drm:drm_atomic_get_plane_state] Added [PLANE:32] ffff88009b885480 state to ffff8801440fe600 [ 3.461440] [drm:drm_atomic_check_only] checking ffff8801440fe600 [ 3.461442] [drm:drm_atomic_commit] commiting ffff8801440fe600 [ 3.461444] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801440fe600 [ 3.461445] [drm:drm_atomic_state_free] Freeing atomic state ffff8801440fe600 [ 3.461448] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0) [ 3.461452] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 3.461454] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 3.461457] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 3.461460] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains [ 3.461464] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz [ 3.461465] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18 [ 3.461468] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18 [ 3.461470] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000 [ 3.461473] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 [ 3.461475] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 3.461476] [drm:intel_dump_pipe_config] cpu_transcoder: D [ 3.461478] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 [ 3.461481] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 3.461484] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64 [ 3.461486] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 3.461488] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 3.461489] [drm:intel_dump_pipe_config] requested mode: [ 3.461493] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 3.461494] [drm:intel_dump_pipe_config] adjusted mode: [ 3.461498] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 3.461501] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa [ 3.461503] [drm:intel_dump_pipe_config] port clock: 540000 [ 3.461504] [drm:intel_dump_pipe_config] pipe src size: 3200x1800 [ 3.461507] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 3.461508] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 3.461510] [drm:intel_dump_pipe_config] ips: 0 [ 3.461511] [drm:intel_dump_pipe_config] double wide: 0 [ 3.461513] [drm:intel_crtc_set_config] [CRTC:25] [NOFB] [ 3.461515] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0 [ 3.461517] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 3.461520] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 [ 3.461521] [drm:intel_crtc_set_config] [CRTC:30] [NOFB] [ 3.461524] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=0, fb_changed=0 [ 3.461525] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 3.461528] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 [ 3.461538] Console: switching to colour frame buffer device 400x112 [ 3.461550] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0) [ 3.461553] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 3.461554] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 3.461557] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 3.461559] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains [ 3.461562] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz [ 3.461563] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18 [ 3.461565] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18 [ 3.461567] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000 [ 3.461569] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 [ 3.461571] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 3.461572] [drm:intel_dump_pipe_config] cpu_transcoder: D [ 3.461574] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 [ 3.461577] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 3.461579] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64 [ 3.461581] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 3.461583] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 3.461584] [drm:intel_dump_pipe_config] requested mode: [ 3.461588] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 3.461589] [drm:intel_dump_pipe_config] adjusted mode: [ 3.461592] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 3.461595] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa [ 3.461596] [drm:intel_dump_pipe_config] port clock: 540000 [ 3.461598] [drm:intel_dump_pipe_config] pipe src size: 3200x1800 [ 3.461600] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 3.461602] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 3.461603] [drm:intel_dump_pipe_config] ips: 0 [ 3.461604] [drm:intel_dump_pipe_config] double wide: 0 [ 3.494076] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device [ 3.494133] i915 0000:00:02.0: registered panic notifier [ 3.647753] asix 1-5.4:1.0 eth0: register 'asix' at usb-0000:00:14.0-5.4, ASIX AX88772 USB 2.0 Ethernet, 8c:ae:4c:ec:98:a9 [ 3.666370] dracut: Starting plymouth daemon [ 3.680143] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0) [ 3.680149] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 3.680152] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 3.680156] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 3.680159] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains [ 3.680165] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz [ 3.680166] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18 [ 3.680169] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18 [ 3.680171] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000 [ 3.680177] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 [ 3.680179] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 3.680180] [drm:intel_dump_pipe_config] cpu_transcoder: D [ 3.680182] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 [ 3.680185] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 3.680189] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64 [ 3.680191] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 3.680193] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 3.680194] [drm:intel_dump_pipe_config] requested mode: [ 3.680199] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 3.680200] [drm:intel_dump_pipe_config] adjusted mode: [ 3.680204] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 3.680207] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa [ 3.680208] [drm:intel_dump_pipe_config] port clock: 540000 [ 3.680210] [drm:intel_dump_pipe_config] pipe src size: 3200x1800 [ 3.680212] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 3.680214] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 3.680215] [drm:intel_dump_pipe_config] ips: 0 [ 3.680217] [drm:intel_dump_pipe_config] double wide: 0 [ 3.720278] [drm] RC6 on [ 3.724128] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0) [ 3.724134] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 3.724137] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 3.724144] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 3.724149] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains [ 3.724161] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz [ 3.724162] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18 [ 3.724165] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18 [ 3.724167] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000 [ 3.724170] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 [ 3.724173] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 3.724174] [drm:intel_dump_pipe_config] cpu_transcoder: D [ 3.724175] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 [ 3.724178] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 3.724181] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64 [ 3.724184] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 3.724185] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 3.724187] [drm:intel_dump_pipe_config] requested mode: [ 3.724191] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 3.724192] [drm:intel_dump_pipe_config] adjusted mode: [ 3.724196] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 3.724199] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa [ 3.724201] [drm:intel_dump_pipe_config] port clock: 540000 [ 3.724202] [drm:intel_dump_pipe_config] pipe src size: 3200x1800 [ 3.724205] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 3.724207] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 3.724208] [drm:intel_dump_pipe_config] ips: 0 [ 3.724209] [drm:intel_dump_pipe_config] double wide: 0 [ 3.760236] Switched to clocksource tsc [ 3.894247] ACPI: Deprecated procfs I/F for AC is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared [ 3.894523] ACPI: AC Adapter [ADP1] (on-line) [ 3.983406] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared [ 3.983567] ACPI: Battery Slot [BAT0] (battery present) [ 3.983868] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared [ 3.984031] ACPI: Battery Slot [BAT1] (battery absent) [ 3.984324] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared [ 3.984477] ACPI: Battery Slot [BAT2] (battery absent) [ 3.994758] wmi: Mapper loaded [ 4.005930] i801_smbus 0000:00:1f.4: enabling device (0000 -> 0003) [ 4.006226] ACPI Warning: SystemIO range 0x000000000000efa0-0x000000000000efbf conflicts with OpRegion 0x000000000000efa0-0x000000000000efaf (\_SB_.PCI0.SBUS.SMBI) (20141107/utaddress-258) [ 4.006385] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver [ 4.008966] snd_hda_intel 0000:00:1f.3: enabling device (0000 -> 0002) [ 4.013713] input: PC Speaker as /devices/platform/pcspkr/input/input6 [ 4.024634] sound hdaudioC0D0: autoconfig for ALC286: line_outs=1 (0x14/0x0/0x0/0x0/0x0) type:speaker [ 4.024737] sound hdaudioC0D0: speaker_outs=0 (0x0/0x0/0x0/0x0/0x0) [ 4.024798] sound hdaudioC0D0: hp_outs=1 (0x21/0x0/0x0/0x0/0x0) [ 4.024867] sound hdaudioC0D0: mono: mono_out=0x0 [ 4.024914] sound hdaudioC0D0: inputs: [ 4.024954] sound hdaudioC0D0: Mic=0x18 [ 4.025023] sound hdaudioC0D0: Internal Mic=0x12 [ 4.025072] sound hdaudioC0D0: Line=0x1a [ 4.044141] ppdev: user-space parallel port driver [ 4.050088] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0) [ 4.050093] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 4.050097] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 4.050101] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 4.050104] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains [ 4.050109] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz [ 4.050111] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18 [ 4.050114] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18 [ 4.050116] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000 [ 4.050119] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 [ 4.050121] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 4.050122] [drm:intel_dump_pipe_config] cpu_transcoder: D [ 4.050124] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 [ 4.050127] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 4.050130] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64 [ 4.050132] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 4.050134] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 4.050135] [drm:intel_dump_pipe_config] requested mode: [ 4.050140] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 4.050141] [drm:intel_dump_pipe_config] adjusted mode: [ 4.050144] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 4.050148] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa [ 4.050149] [drm:intel_dump_pipe_config] port clock: 540000 [ 4.050150] [drm:intel_dump_pipe_config] pipe src size: 3200x1800 [ 4.050152] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 4.050154] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 4.050155] [drm:intel_dump_pipe_config] ips: 0 [ 4.050157] [drm:intel_dump_pipe_config] double wide: 0 [ 4.129774] EXT4-fs (sda2): INFO: recovery required on readonly filesystem [ 4.129846] EXT4-fs (sda2): write access will be enabled during recovery [ 4.160427] EXT4-fs (sda2): recovery complete [ 4.202737] EXT4-fs (sda2): mounted filesystem with ordered data mode. Opts: (null) [ 4.238400] dracut: Checking ext4: /dev/disk/by-uuid/f53c75c6-eeb6-4aa4-98a8-51aeb7219d2a [ 4.238754] dracut: issuing e2fsck -a /dev/disk/by-uuid/f53c75c6-eeb6-4aa4-98a8-51aeb7219d2a [ 4.278982] dracut: /dev/disk/by-uuid/f53c75c6-eeb6-4aa4-98a8-51aeb7219d2a: clean, 831734/13598720 files, 32634899/54366208 blocks [ 4.279836] dracut: Remounting /dev/disk/by-uuid/f53c75c6-eeb6-4aa4-98a8-51aeb7219d2a with -o errors=remount-ro,ro [ 4.289207] EXT4-fs (sda2): mounted filesystem with ordered data mode. Opts: errors=remount-ro [ 4.323591] dracut: Mounted root filesystem /dev/sda2 [ 4.341456] device-mapper: uevent: version 1.0.3 [ 4.341712] device-mapper: ioctl: 4.29.0-ioctl (2014-10-28) initialised: dm-devel@redhat.com [ 4.459875] dracut: Switching root [ 4.537601] random: init urandom read with 62 bits of entropy available [ 4.601365] init: plymouth-upstart-bridge main process (2962) terminated with status 1 [ 4.601511] init: plymouth-upstart-bridge main process ended, respawning [ 4.611129] init: plymouth-upstart-bridge main process (2972) terminated with status 1 [ 4.611273] init: plymouth-upstart-bridge main process ended, respawning [ 4.615592] init: plymouth-upstart-bridge main process (2974) terminated with status 1 [ 4.615683] init: plymouth-upstart-bridge main process ended, respawning [ 4.619867] init: plymouth-upstart-bridge main process (2976) terminated with status 1 [ 4.619955] init: plymouth-upstart-bridge main process ended, respawning [ 4.622989] init: plymouth-upstart-bridge main process (2978) terminated with status 1 [ 4.623125] init: plymouth-upstart-bridge main process ended, respawning [ 4.626623] init: plymouth-upstart-bridge main process (2979) terminated with status 1 [ 4.626713] init: plymouth-upstart-bridge main process ended, respawning [ 4.629693] init: plymouth-upstart-bridge main process (2981) terminated with status 1 [ 4.629782] init: plymouth-upstart-bridge main process ended, respawning [ 4.633703] init: plymouth-upstart-bridge main process (2982) terminated with status 1 [ 4.633845] init: plymouth-upstart-bridge main process ended, respawning [ 4.636896] init: plymouth-upstart-bridge main process (2984) terminated with status 1 [ 4.636986] init: plymouth-upstart-bridge main process ended, respawning [ 4.640252] init: plymouth-upstart-bridge main process (2985) terminated with status 1 [ 4.640340] init: plymouth-upstart-bridge main process ended, respawning [ 4.642994] init: plymouth-upstart-bridge main process (2987) terminated with status 1 [ 4.643153] init: plymouth-upstart-bridge respawning too fast, stopped [ 4.652483] init: ureadahead main process (2965) terminated with status 5 [ 4.990993] systemd-udevd[3099]: starting version 204 [ 5.235921] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0) [ 5.235928] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 5.235933] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 5.235938] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 5.235942] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains [ 5.235950] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz [ 5.235952] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18 [ 5.235957] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18 [ 5.235959] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000 [ 5.235964] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 [ 5.235967] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 5.235969] [drm:intel_dump_pipe_config] cpu_transcoder: D [ 5.235971] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 [ 5.235975] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 5.235979] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64 [ 5.235983] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 5.235985] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 5.235986] [drm:intel_dump_pipe_config] requested mode: [ 5.235992] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 5.235994] [drm:intel_dump_pipe_config] adjusted mode: [ 5.235999] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 5.236004] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa [ 5.236005] [drm:intel_dump_pipe_config] port clock: 540000 [ 5.236007] [drm:intel_dump_pipe_config] pipe src size: 3200x1800 [ 5.236010] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 5.236013] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 5.236015] [drm:intel_dump_pipe_config] ips: 0 [ 5.236017] [drm:intel_dump_pipe_config] double wide: 0 [ 5.420645] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0) [ 5.420653] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 5.420657] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 5.420662] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 5.420666] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains [ 5.420673] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz [ 5.420675] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18 [ 5.420679] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18 [ 5.420682] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000 [ 5.420685] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 [ 5.420688] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 5.420690] [drm:intel_dump_pipe_config] cpu_transcoder: D [ 5.420692] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 [ 5.420696] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 5.420700] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64 [ 5.420703] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 5.420706] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 5.420707] [drm:intel_dump_pipe_config] requested mode: [ 5.420714] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 5.420715] [drm:intel_dump_pipe_config] adjusted mode: [ 5.420720] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 5.420725] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa [ 5.420727] [drm:intel_dump_pipe_config] port clock: 540000 [ 5.420729] [drm:intel_dump_pipe_config] pipe src size: 3200x1800 [ 5.420731] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 5.420734] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 5.420736] [drm:intel_dump_pipe_config] ips: 0 [ 5.420737] [drm:intel_dump_pipe_config] double wide: 0 [ 5.499650] asix 1-5.4:1.0 eth4: renamed from eth0 [ 5.506272] systemd-udevd[3820]: renamed network interface eth0 to eth4 [ 5.580765] Adding 16440316k swap on /dev/sda3. Priority:-1 extents:1 across:16440316k SS [ 5.680611] EXT4-fs (sda2): re-mounted. Opts: errors=remount-ro [ 5.779018] init: Failed to obtain startpar-bridge instance: Unknown parameter: INSTANCE [ 6.050023] init: failsafe main process (4115) killed by TERM signal [ 6.261548] init: bluetooth main process (4209) terminated with status 1 [ 6.261571] init: bluetooth main process ended, respawning [ 6.338386] random: nonblocking pool is initialized [ 6.365341] init: bluetooth main process (4285) terminated with status 1 [ 6.365365] init: bluetooth main process ended, respawning [ 6.390965] init: cups main process (4272) killed by HUP signal [ 6.390990] init: cups main process ended, respawning [ 6.421824] init: bluetooth main process (4314) terminated with status 1 [ 6.421848] init: bluetooth main process ended, respawning [ 6.460986] init: bluetooth main process (4369) terminated with status 1 [ 6.461010] init: bluetooth main process ended, respawning [ 6.468386] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off [ 6.468432] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007 [ 6.555334] asix 1-5.4:1.0 eth4: link up, 100Mbps, full-duplex, lpa 0xCDE1 [ 6.793001] asix 1-5.4:1.0 eth4: link up, 100Mbps, full-duplex, lpa 0xCDE1 [ 6.795498] init: bluetooth main process (4486) terminated with status 1 [ 6.795524] init: bluetooth main process ended, respawning [ 6.890778] init: gdm main process (4453) killed by TERM signal [ 6.897592] init: bluetooth main process (4553) terminated with status 1 [ 6.897627] init: bluetooth main process ended, respawning [ 6.944912] init: bluetooth main process (4585) terminated with status 1 [ 6.944938] init: bluetooth main process ended, respawning [ 6.975241] init: bluetooth main process (4621) terminated with status 1 [ 6.975270] init: bluetooth main process ended, respawning [ 7.007239] init: bluetooth main process (4657) terminated with status 1 [ 7.007263] init: bluetooth main process ended, respawning [ 7.036926] init: bluetooth main process (4684) terminated with status 1 [ 7.036958] init: bluetooth main process ended, respawning [ 7.068128] init: bluetooth main process (4715) terminated with status 1 [ 7.068146] init: bluetooth respawning too fast, stopped [ 27.652311] kms_render: executing [ 27.652445] [drm:i915_gem_open] [ 27.655001] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted) [ 27.655006] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted) [ 27.655859] [drm:i915_gem_open] [ 27.658441] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted) [ 27.658445] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted) [ 27.658663] kms_render: starting subtest direct-render [ 27.658687] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 27.658700] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 27.658712] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 27.658716] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 27.658722] [drm:drm_mode_getconnector] [CONNECTOR:34:?] [ 27.658728] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] [ 27.658731] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1] [ 27.658745] [drm:edp_panel_vdd_on] Turning eDP port A VDD on [ 27.658793] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f [ 27.659150] [drm:intel_dp_probe_oui] Sink OUI: 0022b9 [ 27.659483] [drm:intel_dp_probe_oui] Branch OUI: 000000 [ 27.659500] [drm:drm_edid_to_eld] ELD: no CEA Extension found [ 27.659507] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes : [ 27.659513] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 27.659518] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa [ 27.659525] [drm:drm_mode_getconnector] [CONNECTOR:34:?] [ 27.659586] [drm:add_framebuffer_internal] [FB:56] [ 27.659592] [drm:add_framebuffer_internal] [FB:58] [ 27.659608] [drm:drm_mode_setcrtc] [CRTC:20] [ 27.659615] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1] [ 27.659620] [drm:intel_crtc_set_config] [CRTC:20] [FB:56] #connectors=1 (x y) (0 0) [ 27.659626] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0 [ 27.659630] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 27.659635] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 27.659640] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains [ 27.659645] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz [ 27.659649] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18 [ 27.659652] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000 [ 27.659657] [drm:intel_modeset_pipe_config] plane bpp: 18, pipe bpp: 18, dithering: 0 [ 27.659661] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 27.659663] [drm:intel_dump_pipe_config] cpu_transcoder: D [ 27.659666] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 0 [ 27.659670] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 27.659675] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64 [ 27.659678] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 27.659681] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 27.659684] [drm:intel_dump_pipe_config] requested mode: [ 27.659689] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 27.659692] [drm:intel_dump_pipe_config] adjusted mode: [ 27.659696] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 27.659702] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa [ 27.659704] [drm:intel_dump_pipe_config] port clock: 540000 [ 27.659707] [drm:intel_dump_pipe_config] pipe src size: 3200x1800 [ 27.659711] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 27.659714] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 27.659717] [drm:intel_dump_pipe_config] ips: 0 [ 27.659719] [drm:intel_dump_pipe_config] double wide: 0 [ 27.659730] [drm:intel_edp_backlight_off] [ 27.860170] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0 [ 27.864260] [drm:edp_panel_off] Turn eDP port A panel power off [ 27.864288] [drm:wait_panel_off] Wait for panel power off time [ 27.864308] [drm:wait_panel_status] mask b0000000 value 00000000 status a0000003 control abcd0000 [ 27.919079] [drm:wait_panel_status] Wait complete [ 27.919112] [drm:intel_fbc_update] no output, disabling [ 27.919128] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801472af300 [ 27.919136] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880004f15b40 state to ffff8801472af300 [ 27.919141] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8801488ff000 state to ffff8801472af300 [ 27.919144] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880004f15b40 to [CRTC:20] [ 27.919148] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff880004f15b40 [ 27.919151] [drm:drm_atomic_check_only] checking ffff8801472af300 [ 27.919158] [drm:drm_atomic_commit] commiting ffff8801472af300 [ 27.924591] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801472af300 [ 27.924598] [drm:drm_atomic_state_free] Freeing atomic state ffff8801472af300 [ 27.924617] [drm:edp_panel_on] Turn eDP port A panel power on [ 27.924627] [drm:wait_panel_power_cycle] Wait for panel power cycle [ 28.465160] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000 [ 28.465172] [drm:wait_panel_status] Wait complete [ 28.465197] [drm:wait_panel_on] Wait for panel power on [ 28.465216] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003 [ 28.674178] [drm:wait_panel_status] Wait complete [ 28.674200] [drm:edp_panel_vdd_on] Turning eDP port A VDD on [ 28.674249] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b [ 28.675373] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 [ 28.676023] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 [ 28.676674] [drm:intel_dp_start_link_train] clock recovery OK [ 28.677628] [drm:intel_dp_set_signal_levels] Using signal levels 05000000 [ 28.678570] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful [ 28.678849] [drm:skl_wm_flush_pipe] flush pipe A (pass 3) [ 28.678865] [drm:intel_edp_backlight_on] [ 28.678869] [drm:intel_panel_enable_backlight] pipe A [ 28.678910] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937 [ 28.678950] [drm:intel_psr_match_conditions] PSR disable by flag [ 28.678953] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS [ 28.678962] [drm:skylake_update_primary_plane] Writing base 000C0000 0,0,3200,1800 pitch=6400 [ 28.678969] [drm:intel_fbc_update] disabled per chip default [ 28.678984] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1] [ 28.678990] [drm:check_encoder_state] [ENCODER:33:TMDS-33] [ 28.678994] [drm:check_encoder_state] [ENCODER:42:TMDS-42] [ 28.678997] [drm:check_encoder_state] [ENCODER:44:DP MST-44] [ 28.679000] [drm:check_encoder_state] [ENCODER:45:DP MST-45] [ 28.679002] [drm:check_encoder_state] [ENCODER:46:DP MST-46] [ 28.679005] [drm:check_encoder_state] [ENCODER:49:TMDS-49] [ 28.679008] [drm:check_encoder_state] [ENCODER:51:DP MST-51] [ 28.679010] [drm:check_encoder_state] [ENCODER:52:DP MST-52] [ 28.679013] [drm:check_encoder_state] [ENCODER:53:DP MST-53] [ 28.679015] [drm:check_crtc_state] [CRTC:20] [ 28.679032] [drm:check_crtc_state] [CRTC:25] [ 28.679035] [drm:check_crtc_state] [CRTC:30] [ 28.679044] [drm:check_shared_dpll_state] DPLL 1 [ 28.679048] [drm:check_shared_dpll_state] DPLL 2 [ 28.679051] [drm:check_shared_dpll_state] DPLL 3 [ 28.745664] ------------[ cut here ]------------ [ 28.745708] WARNING: CPU: 2 PID: 0 at drivers/gpu/drm/i915/intel_display.c:9744 intel_check_page_flip+0xa6/0xc1 [i915]() [ 28.745712] Kicking stuck page flip: queued at 1467, now 1471 [ 28.745715] Modules linked in: dm_mod ppdev snd_hda_codec_realtek snd_hda_codec_generic pcspkr snd_hda_intel snd_hda_controller snd_hda_codec snd_hwdep i2c_i801 snd_pcm snd_timer snd soundcore wmi battery parport_pc parport ac acpi_cpufreq i915 button video drm_kms_helper drm cfbfillrect cfbimgblt cfbcopyarea [ 28.745746] CPU: 2 PID: 0 Comm: swapper/2 Not tainted 3.19.0-rc7_drm-intel-nightly_b4442e_20150208+ #198 [ 28.745750] Hardware name: Intel Corporation Skylake Client platform/Skylake Y LPDDR3 RVP3, BIOS SKLSE2R1.86C.B069.R00.1501192136 01/19/2015 [ 28.745753] 0000000000000000 0000000000000009 ffffffff8179a69b ffff88014e483e18 [ 28.745758] ffffffff8103bdec 00000000000005be ffffffffa00ddb24 0000000000000002 [ 28.745763] ffff880144074000 ffff8801491a8000 0000000000000000 0000000000000001 [ 28.745768] Call Trace: [ 28.745770] [] ? dump_stack+0x40/0x50 [ 28.745787] [] ? warn_slowpath_common+0x98/0xb0 [ 28.745811] [] ? intel_check_page_flip+0xa6/0xc1 [i915] [ 28.745817] [] ? warn_slowpath_fmt+0x45/0x4a [ 28.745843] [] ? __intel_pageflip_stall_check+0xba/0xe7 [i915] [ 28.745864] [] ? intel_check_page_flip+0xa6/0xc1 [i915] [ 28.745889] [] ? gen8_irq_handler+0x1e4/0x334 [i915] [ 28.745898] [] ? handle_irq_event_percpu+0x4f/0x179 [ 28.745904] [] ? run_rebalance_domains+0x36/0x151 [ 28.745910] [] ? handle_irq_event+0x2e/0x4f [ 28.745915] [] ? handle_edge_irq+0xbc/0xd1 [ 28.745920] [] ? handle_irq+0x15/0x20 [ 28.745924] [] ? do_IRQ+0x41/0xc0 [ 28.745929] [] ? common_interrupt+0x6a/0x6a [ 28.745931] [] ? cpuidle_enter_state+0xa5/0x129 [ 28.745941] [] ? cpuidle_enter_state+0x71/0x129 [ 28.745947] [] ? cpu_startup_entry+0x1db/0x2e0 [ 28.745951] ---[ end trace 355831626e6076f6 ]--- [ 31.679434] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off [ 31.679478] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007 [ 37.400339] [drm:intel_crtc_set_config] [CRTC:20] [NOFB] [ 37.400350] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0 [ 37.400355] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [NOCRTC] [ 37.400358] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch [ 37.400361] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch [ 37.400365] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch [ 37.400370] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1 [ 37.400384] [drm:intel_edp_backlight_off] [ 37.601287] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0 [ 37.615299] [drm:edp_panel_vdd_on] Turning eDP port A VDD on [ 37.615352] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b [ 37.615535] [drm:edp_panel_off] Turn eDP port A panel power off [ 37.615559] [drm:wait_panel_off] Wait for panel power off time [ 37.615578] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000 [ 37.670380] [drm:wait_panel_status] Wait complete [ 37.670413] [drm:intel_fbc_update] no output, disabling [ 37.670422] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801472af660 [ 37.670430] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880148961780 state to ffff8801472af660 [ 37.670434] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8801488fc400 state to ffff8801472af660 [ 37.670438] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880148961780 to [NOCRTC] [ 37.670441] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880148961780 [ 37.670444] [drm:drm_atomic_check_only] checking ffff8801472af660 [ 37.670450] [drm:drm_atomic_commit] commiting ffff8801472af660 [ 37.670461] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801472af660 [ 37.670466] [drm:drm_atomic_state_free] Freeing atomic state ffff8801472af660 [ 37.670474] [drm:intel_display_power_put] disabling DDI A/E power well [ 37.670479] [drm:skl_set_power_well] Disabling DDI A/E power well [ 37.670482] [drm:intel_display_power_put] disabling MISC IO power well [ 37.670485] [drm:skl_set_power_well] Disabling MISC IO power well [ 37.670488] [drm:intel_display_power_put] disabling power well 1 [ 37.670493] [drm:skl_set_power_well] Disabling power well 1 [ 37.670525] [drm:check_encoder_state] [ENCODER:33:TMDS-33] [ 37.670528] [drm:check_encoder_state] [ENCODER:42:TMDS-42] [ 37.670531] [drm:check_encoder_state] [ENCODER:44:DP MST-44] [ 37.670534] [drm:check_encoder_state] [ENCODER:45:DP MST-45] [ 37.670536] [drm:check_encoder_state] [ENCODER:46:DP MST-46] [ 37.670539] [drm:check_encoder_state] [ENCODER:49:TMDS-49] [ 37.670542] [drm:check_encoder_state] [ENCODER:51:DP MST-51] [ 37.670544] [drm:check_encoder_state] [ENCODER:52:DP MST-52] [ 37.670547] [drm:check_encoder_state] [ENCODER:53:DP MST-53] [ 37.670550] [drm:check_crtc_state] [CRTC:20] [ 37.670553] [drm:check_crtc_state] [CRTC:25] [ 37.670555] [drm:check_crtc_state] [CRTC:30] [ 37.670559] [drm:check_shared_dpll_state] DPLL 1 [ 37.670562] [drm:check_shared_dpll_state] DPLL 2 [ 37.670564] [drm:check_shared_dpll_state] DPLL 3 [ 37.672553] [drm:add_framebuffer_internal] [FB:56] [ 37.672561] [drm:add_framebuffer_internal] [FB:58] [ 37.672571] [drm:drm_mode_setcrtc] [CRTC:20] [ 37.672578] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1] [ 37.672582] [drm:intel_crtc_set_config] [CRTC:20] [FB:56] #connectors=1 (x y) (0 0) [ 37.672587] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set [ 37.672591] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0 [ 37.672594] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch [ 37.672598] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 37.672601] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch [ 37.672604] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch [ 37.672609] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 37.672613] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains [ 37.672619] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz [ 37.672622] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18 [ 37.672626] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18 [ 37.672630] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000 [ 37.672634] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 [ 37.672638] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 37.672640] [drm:intel_dump_pipe_config] cpu_transcoder: D [ 37.672643] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 [ 37.672647] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 37.672651] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64 [ 37.672655] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 37.672658] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 37.672661] [drm:intel_dump_pipe_config] requested mode: [ 37.672666] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 37.672669] [drm:intel_dump_pipe_config] adjusted mode: [ 37.672674] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 37.672679] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa [ 37.672682] [drm:intel_dump_pipe_config] port clock: 540000 [ 37.672684] [drm:intel_dump_pipe_config] pipe src size: 3200x1800 [ 37.672688] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 37.672691] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 37.672694] [drm:intel_dump_pipe_config] ips: 0 [ 37.672696] [drm:intel_dump_pipe_config] double wide: 0 [ 37.672706] [drm:intel_display_power_get] enabling power well 1 [ 37.672713] [drm:skl_set_power_well] Enabling power well 1 [ 37.672716] [drm:intel_display_power_get] enabling MISC IO power well [ 37.672720] [drm:skl_set_power_well] Enabling MISC IO power well [ 37.672723] [drm:intel_display_power_get] enabling DDI A/E power well [ 37.672727] [drm:skl_set_power_well] Enabling DDI A/E power well [ 37.672732] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801472af660 [ 37.672737] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880148961f00 state to ffff8801472af660 [ 37.672741] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8801488fc000 state to ffff8801472af660 [ 37.672744] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880148961f00 to [CRTC:20] [ 37.672747] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff880148961f00 [ 37.672750] [drm:drm_atomic_check_only] checking ffff8801472af660 [ 37.672755] [drm:drm_atomic_commit] commiting ffff8801472af660 [ 37.682959] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801472af660 [ 37.682966] [drm:drm_atomic_state_free] Freeing atomic state ffff8801472af660 [ 37.682986] [drm:edp_panel_on] Turn eDP port A panel power on [ 37.682996] [drm:wait_panel_power_cycle] Wait for panel power cycle [ 38.216472] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000 [ 38.216484] [drm:wait_panel_status] Wait complete [ 38.216509] [drm:wait_panel_on] Wait for panel power on [ 38.216526] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003 [ 38.425479] [drm:wait_panel_status] Wait complete [ 38.425502] [drm:edp_panel_vdd_on] Turning eDP port A VDD on [ 38.425551] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b [ 38.426668] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 [ 38.427322] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 [ 38.427960] [drm:intel_dp_start_link_train] clock recovery OK [ 38.428910] [drm:intel_dp_set_signal_levels] Using signal levels 05000000 [ 38.429852] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful [ 38.430129] [drm:skl_wm_flush_pipe] flush pipe A (pass 3) [ 38.430141] [drm:intel_edp_backlight_on] [ 38.430144] [drm:intel_panel_enable_backlight] pipe A [ 38.430184] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937 [ 38.430224] [drm:intel_psr_match_conditions] PSR disable by flag [ 38.430227] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS [ 38.430235] [drm:skylake_update_primary_plane] Writing base 02CC0000 0,0,3200,1800 pitch=12800 [ 38.430242] [drm:intel_fbc_update] disabled per chip default [ 38.430256] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1] [ 38.430267] [drm:check_encoder_state] [ENCODER:33:TMDS-33] [ 38.430271] [drm:check_encoder_state] [ENCODER:42:TMDS-42] [ 38.430274] [drm:check_encoder_state] [ENCODER:44:DP MST-44] [ 38.430276] [drm:check_encoder_state] [ENCODER:45:DP MST-45] [ 38.430279] [drm:check_encoder_state] [ENCODER:46:DP MST-46] [ 38.430281] [drm:check_encoder_state] [ENCODER:49:TMDS-49] [ 38.430284] [drm:check_encoder_state] [ENCODER:51:DP MST-51] [ 38.430286] [drm:check_encoder_state] [ENCODER:52:DP MST-52] [ 38.430289] [drm:check_encoder_state] [ENCODER:53:DP MST-53] [ 38.430292] [drm:check_crtc_state] [CRTC:20] [ 38.430308] [drm:check_crtc_state] [CRTC:25] [ 38.430311] [drm:check_crtc_state] [CRTC:30] [ 38.430325] [drm:check_shared_dpll_state] DPLL 1 [ 38.430335] [drm:check_shared_dpll_state] DPLL 2 [ 38.430344] [drm:check_shared_dpll_state] DPLL 3 [ 41.440871] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off [ 41.440915] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007 [ 45.697863] [drm:intel_crtc_set_config] [CRTC:20] [NOFB] [ 45.697873] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0 [ 45.697877] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [NOCRTC] [ 45.697880] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch [ 45.697883] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch [ 45.697887] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch [ 45.697892] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1 [ 105.704863] ------------[ cut here ]------------ [ 105.704954] WARNING: CPU: 0 PID: 5162 at drivers/gpu/drm/i915/intel_display.c:3612 intel_crtc_wait_for_pending_flips+0xec/0x1ad [i915]() [ 105.704957] WARN_ON(wait_event_timeout(dev_priv->pending_flip_queue, !intel_crtc_has_pending_flip(crtc), 60*HZ) == 0) [ 105.704960] Modules linked in: dm_mod ppdev snd_hda_codec_realtek snd_hda_codec_generic pcspkr snd_hda_intel snd_hda_controller snd_hda_codec snd_hwdep i2c_i801 snd_pcm snd_timer snd soundcore wmi battery parport_pc parport ac acpi_cpufreq i915 button video drm_kms_helper drm cfbfillrect cfbimgblt cfbcopyarea [ 105.704993] CPU: 0 PID: 5162 Comm: kms_render Tainted: G W 3.19.0-rc7_drm-intel-nightly_b4442e_20150208+ #198 [ 105.704996] Hardware name: Intel Corporation Skylake Client platform/Skylake Y LPDDR3 RVP3, BIOS SKLSE2R1.86C.B069.R00.1501192136 01/19/2015 [ 105.704999] 0000000000000000 0000000000000009 ffffffff8179a69b ffff880004ceba38 [ 105.705004] ffffffff8103bdec ffffffff833b3a80 ffffffffa00d7244 ffffffff833b3a80 [ 105.705009] ffff8801491a8000 0000000000000000 ffff880144074000 ffff880004d20000 [ 105.705014] Call Trace: [ 105.705024] [] ? dump_stack+0x40/0x50 [ 105.705032] [] ? warn_slowpath_common+0x98/0xb0 [ 105.705056] [] ? intel_crtc_wait_for_pending_flips+0xec/0x1ad [i915] [ 105.705062] [] ? warn_slowpath_fmt+0x45/0x4a [ 105.705071] [] ? prepare_to_wait_event+0xb0/0xec [ 105.705091] [] ? intel_crtc_wait_for_pending_flips+0xec/0x1ad [i915] [ 105.705097] [] ? add_wait_queue+0x3c/0x3c [ 105.705118] [] ? intel_crtc_disable_planes+0x28/0xd9 [i915] [ 105.705137] [] ? haswell_crtc_disable+0x37/0x30b [i915] [ 105.705157] [] ? __intel_set_mode+0x289/0x895 [i915] [ 105.705180] [] ? intel_crtc_set_config+0x7d0/0xbb9 [i915] [ 105.705187] [] ? __ww_mutex_lock+0x15/0x8a [ 105.705200] [] ? drm_modeset_lock+0x52/0xb3 [drm] [ 105.705217] [] ? drm_mode_set_config_internal+0x4e/0xd2 [drm] [ 105.705239] [] ? drm_framebuffer_remove+0x75/0xf8 [drm] [ 105.705254] [] ? drm_mode_rmfb+0xc4/0xed [drm] [ 105.705266] [] ? drm_ioctl+0x279/0x3bc [drm] [ 105.705274] [] ? __inode_wait_for_writeback+0x5c/0xa2 [ 105.705287] [] ? drm_mode_addfb+0x73/0x73 [drm] [ 105.705293] [] ? fsnotify_clear_marks_by_inode+0x9d/0xa4 [ 105.705298] [] ? __dentry_kill+0x148/0x172 [ 105.705304] [] ? do_vfs_ioctl+0x412/0x459 [ 105.705309] [] ? task_work_run+0x84/0x93 [ 105.705314] [] ? SyS_ioctl+0x49/0x78 [ 105.705319] [] ? int_signal+0x12/0x17 [ 105.705324] [] ? system_call_fastpath+0x12/0x17 [ 105.705327] ---[ end trace 355831626e6076f7 ]--- [ 105.705330] ------------[ cut here ]------------ [ 105.705351] WARNING: CPU: 0 PID: 5162 at drivers/gpu/drm/i915/intel_display.c:3617 intel_crtc_wait_for_pending_flips+0x126/0x1ad [i915]() [ 105.705353] Removing stuck page flip [ 105.705355] Modules linked in: dm_mod ppdev snd_hda_codec_realtek snd_hda_codec_generic pcspkr snd_hda_intel snd_hda_controller snd_hda_codec snd_hwdep i2c_i801 snd_pcm snd_timer snd soundcore wmi battery parport_pc parport ac acpi_cpufreq i915 button video drm_kms_helper drm cfbfillrect cfbimgblt cfbcopyarea [ 105.705381] CPU: 0 PID: 5162 Comm: kms_render Tainted: G W 3.19.0-rc7_drm-intel-nightly_b4442e_20150208+ #198 [ 105.705384] Hardware name: Intel Corporation Skylake Client platform/Skylake Y LPDDR3 RVP3, BIOS SKLSE2R1.86C.B069.R00.1501192136 01/19/2015 [ 105.705386] 0000000000000000 0000000000000009 ffffffff8179a69b ffff880004ceba38 [ 105.705390] ffffffff8103bdec ffffffff833b3a80 ffffffffa00d727e ffffffff833b3a80 [ 105.705394] ffff8801491a8000 0000000000000000 ffff880144074000 ffff880004d20000 [ 105.705399] Call Trace: [ 105.705404] [] ? dump_stack+0x40/0x50 [ 105.705410] [] ? warn_slowpath_common+0x98/0xb0 [ 105.705429] [] ? intel_crtc_wait_for_pending_flips+0x126/0x1ad [i915] [ 105.705435] [] ? warn_slowpath_fmt+0x45/0x4a [ 105.705441] [] ? prepare_to_wait_event+0xb0/0xec [ 105.705459] [] ? intel_crtc_wait_for_pending_flips+0x126/0x1ad [i915] [ 105.705465] [] ? add_wait_queue+0x3c/0x3c [ 105.705484] [] ? intel_crtc_disable_planes+0x28/0xd9 [i915] [ 105.705502] [] ? haswell_crtc_disable+0x37/0x30b [i915] [ 105.705520] [] ? __intel_set_mode+0x289/0x895 [i915] [ 105.705542] [] ? intel_crtc_set_config+0x7d0/0xbb9 [i915] [ 105.705548] [] ? __ww_mutex_lock+0x15/0x8a [ 105.705560] [] ? drm_modeset_lock+0x52/0xb3 [drm] [ 105.705575] [] ? drm_mode_set_config_internal+0x4e/0xd2 [drm] [ 105.705588] [] ? drm_framebuffer_remove+0x75/0xf8 [drm] [ 105.705601] [] ? drm_mode_rmfb+0xc4/0xed [drm] [ 105.705613] [] ? drm_ioctl+0x279/0x3bc [drm] [ 105.705620] [] ? __inode_wait_for_writeback+0x5c/0xa2 [ 105.705632] [] ? drm_mode_addfb+0x73/0x73 [drm] [ 105.705637] [] ? fsnotify_clear_marks_by_inode+0x9d/0xa4 [ 105.705641] [] ? __dentry_kill+0x148/0x172 [ 105.705647] [] ? do_vfs_ioctl+0x412/0x459 [ 105.705651] [] ? task_work_run+0x84/0x93 [ 105.705657] [] ? SyS_ioctl+0x49/0x78 [ 105.705661] [] ? int_signal+0x12/0x17 [ 105.705665] [] ? system_call_fastpath+0x12/0x17 [ 105.705668] ---[ end trace 355831626e6076f8 ]--- [ 105.705706] [drm:intel_edp_backlight_off] [ 105.705749] [drm:intel_fbc_update] no output, disabling [ 105.906919] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0 [ 105.922844] [drm:edp_panel_vdd_on] Turning eDP port A VDD on [ 105.922896] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b [ 105.923079] [drm:edp_panel_off] Turn eDP port A panel power off [ 105.923103] [drm:wait_panel_off] Wait for panel power off time [ 105.923122] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000 [ 105.977923] [drm:wait_panel_status] Wait complete [ 105.977961] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801472afd80 [ 105.977969] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880004ddb9c0 state to ffff8801472afd80 [ 105.977975] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8801488fc400 state to ffff8801472afd80 [ 105.977978] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880004ddb9c0 to [NOCRTC] [ 105.977982] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880004ddb9c0 [ 105.977985] [drm:drm_atomic_check_only] checking ffff8801472afd80 [ 105.977990] [drm:drm_atomic_commit] commiting ffff8801472afd80 [ 105.978002] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801472afd80 [ 105.978007] [drm:drm_atomic_state_free] Freeing atomic state ffff8801472afd80 [ 105.978015] [drm:intel_display_power_put] disabling DDI A/E power well [ 105.978020] [drm:skl_set_power_well] Disabling DDI A/E power well [ 105.978022] [drm:intel_display_power_put] disabling MISC IO power well [ 105.978026] [drm:skl_set_power_well] Disabling MISC IO power well [ 105.978029] [drm:intel_display_power_put] disabling power well 1 [ 105.978034] [drm:skl_set_power_well] Disabling power well 1 [ 105.978066] [drm:check_encoder_state] [ENCODER:33:TMDS-33] [ 105.978070] [drm:check_encoder_state] [ENCODER:42:TMDS-42] [ 105.978073] [drm:check_encoder_state] [ENCODER:44:DP MST-44] [ 105.978076] [drm:check_encoder_state] [ENCODER:45:DP MST-45] [ 105.978078] [drm:check_encoder_state] [ENCODER:46:DP MST-46] [ 105.978081] [drm:check_encoder_state] [ENCODER:49:TMDS-49] [ 105.978084] [drm:check_encoder_state] [ENCODER:51:DP MST-51] [ 105.978086] [drm:check_encoder_state] [ENCODER:52:DP MST-52] [ 105.978088] [drm:check_encoder_state] [ENCODER:53:DP MST-53] [ 105.978092] [drm:check_crtc_state] [CRTC:20] [ 105.978095] [drm:check_crtc_state] [CRTC:25] [ 105.978098] [drm:check_crtc_state] [CRTC:30] [ 105.978101] [drm:check_shared_dpll_state] DPLL 1 [ 105.978104] [drm:check_shared_dpll_state] DPLL 2 [ 105.978106] [drm:check_shared_dpll_state] DPLL 3 [ 105.981817] [drm:add_framebuffer_internal] [FB:56] [ 105.981825] [drm:add_framebuffer_internal] [FB:58] [ 105.981834] [drm:drm_mode_setcrtc] [CRTC:20] [ 105.981840] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1] [ 105.981845] [drm:intel_crtc_set_config] [CRTC:20] [FB:56] #connectors=1 (x y) (0 0) [ 105.981850] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set [ 105.981854] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0 [ 105.981857] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch [ 105.981861] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 105.981864] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch [ 105.981867] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch [ 105.981872] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 105.981877] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains [ 105.981880] [drm:connected_sink_compute_bpp] clamping display bpp (was 30) to default limit of 24 [ 105.981886] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz [ 105.981889] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18 [ 105.981893] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18 [ 105.981896] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000 [ 105.981901] [drm:intel_modeset_pipe_config] plane bpp: 30, pipe bpp: 18, dithering: 1 [ 105.981904] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 105.981907] [drm:intel_dump_pipe_config] cpu_transcoder: D [ 105.981910] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 [ 105.981914] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 105.981918] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64 [ 105.981922] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 105.981925] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 105.981928] [drm:intel_dump_pipe_config] requested mode: [ 105.981934] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 105.981937] [drm:intel_dump_pipe_config] adjusted mode: [ 105.981941] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 105.981946] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa [ 105.981949] [drm:intel_dump_pipe_config] port clock: 540000 [ 105.981952] [drm:intel_dump_pipe_config] pipe src size: 3200x1800 [ 105.981955] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 105.981959] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 105.981961] [drm:intel_dump_pipe_config] ips: 0 [ 105.981964] [drm:intel_dump_pipe_config] double wide: 0 [ 105.981972] [drm:intel_display_power_get] enabling power well 1 [ 105.981979] [drm:skl_set_power_well] Enabling power well 1 [ 105.981982] [drm:intel_display_power_get] enabling MISC IO power well [ 105.981986] [drm:skl_set_power_well] Enabling MISC IO power well [ 105.981989] [drm:intel_display_power_get] enabling DDI A/E power well [ 105.981993] [drm:skl_set_power_well] Enabling DDI A/E power well [ 105.981998] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801472afd80 [ 105.982003] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880004ddb840 state to ffff8801472afd80 [ 105.982007] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8801488fec00 state to ffff8801472afd80 [ 105.982011] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880004ddb840 to [CRTC:20] [ 105.982014] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff880004ddb840 [ 105.982017] [drm:drm_atomic_check_only] checking ffff8801472afd80 [ 105.982022] [drm:drm_atomic_commit] commiting ffff8801472afd80 [ 105.992390] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801472afd80 [ 105.992395] [drm:drm_atomic_state_free] Freeing atomic state ffff8801472afd80 [ 105.992415] [drm:edp_panel_on] Turn eDP port A panel power on [ 105.992424] [drm:wait_panel_power_cycle] Wait for panel power cycle [ 106.523988] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control abcd0000 [ 106.534994] [drm:wait_panel_status] Wait complete [ 106.535023] [drm:wait_panel_on] Wait for panel power on [ 106.535042] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003 [ 106.744017] [drm:wait_panel_status] Wait complete [ 106.744040] [drm:edp_panel_vdd_on] Turning eDP port A VDD on [ 106.744089] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b [ 106.745199] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 [ 106.745851] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 [ 106.746489] [drm:intel_dp_start_link_train] clock recovery OK [ 106.747440] [drm:intel_dp_set_signal_levels] Using signal levels 05000000 [ 106.748382] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful [ 106.748660] [drm:skl_wm_flush_pipe] flush pipe A (pass 3) [ 106.748672] [drm:intel_edp_backlight_on] [ 106.748676] [drm:intel_panel_enable_backlight] pipe A [ 106.748716] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937 [ 106.748756] [drm:intel_psr_match_conditions] PSR disable by flag [ 106.748759] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS [ 106.748767] [drm:skylake_update_primary_plane] Writing base 02CC0000 0,0,3200,1800 pitch=12800 [ 106.748773] [drm:intel_fbc_update] disabled per chip default [ 106.748787] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1] [ 106.748793] [drm:check_encoder_state] [ENCODER:33:TMDS-33] [ 106.748802] [drm:check_encoder_state] [ENCODER:42:TMDS-42] [ 106.748806] [drm:check_encoder_state] [ENCODER:44:DP MST-44] [ 106.748808] [drm:check_encoder_state] [ENCODER:45:DP MST-45] [ 106.748811] [drm:check_encoder_state] [ENCODER:46:DP MST-46] [ 106.748813] [drm:check_encoder_state] [ENCODER:49:TMDS-49] [ 106.748816] [drm:check_encoder_state] [ENCODER:51:DP MST-51] [ 106.748818] [drm:check_encoder_state] [ENCODER:52:DP MST-52] [ 106.748821] [drm:check_encoder_state] [ENCODER:53:DP MST-53] [ 106.748823] [drm:check_crtc_state] [CRTC:20] [ 106.748840] [drm:check_crtc_state] [CRTC:25] [ 106.748843] [drm:check_crtc_state] [CRTC:30] [ 106.748846] [drm:check_shared_dpll_state] DPLL 1 [ 106.748850] [drm:check_shared_dpll_state] DPLL 2 [ 106.748863] [drm:check_shared_dpll_state] DPLL 3 [ 109.753191] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off [ 109.753235] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007 [ 117.276143] [drm:intel_crtc_set_config] [CRTC:20] [NOFB] [ 117.276156] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0 [ 117.276162] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [NOCRTC] [ 117.276164] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch [ 117.276168] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch [ 117.276171] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch [ 117.276176] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1 [ 177.283748] ------------[ cut here ]------------ [ 177.283822] WARNING: CPU: 0 PID: 5162 at drivers/gpu/drm/i915/intel_display.c:3612 intel_crtc_wait_for_pending_flips+0xec/0x1ad [i915]() [ 177.283825] WARN_ON(wait_event_timeout(dev_priv->pending_flip_queue, !intel_crtc_has_pending_flip(crtc), 60*HZ) == 0) [ 177.283828] Modules linked in: dm_mod ppdev snd_hda_codec_realtek snd_hda_codec_generic pcspkr snd_hda_intel snd_hda_controller snd_hda_codec snd_hwdep i2c_i801 snd_pcm snd_timer snd soundcore wmi battery parport_pc parport ac acpi_cpufreq i915 button video drm_kms_helper drm cfbfillrect cfbimgblt cfbcopyarea [ 177.283860] CPU: 0 PID: 5162 Comm: kms_render Tainted: G W 3.19.0-rc7_drm-intel-nightly_b4442e_20150208+ #198 [ 177.283863] Hardware name: Intel Corporation Skylake Client platform/Skylake Y LPDDR3 RVP3, BIOS SKLSE2R1.86C.B069.R00.1501192136 01/19/2015 [ 177.283866] 0000000000000000 0000000000000009 ffffffff8179a69b ffff880004ceba38 [ 177.283871] ffffffff8103bdec ffffffff833b3a80 ffffffffa00d7244 ffffffff833b3a80 [ 177.283875] ffff8801491a8000 0000000000000000 ffff880144074000 ffff880004d20000 [ 177.283880] Call Trace: [ 177.283890] [] ? dump_stack+0x40/0x50 [ 177.283899] [] ? warn_slowpath_common+0x98/0xb0 [ 177.283922] [] ? intel_crtc_wait_for_pending_flips+0xec/0x1ad [i915] [ 177.283929] [] ? warn_slowpath_fmt+0x45/0x4a [ 177.283937] [] ? prepare_to_wait_event+0xb0/0xec [ 177.283957] [] ? intel_crtc_wait_for_pending_flips+0xec/0x1ad [i915] [ 177.283963] [] ? add_wait_queue+0x3c/0x3c [ 177.283985] [] ? intel_crtc_disable_planes+0x28/0xd9 [i915] [ 177.284003] [] ? haswell_crtc_disable+0x37/0x30b [i915] [ 177.284023] [] ? __intel_set_mode+0x289/0x895 [i915] [ 177.284047] [] ? intel_crtc_set_config+0x7d0/0xbb9 [i915] [ 177.284053] [] ? __ww_mutex_lock+0x15/0x8a [ 177.284066] [] ? drm_modeset_lock+0x52/0xb3 [drm] [ 177.284082] [] ? drm_mode_set_config_internal+0x4e/0xd2 [drm] [ 177.284097] [] ? drm_framebuffer_remove+0x75/0xf8 [drm] [ 177.284123] [] ? drm_mode_rmfb+0xc4/0xed [drm] [ 177.284135] [] ? drm_ioctl+0x279/0x3bc [drm] [ 177.284147] [] ? drm_mode_addfb+0x73/0x73 [drm] [ 177.284154] [] ? fsnotify_clear_marks_by_inode+0x9d/0xa4 [ 177.284159] [] ? __dentry_kill+0x148/0x172 [ 177.284165] [] ? do_vfs_ioctl+0x412/0x459 [ 177.284170] [] ? task_work_run+0x84/0x93 [ 177.284175] [] ? SyS_ioctl+0x49/0x78 [ 177.284180] [] ? int_signal+0x12/0x17 [ 177.284184] [] ? system_call_fastpath+0x12/0x17 [ 177.284188] ---[ end trace 355831626e6076f9 ]--- [ 177.284212] [drm:intel_edp_backlight_off] [ 177.284266] [drm:intel_fbc_update] no output, disabling [ 177.484768] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0 [ 177.492792] [drm:edp_panel_vdd_on] Turning eDP port A VDD on [ 177.492844] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b [ 177.493026] [drm:edp_panel_off] Turn eDP port A panel power off [ 177.493051] [drm:wait_panel_off] Wait for panel power off time [ 177.493069] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000 [ 177.547872] [drm:wait_panel_status] Wait complete [ 177.547911] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801472afd80 [ 177.547919] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880004ddb600 state to ffff8801472afd80 [ 177.547924] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8801488fec00 state to ffff8801472afd80 [ 177.547928] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880004ddb600 to [NOCRTC] [ 177.547931] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880004ddb600 [ 177.547934] [drm:drm_atomic_check_only] checking ffff8801472afd80 [ 177.547940] [drm:drm_atomic_commit] commiting ffff8801472afd80 [ 177.547952] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801472afd80 [ 177.547956] [drm:drm_atomic_state_free] Freeing atomic state ffff8801472afd80 [ 177.547964] [drm:intel_display_power_put] disabling DDI A/E power well [ 177.547968] [drm:skl_set_power_well] Disabling DDI A/E power well [ 177.547971] [drm:intel_display_power_put] disabling MISC IO power well [ 177.547975] [drm:skl_set_power_well] Disabling MISC IO power well [ 177.547977] [drm:intel_display_power_put] disabling power well 1 [ 177.547982] [drm:skl_set_power_well] Disabling power well 1 [ 177.548014] [drm:check_encoder_state] [ENCODER:33:TMDS-33] [ 177.548018] [drm:check_encoder_state] [ENCODER:42:TMDS-42] [ 177.548021] [drm:check_encoder_state] [ENCODER:44:DP MST-44] [ 177.548024] [drm:check_encoder_state] [ENCODER:45:DP MST-45] [ 177.548026] [drm:check_encoder_state] [ENCODER:46:DP MST-46] [ 177.548029] [drm:check_encoder_state] [ENCODER:49:TMDS-49] [ 177.548032] [drm:check_encoder_state] [ENCODER:51:DP MST-51] [ 177.548034] [drm:check_encoder_state] [ENCODER:52:DP MST-52] [ 177.548037] [drm:check_encoder_state] [ENCODER:53:DP MST-53] [ 177.548039] [drm:check_crtc_state] [CRTC:20] [ 177.548043] [drm:check_crtc_state] [CRTC:25] [ 177.548045] [drm:check_crtc_state] [CRTC:30] [ 177.548049] [drm:check_shared_dpll_state] DPLL 1 [ 177.548052] [drm:check_shared_dpll_state] DPLL 2 [ 177.548054] [drm:check_shared_dpll_state] DPLL 3 [ 177.551777] [drm:add_framebuffer_internal] [FB:56] [ 177.551784] [drm:add_framebuffer_internal] [FB:58] [ 177.551794] [drm:drm_mode_setcrtc] [CRTC:20] [ 177.551800] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1] [ 177.551805] [drm:intel_crtc_set_config] [CRTC:20] [FB:56] #connectors=1 (x y) (0 0) [ 177.551811] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set [ 177.551814] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0 [ 177.551817] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch [ 177.551821] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 177.551824] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch [ 177.551828] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch [ 177.551832] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 177.551837] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains [ 177.551843] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz [ 177.551846] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18 [ 177.551850] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18 [ 177.551853] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000 [ 177.551858] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 [ 177.551861] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 177.551864] [drm:intel_dump_pipe_config] cpu_transcoder: D [ 177.551867] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 [ 177.551871] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 177.551875] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64 [ 177.551879] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 177.551882] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 177.551884] [drm:intel_dump_pipe_config] requested mode: [ 177.551890] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 177.551893] [drm:intel_dump_pipe_config] adjusted mode: [ 177.551898] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 177.551903] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa [ 177.551906] [drm:intel_dump_pipe_config] port clock: 540000 [ 177.551908] [drm:intel_dump_pipe_config] pipe src size: 3200x1800 [ 177.551912] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 177.551915] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 177.551918] [drm:intel_dump_pipe_config] ips: 0 [ 177.551921] [drm:intel_dump_pipe_config] double wide: 0 [ 177.551929] [drm:intel_display_power_get] enabling power well 1 [ 177.551936] [drm:skl_set_power_well] Enabling power well 1 [ 177.551939] [drm:intel_display_power_get] enabling MISC IO power well [ 177.551943] [drm:skl_set_power_well] Enabling MISC IO power well [ 177.551946] [drm:intel_display_power_get] enabling DDI A/E power well [ 177.551950] [drm:skl_set_power_well] Enabling DDI A/E power well [ 177.551955] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801472afd80 [ 177.551960] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880004ddb780 state to ffff8801472afd80 [ 177.551964] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8801488fc400 state to ffff8801472afd80 [ 177.551967] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880004ddb780 to [CRTC:20] [ 177.551971] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff880004ddb780 [ 177.551974] [drm:drm_atomic_check_only] checking ffff8801472afd80 [ 177.551979] [drm:drm_atomic_commit] commiting ffff8801472afd80 [ 177.562134] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801472afd80 [ 177.562141] [drm:drm_atomic_state_free] Freeing atomic state ffff8801472afd80 [ 177.562160] [drm:edp_panel_on] Turn eDP port A panel power on [ 177.562170] [drm:wait_panel_power_cycle] Wait for panel power cycle [ 178.093953] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000 [ 178.093966] [drm:wait_panel_status] Wait complete [ 178.093991] [drm:wait_panel_on] Wait for panel power on [ 178.094009] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003 [ 178.302967] [drm:wait_panel_status] Wait complete [ 178.302990] [drm:edp_panel_vdd_on] Turning eDP port A VDD on [ 178.303038] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b [ 178.304149] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 [ 178.304802] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 [ 178.305444] [drm:intel_dp_start_link_train] clock recovery OK [ 178.306405] [drm:intel_dp_set_signal_levels] Using signal levels 05000000 [ 178.307357] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful [ 178.307653] [drm:skl_wm_flush_pipe] flush pipe A (pass 3) [ 178.307668] [drm:intel_edp_backlight_on] [ 178.307672] [drm:intel_panel_enable_backlight] pipe A [ 178.307713] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937 [ 178.307760] [drm:intel_psr_match_conditions] PSR disable by flag [ 178.307764] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS [ 178.307794] ------------[ cut here ]------------ [ 178.307853] kernel BUG at drivers/gpu/drm/i915/intel_display.c:2766! [ 178.307923] invalid opcode: 0000 [#1] SMP [ 178.307976] Modules linked in: dm_mod ppdev snd_hda_codec_realtek snd_hda_codec_generic pcspkr snd_hda_intel snd_hda_controller snd_hda_codec snd_hwdep i2c_i801 snd_pcm snd_timer snd soundcore wmi battery parport_pc parport ac acpi_cpufreq i915 button video drm_kms_helper drm cfbfillrect cfbimgblt cfbcopyarea [ 178.308367] CPU: 0 PID: 5162 Comm: kms_render Tainted: G W 3.19.0-rc7_drm-intel-nightly_b4442e_20150208+ #198 [ 178.308485] Hardware name: Intel Corporation Skylake Client platform/Skylake Y LPDDR3 RVP3, BIOS SKLSE2R1.86C.B069.R00.1501192136 01/19/2015 [ 178.308622] task: ffff88014874e800 ti: ffff880004ce8000 task.ti: ffff880004ce8000 [ 178.308704] RIP: 0010:[] [] skylake_update_primary_plane+0xbc/0x28a [i915] [ 178.308849] RSP: 0018:ffff880004cebaa8 EFLAGS: 00010293 [ 178.308908] RAX: 0000000034325241 RBX: ffff880004d20000 RCX: 0000000000000000 [ 178.308985] RDX: 0000000000000000 RSI: ffff880004ddb0c0 RDI: ffff8801491a8000 [ 178.309063] RBP: 0000000000000000 R08: ffff880004ddb0c0 R09: 00000000fffffffe [ 178.309141] R10: ffff880004d29900 R11: ffff880004d29900 R12: ffff880004d20000 [ 178.309217] R13: ffff8801491a8000 R14: 0000000000000000 R15: 0000000000000000 [ 178.309294] FS: 00007fe4aef8d8c0(0000) GS:ffff88014e400000(0000) knlGS:0000000000000000 [ 178.309383] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 178.309447] CR2: 000000000091f498 CR3: 00000000893d8000 CR4: 00000000003407f0 [ 178.309524] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 [ 178.309602] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 [ 178.309677] Stack: [ 178.309701] ffff880004d28970 ffff880004d20000 0000000044074001 0000000000000000 [ 178.309795] 0000000000000003 ffff880100000000 0000000000000000 ffff8801491a8000 [ 178.309889] ffff880144074000 ffff880004d20000 ffff8801441e5400 ffff8801491a8000 [ 178.309982] Call Trace: [ 178.310042] [] ? intel_enable_primary_hw_plane+0x55/0x83 [i915] [ 178.310149] [] ? intel_crtc_enable_planes+0x25/0xc3 [i915] [ 178.310251] [] ? __intel_set_mode+0x7e5/0x895 [i915] [ 178.310347] [] ? intel_crtc_set_config+0x7d0/0xbb9 [i915] [ 178.310428] [] ? printk+0x48/0x4d [ 178.310502] [] ? drm_mode_set_config_internal+0x4e/0xd2 [drm] [ 178.310598] [] ? drm_mode_setcrtc+0x404/0x4a9 [drm] [ 178.310682] [] ? drm_ioctl+0x279/0x3bc [drm] [ 178.310750] [] ? set_next_entity+0x14/0x37 [ 178.310826] [] ? drm_mode_setplane+0x1e4/0x1e4 [drm] [ 178.310904] [] ? do_vfs_ioctl+0x412/0x459 [ 178.310971] [] ? vfs_write+0x127/0x183 [ 178.311033] [] ? SyS_ioctl+0x49/0x78 [ 178.311095] [] ? system_call_fastpath+0x12/0x17 [ 178.311163] Code: 33 30 75 27 eb 17 3d 58 52 32 34 74 27 3d 52 47 31 36 75 17 eb 17 b8 00 00 90 c4 eb 1c b8 00 00 80 c2 eb 15 b8 00 00 90 c2 eb 0e <0f> 0b b8 00 00 80 ce eb 05 b8 00 00 80 c4 4d 8b b8 88 00 00 00 [ 178.311565] RIP [] skylake_update_primary_plane+0xbc/0x28a [i915] [ 178.311677] RSP [ 178.373869] ---[ end trace 355831626e6076fa ]--- [ 181.314247] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off [ 181.314292] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007