[ 5.012028] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 5.012032] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64 [ 5.012035] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 5.012038] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 5.012040] [drm:intel_dump_pipe_config] requested mode: [ 5.012047] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 5.012048] [drm:intel_dump_pipe_config] adjusted mode: [ 5.012054] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 5.012060] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa [ 5.012062] [drm:intel_dump_pipe_config] port clock: 540000 [ 5.012064] [drm:intel_dump_pipe_config] pipe src size: 3200x1800 [ 5.012067] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 5.012070] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 5.012072] [drm:intel_dump_pipe_config] ips: 0 [ 5.012074] [drm:intel_dump_pipe_config] double wide: 0 [ 5.072253] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0) [ 5.072261] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 5.072269] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 5.072279] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 5.072284] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains [ 5.072292] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 540000 pixel clock 361310KHz [ 5.072295] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18 [ 5.072299] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18 [ 5.072302] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000 [ 5.072306] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 [ 5.072309] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 5.072311] [drm:intel_dump_pipe_config] cpu_transcoder: D [ 5.072314] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 [ 5.072318] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 5.072322] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64 [ 5.072325] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 5.072327] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 5.072329] [drm:intel_dump_pipe_config] requested mode: [ 5.072336] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 5.072338] [drm:intel_dump_pipe_config] adjusted mode: [ 5.072344] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 5.072349] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa [ 5.072351] [drm:intel_dump_pipe_config] port clock: 540000 [ 5.072354] [drm:intel_dump_pipe_config] pipe src size: 3200x1800 [ 5.072357] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 5.072360] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 5.072362] [drm:intel_dump_pipe_config] ips: 0 [ 5.072364] [drm:intel_dump_pipe_config] double wide: 0 [ 5.117198] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0) [ 5.117224] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 5.117233] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 5.117242] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 5.117247] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains [ 5.117254] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 540000 pixel clock 361310KHz [ 5.117257] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18 [ 5.117261] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18 [ 5.117264] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000 [ 5.117268] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 [ 5.117271] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 5.117273] [drm:intel_dump_pipe_config] cpu_transcoder: D [ 5.117276] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 [ 5.117280] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 5.117284] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64 [ 5.117287] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 5.117290] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 5.117291] [drm:intel_dump_pipe_config] requested mode: [ 5.117298] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 5.117300] [drm:intel_dump_pipe_config] adjusted mode: [ 5.117305] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 5.117311] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa [ 5.117313] [drm:intel_dump_pipe_config] port clock: 540000 [ 5.117315] [drm:intel_dump_pipe_config] pipe src size: 3200x1800 [ 5.117318] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 5.117321] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 5.117323] [drm:intel_dump_pipe_config] ips: 0 [ 5.117324] [drm:intel_dump_pipe_config] double wide: 0 [ 5.246823] Adding 16440316k swap on /dev/sda3. Priority:-1 extents:1 across:16440316k SS [ 5.254101] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0) [ 5.254108] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 5.254117] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 5.254126] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 5.254131] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains [ 5.254139] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 540000 pixel clock 361310KHz [ 5.254141] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18 [ 5.254145] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18 [ 5.254148] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000 [ 5.254152] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 [ 5.254155] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 5.254157] [drm:intel_dump_pipe_config] cpu_transcoder: D [ 5.254159] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 [ 5.254163] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 5.254168] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64 [ 5.254172] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 5.254175] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 5.254177] [drm:intel_dump_pipe_config] requested mode: [ 5.254183] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 5.254185] [drm:intel_dump_pipe_config] adjusted mode: [ 5.254190] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 5.254195] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa [ 5.254197] [drm:intel_dump_pipe_config] port clock: 540000 [ 5.254200] [drm:intel_dump_pipe_config] pipe src size: 3200x1800 [ 5.254203] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 5.254206] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 5.254208] [drm:intel_dump_pipe_config] ips: 0 [ 5.254210] [drm:intel_dump_pipe_config] double wide: 0 [ 5.377086] EXT4-fs (sda2): re-mounted. Opts: errors=remount-ro [ 5.633219] init: Failed to obtain startpar-bridge instance: Unknown parameter: INSTANCE [ 5.959232] init: failsafe main process (4067) killed by TERM signal [ 6.170007] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off [ 6.170073] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007 [ 6.251877] init: bluetooth main process (4144) terminated with status 1 [ 6.251903] init: bluetooth main process ended, respawning [ 6.311934] random: nonblocking pool is initialized [ 6.356089] init: bluetooth main process (4232) terminated with status 1 [ 6.356119] init: bluetooth main process ended, respawning [ 6.422243] init: cups main process (4213) killed by HUP signal [ 6.422269] init: cups main process ended, respawning [ 6.434967] init: bluetooth main process (4263) terminated with status 1 [ 6.435022] init: bluetooth main process ended, respawning [ 6.502433] init: bluetooth main process (4301) terminated with status 1 [ 6.502462] init: bluetooth main process ended, respawning [ 6.553010] init: bluetooth main process (4346) terminated with status 1 [ 6.553036] init: bluetooth main process ended, respawning [ 6.564282] asix 1-5:1.0 eth0: link up, 100Mbps, full-duplex, lpa 0x45E1 [ 6.708760] asix 1-5:1.0 eth0: link up, 100Mbps, full-duplex, lpa 0x45E1 [ 6.976065] init: bluetooth main process (4459) terminated with status 1 [ 6.976091] init: bluetooth main process ended, respawning [ 7.118706] init: gdm main process (4433) killed by TERM signal [ 7.122205] init: bluetooth main process (4550) terminated with status 1 [ 7.122231] init: bluetooth main process ended, respawning [ 7.179981] init: bluetooth main process (4584) terminated with status 1 [ 7.180000] init: bluetooth main process ended, respawning [ 7.217832] init: bluetooth main process (4613) terminated with status 1 [ 7.217859] init: bluetooth main process ended, respawning [ 7.255865] init: bluetooth main process (4637) terminated with status 1 [ 7.255885] init: bluetooth main process ended, respawning [ 7.292829] init: bluetooth main process (4661) terminated with status 1 [ 7.292855] init: bluetooth respawning too fast, stopped [ 33.229482] kms_flip: executing [ 33.229698] [drm:i915_gem_open] [ 33.231327] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted) [ 33.231333] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted) [ 33.232385] [drm:i915_gem_open] [ 33.233876] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted) [ 33.233881] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted) [ 33.233909] [drm:i915_gem_open] [ 33.235330] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted) [ 33.235334] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted) [ 33.235350] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.235367] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.235383] [drm:drm_mode_getconnector] [CONNECTOR:34:?] [ 33.235389] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] [ 33.235394] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1] [ 33.235417] [drm:edp_panel_vdd_on] Turning eDP port A VDD on [ 33.235500] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f [ 33.235901] [drm:intel_dp_probe_oui] Sink OUI: 0022b9 [ 33.236267] [drm:intel_dp_probe_oui] Branch OUI: 000000 [ 33.236289] [drm:drm_edid_to_eld] ELD: no CEA Extension found [ 33.236297] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes : [ 33.236305] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 33.236311] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa [ 33.236323] [drm:drm_mode_getconnector] [CONNECTOR:34:?] [ 33.236335] [drm:drm_mode_getconnector] [CONNECTOR:43:?] [ 33.236339] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] [ 33.236342] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] [ 33.236347] [drm:intel_display_power_get] enabling power well 2 [ 33.236351] [drm:skl_set_power_well] Enabling power well 2 [ 33.236362] [drm:intel_display_power_get] enabling DDI B power well [ 33.236366] [drm:skl_set_power_well] Enabling DDI B power well [ 33.236384] [drm:intel_display_power_put] disabling DDI B power well [ 33.236388] [drm:skl_set_power_well] Disabling DDI B power well [ 33.236391] [drm:intel_display_power_put] disabling power well 2 [ 33.236396] [drm:skl_set_power_well] Disabling power well 2 [ 33.236400] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected [ 33.236405] [drm:drm_mode_getconnector] [CONNECTOR:43:?] [ 33.236408] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] [ 33.236411] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] [ 33.236414] [drm:intel_display_power_get] enabling power well 2 [ 33.236418] [drm:skl_set_power_well] Enabling power well 2 [ 33.236426] [drm:intel_display_power_get] enabling DDI B power well [ 33.236430] [drm:skl_set_power_well] Enabling DDI B power well [ 33.236463] [drm:intel_display_power_put] disabling DDI B power well [ 33.236468] [drm:skl_set_power_well] Disabling DDI B power well [ 33.236482] [drm:intel_display_power_put] disabling power well 2 [ 33.236496] [drm:skl_set_power_well] Disabling power well 2 [ 33.236509] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected [ 33.236534] [drm:drm_mode_getconnector] [CONNECTOR:47:?] [ 33.236547] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] [ 33.236556] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1] [ 33.236559] [drm:intel_display_power_get] enabling power well 2 [ 33.236563] [drm:skl_set_power_well] Enabling power well 2 [ 33.236571] [drm:intel_display_power_get] enabling DDI B power well [ 33.236574] [drm:skl_set_power_well] Enabling DDI B power well [ 33.236930] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) [ 33.236939] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb [ 33.236944] [drm:intel_display_power_put] disabling DDI B power well [ 33.236949] [drm:skl_set_power_well] Disabling DDI B power well [ 33.236953] [drm:intel_display_power_put] disabling power well 2 [ 33.236957] [drm:skl_set_power_well] Disabling power well 2 [ 33.236962] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected [ 33.236972] [drm:drm_mode_getconnector] [CONNECTOR:47:?] [ 33.236976] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] [ 33.236980] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1] [ 33.236984] [drm:intel_display_power_get] enabling power well 2 [ 33.236988] [drm:skl_set_power_well] Enabling power well 2 [ 33.236997] [drm:intel_display_power_get] enabling DDI B power well [ 33.237001] [drm:skl_set_power_well] Enabling DDI B power well [ 33.237302] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) [ 33.237306] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb [ 33.237309] [drm:intel_display_power_put] disabling DDI B power well [ 33.237314] [drm:skl_set_power_well] Disabling DDI B power well [ 33.237317] [drm:intel_display_power_put] disabling power well 2 [ 33.237321] [drm:skl_set_power_well] Disabling power well 2 [ 33.237325] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected [ 33.237335] [drm:drm_mode_getconnector] [CONNECTOR:50:?] [ 33.237339] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] [ 33.237342] [drm:intel_dp_detect] [CONNECTOR:50:DP-2] [ 33.237346] [drm:intel_display_power_get] enabling power well 2 [ 33.237350] [drm:skl_set_power_well] Enabling power well 2 [ 33.237357] [drm:intel_display_power_get] enabling DDI C power well [ 33.237361] [drm:skl_set_power_well] Enabling DDI C power well [ 33.237379] [drm:intel_display_power_put] disabling DDI C power well [ 33.237383] [drm:skl_set_power_well] Disabling DDI C power well [ 33.237386] [drm:intel_display_power_put] disabling power well 2 [ 33.237391] [drm:skl_set_power_well] Disabling power well 2 [ 33.237395] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected [ 33.237399] [drm:drm_mode_getconnector] [CONNECTOR:50:?] [ 33.237402] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] [ 33.237406] [drm:intel_dp_detect] [CONNECTOR:50:DP-2] [ 33.237409] [drm:intel_display_power_get] enabling power well 2 [ 33.237412] [drm:skl_set_power_well] Enabling power well 2 [ 33.237420] [drm:intel_display_power_get] enabling DDI C power well [ 33.237424] [drm:skl_set_power_well] Enabling DDI C power well [ 33.237441] [drm:intel_display_power_put] disabling DDI C power well [ 33.237446] [drm:skl_set_power_well] Disabling DDI C power well [ 33.237464] [drm:intel_display_power_put] disabling power well 2 [ 33.237468] [drm:skl_set_power_well] Disabling power well 2 [ 33.237472] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected [ 33.237478] [drm:drm_mode_getconnector] [CONNECTOR:54:?] [ 33.237482] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] [ 33.237485] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2] [ 33.237488] [drm:intel_display_power_get] enabling power well 2 [ 33.237492] [drm:skl_set_power_well] Enabling power well 2 [ 33.237500] [drm:intel_display_power_get] enabling DDI C power well [ 33.237504] [drm:skl_set_power_well] Enabling DDI C power well [ 33.237857] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) [ 33.237865] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc [ 33.237870] [drm:intel_display_power_put] disabling DDI C power well [ 33.237875] [drm:skl_set_power_well] Disabling DDI C power well [ 33.237879] [drm:intel_display_power_put] disabling power well 2 [ 33.237883] [drm:skl_set_power_well] Disabling power well 2 [ 33.237888] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected [ 33.237897] [drm:drm_mode_getconnector] [CONNECTOR:54:?] [ 33.237902] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] [ 33.237905] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2] [ 33.237909] [drm:intel_display_power_get] enabling power well 2 [ 33.237913] [drm:skl_set_power_well] Enabling power well 2 [ 33.237923] [drm:intel_display_power_get] enabling DDI C power well [ 33.237926] [drm:skl_set_power_well] Enabling DDI C power well [ 33.238228] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) [ 33.238233] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc [ 33.238236] [drm:intel_display_power_put] disabling DDI C power well [ 33.238240] [drm:skl_set_power_well] Disabling DDI C power well [ 33.238244] [drm:intel_display_power_put] disabling power well 2 [ 33.238248] [drm:skl_set_power_well] Disabling power well 2 [ 33.238252] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected [ 33.239538] kms_flip: starting subtest absolute-wf_vblank [ 33.239579] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.239587] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.239671] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.239677] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.239683] [drm:drm_mode_getconnector] [CONNECTOR:34:?] [ 33.239686] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] [ 33.239690] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1] [ 33.240070] [drm:intel_dp_probe_oui] Sink OUI: 0022b9 [ 33.240432] [drm:intel_dp_probe_oui] Branch OUI: 000000 [ 33.240468] [drm:drm_edid_to_eld] ELD: no CEA Extension found [ 33.240487] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes : [ 33.240504] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 33.240511] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa [ 33.240518] [drm:drm_mode_getconnector] [CONNECTOR:34:?] [ 33.240543] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.240549] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.240554] [drm:drm_mode_getconnector] [CONNECTOR:34:?] [ 33.240557] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] [ 33.240561] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1] [ 33.240924] [drm:intel_dp_probe_oui] Sink OUI: 0022b9 [ 33.241286] [drm:intel_dp_probe_oui] Branch OUI: 000000 [ 33.241297] [drm:drm_edid_to_eld] ELD: no CEA Extension found [ 33.241302] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes : [ 33.241308] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 33.241314] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa [ 33.241319] [drm:drm_mode_getconnector] [CONNECTOR:34:?] [ 33.241332] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.241338] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.241343] [drm:drm_mode_getconnector] [CONNECTOR:34:?] [ 33.241346] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] [ 33.241349] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1] [ 33.241732] [drm:intel_dp_probe_oui] Sink OUI: 0022b9 [ 33.242095] [drm:intel_dp_probe_oui] Branch OUI: 000000 [ 33.242107] [drm:drm_edid_to_eld] ELD: no CEA Extension found [ 33.242112] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes : [ 33.242118] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 33.242123] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa [ 33.242130] [drm:drm_mode_getconnector] [CONNECTOR:34:?] [ 33.242144] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.242150] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.242155] [drm:drm_mode_getconnector] [CONNECTOR:43:?] [ 33.242162] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] [ 33.242165] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] [ 33.242169] [drm:intel_display_power_get] enabling power well 2 [ 33.242174] [drm:skl_set_power_well] Enabling power well 2 [ 33.242182] [drm:intel_display_power_get] enabling DDI B power well [ 33.242186] [drm:skl_set_power_well] Enabling DDI B power well [ 33.242204] [drm:intel_display_power_put] disabling DDI B power well [ 33.242209] [drm:skl_set_power_well] Disabling DDI B power well [ 33.242212] [drm:intel_display_power_put] disabling power well 2 [ 33.242216] [drm:skl_set_power_well] Disabling power well 2 [ 33.242220] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected [ 33.242224] [drm:drm_mode_getconnector] [CONNECTOR:43:?] [ 33.242228] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] [ 33.242231] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] [ 33.242234] [drm:intel_display_power_get] enabling power well 2 [ 33.242238] [drm:skl_set_power_well] Enabling power well 2 [ 33.242245] [drm:intel_display_power_get] enabling DDI B power well [ 33.242249] [drm:skl_set_power_well] Enabling DDI B power well [ 33.242267] [drm:intel_display_power_put] disabling DDI B power well [ 33.242271] [drm:skl_set_power_well] Disabling DDI B power well [ 33.242274] [drm:intel_display_power_put] disabling power well 2 [ 33.242278] [drm:skl_set_power_well] Disabling power well 2 [ 33.242282] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected [ 33.242289] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.242295] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.242299] [drm:drm_mode_getconnector] [CONNECTOR:43:?] [ 33.242302] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] [ 33.242305] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] [ 33.242308] [drm:intel_display_power_get] enabling power well 2 [ 33.242312] [drm:skl_set_power_well] Enabling power well 2 [ 33.242320] [drm:intel_display_power_get] enabling DDI B power well [ 33.242324] [drm:skl_set_power_well] Enabling DDI B power well [ 33.242341] [drm:intel_display_power_put] disabling DDI B power well [ 33.242345] [drm:skl_set_power_well] Disabling DDI B power well [ 33.242348] [drm:intel_display_power_put] disabling power well 2 [ 33.242353] [drm:skl_set_power_well] Disabling power well 2 [ 33.242356] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected [ 33.242360] [drm:drm_mode_getconnector] [CONNECTOR:43:?] [ 33.242364] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] [ 33.242367] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] [ 33.242369] [drm:intel_display_power_get] enabling power well 2 [ 33.242373] [drm:skl_set_power_well] Enabling power well 2 [ 33.242381] [drm:intel_display_power_get] enabling DDI B power well [ 33.242385] [drm:skl_set_power_well] Enabling DDI B power well [ 33.242402] [drm:intel_display_power_put] disabling DDI B power well [ 33.242407] [drm:skl_set_power_well] Disabling DDI B power well [ 33.242410] [drm:intel_display_power_put] disabling power well 2 [ 33.242414] [drm:skl_set_power_well] Disabling power well 2 [ 33.242418] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected [ 33.242424] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.242429] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.242434] [drm:drm_mode_getconnector] [CONNECTOR:43:?] [ 33.242437] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] [ 33.242440] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] [ 33.242443] [drm:intel_display_power_get] enabling power well 2 [ 33.242447] [drm:skl_set_power_well] Enabling power well 2 [ 33.242472] [drm:intel_display_power_get] enabling DDI B power well [ 33.242485] [drm:skl_set_power_well] Enabling DDI B power well [ 33.242511] [drm:intel_display_power_put] disabling DDI B power well [ 33.242524] [drm:skl_set_power_well] Disabling DDI B power well [ 33.242536] [drm:intel_display_power_put] disabling power well 2 [ 33.242549] [drm:skl_set_power_well] Disabling power well 2 [ 33.242561] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected [ 33.242574] [drm:drm_mode_getconnector] [CONNECTOR:43:?] [ 33.242587] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] [ 33.242600] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] [ 33.242612] [drm:intel_display_power_get] enabling power well 2 [ 33.242624] [drm:skl_set_power_well] Enabling power well 2 [ 33.242641] [drm:intel_display_power_get] enabling DDI B power well [ 33.242647] [drm:skl_set_power_well] Enabling DDI B power well [ 33.242665] [drm:intel_display_power_put] disabling DDI B power well [ 33.242669] [drm:skl_set_power_well] Disabling DDI B power well [ 33.242672] [drm:intel_display_power_put] disabling power well 2 [ 33.242676] [drm:skl_set_power_well] Disabling power well 2 [ 33.242680] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected [ 33.242687] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.242692] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.242696] [drm:drm_mode_getconnector] [CONNECTOR:47:?] [ 33.242700] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] [ 33.242703] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1] [ 33.242706] [drm:intel_display_power_get] enabling power well 2 [ 33.242710] [drm:skl_set_power_well] Enabling power well 2 [ 33.242718] [drm:intel_display_power_get] enabling DDI B power well [ 33.242722] [drm:skl_set_power_well] Enabling DDI B power well [ 33.243025] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) [ 33.243030] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb [ 33.243043] [drm:intel_display_power_put] disabling DDI B power well [ 33.243061] [drm:skl_set_power_well] Disabling DDI B power well [ 33.243078] [drm:intel_display_power_put] disabling power well 2 [ 33.243096] [drm:skl_set_power_well] Disabling power well 2 [ 33.243109] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected [ 33.243116] [drm:drm_mode_getconnector] [CONNECTOR:47:?] [ 33.243120] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] [ 33.243123] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1] [ 33.243126] [drm:intel_display_power_get] enabling power well 2 [ 33.243130] [drm:skl_set_power_well] Enabling power well 2 [ 33.243138] [drm:intel_display_power_get] enabling DDI B power well [ 33.243142] [drm:skl_set_power_well] Enabling DDI B power well [ 33.243434] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) [ 33.243438] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb [ 33.243441] [drm:intel_display_power_put] disabling DDI B power well [ 33.243445] [drm:skl_set_power_well] Disabling DDI B power well [ 33.243459] [drm:intel_display_power_put] disabling power well 2 [ 33.243473] [drm:skl_set_power_well] Disabling power well 2 [ 33.243480] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected [ 33.243489] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.243494] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.243499] [drm:drm_mode_getconnector] [CONNECTOR:47:?] [ 33.243502] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] [ 33.243506] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1] [ 33.243509] [drm:intel_display_power_get] enabling power well 2 [ 33.243527] [drm:skl_set_power_well] Enabling power well 2 [ 33.243545] [drm:intel_display_power_get] enabling DDI B power well [ 33.243549] [drm:skl_set_power_well] Enabling DDI B power well [ 33.243840] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) [ 33.243843] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb [ 33.243846] [drm:intel_display_power_put] disabling DDI B power well [ 33.243851] [drm:skl_set_power_well] Disabling DDI B power well [ 33.243854] [drm:intel_display_power_put] disabling power well 2 [ 33.243858] [drm:skl_set_power_well] Disabling power well 2 [ 33.243861] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected [ 33.243866] [drm:drm_mode_getconnector] [CONNECTOR:47:?] [ 33.243869] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] [ 33.243872] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1] [ 33.243875] [drm:intel_display_power_get] enabling power well 2 [ 33.243879] [drm:skl_set_power_well] Enabling power well 2 [ 33.243887] [drm:intel_display_power_get] enabling DDI B power well [ 33.243891] [drm:skl_set_power_well] Enabling DDI B power well [ 33.244181] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) [ 33.244184] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb [ 33.244187] [drm:intel_display_power_put] disabling DDI B power well [ 33.244191] [drm:skl_set_power_well] Disabling DDI B power well [ 33.244194] [drm:intel_display_power_put] disabling power well 2 [ 33.244198] [drm:skl_set_power_well] Disabling power well 2 [ 33.244202] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected [ 33.244209] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.244214] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.244219] [drm:drm_mode_getconnector] [CONNECTOR:47:?] [ 33.244222] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] [ 33.244225] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1] [ 33.244228] [drm:intel_display_power_get] enabling power well 2 [ 33.244232] [drm:skl_set_power_well] Enabling power well 2 [ 33.244240] [drm:intel_display_power_get] enabling DDI B power well [ 33.244243] [drm:skl_set_power_well] Enabling DDI B power well [ 33.244549] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) [ 33.244552] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb [ 33.244555] [drm:intel_display_power_put] disabling DDI B power well [ 33.244559] [drm:skl_set_power_well] Disabling DDI B power well [ 33.244562] [drm:intel_display_power_put] disabling power well 2 [ 33.244566] [drm:skl_set_power_well] Disabling power well 2 [ 33.244570] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected [ 33.244575] [drm:drm_mode_getconnector] [CONNECTOR:47:?] [ 33.244578] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] [ 33.244581] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1] [ 33.244584] [drm:intel_display_power_get] enabling power well 2 [ 33.244588] [drm:skl_set_power_well] Enabling power well 2 [ 33.244595] [drm:intel_display_power_get] enabling DDI B power well [ 33.244599] [drm:skl_set_power_well] Enabling DDI B power well [ 33.244889] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) [ 33.244893] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb [ 33.244896] [drm:intel_display_power_put] disabling DDI B power well [ 33.244900] [drm:skl_set_power_well] Disabling DDI B power well [ 33.244903] [drm:intel_display_power_put] disabling power well 2 [ 33.244908] [drm:skl_set_power_well] Disabling power well 2 [ 33.244911] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected [ 33.244918] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.244924] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.244928] [drm:drm_mode_getconnector] [CONNECTOR:50:?] [ 33.244932] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] [ 33.244935] [drm:intel_dp_detect] [CONNECTOR:50:DP-2] [ 33.244938] [drm:intel_display_power_get] enabling power well 2 [ 33.244941] [drm:skl_set_power_well] Enabling power well 2 [ 33.244949] [drm:intel_display_power_get] enabling DDI C power well [ 33.244953] [drm:skl_set_power_well] Enabling DDI C power well [ 33.244971] [drm:intel_display_power_put] disabling DDI C power well [ 33.244975] [drm:skl_set_power_well] Disabling DDI C power well [ 33.244978] [drm:intel_display_power_put] disabling power well 2 [ 33.244982] [drm:skl_set_power_well] Disabling power well 2 [ 33.244986] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected [ 33.244990] [drm:drm_mode_getconnector] [CONNECTOR:50:?] [ 33.244993] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] [ 33.244996] [drm:intel_dp_detect] [CONNECTOR:50:DP-2] [ 33.244999] [drm:intel_display_power_get] enabling power well 2 [ 33.245003] [drm:skl_set_power_well] Enabling power well 2 [ 33.245011] [drm:intel_display_power_get] enabling DDI C power well [ 33.245014] [drm:skl_set_power_well] Enabling DDI C power well [ 33.245032] [drm:intel_display_power_put] disabling DDI C power well [ 33.245036] [drm:skl_set_power_well] Disabling DDI C power well [ 33.245039] [drm:intel_display_power_put] disabling power well 2 [ 33.245043] [drm:skl_set_power_well] Disabling power well 2 [ 33.245047] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected [ 33.245053] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.245058] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.245063] [drm:drm_mode_getconnector] [CONNECTOR:50:?] [ 33.245066] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] [ 33.245069] [drm:intel_dp_detect] [CONNECTOR:50:DP-2] [ 33.245072] [drm:intel_display_power_get] enabling power well 2 [ 33.245076] [drm:skl_set_power_well] Enabling power well 2 [ 33.245084] [drm:intel_display_power_get] enabling DDI C power well [ 33.245087] [drm:skl_set_power_well] Enabling DDI C power well [ 33.245105] [drm:intel_display_power_put] disabling DDI C power well [ 33.245109] [drm:skl_set_power_well] Disabling DDI C power well [ 33.245112] [drm:intel_display_power_put] disabling power well 2 [ 33.245116] [drm:skl_set_power_well] Disabling power well 2 [ 33.245120] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected [ 33.245124] [drm:drm_mode_getconnector] [CONNECTOR:50:?] [ 33.245127] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] [ 33.245130] [drm:intel_dp_detect] [CONNECTOR:50:DP-2] [ 33.245133] [drm:intel_display_power_get] enabling power well 2 [ 33.245137] [drm:skl_set_power_well] Enabling power well 2 [ 33.245144] [drm:intel_display_power_get] enabling DDI C power well [ 33.245148] [drm:skl_set_power_well] Enabling DDI C power well [ 33.245166] [drm:intel_display_power_put] disabling DDI C power well [ 33.245170] [drm:skl_set_power_well] Disabling DDI C power well [ 33.245173] [drm:intel_display_power_put] disabling power well 2 [ 33.245177] [drm:skl_set_power_well] Disabling power well 2 [ 33.245181] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected [ 33.245187] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.245192] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.245196] [drm:drm_mode_getconnector] [CONNECTOR:50:?] [ 33.245200] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] [ 33.245203] [drm:intel_dp_detect] [CONNECTOR:50:DP-2] [ 33.245205] [drm:intel_display_power_get] enabling power well 2 [ 33.245209] [drm:skl_set_power_well] Enabling power well 2 [ 33.245217] [drm:intel_display_power_get] enabling DDI C power well [ 33.245221] [drm:skl_set_power_well] Enabling DDI C power well [ 33.245238] [drm:intel_display_power_put] disabling DDI C power well [ 33.245243] [drm:skl_set_power_well] Disabling DDI C power well [ 33.245245] [drm:intel_display_power_put] disabling power well 2 [ 33.245250] [drm:skl_set_power_well] Disabling power well 2 [ 33.245253] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected [ 33.245257] [drm:drm_mode_getconnector] [CONNECTOR:50:?] [ 33.245260] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] [ 33.245263] [drm:intel_dp_detect] [CONNECTOR:50:DP-2] [ 33.245266] [drm:intel_display_power_get] enabling power well 2 [ 33.245270] [drm:skl_set_power_well] Enabling power well 2 [ 33.245278] [drm:intel_display_power_get] enabling DDI C power well [ 33.245282] [drm:skl_set_power_well] Enabling DDI C power well [ 33.245299] [drm:intel_display_power_put] disabling DDI C power well [ 33.245303] [drm:skl_set_power_well] Disabling DDI C power well [ 33.245306] [drm:intel_display_power_put] disabling power well 2 [ 33.245310] [drm:skl_set_power_well] Disabling power well 2 [ 33.245314] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected [ 33.245320] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.245325] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.245329] [drm:drm_mode_getconnector] [CONNECTOR:54:?] [ 33.245333] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] [ 33.245336] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2] [ 33.245339] [drm:intel_display_power_get] enabling power well 2 [ 33.245343] [drm:skl_set_power_well] Enabling power well 2 [ 33.245351] [drm:intel_display_power_get] enabling DDI C power well [ 33.245354] [drm:skl_set_power_well] Enabling DDI C power well [ 33.245655] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) [ 33.245660] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc [ 33.245665] [drm:intel_display_power_put] disabling DDI C power well [ 33.245672] [drm:skl_set_power_well] Disabling DDI C power well [ 33.245677] [drm:intel_display_power_put] disabling power well 2 [ 33.245683] [drm:skl_set_power_well] Disabling power well 2 [ 33.245689] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected [ 33.245697] [drm:drm_mode_getconnector] [CONNECTOR:54:?] [ 33.245702] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] [ 33.245708] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2] [ 33.245712] [drm:intel_display_power_get] enabling power well 2 [ 33.245718] [drm:skl_set_power_well] Enabling power well 2 [ 33.245728] [drm:intel_display_power_get] enabling DDI C power well [ 33.245734] [drm:skl_set_power_well] Enabling DDI C power well [ 33.246037] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) [ 33.246048] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc [ 33.246061] [drm:intel_display_power_put] disabling DDI C power well [ 33.246074] [drm:skl_set_power_well] Disabling DDI C power well [ 33.246087] [drm:intel_display_power_put] disabling power well 2 [ 33.246095] [drm:skl_set_power_well] Disabling power well 2 [ 33.246100] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected [ 33.246114] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.246122] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.246129] [drm:drm_mode_getconnector] [CONNECTOR:54:?] [ 33.246135] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] [ 33.246140] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2] [ 33.246144] [drm:intel_display_power_get] enabling power well 2 [ 33.246150] [drm:skl_set_power_well] Enabling power well 2 [ 33.246160] [drm:intel_display_power_get] enabling DDI C power well [ 33.246165] [drm:skl_set_power_well] Enabling DDI C power well [ 33.246472] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) [ 33.246477] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc [ 33.246480] [drm:intel_display_power_put] disabling DDI C power well [ 33.246484] [drm:skl_set_power_well] Disabling DDI C power well [ 33.246487] [drm:intel_display_power_put] disabling power well 2 [ 33.246492] [drm:skl_set_power_well] Disabling power well 2 [ 33.246495] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected [ 33.246501] [drm:drm_mode_getconnector] [CONNECTOR:54:?] [ 33.246505] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] [ 33.246508] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2] [ 33.246511] [drm:intel_display_power_get] enabling power well 2 [ 33.246515] [drm:skl_set_power_well] Enabling power well 2 [ 33.246523] [drm:intel_display_power_get] enabling DDI C power well [ 33.246527] [drm:skl_set_power_well] Enabling DDI C power well [ 33.246817] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) [ 33.246820] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc [ 33.246823] [drm:intel_display_power_put] disabling DDI C power well [ 33.246828] [drm:skl_set_power_well] Disabling DDI C power well [ 33.246830] [drm:intel_display_power_put] disabling power well 2 [ 33.246835] [drm:skl_set_power_well] Disabling power well 2 [ 33.246838] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected [ 33.246846] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.246851] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.246856] [drm:drm_mode_getconnector] [CONNECTOR:54:?] [ 33.246859] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] [ 33.246862] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2] [ 33.246865] [drm:intel_display_power_get] enabling power well 2 [ 33.246869] [drm:skl_set_power_well] Enabling power well 2 [ 33.246877] [drm:intel_display_power_get] enabling DDI C power well [ 33.246880] [drm:skl_set_power_well] Enabling DDI C power well [ 33.247170] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) [ 33.247174] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc [ 33.247177] [drm:intel_display_power_put] disabling DDI C power well [ 33.247181] [drm:skl_set_power_well] Disabling DDI C power well [ 33.247184] [drm:intel_display_power_put] disabling power well 2 [ 33.247188] [drm:skl_set_power_well] Disabling power well 2 [ 33.247192] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected [ 33.247196] [drm:drm_mode_getconnector] [CONNECTOR:54:?] [ 33.247200] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] [ 33.247203] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2] [ 33.247206] [drm:intel_display_power_get] enabling power well 2 [ 33.247209] [drm:skl_set_power_well] Enabling power well 2 [ 33.247217] [drm:intel_display_power_get] enabling DDI C power well [ 33.247221] [drm:skl_set_power_well] Enabling DDI C power well [ 33.247525] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) [ 33.247538] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc [ 33.247550] [drm:intel_display_power_put] disabling DDI C power well [ 33.247563] [drm:skl_set_power_well] Disabling DDI C power well [ 33.247570] [drm:intel_display_power_put] disabling power well 2 [ 33.247575] [drm:skl_set_power_well] Disabling power well 2 [ 33.247578] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected [ 33.247590] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.247595] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 33.247600] [drm:drm_mode_getconnector] [CONNECTOR:34:?] [ 33.247603] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] [ 33.247607] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1] [ 33.247976] [drm:intel_dp_probe_oui] Sink OUI: 0022b9 [ 33.248338] [drm:intel_dp_probe_oui] Branch OUI: 000000 [ 33.248352] [drm:drm_edid_to_eld] ELD: no CEA Extension found [ 33.248358] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes : [ 33.248364] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 33.248370] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa [ 33.248376] [drm:drm_mode_getconnector] [CONNECTOR:34:?] [ 33.248477] [drm:drm_mode_addfb2] [FB:56] [ 33.248512] [drm:drm_mode_addfb2] [FB:58] [ 33.248529] [drm:drm_mode_addfb2] [FB:59] [ 33.587115] [drm:drm_mode_setcrtc] [CRTC:20] [ 33.587128] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1] [ 33.587134] [drm:intel_crtc_set_config] [CRTC:20] [FB:56] #connectors=1 (x y) (0 0) [ 33.587142] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1 [ 33.587151] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 33.587159] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 33.587164] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains [ 33.587172] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 540000 pixel clock 361310KHz [ 33.587175] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18 [ 33.587180] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18 [ 33.587183] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000 [ 33.587188] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 [ 33.587192] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 33.587195] [drm:intel_dump_pipe_config] cpu_transcoder: D [ 33.587198] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 [ 33.587202] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 33.587207] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64 [ 33.587211] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 33.587214] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 33.587217] [drm:intel_dump_pipe_config] requested mode: [ 33.587223] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 33.587226] [drm:intel_dump_pipe_config] adjusted mode: [ 33.587231] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 33.587236] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa [ 33.587239] [drm:intel_dump_pipe_config] port clock: 540000 [ 33.587242] [drm:intel_dump_pipe_config] pipe src size: 3200x1800 [ 33.587246] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 33.587249] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 33.587252] [drm:intel_dump_pipe_config] ips: 0 [ 33.587255] [drm:intel_dump_pipe_config] double wide: 0 [ 36.251805] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off [ 36.251870] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007 [ 43.625134] [drm:intel_crtc_set_config] [CRTC:20] [NOFB] [ 43.625147] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0 [ 43.625153] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [NOCRTC] [ 43.625157] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] encoder changed, full mode switch [ 43.625162] [drm:intel_modeset_stage_output_state] [ENCODER:33:TMDS-33] crtc changed, full mode switch [ 43.625172] [drm:intel_modeset_stage_output_state] [CRTC:20] disabled, full mode switch [ 43.625178] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1 [ 43.625192] [drm:intel_edp_backlight_off] [ 43.826250] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0 [ 43.836947] [drm:edp_panel_vdd_on] Turning eDP port A VDD on [ 43.837023] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b [ 43.837270] [drm:edp_panel_off] Turn eDP port A panel power off [ 43.837310] [drm:wait_panel_off] Wait for panel power off time [ 43.837337] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000 [ 43.897966] [drm:wait_panel_status] Wait complete [ 43.898052] [drm:intel_display_power_put] disabling DDI A/E power well [ 43.898058] [drm:skl_set_power_well] Disabling DDI A/E power well [ 43.898062] [drm:intel_display_power_put] disabling MISC IO power well [ 43.898066] [drm:skl_set_power_well] Disabling MISC IO power well [ 43.898069] [drm:intel_display_power_put] disabling power well 1 [ 43.898075] [drm:skl_set_power_well] Disabling power well 1 [ 43.898111] [drm:check_encoder_state] [ENCODER:33:TMDS-33] [ 43.898126] [drm:check_encoder_state] [ENCODER:42:TMDS-42] [ 43.898136] [drm:check_encoder_state] [ENCODER:44:DP MST-44] [ 43.898140] [drm:check_encoder_state] [ENCODER:45:DP MST-45] [ 43.898143] [drm:check_encoder_state] [ENCODER:46:DP MST-46] [ 43.898146] [drm:check_encoder_state] [ENCODER:49:TMDS-49] [ 43.898150] [drm:check_encoder_state] [ENCODER:51:DP MST-51] [ 43.898153] [drm:check_encoder_state] [ENCODER:52:DP MST-52] [ 43.898157] [drm:check_encoder_state] [ENCODER:53:DP MST-53] [ 43.898160] [drm:check_crtc_state] [CRTC:20] [ 43.898165] [drm:check_crtc_state] [CRTC:25] [ 43.898168] [drm:check_crtc_state] [CRTC:30] [ 43.898172] [drm:check_shared_dpll_state] DPLL 1 [ 43.898176] [drm:check_shared_dpll_state] DPLL 2 [ 43.898179] [drm:check_shared_dpll_state] DPLL 3 [ 43.907031] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 43.907046] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 43.907054] [drm:drm_mode_getconnector] [CONNECTOR:34:?] [ 43.907059] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] [ 43.907064] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1] [ 43.907069] [drm:intel_display_power_get] enabling power well 1 [ 43.907077] [drm:skl_set_power_well] Enabling power well 1 [ 43.907123] [drm:intel_display_power_get] enabling MISC IO power well [ 43.907127] [drm:skl_set_power_well] Enabling MISC IO power well [ 43.907131] [drm:intel_display_power_get] enabling DDI A/E power well [ 43.907135] [drm:skl_set_power_well] Enabling DDI A/E power well [ 43.907157] [drm:edp_panel_vdd_on] Turning eDP port A VDD on [ 43.907170] [drm:wait_panel_power_cycle] Wait for panel power cycle [ 44.438319] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control abcd0000 [ 44.478675] [drm:wait_panel_status] Wait complete [ 44.478742] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008 [ 44.478760] [drm:edp_panel_vdd_on] eDP port A panel power wasn't enabled [ 44.679690] [drm:intel_dp_probe_oui] Sink OUI: 0022b9 [ 44.680091] [drm:intel_dp_probe_oui] Branch OUI: 000000 [ 44.680127] [drm:drm_edid_to_eld] ELD: no CEA Extension found [ 44.680136] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes : [ 44.680144] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 44.680151] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa [ 44.680168] [drm:drm_mode_getconnector] [CONNECTOR:34:?] [ 44.680290] [drm:drm_mode_addfb2] [FB:56] [ 44.680307] [drm:drm_mode_addfb2] [FB:58] [ 44.680330] [drm:drm_mode_addfb2] [FB:59] [ 44.914738] [drm:drm_mode_setcrtc] [CRTC:25] [ 44.914750] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1] [ 44.914756] [drm:intel_crtc_set_config] [CRTC:25] [FB:56] #connectors=1 (x y) (0 0) [ 44.914762] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set [ 44.914765] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set [ 44.914771] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 [ 44.914777] [drm:drm_mode_debug_printmodeline] Modeline 60:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 44.914781] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=1, fb_changed=0 [ 44.914786] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] encoder changed, full mode switch [ 44.914792] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:25] [ 44.914796] [drm:intel_modeset_stage_output_state] [ENCODER:33:TMDS-33] crtc changed, full mode switch [ 44.914802] [drm:intel_modeset_stage_output_state] [CRTC:25] enabled, full mode switch [ 44.914807] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0 [ 44.914813] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains [ 44.914820] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 540000 pixel clock 361310KHz [ 44.914824] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18 [ 44.914828] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18 [ 44.914832] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000 [ 44.914837] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 [ 44.914841] [drm:intel_dump_pipe_config] [CRTC:25][modeset] config for pipe B [ 44.914843] [drm:intel_dump_pipe_config] cpu_transcoder: D [ 44.914846] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 [ 44.914851] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 44.914855] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64 [ 44.914859] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 44.914862] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 44.914865] [drm:intel_dump_pipe_config] requested mode: [ 44.914871] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 44.914873] [drm:intel_dump_pipe_config] adjusted mode: [ 44.914879] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 44.914886] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa [ 44.914889] [drm:intel_dump_pipe_config] port clock: 540000 [ 44.914893] [drm:intel_dump_pipe_config] pipe src size: 3200x1800 [ 44.914897] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 44.914902] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 44.914906] [drm:intel_dump_pipe_config] ips: 0 [ 44.914910] [drm:intel_dump_pipe_config] double wide: 0 [ 44.914924] [drm:intel_display_power_get] enabling power well 2 [ 44.914929] [drm:skl_set_power_well] Enabling power well 2 [ 44.917526] [drm:edp_panel_on] Turn eDP port A panel power on [ 44.917543] [drm:wait_panel_power_cycle] Wait for panel power cycle [ 44.917569] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008 [ 44.917585] [drm:wait_panel_status] Wait complete [ 44.917619] [drm:wait_panel_on] Wait for panel power on [ 44.917643] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd000b [ 45.119721] [drm:wait_panel_status] Wait complete [ 45.120904] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 [ 45.121650] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 [ 45.122367] [drm:intel_dp_start_link_train] clock recovery OK [ 45.123368] [drm:intel_dp_set_signal_levels] Using signal levels 05000000 [ 45.124359] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful [ 45.124670] [drm:skl_wm_flush_pipe] flush pipe B (pass 3) [ 45.124687] [drm:intel_edp_backlight_on] [ 45.124692] [drm:intel_panel_enable_backlight] pipe B [ 45.124752] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937 [ 45.124813] [drm:intel_psr_match_conditions] PSR disable by flag [ 45.124816] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS [ 45.124845] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1] [ 45.124852] [drm:check_encoder_state] [ENCODER:33:TMDS-33] [ 45.124857] [drm:check_encoder_state] [ENCODER:42:TMDS-42] [ 45.124861] [drm:check_encoder_state] [ENCODER:44:DP MST-44] [ 45.124864] [drm:check_encoder_state] [ENCODER:45:DP MST-45] [ 45.124867] [drm:check_encoder_state] [ENCODER:46:DP MST-46] [ 45.124870] [drm:check_encoder_state] [ENCODER:49:TMDS-49] [ 45.124873] [drm:check_encoder_state] [ENCODER:51:DP MST-51] [ 45.124876] [drm:check_encoder_state] [ENCODER:52:DP MST-52] [ 45.124879] [drm:check_encoder_state] [ENCODER:53:DP MST-53] [ 45.124882] [drm:check_crtc_state] [CRTC:20] [ 45.124888] [drm:check_crtc_state] [CRTC:25] [ 45.124908] [drm:check_crtc_state] [CRTC:30] [ 45.124913] [drm:check_shared_dpll_state] DPLL 1 [ 45.124917] [drm:check_shared_dpll_state] DPLL 2 [ 45.124921] [drm:check_shared_dpll_state] DPLL 3 [ 45.191474] ------------[ cut here ]------------ [ 45.191531] WARNING: CPU: 2 PID: 0 at drivers/gpu/drm/i915/intel_display.c:10177 intel_check_page_flip+0xa6/0xc1 [i915]() [ 45.191536] Kicking stuck page flip: queued at 1, now 5 [ 45.191539] Modules linked in: dm_mod snd_hda_codec_realtek snd_hda_codec_generic ppdev snd_hda_intel snd_hda_controller snd_hda_codec snd_hda_core snd_hwdep pcspkr snd_pcm snd_timer snd soundcore i2c_i801 wmi battery parport_pc parport ac acpi_cpufreq i915 button video drm_kms_helper drm [ 45.191576] CPU: 2 PID: 0 Comm: swapper/2 Not tainted 4.0.0-rc6_drm-intel-nightly_333cf6_20150403+ #196 [ 45.191580] Hardware name: Intel Corporation Skylake Client platform/Skylake Y LPDDR3 RVP3, BIOS SKLSE2R1.86C.B067.R00.1412310711 12/31/2014 [ 45.191584] 0000000000000000 0000000000000009 ffffffff817950c6 ffff88014e483e18 [ 45.191591] ffffffff8103bcf8 ffff88014427c9a0 ffffffffa00d44f1 0000000000000002 [ 45.191596] ffff88014427c800 ffff88009baed000 0000000000000001 0000000000000001 [ 45.191602] Call Trace: [ 45.191606] [] ? dump_stack+0x40/0x50 [ 45.191626] [] ? warn_slowpath_common+0x98/0xb0 [ 45.191659] [] ? intel_check_page_flip+0xa6/0xc1 [i915] [ 45.191667] [] ? warn_slowpath_fmt+0x45/0x4a [ 45.191703] [] ? __intel_pageflip_stall_check+0xaf/0xd8 [i915] [ 45.191734] [] ? intel_check_page_flip+0xa6/0xc1 [i915] [ 45.191771] [] ? gen8_irq_handler+0x1fb/0x345 [i915] [ 45.191778] [] ? handle_irq_event_percpu+0x34/0x15b [ 45.191784] [] ? update_wall_time+0x524/0x53d [ 45.191790] [] ? handle_irq_event+0x2e/0x4c [ 45.191796] [] ? handle_edge_irq+0xba/0xcf [ 45.191802] [] ? handle_irq+0x15/0x1d [ 45.191808] [] ? do_IRQ+0x41/0xc0 [ 45.191814] [] ? common_interrupt+0x6a/0x6a [ 45.191816] [] ? cpuidle_enter_state+0x71/0x11e [ 45.191869] [] ? cpuidle_enter_state+0x55/0x11e [ 45.191879] [] ? cpu_startup_entry+0x1f7/0x34d [ 45.191884] ---[ end trace abc623aeca530d81 ]--- [ 48.132454] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off [ 48.132519] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007 [ 55.365427] [drm:intel_crtc_set_config] [CRTC:25] [NOFB] [ 55.365439] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=1, fb_changed=0 [ 55.365451] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [NOCRTC] [ 55.365454] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] encoder changed, full mode switch [ 55.365464] [drm:intel_modeset_stage_output_state] [ENCODER:33:TMDS-33] crtc changed, full mode switch [ 55.365474] [drm:intel_modeset_stage_output_state] [CRTC:25] disabled, full mode switch [ 55.365480] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2 [ 55.365494] [drm:intel_edp_backlight_off] [ 55.565807] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0 [ 55.576494] [drm:edp_panel_vdd_on] Turning eDP port A VDD on [ 55.576571] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b [ 55.578483] [drm:edp_panel_off] Turn eDP port A panel power off [ 55.578522] [drm:wait_panel_off] Wait for panel power off time [ 55.578549] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000 [ 55.639186] [drm:wait_panel_status] Wait complete [ 55.639250] [drm:intel_display_power_put] disabling power well 2 [ 55.639257] [drm:skl_set_power_well] Disabling power well 2 [ 55.639261] [drm:intel_display_power_put] disabling DDI A/E power well [ 55.639266] [drm:skl_set_power_well] Disabling DDI A/E power well [ 55.639269] [drm:intel_display_power_put] disabling MISC IO power well [ 55.639273] [drm:skl_set_power_well] Disabling MISC IO power well [ 55.639276] [drm:intel_display_power_put] disabling power well 1 [ 55.639282] [drm:skl_set_power_well] Disabling power well 1 [ 55.639316] [drm:check_encoder_state] [ENCODER:33:TMDS-33] [ 55.639321] [drm:check_encoder_state] [ENCODER:42:TMDS-42] [ 55.639324] [drm:check_encoder_state] [ENCODER:44:DP MST-44] [ 55.639328] [drm:check_encoder_state] [ENCODER:45:DP MST-45] [ 55.639331] [drm:check_encoder_state] [ENCODER:46:DP MST-46] [ 55.639334] [drm:check_encoder_state] [ENCODER:49:TMDS-49] [ 55.639337] [drm:check_encoder_state] [ENCODER:51:DP MST-51] [ 55.639340] [drm:check_encoder_state] [ENCODER:52:DP MST-52] [ 55.639343] [drm:check_encoder_state] [ENCODER:53:DP MST-53] [ 55.639347] [drm:check_crtc_state] [CRTC:20] [ 55.639351] [drm:check_crtc_state] [CRTC:25] [ 55.639354] [drm:check_crtc_state] [CRTC:30] [ 55.639358] [drm:check_shared_dpll_state] DPLL 1 [ 55.639361] [drm:check_shared_dpll_state] DPLL 2 [ 55.639364] [drm:check_shared_dpll_state] DPLL 3 [ 55.648189] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 55.648198] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 55.648206] [drm:drm_mode_getconnector] [CONNECTOR:34:?] [ 55.648212] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] [ 55.648216] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1] [ 55.648220] [drm:intel_display_power_get] enabling power well 1 [ 55.648228] [drm:skl_set_power_well] Enabling power well 1 [ 55.648275] [drm:intel_display_power_get] enabling MISC IO power well [ 55.648279] [drm:skl_set_power_well] Enabling MISC IO power well [ 55.648283] [drm:intel_display_power_get] enabling DDI A/E power well [ 55.648287] [drm:skl_set_power_well] Enabling DDI A/E power well [ 55.648308] [drm:edp_panel_vdd_on] Turning eDP port A VDD on [ 55.648322] [drm:wait_panel_power_cycle] Wait for panel power cycle [ 56.178865] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control abcd0000 [ 56.219156] [drm:wait_panel_status] Wait complete [ 56.219222] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008 [ 56.219241] [drm:edp_panel_vdd_on] eDP port A panel power wasn't enabled [ 56.420329] [drm:intel_dp_probe_oui] Sink OUI: 0022b9 [ 56.420734] [drm:intel_dp_probe_oui] Branch OUI: 000000 [ 56.420769] [drm:drm_edid_to_eld] ELD: no CEA Extension found [ 56.420778] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes : [ 56.420786] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 56.420793] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa [ 56.420810] [drm:drm_mode_getconnector] [CONNECTOR:34:?] [ 56.420941] [drm:drm_mode_addfb2] [FB:56] [ 56.420963] [drm:drm_mode_addfb2] [FB:58] [ 56.420991] [drm:drm_mode_addfb2] [FB:59] [ 56.654009] [drm:drm_mode_setcrtc] [CRTC:30] [ 56.654024] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1] [ 56.654032] [drm:intel_crtc_set_config] [CRTC:30] [FB:56] #connectors=1 (x y) (0 0) [ 56.654040] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set [ 56.654045] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set [ 56.654052] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 [ 56.654060] [drm:drm_mode_debug_printmodeline] Modeline 60:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 56.654065] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=1, fb_changed=0 [ 56.654071] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] encoder changed, full mode switch [ 56.654079] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:30] [ 56.654084] [drm:intel_modeset_stage_output_state] [ENCODER:33:TMDS-33] crtc changed, full mode switch [ 56.654106] [drm:intel_modeset_stage_output_state] [CRTC:30] enabled, full mode switch [ 56.654112] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0 [ 56.654118] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains [ 56.654125] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 540000 pixel clock 361310KHz [ 56.654129] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18 [ 56.654133] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18 [ 56.654137] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000 [ 56.654142] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 [ 56.654146] [drm:intel_dump_pipe_config] [CRTC:30][modeset] config for pipe C [ 56.654148] [drm:intel_dump_pipe_config] cpu_transcoder: D [ 56.654151] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 [ 56.654156] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 56.654160] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64 [ 56.654165] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 56.654168] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 56.654171] [drm:intel_dump_pipe_config] requested mode: [ 56.654176] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 56.654179] [drm:intel_dump_pipe_config] adjusted mode: [ 56.654184] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 56.654189] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa [ 56.654192] [drm:intel_dump_pipe_config] port clock: 540000 [ 56.654195] [drm:intel_dump_pipe_config] pipe src size: 3200x1800 [ 56.654199] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 56.654202] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 56.654205] [drm:intel_dump_pipe_config] ips: 0 [ 56.654208] [drm:intel_dump_pipe_config] double wide: 0 [ 56.654220] [drm:intel_display_power_get] enabling power well 2 [ 56.654225] [drm:skl_set_power_well] Enabling power well 2 [ 56.656823] [drm:edp_panel_on] Turn eDP port A panel power on [ 56.656841] [drm:wait_panel_power_cycle] Wait for panel power cycle [ 56.656867] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008 [ 56.656883] [drm:wait_panel_status] Wait complete [ 56.656917] [drm:wait_panel_on] Wait for panel power on [ 56.656942] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd000b [ 56.869562] [drm:wait_panel_status] Wait complete [ 56.870780] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 [ 56.871482] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 [ 56.872171] [drm:intel_dp_start_link_train] clock recovery OK [ 56.873178] [drm:intel_dp_set_signal_levels] Using signal levels 05000000 [ 56.874167] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful [ 56.874478] [drm:skl_wm_flush_pipe] flush pipe C (pass 3) [ 56.874495] [drm:intel_edp_backlight_on] [ 56.874500] [drm:intel_panel_enable_backlight] pipe C [ 56.874561] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937 [ 56.874621] [drm:intel_psr_match_conditions] PSR disable by flag [ 56.874624] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS [ 56.874653] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1] [ 56.874660] [drm:check_encoder_state] [ENCODER:33:TMDS-33] [ 56.874665] [drm:check_encoder_state] [ENCODER:42:TMDS-42] [ 56.874669] [drm:check_encoder_state] [ENCODER:44:DP MST-44] [ 56.874672] [drm:check_encoder_state] [ENCODER:45:DP MST-45] [ 56.874675] [drm:check_encoder_state] [ENCODER:46:DP MST-46] [ 56.874678] [drm:check_encoder_state] [ENCODER:49:TMDS-49] [ 56.874682] [drm:check_encoder_state] [ENCODER:51:DP MST-51] [ 56.874685] [drm:check_encoder_state] [ENCODER:52:DP MST-52] [ 56.874688] [drm:check_encoder_state] [ENCODER:53:DP MST-53] [ 56.874691] [drm:check_crtc_state] [CRTC:20] [ 56.874697] [drm:check_crtc_state] [CRTC:25] [ 56.874701] [drm:check_crtc_state] [CRTC:30] [ 56.874721] [drm:check_shared_dpll_state] DPLL 1 [ 56.874725] [drm:check_shared_dpll_state] DPLL 2 [ 56.874729] [drm:check_shared_dpll_state] DPLL 3 [ 59.885162] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off [ 59.885227] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007 [ 67.115276] [drm:intel_crtc_set_config] [CRTC:30] [NOFB] [ 67.115314] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=1, fb_changed=0 [ 67.115325] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [NOCRTC] [ 67.115334] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] encoder changed, full mode switch [ 67.115340] [drm:intel_modeset_stage_output_state] [ENCODER:33:TMDS-33] crtc changed, full mode switch [ 67.115353] [drm:intel_modeset_stage_output_state] [CRTC:30] disabled, full mode switch [ 67.115361] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 4 [ 67.115378] [drm:intel_edp_backlight_off] [ 67.316509] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0 [ 67.327190] [drm:edp_panel_vdd_on] Turning eDP port A VDD on [ 67.327276] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b [ 67.327518] [drm:edp_panel_off] Turn eDP port A panel power off [ 67.327561] [drm:wait_panel_off] Wait for panel power off time [ 67.327596] [drm:wait_panel_status] mask b0000000 value 00000000 status a0000003 control abcd0000 [ 67.387974] [drm:wait_panel_status] Wait complete [ 67.388039] [drm:intel_display_power_put] disabling power well 2 [ 67.388045] [drm:skl_set_power_well] Disabling power well 2 [ 67.388050] [drm:intel_display_power_put] disabling DDI A/E power well [ 67.388054] [drm:skl_set_power_well] Disabling DDI A/E power well [ 67.388057] [drm:intel_display_power_put] disabling MISC IO power well [ 67.388062] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.388065] [drm:intel_display_power_put] disabling power well 1 [ 67.388071] [drm:skl_set_power_well] Disabling power well 1 [ 67.388105] [drm:check_encoder_state] [ENCODER:33:TMDS-33] [ 67.388109] [drm:check_encoder_state] [ENCODER:42:TMDS-42] [ 67.388113] [drm:check_encoder_state] [ENCODER:44:DP MST-44] [ 67.388116] [drm:check_encoder_state] [ENCODER:45:DP MST-45] [ 67.388119] [drm:check_encoder_state] [ENCODER:46:DP MST-46] [ 67.388122] [drm:check_encoder_state] [ENCODER:49:TMDS-49] [ 67.388125] [drm:check_encoder_state] [ENCODER:51:DP MST-51] [ 67.388128] [drm:check_encoder_state] [ENCODER:52:DP MST-52] [ 67.388131] [drm:check_encoder_state] [ENCODER:53:DP MST-53] [ 67.388135] [drm:check_crtc_state] [CRTC:20] [ 67.388139] [drm:check_crtc_state] [CRTC:25] [ 67.388142] [drm:check_crtc_state] [CRTC:30] [ 67.388146] [drm:check_shared_dpll_state] DPLL 1 [ 67.388149] [drm:check_shared_dpll_state] DPLL 2 [ 67.388152] [drm:check_shared_dpll_state] DPLL 3 [ 67.396987] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 67.396997] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 67.397004] [drm:drm_mode_getconnector] [CONNECTOR:43:?] [ 67.397010] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] [ 67.397014] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] [ 67.397018] [drm:intel_display_power_get] enabling power well 1 [ 67.397027] [drm:skl_set_power_well] Enabling power well 1 [ 67.397073] [drm:intel_display_power_get] enabling MISC IO power well [ 67.397077] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.397080] [drm:intel_display_power_get] enabling power well 2 [ 67.397084] [drm:skl_set_power_well] Enabling power well 2 [ 67.397095] [drm:intel_display_power_get] enabling DDI B power well [ 67.397099] [drm:skl_set_power_well] Enabling DDI B power well [ 67.397117] [drm:intel_display_power_put] disabling DDI B power well [ 67.397122] [drm:skl_set_power_well] Disabling DDI B power well [ 67.397125] [drm:intel_display_power_put] disabling power well 2 [ 67.397130] [drm:skl_set_power_well] Disabling power well 2 [ 67.397133] [drm:intel_display_power_put] disabling MISC IO power well [ 67.397137] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.397140] [drm:intel_display_power_put] disabling power well 1 [ 67.397146] [drm:skl_set_power_well] Disabling power well 1 [ 67.397150] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected [ 67.397156] [drm:drm_mode_getconnector] [CONNECTOR:43:?] [ 67.397159] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] [ 67.397162] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] [ 67.397165] [drm:intel_display_power_get] enabling power well 1 [ 67.397172] [drm:skl_set_power_well] Enabling power well 1 [ 67.397217] [drm:intel_display_power_get] enabling MISC IO power well [ 67.397221] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.397224] [drm:intel_display_power_get] enabling power well 2 [ 67.397228] [drm:skl_set_power_well] Enabling power well 2 [ 67.397237] [drm:intel_display_power_get] enabling DDI B power well [ 67.397241] [drm:skl_set_power_well] Enabling DDI B power well [ 67.397258] [drm:intel_display_power_put] disabling DDI B power well [ 67.397263] [drm:skl_set_power_well] Disabling DDI B power well [ 67.397266] [drm:intel_display_power_put] disabling power well 2 [ 67.397270] [drm:skl_set_power_well] Disabling power well 2 [ 67.397273] [drm:intel_display_power_put] disabling MISC IO power well [ 67.397278] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.397281] [drm:intel_display_power_put] disabling power well 1 [ 67.397286] [drm:skl_set_power_well] Disabling power well 1 [ 67.397290] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected [ 67.397307] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 67.397313] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 67.397326] [drm:drm_mode_getconnector] [CONNECTOR:43:?] [ 67.397329] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] [ 67.397332] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] [ 67.397335] [drm:intel_display_power_get] enabling power well 1 [ 67.397342] [drm:skl_set_power_well] Enabling power well 1 [ 67.397387] [drm:intel_display_power_get] enabling MISC IO power well [ 67.397401] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.397413] [drm:intel_display_power_get] enabling power well 2 [ 67.397426] [drm:skl_set_power_well] Enabling power well 2 [ 67.397442] [drm:intel_display_power_get] enabling DDI B power well [ 67.397455] [drm:skl_set_power_well] Enabling DDI B power well [ 67.397480] [drm:intel_display_power_put] disabling DDI B power well [ 67.397494] [drm:skl_set_power_well] Disabling DDI B power well [ 67.397506] [drm:intel_display_power_put] disabling power well 2 [ 67.397519] [drm:skl_set_power_well] Disabling power well 2 [ 67.397522] [drm:intel_display_power_put] disabling MISC IO power well [ 67.397527] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.397530] [drm:intel_display_power_put] disabling power well 1 [ 67.397535] [drm:skl_set_power_well] Disabling power well 1 [ 67.397539] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected [ 67.397543] [drm:drm_mode_getconnector] [CONNECTOR:43:?] [ 67.397546] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] [ 67.397549] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] [ 67.397552] [drm:intel_display_power_get] enabling power well 1 [ 67.397559] [drm:skl_set_power_well] Enabling power well 1 [ 67.397603] [drm:intel_display_power_get] enabling MISC IO power well [ 67.397607] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.397611] [drm:intel_display_power_get] enabling power well 2 [ 67.397615] [drm:skl_set_power_well] Enabling power well 2 [ 67.397623] [drm:intel_display_power_get] enabling DDI B power well [ 67.397627] [drm:skl_set_power_well] Enabling DDI B power well [ 67.397645] [drm:intel_display_power_put] disabling DDI B power well [ 67.397649] [drm:skl_set_power_well] Disabling DDI B power well [ 67.397652] [drm:intel_display_power_put] disabling power well 2 [ 67.397657] [drm:skl_set_power_well] Disabling power well 2 [ 67.397660] [drm:intel_display_power_put] disabling MISC IO power well [ 67.397665] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.397667] [drm:intel_display_power_put] disabling power well 1 [ 67.397673] [drm:skl_set_power_well] Disabling power well 1 [ 67.397676] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected [ 67.397685] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 67.397691] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 67.397695] [drm:drm_mode_getconnector] [CONNECTOR:43:?] [ 67.397698] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] [ 67.397701] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] [ 67.397704] [drm:intel_display_power_get] enabling power well 1 [ 67.397711] [drm:skl_set_power_well] Enabling power well 1 [ 67.397755] [drm:intel_display_power_get] enabling MISC IO power well [ 67.397759] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.397763] [drm:intel_display_power_get] enabling power well 2 [ 67.397767] [drm:skl_set_power_well] Enabling power well 2 [ 67.397775] [drm:intel_display_power_get] enabling DDI B power well [ 67.397779] [drm:skl_set_power_well] Enabling DDI B power well [ 67.397797] [drm:intel_display_power_put] disabling DDI B power well [ 67.397801] [drm:skl_set_power_well] Disabling DDI B power well [ 67.397804] [drm:intel_display_power_put] disabling power well 2 [ 67.397808] [drm:skl_set_power_well] Disabling power well 2 [ 67.397811] [drm:intel_display_power_put] disabling MISC IO power well [ 67.397816] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.397819] [drm:intel_display_power_put] disabling power well 1 [ 67.397824] [drm:skl_set_power_well] Disabling power well 1 [ 67.397828] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected [ 67.397832] [drm:drm_mode_getconnector] [CONNECTOR:43:?] [ 67.397852] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] [ 67.397870] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] [ 67.397887] [drm:intel_display_power_get] enabling power well 1 [ 67.397907] [drm:skl_set_power_well] Enabling power well 1 [ 67.397964] [drm:intel_display_power_get] enabling MISC IO power well [ 67.397981] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.397999] [drm:intel_display_power_get] enabling power well 2 [ 67.398015] [drm:skl_set_power_well] Enabling power well 2 [ 67.398024] [drm:intel_display_power_get] enabling DDI B power well [ 67.398028] [drm:skl_set_power_well] Enabling DDI B power well [ 67.398046] [drm:intel_display_power_put] disabling DDI B power well [ 67.398050] [drm:skl_set_power_well] Disabling DDI B power well [ 67.398053] [drm:intel_display_power_put] disabling power well 2 [ 67.398058] [drm:skl_set_power_well] Disabling power well 2 [ 67.398061] [drm:intel_display_power_put] disabling MISC IO power well [ 67.398065] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.398068] [drm:intel_display_power_put] disabling power well 1 [ 67.398073] [drm:skl_set_power_well] Disabling power well 1 [ 67.398077] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected [ 67.398084] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 67.398089] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 67.398094] [drm:drm_mode_getconnector] [CONNECTOR:47:?] [ 67.398098] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] [ 67.398102] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1] [ 67.398105] [drm:intel_display_power_get] enabling power well 1 [ 67.398112] [drm:skl_set_power_well] Enabling power well 1 [ 67.398156] [drm:intel_display_power_get] enabling MISC IO power well [ 67.398160] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.398163] [drm:intel_display_power_get] enabling power well 2 [ 67.398167] [drm:skl_set_power_well] Enabling power well 2 [ 67.398176] [drm:intel_display_power_get] enabling DDI B power well [ 67.398180] [drm:skl_set_power_well] Enabling DDI B power well [ 67.398477] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) [ 67.398482] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb [ 67.398485] [drm:intel_display_power_put] disabling DDI B power well [ 67.398490] [drm:skl_set_power_well] Disabling DDI B power well [ 67.398493] [drm:intel_display_power_put] disabling power well 2 [ 67.398497] [drm:skl_set_power_well] Disabling power well 2 [ 67.398500] [drm:intel_display_power_put] disabling MISC IO power well [ 67.398505] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.398507] [drm:intel_display_power_put] disabling power well 1 [ 67.398522] [drm:skl_set_power_well] Disabling power well 1 [ 67.398541] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected [ 67.398553] [drm:drm_mode_getconnector] [CONNECTOR:47:?] [ 67.398556] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] [ 67.398559] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1] [ 67.398562] [drm:intel_display_power_get] enabling power well 1 [ 67.398569] [drm:skl_set_power_well] Enabling power well 1 [ 67.398615] [drm:intel_display_power_get] enabling MISC IO power well [ 67.398623] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.398626] [drm:intel_display_power_get] enabling power well 2 [ 67.398630] [drm:skl_set_power_well] Enabling power well 2 [ 67.398639] [drm:intel_display_power_get] enabling DDI B power well [ 67.398643] [drm:skl_set_power_well] Enabling DDI B power well [ 67.399012] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) [ 67.399021] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb [ 67.399026] [drm:intel_display_power_put] disabling DDI B power well [ 67.399031] [drm:skl_set_power_well] Disabling DDI B power well [ 67.399035] [drm:intel_display_power_put] disabling power well 2 [ 67.399039] [drm:skl_set_power_well] Disabling power well 2 [ 67.399042] [drm:intel_display_power_put] disabling MISC IO power well [ 67.399047] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.399050] [drm:intel_display_power_put] disabling power well 1 [ 67.399056] [drm:skl_set_power_well] Disabling power well 1 [ 67.399060] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected [ 67.399082] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 67.399089] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 67.399094] [drm:drm_mode_getconnector] [CONNECTOR:47:?] [ 67.399099] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] [ 67.399102] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1] [ 67.399106] [drm:intel_display_power_get] enabling power well 1 [ 67.399113] [drm:skl_set_power_well] Enabling power well 1 [ 67.399158] [drm:intel_display_power_get] enabling MISC IO power well [ 67.399163] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.399166] [drm:intel_display_power_get] enabling power well 2 [ 67.399170] [drm:skl_set_power_well] Enabling power well 2 [ 67.399180] [drm:intel_display_power_get] enabling DDI B power well [ 67.399184] [drm:skl_set_power_well] Enabling DDI B power well [ 67.399487] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) [ 67.399498] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb [ 67.399505] [drm:intel_display_power_put] disabling DDI B power well [ 67.399514] [drm:skl_set_power_well] Disabling DDI B power well [ 67.399524] [drm:intel_display_power_put] disabling power well 2 [ 67.399531] [drm:skl_set_power_well] Disabling power well 2 [ 67.399541] [drm:intel_display_power_put] disabling MISC IO power well [ 67.399548] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.399555] [drm:intel_display_power_put] disabling power well 1 [ 67.399563] [drm:skl_set_power_well] Disabling power well 1 [ 67.399569] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected [ 67.399582] [drm:drm_mode_getconnector] [CONNECTOR:47:?] [ 67.399589] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] [ 67.399599] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1] [ 67.399607] [drm:intel_display_power_get] enabling power well 1 [ 67.399618] [drm:skl_set_power_well] Enabling power well 1 [ 67.399668] [drm:intel_display_power_get] enabling MISC IO power well [ 67.399674] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.399680] [drm:intel_display_power_get] enabling power well 2 [ 67.399685] [drm:skl_set_power_well] Enabling power well 2 [ 67.399698] [drm:intel_display_power_get] enabling DDI B power well [ 67.399704] [drm:skl_set_power_well] Enabling DDI B power well [ 67.400082] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) [ 67.400091] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb [ 67.400096] [drm:intel_display_power_put] disabling DDI B power well [ 67.400101] [drm:skl_set_power_well] Disabling DDI B power well [ 67.400105] [drm:intel_display_power_put] disabling power well 2 [ 67.400109] [drm:skl_set_power_well] Disabling power well 2 [ 67.400112] [drm:intel_display_power_put] disabling MISC IO power well [ 67.400117] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.400120] [drm:intel_display_power_put] disabling power well 1 [ 67.400125] [drm:skl_set_power_well] Disabling power well 1 [ 67.400130] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected [ 67.400152] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 67.400158] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 67.400164] [drm:drm_mode_getconnector] [CONNECTOR:47:?] [ 67.400168] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] [ 67.400171] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1] [ 67.400175] [drm:intel_display_power_get] enabling power well 1 [ 67.400182] [drm:skl_set_power_well] Enabling power well 1 [ 67.400228] [drm:intel_display_power_get] enabling MISC IO power well [ 67.400232] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.400236] [drm:intel_display_power_get] enabling power well 2 [ 67.400240] [drm:skl_set_power_well] Enabling power well 2 [ 67.400250] [drm:intel_display_power_get] enabling DDI B power well [ 67.400254] [drm:skl_set_power_well] Enabling DDI B power well [ 67.400485] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) [ 67.400496] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb [ 67.400503] [drm:intel_display_power_put] disabling DDI B power well [ 67.400510] [drm:skl_set_power_well] Disabling DDI B power well [ 67.400515] [drm:intel_display_power_put] disabling power well 2 [ 67.400530] [drm:skl_set_power_well] Disabling power well 2 [ 67.400535] [drm:intel_display_power_put] disabling MISC IO power well [ 67.400541] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.400553] [drm:intel_display_power_put] disabling power well 1 [ 67.400563] [drm:skl_set_power_well] Disabling power well 1 [ 67.400571] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected [ 67.400588] [drm:drm_mode_getconnector] [CONNECTOR:47:?] [ 67.400594] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] [ 67.400600] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1] [ 67.400608] [drm:intel_display_power_get] enabling power well 1 [ 67.400622] [drm:skl_set_power_well] Enabling power well 1 [ 67.400671] [drm:intel_display_power_get] enabling MISC IO power well [ 67.400678] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.400683] [drm:intel_display_power_get] enabling power well 2 [ 67.400689] [drm:skl_set_power_well] Enabling power well 2 [ 67.400701] [drm:intel_display_power_get] enabling DDI B power well [ 67.400707] [drm:skl_set_power_well] Enabling DDI B power well [ 67.401008] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) [ 67.401013] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb [ 67.401016] [drm:intel_display_power_put] disabling DDI B power well [ 67.401021] [drm:skl_set_power_well] Disabling DDI B power well [ 67.401024] [drm:intel_display_power_put] disabling power well 2 [ 67.401028] [drm:skl_set_power_well] Disabling power well 2 [ 67.401031] [drm:intel_display_power_put] disabling MISC IO power well [ 67.401036] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.401039] [drm:intel_display_power_put] disabling power well 1 [ 67.401044] [drm:skl_set_power_well] Disabling power well 1 [ 67.401048] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected [ 67.401063] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 67.401068] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 67.401073] [drm:drm_mode_getconnector] [CONNECTOR:50:?] [ 67.401077] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] [ 67.401081] [drm:intel_dp_detect] [CONNECTOR:50:DP-2] [ 67.401084] [drm:intel_display_power_get] enabling power well 1 [ 67.401092] [drm:skl_set_power_well] Enabling power well 1 [ 67.401136] [drm:intel_display_power_get] enabling MISC IO power well [ 67.401140] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.401144] [drm:intel_display_power_get] enabling power well 2 [ 67.401148] [drm:skl_set_power_well] Enabling power well 2 [ 67.401157] [drm:intel_display_power_get] enabling DDI C power well [ 67.401161] [drm:skl_set_power_well] Enabling DDI C power well [ 67.401179] [drm:intel_display_power_put] disabling DDI C power well [ 67.401183] [drm:skl_set_power_well] Disabling DDI C power well [ 67.401186] [drm:intel_display_power_put] disabling power well 2 [ 67.401191] [drm:skl_set_power_well] Disabling power well 2 [ 67.401194] [drm:intel_display_power_put] disabling MISC IO power well [ 67.401199] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.401202] [drm:intel_display_power_put] disabling power well 1 [ 67.401207] [drm:skl_set_power_well] Disabling power well 1 [ 67.401211] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected [ 67.401215] [drm:drm_mode_getconnector] [CONNECTOR:50:?] [ 67.401219] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] [ 67.401222] [drm:intel_dp_detect] [CONNECTOR:50:DP-2] [ 67.401225] [drm:intel_display_power_get] enabling power well 1 [ 67.401232] [drm:skl_set_power_well] Enabling power well 1 [ 67.401276] [drm:intel_display_power_get] enabling MISC IO power well [ 67.401280] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.401283] [drm:intel_display_power_get] enabling power well 2 [ 67.401287] [drm:skl_set_power_well] Enabling power well 2 [ 67.401296] [drm:intel_display_power_get] enabling DDI C power well [ 67.401300] [drm:skl_set_power_well] Enabling DDI C power well [ 67.401331] [drm:intel_display_power_put] disabling DDI C power well [ 67.401337] [drm:skl_set_power_well] Disabling DDI C power well [ 67.401342] [drm:intel_display_power_put] disabling power well 2 [ 67.401348] [drm:skl_set_power_well] Disabling power well 2 [ 67.401352] [drm:intel_display_power_put] disabling MISC IO power well [ 67.401356] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.401359] [drm:intel_display_power_put] disabling power well 1 [ 67.401364] [drm:skl_set_power_well] Disabling power well 1 [ 67.401368] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected [ 67.401378] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 67.401384] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 67.401395] [drm:drm_mode_getconnector] [CONNECTOR:50:?] [ 67.401409] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] [ 67.401421] [drm:intel_dp_detect] [CONNECTOR:50:DP-2] [ 67.401433] [drm:intel_display_power_get] enabling power well 1 [ 67.401449] [drm:skl_set_power_well] Enabling power well 1 [ 67.401502] [drm:intel_display_power_get] enabling MISC IO power well [ 67.401515] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.401528] [drm:intel_display_power_get] enabling power well 2 [ 67.401537] [drm:skl_set_power_well] Enabling power well 2 [ 67.401545] [drm:intel_display_power_get] enabling DDI C power well [ 67.401549] [drm:skl_set_power_well] Enabling DDI C power well [ 67.401567] [drm:intel_display_power_put] disabling DDI C power well [ 67.401571] [drm:skl_set_power_well] Disabling DDI C power well [ 67.401574] [drm:intel_display_power_put] disabling power well 2 [ 67.401579] [drm:skl_set_power_well] Disabling power well 2 [ 67.401582] [drm:intel_display_power_put] disabling MISC IO power well [ 67.401586] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.401589] [drm:intel_display_power_put] disabling power well 1 [ 67.401595] [drm:skl_set_power_well] Disabling power well 1 [ 67.401598] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected [ 67.401602] [drm:drm_mode_getconnector] [CONNECTOR:50:?] [ 67.401605] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] [ 67.401609] [drm:intel_dp_detect] [CONNECTOR:50:DP-2] [ 67.401611] [drm:intel_display_power_get] enabling power well 1 [ 67.401618] [drm:skl_set_power_well] Enabling power well 1 [ 67.401663] [drm:intel_display_power_get] enabling MISC IO power well [ 67.401667] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.401670] [drm:intel_display_power_get] enabling power well 2 [ 67.401674] [drm:skl_set_power_well] Enabling power well 2 [ 67.401683] [drm:intel_display_power_get] enabling DDI C power well [ 67.401687] [drm:skl_set_power_well] Enabling DDI C power well [ 67.401704] [drm:intel_display_power_put] disabling DDI C power well [ 67.401709] [drm:skl_set_power_well] Disabling DDI C power well [ 67.401712] [drm:intel_display_power_put] disabling power well 2 [ 67.401716] [drm:skl_set_power_well] Disabling power well 2 [ 67.401719] [drm:intel_display_power_put] disabling MISC IO power well [ 67.401724] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.401727] [drm:intel_display_power_put] disabling power well 1 [ 67.401732] [drm:skl_set_power_well] Disabling power well 1 [ 67.401736] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected [ 67.401743] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 67.401748] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 67.401753] [drm:drm_mode_getconnector] [CONNECTOR:50:?] [ 67.401756] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] [ 67.401759] [drm:intel_dp_detect] [CONNECTOR:50:DP-2] [ 67.401762] [drm:intel_display_power_get] enabling power well 1 [ 67.401769] [drm:skl_set_power_well] Enabling power well 1 [ 67.401813] [drm:intel_display_power_get] enabling MISC IO power well [ 67.401817] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.401820] [drm:intel_display_power_get] enabling power well 2 [ 67.401824] [drm:skl_set_power_well] Enabling power well 2 [ 67.401833] [drm:intel_display_power_get] enabling DDI C power well [ 67.401837] [drm:skl_set_power_well] Enabling DDI C power well [ 67.401854] [drm:intel_display_power_put] disabling DDI C power well [ 67.401859] [drm:skl_set_power_well] Disabling DDI C power well [ 67.401862] [drm:intel_display_power_put] disabling power well 2 [ 67.401866] [drm:skl_set_power_well] Disabling power well 2 [ 67.401869] [drm:intel_display_power_put] disabling MISC IO power well [ 67.401874] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.401877] [drm:intel_display_power_put] disabling power well 1 [ 67.401882] [drm:skl_set_power_well] Disabling power well 1 [ 67.401886] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected [ 67.401890] [drm:drm_mode_getconnector] [CONNECTOR:50:?] [ 67.401893] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] [ 67.401896] [drm:intel_dp_detect] [CONNECTOR:50:DP-2] [ 67.401899] [drm:intel_display_power_get] enabling power well 1 [ 67.401906] [drm:skl_set_power_well] Enabling power well 1 [ 67.401951] [drm:intel_display_power_get] enabling MISC IO power well [ 67.401969] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.401987] [drm:intel_display_power_get] enabling power well 2 [ 67.402004] [drm:skl_set_power_well] Enabling power well 2 [ 67.402026] [drm:intel_display_power_get] enabling DDI C power well [ 67.402044] [drm:skl_set_power_well] Enabling DDI C power well [ 67.402075] [drm:intel_display_power_put] disabling DDI C power well [ 67.402092] [drm:skl_set_power_well] Disabling DDI C power well [ 67.402107] [drm:intel_display_power_put] disabling power well 2 [ 67.402120] [drm:skl_set_power_well] Disabling power well 2 [ 67.402131] [drm:intel_display_power_put] disabling MISC IO power well [ 67.402136] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.402139] [drm:intel_display_power_put] disabling power well 1 [ 67.402144] [drm:skl_set_power_well] Disabling power well 1 [ 67.402148] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected [ 67.402155] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 67.402160] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 67.402164] [drm:drm_mode_getconnector] [CONNECTOR:54:?] [ 67.402168] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] [ 67.402171] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2] [ 67.402175] [drm:intel_display_power_get] enabling power well 1 [ 67.402181] [drm:skl_set_power_well] Enabling power well 1 [ 67.402226] [drm:intel_display_power_get] enabling MISC IO power well [ 67.402230] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.402233] [drm:intel_display_power_get] enabling power well 2 [ 67.402237] [drm:skl_set_power_well] Enabling power well 2 [ 67.402246] [drm:intel_display_power_get] enabling DDI C power well [ 67.402250] [drm:skl_set_power_well] Enabling DDI C power well [ 67.402548] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) [ 67.402551] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc [ 67.402554] [drm:intel_display_power_put] disabling DDI C power well [ 67.402559] [drm:skl_set_power_well] Disabling DDI C power well [ 67.402562] [drm:intel_display_power_put] disabling power well 2 [ 67.402566] [drm:skl_set_power_well] Disabling power well 2 [ 67.402569] [drm:intel_display_power_put] disabling MISC IO power well [ 67.402574] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.402577] [drm:intel_display_power_put] disabling power well 1 [ 67.402582] [drm:skl_set_power_well] Disabling power well 1 [ 67.402586] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected [ 67.402591] [drm:drm_mode_getconnector] [CONNECTOR:54:?] [ 67.402594] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] [ 67.402597] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2] [ 67.402600] [drm:intel_display_power_get] enabling power well 1 [ 67.402607] [drm:skl_set_power_well] Enabling power well 1 [ 67.402654] [drm:intel_display_power_get] enabling MISC IO power well [ 67.402672] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.402689] [drm:intel_display_power_get] enabling power well 2 [ 67.402697] [drm:skl_set_power_well] Enabling power well 2 [ 67.402705] [drm:intel_display_power_get] enabling DDI C power well [ 67.402709] [drm:skl_set_power_well] Enabling DDI C power well [ 67.403026] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) [ 67.403033] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc [ 67.403038] [drm:intel_display_power_put] disabling DDI C power well [ 67.403043] [drm:skl_set_power_well] Disabling DDI C power well [ 67.403046] [drm:intel_display_power_put] disabling power well 2 [ 67.403051] [drm:skl_set_power_well] Disabling power well 2 [ 67.403054] [drm:intel_display_power_put] disabling MISC IO power well [ 67.403058] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.403061] [drm:intel_display_power_put] disabling power well 1 [ 67.403067] [drm:skl_set_power_well] Disabling power well 1 [ 67.403072] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected [ 67.403093] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 67.403099] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 67.403105] [drm:drm_mode_getconnector] [CONNECTOR:54:?] [ 67.403109] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] [ 67.403113] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2] [ 67.403117] [drm:intel_display_power_get] enabling power well 1 [ 67.403124] [drm:skl_set_power_well] Enabling power well 1 [ 67.403168] [drm:intel_display_power_get] enabling MISC IO power well [ 67.403173] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.403176] [drm:intel_display_power_get] enabling power well 2 [ 67.403180] [drm:skl_set_power_well] Enabling power well 2 [ 67.403190] [drm:intel_display_power_get] enabling DDI C power well [ 67.403194] [drm:skl_set_power_well] Enabling DDI C power well [ 67.403495] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) [ 67.403505] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc [ 67.403510] [drm:intel_display_power_put] disabling DDI C power well [ 67.403515] [drm:skl_set_power_well] Disabling DDI C power well [ 67.403519] [drm:intel_display_power_put] disabling power well 2 [ 67.403523] [drm:skl_set_power_well] Disabling power well 2 [ 67.403526] [drm:intel_display_power_put] disabling MISC IO power well [ 67.403531] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.403534] [drm:intel_display_power_put] disabling power well 1 [ 67.403540] [drm:skl_set_power_well] Disabling power well 1 [ 67.403544] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected [ 67.403555] [drm:drm_mode_getconnector] [CONNECTOR:54:?] [ 67.403560] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] [ 67.403563] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2] [ 67.403567] [drm:intel_display_power_get] enabling power well 1 [ 67.403574] [drm:skl_set_power_well] Enabling power well 1 [ 67.403620] [drm:intel_display_power_get] enabling MISC IO power well [ 67.403624] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.403627] [drm:intel_display_power_get] enabling power well 2 [ 67.403631] [drm:skl_set_power_well] Enabling power well 2 [ 67.403641] [drm:intel_display_power_get] enabling DDI C power well [ 67.403645] [drm:skl_set_power_well] Enabling DDI C power well [ 67.404022] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) [ 67.404032] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc [ 67.404037] [drm:intel_display_power_put] disabling DDI C power well [ 67.404042] [drm:skl_set_power_well] Disabling DDI C power well [ 67.404046] [drm:intel_display_power_put] disabling power well 2 [ 67.404050] [drm:skl_set_power_well] Disabling power well 2 [ 67.404053] [drm:intel_display_power_put] disabling MISC IO power well [ 67.404058] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.404061] [drm:intel_display_power_put] disabling power well 1 [ 67.404067] [drm:skl_set_power_well] Disabling power well 1 [ 67.404071] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected [ 67.404096] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 67.404102] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9] [ 67.404108] [drm:drm_mode_getconnector] [CONNECTOR:54:?] [ 67.404112] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] [ 67.404115] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2] [ 67.404120] [drm:intel_display_power_get] enabling power well 1 [ 67.404127] [drm:skl_set_power_well] Enabling power well 1 [ 67.404173] [drm:intel_display_power_get] enabling MISC IO power well [ 67.404177] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.404180] [drm:intel_display_power_get] enabling power well 2 [ 67.404184] [drm:skl_set_power_well] Enabling power well 2 [ 67.404195] [drm:intel_display_power_get] enabling DDI C power well [ 67.404199] [drm:skl_set_power_well] Enabling DDI C power well [ 67.404502] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) [ 67.404512] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc [ 67.404519] [drm:intel_display_power_put] disabling DDI C power well [ 67.404527] [drm:skl_set_power_well] Disabling DDI C power well [ 67.404531] [drm:intel_display_power_put] disabling power well 2 [ 67.404537] [drm:skl_set_power_well] Disabling power well 2 [ 67.404542] [drm:intel_display_power_put] disabling MISC IO power well [ 67.404548] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.404552] [drm:intel_display_power_put] disabling power well 1 [ 67.404559] [drm:skl_set_power_well] Disabling power well 1 [ 67.404566] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected [ 67.404580] [drm:drm_mode_getconnector] [CONNECTOR:54:?] [ 67.404586] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] [ 67.404591] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2] [ 67.404597] [drm:intel_display_power_get] enabling power well 1 [ 67.404606] [drm:skl_set_power_well] Enabling power well 1 [ 67.404655] [drm:intel_display_power_get] enabling MISC IO power well [ 67.404661] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.404666] [drm:intel_display_power_get] enabling power well 2 [ 67.404672] [drm:skl_set_power_well] Enabling power well 2 [ 67.404684] [drm:intel_display_power_get] enabling DDI C power well [ 67.404699] [drm:skl_set_power_well] Enabling DDI C power well [ 67.405013] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) [ 67.405018] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc [ 67.405021] [drm:intel_display_power_put] disabling DDI C power well [ 67.405026] [drm:skl_set_power_well] Disabling DDI C power well [ 67.405029] [drm:intel_display_power_put] disabling power well 2 [ 67.405034] [drm:skl_set_power_well] Disabling power well 2 [ 67.405037] [drm:intel_display_power_put] disabling MISC IO power well [ 67.405041] [drm:skl_set_power_well] Disabling MISC IO power well [ 67.405044] [drm:intel_display_power_put] disabling power well 1 [ 67.405050] [drm:skl_set_power_well] Disabling power well 1 [ 67.405054] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected [ 67.406509] kms_flip: exiting, ret=0 [ 67.406651] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0) [ 67.406656] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set [ 67.406659] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0 [ 67.406663] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] encoder changed, full mode switch [ 67.406667] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 67.406669] [drm:intel_modeset_stage_output_state] [ENCODER:33:TMDS-33] crtc changed, full mode switch [ 67.406674] [drm:intel_modeset_stage_output_state] [CRTC:20] enabled, full mode switch [ 67.406678] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 67.406683] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains [ 67.406689] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 540000 pixel clock 361310KHz [ 67.406691] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18 [ 67.406694] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18 [ 67.406696] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000 [ 67.406701] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 [ 67.406703] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 67.406705] [drm:intel_dump_pipe_config] cpu_transcoder: D [ 67.406706] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 [ 67.406710] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 67.406713] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64 [ 67.406716] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 67.406718] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 67.406719] [drm:intel_dump_pipe_config] requested mode: [ 67.406725] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 67.406726] [drm:intel_dump_pipe_config] adjusted mode: [ 67.406730] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 67.406735] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa [ 67.406736] [drm:intel_dump_pipe_config] port clock: 540000 [ 67.406738] [drm:intel_dump_pipe_config] pipe src size: 3200x1800 [ 67.406740] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 67.406743] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 67.406744] [drm:intel_dump_pipe_config] ips: 0 [ 67.406746] [drm:intel_dump_pipe_config] double wide: 0 [ 67.406754] [drm:intel_display_power_get] enabling power well 1 [ 67.406761] [drm:skl_set_power_well] Enabling power well 1 [ 67.406804] [drm:intel_display_power_get] enabling MISC IO power well [ 67.406807] [drm:skl_set_power_well] Enabling MISC IO power well [ 67.406810] [drm:intel_display_power_get] enabling DDI A/E power well [ 67.406812] [drm:skl_set_power_well] Enabling DDI A/E power well [ 67.406843] [drm:edp_panel_on] Turn eDP port A panel power on [ 67.406859] [drm:wait_panel_power_cycle] Wait for panel power cycle [ 67.928502] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control abcd0000 [ 67.968852] [drm:wait_panel_status] Wait complete [ 67.968890] [drm:wait_panel_on] Wait for panel power on [ 67.968915] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003 [ 68.170994] [drm:wait_panel_status] Wait complete [ 68.171022] [drm:edp_panel_vdd_on] Turning eDP port A VDD on [ 68.171088] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b [ 68.172273] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 [ 68.172973] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 [ 68.173660] [drm:intel_dp_start_link_train] clock recovery OK [ 68.174658] [drm:intel_dp_set_signal_levels] Using signal levels 05000000 [ 68.175646] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful [ 68.175954] [drm:skl_wm_flush_pipe] flush pipe A (pass 3) [ 68.175971] [drm:intel_edp_backlight_on] [ 68.175974] [drm:intel_panel_enable_backlight] pipe A [ 68.176032] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937 [ 68.176087] [drm:intel_psr_match_conditions] PSR disable by flag [ 68.176088] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS [ 68.176114] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1] [ 68.176119] [drm:check_encoder_state] [ENCODER:33:TMDS-33] [ 68.176123] [drm:check_encoder_state] [ENCODER:42:TMDS-42] [ 68.176125] [drm:check_encoder_state] [ENCODER:44:DP MST-44] [ 68.176127] [drm:check_encoder_state] [ENCODER:45:DP MST-45] [ 68.176128] [drm:check_encoder_state] [ENCODER:46:DP MST-46] [ 68.176130] [drm:check_encoder_state] [ENCODER:49:TMDS-49] [ 68.176132] [drm:check_encoder_state] [ENCODER:51:DP MST-51] [ 68.176133] [drm:check_encoder_state] [ENCODER:52:DP MST-52] [ 68.176135] [drm:check_encoder_state] [ENCODER:53:DP MST-53] [ 68.176137] [drm:check_crtc_state] [CRTC:20] [ 68.176155] [drm:check_crtc_state] [CRTC:25] [ 68.176156] [drm:check_crtc_state] [CRTC:30] [ 68.176159] [drm:check_shared_dpll_state] DPLL 1 [ 68.176162] [drm:check_shared_dpll_state] DPLL 2 [ 68.176164] [drm:check_shared_dpll_state] DPLL 3 [ 68.176175] [drm:intel_crtc_set_config] [CRTC:25] [NOFB] [ 68.176180] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0 [ 68.176187] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 68.176194] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 [ 68.176199] [drm:intel_crtc_set_config] [CRTC:30] [NOFB] [ 68.176202] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=0, fb_changed=0 [ 68.176206] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 68.176211] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 [ 68.399683] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0) [ 68.399698] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 [ 68.399707] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 68.399716] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 68.399722] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains [ 68.399730] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 540000 pixel clock 361310KHz [ 68.399734] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18 [ 68.399739] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18 [ 68.399743] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000 [ 68.399749] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 [ 68.399753] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 68.399756] [drm:intel_dump_pipe_config] cpu_transcoder: D [ 68.399759] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 [ 68.399764] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 68.399769] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64 [ 68.399774] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 68.399777] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 68.399780] [drm:intel_dump_pipe_config] requested mode: [ 68.399787] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 68.399790] [drm:intel_dump_pipe_config] adjusted mode: [ 68.399796] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa [ 68.399802] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa [ 68.399805] [drm:intel_dump_pipe_config] port clock: 540000 [ 68.399809] [drm:intel_dump_pipe_config] pipe src size: 3200x1800 [ 68.399813] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 68.399817] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 68.399820] [drm:intel_dump_pipe_config] ips: 0 [ 68.399823] [drm:intel_dump_pipe_config] double wide: 0 [ 68.399829] [drm:intel_crtc_set_config] [CRTC:25] [NOFB] [ 68.399834] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0 [ 68.399840] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 68.399847] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 [ 68.399852] [drm:intel_crtc_set_config] [CRTC:30] [NOFB] [ 68.399856] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=0, fb_changed=0 [ 68.399861] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20] [ 68.399868] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 [ 71.181747] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off [ 71.181812] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007