From aeccd5d6fe6682fd8d6ab36a3c87106346ccb661 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Christian=20K=C3=B6nig?= Date: Tue, 28 Apr 2015 12:48:14 +0200 Subject: [PATCH] drm/radeon: WIP use FW for UVD semaphores MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Christian König --- drivers/gpu/drm/radeon/uvd_v1_0.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/radeon/uvd_v1_0.c b/drivers/gpu/drm/radeon/uvd_v1_0.c index e72b3cb..251bb76 100644 --- a/drivers/gpu/drm/radeon/uvd_v1_0.c +++ b/drivers/gpu/drm/radeon/uvd_v1_0.c @@ -468,14 +468,21 @@ bool uvd_v1_0_semaphore_emit(struct radeon_device *rdev, { uint64_t addr = semaphore->gpu_addr; - radeon_ring_write(ring, PACKET0(UVD_SEMA_ADDR_LOW, 0)); + radeon_ring_write(ring, PACKET0(UVD_GPCOM_VCPU_DATA0, 0)); + radeon_ring_write(ring, lower_32_bits(addr)); + radeon_ring_write(ring, PACKET0(UVD_GPCOM_VCPU_DATA1, 0)); + radeon_ring_write(ring, upper_32_bits(addr)); + radeon_ring_write(ring, PACKET0(UVD_GPCOM_VCPU_CMD, 0)); + radeon_ring_write(ring, emit_wait ? 2 : 3); + + /*radeon_ring_write(ring, PACKET0(UVD_SEMA_ADDR_LOW, 0)); radeon_ring_write(ring, (addr >> 3) & 0x000FFFFF); radeon_ring_write(ring, PACKET0(UVD_SEMA_ADDR_HIGH, 0)); radeon_ring_write(ring, (addr >> 23) & 0x000FFFFF); radeon_ring_write(ring, PACKET0(UVD_SEMA_CMD, 0)); - radeon_ring_write(ring, emit_wait ? 1 : 0); + radeon_ring_write(ring, emit_wait ? 1 : 0);*/ return true; } -- 1.9.1