From bcd512930a78f51ac19dc20f663f90902db37efa Mon Sep 17 00:00:00 2001 From: Ander Conselvan de Oliveira Date: Wed, 13 May 2015 10:09:28 +0300 Subject: [PATCH] drm/i915: Preserve ddi_pll_sel when allocating new pipe_config Otherwise, after a state swap of a crtc that doesn't need modeset, we'll endup with the wrong value for it. This regression was introduced in: commit f3538b75ea5097c8637c2ed299dca7c0ab215f5c Author: Ander Conselvan de Oliveira Date: Tue Apr 21 17:13:23 2015 +0300 drm/i915: Swap atomic state in legacy modeset Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90410 Signed-off-by: Ander Conselvan de Oliveira --- drivers/gpu/drm/i915/intel_display.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index b580640..1bb951a 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -11452,12 +11452,15 @@ clear_intel_crtc_state(struct intel_crtc_state *crtc_state) struct intel_crtc_scaler_state scaler_state; struct intel_dpll_hw_state dpll_hw_state; enum intel_dpll_id shared_dpll; + uint32_t ddi_pll_sel; + /* Clear only the intel specific part of the crtc state excluding scalers */ tmp_state = crtc_state->base; scaler_state = crtc_state->scaler_state; shared_dpll = crtc_state->shared_dpll; dpll_hw_state = crtc_state->dpll_hw_state; + ddi_pll_sel = crtc_state->ddi_pll_sel; memset(crtc_state, 0, sizeof *crtc_state); @@ -11465,6 +11468,7 @@ clear_intel_crtc_state(struct intel_crtc_state *crtc_state) crtc_state->scaler_state = scaler_state; crtc_state->shared_dpll = shared_dpll; crtc_state->dpll_hw_state = dpll_hw_state; + crtc_state->ddi_pll_sel = ddi_pll_sel; } static int -- 2.1.0