[ 377.528539] [drm:drm_mode_getconnector] [CONNECTOR:30:?] [ 377.528549] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:30:LVDS-1] [ 377.528553] [drm:intel_lvds_detect] [CONNECTOR:30:LVDS-1] [ 377.528573] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:30:LVDS-1] probed modes : [ 377.528578] [drm:drm_mode_debug_printmodeline] Modeline 33:"1600x900" 60 97750 1600 1648 1680 1760 900 903 908 926 0x48 0xa [ 377.528583] [drm:drm_mode_debug_printmodeline] Modeline 34:"1600x900" 50 81490 1600 1648 1680 1760 900 903 908 926 0x40 0xa [ 377.528590] [drm:drm_mode_getconnector] [CONNECTOR:30:?] [ 377.528745] [drm:drm_mode_getconnector] [CONNECTOR:46:?] [ 377.528749] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:46:DP-1] [ 377.528755] [drm:intel_dp_detect] [CONNECTOR:46:DP-1] [ 377.529241] [drm:intel_dp_get_dpcd] DPCD: 11 0a 82 41 00 03 01 81 00 00 00 00 18 00 00 [ 377.530373] [drm:intel_dp_probe_oui] Sink OUI: 0022b9 [ 377.530724] [drm:intel_dp_probe_oui] Branch OUI: 0022b9 [ 377.531702] [drm:drm_dp_i2c_do_msg] native defer [ 377.533630] [drm:drm_dp_i2c_do_msg] native defer [ 377.566699] [drm:drm_edid_to_eld] ELD: no CEA Extension found [ 377.566715] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:46:DP-1] probed modes : [ 377.566720] [drm:drm_mode_debug_printmodeline] Modeline 57:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 377.566724] [drm:drm_mode_debug_printmodeline] Modeline 61:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6 [ 377.566727] [drm:drm_mode_debug_printmodeline] Modeline 66:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5 [ 377.566731] [drm:drm_mode_debug_printmodeline] Modeline 59:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 [ 377.566734] [drm:drm_mode_debug_printmodeline] Modeline 60:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6 [ 377.566738] [drm:drm_mode_debug_printmodeline] Modeline 58:"1280x720" 60 74440 1280 1336 1472 1664 720 721 724 746 0x0 0x6 [ 377.566741] [drm:drm_mode_debug_printmodeline] Modeline 67:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5 [ 377.566744] [drm:drm_mode_debug_printmodeline] Modeline 68:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa [ 377.566748] [drm:drm_mode_debug_printmodeline] Modeline 69:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5 [ 377.566751] [drm:drm_mode_debug_printmodeline] Modeline 62:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 [ 377.566754] [drm:drm_mode_debug_printmodeline] Modeline 63:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa [ 377.566758] [drm:drm_mode_debug_printmodeline] Modeline 64:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa [ 377.566761] [drm:drm_mode_debug_printmodeline] Modeline 65:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6 [ 377.566776] [drm:drm_mode_getconnector] [CONNECTOR:46:?] [ 377.566823] [drm:drm_mode_getconnector] [CONNECTOR:52:?] [ 377.566826] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:52:DP-2] [ 377.566831] [drm:intel_dp_detect] [CONNECTOR:52:DP-2] [ 377.567743] [drm:intel_dp_get_dpcd] DPCD: 11 0a 84 01 01 00 01 00 02 02 06 00 00 00 00 [ 377.616733] [drm:drm_detect_monitor_audio] Monitor has basic audio support [ 377.616815] [drm:drm_edid_to_eld] ELD monitor P24W-6 LED [ 377.616818] [drm:drm_edid_to_eld] ELD size 36, SAD count 1 [ 377.616858] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:52:DP-2] probed modes : [ 377.616863] [drm:drm_mode_debug_printmodeline] Modeline 71:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 [ 377.616867] [drm:drm_mode_debug_printmodeline] Modeline 72:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 [ 377.616870] [drm:drm_mode_debug_printmodeline] Modeline 100:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 [ 377.616874] [drm:drm_mode_debug_printmodeline] Modeline 92:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 [ 377.616878] [drm:drm_mode_debug_printmodeline] Modeline 104:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 [ 377.616882] [drm:drm_mode_debug_printmodeline] Modeline 73:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1089 1095 1125 0x40 0xa [ 377.616885] [drm:drm_mode_debug_printmodeline] Modeline 91:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5 [ 377.616889] [drm:drm_mode_debug_printmodeline] Modeline 93:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15 [ 377.616893] [drm:drm_mode_debug_printmodeline] Modeline 77:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5 [ 377.616896] [drm:drm_mode_debug_printmodeline] Modeline 78:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6 [ 377.616900] [drm:drm_mode_debug_printmodeline] Modeline 81:"1600x900" 60 118963 1600 1696 1864 2128 900 901 904 932 0x0 0x6 [ 377.616903] [drm:drm_mode_debug_printmodeline] Modeline 86:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5 [ 377.616907] [drm:drm_mode_debug_printmodeline] Modeline 80:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 [ 377.616911] [drm:drm_mode_debug_printmodeline] Modeline 79:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6 [ 377.616914] [drm:drm_mode_debug_printmodeline] Modeline 74:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5 [ 377.616918] [drm:drm_mode_debug_printmodeline] Modeline 101:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5 [ 377.616922] [drm:drm_mode_debug_printmodeline] Modeline 75:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5 [ 377.616925] [drm:drm_mode_debug_printmodeline] Modeline 87:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5 [ 377.616929] [drm:drm_mode_debug_printmodeline] Modeline 88:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa [ 377.616933] [drm:drm_mode_debug_printmodeline] Modeline 89:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5 [ 377.616936] [drm:drm_mode_debug_printmodeline] Modeline 82:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 [ 377.616940] [drm:drm_mode_debug_printmodeline] Modeline 76:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa [ 377.616943] [drm:drm_mode_debug_printmodeline] Modeline 106:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa [ 377.616947] [drm:drm_mode_debug_printmodeline] Modeline 95:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa [ 377.616950] [drm:drm_mode_debug_printmodeline] Modeline 83:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa [ 377.616954] [drm:drm_mode_debug_printmodeline] Modeline 84:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa [ 377.616958] [drm:drm_mode_debug_printmodeline] Modeline 97:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa [ 377.616961] [drm:drm_mode_debug_printmodeline] Modeline 85:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6 [ 377.617004] [drm:drm_mode_getconnector] [CONNECTOR:52:?] [ 377.617055] [drm:drm_mode_getconnector] [CONNECTOR:54:?] [ 377.617058] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:DP-3] [ 377.617060] [drm:intel_dp_detect] [CONNECTOR:54:DP-3] [ 377.617065] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:DP-3] disconnected [ 377.617070] [drm:drm_mode_getconnector] [CONNECTOR:41:?] [ 377.617073] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:41:HDMI-A-1] [ 377.617076] [drm:intel_hdmi_detect] [CONNECTOR:41:HDMI-A-1] [ 377.617269] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) [ 377.617276] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb [ 377.617282] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:41:HDMI-A-1] disconnected [ 377.617296] [drm:drm_mode_getconnector] [CONNECTOR:48:?] [ 377.617301] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:48:HDMI-A-2] [ 377.617304] [drm:intel_hdmi_detect] [CONNECTOR:48:HDMI-A-2] [ 377.617494] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) [ 377.617498] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc [ 377.617503] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:48:HDMI-A-2] disconnected [ 377.617514] [drm:drm_mode_getconnector] [CONNECTOR:50:?] [ 377.617518] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:HDMI-A-3] [ 377.617521] [drm:intel_hdmi_detect] [CONNECTOR:50:HDMI-A-3] [ 377.617705] [drm:gmbus_xfer] GMBUS [i915 gmbus dpd] NAK for addr: 0050 r(1) [ 377.617710] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpd [ 377.617715] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:HDMI-A-3] disconnected [ 377.617727] [drm:drm_mode_getconnector] [CONNECTOR:38:?] [ 377.617732] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:38:VGA-1] [ 377.617736] [drm:intel_crt_detect] [CONNECTOR:38:VGA-1] force=1 [ 377.617742] [drm:intel_ironlake_crt_detect_hotplug] ironlake hotplug adpa=0xf40000, result 0 [ 377.617745] [drm:intel_crt_detect] CRT not detected via hotplug [ 377.617929] [drm:gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) [ 377.617934] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga [ 377.617938] [drm:intel_crt_get_edid] CRT GMBUS EDID read failed, retry using GPIO bit-banging [ 377.617942] [drm:intel_gmbus_force_bit] enabling bit-banging on i915 gmbus vga. force bit now 1 [ 377.618317] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga [ 377.618321] [drm:intel_gmbus_force_bit] disabling bit-banging on i915 gmbus vga. force bit now 0 [ 377.618323] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found] [ 377.618326] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:38:VGA-1] disconnected [ 377.619902] [drm:drm_mode_setcrtc] [CRTC:20] [ 377.619907] [drm:intel_crtc_set_config] [CRTC:20] [NOFB] [ 377.619913] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0 [ 377.619917] [drm:intel_modeset_stage_output_state] [CONNECTOR:46:DP-1] to [NOCRTC] [ 377.619919] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch [ 377.619922] [drm:intel_modeset_stage_output_state] [CONNECTOR:52:DP-2] to [CRTC:24] [ 377.619925] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch [ 377.619928] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch [ 377.619933] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1 [ 377.638533] [drm:intel_dp_link_down] [ 377.655204] [drm:intel_disable_shared_dpll] disable PCH DPLL A (active 1, on? 1) for crtc 20 [ 377.655213] [drm:intel_disable_shared_dpll] disabling PCH DPLL A [ 377.655634] [drm:intel_fbc_update] disabled per chip default [ 377.655640] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800d66b8c00 [ 377.655670] [drm:intel_connector_check_state] [CONNECTOR:52:DP-2] [ 377.655678] [drm:check_encoder_state] [ENCODER:31:LVDS-31] [ 377.655682] [drm:check_encoder_state] [ENCODER:39:DAC-39] [ 377.655685] [drm:check_encoder_state] [ENCODER:40:TMDS-40] [ 377.655689] [drm:check_encoder_state] [ENCODER:45:TMDS-45] [ 377.655692] [drm:check_encoder_state] [ENCODER:47:TMDS-47] [ 377.655696] [drm:check_encoder_state] [ENCODER:49:TMDS-49] [ 377.655700] [drm:check_encoder_state] [ENCODER:51:TMDS-51] [ 377.655706] [drm:check_encoder_state] [ENCODER:53:TMDS-53] [ 377.655711] [drm:check_crtc_state] [CRTC:20] [ 377.655714] [drm:check_crtc_state] [CRTC:24] [ 377.655738] [drm:check_crtc_state] [CRTC:28] [ 377.655741] [drm:check_shared_dpll_state] PCH DPLL A [ 377.655747] [drm:check_shared_dpll_state] PCH DPLL B [ 377.655984] [drm:drm_atomic_set_fb_for_plane] Set [FB:96] for plane state ffff8800d66b8900 [ 377.661459] [drm:drm_mode_setcrtc] [CRTC:24] [ 377.661464] [drm:intel_crtc_set_config] [CRTC:24] [NOFB] [ 377.661469] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=1, fb_changed=0 [ 377.661472] [drm:intel_modeset_stage_output_state] [CONNECTOR:52:DP-2] to [NOCRTC] [ 377.661474] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch [ 377.661476] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch [ 377.661479] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch [ 377.661482] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2 [ 377.661491] [drm:ilk_audio_codec_disable] Disable audio codec on port C, pipe B [ 377.681969] [drm:intel_dp_link_down] [ 377.698649] [drm:intel_disable_shared_dpll] disable PCH DPLL B (active 1, on? 1) for crtc 24 [ 377.698658] [drm:intel_disable_shared_dpll] disabling PCH DPLL B [ 377.699077] [drm:intel_fbc_update] no output, disabling [ 377.699084] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800d7921240 [ 377.699106] [drm:ivb_modeset_global_resources] disabling fdi C rx [ 377.699109] [drm:intel_display_power_put] disabling always-on [ 377.699124] [drm:check_encoder_state] [ENCODER:31:LVDS-31] [ 377.699128] [drm:check_encoder_state] [ENCODER:39:DAC-39] [ 377.699131] [drm:check_encoder_state] [ENCODER:40:TMDS-40] [ 377.699134] [drm:check_encoder_state] [ENCODER:45:TMDS-45] [ 377.699136] [drm:check_encoder_state] [ENCODER:47:TMDS-47] [ 377.699139] [drm:check_encoder_state] [ENCODER:49:TMDS-49] [ 377.699143] [drm:check_encoder_state] [ENCODER:51:TMDS-51] [ 377.699146] [drm:check_encoder_state] [ENCODER:53:TMDS-53] [ 377.699150] [drm:check_crtc_state] [CRTC:20] [ 377.699152] [drm:check_crtc_state] [CRTC:24] [ 377.699155] [drm:check_crtc_state] [CRTC:28] [ 377.699157] [drm:check_shared_dpll_state] PCH DPLL A [ 377.699162] [drm:check_shared_dpll_state] PCH DPLL B [ 377.699197] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800d79210c0 [ 377.699872] [drm:drm_mode_addfb2] [FB:96] [ 377.703343] [drm:drm_mode_getconnector] [CONNECTOR:30:?] [ 377.703351] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:30:LVDS-1] [ 377.703355] [drm:intel_lvds_detect] [CONNECTOR:30:LVDS-1] [ 377.703370] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:30:LVDS-1] probed modes : [ 377.703374] [drm:drm_mode_debug_printmodeline] Modeline 33:"1600x900" 60 97750 1600 1648 1680 1760 900 903 908 926 0x48 0xa [ 377.703378] [drm:drm_mode_debug_printmodeline] Modeline 34:"1600x900" 50 81490 1600 1648 1680 1760 900 903 908 926 0x40 0xa [ 377.703383] [drm:drm_mode_getconnector] [CONNECTOR:30:?] [ 377.703521] [drm:drm_mode_getconnector] [CONNECTOR:46:?] [ 377.703525] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:46:DP-1] [ 377.703528] [drm:intel_dp_detect] [CONNECTOR:46:DP-1] [ 377.703532] [drm:intel_display_power_get] enabling always-on [ 377.703990] [drm:intel_dp_get_dpcd] DPCD: 11 0a 82 41 00 03 01 81 00 00 00 00 18 00 00 [ 377.705102] [drm:intel_dp_probe_oui] Sink OUI: 0022b9 [ 377.705455] [drm:intel_dp_probe_oui] Branch OUI: 0022b9 [ 377.706416] [drm:drm_dp_i2c_do_msg] native defer [ 377.708288] [drm:drm_dp_i2c_do_msg] native defer [ 377.740811] [drm:intel_display_power_put] disabling always-on [ 377.740843] [drm:drm_edid_to_eld] ELD: no CEA Extension found [ 377.740856] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:46:DP-1] probed modes : [ 377.740860] [drm:drm_mode_debug_printmodeline] Modeline 57:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 377.740863] [drm:drm_mode_debug_printmodeline] Modeline 61:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6 [ 377.740866] [drm:drm_mode_debug_printmodeline] Modeline 66:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5 [ 377.740869] [drm:drm_mode_debug_printmodeline] Modeline 59:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 [ 377.740872] [drm:drm_mode_debug_printmodeline] Modeline 60:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6 [ 377.740875] [drm:drm_mode_debug_printmodeline] Modeline 58:"1280x720" 60 74440 1280 1336 1472 1664 720 721 724 746 0x0 0x6 [ 377.740878] [drm:drm_mode_debug_printmodeline] Modeline 67:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5 [ 377.740881] [drm:drm_mode_debug_printmodeline] Modeline 68:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa [ 377.740884] [drm:drm_mode_debug_printmodeline] Modeline 69:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5 [ 377.740887] [drm:drm_mode_debug_printmodeline] Modeline 62:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 [ 377.740890] [drm:drm_mode_debug_printmodeline] Modeline 63:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa [ 377.740893] [drm:drm_mode_debug_printmodeline] Modeline 64:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa [ 377.740896] [drm:drm_mode_debug_printmodeline] Modeline 65:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6 [ 377.740913] [drm:drm_mode_getconnector] [CONNECTOR:46:?] [ 377.740962] [drm:drm_mode_getconnector] [CONNECTOR:52:?] [ 377.740965] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:52:DP-2] [ 377.740969] [drm:intel_dp_detect] [CONNECTOR:52:DP-2] [ 377.740971] [drm:intel_display_power_get] enabling always-on [ 377.741875] [drm:intel_dp_get_dpcd] DPCD: 11 0a 84 01 01 00 01 00 02 02 06 00 00 00 00 [ 377.789485] [drm:drm_detect_monitor_audio] Monitor has basic audio support [ 377.789487] [drm:intel_display_power_put] disabling always-on [ 377.789548] [drm:drm_edid_to_eld] ELD monitor P24W-6 LED [ 377.789550] [drm:drm_edid_to_eld] ELD size 36, SAD count 1 [ 377.789574] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:52:DP-2] probed modes : [ 377.789576] [drm:drm_mode_debug_printmodeline] Modeline 71:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 [ 377.789578] [drm:drm_mode_debug_printmodeline] Modeline 72:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 [ 377.789580] [drm:drm_mode_debug_printmodeline] Modeline 100:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 [ 377.789583] [drm:drm_mode_debug_printmodeline] Modeline 92:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 [ 377.789585] [drm:drm_mode_debug_printmodeline] Modeline 104:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 [ 377.789587] [drm:drm_mode_debug_printmodeline] Modeline 73:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1089 1095 1125 0x40 0xa [ 377.789589] [drm:drm_mode_debug_printmodeline] Modeline 91:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5 [ 377.789591] [drm:drm_mode_debug_printmodeline] Modeline 93:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15 [ 377.789593] [drm:drm_mode_debug_printmodeline] Modeline 77:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5 [ 377.789595] [drm:drm_mode_debug_printmodeline] Modeline 78:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6 [ 377.789597] [drm:drm_mode_debug_printmodeline] Modeline 81:"1600x900" 60 118963 1600 1696 1864 2128 900 901 904 932 0x0 0x6 [ 377.789600] [drm:drm_mode_debug_printmodeline] Modeline 86:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5 [ 377.789602] [drm:drm_mode_debug_printmodeline] Modeline 80:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 [ 377.789604] [drm:drm_mode_debug_printmodeline] Modeline 79:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6 [ 377.789606] [drm:drm_mode_debug_printmodeline] Modeline 74:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5 [ 377.789608] [drm:drm_mode_debug_printmodeline] Modeline 101:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5 [ 377.789610] [drm:drm_mode_debug_printmodeline] Modeline 75:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5 [ 377.789612] [drm:drm_mode_debug_printmodeline] Modeline 87:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5 [ 377.789614] [drm:drm_mode_debug_printmodeline] Modeline 88:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa [ 377.789616] [drm:drm_mode_debug_printmodeline] Modeline 89:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5 [ 377.789618] [drm:drm_mode_debug_printmodeline] Modeline 82:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 [ 377.789621] [drm:drm_mode_debug_printmodeline] Modeline 76:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa [ 377.789623] [drm:drm_mode_debug_printmodeline] Modeline 106:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa [ 377.789625] [drm:drm_mode_debug_printmodeline] Modeline 95:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa [ 377.789627] [drm:drm_mode_debug_printmodeline] Modeline 83:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa [ 377.789629] [drm:drm_mode_debug_printmodeline] Modeline 84:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa [ 377.789631] [drm:drm_mode_debug_printmodeline] Modeline 97:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa [ 377.789633] [drm:drm_mode_debug_printmodeline] Modeline 85:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6 [ 377.789641] [drm:drm_mode_getconnector] [CONNECTOR:52:?] [ 377.789673] [drm:drm_mode_getconnector] [CONNECTOR:54:?] [ 377.789675] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:DP-3] [ 377.789676] [drm:intel_dp_detect] [CONNECTOR:54:DP-3] [ 377.789678] [drm:intel_display_power_get] enabling always-on [ 377.789681] [drm:intel_display_power_put] disabling always-on [ 377.789682] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:DP-3] disconnected [ 377.789686] [drm:drm_mode_getconnector] [CONNECTOR:41:?] [ 377.789688] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:41:HDMI-A-1] [ 377.789689] [drm:intel_hdmi_detect] [CONNECTOR:41:HDMI-A-1] [ 377.789691] [drm:intel_display_power_get] enabling always-on [ 377.789858] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) [ 377.789864] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb [ 377.789867] [drm:intel_display_power_put] disabling always-on [ 377.789870] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:41:HDMI-A-1] disconnected [ 377.789891] [drm:drm_mode_getconnector] [CONNECTOR:48:?] [ 377.789893] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:48:HDMI-A-2] [ 377.789894] [drm:intel_hdmi_detect] [CONNECTOR:48:HDMI-A-2] [ 377.789895] [drm:intel_display_power_get] enabling always-on [ 377.790062] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) [ 377.790064] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc [ 377.790067] [drm:intel_display_power_put] disabling always-on [ 377.790070] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:48:HDMI-A-2] disconnected [ 377.790075] [drm:drm_mode_getconnector] [CONNECTOR:50:?] [ 377.790078] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:HDMI-A-3] [ 377.790080] [drm:intel_hdmi_detect] [CONNECTOR:50:HDMI-A-3] [ 377.790096] [drm:intel_display_power_get] enabling always-on [ 377.790255] [drm:gmbus_xfer] GMBUS [i915 gmbus dpd] NAK for addr: 0050 r(1) [ 377.790257] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpd [ 377.790260] [drm:intel_display_power_put] disabling always-on [ 377.790262] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:HDMI-A-3] disconnected [ 377.790268] [drm:drm_mode_getconnector] [CONNECTOR:38:?] [ 377.790271] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:38:VGA-1] [ 377.790274] [drm:intel_crt_detect] [CONNECTOR:38:VGA-1] force=1 [ 377.790277] [drm:intel_display_power_get] enabling always-on [ 377.790294] [drm:intel_ironlake_crt_detect_hotplug] ironlake hotplug adpa=0xf40000, result 0 [ 377.790295] [drm:intel_crt_detect] CRT not detected via hotplug [ 377.790454] [drm:gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) [ 377.790457] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga [ 377.790459] [drm:intel_crt_get_edid] CRT GMBUS EDID read failed, retry using GPIO bit-banging [ 377.790462] [drm:intel_gmbus_force_bit] enabling bit-banging on i915 gmbus vga. force bit now 1 [ 377.790835] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga [ 377.790836] [drm:intel_gmbus_force_bit] disabling bit-banging on i915 gmbus vga. force bit now 0 [ 377.790837] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found] [ 377.790838] [drm:intel_display_power_put] disabling always-on [ 377.790840] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:38:VGA-1] disconnected [ 377.802779] [drm:drm_mode_setcrtc] [CRTC:20] [ 377.802786] [drm:drm_mode_setcrtc] [CONNECTOR:46:DP-1] [ 377.802788] [drm:intel_crtc_set_config] [CRTC:20] [FB:102] #connectors=1 (x y) (0 0) [ 377.802792] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set [ 377.802793] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0 [ 377.802795] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch [ 377.802796] [drm:intel_modeset_stage_output_state] [CONNECTOR:46:DP-1] to [CRTC:20] [ 377.802797] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch [ 377.802799] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch [ 377.802801] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 377.802803] [drm:connected_sink_compute_bpp] [CONNECTOR:46:DP-1] checking for sink bpp constrains [ 377.802806] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 148500KHz [ 377.802809] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24 [ 377.802810] [drm:intel_dp_compute_config] DP link bw required 356400 available 432000 [ 377.802812] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2 [ 377.802813] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 [ 377.802815] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 377.802816] [drm:intel_dump_pipe_config] cpu_transcoder: A [ 377.802817] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 [ 377.802819] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 6920601, gmch_n: 8388608, link_m: 288358, link_n: 524288, tu: 64 [ 377.802820] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6920601, gmch_n: 8388608, link_m: 288358, link_n: 524288, tu: 64 [ 377.802822] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 377.802823] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 377.802824] [drm:intel_dump_pipe_config] requested mode: [ 377.802826] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0x5 [ 377.802827] [drm:intel_dump_pipe_config] adjusted mode: [ 377.802829] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0x5 [ 377.802831] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x0 flags: 0x5 [ 377.802832] [drm:intel_dump_pipe_config] port clock: 270000 [ 377.802833] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 [ 377.802834] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 377.802836] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 377.802837] [drm:intel_dump_pipe_config] ips: 0 [ 377.802837] [drm:intel_dump_pipe_config] double wide: 0 [ 377.802861] [drm:intel_get_shared_dpll] CRTC:20 allocated PCH DPLL A [ 377.802862] [drm:intel_get_shared_dpll] using PCH DPLL A for pipe A [ 377.802865] [drm:intel_display_power_get] enabling always-on [ 377.802870] [drm:ivb_modeset_global_resources] disabling fdi C rx [ 377.802874] [drm:drm_atomic_set_fb_for_plane] Set [FB:102] for plane state ffff8800d66b8180 [ 377.826116] [drm:intel_prepare_shared_dpll] setting up PCH DPLL A [ 377.826831] [drm:ivb_manual_fdi_link_train] FDI_RX_IIR before link train 0x0 [ 377.826839] [drm:ivb_manual_fdi_link_train] FDI_RX_IIR 0x100 [ 377.826841] [drm:ivb_manual_fdi_link_train] FDI train 1 done, level 0. [ 377.826848] [drm:ivb_manual_fdi_link_train] FDI_RX_IIR 0x600 [ 377.826850] [drm:ivb_manual_fdi_link_train] FDI train 2 done, level 0. [ 377.826851] [drm:ivb_manual_fdi_link_train] FDI train done. [ 377.826854] [drm:intel_enable_shared_dpll] enable PCH DPLL A (active 0, on? 0) for crtc 20 [ 377.826855] [drm:intel_enable_shared_dpll] enabling PCH DPLL A [ 377.828755] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 [ 377.829390] [drm:intel_dp_start_link_train] clock recovery OK [ 377.830319] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful [ 377.830984] [drm:ironlake_update_primary_plane] Writing base 073C4000 00000000 0 0 22016 [ 377.830987] [drm:intel_fbc_update] disabled per chip default [ 377.830995] [drm:intel_connector_check_state] [CONNECTOR:46:DP-1] [ 377.831002] [drm:check_encoder_state] [ENCODER:31:LVDS-31] [ 377.831004] [drm:check_encoder_state] [ENCODER:39:DAC-39] [ 377.831006] [drm:check_encoder_state] [ENCODER:40:TMDS-40] [ 377.831009] [drm:check_encoder_state] [ENCODER:45:TMDS-45] [ 377.831012] [drm:check_encoder_state] [ENCODER:47:TMDS-47] [ 377.831014] [drm:check_encoder_state] [ENCODER:49:TMDS-49] [ 377.831016] [drm:check_encoder_state] [ENCODER:51:TMDS-51] [ 377.831018] [drm:check_encoder_state] [ENCODER:53:TMDS-53] [ 377.831020] [drm:check_crtc_state] [CRTC:20] [ 377.831038] [drm:check_crtc_state] [CRTC:24] [ 377.831039] [drm:check_crtc_state] [CRTC:28] [ 377.831041] [drm:check_shared_dpll_state] PCH DPLL A [ 377.831044] [drm:check_shared_dpll_state] PCH DPLL B [ 377.831073] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff88029061acc0 [ 377.847319] [drm:drm_mode_setcrtc] [CRTC:24] [ 377.847323] [drm:drm_mode_setcrtc] [CONNECTOR:52:DP-2] [ 377.847325] [drm:intel_crtc_set_config] [CRTC:24] [FB:102] #connectors=1 (x y) (3520 0) [ 377.847327] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set [ 377.847329] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=1, fb_changed=0 [ 377.847330] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch [ 377.847331] [drm:intel_modeset_stage_output_state] [CONNECTOR:46:DP-1] to [CRTC:20] [ 377.847332] [drm:intel_modeset_stage_output_state] [CONNECTOR:52:DP-2] to [CRTC:24] [ 377.847333] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch [ 377.847334] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch [ 377.847336] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0 [ 377.847338] [drm:connected_sink_compute_bpp] [CONNECTOR:52:DP-2] checking for sink bpp constrains [ 377.847340] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 154000KHz [ 377.847344] [drm:intel_dp_compute_config] DP link bw 06 lane count 4 clock 162000 bpp 24 [ 377.847345] [drm:intel_dp_compute_config] DP link bw required 369600 available 518400 [ 377.847346] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe B, lanes 2 [ 377.847347] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 [ 377.847349] [drm:intel_dump_pipe_config] [CRTC:24][modeset] config for pipe B [ 377.847350] [drm:intel_dump_pipe_config] cpu_transcoder: B [ 377.847351] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 [ 377.847352] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7176920, gmch_n: 8388608, link_m: 299038, link_n: 524288, tu: 64 [ 377.847353] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 5980766, gmch_n: 8388608, link_m: 249198, link_n: 262144, tu: 64 [ 377.847355] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 377.847356] [drm:intel_dump_pipe_config] audio: 1, infoframes: 0 [ 377.847357] [drm:intel_dump_pipe_config] requested mode: [ 377.847359] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x0 0x9 [ 377.847359] [drm:intel_dump_pipe_config] adjusted mode: [ 377.847361] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x0 0x9 [ 377.847363] [drm:intel_dump_crtc_timings] crtc timings: 154000 1920 1968 2000 2080 1200 1203 1209 1235, type: 0x0 flags: 0x9 [ 377.847364] [drm:intel_dump_pipe_config] port clock: 162000 [ 377.847365] [drm:intel_dump_pipe_config] pipe src size: 1920x1200 [ 377.847366] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 377.847367] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 377.847368] [drm:intel_dump_pipe_config] ips: 0 [ 377.847369] [drm:intel_dump_pipe_config] double wide: 0 [ 377.847380] [drm:intel_get_shared_dpll] CRTC:24 allocated PCH DPLL B [ 377.847381] [drm:intel_get_shared_dpll] using PCH DPLL B for pipe B [ 377.847386] [drm:ivb_modeset_global_resources] disabling fdi C rx [ 377.847390] [drm:drm_atomic_set_fb_for_plane] Set [FB:102] for plane state ffff88029061ab40 [ 377.847394] [drm:intel_prepare_shared_dpll] setting up PCH DPLL B [ 377.847946] [drm:cpt_enable_fdi_bc_bifurcation] enabling fdi C rx [ 377.848103] [drm:ivb_manual_fdi_link_train] FDI_RX_IIR before link train 0x0 [ 377.848111] [drm:ivb_manual_fdi_link_train] FDI_RX_IIR 0x100 [ 377.848113] [drm:ivb_manual_fdi_link_train] FDI train 1 done, level 0. [ 377.848120] [drm:ivb_manual_fdi_link_train] FDI_RX_IIR 0x600 [ 377.848122] [drm:ivb_manual_fdi_link_train] FDI train 2 done, level 0. [ 377.848123] [drm:ivb_manual_fdi_link_train] FDI train done. [ 377.848127] [drm:intel_enable_shared_dpll] enable PCH DPLL B (active 0, on? 0) for crtc 24 [ 377.848128] [drm:intel_enable_shared_dpll] enabling PCH DPLL B [ 377.850694] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 [ 377.853076] [drm:intel_dp_set_signal_levels] Using signal levels 02000000 [ 377.855471] [drm:intel_dp_start_link_train] clock recovery OK [ 377.857184] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful [ 377.857652] [drm:intel_enable_dp] Enabling DP audio on pipe B [ 377.857655] [drm:intel_audio_codec_enable] ELD on [CONNECTOR:52:DP-2], [ENCODER:51:TMDS-51] [ 377.857657] [drm:ilk_audio_codec_enable] Enable audio codec on port C, pipe B, 36 bytes ELD [ 377.858174] [drm:ironlake_update_primary_plane] Writing base 073C4000 FFFFFFFFFFFE8700 64 0 22016 [ 377.858179] [drm:intel_fbc_update] more than one pipe active, disabling compression [ 377.858187] [drm:intel_connector_check_state] [CONNECTOR:46:DP-1] [ 377.858196] [drm:intel_connector_check_state] [CONNECTOR:52:DP-2] [ 377.858201] [drm:check_encoder_state] [ENCODER:31:LVDS-31] [ 377.858205] [drm:check_encoder_state] [ENCODER:39:DAC-39] [ 377.858207] [drm:check_encoder_state] [ENCODER:40:TMDS-40] [ 377.858209] [drm:check_encoder_state] [ENCODER:45:TMDS-45] [ 377.858216] [drm:check_encoder_state] [ENCODER:47:TMDS-47] [ 377.858219] [drm:check_encoder_state] [ENCODER:49:TMDS-49] [ 377.858222] [drm:check_encoder_state] [ENCODER:51:TMDS-51] [ 377.858227] [drm:check_encoder_state] [ENCODER:53:TMDS-53] [ 377.858229] [drm:check_crtc_state] [CRTC:20] [ 377.858245] [drm:check_crtc_state] [CRTC:24] [ 377.858265] [drm:check_crtc_state] [CRTC:28] [ 377.858267] [drm:check_shared_dpll_state] PCH DPLL A [ 377.858271] [drm:check_shared_dpll_state] PCH DPLL B [ 377.858298] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff88029061a900 [ 377.860382] [drm:drm_mode_getconnector] [CONNECTOR:30:?] [ 377.860386] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:30:LVDS-1] [ 377.860388] [drm:intel_lvds_detect] [CONNECTOR:30:LVDS-1] [ 377.860396] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:30:LVDS-1] probed modes : [ 377.860399] [drm:drm_mode_debug_printmodeline] Modeline 33:"1600x900" 60 97750 1600 1648 1680 1760 900 903 908 926 0x48 0xa [ 377.860400] [drm:drm_mode_debug_printmodeline] Modeline 34:"1600x900" 50 81490 1600 1648 1680 1760 900 903 908 926 0x40 0xa [ 377.860403] [drm:drm_mode_getconnector] [CONNECTOR:30:?] [ 377.860490] [drm:drm_mode_getconnector] [CONNECTOR:46:?] [ 377.860492] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:46:DP-1] [ 377.860494] [drm:intel_dp_detect] [CONNECTOR:46:DP-1] [ 377.860937] [drm:intel_dp_get_dpcd] DPCD: 11 0a 82 41 00 03 01 81 00 00 00 00 18 00 00 [ 377.862010] [drm:intel_dp_probe_oui] Sink OUI: 0022b9 [ 377.862342] [drm:intel_dp_probe_oui] Branch OUI: 0022b9 [ 377.863282] [drm:drm_dp_i2c_do_msg] native defer [ 377.865130] [drm:drm_dp_i2c_do_msg] native defer [ 377.897115] [drm:drm_edid_to_eld] ELD: no CEA Extension found [ 377.897122] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:46:DP-1] probed modes : [ 377.897136] [drm:drm_mode_debug_printmodeline] Modeline 57:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5 [ 377.897138] [drm:drm_mode_debug_printmodeline] Modeline 61:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6 [ 377.897140] [drm:drm_mode_debug_printmodeline] Modeline 66:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5 [ 377.897142] [drm:drm_mode_debug_printmodeline] Modeline 59:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 [ 377.897143] [drm:drm_mode_debug_printmodeline] Modeline 60:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6 [ 377.897145] [drm:drm_mode_debug_printmodeline] Modeline 58:"1280x720" 60 74440 1280 1336 1472 1664 720 721 724 746 0x0 0x6 [ 377.897147] [drm:drm_mode_debug_printmodeline] Modeline 67:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5 [ 377.897148] [drm:drm_mode_debug_printmodeline] Modeline 68:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa [ 377.897150] [drm:drm_mode_debug_printmodeline] Modeline 69:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5 [ 377.897152] [drm:drm_mode_debug_printmodeline] Modeline 62:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 [ 377.897154] [drm:drm_mode_debug_printmodeline] Modeline 63:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa [ 377.897155] [drm:drm_mode_debug_printmodeline] Modeline 64:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa [ 377.897157] [drm:drm_mode_debug_printmodeline] Modeline 65:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6 [ 377.897163] [drm:drm_mode_getconnector] [CONNECTOR:46:?] [ 377.897189] [drm:drm_mode_getconnector] [CONNECTOR:52:?] [ 377.897190] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:52:DP-2] [ 377.897193] [drm:intel_dp_detect] [CONNECTOR:52:DP-2] [ 377.898099] [drm:intel_dp_get_dpcd] DPCD: 11 0a 84 01 01 00 01 00 02 02 06 00 00 00 00 [ 377.945147] [drm:drm_detect_monitor_audio] Monitor has basic audio support [ 377.945198] [drm:drm_edid_to_eld] ELD monitor P24W-6 LED [ 377.945200] [drm:drm_edid_to_eld] ELD size 36, SAD count 1 [ 377.945219] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:52:DP-2] probed modes : [ 377.945221] [drm:drm_mode_debug_printmodeline] Modeline 71:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 [ 377.945223] [drm:drm_mode_debug_printmodeline] Modeline 72:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 [ 377.945224] [drm:drm_mode_debug_printmodeline] Modeline 100:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 [ 377.945226] [drm:drm_mode_debug_printmodeline] Modeline 92:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 [ 377.945228] [drm:drm_mode_debug_printmodeline] Modeline 104:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 [ 377.945230] [drm:drm_mode_debug_printmodeline] Modeline 73:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1089 1095 1125 0x40 0xa [ 377.945231] [drm:drm_mode_debug_printmodeline] Modeline 91:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5 [ 377.945233] [drm:drm_mode_debug_printmodeline] Modeline 93:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15 [ 377.945235] [drm:drm_mode_debug_printmodeline] Modeline 77:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5 [ 377.945236] [drm:drm_mode_debug_printmodeline] Modeline 78:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6 [ 377.945238] [drm:drm_mode_debug_printmodeline] Modeline 81:"1600x900" 60 118963 1600 1696 1864 2128 900 901 904 932 0x0 0x6 [ 377.945240] [drm:drm_mode_debug_printmodeline] Modeline 86:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5 [ 377.945241] [drm:drm_mode_debug_printmodeline] Modeline 80:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 [ 377.945243] [drm:drm_mode_debug_printmodeline] Modeline 79:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6 [ 377.945245] [drm:drm_mode_debug_printmodeline] Modeline 74:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5 [ 377.945246] [drm:drm_mode_debug_printmodeline] Modeline 101:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5 [ 377.945248] [drm:drm_mode_debug_printmodeline] Modeline 75:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5 [ 377.945250] [drm:drm_mode_debug_printmodeline] Modeline 87:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5 [ 377.945251] [drm:drm_mode_debug_printmodeline] Modeline 88:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa [ 377.945253] [drm:drm_mode_debug_printmodeline] Modeline 89:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5 [ 377.945255] [drm:drm_mode_debug_printmodeline] Modeline 82:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 [ 377.945256] [drm:drm_mode_debug_printmodeline] Modeline 76:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa [ 377.945258] [drm:drm_mode_debug_printmodeline] Modeline 106:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa [ 377.945260] [drm:drm_mode_debug_printmodeline] Modeline 95:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa [ 377.945261] [drm:drm_mode_debug_printmodeline] Modeline 83:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa [ 377.945263] [drm:drm_mode_debug_printmodeline] Modeline 84:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa [ 377.945265] [drm:drm_mode_debug_printmodeline] Modeline 97:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa [ 377.945266] [drm:drm_mode_debug_printmodeline] Modeline 85:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6 [ 377.945272] [drm:drm_mode_getconnector] [CONNECTOR:52:?] [ 377.945296] [drm:drm_mode_getconnector] [CONNECTOR:54:?] [ 377.945297] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:DP-3] [ 377.945298] [drm:intel_dp_detect] [CONNECTOR:54:DP-3] [ 377.945301] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:DP-3] disconnected [ 377.945304] [drm:drm_mode_getconnector] [CONNECTOR:41:?] [ 377.945306] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:41:HDMI-A-1] [ 377.945307] [drm:intel_hdmi_detect] [CONNECTOR:41:HDMI-A-1] [ 377.945474] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) [ 377.945477] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb [ 377.945498] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:41:HDMI-A-1] disconnected [ 377.945510] [drm:drm_mode_getconnector] [CONNECTOR:48:?] [ 377.945513] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:48:HDMI-A-2] [ 377.945515] [drm:intel_hdmi_detect] [CONNECTOR:48:HDMI-A-2] [ 377.945696] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) [ 377.945699] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc [ 377.945701] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:48:HDMI-A-2] disconnected [ 377.945705] [drm:drm_mode_getconnector] [CONNECTOR:50:?] [ 377.945708] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:HDMI-A-3] [ 377.945709] [drm:intel_hdmi_detect] [CONNECTOR:50:HDMI-A-3] [ 377.945888] [drm:gmbus_xfer] GMBUS [i915 gmbus dpd] NAK for addr: 0050 r(1) [ 377.945890] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpd [ 377.945892] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:HDMI-A-3] disconnected [ 377.945897] [drm:drm_mode_getconnector] [CONNECTOR:38:?] [ 377.945899] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:38:VGA-1] [ 377.945902] [drm:intel_crt_detect] [CONNECTOR:38:VGA-1] force=1 [ 377.945908] [drm:intel_ironlake_crt_detect_hotplug] ironlake hotplug adpa=0xf40000, result 0 [ 377.945910] [drm:intel_crt_detect] CRT not detected via hotplug [ 377.946089] [drm:gmbus_xfer] GMBUS [i915 gmbus vga] NAK for addr: 0050 r(1) [ 377.946091] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga [ 377.946093] [drm:intel_crt_get_edid] CRT GMBUS EDID read failed, retry using GPIO bit-banging [ 377.946096] [drm:intel_gmbus_force_bit] enabling bit-banging on i915 gmbus vga. force bit now 1 [ 377.946462] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus vga [ 377.946464] [drm:intel_gmbus_force_bit] disabling bit-banging on i915 gmbus vga. force bit now 0 [ 377.946466] [drm:intel_crt_detect_ddc] CRT not detected via DDC:0x50 [no valid EDID found] [ 377.946468] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:38:VGA-1] disconnected [ 377.948017] [drm:drm_mode_setcrtc] [CRTC:28] [ 377.948021] [drm:drm_mode_setcrtc] [CONNECTOR:30:LVDS-1] [ 377.948022] [drm:intel_crtc_set_config] [CRTC:28] [FB:102] #connectors=1 (x y) (1600 0) [ 377.948025] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set [ 377.948026] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set [ 377.948029] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 [ 377.948030] [drm:drm_mode_debug_printmodeline] Modeline 105:"" 0 97750 1600 1648 1680 1760 900 903 908 926 0x0 0xa [ 377.948032] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=1, fb_changed=1 [ 377.948033] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch [ 377.948034] [drm:intel_modeset_stage_output_state] [CONNECTOR:30:LVDS-1] to [CRTC:28] [ 377.948035] [drm:intel_modeset_stage_output_state] [CONNECTOR:46:DP-1] to [CRTC:20] [ 377.948036] [drm:intel_modeset_stage_output_state] [CONNECTOR:52:DP-2] to [CRTC:24] [ 377.948037] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch [ 377.948039] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch [ 377.948041] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0 [ 377.948043] [drm:connected_sink_compute_bpp] [CONNECTOR:30:LVDS-1] checking for sink bpp constrains [ 377.948045] [drm:intel_lvds_compute_config] forcing display bpp (was 24) to LVDS (18) [ 377.948047] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe C, lanes 1 [ 377.948048] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 [ 377.948049] [drm:intel_dump_pipe_config] [CRTC:28][modeset] config for pipe C [ 377.948051] [drm:intel_dump_pipe_config] cpu_transcoder: C [ 377.948051] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 [ 377.948053] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 1, gmch_m: 3416610, gmch_n: 4194304, link_m: 189811, link_n: 524288, tu: 64 [ 377.948054] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 377.948055] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 377.948056] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 377.948057] [drm:intel_dump_pipe_config] requested mode: [ 377.948059] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 97750 1600 1648 1680 1760 900 903 908 926 0x0 0xa [ 377.948060] [drm:intel_dump_pipe_config] adjusted mode: [ 377.948062] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x900" 60 97750 1600 1648 1680 1760 900 903 908 926 0x48 0xa [ 377.948063] [drm:intel_dump_crtc_timings] crtc timings: 97750 1600 1648 1680 1760 900 903 908 926, type: 0x48 flags: 0xa [ 377.948064] [drm:intel_dump_pipe_config] port clock: 97750 [ 377.948065] [drm:intel_dump_pipe_config] pipe src size: 1600x900 [ 377.948067] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 377.948068] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 377.948069] [drm:intel_dump_pipe_config] ips: 0 [ 377.948069] [drm:intel_dump_pipe_config] double wide: 0 [ 377.948072] [drm:ironlake_get_refclk] using SSC reference clock of 120000 kHz [ 377.948081] [drm:ironlake_crtc_compute_clock] failed to find PLL for pipe C [ 377.948083] [drm:intel_crtc_set_config] failed to set mode on [CRTC:28], err = -22 [ 377.948084] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 [ 377.948093] [drm:intel_connector_check_state] [CONNECTOR:46:DP-1] [ 377.948100] [drm:intel_connector_check_state] [CONNECTOR:52:DP-2] [ 377.948105] [drm:check_encoder_state] [ENCODER:31:LVDS-31] [ 377.948108] [drm:check_encoder_state] [ENCODER:39:DAC-39] [ 377.948110] [drm:check_encoder_state] [ENCODER:40:TMDS-40] [ 377.948112] [drm:check_encoder_state] [ENCODER:45:TMDS-45] [ 377.948115] [drm:check_encoder_state] [ENCODER:47:TMDS-47] [ 377.948117] [drm:check_encoder_state] [ENCODER:49:TMDS-49] [ 377.948119] [drm:check_encoder_state] [ENCODER:51:TMDS-51] [ 377.948123] [drm:check_encoder_state] [ENCODER:53:TMDS-53] [ 377.948124] [drm:check_crtc_state] [CRTC:20] [ 377.948141] [drm:check_crtc_state] [CRTC:24] [ 377.948159] [drm:check_crtc_state] [CRTC:28] [ 377.948160] [drm:check_shared_dpll_state] PCH DPLL A [ 377.948164] [drm:check_shared_dpll_state] PCH DPLL B [ 377.948203] [drm:drm_mode_setcrtc] [CRTC:28] [ 377.948205] [drm:drm_mode_setcrtc] [CONNECTOR:30:LVDS-1] [ 377.948206] [drm:intel_crtc_set_config] [CRTC:28] [FB:103] #connectors=1 (x y) (0 0) [ 377.948208] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set [ 377.948209] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set [ 377.948211] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 [ 377.948212] [drm:drm_mode_debug_printmodeline] Modeline 105:"" 0 97750 1600 1648 1680 1760 900 903 908 926 0x0 0xa [ 377.948213] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=1, fb_changed=0 [ 377.948214] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch [ 377.948216] [drm:intel_modeset_stage_output_state] [CONNECTOR:30:LVDS-1] to [CRTC:28] [ 377.948217] [drm:intel_modeset_stage_output_state] [CONNECTOR:46:DP-1] to [CRTC:20] [ 377.948218] [drm:intel_modeset_stage_output_state] [CONNECTOR:52:DP-2] to [CRTC:24] [ 377.948219] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch [ 377.948220] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch [ 377.948222] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0 [ 377.948223] [drm:connected_sink_compute_bpp] [CONNECTOR:30:LVDS-1] checking for sink bpp constrains [ 377.948225] [drm:intel_lvds_compute_config] forcing display bpp (was 24) to LVDS (18) [ 377.948227] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe C, lanes 1 [ 377.948228] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 [ 377.948229] [drm:intel_dump_pipe_config] [CRTC:28][modeset] config for pipe C [ 377.948230] [drm:intel_dump_pipe_config] cpu_transcoder: C [ 377.948231] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 [ 377.948232] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 1, gmch_m: 3416610, gmch_n: 4194304, link_m: 189811, link_n: 524288, tu: 64 [ 377.948234] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 [ 377.948235] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 377.948236] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 377.948237] [drm:intel_dump_pipe_config] requested mode: [ 377.948238] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 97750 1600 1648 1680 1760 900 903 908 926 0x0 0xa [ 377.948239] [drm:intel_dump_pipe_config] adjusted mode: [ 377.948241] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x900" 60 97750 1600 1648 1680 1760 900 903 908 926 0x48 0xa [ 377.948242] [drm:intel_dump_crtc_timings] crtc timings: 97750 1600 1648 1680 1760 900 903 908 926, type: 0x48 flags: 0xa [ 377.948243] [drm:intel_dump_pipe_config] port clock: 97750 [ 377.948244] [drm:intel_dump_pipe_config] pipe src size: 1600x900 [ 377.948245] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 377.948246] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 377.948247] [drm:intel_dump_pipe_config] ips: 0 [ 377.948248] [drm:intel_dump_pipe_config] double wide: 0 [ 377.948250] [drm:ironlake_get_refclk] using SSC reference clock of 120000 kHz [ 377.948258] [drm:ironlake_crtc_compute_clock] failed to find PLL for pipe C [ 377.948260] [drm:intel_crtc_set_config] failed to set mode on [CRTC:28], err = -22 [ 377.948261] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 [ 377.948269] [drm:intel_connector_check_state] [CONNECTOR:46:DP-1] [ 377.948277] [drm:intel_connector_check_state] [CONNECTOR:52:DP-2] [ 377.948282] [drm:check_encoder_state] [ENCODER:31:LVDS-31] [ 377.948285] [drm:check_encoder_state] [ENCODER:39:DAC-39] [ 377.948288] [drm:check_encoder_state] [ENCODER:40:TMDS-40] [ 377.948291] [drm:check_encoder_state] [ENCODER:45:TMDS-45] [ 377.948295] [drm:check_encoder_state] [ENCODER:47:TMDS-47] [ 377.948297] [drm:check_encoder_state] [ENCODER:49:TMDS-49] [ 377.948299] [drm:check_encoder_state] [ENCODER:51:TMDS-51] [ 377.948303] [drm:check_encoder_state] [ENCODER:53:TMDS-53] [ 377.948306] [drm:check_crtc_state] [CRTC:20] [ 377.948324] [drm:check_crtc_state] [CRTC:24] [ 377.948341] [drm:check_crtc_state] [CRTC:28] [ 377.948343] [drm:check_shared_dpll_state] PCH DPLL A [ 377.948347] [drm:check_shared_dpll_state] PCH DPLL B [ 377.948371] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[8] ENCODERS[8] [ 377.948426] [drm:drm_mode_setcrtc] [CRTC:20] [ 377.948427] [drm:intel_crtc_set_config] [CRTC:20] [NOFB] [ 377.948429] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0 [ 377.948431] [drm:intel_modeset_stage_output_state] [CONNECTOR:46:DP-1] to [NOCRTC] [ 377.948432] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch [ 377.948433] [drm:intel_modeset_stage_output_state] [CONNECTOR:52:DP-2] to [CRTC:24] [ 377.948434] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch [ 377.948435] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch [ 377.948437] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1 [ 377.968854] [drm:intel_dp_link_down] [ 377.985542] [drm:intel_disable_shared_dpll] disable PCH DPLL A (active 1, on? 1) for crtc 20 [ 377.985559] [drm:intel_disable_shared_dpll] disabling PCH DPLL A [ 377.985973] [drm:intel_fbc_update] disabled per chip default [ 377.985975] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88028c1050c0 [ 377.985993] [drm:intel_connector_check_state] [CONNECTOR:52:DP-2] [ 377.985998] [drm:check_encoder_state] [ENCODER:31:LVDS-31] [ 377.986001] [drm:check_encoder_state] [ENCODER:39:DAC-39] [ 377.986003] [drm:check_encoder_state] [ENCODER:40:TMDS-40] [ 377.986005] [drm:check_encoder_state] [ENCODER:45:TMDS-45] [ 377.986007] [drm:check_encoder_state] [ENCODER:47:TMDS-47] [ 377.986009] [drm:check_encoder_state] [ENCODER:49:TMDS-49] [ 377.986011] [drm:check_encoder_state] [ENCODER:51:TMDS-51] [ 377.986016] [drm:check_encoder_state] [ENCODER:53:TMDS-53] [ 377.986018] [drm:check_crtc_state] [CRTC:20] [ 377.986019] [drm:check_crtc_state] [CRTC:24] [ 377.986037] [drm:check_crtc_state] [CRTC:28] [ 377.986038] [drm:check_shared_dpll_state] PCH DPLL A [ 377.986042] [drm:check_shared_dpll_state] PCH DPLL B [ 377.986057] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88028c105900 [ 377.986112] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff88028c1056c0 [ 377.990890] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff88029061acc0 [ 377.990904] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff88029061a240 [ 377.990915] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff88029061acc0 [ 377.990923] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff88029061a240 [ 377.991026] [drm:drm_mode_setcrtc] [CRTC:24] [ 377.991028] [drm:intel_crtc_set_config] [CRTC:24] [NOFB] [ 377.991030] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=1, fb_changed=0 [ 377.991032] [drm:intel_modeset_stage_output_state] [CONNECTOR:52:DP-2] to [NOCRTC] [ 377.991033] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch [ 377.991034] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch [ 377.991035] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch [ 377.991037] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2 [ 377.991051] [drm:ilk_audio_codec_disable] Disable audio codec on port C, pipe B [ 378.008895] [drm:intel_dp_link_down] [ 378.025582] [drm:intel_disable_shared_dpll] disable PCH DPLL B (active 1, on? 1) for crtc 24 [ 378.025588] [drm:intel_disable_shared_dpll] disabling PCH DPLL B [ 378.026000] [drm:intel_fbc_update] no output, disabling [ 378.026003] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88028c07a840 [ 378.026010] [drm:ivb_modeset_global_resources] disabling fdi C rx [ 378.026013] [drm:intel_display_power_put] disabling always-on [ 378.026022] [drm:check_encoder_state] [ENCODER:31:LVDS-31] [ 378.026025] [drm:check_encoder_state] [ENCODER:39:DAC-39] [ 378.026027] [drm:check_encoder_state] [ENCODER:40:TMDS-40] [ 378.026030] [drm:check_encoder_state] [ENCODER:45:TMDS-45] [ 378.026032] [drm:check_encoder_state] [ENCODER:47:TMDS-47] [ 378.026034] [drm:check_encoder_state] [ENCODER:49:TMDS-49] [ 378.026037] [drm:check_encoder_state] [ENCODER:51:TMDS-51] [ 378.026039] [drm:check_encoder_state] [ENCODER:53:TMDS-53] [ 378.026042] [drm:check_crtc_state] [CRTC:20] [ 378.026043] [drm:check_crtc_state] [CRTC:24] [ 378.026044] [drm:check_crtc_state] [CRTC:28] [ 378.026045] [drm:check_shared_dpll_state] PCH DPLL A [ 378.026048] [drm:check_shared_dpll_state] PCH DPLL B [ 378.026060] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88028c07ab40 [ 378.026551] [drm:drm_mode_setcrtc] [CRTC:20] [ 378.026556] [drm:drm_mode_setcrtc] [CONNECTOR:46:DP-1] [ 378.026557] [drm:intel_crtc_set_config] [CRTC:20] [FB:102] #connectors=1 (x y) (0 0) [ 378.026559] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set [ 378.026561] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0 [ 378.026562] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch [ 378.026563] [drm:intel_modeset_stage_output_state] [CONNECTOR:46:DP-1] to [CRTC:20] [ 378.026564] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch [ 378.026565] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch [ 378.026567] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 [ 378.026569] [drm:connected_sink_compute_bpp] [CONNECTOR:46:DP-1] checking for sink bpp constrains [ 378.026571] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 148500KHz [ 378.026573] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24 [ 378.026574] [drm:intel_dp_compute_config] DP link bw required 356400 available 432000 [ 378.026576] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2 [ 378.026577] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 [ 378.026579] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A [ 378.026580] [drm:intel_dump_pipe_config] cpu_transcoder: A [ 378.026581] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 [ 378.026582] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 6920601, gmch_n: 8388608, link_m: 288358, link_n: 524288, tu: 64 [ 378.026583] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6920601, gmch_n: 8388608, link_m: 288358, link_n: 524288, tu: 64 [ 378.026585] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 378.026586] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 [ 378.026586] [drm:intel_dump_pipe_config] requested mode: [ 378.026589] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0x5 [ 378.026589] [drm:intel_dump_pipe_config] adjusted mode: [ 378.026591] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0x5 [ 378.026593] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x0 flags: 0x5 [ 378.026594] [drm:intel_dump_pipe_config] port clock: 270000 [ 378.026595] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 [ 378.026596] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 378.026597] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 378.026598] [drm:intel_dump_pipe_config] ips: 0 [ 378.026599] [drm:intel_dump_pipe_config] double wide: 0 [ 378.026619] [drm:intel_get_shared_dpll] CRTC:20 allocated PCH DPLL A [ 378.026620] [drm:intel_get_shared_dpll] using PCH DPLL A for pipe A [ 378.026622] [drm:intel_display_power_get] enabling always-on [ 378.026626] [drm:ivb_modeset_global_resources] disabling fdi C rx [ 378.026629] [drm:drm_atomic_set_fb_for_plane] Set [FB:102] for plane state ffff88028c07a9c0 [ 378.030674] [drm:intel_prepare_shared_dpll] setting up PCH DPLL A [ 378.031379] [drm:ivb_manual_fdi_link_train] FDI_RX_IIR before link train 0x0 [ 378.031387] [drm:ivb_manual_fdi_link_train] FDI_RX_IIR 0x100 [ 378.031390] [drm:ivb_manual_fdi_link_train] FDI train 1 done, level 0. [ 378.031410] [drm:ivb_manual_fdi_link_train] FDI_RX_IIR 0x600 [ 378.031412] [drm:ivb_manual_fdi_link_train] FDI train 2 done, level 0. [ 378.031413] [drm:ivb_manual_fdi_link_train] FDI train done. [ 378.031416] [drm:intel_enable_shared_dpll] enable PCH DPLL A (active 0, on? 0) for crtc 20 [ 378.031417] [drm:intel_enable_shared_dpll] enabling PCH DPLL A [ 378.033285] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 [ 378.033912] [drm:intel_dp_start_link_train] clock recovery OK [ 378.034839] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful [ 378.035502] [drm:ironlake_update_primary_plane] Writing base 073C4000 00000000 0 0 22016 [ 378.035504] [drm:intel_fbc_update] disabled per chip default [ 378.035511] [drm:intel_connector_check_state] [CONNECTOR:46:DP-1] [ 378.035517] [drm:check_encoder_state] [ENCODER:31:LVDS-31] [ 378.035520] [drm:check_encoder_state] [ENCODER:39:DAC-39] [ 378.035522] [drm:check_encoder_state] [ENCODER:40:TMDS-40] [ 378.035524] [drm:check_encoder_state] [ENCODER:45:TMDS-45] [ 378.035528] [drm:check_encoder_state] [ENCODER:47:TMDS-47] [ 378.035530] [drm:check_encoder_state] [ENCODER:49:TMDS-49] [ 378.035532] [drm:check_encoder_state] [ENCODER:51:TMDS-51] [ 378.035534] [drm:check_encoder_state] [ENCODER:53:TMDS-53] [ 378.035536] [drm:check_crtc_state] [CRTC:20] [ 378.035553] [drm:check_crtc_state] [CRTC:24] [ 378.035554] [drm:check_crtc_state] [CRTC:28] [ 378.035555] [drm:check_shared_dpll_state] PCH DPLL A [ 378.035558] [drm:check_shared_dpll_state] PCH DPLL B [ 378.035614] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff88029061a900 [ 378.051617] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff88029061a600 [ 378.051645] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff88029061a900 [ 378.051655] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff88029061a600 [ 378.051663] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff88029061a900 [ 378.051790] [drm:drm_mode_setcrtc] [CRTC:24] [ 378.051793] [drm:drm_mode_setcrtc] [CONNECTOR:52:DP-2] [ 378.051795] [drm:intel_crtc_set_config] [CRTC:24] [FB:102] #connectors=1 (x y) (3520 0) [ 378.051796] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set [ 378.051798] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=1, fb_changed=0 [ 378.051799] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch [ 378.051800] [drm:intel_modeset_stage_output_state] [CONNECTOR:46:DP-1] to [CRTC:20] [ 378.051801] [drm:intel_modeset_stage_output_state] [CONNECTOR:52:DP-2] to [CRTC:24] [ 378.051802] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch [ 378.051803] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch [ 378.051805] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0 [ 378.051806] [drm:connected_sink_compute_bpp] [CONNECTOR:52:DP-2] checking for sink bpp constrains [ 378.051808] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 0a pixel clock 154000KHz [ 378.051811] [drm:intel_dp_compute_config] DP link bw 06 lane count 4 clock 162000 bpp 24 [ 378.051812] [drm:intel_dp_compute_config] DP link bw required 369600 available 518400 [ 378.051814] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe B, lanes 2 [ 378.051815] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 [ 378.051816] [drm:intel_dump_pipe_config] [CRTC:24][modeset] config for pipe B [ 378.051817] [drm:intel_dump_pipe_config] cpu_transcoder: B [ 378.051818] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 [ 378.051819] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7176920, gmch_n: 8388608, link_m: 299038, link_n: 524288, tu: 64 [ 378.051820] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 5980766, gmch_n: 8388608, link_m: 249198, link_n: 262144, tu: 64 [ 378.051822] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 [ 378.051822] [drm:intel_dump_pipe_config] audio: 1, infoframes: 0 [ 378.051823] [drm:intel_dump_pipe_config] requested mode: [ 378.051825] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x0 0x9 [ 378.051826] [drm:intel_dump_pipe_config] adjusted mode: [ 378.051827] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x0 0x9 [ 378.051829] [drm:intel_dump_crtc_timings] crtc timings: 154000 1920 1968 2000 2080 1200 1203 1209 1235, type: 0x0 flags: 0x9 [ 378.051830] [drm:intel_dump_pipe_config] port clock: 162000 [ 378.051831] [drm:intel_dump_pipe_config] pipe src size: 1920x1200 [ 378.051832] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 [ 378.051833] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled [ 378.051834] [drm:intel_dump_pipe_config] ips: 0 [ 378.051835] [drm:intel_dump_pipe_config] double wide: 0 [ 378.051845] [drm:intel_get_shared_dpll] CRTC:24 allocated PCH DPLL B [ 378.051845] [drm:intel_get_shared_dpll] using PCH DPLL B for pipe B [ 378.051850] [drm:ivb_modeset_global_resources] disabling fdi C rx [ 378.051853] [drm:drm_atomic_set_fb_for_plane] Set [FB:102] for plane state ffff88029061a600 [ 378.051856] [drm:intel_prepare_shared_dpll] setting up PCH DPLL B [ 378.052407] [drm:cpt_enable_fdi_bc_bifurcation] enabling fdi C rx [ 378.052565] [drm:ivb_manual_fdi_link_train] FDI_RX_IIR before link train 0x0 [ 378.052573] [drm:ivb_manual_fdi_link_train] FDI_RX_IIR 0x100 [ 378.052575] [drm:ivb_manual_fdi_link_train] FDI train 1 done, level 0. [ 378.052582] [drm:ivb_manual_fdi_link_train] FDI_RX_IIR 0x600 [ 378.052583] [drm:ivb_manual_fdi_link_train] FDI train 2 done, level 0. [ 378.052584] [drm:ivb_manual_fdi_link_train] FDI train done. [ 378.052587] [drm:intel_enable_shared_dpll] enable PCH DPLL B (active 0, on? 0) for crtc 24 [ 378.052588] [drm:intel_enable_shared_dpll] enabling PCH DPLL B [ 378.055225] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 [ 378.057575] [drm:intel_dp_set_signal_levels] Using signal levels 02000000 [ 378.059942] [drm:intel_dp_start_link_train] clock recovery OK [ 378.061656] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful [ 378.062123] [drm:intel_enable_dp] Enabling DP audio on pipe B [ 378.062126] [drm:intel_audio_codec_enable] ELD on [CONNECTOR:52:DP-2], [ENCODER:51:TMDS-51] [ 378.062128] [drm:ilk_audio_codec_enable] Enable audio codec on port C, pipe B, 36 bytes ELD [ 378.062643] [drm:ironlake_update_primary_plane] Writing base 073C4000 FFFFFFFFFFFE8700 64 0 22016 [ 378.062645] [drm:intel_fbc_update] more than one pipe active, disabling compression [ 378.062651] [drm:intel_connector_check_state] [CONNECTOR:46:DP-1] [ 378.062658] [drm:intel_connector_check_state] [CONNECTOR:52:DP-2] [ 378.062662] [drm:check_encoder_state] [ENCODER:31:LVDS-31] [ 378.062664] [drm:check_encoder_state] [ENCODER:39:DAC-39] [ 378.062666] [drm:check_encoder_state] [ENCODER:40:TMDS-40] [ 378.062669] [drm:check_encoder_state] [ENCODER:45:TMDS-45] [ 378.062673] [drm:check_encoder_state] [ENCODER:47:TMDS-47] [ 378.062676] [drm:check_encoder_state] [ENCODER:49:TMDS-49] [ 378.062678] [drm:check_encoder_state] [ENCODER:51:TMDS-51] [ 378.062683] [drm:check_encoder_state] [ENCODER:53:TMDS-53] [ 378.062685] [drm:check_crtc_state] [CRTC:20] [ 378.062703] [drm:check_crtc_state] [CRTC:24] [ 378.062722] [drm:check_crtc_state] [CRTC:28] [ 378.062723] [drm:check_shared_dpll_state] PCH DPLL A [ 378.062728] [drm:check_shared_dpll_state] PCH DPLL B [ 378.062745] [drm:drm_atomic_set_fb_for_plane] Set [FB:99] for plane state ffff88029061a540