VM fault report. Driver vendor: X.Org Device vendor: AMD Device name: AMD TONGA (DRM 3.1.0, LLVM 3.8.0) Failing VM page: 0x0015703d Buffer list (in units of pages = 4kB):  Size VM start page VM end page Usage 1 0x0000000100111 0x0000000100112 TRACE 2 -- hole -- 37 0x0000000100114 0x0000000100139 SAMPLER_TEXTURE 9 -- hole -- 2 0x0000000100142 0x0000000100144 SAMPLER_TEXTURE 44 -- hole -- 2 0x0000000100170 0x0000000100172 SAMPLER_TEXTURE 178 -- hole -- 1 0x0000000100224 0x0000000100225 USER_SHADER 22 -- hole -- 1 0x000000010023b 0x000000010023c IB2 5416 -- hole -- 44 0x0000000101764 0x0000000101790 SAMPLER_TEXTURE 32 -- hole -- 16 0x00000001017b0 0x00000001017c0 BORDER_COLORS 20 -- hole -- 256 0x00000001017d4 0x00000001018d4 CONST_BUFFER, DESCRIPTORS 1260 -- hole -- 172 0x0000000101dc0 0x0000000101e6c SAMPLER_TEXTURE 212 -- hole -- 172 0x0000000101f40 0x0000000101fec SAMPLER_TEXTURE 148 -- hole -- 87 0x0000000102080 0x00000001020d7 SAMPLER_TEXTURE 105 -- hole -- 343 0x0000000102140 0x0000000102297 SAMPLER_TEXTURE 131 -- hole -- 12 0x000000010231a 0x0000000102326 SAMPLER_TEXTURE 486 -- hole -- 12 0x000000010250c 0x0000000102518 SAMPLER_TEXTURE 360 -- hole -- 683 0x0000000102680 0x000000010292b SAMPLER_TEXTURE 285 -- hole -- 256 0x0000000102a48 0x0000000102b48 VERTEX_BUFFER 180 -- hole -- 4 0x0000000102bfc 0x0000000102c00 SAMPLER_TEXTURE 64 -- hole -- 684 0x0000000102c40 0x0000000102eec SAMPLER_TEXTURE 115 -- hole -- 25 0x0000000102f5f 0x0000000102f78 VERTEX_BUFFER 8 -- hole -- 343 0x0000000102f80 0x00000001030d7 SAMPLER_TEXTURE 586 -- hole -- 2 0x0000000103321 0x0000000103323 VERTEX_BUFFER 2 -- hole -- 2 0x0000000103325 0x0000000103327 VERTEX_BUFFER 2 0x0000000103327 0x0000000103329 VERTEX_BUFFER 28 -- hole -- 2 0x0000000103345 0x0000000103347 VERTEX_BUFFER 2 0x0000000103347 0x0000000103349 VERTEX_BUFFER 2 0x0000000103349 0x000000010334b VERTEX_BUFFER 2 0x000000010334b 0x000000010334d VERTEX_BUFFER 2 0x000000010334d 0x000000010334f VERTEX_BUFFER 2 0x000000010334f 0x0000000103351 VERTEX_BUFFER 2 0x0000000103351 0x0000000103353 VERTEX_BUFFER 2 0x0000000103353 0x0000000103355 VERTEX_BUFFER 2 0x0000000103355 0x0000000103357 VERTEX_BUFFER 2 0x0000000103357 0x0000000103359 VERTEX_BUFFER 76 -- hole -- 1 0x00000001033a5 0x00000001033a6 SAMPLER_TEXTURE 1 0x00000001033a6 0x00000001033a7 USER_SHADER 1 0x00000001033a7 0x00000001033a8 USER_SHADER 9 -- hole -- 1 0x00000001033b1 0x00000001033b2 USER_SHADER 1 0x00000001033b2 0x00000001033b3 USER_SHADER 24 -- hole -- 115 0x00000001033cb 0x000000010343e VERTEX_BUFFER 150 -- hole -- 44 0x00000001034d4 0x0000000103500 SAMPLER_TEXTURE 172 0x0000000103500 0x00000001035ac SAMPLER_TEXTURE 212 -- hole -- 172 0x0000000103680 0x000000010372c SAMPLER_TEXTURE 87 0x000000010372c 0x0000000103783 SAMPLER_TEXTURE 4 -- hole -- 2 0x0000000103787 0x0000000103789 VERTEX_BUFFER 2 -- hole -- 2 0x000000010378b 0x000000010378d VERTEX_BUFFER 2 -- hole -- 2 0x000000010378f 0x0000000103791 VERTEX_BUFFER 2 0x0000000103791 0x0000000103793 VERTEX_BUFFER 2 0x0000000103793 0x0000000103795 VERTEX_BUFFER 2 0x0000000103795 0x0000000103797 VERTEX_BUFFER 2 0x0000000103797 0x0000000103799 VERTEX_BUFFER 2 0x0000000103799 0x000000010379b VERTEX_BUFFER 2 0x000000010379b 0x000000010379d VERTEX_BUFFER 2 0x000000010379d 0x000000010379f VERTEX_BUFFER 2 0x000000010379f 0x00000001037a1 VERTEX_BUFFER 2 0x00000001037a1 0x00000001037a3 VERTEX_BUFFER 57 -- hole -- 23 0x00000001037dc 0x00000001037f3 SAMPLER_TEXTURE 197 -- hole -- 17 0x00000001038b8 0x00000001038c9 INDEX_BUFFER 55 -- hole -- 87 0x0000000103900 0x0000000103957 SAMPLER_TEXTURE 233 -- hole -- 87 0x0000000103a40 0x0000000103a97 SAMPLER_TEXTURE 2345 -- hole -- 20741 0x00000001043c0 0x00000001094c5 CP_DMA, COLOR_BUFFER_MSAA 44 0x00000001094c5 0x00000001094f1 SAMPLER_TEXTURE 15 -- hole -- 20741 0x0000000109500 0x000000010e605 CP_DMA, COLOR_BUFFER_MSAA 32 -- hole -- 23 0x000000010e625 0x000000010e63c SAMPLER_TEXTURE 4 -- hole -- 20741 0x000000010e640 0x0000000113745 CP_DMA, COLOR_BUFFER_MSAA 48 0x0000000113745 0x0000000113775 HTILE 11 -- hole -- 20741 0x0000000113780 0x0000000118885 CP_DMA, COLOR_BUFFER_MSAA 10 -- hole -- 1 0x000000011888f 0x0000000118890 USER_SHADER 1 0x0000000118890 0x0000000118891 USER_SHADER 15 -- hole -- 23040 0x00000001188a0 0x000000011e2a0 DEPTH_BUFFER_MSAA 1 0x000000011e2a0 0x000000011e2a1 USER_SHADER 36900 -- hole -- 44 0x00000001272c5 0x00000001272f1 SAMPLER_TEXTURE 1787 -- hole -- 51 0x00000001279ec 0x0000000127a1f VERTEX_BUFFER 440 -- hole -- 256 0x0000000127bd7 0x0000000127cd7 HTILE 95 -- hole -- 1 0x0000000127d36 0x0000000127d37 USER_SHADER 1 0x0000000127d37 0x0000000127d38 USER_SHADER 4 -- hole -- 1 0x0000000127d3c 0x0000000127d3d USER_SHADER 1 0x0000000127d3d 0x0000000127d3e USER_SHADER 473 -- hole -- 78 0x0000000127f17 0x0000000127f65 VERTEX_BUFFER 2 -- hole -- 7 0x0000000127f67 0x0000000127f6e INDEX_BUFFER 18 -- hole -- 87 0x0000000127f80 0x0000000127fd7 SAMPLER_TEXTURE 2023 -- hole -- 289 0x00000001287be 0x00000001288df VERTEX_BUFFER 1156 -- hole -- 289 0x0000000128d63 0x0000000128e84 VERTEX_BUFFER 688 0x0000000128e84 0x0000000129134 INDEX_BUFFER 716 -- hole -- 256 0x0000000129400 0x0000000129500 CONST_BUFFER, DESCRIPTORS 64 -- hole -- 684 0x0000000129540 0x00000001297ec SAMPLER_TEXTURE 660 -- hole -- 1367 0x0000000129a80 0x0000000129fd7 SAMPLER_TEXTURE 1280 -- hole -- 63 0x000000012a4d7 0x000000012a516 VERTEX_BUFFER 42 -- hole -- 684 0x000000012a540 0x000000012a7ec SAMPLER_TEXTURE 363 -- hole -- 15 0x000000012a957 0x000000012a966 VERTEX_BUFFER 282 -- hole -- 343 0x000000012aa80 0x000000012abd7 SAMPLER_TEXTURE 192 -- hole -- 47 0x000000012ac97 0x000000012acc6 VERTEX_BUFFER 122 -- hole -- 1367 0x000000012ad40 0x000000012b297 SAMPLER_TEXTURE 20 -- hole -- 15 0x000000012b2ab 0x000000012b2ba VERTEX_BUFFER 135 -- hole -- 44 0x000000012b341 0x000000012b36d SAMPLER_TEXTURE 339 -- hole -- 128 0x000000012b4c0 0x000000012b540 SAMPLER_TEXTURE 57 -- hole -- 63 0x000000012b579 0x000000012b5b8 VERTEX_BUFFER 450 -- hole -- 4 0x000000012b77a 0x000000012b77e VERTEX_BUFFER 114 -- hole -- 2 0x000000012b7f0 0x000000012b7f2 VERTEX_BUFFER 1 0x000000012b7f2 0x000000012b7f3 USER_SHADER 1 0x000000012b7f3 0x000000012b7f4 USER_SHADER 1 -- hole -- 1 0x000000012b7f5 0x000000012b7f6 USER_SHADER 10 -- hole -- 1367 0x000000012b800 0x000000012bd57 SAMPLER_TEXTURE 28 -- hole -- 11 0x000000012bd73 0x000000012bd7e VERTEX_BUFFER 874 -- hole -- 16 0x000000012c0e8 0x000000012c0f8 VERTEX_BUFFER 4 0x000000012c0f8 0x000000012c0fc VERTEX_BUFFER 100 -- hole -- 32 0x000000012c160 0x000000012c180 SAMPLER_TEXTURE 24 0x000000012c180 0x000000012c198 VERTEX_BUFFER 379 -- hole -- 3 0x000000012c313 0x000000012c316 VERTEX_BUFFER 31 -- hole -- 47 0x000000012c335 0x000000012c364 VERTEX_BUFFER 755 -- hole -- 2 0x000000012c657 0x000000012c659 VERTEX_BUFFER 1 0x000000012c659 0x000000012c65a VERTEX_BUFFER 11 0x000000012c65a 0x000000012c665 VERTEX_BUFFER 14 0x000000012c665 0x000000012c673 VERTEX_BUFFER 18 0x000000012c673 0x000000012c685 VERTEX_BUFFER 76 0x000000012c685 0x000000012c6d1 VERTEX_BUFFER 17 -- hole -- 101 0x000000012c6e2 0x000000012c747 VERTEX_BUFFER 23 -- hole -- 101 0x000000012c75e 0x000000012c7c3 VERTEX_BUFFER 23 -- hole -- 27 0x000000012c7da 0x000000012c7f5 VERTEX_BUFFER 26 0x000000012c7f5 0x000000012c80f VERTEX_BUFFER 27 0x000000012c80f 0x000000012c82a VERTEX_BUFFER 341 -- hole -- 1 0x000000012c97f 0x000000012c980 VERTEX_BUFFER 87 0x000000012c980 0x000000012c9d7 SAMPLER_TEXTURE 105 -- hole -- 87 0x000000012ca40 0x000000012ca97 SAMPLER_TEXTURE 1024 -- hole -- 1 0x000000012ce97 0x000000012ce98 USER_SHADER 1 0x000000012ce98 0x000000012ce99 USER_SHADER 1 0x000000012ce99 0x000000012ce9a USER_SHADER 1 0x000000012ce9a 0x000000012ce9b USER_SHADER 1 0x000000012ce9b 0x000000012ce9c USER_SHADER 1 0x000000012ce9c 0x000000012ce9d USER_SHADER 1 0x000000012ce9d 0x000000012ce9e USER_SHADER 7 -- hole -- 10 0x000000012cea5 0x000000012ceaf INDEX_BUFFER 4625 -- hole -- 16384 0x000000012e0c0 0x00000001320c0 DEPTH_BUFFER 9847 -- hole -- 7 0x0000000134737 0x000000013473e VERTEX_BUFFER 2 -- hole -- 87 0x0000000134740 0x0000000134797 SAMPLER_TEXTURE 105 -- hole -- 87 0x0000000134800 0x0000000134857 SAMPLER_TEXTURE 1295 -- hole -- 16 0x0000000134d66 0x0000000134d76 VERTEX_BUFFER 44 0x0000000134d76 0x0000000134da2 SAMPLER_TEXTURE 30 -- hole -- 4608 0x0000000134dc0 0x0000000135fc0 SCRATCH_BUFFER 634 -- hole -- 6 0x000000013623a 0x0000000136240 INDEX_BUFFER 126 -- hole -- 1 0x00000001362be 0x00000001362bf INDEX_BUFFER 113 -- hole -- 1 0x0000000136330 0x0000000136331 USER_SHADER 1 0x0000000136331 0x0000000136332 VERTEX_BUFFER 2047 -- hole -- 2 0x0000000136b31 0x0000000136b33 INDEX_BUFFER 1 0x0000000136b33 0x0000000136b34 USER_SHADER 610 -- hole -- 1 0x0000000136d96 0x0000000136d97 USER_SHADER 32 -- hole -- 1 0x0000000136db7 0x0000000136db8 USER_SHADER 7 -- hole -- 1 0x0000000136dbf 0x0000000136dc0 VERTEX_BUFFER 13504 -- hole -- 87 0x000000013a280 0x000000013a2d7 SAMPLER_TEXTURE 18 -- hole -- 1 0x000000013a2e9 0x000000013a2ea USER_SHADER 1 0x000000013a2ea 0x000000013a2eb USER_SHADER 21 -- hole -- 87 0x000000013a300 0x000000013a357 SAMPLER_TEXTURE 36 -- hole -- 1 0x000000013a37b 0x000000013a37c USER_SHADER 1 0x000000013a37c 0x000000013a37d USER_SHADER 3 -- hole -- 87 0x000000013a380 0x000000013a3d7 SAMPLER_TEXTURE 38 -- hole -- 1 0x000000013a3fd 0x000000013a3fe USER_SHADER 1 0x000000013a3fe 0x000000013a3ff USER_SHADER 1 0x000000013a3ff 0x000000013a400 USER_SHADER 87 0x000000013a400 0x000000013a457 SAMPLER_TEXTURE 27 -- hole -- 1 0x000000013a472 0x000000013a473 USER_SHADER 1 0x000000013a473 0x000000013a474 USER_SHADER 9 0x000000013a474 0x000000013a47d VERTEX_BUFFER 2 0x000000013a47d 0x000000013a47f INDEX_BUFFER 1 -- hole -- 87 0x000000013a480 0x000000013a4d7 SAMPLER_TEXTURE 87 0x000000013a4d7 0x000000013a52e SAMPLER_TEXTURE 210 -- hole -- 87 0x000000013a600 0x000000013a657 SAMPLER_TEXTURE 41 -- hole -- 1367 0x000000013a680 0x000000013abd7 SAMPLER_TEXTURE 851 -- hole -- 23 0x000000013af2a 0x000000013af41 SAMPLER_TEXTURE 16 -- hole -- 114 0x000000013af51 0x000000013afc3 VERTEX_BUFFER 14 -- hole -- 1 0x000000013afd1 0x000000013afd2 USER_SHADER 1 0x000000013afd2 0x000000013afd3 USER_SHADER 1 0x000000013afd3 0x000000013afd4 VERTEX_BUFFER 1 0x000000013afd4 0x000000013afd5 INDEX_BUFFER 1 0x000000013afd5 0x000000013afd6 VERTEX_BUFFER 1 0x000000013afd6 0x000000013afd7 INDEX_BUFFER 36 -- hole -- 3 0x000000013affb 0x000000013affe INDEX_BUFFER 2 -- hole -- 1367 0x000000013b000 0x000000013b557 SAMPLER_TEXTURE 22 -- hole -- 1 0x000000013b56d 0x000000013b56e INDEX_BUFFER 22041 -- hole -- 1 0x0000000140b87 0x0000000140b88 USER_SHADER 1 0x0000000140b88 0x0000000140b89 USER_SHADER 1 0x0000000140b89 0x0000000140b8a USER_SHADER 1 0x0000000140b8a 0x0000000140b8b USER_SHADER 1 0x0000000140b8b 0x0000000140b8c USER_SHADER 1 0x0000000140b8c 0x0000000140b8d USER_SHADER 25715 -- hole -- 11 0x0000000147000 0x000000014700b VERTEX_BUFFER 8 0x000000014700b 0x0000000147013 VERTEX_BUFFER 493 -- hole -- 87 0x0000000147200 0x0000000147257 SAMPLER_TEXTURE 41 -- hole -- 87 0x0000000147280 0x00000001472d7 SAMPLER_TEXTURE 1384 -- hole -- 1 0x000000014783f 0x0000000147840 VERTEX_BUFFER 11 -- hole -- 1 0x000000014784b 0x000000014784c VERTEX_BUFFER 4 -- hole -- 52 0x0000000147850 0x0000000147884 VERTEX_BUFFER 4 -- hole -- 39 0x0000000147888 0x00000001478af VERTEX_BUFFER 6 -- hole -- 2 0x00000001478b5 0x00000001478b7 VERTEX_BUFFER 339 -- hole -- 56 0x0000000147a0a 0x0000000147a42 VERTEX_BUFFER 56 0x0000000147a42 0x0000000147a7a VERTEX_BUFFER 152 -- hole -- 52 0x0000000147b12 0x0000000147b46 VERTEX_BUFFER 1772 -- hole -- 11 0x0000000148232 0x000000014823d VERTEX_BUFFER 282 -- hole -- 44 0x0000000148357 0x0000000148383 VERTEX_BUFFER 363 -- hole -- 57 0x00000001484ee 0x0000000148527 VERTEX_BUFFER 688 -- hole -- 289 0x00000001487d7 0x00000001488f8 VERTEX_BUFFER 289 0x00000001488f8 0x0000000148a19 VERTEX_BUFFER 289 0x0000000148a19 0x0000000148b3a VERTEX_BUFFER 289 0x0000000148b3a 0x0000000148c5b VERTEX_BUFFER 289 0x0000000148c5b 0x0000000148d7c VERTEX_BUFFER 289 0x0000000148d7c 0x0000000148e9d VERTEX_BUFFER 289 0x0000000148e9d 0x0000000148fbe VERTEX_BUFFER 1689 -- hole -- 289 0x0000000149657 0x0000000149778 VERTEX_BUFFER 4285 -- hole -- 53 0x000000014a835 0x000000014a86a VERTEX_BUFFER 400 -- hole -- 289 0x000000014a9fa 0x000000014ab1b VERTEX_BUFFER 1148 -- hole -- 58 0x000000014af97 0x000000014afd1 VERTEX_BUFFER 2153 -- hole -- 51 0x000000014b83a 0x000000014b86d VERTEX_BUFFER 1455 -- hole -- 56 0x000000014be1c 0x000000014be54 VERTEX_BUFFER 76 -- hole -- 70 0x000000014bea0 0x000000014bee6 VERTEX_BUFFER 19 0x000000014bee6 0x000000014bef9 VERTEX_BUFFER 127 -- hole -- 46 0x000000014bf78 0x000000014bfa6 VERTEX_BUFFER 1100 -- hole -- 2 0x000000014c3f2 0x000000014c3f4 VERTEX_BUFFER 1955 -- hole -- 51 0x000000014cb97 0x000000014cbca VERTEX_BUFFER 1677 -- hole -- 89 0x000000014d257 0x000000014d2b0 SAMPLER_TEXTURE 1715 -- hole -- 289 0x000000014d963 0x000000014da84 VERTEX_BUFFER 60 -- hole -- 87 0x000000014dac0 0x000000014db17 SAMPLER_TEXTURE 9 -- hole -- 50 0x000000014db20 0x000000014db52 VERTEX_BUFFER 46 -- hole -- 87 0x000000014db80 0x000000014dbd7 SAMPLER_TEXTURE 84 -- hole -- 13 0x000000014dc2b 0x000000014dc38 INDEX_BUFFER 8 -- hole -- 87 0x000000014dc40 0x000000014dc97 SAMPLER_TEXTURE 14 -- hole -- 6 0x000000014dca5 0x000000014dcab INDEX_BUFFER 940 -- hole -- 289 0x000000014e057 0x000000014e178 VERTEX_BUFFER 8 -- hole -- 87 0x000000014e180 0x000000014e1d7 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000014e200 0x000000014e257 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000014e280 0x000000014e2d7 SAMPLER_TEXTURE 172 -- hole -- 84 0x000000014e383 0x000000014e3d7 VERTEX_BUFFER 11 0x000000014e3d7 0x000000014e3e2 INDEX_BUFFER 259 -- hole -- 45 0x000000014e4e5 0x000000014e512 SAMPLER_TEXTURE 115 -- hole -- 67 0x000000014e585 0x000000014e5c8 VERTEX_BUFFER 1009 -- hole -- 12 0x000000014e9b9 0x000000014e9c5 INDEX_BUFFER 316 -- hole -- 101 0x000000014eb01 0x000000014eb66 VERTEX_BUFFER 50 -- hole -- 87 0x000000014eb98 0x000000014ebef SAMPLER_TEXTURE 64 -- hole -- 173 0x000000014ec2f 0x000000014ecdc SAMPLER_TEXTURE 89 0x000000014ecdc 0x000000014ed35 VERTEX_BUFFER 11 -- hole -- 87 0x000000014ed40 0x000000014ed97 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000014edc0 0x000000014ee17 SAMPLER_TEXTURE 11207 -- hole -- 42 0x00000001519de 0x0000000151a08 VERTEX_BUFFER 2315 -- hole -- 29 0x0000000152313 0x0000000152330 VERTEX_BUFFER 5 -- hole -- 9 0x0000000152335 0x000000015233e VERTEX_BUFFER 89 -- hole -- 41 0x0000000152397 0x00000001523c0 VERTEX_BUFFER 791 -- hole -- 29 0x00000001526d7 0x00000001526f4 VERTEX_BUFFER 90 -- hole -- 6 0x000000015274e 0x0000000152754 VERTEX_BUFFER 280 -- hole -- 115 0x000000015286c 0x00000001528df VERTEX_BUFFER 1485 -- hole -- 14 0x0000000152eac 0x0000000152eba VERTEX_BUFFER 1933 -- hole -- 29 0x0000000153647 0x0000000153664 VERTEX_BUFFER 1932 -- hole -- 2 0x0000000153df0 0x0000000153df2 VERTEX_BUFFER 2 0x0000000153df2 0x0000000153df4 VERTEX_BUFFER 4 -- hole -- 2 0x0000000153df8 0x0000000153dfa VERTEX_BUFFER 10 -- hole -- 2 0x0000000153e04 0x0000000153e06 VERTEX_BUFFER 2 0x0000000153e06 0x0000000153e08 VERTEX_BUFFER 242 -- hole -- 99 0x0000000153efa 0x0000000153f5d VERTEX_BUFFER 8506 -- hole -- 29 0x0000000156097 0x00000001560b4 VERTEX_BUFFER 99 -- hole -- 29 0x0000000156117 0x0000000156134 VERTEX_BUFFER 371 -- hole -- 16 0x00000001562a7 0x00000001562b7 VERTEX_BUFFER 646 -- hole -- 2 0x000000015653d 0x000000015653f VERTEX_BUFFER 756 -- hole -- 2 0x0000000156833 0x0000000156835 VERTEX_BUFFER 10 0x0000000156835 0x000000015683f VERTEX_BUFFER 506 -- hole -- 3 0x0000000156a39 0x0000000156a3c VERTEX_BUFFER 105 -- hole -- 2 0x0000000156aa5 0x0000000156aa7 VERTEX_BUFFER 528 -- hole -- 2 0x0000000156cb7 0x0000000156cb9 VERTEX_BUFFER 94 -- hole -- 14 0x0000000156d17 0x0000000156d25 VERTEX_BUFFER 114 -- hole -- 256 0x0000000156d97 0x0000000156e97 CONST_BUFFER, DESCRIPTORS, VERTEX_BUFFER 289 -- hole -- 2 0x0000000156fb8 0x0000000156fba VERTEX_BUFFER 114 -- hole -- 1 0x000000015702c 0x000000015702d VERTEX_BUFFER 16 -- hole -- 1 0x000000015703d 0x000000015703e VERTEX_BUFFER 729 -- hole -- 56 0x0000000157317 0x000000015734f VERTEX_BUFFER 532 -- hole -- 97 0x0000000157563 0x00000001575c4 VERTEX_BUFFER 396 -- hole -- 29 0x0000000157750 0x000000015776d VERTEX_BUFFER 106 -- hole -- 23 0x00000001577d7 0x00000001577ee VERTEX_BUFFER 233 -- hole -- 102 0x00000001578d7 0x000000015793d VERTEX_BUFFER 400 -- hole -- 29 0x0000000157acd 0x0000000157aea VERTEX_BUFFER 109 -- hole -- 27 0x0000000157b57 0x0000000157b72 VERTEX_BUFFER 105 -- hole -- 14 0x0000000157bdb 0x0000000157be9 VERTEX_BUFFER 13 0x0000000157be9 0x0000000157bf6 VERTEX_BUFFER 1473 -- hole -- 115 0x00000001581b7 0x000000015822a VERTEX_BUFFER 4269 -- hole -- 30 0x00000001592d7 0x00000001592f5 VERTEX_BUFFER 115 -- hole -- 4 0x0000000159368 0x000000015936c INDEX_BUFFER 574 -- hole -- 4 0x00000001595aa 0x00000001595ae VERTEX_BUFFER 120 -- hole -- 2 0x0000000159626 0x0000000159628 VERTEX_BUFFER 232 -- hole -- 4 0x0000000159710 0x0000000159714 VERTEX_BUFFER 1 0x0000000159714 0x0000000159715 VERTEX_BUFFER 646 -- hole -- 63 0x000000015999b 0x00000001599da VERTEX_BUFFER 39 0x00000001599da 0x0000000159a01 VERTEX_BUFFER 1347 -- hole -- 101 0x0000000159f44 0x0000000159fa9 VERTEX_BUFFER 982 -- hole -- 16 0x000000015a37f 0x000000015a38f VERTEX_BUFFER 1135 -- hole -- 2 0x000000015a7fe 0x000000015a800 VERTEX_BUFFER 279 -- hole -- 18 0x000000015a917 0x000000015a929 VERTEX_BUFFER 23 -- hole -- 87 0x000000015a940 0x000000015a997 SAMPLER_TEXTURE 1403 -- hole -- 7 0x000000015af12 0x000000015af19 VERTEX_BUFFER 682 -- hole -- 12 0x000000015b1c3 0x000000015b1cf VERTEX_BUFFER 202 -- hole -- 5 0x000000015b299 0x000000015b29e VERTEX_BUFFER 225 -- hole -- 8 0x000000015b37f 0x000000015b387 VERTEX_BUFFER 8 0x000000015b387 0x000000015b38f VERTEX_BUFFER 8 0x000000015b38f 0x000000015b397 VERTEX_BUFFER 8 0x000000015b397 0x000000015b39f VERTEX_BUFFER 2465 -- hole -- 87 0x000000015bd40 0x000000015bd97 SAMPLER_TEXTURE 666 -- hole -- 58 0x000000015c031 0x000000015c06b VERTEX_BUFFER 466 -- hole -- 115 0x000000015c23d 0x000000015c2b0 VERTEX_BUFFER 385 -- hole -- 289 0x000000015c431 0x000000015c552 VERTEX_BUFFER 289 0x000000015c552 0x000000015c673 VERTEX_BUFFER 289 0x000000015c673 0x000000015c794 VERTEX_BUFFER 27 -- hole -- 16 0x000000015c7af 0x000000015c7bf VERTEX_BUFFER 1 -- hole -- 87 0x000000015c7c0 0x000000015c817 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015c840 0x000000015c897 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015c8c0 0x000000015c917 SAMPLER_TEXTURE 27 -- hole -- 14 0x000000015c932 0x000000015c940 VERTEX_BUFFER 87 0x000000015c940 0x000000015c997 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015c9c0 0x000000015ca17 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015ca40 0x000000015ca97 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015cac0 0x000000015cb17 SAMPLER_TEXTURE 27 -- hole -- 8 0x000000015cb32 0x000000015cb3a VERTEX_BUFFER 6 -- hole -- 87 0x000000015cb40 0x000000015cb97 SAMPLER_TEXTURE 37 -- hole -- 3 0x000000015cbbc 0x000000015cbbf VERTEX_BUFFER 1 -- hole -- 87 0x000000015cbc0 0x000000015cc17 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015cc40 0x000000015cc97 SAMPLER_TEXTURE 115 0x000000015cc97 0x000000015cd0a VERTEX_BUFFER 118 -- hole -- 87 0x000000015cd80 0x000000015cdd7 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015ce00 0x000000015ce57 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015ce80 0x000000015ced7 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015cf00 0x000000015cf57 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015cf80 0x000000015cfd7 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015d000 0x000000015d057 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015d080 0x000000015d0d7 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015d100 0x000000015d157 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015d180 0x000000015d1d7 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015d200 0x000000015d257 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015d280 0x000000015d2d7 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015d300 0x000000015d357 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015d380 0x000000015d3d7 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015d400 0x000000015d457 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015d480 0x000000015d4d7 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015d500 0x000000015d557 SAMPLER_TEXTURE 14 -- hole -- 8 0x000000015d565 0x000000015d56d VERTEX_BUFFER 19 -- hole -- 87 0x000000015d580 0x000000015d5d7 SAMPLER_TEXTURE 14 0x000000015d5d7 0x000000015d5e5 VERTEX_BUFFER 27 -- hole -- 87 0x000000015d600 0x000000015d657 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015d680 0x000000015d6d7 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015d700 0x000000015d757 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015d780 0x000000015d7d7 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015d800 0x000000015d857 SAMPLER_TEXTURE 41 -- hole -- 87 0x000000015d880 0x000000015d8d7 SAMPLER_TEXTURE 14 -- hole -- 14 0x000000015d8e5 0x000000015d8f3 VERTEX_BUFFER 13 -- hole -- 87 0x000000015d900 0x000000015d957 SAMPLER_TEXTURE 35 -- hole -- 31 0x000000015d97a 0x000000015d999 VERTEX_BUFFER 11 -- hole -- 5 0x000000015d9a4 0x000000015d9a9 VERTEX_BUFFER 29 0x000000015d9a9 0x000000015d9c6 VERTEX_BUFFER 7 0x000000015d9c6 0x000000015d9cd VERTEX_BUFFER 34 -- hole -- 13 0x000000015d9ef 0x000000015d9fc VERTEX_BUFFER 4 -- hole -- 87 0x000000015da00 0x000000015da57 SAMPLER_TEXTURE 7 0x000000015da57 0x000000015da5e VERTEX_BUFFER 11 -- hole -- 21 0x000000015da69 0x000000015da7e VERTEX_BUFFER 2 -- hole -- 87 0x000000015da80 0x000000015dad7 SAMPLER_TEXTURE 29 0x000000015dad7 0x000000015daf4 VERTEX_BUFFER 12 -- hole -- 87 0x000000015db00 0x000000015db57 SAMPLER_TEXTURE 29 0x000000015db57 0x000000015db74 VERTEX_BUFFER 7 0x000000015db74 0x000000015db7b VERTEX_BUFFER 5 -- hole -- 87 0x000000015db80 0x000000015dbd7 SAMPLER_TEXTURE 21 0x000000015dbd7 0x000000015dbec VERTEX_BUFFER 20 -- hole -- 87 0x000000015dc00 0x000000015dc57 SAMPLER_TEXTURE 17 -- hole -- 5 0x000000015dc68 0x000000015dc6d VERTEX_BUFFER 3 -- hole -- 5 0x000000015dc70 0x000000015dc75 VERTEX_BUFFER 5 -- hole -- 3 0x000000015dc7a 0x000000015dc7d VERTEX_BUFFER 3 -- hole -- 87 0x000000015dc80 0x000000015dcd7 SAMPLER_TEXTURE 115 -- hole -- 115 0x000000015dd4a 0x000000015ddbd VERTEX_BUFFER 1024 0x000000015ddbd 0x000000015e1bd INDEX_BUFFER 256 0x000000015e1bd 0x000000015e2bd CONST_BUFFER, DESCRIPTORS, VERTEX_BUFFER 115 -- hole -- 115 0x000000015e330 0x000000015e3a3 VERTEX_BUFFER 115 -- hole -- 114 0x000000015e416 0x000000015e488 VERTEX_BUFFER Note: The holes represent memory not used by the IB. Other buffers can still be allocated there. ------------------ IB begin ------------------ WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000001 NOP: Trace point ID: 1 This trace point was reached by the CP. INDIRECT_BUFFER_CIK: 0x0023b000 0x00000001 0x00000090 EVENT_WRITE: VGT_EVENT_INITIATOR <- EVENT_TYPE = FLUSH_AND_INV_CB_META EVENT_INDEX <- 0 INV_L2 <- 0 EVENT_WRITE: VGT_EVENT_INITIATOR <- EVENT_TYPE = FLUSH_AND_INV_DB_META EVENT_INDEX <- 0 INV_L2 <- 0 EVENT_WRITE: VGT_EVENT_INITIATOR <- EVENT_TYPE = PS_PARTIAL_FLUSH EVENT_INDEX <- 4 INV_L2 <- 0 ACQUIRE_MEM: CP_COHER_CNTL <- DEST_BASE_0_ENA = 0 DEST_BASE_1_ENA = 0 TC_SD_ACTION_ENA = 0 TC_NC_ACTION_ENA = 0 CB0_DEST_BASE_ENA = 1 CB1_DEST_BASE_ENA = 1 CB2_DEST_BASE_ENA = 1 CB3_DEST_BASE_ENA = 1 CB4_DEST_BASE_ENA = 1 CB5_DEST_BASE_ENA = 1 CB6_DEST_BASE_ENA = 1 CB7_DEST_BASE_ENA = 1 DB_DEST_BASE_ENA = 1 TCL1_VOL_ACTION_ENA = 0 TC_VOL_ACTION_ENA = 0 TC_WB_ACTION_ENA = 1 DEST_BASE_2_ENA = 0 DEST_BASE_3_ENA = 0 TCL1_ACTION_ENA = 1 TC_ACTION_ENA = 1 CB_ACTION_ENA = 1 DB_ACTION_ENA = 1 SH_KCACHE_ACTION_ENA = 1 SH_KCACHE_VOL_ACTION_ENA = 0 SH_ICACHE_ACTION_ENA = 1 SH_KCACHE_WB_ACTION_ENA = 0 SH_SD_ACTION_ENA = 0 CP_COHER_SIZE <- 0xffffffff CP_COHER_SIZE_HI <- COHER_SIZE_HI_256B = 255 CP_COHER_BASE <- 0 CP_COHER_BASE_HI <- COHER_BASE_HI_256B = 0 POLL_INTERVAL <- 10 DMA_DATA: DMA_DATA_WORD0 <- CP_SYNC = 1 SRC_SEL = DATA DSL_SEL = DST_ADDR ENGINE = ME SRC_ADDR_LO <- 0 SRC_ADDR_HI <- 0 DST_ADDR_LO <- 0x094c0000 DST_ADDR_HI <- 1 COMMAND <- BYTE_COUNT = 20480 DISABLE_WR_CONFIRM = 0 SRC_SWAP = NONE DST_SWAP = NONE SAS = MEMORY DAS = MEMORY SAIC = INCREMENT DAIC = INCREMENT RAW_WAIT = 1 EVENT_WRITE: VGT_EVENT_INITIATOR <- EVENT_TYPE = FLUSH_AND_INV_CB_META EVENT_INDEX <- 0 INV_L2 <- 0 EVENT_WRITE: VGT_EVENT_INITIATOR <- EVENT_TYPE = FLUSH_AND_INV_DB_META EVENT_INDEX <- 0 INV_L2 <- 0 EVENT_WRITE: VGT_EVENT_INITIATOR <- EVENT_TYPE = PS_PARTIAL_FLUSH EVENT_INDEX <- 4 INV_L2 <- 0 ACQUIRE_MEM: CP_COHER_CNTL <- DEST_BASE_0_ENA = 0 DEST_BASE_1_ENA = 0 TC_SD_ACTION_ENA = 0 TC_NC_ACTION_ENA = 0 CB0_DEST_BASE_ENA = 1 CB1_DEST_BASE_ENA = 1 CB2_DEST_BASE_ENA = 1 CB3_DEST_BASE_ENA = 1 CB4_DEST_BASE_ENA = 1 CB5_DEST_BASE_ENA = 1 CB6_DEST_BASE_ENA = 1 CB7_DEST_BASE_ENA = 1 DB_DEST_BASE_ENA = 1 TCL1_VOL_ACTION_ENA = 0 TC_VOL_ACTION_ENA = 0 TC_WB_ACTION_ENA = 0 DEST_BASE_2_ENA = 0 DEST_BASE_3_ENA = 0 TCL1_ACTION_ENA = 0 TC_ACTION_ENA = 0 CB_ACTION_ENA = 1 DB_ACTION_ENA = 1 SH_KCACHE_ACTION_ENA = 0 SH_KCACHE_VOL_ACTION_ENA = 0 SH_ICACHE_ACTION_ENA = 0 SH_KCACHE_WB_ACTION_ENA = 0 SH_SD_ACTION_ENA = 0 CP_COHER_SIZE <- 0xffffffff CP_COHER_SIZE_HI <- COHER_SIZE_HI_256B = 255 CP_COHER_BASE <- 0 CP_COHER_BASE_HI <- COHER_BASE_HI_256B = 0 POLL_INTERVAL <- 10 DMA_DATA: DMA_DATA_WORD0 <- CP_SYNC = 1 SRC_SEL = DATA DSL_SEL = DST_ADDR ENGINE = ME SRC_ADDR_LO <- 0 SRC_ADDR_HI <- 0 DST_ADDR_LO <- 0x0e600000 DST_ADDR_HI <- 1 COMMAND <- BYTE_COUNT = 20480 DISABLE_WR_CONFIRM = 0 SRC_SWAP = NONE DST_SWAP = NONE SAS = MEMORY DAS = MEMORY SAIC = INCREMENT DAIC = INCREMENT RAW_WAIT = 1 EVENT_WRITE: VGT_EVENT_INITIATOR <- EVENT_TYPE = FLUSH_AND_INV_CB_META EVENT_INDEX <- 0 INV_L2 <- 0 EVENT_WRITE: VGT_EVENT_INITIATOR <- EVENT_TYPE = FLUSH_AND_INV_DB_META EVENT_INDEX <- 0 INV_L2 <- 0 EVENT_WRITE: VGT_EVENT_INITIATOR <- EVENT_TYPE = PS_PARTIAL_FLUSH EVENT_INDEX <- 4 INV_L2 <- 0 ACQUIRE_MEM: CP_COHER_CNTL <- DEST_BASE_0_ENA = 0 DEST_BASE_1_ENA = 0 TC_SD_ACTION_ENA = 0 TC_NC_ACTION_ENA = 0 CB0_DEST_BASE_ENA = 1 CB1_DEST_BASE_ENA = 1 CB2_DEST_BASE_ENA = 1 CB3_DEST_BASE_ENA = 1 CB4_DEST_BASE_ENA = 1 CB5_DEST_BASE_ENA = 1 CB6_DEST_BASE_ENA = 1 CB7_DEST_BASE_ENA = 1 DB_DEST_BASE_ENA = 1 TCL1_VOL_ACTION_ENA = 0 TC_VOL_ACTION_ENA = 0 TC_WB_ACTION_ENA = 0 DEST_BASE_2_ENA = 0 DEST_BASE_3_ENA = 0 TCL1_ACTION_ENA = 0 TC_ACTION_ENA = 0 CB_ACTION_ENA = 1 DB_ACTION_ENA = 1 SH_KCACHE_ACTION_ENA = 0 SH_KCACHE_VOL_ACTION_ENA = 0 SH_ICACHE_ACTION_ENA = 0 SH_KCACHE_WB_ACTION_ENA = 0 SH_SD_ACTION_ENA = 0 CP_COHER_SIZE <- 0xffffffff CP_COHER_SIZE_HI <- COHER_SIZE_HI_256B = 255 CP_COHER_BASE <- 0 CP_COHER_BASE_HI <- COHER_BASE_HI_256B = 0 POLL_INTERVAL <- 10 DMA_DATA: DMA_DATA_WORD0 <- CP_SYNC = 1 SRC_SEL = DATA DSL_SEL = DST_ADDR ENGINE = ME SRC_ADDR_LO <- 0 SRC_ADDR_HI <- 0 DST_ADDR_LO <- 0x13740000 DST_ADDR_HI <- 1 COMMAND <- BYTE_COUNT = 20480 DISABLE_WR_CONFIRM = 0 SRC_SWAP = NONE DST_SWAP = NONE SAS = MEMORY DAS = MEMORY SAIC = INCREMENT DAIC = INCREMENT RAW_WAIT = 1 EVENT_WRITE: VGT_EVENT_INITIATOR <- EVENT_TYPE = FLUSH_AND_INV_CB_META EVENT_INDEX <- 0 INV_L2 <- 0 EVENT_WRITE: VGT_EVENT_INITIATOR <- EVENT_TYPE = FLUSH_AND_INV_DB_META EVENT_INDEX <- 0 INV_L2 <- 0 EVENT_WRITE: VGT_EVENT_INITIATOR <- EVENT_TYPE = PS_PARTIAL_FLUSH EVENT_INDEX <- 4 INV_L2 <- 0 ACQUIRE_MEM: CP_COHER_CNTL <- DEST_BASE_0_ENA = 0 DEST_BASE_1_ENA = 0 TC_SD_ACTION_ENA = 0 TC_NC_ACTION_ENA = 0 CB0_DEST_BASE_ENA = 1 CB1_DEST_BASE_ENA = 1 CB2_DEST_BASE_ENA = 1 CB3_DEST_BASE_ENA = 1 CB4_DEST_BASE_ENA = 1 CB5_DEST_BASE_ENA = 1 CB6_DEST_BASE_ENA = 1 CB7_DEST_BASE_ENA = 1 DB_DEST_BASE_ENA = 1 TCL1_VOL_ACTION_ENA = 0 TC_VOL_ACTION_ENA = 0 TC_WB_ACTION_ENA = 0 DEST_BASE_2_ENA = 0 DEST_BASE_3_ENA = 0 TCL1_ACTION_ENA = 0 TC_ACTION_ENA = 0 CB_ACTION_ENA = 1 DB_ACTION_ENA = 1 SH_KCACHE_ACTION_ENA = 0 SH_KCACHE_VOL_ACTION_ENA = 0 SH_ICACHE_ACTION_ENA = 0 SH_KCACHE_WB_ACTION_ENA = 0 SH_SD_ACTION_ENA = 0 CP_COHER_SIZE <- 0xffffffff CP_COHER_SIZE_HI <- COHER_SIZE_HI_256B = 255 CP_COHER_BASE <- 0 CP_COHER_BASE_HI <- COHER_BASE_HI_256B = 0 POLL_INTERVAL <- 10 DMA_DATA: DMA_DATA_WORD0 <- CP_SYNC = 1 SRC_SEL = DATA DSL_SEL = DST_ADDR ENGINE = ME SRC_ADDR_LO <- 0 SRC_ADDR_HI <- 0 DST_ADDR_LO <- 0x18880000 DST_ADDR_HI <- 1 COMMAND <- BYTE_COUNT = 20480 DISABLE_WR_CONFIRM = 0 SRC_SWAP = NONE DST_SWAP = NONE SAS = MEMORY DAS = MEMORY SAIC = INCREMENT DAIC = INCREMENT RAW_WAIT = 1 EVENT_WRITE: VGT_EVENT_INITIATOR <- EVENT_TYPE = FLUSH_AND_INV_CB_META EVENT_INDEX <- 0 INV_L2 <- 0 EVENT_WRITE: VGT_EVENT_INITIATOR <- EVENT_TYPE = FLUSH_AND_INV_DB_META EVENT_INDEX <- 0 INV_L2 <- 0 ACQUIRE_MEM: CP_COHER_CNTL <- DEST_BASE_0_ENA = 0 DEST_BASE_1_ENA = 0 TC_SD_ACTION_ENA = 0 TC_NC_ACTION_ENA = 0 CB0_DEST_BASE_ENA = 1 CB1_DEST_BASE_ENA = 1 CB2_DEST_BASE_ENA = 1 CB3_DEST_BASE_ENA = 1 CB4_DEST_BASE_ENA = 1 CB5_DEST_BASE_ENA = 1 CB6_DEST_BASE_ENA = 1 CB7_DEST_BASE_ENA = 1 DB_DEST_BASE_ENA = 1 TCL1_VOL_ACTION_ENA = 0 TC_VOL_ACTION_ENA = 0 TC_WB_ACTION_ENA = 0 DEST_BASE_2_ENA = 0 DEST_BASE_3_ENA = 0 TCL1_ACTION_ENA = 0 TC_ACTION_ENA = 0 CB_ACTION_ENA = 1 DB_ACTION_ENA = 1 SH_KCACHE_ACTION_ENA = 0 SH_KCACHE_VOL_ACTION_ENA = 0 SH_ICACHE_ACTION_ENA = 0 SH_KCACHE_WB_ACTION_ENA = 0 SH_SD_ACTION_ENA = 0 CP_COHER_SIZE <- 0xffffffff CP_COHER_SIZE_HI <- COHER_SIZE_HI_256B = 255 CP_COHER_BASE <- 0 CP_COHER_BASE_HI <- COHER_BASE_HI_256B = 0 POLL_INTERVAL <- 10 SET_CONTEXT_REG: VGT_STRMOUT_BUFFER_CONFIG <- STREAM_0_BUFFER_EN = 0 STREAM_1_BUFFER_EN = 0 STREAM_2_BUFFER_EN = 0 STREAM_3_BUFFER_EN = 0 SET_CONTEXT_REG: VGT_STRMOUT_CONFIG <- STREAMOUT_0_EN = 0 STREAMOUT_1_EN = 0 STREAMOUT_2_EN = 0 STREAMOUT_3_EN = 0 RAST_STREAM = 0 RAST_STREAM_MASK = 0 USE_RAST_STREAM_MASK = 0 SET_CONTEXT_REG: CB_COLOR0_BASE <- 0x01043c00 CB_COLOR0_PITCH <- TILE_MAX = 255 FMASK_TILE_MAX = 255 CB_COLOR0_SLICE <- TILE_MAX = 0x08fff CB_COLOR0_VIEW <- SLICE_START = 0 SLICE_MAX = 0 CB_COLOR0_INFO <- ENDIAN = ENDIAN_NONE FORMAT = COLOR_8_8_8_8 LINEAR_GENERAL = 0 NUMBER_TYPE = NUMBER_UNORM COMP_SWAP = SWAP_ALT FAST_CLEAR = 1 COMPRESSION = 1 BLEND_CLAMP = 1 BLEND_BYPASS = 0 SIMPLE_FLOAT = 0 ROUND_MODE = 0 CMASK_IS_LINEAR = 0 BLEND_OPT_DONT_RD_DST = FORCE_OPT_AUTO BLEND_OPT_DISCARD_PIXEL = FORCE_OPT_AUTO FMASK_COMPRESSION_DISABLE = 0 FMASK_COMPRESS_1FRAG_ONLY = 0 DCC_ENABLE = 0 CMASK_ADDR_TYPE = 0 CB_COLOR0_ATTRIB <- TILE_MODE_INDEX = 14 FMASK_TILE_MODE_INDEX = 14 FMASK_BANK_HEIGHT = 0 NUM_SAMPLES = 3 NUM_FRAGMENTS = 3 FORCE_DST_ALPHA_1 = 0 CB_COLOR0_DCC_CONTROL <- OVERWRITE_COMBINER_DISABLE = 1 KEY_CLEAR_ENABLE = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = 0 MIN_COMPRESSED_BLOCK_SIZE = 0 MAX_COMPRESSED_BLOCK_SIZE = 0 COLOR_TRANSFORM = 0 INDEPENDENT_64B_BLOCKS = 0 LOSSY_RGB_PRECISION = 0 LOSSY_ALPHA_PRECISION = 0 CB_COLOR0_CMASK <- 0x01094c00 CB_COLOR0_CMASK_SLICE <- TILE_MAX = 159 CB_COLOR0_FMASK <- 0x0108bc00 CB_COLOR0_FMASK_SLICE <- TILE_MAX = 0x08fff CB_COLOR0_CLEAR_WORD0 <- 0 CB_COLOR0_CLEAR_WORD1 <- 0 CB_COLOR0_DCC_BASE <- 0 SET_CONTEXT_REG: CB_COLOR1_BASE <- 0x01095000 CB_COLOR1_PITCH <- TILE_MAX = 255 FMASK_TILE_MAX = 255 CB_COLOR1_SLICE <- TILE_MAX = 0x08fff CB_COLOR1_VIEW <- SLICE_START = 0 SLICE_MAX = 0 CB_COLOR1_INFO <- ENDIAN = ENDIAN_NONE FORMAT = COLOR_8_8_8_8 LINEAR_GENERAL = 0 NUMBER_TYPE = NUMBER_UNORM COMP_SWAP = SWAP_ALT FAST_CLEAR = 1 COMPRESSION = 1 BLEND_CLAMP = 1 BLEND_BYPASS = 0 SIMPLE_FLOAT = 0 ROUND_MODE = 0 CMASK_IS_LINEAR = 0 BLEND_OPT_DONT_RD_DST = FORCE_OPT_AUTO BLEND_OPT_DISCARD_PIXEL = FORCE_OPT_AUTO FMASK_COMPRESSION_DISABLE = 0 FMASK_COMPRESS_1FRAG_ONLY = 0 DCC_ENABLE = 0 CMASK_ADDR_TYPE = 0 CB_COLOR1_ATTRIB <- TILE_MODE_INDEX = 14 FMASK_TILE_MODE_INDEX = 14 FMASK_BANK_HEIGHT = 0 NUM_SAMPLES = 3 NUM_FRAGMENTS = 3 FORCE_DST_ALPHA_1 = 0 CB_COLOR1_DCC_CONTROL <- OVERWRITE_COMBINER_DISABLE = 1 KEY_CLEAR_ENABLE = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = 0 MIN_COMPRESSED_BLOCK_SIZE = 0 MAX_COMPRESSED_BLOCK_SIZE = 0 COLOR_TRANSFORM = 0 INDEPENDENT_64B_BLOCKS = 0 LOSSY_RGB_PRECISION = 0 LOSSY_ALPHA_PRECISION = 0 CB_COLOR1_CMASK <- 0x010e6000 CB_COLOR1_CMASK_SLICE <- TILE_MAX = 159 CB_COLOR1_FMASK <- 0x010dd000 CB_COLOR1_FMASK_SLICE <- TILE_MAX = 0x08fff CB_COLOR1_CLEAR_WORD0 <- 0 CB_COLOR1_CLEAR_WORD1 <- 0 CB_COLOR1_DCC_BASE <- 0 SET_CONTEXT_REG: CB_COLOR2_BASE <- 0x010e6400 CB_COLOR2_PITCH <- TILE_MAX = 255 FMASK_TILE_MAX = 255 CB_COLOR2_SLICE <- TILE_MAX = 0x08fff CB_COLOR2_VIEW <- SLICE_START = 0 SLICE_MAX = 0 CB_COLOR2_INFO <- ENDIAN = ENDIAN_NONE FORMAT = COLOR_8_8_8_8 LINEAR_GENERAL = 0 NUMBER_TYPE = NUMBER_UNORM COMP_SWAP = SWAP_ALT FAST_CLEAR = 1 COMPRESSION = 1 BLEND_CLAMP = 1 BLEND_BYPASS = 0 SIMPLE_FLOAT = 0 ROUND_MODE = 0 CMASK_IS_LINEAR = 0 BLEND_OPT_DONT_RD_DST = FORCE_OPT_AUTO BLEND_OPT_DISCARD_PIXEL = FORCE_OPT_AUTO FMASK_COMPRESSION_DISABLE = 0 FMASK_COMPRESS_1FRAG_ONLY = 0 DCC_ENABLE = 0 CMASK_ADDR_TYPE = 0 CB_COLOR2_ATTRIB <- TILE_MODE_INDEX = 14 FMASK_TILE_MODE_INDEX = 14 FMASK_BANK_HEIGHT = 0 NUM_SAMPLES = 3 NUM_FRAGMENTS = 3 FORCE_DST_ALPHA_1 = 0 CB_COLOR2_DCC_CONTROL <- OVERWRITE_COMBINER_DISABLE = 1 KEY_CLEAR_ENABLE = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = 0 MIN_COMPRESSED_BLOCK_SIZE = 0 MAX_COMPRESSED_BLOCK_SIZE = 0 COLOR_TRANSFORM = 0 INDEPENDENT_64B_BLOCKS = 0 LOSSY_RGB_PRECISION = 0 LOSSY_ALPHA_PRECISION = 0 CB_COLOR2_CMASK <- 0x01137400 CB_COLOR2_CMASK_SLICE <- TILE_MAX = 159 CB_COLOR2_FMASK <- 0x0112e400 CB_COLOR2_FMASK_SLICE <- TILE_MAX = 0x08fff CB_COLOR2_CLEAR_WORD0 <- 0 CB_COLOR2_CLEAR_WORD1 <- 0 CB_COLOR2_DCC_BASE <- 0 SET_CONTEXT_REG: CB_COLOR3_BASE <- 0x01137800 CB_COLOR3_PITCH <- TILE_MAX = 255 FMASK_TILE_MAX = 255 CB_COLOR3_SLICE <- TILE_MAX = 0x08fff CB_COLOR3_VIEW <- SLICE_START = 0 SLICE_MAX = 0 CB_COLOR3_INFO <- ENDIAN = ENDIAN_NONE FORMAT = COLOR_8_8_8_8 LINEAR_GENERAL = 0 NUMBER_TYPE = NUMBER_UNORM COMP_SWAP = SWAP_ALT FAST_CLEAR = 1 COMPRESSION = 1 BLEND_CLAMP = 1 BLEND_BYPASS = 0 SIMPLE_FLOAT = 0 ROUND_MODE = 0 CMASK_IS_LINEAR = 0 BLEND_OPT_DONT_RD_DST = FORCE_OPT_AUTO BLEND_OPT_DISCARD_PIXEL = FORCE_OPT_AUTO FMASK_COMPRESSION_DISABLE = 0 FMASK_COMPRESS_1FRAG_ONLY = 0 DCC_ENABLE = 0 CMASK_ADDR_TYPE = 0 CB_COLOR3_ATTRIB <- TILE_MODE_INDEX = 14 FMASK_TILE_MODE_INDEX = 14 FMASK_BANK_HEIGHT = 0 NUM_SAMPLES = 3 NUM_FRAGMENTS = 3 FORCE_DST_ALPHA_1 = 0 CB_COLOR3_DCC_CONTROL <- OVERWRITE_COMBINER_DISABLE = 1 KEY_CLEAR_ENABLE = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = 0 MIN_COMPRESSED_BLOCK_SIZE = 0 MAX_COMPRESSED_BLOCK_SIZE = 0 COLOR_TRANSFORM = 0 INDEPENDENT_64B_BLOCKS = 0 LOSSY_RGB_PRECISION = 0 LOSSY_ALPHA_PRECISION = 0 CB_COLOR3_CMASK <- 0x01188800 CB_COLOR3_CMASK_SLICE <- TILE_MAX = 159 CB_COLOR3_FMASK <- 0x0117f800 CB_COLOR3_FMASK_SLICE <- TILE_MAX = 0x08fff CB_COLOR3_CLEAR_WORD0 <- 0 CB_COLOR3_CLEAR_WORD1 <- 0 CB_COLOR3_DCC_BASE <- 0 SET_CONTEXT_REG: CB_COLOR4_INFO <- ENDIAN = ENDIAN_NONE FORMAT = COLOR_INVALID LINEAR_GENERAL = 0 NUMBER_TYPE = NUMBER_UNORM COMP_SWAP = SWAP_STD FAST_CLEAR = 0 COMPRESSION = 0 BLEND_CLAMP = 0 BLEND_BYPASS = 0 SIMPLE_FLOAT = 0 ROUND_MODE = 0 CMASK_IS_LINEAR = 0 BLEND_OPT_DONT_RD_DST = FORCE_OPT_AUTO BLEND_OPT_DISCARD_PIXEL = FORCE_OPT_AUTO FMASK_COMPRESSION_DISABLE = 0 FMASK_COMPRESS_1FRAG_ONLY = 0 DCC_ENABLE = 0 CMASK_ADDR_TYPE = 0 SET_CONTEXT_REG: CB_COLOR5_INFO <- ENDIAN = ENDIAN_NONE FORMAT = COLOR_INVALID LINEAR_GENERAL = 0 NUMBER_TYPE = NUMBER_UNORM COMP_SWAP = SWAP_STD FAST_CLEAR = 0 COMPRESSION = 0 BLEND_CLAMP = 0 BLEND_BYPASS = 0 SIMPLE_FLOAT = 0 ROUND_MODE = 0 CMASK_IS_LINEAR = 0 BLEND_OPT_DONT_RD_DST = FORCE_OPT_AUTO BLEND_OPT_DISCARD_PIXEL = FORCE_OPT_AUTO FMASK_COMPRESSION_DISABLE = 0 FMASK_COMPRESS_1FRAG_ONLY = 0 DCC_ENABLE = 0 CMASK_ADDR_TYPE = 0 SET_CONTEXT_REG: CB_COLOR6_INFO <- ENDIAN = ENDIAN_NONE FORMAT = COLOR_INVALID LINEAR_GENERAL = 0 NUMBER_TYPE = NUMBER_UNORM COMP_SWAP = SWAP_STD FAST_CLEAR = 0 COMPRESSION = 0 BLEND_CLAMP = 0 BLEND_BYPASS = 0 SIMPLE_FLOAT = 0 ROUND_MODE = 0 CMASK_IS_LINEAR = 0 BLEND_OPT_DONT_RD_DST = FORCE_OPT_AUTO BLEND_OPT_DISCARD_PIXEL = FORCE_OPT_AUTO FMASK_COMPRESSION_DISABLE = 0 FMASK_COMPRESS_1FRAG_ONLY = 0 DCC_ENABLE = 0 CMASK_ADDR_TYPE = 0 SET_CONTEXT_REG: CB_COLOR7_INFO <- ENDIAN = ENDIAN_NONE FORMAT = COLOR_INVALID LINEAR_GENERAL = 0 NUMBER_TYPE = NUMBER_UNORM COMP_SWAP = SWAP_STD FAST_CLEAR = 0 COMPRESSION = 0 BLEND_CLAMP = 0 BLEND_BYPASS = 0 SIMPLE_FLOAT = 0 ROUND_MODE = 0 CMASK_IS_LINEAR = 0 BLEND_OPT_DONT_RD_DST = FORCE_OPT_AUTO BLEND_OPT_DISCARD_PIXEL = FORCE_OPT_AUTO FMASK_COMPRESSION_DISABLE = 0 FMASK_COMPRESS_1FRAG_ONLY = 0 DCC_ENABLE = 0 CMASK_ADDR_TYPE = 0 SET_CONTEXT_REG: DB_DEPTH_VIEW <- SLICE_START = 0 SLICE_MAX = 0 Z_READ_ONLY = 0 STENCIL_READ_ONLY = 0 SET_CONTEXT_REG: DB_HTILE_DATA_BASE <- 0x01137450 SET_CONTEXT_REG: DB_DEPTH_INFO <- ADDR5_SWIZZLE_MASK = 1 ARRAY_MODE = ARRAY_2D_TILED_THIN1 PIPE_CONFIG = X_ADDR_SURF_P8_32X32_16X16 BANK_WIDTH = ADDR_SURF_BANK_WIDTH_1 BANK_HEIGHT = ADDR_SURF_BANK_HEIGHT_4 MACRO_TILE_ASPECT = ADDR_SURF_MACRO_ASPECT_4 NUM_BANKS = ADDR_SURF_16_BANK DB_Z_INFO <- FORMAT = Z_24 NUM_SAMPLES = 3 TILE_SPLIT = ADDR_SURF_TILE_SPLIT_256B TILE_MODE_INDEX = 0 DECOMPRESS_ON_N_ZPLANES = 0 ALLOW_EXPCLEAR = 1 READ_SIZE = 0 TILE_SURFACE_ENABLE = 1 CLEAR_DISALLOWED = 0 ZRANGE_PRECISION = 1 DB_STENCIL_INFO <- FORMAT = STENCIL_8 TILE_SPLIT = ADDR_SURF_TILE_SPLIT_256B TILE_MODE_INDEX = 0 ALLOW_EXPCLEAR = 0 TILE_STENCIL_DISABLE = 1 CLEAR_DISALLOWED = 0 DB_Z_READ_BASE <- 0x01188a00 DB_STENCIL_READ_BASE <- 0x011d0a00 DB_Z_WRITE_BASE <- 0x01188a00 DB_STENCIL_WRITE_BASE <- 0x011d0a00 DB_DEPTH_SIZE <- PITCH_TILE_MAX = 255 HEIGHT_TILE_MAX = 143 DB_DEPTH_SLICE <- SLICE_TILE_MAX = 0x08fff SET_CONTEXT_REG: DB_HTILE_SURFACE <- LINEAR = 0 FULL_CACHE = 1 HTILE_USES_PRELOAD_WIN = 0 PRELOAD = 0 PREFETCH_WIDTH = 0 PREFETCH_HEIGHT = 0 DST_OUTSIDE_ZERO_TO_ONE = 0 TC_COMPATIBLE = 0 SET_CONTEXT_REG: DB_DEPTH_CLEAR <- 1.0f SET_CONTEXT_REG: PA_SU_POLY_OFFSET_DB_FMT_CNTL <- POLY_OFFSET_NEG_NUM_DB_BITS = 232 POLY_OFFSET_DB_IS_FLOAT_FMT = 0 SET_CONTEXT_REG: PA_SC_WINDOW_SCISSOR_BR <- BR_X = 1920 BR_Y = 1080 SET_CONTEXT_REG: PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 <- S0_X = 14 S0_Y = 11 S1_X = 3 S1_Y = 12 S2_X = 15 S2_Y = 5 S3_X = 10 S3_Y = 14 PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1 <- S4_X = 6 S4_Y = 0 S5_X = 0 S5_Y = 0 S6_X = 11 S6_Y = 3 S7_X = 4 S7_Y = 4 PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2 <- S8_X = 0 S8_Y = 0 S9_X = 0 S9_Y = 0 S10_X = 0 S10_Y = 0 S11_X = 0 S11_Y = 0 PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3 <- S12_X = 0 S12_Y = 0 S13_X = 0 S13_Y = 0 S14_X = 0 S14_Y = 0 S15_X = 0 S15_Y = 0 PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 <- S0_X = 14 S0_Y = 11 S1_X = 3 S1_Y = 12 S2_X = 15 S2_Y = 5 S3_X = 10 S3_Y = 14 PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1 <- S4_X = 6 S4_Y = 0 S5_X = 0 S5_Y = 0 S6_X = 11 S6_Y = 3 S7_X = 4 S7_Y = 4 PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2 <- S8_X = 0 S8_Y = 0 S9_X = 0 S9_Y = 0 S10_X = 0 S10_Y = 0 S11_X = 0 S11_Y = 0 PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3 <- S12_X = 0 S12_Y = 0 S13_X = 0 S13_Y = 0 S14_X = 0 S14_Y = 0 S15_X = 0 S15_Y = 0 PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 <- S0_X = 14 S0_Y = 11 S1_X = 3 S1_Y = 12 S2_X = 15 S2_Y = 5 S3_X = 10 S3_Y = 14 PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1 <- S4_X = 6 S4_Y = 0 S5_X = 0 S5_Y = 0 S6_X = 11 S6_Y = 3 S7_X = 4 S7_Y = 4 PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2 <- S8_X = 0 S8_Y = 0 S9_X = 0 S9_Y = 0 S10_X = 0 S10_Y = 0 S11_X = 0 S11_Y = 0 PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3 <- S12_X = 0 S12_Y = 0 S13_X = 0 S13_Y = 0 S14_X = 0 S14_Y = 0 S15_X = 0 S15_Y = 0 PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 <- S0_X = 14 S0_Y = 11 S1_X = 3 S1_Y = 12 S2_X = 15 S2_Y = 5 S3_X = 10 S3_Y = 14 PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1 <- S4_X = 6 S4_Y = 0 S5_X = 0 S5_Y = 0 S6_X = 11 S6_Y = 3 S7_X = 4 S7_Y = 4 SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 1 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 0 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 0 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: PA_SC_LINE_CNTL <- EXPAND_LINE_WIDTH = 1 LAST_PIXEL = 1 PERPENDICULAR_ENDCAP_ENA = 0 DX10_DIAMOND_TEST_ENA = 0 PA_SC_AA_CONFIG <- MSAA_NUM_SAMPLES = 3 AA_MASK_CENTROID_DTMN = 0 MAX_SAMPLE_DIST = 8 MSAA_EXPOSED_SAMPLES = 3 DETAIL_TO_EXPOSED_MODE = 0 SET_CONTEXT_REG: DB_EQAA <- MAX_ANCHOR_SAMPLES = 3 PS_ITER_SAMPLES = 0 MASK_EXPORT_NUM_SAMPLES = 3 ALPHA_TO_MASK_NUM_SAMPLES = 3 HIGH_QUALITY_INTERSECTIONS = 1 INCOHERENT_EQAA_READS = 0 INTERPOLATE_COMP_Z = 0 INTERPOLATE_SRC_Z = 0 STATIC_ANCHOR_ASSOCIATIONS = 1 ALPHA_TO_MASK_EQAA_DISABLE = 0 OVERRASTERIZATION_AMOUNT = 0 ENABLE_POSTZ_OVERRASTERIZATION = 0 SET_CONTEXT_REG: PA_SC_MODE_CNTL_1 <- WALK_SIZE = 0 WALK_ALIGNMENT = 0 WALK_ALIGN8_PRIM_FITS_ST = 0 WALK_FENCE_ENABLE = 0 WALK_FENCE_SIZE = 0 SUPERTILE_WALK_ORDER_ENABLE = 0 TILE_WALK_ORDER_ENABLE = 0 TILE_COVER_DISABLE = 0 TILE_COVER_NO_SCISSOR = 0 ZMM_LINE_EXTENT = 0 ZMM_LINE_OFFSET = 0 ZMM_RECT_EXTENT = 0 KILL_PIX_POST_HI_Z = 0 KILL_PIX_POST_DETAIL_MASK = 0 PS_ITER_SAMPLE = 0 MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE = 0 MULTI_GPU_SUPERTILE_ENABLE = 0 GPU_ID_OVERRIDE_ENABLE = 0 GPU_ID_OVERRIDE = 0 MULTI_GPU_PRIM_DISCARD_ENABLE = 0 FORCE_EOV_CNTDWN_ENABLE = 0 FORCE_EOV_REZ_ENABLE = 0 OUT_OF_ORDER_PRIMITIVE_ENABLE = 0 OUT_OF_ORDER_WATER_MARK = 0 SET_CONTEXT_REG: PA_SC_AA_MASK_X0Y0_X1Y0 <- AA_MASK_X0Y0 = 0xffff AA_MASK_X1Y0 = 0xffff PA_SC_AA_MASK_X0Y1_X1Y1 <- AA_MASK_X0Y1 = 0xffff AA_MASK_X1Y1 = 0xffff SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: CB_BLEND_RED <- 0 CB_BLEND_GREEN <- 0 CB_BLEND_BLUE <- 0 CB_BLEND_ALPHA <- 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_CONTEXT_REG: PA_CL_UCP_0_X <- 0 PA_CL_UCP_0_Y <- 0 PA_CL_UCP_0_Z <- 0 PA_CL_UCP_0_W <- 0 PA_CL_UCP_1_X <- 0 PA_CL_UCP_1_Y <- 0 PA_CL_UCP_1_Z <- 0 PA_CL_UCP_1_W <- 0 PA_CL_UCP_2_X <- 0 PA_CL_UCP_2_Y <- 0 PA_CL_UCP_2_Z <- 0 PA_CL_UCP_2_W <- 0 PA_CL_UCP_3_X <- 0 PA_CL_UCP_3_Y <- 0 PA_CL_UCP_3_Z <- 0 PA_CL_UCP_3_W <- 0 PA_CL_UCP_4_X <- 0 PA_CL_UCP_4_Y <- 0 PA_CL_UCP_4_Z <- 0 PA_CL_UCP_4_W <- 0 PA_CL_UCP_5_X <- 0 PA_CL_UCP_5_Y <- 0 PA_CL_UCP_5_Z <- 0 PA_CL_UCP_5_W <- 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_0 <- 0x56e82300 SPI_SHADER_USER_DATA_VS_1 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e82100 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_6 <- 0x017d4700 SPI_SHADER_USER_DATA_VS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_4 <- 0x017d4c00 SPI_SHADER_USER_DATA_VS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_0 <- 0x017d5000 SPI_SHADER_USER_DATA_PS_1 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e82400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x56e82600 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x56e81900 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_GS_0 <- 0x017d5a00 SPI_SHADER_USER_DATA_GS_1 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_GS_2 <- 0x017d5800 SPI_SHADER_USER_DATA_GS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_GS_6 <- 0x017d5b00 SPI_SHADER_USER_DATA_GS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_GS_4 <- 0x017d6000 SPI_SHADER_USER_DATA_GS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_HS_0 <- 0x017d6400 SPI_SHADER_USER_DATA_HS_1 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_HS_2 <- 0x017d6200 SPI_SHADER_USER_DATA_HS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_HS_6 <- 0x017d6500 SPI_SHADER_USER_DATA_HS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_HS_4 <- 0x017d6a00 SPI_SHADER_USER_DATA_HS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e82b00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: PA_SC_VPORT_SCISSOR_0_TL <- TL_X = 0 TL_Y = 0 WINDOW_OFFSET_DISABLE = 1 PA_SC_VPORT_SCISSOR_0_BR <- BR_X = 1920 BR_Y = 1080 SET_CONTEXT_REG: PA_CL_VPORT_XSCALE <- 1.0f PA_CL_VPORT_XOFFSET <- 0 PA_CL_VPORT_YSCALE <- 1.0f PA_CL_VPORT_YOFFSET <- 0 PA_CL_VPORT_ZSCALE <- 1.0f PA_CL_VPORT_ZOFFSET <- 0 SET_CONTEXT_REG: DB_STENCILREFMASK <- STENCILTESTVAL = 0 STENCILMASK = 0 STENCILWRITEMASK = 0 STENCILOPVAL = 1 DB_STENCILREFMASK_BF <- STENCILTESTVAL_BF = 0 STENCILMASK_BF = 0 STENCILWRITEMASK_BF = 0 STENCILOPVAL_BF = 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 1 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 1 PERSP_CENTER_ENA = 0 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 1 PERSP_CENTER_ENA = 0 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: DB_ALPHA_TO_MASK <- ALPHA_TO_MASK_ENABLE = 0 ALPHA_TO_MASK_OFFSET0 = 2 ALPHA_TO_MASK_OFFSET1 = 2 ALPHA_TO_MASK_OFFSET2 = 2 ALPHA_TO_MASK_OFFSET3 = 2 OFFSET_ROUND = 0 SET_CONTEXT_REG: CB_BLEND0_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND1_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND2_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND3_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND4_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND5_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND6_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND7_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 SET_CONTEXT_REG: CB_COLOR_CONTROL <- DEGAMMA_ENABLE = 0 MODE = CB_DISABLE ROP3 = X_0XCC SET_CONTEXT_REG: SPI_INTERP_CONTROL_0 <- FLAT_SHADE_ENA = 1 PNT_SPRITE_ENA = 1 PNT_SPRITE_OVRD_X = SPI_PNT_SPRITE_SEL_S PNT_SPRITE_OVRD_Y = SPI_PNT_SPRITE_SEL_T PNT_SPRITE_OVRD_Z = SPI_PNT_SPRITE_SEL_0 PNT_SPRITE_OVRD_W = SPI_PNT_SPRITE_SEL_1 PNT_SPRITE_TOP_1 = 0 SET_CONTEXT_REG: PA_SU_POINT_SIZE <- HEIGHT = 0 WIDTH = 0 PA_SU_POINT_MINMAX <- MIN_SIZE = 0 MAX_SIZE = 0 PA_SU_LINE_CNTL <- WIDTH = 0 SET_CONTEXT_REG: PA_SC_MODE_CNTL_0 <- MSAA_ENABLE = 0 VPORT_SCISSOR_ENABLE = 0 LINE_STIPPLE_ENABLE = 0 SEND_UNLIT_STILES_TO_PKR = 0 SET_CONTEXT_REG: PA_SU_VTX_CNTL <- PIX_CENTER = 1 ROUND_MODE = X_TRUNCATE QUANT_MODE = X_16_8_FIXED_POINT_1_256TH SET_CONTEXT_REG: PA_SU_POLY_OFFSET_CLAMP <- 0 SET_CONTEXT_REG: PA_SU_SC_MODE_CNTL <- CULL_FRONT = 0 CULL_BACK = 0 FACE = 1 POLY_MODE = X_DISABLE_POLY_MODE POLYMODE_FRONT_PTYPE = X_DRAW_TRIANGLES POLYMODE_BACK_PTYPE = X_DRAW_TRIANGLES POLY_OFFSET_FRONT_ENABLE = 0 POLY_OFFSET_BACK_ENABLE = 0 POLY_OFFSET_PARA_ENABLE = 0 VTX_WINDOW_OFFSET_ENABLE = 0 PROVOKING_VTX_LAST = 1 PERSP_CORR_DIS = 0 MULTI_PRIM_IB_ENA = 0 SET_CONTEXT_REG: DB_DEPTH_CONTROL <- STENCIL_ENABLE = 0 Z_ENABLE = 1 Z_WRITE_ENABLE = 1 DEPTH_BOUNDS_ENABLE = 0 ZFUNC = FRAG_ALWAYS BACKFACE_ENABLE = 0 STENCILFUNC = REF_NEVER STENCILFUNC_BF = REF_NEVER ENABLE_COLOR_WRITES_ON_DEPTH_FAIL = 0 DISABLE_COLOR_WRITES_ON_DEPTH_PASS = 0 SET_CONTEXT_REG: DB_STENCIL_CONTROL <- STENCILFAIL = STENCIL_KEEP STENCILZPASS = STENCIL_KEEP STENCILZFAIL = STENCIL_KEEP STENCILFAIL_BF = STENCIL_KEEP STENCILZPASS_BF = STENCIL_KEEP STENCILZFAIL_BF = STENCIL_KEEP SET_CONTEXT_REG: PA_SU_POLY_OFFSET_FRONT_SCALE <- 64.0f PA_SU_POLY_OFFSET_FRONT_OFFSET <- 80.0f PA_SU_POLY_OFFSET_BACK_SCALE <- 64.0f PA_SU_POLY_OFFSET_BACK_OFFSET <- 80.0f SET_CONTEXT_REG: VGT_SHADER_STAGES_EN <- LS_EN = LS_STAGE_OFF HS_EN = 0 ES_EN = ES_STAGE_OFF GS_EN = 0 VS_EN = VS_STAGE_REAL DYNAMIC_HS = 0 DISPATCH_DRAW_EN = 0 DIS_DEALLOC_ACCUM_0 = 0 DIS_DEALLOC_ACCUM_1 = 0 VS_WAVE_ID_EN = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 0 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x01002240 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 2 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 0 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 1 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x011e2a00 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 SET_CONTEXT_REG: SPI_TMPRING_SIZE <- WAVES = 1024 WAVESIZE = 0 DRAW_PREAMBLE: VGT_PRIMITIVE_TYPE <- PRIM_TYPE = DI_PT_RECTLIST IA_MULTI_VGT_PARAM <- PRIMGROUP_SIZE = 127 PARTIAL_VS_WAVE_ON = 0 SWITCH_ON_EOP = 0 PARTIAL_ES_WAVE_ON = 0 SWITCH_ON_EOI = 0 WD_SWITCH_ON_EOP = 0 MAX_PRIMGRP_IN_WAVE = 2 VGT_LS_HS_CONFIG <- NUM_PATCHES = 0 HS_NUM_INPUT_CP = 0 HS_NUM_OUTPUT_CP = 0 SET_CONTEXT_REG: VGT_GS_OUT_PRIM_TYPE <- OUTPRIM_TYPE = OUTPRIM_TYPE_TRISTRIP OUTPRIM_TYPE_1 = 0 OUTPRIM_TYPE_2 = 0 OUTPRIM_TYPE_3 = 0 UNIQUE_TYPE_PER_STREAM = 0 SET_CONTEXT_REG: VGT_MULTI_PRIM_IB_RESET_EN <- RESET_EN = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_AUTO: VGT_NUM_INDICES <- 3 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000002 NOP: Trace point ID: 2 This trace point was reached by the CP. SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 0 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 1 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_0 <- 0x56e83100 SPI_SHADER_USER_DATA_VS_1 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e82f00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e83200 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x56e83400 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x56e83900 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e83b00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: PA_CL_VPORT_XSCALE <- 960.0f PA_CL_VPORT_XOFFSET <- 960.0f PA_CL_VPORT_YSCALE <- 540.0f PA_CL_VPORT_YOFFSET <- 540.0f PA_CL_VPORT_ZSCALE <- 0.5f PA_CL_VPORT_ZOFFSET <- 0.5f SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: DB_ALPHA_TO_MASK <- ALPHA_TO_MASK_ENABLE = 0 ALPHA_TO_MASK_OFFSET0 = 2 ALPHA_TO_MASK_OFFSET1 = 2 ALPHA_TO_MASK_OFFSET2 = 2 ALPHA_TO_MASK_OFFSET3 = 2 OFFSET_ROUND = 0 SET_CONTEXT_REG: CB_BLEND0_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND1_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND2_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND3_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND4_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND5_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND6_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND7_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 SET_CONTEXT_REG: CB_COLOR_CONTROL <- DEGAMMA_ENABLE = 0 MODE = CB_NORMAL ROP3 = X_0XCC SET_CONTEXT_REG: SPI_INTERP_CONTROL_0 <- FLAT_SHADE_ENA = 1 PNT_SPRITE_ENA = 1 PNT_SPRITE_OVRD_X = SPI_PNT_SPRITE_SEL_S PNT_SPRITE_OVRD_Y = SPI_PNT_SPRITE_SEL_T PNT_SPRITE_OVRD_Z = SPI_PNT_SPRITE_SEL_0 PNT_SPRITE_OVRD_W = SPI_PNT_SPRITE_SEL_1 PNT_SPRITE_TOP_1 = 1 SET_CONTEXT_REG: PA_SU_POINT_SIZE <- HEIGHT = 8 WIDTH = 8 PA_SU_POINT_MINMAX <- MIN_SIZE = 8 MAX_SIZE = 8 PA_SU_LINE_CNTL <- WIDTH = 8 SET_CONTEXT_REG: PA_SC_MODE_CNTL_0 <- MSAA_ENABLE = 1 VPORT_SCISSOR_ENABLE = 0 LINE_STIPPLE_ENABLE = 0 SEND_UNLIT_STILES_TO_PKR = 0 SET_CONTEXT_REG: PA_SU_VTX_CNTL <- PIX_CENTER = 1 ROUND_MODE = X_TRUNCATE QUANT_MODE = X_16_8_FIXED_POINT_1_256TH SET_CONTEXT_REG: PA_SU_POLY_OFFSET_CLAMP <- 0 SET_CONTEXT_REG: PA_SU_SC_MODE_CNTL <- CULL_FRONT = 0 CULL_BACK = 0 FACE = 1 POLY_MODE = X_DISABLE_POLY_MODE POLYMODE_FRONT_PTYPE = X_DRAW_TRIANGLES POLYMODE_BACK_PTYPE = X_DRAW_TRIANGLES POLY_OFFSET_FRONT_ENABLE = 0 POLY_OFFSET_BACK_ENABLE = 0 POLY_OFFSET_PARA_ENABLE = 0 VTX_WINDOW_OFFSET_ENABLE = 0 PROVOKING_VTX_LAST = 1 PERSP_CORR_DIS = 0 MULTI_PRIM_IB_ENA = 0 SET_CONTEXT_REG: DB_DEPTH_CONTROL <- STENCIL_ENABLE = 0 Z_ENABLE = 1 Z_WRITE_ENABLE = 1 DEPTH_BOUNDS_ENABLE = 0 ZFUNC = FRAG_LEQUAL BACKFACE_ENABLE = 0 STENCILFUNC = REF_NEVER STENCILFUNC_BF = REF_NEVER ENABLE_COLOR_WRITES_ON_DEPTH_FAIL = 0 DISABLE_COLOR_WRITES_ON_DEPTH_PASS = 0 SET_CONTEXT_REG: DB_STENCIL_CONTROL <- STENCILFAIL = STENCIL_KEEP STENCILZPASS = STENCIL_KEEP STENCILZFAIL = STENCIL_KEEP STENCILFAIL_BF = STENCIL_KEEP STENCILZPASS_BF = STENCIL_KEEP STENCILZFAIL_BF = STENCIL_KEEP SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 2 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x011888f0 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 6 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 0 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 3 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_32_ABGR SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x01188900 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 6 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DRAW_PREAMBLE: VGT_PRIMITIVE_TYPE <- PRIM_TYPE = DI_PT_TRILIST IA_MULTI_VGT_PARAM <- PRIMGROUP_SIZE = 127 PARTIAL_VS_WAVE_ON = 0 SWITCH_ON_EOP = 0 PARTIAL_ES_WAVE_ON = 0 SWITCH_ON_EOI = 0 WD_SWITCH_ON_EOP = 0 MAX_PRIMGRP_IN_WAVE = 2 VGT_LS_HS_CONFIG <- NUM_PATCHES = 0 HS_NUM_INPUT_CP = 0 HS_NUM_OUTPUT_CP = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1962 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000003 NOP: Trace point ID: 3 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e83f00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e84100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e84300 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 330 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000004 NOP: Trace point ID: 4 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e84700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e84900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e84b00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 42 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000005 NOP: Trace point ID: 5 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e84f00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e85100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x56e85300 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x56e85800 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e85a00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2688 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000006 NOP: Trace point ID: 6 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e85e00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e86000 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e86200 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 444 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000007 NOP: Trace point ID: 7 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e86600 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e86800 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e86a00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 60 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000008 NOP: Trace point ID: 8 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e86e00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e87000 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x56e87200 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x56e87700 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e87900 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 3342 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000009 NOP: Trace point ID: 9 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e87d00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e87f00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e88100 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 156 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000000a NOP: Trace point ID: 10 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e88500 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e88700 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x56e88900 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x56e88e00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e89000 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 19344 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000000b NOP: Trace point ID: 11 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e89400 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e89600 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e89800 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2820 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000000c NOP: Trace point ID: 12 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e89c00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e89e00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e8a000 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1182 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000000d NOP: Trace point ID: 13 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e8a400 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e8a600 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x56e8a800 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x56e8ad00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e8af00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 14418 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000000e NOP: Trace point ID: 14 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e8b300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e8b500 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e8b700 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2100 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000000f NOP: Trace point ID: 15 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e8bb00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e8bd00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e8bf00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 7140 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000010 NOP: Trace point ID: 16 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e8c300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e8c500 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e8c700 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 5202 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000011 NOP: Trace point ID: 17 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e8cb00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e8cd00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e8cf00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 30 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000012 NOP: Trace point ID: 18 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e8d300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e8d500 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e8d700 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1686 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000013 NOP: Trace point ID: 19 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e8db00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e8dd00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e8df00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 36 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000014 NOP: Trace point ID: 20 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e8e300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e8e500 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x56e8e700 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x56e8ec00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e8ee00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 19350 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000015 NOP: Trace point ID: 21 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e8f200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e8f400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e8f600 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2832 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000016 NOP: Trace point ID: 22 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e8fa00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e8fc00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e8fe00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 12072 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000017 NOP: Trace point ID: 23 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e90200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e90400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e90600 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 10662 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000018 NOP: Trace point ID: 24 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e90a00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e90c00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e90e00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 162 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000019 NOP: Trace point ID: 25 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e91200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e91400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e91600 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 8382 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000001a NOP: Trace point ID: 26 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e91a00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e91c00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e91e00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1242 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000001b NOP: Trace point ID: 27 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e92200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e92400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x56e92600 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x56e92b00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e92d00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 19332 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000001c NOP: Trace point ID: 28 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e93100 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e93300 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e93500 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2832 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000001d NOP: Trace point ID: 29 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e93900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e93b00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e93d00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 12078 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000001e NOP: Trace point ID: 30 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e94100 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e94300 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e94500 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 10662 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000001f NOP: Trace point ID: 31 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e94900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e94b00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e94d00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 180 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000020 NOP: Trace point ID: 32 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e95100 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e95300 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e95500 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 8352 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000021 NOP: Trace point ID: 33 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e95900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e95b00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e95d00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1230 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000022 NOP: Trace point ID: 34 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x56e96100 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x56e96300 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x56e96500 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x56e96a00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x56e96c00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 5058 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000023 NOP: Trace point ID: 35 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1bd000 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1bd200 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1bd400 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 630 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000024 NOP: Trace point ID: 36 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1bd800 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1bda00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1bdc00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 4464 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000025 NOP: Trace point ID: 37 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1be000 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1be200 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1be400 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 4710 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000026 NOP: Trace point ID: 38 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1be800 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1bea00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1bec00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 114 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000027 NOP: Trace point ID: 39 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1bf000 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1bf200 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1bf400 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 6222 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000028 NOP: Trace point ID: 40 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1bf800 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1bfa00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1bfc00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 912 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000029 NOP: Trace point ID: 41 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1c0000 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1c0200 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1c0400 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1c0900 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1c0b00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1236 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000002a NOP: Trace point ID: 42 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1c0f00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1c1100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1c1300 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 84 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000002b NOP: Trace point ID: 43 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1c1700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1c1900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1c1b00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1c2000 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1c2200 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 4848 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000002c NOP: Trace point ID: 44 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1c2600 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1c2800 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1c2a00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 360 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000002d NOP: Trace point ID: 45 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1c2e00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1c3000 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1c3200 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 6 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000002e NOP: Trace point ID: 46 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1c3600 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1c3800 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1c3a00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1c3f00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1c4100 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 5046 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000002f NOP: Trace point ID: 47 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1c4500 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1c4700 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1c4900 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 738 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000030 NOP: Trace point ID: 48 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1c4d00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1c4f00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1c5100 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 180 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000031 NOP: Trace point ID: 49 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1c5500 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1c5700 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1c5900 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1c5e00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1c6000 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2136 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000032 NOP: Trace point ID: 50 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1c6400 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1c6600 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1c6800 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1284 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000033 NOP: Trace point ID: 51 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1c6c00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1c6e00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1c7000 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000034 NOP: Trace point ID: 52 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1c7400 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1c7600 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1c7800 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 942 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000035 NOP: Trace point ID: 53 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1c7c00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1c7e00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1c8000 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1140 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000036 NOP: Trace point ID: 54 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1c8400 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1c8600 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1c8800 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1074 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000037 NOP: Trace point ID: 55 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1c8c00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1c8e00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1c9000 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 648 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000038 NOP: Trace point ID: 56 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1c9400 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1c9600 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1c9800 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 6 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000039 NOP: Trace point ID: 57 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1c9c00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1c9e00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1ca000 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 162 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000003a NOP: Trace point ID: 58 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1ca400 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1ca600 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1ca800 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1cad00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1caf00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2124 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000003b NOP: Trace point ID: 59 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1cb300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1cb500 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1cb700 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1290 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000003c NOP: Trace point ID: 60 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1cbb00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1cbd00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1cbf00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1518 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000003d NOP: Trace point ID: 61 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1cc300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1cc500 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1cc700 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 954 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000003e NOP: Trace point ID: 62 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1ccb00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1ccd00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1ccf00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1140 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000003f NOP: Trace point ID: 63 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1cd300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1cd500 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1cd700 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1062 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000040 NOP: Trace point ID: 64 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1cdb00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1cdd00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1cdf00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 648 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000041 NOP: Trace point ID: 65 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1ce300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1ce500 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1ce700 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 6 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000042 NOP: Trace point ID: 66 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1ceb00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1ced00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1cef00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 162 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000043 NOP: Trace point ID: 67 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1cf300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1cf500 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1cf700 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1cfc00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1cfe00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 8454 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000044 NOP: Trace point ID: 68 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1d0200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1d0400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1d0600 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 5202 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000045 NOP: Trace point ID: 69 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1d0a00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1d0c00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1d0e00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 6012 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000046 NOP: Trace point ID: 70 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1d1200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1d1400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1d1600 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 3042 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000047 NOP: Trace point ID: 71 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1d1a00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1d1c00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1d1e00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2346 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000048 NOP: Trace point ID: 72 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1d2200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1d2400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1d2600 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1926 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000049 NOP: Trace point ID: 73 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1d2a00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1d2c00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1d2e00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1044 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000004a NOP: Trace point ID: 74 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1d3200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1d3400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1d3600 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 6 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000004b NOP: Trace point ID: 75 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1d3a00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1d3c00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1d3e00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 5556 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000004c NOP: Trace point ID: 76 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1d4200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1d4400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1d4600 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 3438 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000004d NOP: Trace point ID: 77 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1d4a00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1d4c00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1d4e00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 3978 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000004e NOP: Trace point ID: 78 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1d5200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1d5400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1d5600 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1920 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000004f NOP: Trace point ID: 79 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1d5a00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1d5c00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1d5e00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1530 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000050 NOP: Trace point ID: 80 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1d6200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1d6400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1d6600 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1242 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000051 NOP: Trace point ID: 81 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1d6a00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1d6c00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1d6e00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 690 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000052 NOP: Trace point ID: 82 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1d7200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1d7400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1d7600 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1d7b00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1d7d00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 7740 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000053 NOP: Trace point ID: 83 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1d8100 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1d8300 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1d8500 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 12774 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000054 NOP: Trace point ID: 84 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1d8900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1d8b00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1d8d00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 3066 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000055 NOP: Trace point ID: 85 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1d9100 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1d9300 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1d9500 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 8730 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000056 NOP: Trace point ID: 86 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1d9900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1d9b00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1d9d00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 11406 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000057 NOP: Trace point ID: 87 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1da100 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1da300 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1da500 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 5172 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000058 NOP: Trace point ID: 88 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1da900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1dab00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1dad00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 390 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000059 NOP: Trace point ID: 89 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1db100 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1db300 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1db500 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 294 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000005a NOP: Trace point ID: 90 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1db900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1dbb00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1dbd00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1dc200 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1dc400 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 942 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000005b NOP: Trace point ID: 91 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1dc800 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1dca00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1dcc00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 246 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000005c NOP: Trace point ID: 92 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1dd000 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1dd200 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1dd400 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 444 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000005d NOP: Trace point ID: 93 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1dd800 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1dda00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1ddc00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 456 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000005e NOP: Trace point ID: 94 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1de000 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1de200 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1de400 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 336 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000005f NOP: Trace point ID: 95 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1de800 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1dea00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1dec00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 6 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000060 NOP: Trace point ID: 96 This trace point was reached by the CP. SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 0 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 0 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1df500 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1df700 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1df900 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1dfe00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1e0000 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: SPI_INTERP_CONTROL_0 <- FLAT_SHADE_ENA = 1 PNT_SPRITE_ENA = 1 PNT_SPRITE_OVRD_X = SPI_PNT_SPRITE_SEL_S PNT_SPRITE_OVRD_Y = SPI_PNT_SPRITE_SEL_T PNT_SPRITE_OVRD_Z = SPI_PNT_SPRITE_SEL_0 PNT_SPRITE_OVRD_W = SPI_PNT_SPRITE_SEL_1 PNT_SPRITE_TOP_1 = 1 SET_CONTEXT_REG: PA_SU_POINT_SIZE <- HEIGHT = 8 WIDTH = 8 PA_SU_POINT_MINMAX <- MIN_SIZE = 8 MAX_SIZE = 8 PA_SU_LINE_CNTL <- WIDTH = 8 SET_CONTEXT_REG: PA_SC_MODE_CNTL_0 <- MSAA_ENABLE = 1 VPORT_SCISSOR_ENABLE = 0 LINE_STIPPLE_ENABLE = 0 SEND_UNLIT_STILES_TO_PKR = 0 SET_CONTEXT_REG: PA_SU_VTX_CNTL <- PIX_CENTER = 1 ROUND_MODE = X_TRUNCATE QUANT_MODE = X_16_8_FIXED_POINT_1_256TH SET_CONTEXT_REG: PA_SU_POLY_OFFSET_CLAMP <- 0 SET_CONTEXT_REG: PA_SU_SC_MODE_CNTL <- CULL_FRONT = 0 CULL_BACK = 1 FACE = 1 POLY_MODE = X_DISABLE_POLY_MODE POLYMODE_FRONT_PTYPE = X_DRAW_TRIANGLES POLYMODE_BACK_PTYPE = X_DRAW_TRIANGLES POLY_OFFSET_FRONT_ENABLE = 0 POLY_OFFSET_BACK_ENABLE = 0 POLY_OFFSET_PARA_ENABLE = 0 VTX_WINDOW_OFFSET_ENABLE = 0 PROVOKING_VTX_LAST = 1 PERSP_CORR_DIS = 0 MULTI_PRIM_IB_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 4 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x01033b10 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 8 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 5 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x01033b20 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 4 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 183 VGT_DMA_BASE <- 0x5936be28 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 183 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000061 NOP: Trace point ID: 97 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1e0900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1e0b00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1e0d00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 312 VGT_DMA_BASE <- 0x4e3e1776 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 312 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000062 NOP: Trace point ID: 98 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1e1600 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1e1800 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1e1a00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 456 VGT_DMA_BASE <- 0x4dc37180 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 456 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000063 NOP: Trace point ID: 99 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1e2300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1e2500 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1e2700 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1e2c00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1e2e00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 1116 VGT_DMA_BASE <- 0x4dcaa6d6 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 861 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000064 NOP: Trace point ID: 100 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1e3700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1e3900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1e3b00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 2 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 255 VGT_DMA_BASE <- 0x4dcaad90 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 255 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000065 NOP: Trace point ID: 101 This trace point was reached by the CP. SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 1 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 0 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1e4400 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1e4600 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1e4800 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1e4d00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1e4f00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_5 <- OFFSET = 5 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 1 POS_Y_FLOAT_ENA = 1 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 1 POS_Y_FLOAT_ENA = 1 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 5 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x01033a60 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 8 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 6 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x01033a70 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 4 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 9 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 255 VGT_DMA_BASE <- 0x4dcaad90 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 255 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000066 NOP: Trace point ID: 102 This trace point was reached by the CP. SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 0 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 0 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1e5800 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1e5a00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1e5c00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1e6100 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1e6300 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 4 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x01033b10 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 8 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 5 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x01033b20 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 4 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 2 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 1845 VGT_DMA_BASE <- 0x4e9c391a VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1431 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000067 NOP: Trace point ID: 103 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1e6c00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1e6e00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1e7000 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 3 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 414 VGT_DMA_BASE <- 0x4e9c4448 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 414 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000068 NOP: Trace point ID: 104 This trace point was reached by the CP. SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 1 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 0 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1e7900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1e7b00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1e7d00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1e8200 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1e8400 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_5 <- OFFSET = 5 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 1 POS_Y_FLOAT_ENA = 1 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 1 POS_Y_FLOAT_ENA = 1 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 5 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x01033a60 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 8 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 6 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x01033a70 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 4 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 9 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 414 VGT_DMA_BASE <- 0x4e9c4448 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 414 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000069 NOP: Trace point ID: 105 This trace point was reached by the CP. SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 0 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 0 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1e8d00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1e8f00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1e9100 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1e9600 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1e9800 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 4 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x01033b10 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 8 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 5 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x01033b20 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 4 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 2 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 90 VGT_DMA_BASE <- 0x36b32ec6 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 90 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000006a NOP: Trace point ID: 106 This trace point was reached by the CP. SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 1 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 0 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1ea100 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1ea300 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1ea500 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1eaa00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1eac00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_5 <- OFFSET = 5 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 1 POS_Y_FLOAT_ENA = 1 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 1 POS_Y_FLOAT_ENA = 1 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 5 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x01033a60 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 8 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 6 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x01033a70 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 4 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 4 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 90 VGT_DMA_BASE <- 0x36b32ec6 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 90 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000006b NOP: Trace point ID: 107 This trace point was reached by the CP. SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 0 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 0 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1eb500 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1eb700 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1eb900 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1ebe00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1ec000 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 4 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x01033b10 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 8 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 5 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x01033b20 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 4 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 2 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 228 VGT_DMA_BASE <- 0x3623f7ba VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 228 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000006c NOP: Trace point ID: 108 This trace point was reached by the CP. SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 1 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 0 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1ec900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1ecb00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1ecd00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1ed200 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1ed400 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_5 <- OFFSET = 5 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 1 POS_Y_FLOAT_ENA = 1 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 1 POS_Y_FLOAT_ENA = 1 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 5 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x01033a60 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 8 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 6 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x01033a70 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 4 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 3 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 228 VGT_DMA_BASE <- 0x3623f7ba VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 228 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000006d NOP: Trace point ID: 109 This trace point was reached by the CP. SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 0 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 0 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1edd00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1edf00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1ee100 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1ee600 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1ee800 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 4 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x01033b10 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 8 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 5 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x01033b20 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 4 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 3 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 336 VGT_DMA_BASE <- 0x2ceae2dc VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 336 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000006e NOP: Trace point ID: 110 This trace point was reached by the CP. SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 1 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 0 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1ef100 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1ef300 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1ef500 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1efa00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1efc00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_5 <- OFFSET = 5 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 1 POS_Y_FLOAT_ENA = 1 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 1 POS_Y_FLOAT_ENA = 1 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 5 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x01033a60 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 8 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 6 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x01033a70 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 4 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 3 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 336 VGT_DMA_BASE <- 0x2ceae2dc VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 336 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000006f NOP: Trace point ID: 111 This trace point was reached by the CP. SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 0 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 0 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1f0500 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1f0700 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1f0900 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1f0e00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1f1000 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 4 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x01033b10 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 8 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 5 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x01033b20 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 4 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 9 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 294 VGT_DMA_BASE <- 0x27f6d9fc VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 294 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000070 NOP: Trace point ID: 112 This trace point was reached by the CP. SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 1 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 0 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1f1900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1f1b00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1f1d00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1f2200 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1f2400 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_5 <- OFFSET = 5 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 1 POS_Y_FLOAT_ENA = 1 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 1 POS_Y_FLOAT_ENA = 1 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 5 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x01033a60 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 8 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 6 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x01033a70 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 4 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 3 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 294 VGT_DMA_BASE <- 0x27f6d9fc VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 294 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000071 NOP: Trace point ID: 113 This trace point was reached by the CP. SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 0 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 1 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1f2d00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1f2f00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1f3100 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1f3600 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1f3800 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 4 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0136db70 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 9 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 5 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_32_ABGR SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0136d960 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 1 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 2289 VGT_DMA_BASE <- 0x5936adb4 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 156 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000072 NOP: Trace point ID: 114 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1f4100 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1f4300 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1f4500 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 7197 VGT_DMA_BASE <- 0x4e3de1ac VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1926 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000073 NOP: Trace point ID: 115 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1f4e00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1f5000 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1f5200 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 7263 VGT_DMA_BASE <- 0x4dc33c52 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 900 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000074 NOP: Trace point ID: 116 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1f5b00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1f5d00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1f5f00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1f6400 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1f6600 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 2 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 5205 VGT_DMA_BASE <- 0x4dca86e4 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 582 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000075 NOP: Trace point ID: 117 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1f6f00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1f7100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1f7300 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 4623 VGT_DMA_BASE <- 0x4dca8b70 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 288 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000076 NOP: Trace point ID: 118 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1f7d00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1f7f00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1f8100 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1f8600 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1f8800 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_5 <- OFFSET = 5 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 5 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0136b330 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 8 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 6 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_32_ABGR SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x01363300 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 1 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 9 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 4623 VGT_DMA_BASE <- 0x4dca8b70 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 288 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000077 NOP: Trace point ID: 119 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1f9200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1f9400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1f9600 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 13575 VGT_DMA_BASE <- 0x4e9bdd76 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 3762 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000078 NOP: Trace point ID: 120 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1f9f00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1fa100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1fa300 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1fa800 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1faa00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 4 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0136db70 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 9 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 5 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_32_ABGR SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0136d960 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 1 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 2 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 9813 VGT_DMA_BASE <- 0x4e9bfada VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1890 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000079 NOP: Trace point ID: 121 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1fb300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1fb500 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1fb700 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 4 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 7923 VGT_DMA_BASE <- 0x4e9c099e VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 948 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000007a NOP: Trace point ID: 122 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1fc100 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1fc300 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1fc500 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1fca00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1fcc00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_5 <- OFFSET = 5 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 5 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0136b330 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 8 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 6 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_32_ABGR SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x01363300 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 1 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 8 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 7923 VGT_DMA_BASE <- 0x4e9c099e VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 948 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000007b NOP: Trace point ID: 123 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1fd500 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1fd700 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1fd900 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e1fde00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1fe000 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 4 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0136db70 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 9 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 5 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_32_ABGR SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0136d960 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 1 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 12 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 1599 VGT_DMA_BASE <- 0x36b322fc VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 150 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000007c NOP: Trace point ID: 124 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1fe900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1feb00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e1fed00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 9 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 4488 VGT_DMA_BASE <- 0x3623d672 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 450 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000007d NOP: Trace point ID: 125 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e1ff700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e1ff900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e1ffb00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e200000 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e200200 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_5 <- OFFSET = 5 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 5 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0136b330 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 8 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 6 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_32_ABGR SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x01363300 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 1 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 4 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 4488 VGT_DMA_BASE <- 0x3623d672 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 450 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000007e NOP: Trace point ID: 126 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e200c00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e200e00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e201000 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 9015 VGT_DMA_BASE <- 0x2cea9f0e VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1482 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000007f NOP: Trace point ID: 127 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e201900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e201b00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e201d00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e202200 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e202400 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 4 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0136db70 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 9 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 5 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_32_ABGR SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0136d960 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 1 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 10 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 7533 VGT_DMA_BASE <- 0x2ceaaaa2 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 750 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000080 NOP: Trace point ID: 128 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e202e00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e203000 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e203200 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e203700 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e203900 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_5 <- OFFSET = 5 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 5 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0136b330 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 8 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 6 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_32_ABGR SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x01363300 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 1 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 4 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 7533 VGT_DMA_BASE <- 0x2ceaaaa2 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 750 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000081 NOP: Trace point ID: 129 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e204200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e204400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e204600 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e204b00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e204d00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 4 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0136db70 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 9 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 5 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_32_ABGR SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0136d960 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 1 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 9 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 5283 VGT_DMA_BASE <- 0x27f6b302 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 288 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000082 NOP: Trace point ID: 130 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e205700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e205900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e205b00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e206000 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e206200 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_5 <- OFFSET = 5 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 5 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0136b330 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 8 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 6 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_32_ABGR SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x01363300 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 1 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 3 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 5283 VGT_DMA_BASE <- 0x27f6b302 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 288 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000083 NOP: Trace point ID: 131 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e206b00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e206d00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e206f00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e207400 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e207600 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 4 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0136db70 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 9 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 5 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_32_ABGR SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0136d960 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 1 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 8 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 102 VGT_DMA_BASE <- 0x3b56d0a8 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 102 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000084 NOP: Trace point ID: 132 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e207f00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e208100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e208300 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 7 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 102 VGT_DMA_BASE <- 0x3afd4078 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 102 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000085 NOP: Trace point ID: 133 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e208c00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e208e00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e209000 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 7 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 60 VGT_DMA_BASE <- 0x3afd6000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 12 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000086 NOP: Trace point ID: 134 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e209900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e209b00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e209d00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e20a200 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e20a400 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 32 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 114 VGT_DMA_BASE <- 0x362be090 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 114 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000087 NOP: Trace point ID: 135 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e20ad00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e20af00 SPI_SHADER_USER_DATA_PS_3 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 114 VGT_DMA_BASE <- 0x362be090 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 114 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000088 NOP: Trace point ID: 136 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e20b900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e20bb00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e20bd00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e20c200 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e20c400 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 18 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 114 VGT_DMA_BASE <- 0x362be090 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 114 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000089 NOP: Trace point ID: 137 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e20cd00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e20cf00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e20d100 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e20d600 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e20d800 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 4 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x013a2e90 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 8 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 5 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_32_ABGR SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x013a2ea0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 6 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 1 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 8 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 186 VGT_DMA_BASE <- 0x3b56d000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 84 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000008a NOP: Trace point ID: 138 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e20e100 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e20e300 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e20e500 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 7 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 162 VGT_DMA_BASE <- 0x3afd4000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 60 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000008b NOP: Trace point ID: 139 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e20ee00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e20f000 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e20f200 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 7 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 48 VGT_DMA_BASE <- 0x3afd6018 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000008c NOP: Trace point ID: 140 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e20fb00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e20fd00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e20ff00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e210400 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e210600 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 4 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 186 VGT_DMA_BASE <- 0x362be000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 72 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000008d NOP: Trace point ID: 141 This trace point was reached by the CP. SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 1 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 1 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e210f00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e211100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e211300 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e211800 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e211a00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_5 <- OFFSET = 5 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 1 POS_Y_FLOAT_ENA = 1 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 1 POS_Y_FLOAT_ENA = 1 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 5 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x013a4720 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 8 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 6 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_32_ABGR SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x013a4730 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 1 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 2 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 186 VGT_DMA_BASE <- 0x362be000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 72 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000008e NOP: Trace point ID: 142 This trace point was reached by the CP. SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 0 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 1 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e212300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e212500 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e212700 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e212c00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e212e00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 4 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x013a2e90 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 8 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 5 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_32_ABGR SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x013a2ea0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 6 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 1 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 9 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 186 VGT_DMA_BASE <- 0x362be000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 72 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000008f NOP: Trace point ID: 143 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e213700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e213900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e213b00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 8 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 186 VGT_DMA_BASE <- 0x362be000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 72 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000090 NOP: Trace point ID: 144 This trace point was reached by the CP. SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 1 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 1 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e214400 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e214600 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e214800 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e214d00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e214f00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_5 <- OFFSET = 5 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 1 POS_Y_FLOAT_ENA = 1 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 1 POS_Y_FLOAT_ENA = 1 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 5 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x013a4720 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 8 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 6 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_32_ABGR SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x013a4730 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 1 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 3 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 186 VGT_DMA_BASE <- 0x362be000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 72 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000091 NOP: Trace point ID: 145 This trace point was reached by the CP. SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 0 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 1 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e215800 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e215a00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e215c00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e216100 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e216300 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 1 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x013a3fd0 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 6 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 2 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_32_ABGR SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x013a3fe0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 5 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 1 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 16 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 3684 VGT_DMA_BASE <- 0x3a47d060 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 3684 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000092 NOP: Trace point ID: 146 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e216d00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e216f00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e217100 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e217300 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 2 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x013a3ff0 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 3 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_32_ABGR SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x013a37b0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 5 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 1 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 9 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 3684 VGT_DMA_BASE <- 0x3a47d060 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 3684 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000093 NOP: Trace point ID: 147 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e217c00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e217e00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e218000 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e218500 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e218700 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 1 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x013a3fd0 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 6 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 2 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_32_ABGR SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x013a3fe0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 5 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 1 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 3 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 4980 VGT_DMA_BASE <- 0x3affb000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 4860 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000094 NOP: Trace point ID: 148 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e219000 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e219200 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e219400 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e219900 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e219b00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 32 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 3732 VGT_DMA_BASE <- 0x3a47d000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000095 NOP: Trace point ID: 149 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e21a400 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e21a600 SPI_SHADER_USER_DATA_PS_3 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 32 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 3732 VGT_DMA_BASE <- 0x3a47d000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000096 NOP: Trace point ID: 150 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e21b000 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e21b200 SPI_SHADER_USER_DATA_PS_3 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 32 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 3732 VGT_DMA_BASE <- 0x3a47d000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000097 NOP: Trace point ID: 151 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e21bc00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e21be00 SPI_SHADER_USER_DATA_PS_3 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 31 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 3732 VGT_DMA_BASE <- 0x3a47d000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000098 NOP: Trace point ID: 152 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e21c900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e21cb00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e21cd00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e21cf00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 2 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x013a3ff0 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 3 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_32_ABGR SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x013a37b0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 5 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 1 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 32 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 3732 VGT_DMA_BASE <- 0x3a47d000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000099 NOP: Trace point ID: 153 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e21d900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e21db00 SPI_SHADER_USER_DATA_PS_3 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 9 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 3732 VGT_DMA_BASE <- 0x3a47d000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000009a NOP: Trace point ID: 154 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e21e000 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e21e200 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e21e400 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e21e900 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e21eb00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: SPI_INTERP_CONTROL_0 <- FLAT_SHADE_ENA = 1 PNT_SPRITE_ENA = 1 PNT_SPRITE_OVRD_X = SPI_PNT_SPRITE_SEL_S PNT_SPRITE_OVRD_Y = SPI_PNT_SPRITE_SEL_T PNT_SPRITE_OVRD_Z = SPI_PNT_SPRITE_SEL_0 PNT_SPRITE_OVRD_W = SPI_PNT_SPRITE_SEL_1 PNT_SPRITE_TOP_1 = 1 SET_CONTEXT_REG: PA_SU_POINT_SIZE <- HEIGHT = 8 WIDTH = 8 PA_SU_POINT_MINMAX <- MIN_SIZE = 8 MAX_SIZE = 8 PA_SU_LINE_CNTL <- WIDTH = 8 SET_CONTEXT_REG: PA_SC_MODE_CNTL_0 <- MSAA_ENABLE = 1 VPORT_SCISSOR_ENABLE = 0 LINE_STIPPLE_ENABLE = 0 SEND_UNLIT_STILES_TO_PKR = 0 SET_CONTEXT_REG: PA_SU_VTX_CNTL <- PIX_CENTER = 1 ROUND_MODE = X_TRUNCATE QUANT_MODE = X_16_8_FIXED_POINT_1_256TH SET_CONTEXT_REG: PA_SU_POLY_OFFSET_CLAMP <- 0 SET_CONTEXT_REG: PA_SU_SC_MODE_CNTL <- CULL_FRONT = 0 CULL_BACK = 0 FACE = 1 POLY_MODE = X_DISABLE_POLY_MODE POLYMODE_FRONT_PTYPE = X_DRAW_TRIANGLES POLYMODE_BACK_PTYPE = X_DRAW_TRIANGLES POLY_OFFSET_FRONT_ENABLE = 0 POLY_OFFSET_BACK_ENABLE = 0 POLY_OFFSET_PARA_ENABLE = 0 VTX_WINDOW_OFFSET_ENABLE = 0 PROVOKING_VTX_LAST = 1 PERSP_CORR_DIS = 0 MULTI_PRIM_IB_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 2 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0127d360 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 6 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 0 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 3 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_32_ABGR SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0127d370 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 5 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 1 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 11016 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000009b NOP: Trace point ID: 155 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e21ef00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e21f100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e21f300 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 11016 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000009c NOP: Trace point ID: 156 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e21f700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e21f900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e21fb00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 11016 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000009d NOP: Trace point ID: 157 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e21ff00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e220100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e220300 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 11016 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000009e NOP: Trace point ID: 158 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e220700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e220900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e220b00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 10506 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000009f NOP: Trace point ID: 159 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e220f00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e221100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e221300 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 3450 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000a0 NOP: Trace point ID: 160 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e221700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e221900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e221b00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 21840 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000a1 NOP: Trace point ID: 161 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e221f00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e222100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e222300 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 21936 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000a2 NOP: Trace point ID: 162 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e222700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e222900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e222b00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 21936 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000a3 NOP: Trace point ID: 163 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e222f00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e223100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e223300 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 21936 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000a4 NOP: Trace point ID: 164 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e223700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e223900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e223b00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 14814 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000a5 NOP: Trace point ID: 165 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e223f00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e224100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e224300 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 12534 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000a6 NOP: Trace point ID: 166 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e224700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e224900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e224b00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 9030 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000a7 NOP: Trace point ID: 167 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e224f00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e225100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e225300 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 8532 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000a8 NOP: Trace point ID: 168 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e225700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e225900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e225b00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 5520 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000a9 NOP: Trace point ID: 169 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e225f00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e226100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e226300 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 5520 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000aa NOP: Trace point ID: 170 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e226700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e226900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e226b00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 5520 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000ab NOP: Trace point ID: 171 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e226f00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e227100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e227300 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 5520 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000ac NOP: Trace point ID: 172 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e227700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e227900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e227b00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 5520 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000ad NOP: Trace point ID: 173 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e227f00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e228100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e228300 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 5442 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000ae NOP: Trace point ID: 174 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e228700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e228900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e228b00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 120 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000af NOP: Trace point ID: 175 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e228f00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e229100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e229300 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e229800 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e229a00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 2 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0127d3c0 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 6 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 0 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 3 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_32_ABGR SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0127d3d0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 5 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 1 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2688 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000b0 NOP: Trace point ID: 176 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e229e00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e22a000 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e22a200 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2688 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000b1 NOP: Trace point ID: 177 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e22a600 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e22a800 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e22aa00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2688 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000b2 NOP: Trace point ID: 178 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e22ae00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e22b000 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e22b200 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2688 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000b3 NOP: Trace point ID: 179 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e22b600 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e22b800 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e22ba00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2688 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000b4 NOP: Trace point ID: 180 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e22be00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e22c000 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e22c200 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2688 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000b5 NOP: Trace point ID: 181 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e22c600 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e22c800 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e22ca00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2688 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000b6 NOP: Trace point ID: 182 This trace point was reached by the CP. SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 0 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 0 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e22ce00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e22d000 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e22d200 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e22d700 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e22d900 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_5 <- OFFSET = 5 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: SPI_INTERP_CONTROL_0 <- FLAT_SHADE_ENA = 1 PNT_SPRITE_ENA = 1 PNT_SPRITE_OVRD_X = SPI_PNT_SPRITE_SEL_S PNT_SPRITE_OVRD_Y = SPI_PNT_SPRITE_SEL_T PNT_SPRITE_OVRD_Z = SPI_PNT_SPRITE_SEL_0 PNT_SPRITE_OVRD_W = SPI_PNT_SPRITE_SEL_1 PNT_SPRITE_TOP_1 = 1 SET_CONTEXT_REG: PA_SU_POINT_SIZE <- HEIGHT = 8 WIDTH = 8 PA_SU_POINT_MINMAX <- MIN_SIZE = 8 MAX_SIZE = 8 PA_SU_LINE_CNTL <- WIDTH = 8 SET_CONTEXT_REG: PA_SC_MODE_CNTL_0 <- MSAA_ENABLE = 1 VPORT_SCISSOR_ENABLE = 0 LINE_STIPPLE_ENABLE = 0 SEND_UNLIT_STILES_TO_PKR = 0 SET_CONTEXT_REG: PA_SU_VTX_CNTL <- PIX_CENTER = 1 ROUND_MODE = X_TRUNCATE QUANT_MODE = X_16_8_FIXED_POINT_1_256TH SET_CONTEXT_REG: PA_SU_POLY_OFFSET_CLAMP <- 0 SET_CONTEXT_REG: PA_SU_SC_MODE_CNTL <- CULL_FRONT = 0 CULL_BACK = 1 FACE = 1 POLY_MODE = X_DISABLE_POLY_MODE POLYMODE_FRONT_PTYPE = X_DRAW_TRIANGLES POLYMODE_BACK_PTYPE = X_DRAW_TRIANGLES POLY_OFFSET_FRONT_ENABLE = 0 POLY_OFFSET_BACK_ENABLE = 0 POLY_OFFSET_PARA_ENABLE = 0 VTX_WINDOW_OFFSET_ENABLE = 0 PROVOKING_VTX_LAST = 1 PERSP_CORR_DIS = 0 MULTI_PRIM_IB_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 5 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x012b7f20 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 5 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 0 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 6 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x013a37c0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 11 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 1 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x000ab179 VGT_DMA_BASE <- 0x5e066d0e VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 7188 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000b7 NOP: Trace point ID: 183 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x000080b2 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x000a9565 VGT_DMA_BASE <- 0x5e06a536 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 768 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000b8 NOP: Trace point ID: 184 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 19652 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x000a9265 VGT_DMA_BASE <- 0x5e06ab36 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 26412 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000b9 NOP: Trace point ID: 185 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x0000cd76 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x000a2b39 VGT_DMA_BASE <- 0x5e07798e VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 10968 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000ba NOP: Trace point ID: 186 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x00009988 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x000a0061 VGT_DMA_BASE <- 0x5e07cf3e VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 28488 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000bb NOP: Trace point ID: 187 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e22dd00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e22df00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e22e100 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e22e600 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e22e800 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00099119 VGT_DMA_BASE <- 0x5e08adce VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 4008 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000bc NOP: Trace point ID: 188 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e22ec00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e22ee00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e22f000 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e22f500 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e22f700 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00098171 VGT_DMA_BASE <- 0x5e08cd1e VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 8346 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000bd NOP: Trace point ID: 189 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x000080b2 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x000960d7 VGT_DMA_BASE <- 0x5e090e52 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 8700 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000be NOP: Trace point ID: 190 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x00010164 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00093edb VGT_DMA_BASE <- 0x5e09524a VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2292 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000bf NOP: Trace point ID: 191 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e22fb00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e22fd00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e22ff00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e230400 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e230600 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x000935e7 VGT_DMA_BASE <- 0x5e096432 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1620 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000c0 NOP: Trace point ID: 192 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x000080b2 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00092f93 VGT_DMA_BASE <- 0x5e0970da VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000c1 NOP: Trace point ID: 193 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 19652 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00092f63 VGT_DMA_BASE <- 0x5e09713a VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 408 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000c2 NOP: Trace point ID: 194 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 2312 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00092dcb VGT_DMA_BASE <- 0x5e09746a VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 4194 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000c3 NOP: Trace point ID: 195 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x000089ba SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00091d69 VGT_DMA_BASE <- 0x5e09952e VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 192 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000c4 NOP: Trace point ID: 196 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 21964 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00091ca9 VGT_DMA_BASE <- 0x5e0996ae VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2304 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000c5 NOP: Trace point ID: 197 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x0000d8c0 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x000913a9 VGT_DMA_BASE <- 0x5e09a8ae VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 768 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000c6 NOP: Trace point ID: 198 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x00009988 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x000910a9 VGT_DMA_BASE <- 0x5e09aeae VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1818 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000c7 NOP: Trace point ID: 199 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x00011a3a SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0009098f VGT_DMA_BASE <- 0x5e09bce2 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000c8 NOP: Trace point ID: 200 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e230a00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e230c00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e230e00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e231300 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e231500 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0009095f VGT_DMA_BASE <- 0x5e09bd42 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1104 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000c9 NOP: Trace point ID: 201 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x000080b2 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0009050f VGT_DMA_BASE <- 0x5e09c5e2 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000ca NOP: Trace point ID: 202 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 19652 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x000904df VGT_DMA_BASE <- 0x5e09c642 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 96 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000cb NOP: Trace point ID: 203 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 2312 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0009047f VGT_DMA_BASE <- 0x5e09c702 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 96 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000cc NOP: Trace point ID: 204 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x00009080 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0009041f VGT_DMA_BASE <- 0x5e09c7c2 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 288 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000cd NOP: Trace point ID: 205 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e231900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e231b00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e231d00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e232200 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e232400 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x000902ff VGT_DMA_BASE <- 0x5e09ca02 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2736 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000ce NOP: Trace point ID: 206 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x000080b2 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008f84f VGT_DMA_BASE <- 0x5e09df62 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2736 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000cf NOP: Trace point ID: 207 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x00010164 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008ed9f VGT_DMA_BASE <- 0x5e09f4c2 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 672 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000d0 NOP: Trace point ID: 208 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e232800 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e232a00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e232c00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e233100 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e233300 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008eaff VGT_DMA_BASE <- 0x5e09fa02 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2736 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000d1 NOP: Trace point ID: 209 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x000080b2 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008e04f VGT_DMA_BASE <- 0x5e0a0f62 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2628 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000d2 NOP: Trace point ID: 210 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x00010164 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008d60b VGT_DMA_BASE <- 0x5e0a23ea VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 612 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000d3 NOP: Trace point ID: 211 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e233700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e233900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e233b00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e234000 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e234200 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008d3a7 VGT_DMA_BASE <- 0x5e0a28b2 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1290 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000d4 NOP: Trace point ID: 212 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x000080b2 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008ce9d VGT_DMA_BASE <- 0x5e0a32c6 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1362 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000d5 NOP: Trace point ID: 213 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x00010164 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008c94b VGT_DMA_BASE <- 0x5e0a3d6a VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 330 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000d6 NOP: Trace point ID: 214 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e234600 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e234800 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e234a00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e234f00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e235100 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008c801 VGT_DMA_BASE <- 0x5e0a3ffe VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1131 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000d7 NOP: Trace point ID: 215 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x000080b2 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008c396 VGT_DMA_BASE <- 0x5e0a48d4 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 753 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000d8 NOP: Trace point ID: 216 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x00010164 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008c0a5 VGT_DMA_BASE <- 0x5e0a4eb6 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 168 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000d9 NOP: Trace point ID: 217 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e235500 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e235700 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e235900 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e235e00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e236000 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008bffd VGT_DMA_BASE <- 0x5e0a5006 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 501 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000da NOP: Trace point ID: 218 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x000080b2 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008be08 VGT_DMA_BASE <- 0x5e0a53f0 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 12 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000db NOP: Trace point ID: 219 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 19652 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008bdfc VGT_DMA_BASE <- 0x5e0a5408 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 177 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000dc NOP: Trace point ID: 220 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 2312 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008bd4b VGT_DMA_BASE <- 0x5e0a556a VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1104 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000dd NOP: Trace point ID: 221 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x000089ba SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008b8fb VGT_DMA_BASE <- 0x5e0a5e0a VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000de NOP: Trace point ID: 222 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 21964 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008b8cb VGT_DMA_BASE <- 0x5e0a5e6a VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 576 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000df NOP: Trace point ID: 223 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x0000d8c0 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008b68b VGT_DMA_BASE <- 0x5e0a62ea VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 192 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000e0 NOP: Trace point ID: 224 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x00009988 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008b5cb VGT_DMA_BASE <- 0x5e0a646a VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 720 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000e1 NOP: Trace point ID: 225 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x00011a3a SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008b2fb VGT_DMA_BASE <- 0x5e0a6a0a VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 12 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000e2 NOP: Trace point ID: 226 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x0000e64c SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008b2ef VGT_DMA_BASE <- 0x5e0a6a22 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 189 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000e3 NOP: Trace point ID: 227 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e236400 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e236600 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e236800 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e236d00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e236f00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x0000d8c0 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008b232 VGT_DMA_BASE <- 0x5e0a6b9c VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 768 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000e4 NOP: Trace point ID: 228 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e237300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e237500 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e237700 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e237c00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e237e00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008af32 VGT_DMA_BASE <- 0x5e0a719c VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1104 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000e5 NOP: Trace point ID: 229 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x000080b2 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008aae2 VGT_DMA_BASE <- 0x5e0a7a3c VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000e6 NOP: Trace point ID: 230 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 19652 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008aab2 VGT_DMA_BASE <- 0x5e0a7a9c VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1392 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000e7 NOP: Trace point ID: 231 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x0000cd76 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008a542 VGT_DMA_BASE <- 0x5e0a857c VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1044 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000e8 NOP: Trace point ID: 232 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x00009988 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008a12e VGT_DMA_BASE <- 0x5e0a8da4 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 3408 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000e9 NOP: Trace point ID: 233 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x00011a3a SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x000893de VGT_DMA_BASE <- 0x5e0aa844 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 192 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000ea NOP: Trace point ID: 234 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x0000e64c SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008931e VGT_DMA_BASE <- 0x5e0aa9c4 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000eb NOP: Trace point ID: 235 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e238200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e238400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e238600 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e238b00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e238d00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x0000b4a0 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00088d1e VGT_DMA_BASE <- 0x5e0ab5c4 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 576 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000ec NOP: Trace point ID: 236 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e239100 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e239300 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e239500 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e239a00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e239c00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00088ade VGT_DMA_BASE <- 0x5e0aba44 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2670 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000ed NOP: Trace point ID: 237 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x000080b2 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00088070 VGT_DMA_BASE <- 0x5e0acf20 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2736 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000ee NOP: Trace point ID: 238 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x00010164 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x000875c0 VGT_DMA_BASE <- 0x5e0ae480 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 672 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000ef NOP: Trace point ID: 239 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e23a000 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e23a200 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e23a400 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e23a900 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e23ab00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00087320 VGT_DMA_BASE <- 0x5e0ae9c0 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 276 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000f0 NOP: Trace point ID: 240 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x000080b2 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0008720c VGT_DMA_BASE <- 0x5e0aebe8 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 12 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000f1 NOP: Trace point ID: 241 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 19652 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00087200 VGT_DMA_BASE <- 0x5e0aec00 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 96 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000f2 NOP: Trace point ID: 242 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 11560 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x000871a0 VGT_DMA_BASE <- 0x5e0aecc0 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 351 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000f3 NOP: Trace point ID: 243 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x0000b4a0 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00087041 VGT_DMA_BASE <- 0x5e0aef7e VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000f4 NOP: Trace point ID: 244 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x00009504 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00087011 VGT_DMA_BASE <- 0x5e0aefde VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 645 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000f5 NOP: Trace point ID: 245 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x000115b6 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00086d8c VGT_DMA_BASE <- 0x5e0af4e8 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000f6 NOP: Trace point ID: 246 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x00009988 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00086d5c VGT_DMA_BASE <- 0x5e0af548 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1098 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000f7 NOP: Trace point ID: 247 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x00011a3a SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00086912 VGT_DMA_BASE <- 0x5e0afddc VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000f8 NOP: Trace point ID: 248 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x0000e64c SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x000868e2 VGT_DMA_BASE <- 0x5e0afe3c VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 384 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000f9 NOP: Trace point ID: 249 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e23af00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e23b100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e23b300 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e23b800 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e23ba00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00086762 VGT_DMA_BASE <- 0x5e0b013c VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 732 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000fa NOP: Trace point ID: 250 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x000080b2 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00086486 VGT_DMA_BASE <- 0x5e0b06f4 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1041 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000fb NOP: Trace point ID: 251 This trace point was reached by the CP. INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0x00010164 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00086075 VGT_DMA_BASE <- 0x5e0b0f16 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 315 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000fc NOP: Trace point ID: 252 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 15 TARGET1_ENABLE = 15 TARGET2_ENABLE = 15 TARGET3_ENABLE = 15 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e23bd00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e23bf00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e23c100 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e23c600 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e23c800 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_2 <- OFFSET = 2 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_3 <- OFFSET = 3 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_4 <- OFFSET = 4 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 4 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x012b7f30 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 5 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 0 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 5 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL2_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL3_EXPORT_FORMAT = SPI_SHADER_FP16_ABGR COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 15 OUTPUT2_ENABLE = 15 OUTPUT3_ENABLE = 15 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x012b7f50 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 4 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_10 <- 0 SPI_SHADER_USER_DATA_VS_11 <- 0 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00157ef6 VGT_DMA_BASE <- 0x28e84000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000fd NOP: Trace point ID: 253 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e23cb00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e23cd00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e23cf00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00157ef6 VGT_DMA_BASE <- 0x28e84000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000fe NOP: Trace point ID: 254 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e23d200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e23d400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e23d600 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00157ef6 VGT_DMA_BASE <- 0x28e84000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000000ff NOP: Trace point ID: 255 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e23d900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e23db00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e23dd00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00157ef6 VGT_DMA_BASE <- 0x28e84000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000100 NOP: Trace point ID: 256 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e23e000 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e23e200 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e23e400 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00157ef6 VGT_DMA_BASE <- 0x28e84000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000101 NOP: Trace point ID: 257 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e23e700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e23e900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e23eb00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0009c6f6 VGT_DMA_BASE <- 0x28ffb000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000102 NOP: Trace point ID: 258 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e23ee00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e23f000 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e23f200 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0009c6f6 VGT_DMA_BASE <- 0x28ffb000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000103 NOP: Trace point ID: 259 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e23f500 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e23f700 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e23f900 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00157ef6 VGT_DMA_BASE <- 0x28e84000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000104 NOP: Trace point ID: 260 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e23fc00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e23fe00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e240000 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00157ef6 VGT_DMA_BASE <- 0x28e84000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000105 NOP: Trace point ID: 261 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e240300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e240500 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e240700 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0009c6f6 VGT_DMA_BASE <- 0x28ffb000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000106 NOP: Trace point ID: 262 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e240a00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e240c00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e240e00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0009c6f6 VGT_DMA_BASE <- 0x28ffb000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000107 NOP: Trace point ID: 263 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e241100 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e241300 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e241500 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00157ef6 VGT_DMA_BASE <- 0x28e84000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000108 NOP: Trace point ID: 264 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e241800 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e241a00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e241c00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00157ef6 VGT_DMA_BASE <- 0x28e84000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000109 NOP: Trace point ID: 265 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e241f00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e242100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e242300 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00157ef6 VGT_DMA_BASE <- 0x28e84000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000010a NOP: Trace point ID: 266 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e242600 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e242800 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e242a00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0009c6f6 VGT_DMA_BASE <- 0x28ffb000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000010b NOP: Trace point ID: 267 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e242d00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e242f00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e243100 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0009c6f6 VGT_DMA_BASE <- 0x28ffb000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000010c NOP: Trace point ID: 268 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e243400 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e243600 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e243800 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0014e2f6 VGT_DMA_BASE <- 0x28e97800 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000010d NOP: Trace point ID: 269 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e243b00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e243d00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e243f00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0009c6f6 VGT_DMA_BASE <- 0x28ffb000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000010e NOP: Trace point ID: 270 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e244200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e244400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e244600 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x000918f6 VGT_DMA_BASE <- 0x29010c00 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000010f NOP: Trace point ID: 271 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e244900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e244b00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e244d00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00157ef6 VGT_DMA_BASE <- 0x28e84000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000110 NOP: Trace point ID: 272 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e245000 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e245200 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e245400 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00157ef6 VGT_DMA_BASE <- 0x28e84000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000111 NOP: Trace point ID: 273 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e245700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e245900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e245b00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00157ef6 VGT_DMA_BASE <- 0x28e84000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000112 NOP: Trace point ID: 274 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e245e00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e246000 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e246200 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00157ef6 VGT_DMA_BASE <- 0x28e84000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000113 NOP: Trace point ID: 275 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e246500 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e246700 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e246900 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00157ef6 VGT_DMA_BASE <- 0x28e84000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000114 NOP: Trace point ID: 276 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e246c00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e246e00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e247000 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00157ef6 VGT_DMA_BASE <- 0x28e84000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000115 NOP: Trace point ID: 277 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e247300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e247500 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e247700 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0009c6f6 VGT_DMA_BASE <- 0x28ffb000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000116 NOP: Trace point ID: 278 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e247a00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e247c00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e247e00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0009c6f6 VGT_DMA_BASE <- 0x28ffb000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000117 NOP: Trace point ID: 279 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e248100 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e248300 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e248500 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00157ef6 VGT_DMA_BASE <- 0x28e84000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000118 NOP: Trace point ID: 280 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e248800 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e248a00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e248c00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00157ef6 VGT_DMA_BASE <- 0x28e84000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000119 NOP: Trace point ID: 281 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e248f00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e249100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e249300 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0009c6f6 VGT_DMA_BASE <- 0x28ffb000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000011a NOP: Trace point ID: 282 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e249600 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e249800 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e249a00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0009c6f6 VGT_DMA_BASE <- 0x28ffb000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000011b NOP: Trace point ID: 283 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e249d00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e249f00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e24a100 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00157ef6 VGT_DMA_BASE <- 0x28e84000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000011c NOP: Trace point ID: 284 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e24a400 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e24a600 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e24a800 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0009c6f6 VGT_DMA_BASE <- 0x28ffb000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000011d NOP: Trace point ID: 285 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e24ab00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e24ad00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e24af00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x0009c6f6 VGT_DMA_BASE <- 0x28ffb000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000011e NOP: Trace point ID: 286 This trace point was reached by the CP. EVENT_WRITE: VGT_EVENT_INITIATOR <- EVENT_TYPE = FLUSH_AND_INV_CB_META EVENT_INDEX <- 0 INV_L2 <- 0 EVENT_WRITE: VGT_EVENT_INITIATOR <- EVENT_TYPE = FLUSH_AND_INV_DB_META EVENT_INDEX <- 0 INV_L2 <- 0 ACQUIRE_MEM: CP_COHER_CNTL <- DEST_BASE_0_ENA = 0 DEST_BASE_1_ENA = 0 TC_SD_ACTION_ENA = 0 TC_NC_ACTION_ENA = 0 CB0_DEST_BASE_ENA = 1 CB1_DEST_BASE_ENA = 1 CB2_DEST_BASE_ENA = 1 CB3_DEST_BASE_ENA = 1 CB4_DEST_BASE_ENA = 1 CB5_DEST_BASE_ENA = 1 CB6_DEST_BASE_ENA = 1 CB7_DEST_BASE_ENA = 1 DB_DEST_BASE_ENA = 1 TCL1_VOL_ACTION_ENA = 0 TC_VOL_ACTION_ENA = 0 TC_WB_ACTION_ENA = 1 DEST_BASE_2_ENA = 0 DEST_BASE_3_ENA = 0 TCL1_ACTION_ENA = 1 TC_ACTION_ENA = 1 CB_ACTION_ENA = 1 DB_ACTION_ENA = 1 SH_KCACHE_ACTION_ENA = 0 SH_KCACHE_VOL_ACTION_ENA = 0 SH_ICACHE_ACTION_ENA = 0 SH_KCACHE_WB_ACTION_ENA = 0 SH_SD_ACTION_ENA = 0 CP_COHER_SIZE <- 0xffffffff CP_COHER_SIZE_HI <- COHER_SIZE_HI_256B = 255 CP_COHER_BASE <- 0 CP_COHER_BASE_HI <- COHER_BASE_HI_256B = 0 POLL_INTERVAL <- 10 SET_CONTEXT_REG: CB_COLOR0_INFO <- ENDIAN = ENDIAN_NONE FORMAT = COLOR_INVALID LINEAR_GENERAL = 0 NUMBER_TYPE = NUMBER_UNORM COMP_SWAP = SWAP_STD FAST_CLEAR = 0 COMPRESSION = 0 BLEND_CLAMP = 0 BLEND_BYPASS = 0 SIMPLE_FLOAT = 0 ROUND_MODE = 0 CMASK_IS_LINEAR = 0 BLEND_OPT_DONT_RD_DST = FORCE_OPT_AUTO BLEND_OPT_DISCARD_PIXEL = FORCE_OPT_AUTO FMASK_COMPRESSION_DISABLE = 0 FMASK_COMPRESS_1FRAG_ONLY = 0 DCC_ENABLE = 0 CMASK_ADDR_TYPE = 0 SET_CONTEXT_REG: CB_COLOR1_INFO <- ENDIAN = ENDIAN_NONE FORMAT = COLOR_INVALID LINEAR_GENERAL = 0 NUMBER_TYPE = NUMBER_UNORM COMP_SWAP = SWAP_STD FAST_CLEAR = 0 COMPRESSION = 0 BLEND_CLAMP = 0 BLEND_BYPASS = 0 SIMPLE_FLOAT = 0 ROUND_MODE = 0 CMASK_IS_LINEAR = 0 BLEND_OPT_DONT_RD_DST = FORCE_OPT_AUTO BLEND_OPT_DISCARD_PIXEL = FORCE_OPT_AUTO FMASK_COMPRESSION_DISABLE = 0 FMASK_COMPRESS_1FRAG_ONLY = 0 DCC_ENABLE = 0 CMASK_ADDR_TYPE = 0 SET_CONTEXT_REG: CB_COLOR2_INFO <- ENDIAN = ENDIAN_NONE FORMAT = COLOR_INVALID LINEAR_GENERAL = 0 NUMBER_TYPE = NUMBER_UNORM COMP_SWAP = SWAP_STD FAST_CLEAR = 0 COMPRESSION = 0 BLEND_CLAMP = 0 BLEND_BYPASS = 0 SIMPLE_FLOAT = 0 ROUND_MODE = 0 CMASK_IS_LINEAR = 0 BLEND_OPT_DONT_RD_DST = FORCE_OPT_AUTO BLEND_OPT_DISCARD_PIXEL = FORCE_OPT_AUTO FMASK_COMPRESSION_DISABLE = 0 FMASK_COMPRESS_1FRAG_ONLY = 0 DCC_ENABLE = 0 CMASK_ADDR_TYPE = 0 SET_CONTEXT_REG: CB_COLOR3_INFO <- ENDIAN = ENDIAN_NONE FORMAT = COLOR_INVALID LINEAR_GENERAL = 0 NUMBER_TYPE = NUMBER_UNORM COMP_SWAP = SWAP_STD FAST_CLEAR = 0 COMPRESSION = 0 BLEND_CLAMP = 0 BLEND_BYPASS = 0 SIMPLE_FLOAT = 0 ROUND_MODE = 0 CMASK_IS_LINEAR = 0 BLEND_OPT_DONT_RD_DST = FORCE_OPT_AUTO BLEND_OPT_DISCARD_PIXEL = FORCE_OPT_AUTO FMASK_COMPRESSION_DISABLE = 0 FMASK_COMPRESS_1FRAG_ONLY = 0 DCC_ENABLE = 0 CMASK_ADDR_TYPE = 0 SET_CONTEXT_REG: DB_DEPTH_VIEW <- SLICE_START = 0 SLICE_MAX = 0 Z_READ_ONLY = 0 STENCIL_READ_ONLY = 0 SET_CONTEXT_REG: DB_HTILE_DATA_BASE <- 0x0127bd70 SET_CONTEXT_REG: DB_DEPTH_INFO <- ADDR5_SWIZZLE_MASK = 1 ARRAY_MODE = ARRAY_2D_TILED_THIN1 PIPE_CONFIG = X_ADDR_SURF_P8_32X32_16X16 BANK_WIDTH = ADDR_SURF_BANK_WIDTH_1 BANK_HEIGHT = ADDR_SURF_BANK_HEIGHT_4 MACRO_TILE_ASPECT = ADDR_SURF_MACRO_ASPECT_4 NUM_BANKS = ADDR_SURF_16_BANK DB_Z_INFO <- FORMAT = Z_24 NUM_SAMPLES = 0 TILE_SPLIT = ADDR_SURF_TILE_SPLIT_64B TILE_MODE_INDEX = 0 DECOMPRESS_ON_N_ZPLANES = 0 ALLOW_EXPCLEAR = 1 READ_SIZE = 0 TILE_SURFACE_ENABLE = 1 CLEAR_DISALLOWED = 0 ZRANGE_PRECISION = 1 DB_STENCIL_INFO <- FORMAT = STENCIL_INVALID TILE_SPLIT = ADDR_SURF_TILE_SPLIT_1KB TILE_MODE_INDEX = 0 ALLOW_EXPCLEAR = 0 TILE_STENCIL_DISABLE = 1 CLEAR_DISALLOWED = 0 DB_Z_READ_BASE <- 0x012e0c00 DB_STENCIL_READ_BASE <- 0x012e0c00 DB_Z_WRITE_BASE <- 0x012e0c00 DB_STENCIL_WRITE_BASE <- 0x012e0c00 DB_DEPTH_SIZE <- PITCH_TILE_MAX = 511 HEIGHT_TILE_MAX = 511 DB_DEPTH_SLICE <- SLICE_TILE_MAX = 0x3ffff SET_CONTEXT_REG: DB_HTILE_SURFACE <- LINEAR = 0 FULL_CACHE = 1 HTILE_USES_PRELOAD_WIN = 0 PRELOAD = 0 PREFETCH_WIDTH = 0 PREFETCH_HEIGHT = 0 DST_OUTSIDE_ZERO_TO_ONE = 0 TC_COMPATIBLE = 0 SET_CONTEXT_REG: DB_DEPTH_CLEAR <- 1.0f SET_CONTEXT_REG: PA_SU_POLY_OFFSET_DB_FMT_CNTL <- POLY_OFFSET_NEG_NUM_DB_BITS = 232 POLY_OFFSET_DB_IS_FLOAT_FMT = 0 SET_CONTEXT_REG: PA_SC_WINDOW_SCISSOR_BR <- BR_X = 4096 BR_Y = 4096 SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 1 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 0 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 0 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: PA_SC_LINE_CNTL <- EXPAND_LINE_WIDTH = 0 LAST_PIXEL = 1 PERPENDICULAR_ENDCAP_ENA = 0 DX10_DIAMOND_TEST_ENA = 0 PA_SC_AA_CONFIG <- MSAA_NUM_SAMPLES = 0 AA_MASK_CENTROID_DTMN = 0 MAX_SAMPLE_DIST = 0 MSAA_EXPOSED_SAMPLES = 0 DETAIL_TO_EXPOSED_MODE = 0 SET_CONTEXT_REG: DB_EQAA <- MAX_ANCHOR_SAMPLES = 0 PS_ITER_SAMPLES = 0 MASK_EXPORT_NUM_SAMPLES = 0 ALPHA_TO_MASK_NUM_SAMPLES = 0 HIGH_QUALITY_INTERSECTIONS = 1 INCOHERENT_EQAA_READS = 0 INTERPOLATE_COMP_Z = 0 INTERPOLATE_SRC_Z = 0 STATIC_ANCHOR_ASSOCIATIONS = 1 ALPHA_TO_MASK_EQAA_DISABLE = 0 OVERRASTERIZATION_AMOUNT = 0 ENABLE_POSTZ_OVERRASTERIZATION = 0 SET_CONTEXT_REG: PA_SC_MODE_CNTL_1 <- WALK_SIZE = 0 WALK_ALIGNMENT = 0 WALK_ALIGN8_PRIM_FITS_ST = 0 WALK_FENCE_ENABLE = 0 WALK_FENCE_SIZE = 0 SUPERTILE_WALK_ORDER_ENABLE = 0 TILE_WALK_ORDER_ENABLE = 0 TILE_COVER_DISABLE = 0 TILE_COVER_NO_SCISSOR = 0 ZMM_LINE_EXTENT = 0 ZMM_LINE_OFFSET = 0 ZMM_RECT_EXTENT = 0 KILL_PIX_POST_HI_Z = 0 KILL_PIX_POST_DETAIL_MASK = 0 PS_ITER_SAMPLE = 0 MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE = 0 MULTI_GPU_SUPERTILE_ENABLE = 0 GPU_ID_OVERRIDE_ENABLE = 0 GPU_ID_OVERRIDE = 0 MULTI_GPU_PRIM_DISCARD_ENABLE = 0 FORCE_EOV_CNTDWN_ENABLE = 0 FORCE_EOV_REZ_ENABLE = 0 OUT_OF_ORDER_PRIMITIVE_ENABLE = 0 OUT_OF_ORDER_WATER_MARK = 0 SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_0 <- 0x5e24b500 SPI_SHADER_USER_DATA_VS_1 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e24b300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e24b600 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e24b800 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e24bd00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: PA_SC_VPORT_SCISSOR_0_TL <- TL_X = 0 TL_Y = 0 WINDOW_OFFSET_DISABLE = 1 PA_SC_VPORT_SCISSOR_0_BR <- BR_X = 4096 BR_Y = 4096 SET_CONTEXT_REG: PA_CL_VPORT_XSCALE <- 1.0f PA_CL_VPORT_XOFFSET <- 0 PA_CL_VPORT_YSCALE <- 1.0f PA_CL_VPORT_YOFFSET <- 0 PA_CL_VPORT_ZSCALE <- 1.0f PA_CL_VPORT_ZOFFSET <- 0 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 1 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 1 PERSP_CENTER_ENA = 0 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 1 PERSP_CENTER_ENA = 0 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: DB_ALPHA_TO_MASK <- ALPHA_TO_MASK_ENABLE = 0 ALPHA_TO_MASK_OFFSET0 = 2 ALPHA_TO_MASK_OFFSET1 = 2 ALPHA_TO_MASK_OFFSET2 = 2 ALPHA_TO_MASK_OFFSET3 = 2 OFFSET_ROUND = 0 SET_CONTEXT_REG: CB_BLEND0_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND1_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND2_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND3_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND4_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND5_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND6_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND7_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 SET_CONTEXT_REG: CB_COLOR_CONTROL <- DEGAMMA_ENABLE = 0 MODE = CB_DISABLE ROP3 = X_0XCC SET_CONTEXT_REG: SPI_INTERP_CONTROL_0 <- FLAT_SHADE_ENA = 1 PNT_SPRITE_ENA = 1 PNT_SPRITE_OVRD_X = SPI_PNT_SPRITE_SEL_S PNT_SPRITE_OVRD_Y = SPI_PNT_SPRITE_SEL_T PNT_SPRITE_OVRD_Z = SPI_PNT_SPRITE_SEL_0 PNT_SPRITE_OVRD_W = SPI_PNT_SPRITE_SEL_1 PNT_SPRITE_TOP_1 = 0 SET_CONTEXT_REG: PA_SU_POINT_SIZE <- HEIGHT = 0 WIDTH = 0 PA_SU_POINT_MINMAX <- MIN_SIZE = 0 MAX_SIZE = 0 PA_SU_LINE_CNTL <- WIDTH = 0 SET_CONTEXT_REG: PA_SC_MODE_CNTL_0 <- MSAA_ENABLE = 0 VPORT_SCISSOR_ENABLE = 0 LINE_STIPPLE_ENABLE = 0 SEND_UNLIT_STILES_TO_PKR = 0 SET_CONTEXT_REG: PA_SU_VTX_CNTL <- PIX_CENTER = 1 ROUND_MODE = X_TRUNCATE QUANT_MODE = X_16_8_FIXED_POINT_1_256TH SET_CONTEXT_REG: PA_SU_POLY_OFFSET_CLAMP <- 0 SET_CONTEXT_REG: PA_SU_SC_MODE_CNTL <- CULL_FRONT = 0 CULL_BACK = 0 FACE = 1 POLY_MODE = X_DISABLE_POLY_MODE POLYMODE_FRONT_PTYPE = X_DRAW_TRIANGLES POLYMODE_BACK_PTYPE = X_DRAW_TRIANGLES POLY_OFFSET_FRONT_ENABLE = 0 POLY_OFFSET_BACK_ENABLE = 0 POLY_OFFSET_PARA_ENABLE = 0 VTX_WINDOW_OFFSET_ENABLE = 0 PROVOKING_VTX_LAST = 1 PERSP_CORR_DIS = 0 MULTI_PRIM_IB_ENA = 0 SET_CONTEXT_REG: DB_DEPTH_CONTROL <- STENCIL_ENABLE = 0 Z_ENABLE = 1 Z_WRITE_ENABLE = 1 DEPTH_BOUNDS_ENABLE = 0 ZFUNC = FRAG_ALWAYS BACKFACE_ENABLE = 0 STENCILFUNC = REF_NEVER STENCILFUNC_BF = REF_NEVER ENABLE_COLOR_WRITES_ON_DEPTH_FAIL = 0 DISABLE_COLOR_WRITES_ON_DEPTH_PASS = 0 SET_CONTEXT_REG: DB_STENCIL_CONTROL <- STENCILFAIL = STENCIL_KEEP STENCILZPASS = STENCIL_KEEP STENCILZFAIL = STENCIL_KEEP STENCILFAIL_BF = STENCIL_KEEP STENCILZPASS_BF = STENCIL_KEEP STENCILZFAIL_BF = STENCIL_KEEP SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 0 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x01002240 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 2 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 0 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 1 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x012ce970 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DRAW_PREAMBLE: VGT_PRIMITIVE_TYPE <- PRIM_TYPE = DI_PT_RECTLIST IA_MULTI_VGT_PARAM <- PRIMGROUP_SIZE = 127 PARTIAL_VS_WAVE_ON = 0 SWITCH_ON_EOP = 0 PARTIAL_ES_WAVE_ON = 0 SWITCH_ON_EOI = 0 WD_SWITCH_ON_EOP = 0 MAX_PRIMGRP_IN_WAVE = 2 VGT_LS_HS_CONFIG <- NUM_PATCHES = 0 HS_NUM_INPUT_CP = 0 HS_NUM_OUTPUT_CP = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_AUTO: VGT_NUM_INDICES <- 3 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000011f NOP: Trace point ID: 287 This trace point was reached by the CP. SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 1 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 0 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_0 <- 0x5e24c300 SPI_SHADER_USER_DATA_VS_1 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e24c100 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e24c400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e24c600 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e24cb00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e24cd00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: PA_CL_VPORT_XSCALE <- 1024.0f PA_CL_VPORT_XOFFSET <- 1024.0f PA_CL_VPORT_YSCALE <- 1024.0f PA_CL_VPORT_YOFFSET <- 1024.0f PA_CL_VPORT_ZSCALE <- 0.5f PA_CL_VPORT_ZOFFSET <- 0.5f SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: DB_ALPHA_TO_MASK <- ALPHA_TO_MASK_ENABLE = 0 ALPHA_TO_MASK_OFFSET0 = 2 ALPHA_TO_MASK_OFFSET1 = 2 ALPHA_TO_MASK_OFFSET2 = 2 ALPHA_TO_MASK_OFFSET3 = 2 OFFSET_ROUND = 0 SET_CONTEXT_REG: CB_BLEND0_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND1_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND2_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND3_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND4_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND5_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND6_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 CB_BLEND7_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = BLEND_ZERO ALPHA_SRCBLEND = BLEND_ZERO ALPHA_COMB_FCN = COMB_DST_PLUS_SRC ALPHA_DESTBLEND = BLEND_ZERO SEPARATE_ALPHA_BLEND = 0 ENABLE = 0 DISABLE_ROP3 = 0 SET_CONTEXT_REG: CB_COLOR_CONTROL <- DEGAMMA_ENABLE = 0 MODE = CB_NORMAL ROP3 = X_0XCC SET_CONTEXT_REG: SPI_INTERP_CONTROL_0 <- FLAT_SHADE_ENA = 1 PNT_SPRITE_ENA = 1 PNT_SPRITE_OVRD_X = SPI_PNT_SPRITE_SEL_S PNT_SPRITE_OVRD_Y = SPI_PNT_SPRITE_SEL_T PNT_SPRITE_OVRD_Z = SPI_PNT_SPRITE_SEL_0 PNT_SPRITE_OVRD_W = SPI_PNT_SPRITE_SEL_1 PNT_SPRITE_TOP_1 = 1 SET_CONTEXT_REG: PA_SU_POINT_SIZE <- HEIGHT = 8 WIDTH = 8 PA_SU_POINT_MINMAX <- MIN_SIZE = 8 MAX_SIZE = 8 PA_SU_LINE_CNTL <- WIDTH = 8 SET_CONTEXT_REG: PA_SC_MODE_CNTL_0 <- MSAA_ENABLE = 0 VPORT_SCISSOR_ENABLE = 0 LINE_STIPPLE_ENABLE = 0 SEND_UNLIT_STILES_TO_PKR = 0 SET_CONTEXT_REG: PA_SU_VTX_CNTL <- PIX_CENTER = 1 ROUND_MODE = X_TRUNCATE QUANT_MODE = X_16_8_FIXED_POINT_1_256TH SET_CONTEXT_REG: PA_SU_POLY_OFFSET_CLAMP <- 0 SET_CONTEXT_REG: PA_SU_SC_MODE_CNTL <- CULL_FRONT = 0 CULL_BACK = 0 FACE = 1 POLY_MODE = X_DISABLE_POLY_MODE POLYMODE_FRONT_PTYPE = X_DRAW_TRIANGLES POLYMODE_BACK_PTYPE = X_DRAW_TRIANGLES POLY_OFFSET_FRONT_ENABLE = 1 POLY_OFFSET_BACK_ENABLE = 1 POLY_OFFSET_PARA_ENABLE = 1 VTX_WINDOW_OFFSET_ENABLE = 0 PROVOKING_VTX_LAST = 1 PERSP_CORR_DIS = 0 MULTI_PRIM_IB_ENA = 0 SET_CONTEXT_REG: DB_DEPTH_CONTROL <- STENCIL_ENABLE = 0 Z_ENABLE = 1 Z_WRITE_ENABLE = 1 DEPTH_BOUNDS_ENABLE = 0 ZFUNC = FRAG_LEQUAL BACKFACE_ENABLE = 0 STENCILFUNC = REF_NEVER STENCILFUNC_BF = REF_NEVER ENABLE_COLOR_WRITES_ON_DEPTH_FAIL = 0 DISABLE_COLOR_WRITES_ON_DEPTH_PASS = 0 SET_CONTEXT_REG: DB_STENCIL_CONTROL <- STENCILFAIL = STENCIL_KEEP STENCILZPASS = STENCIL_KEEP STENCILZFAIL = STENCIL_KEEP STENCILFAIL_BF = STENCIL_KEEP STENCILZPASS_BF = STENCIL_KEEP STENCILZFAIL_BF = STENCIL_KEEP SET_CONTEXT_REG: PA_SU_POLY_OFFSET_FRONT_SCALE <- 64.0f PA_SU_POLY_OFFSET_FRONT_OFFSET <- 80.0f PA_SU_POLY_OFFSET_BACK_SCALE <- 64.0f PA_SU_POLY_OFFSET_BACK_OFFSET <- 80.0f SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 1 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x012ce980 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 5 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 0 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 2 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x012ce990 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DRAW_PREAMBLE: VGT_PRIMITIVE_TYPE <- PRIM_TYPE = DI_PT_TRILIST IA_MULTI_VGT_PARAM <- PRIMGROUP_SIZE = 127 PARTIAL_VS_WAVE_ON = 0 SWITCH_ON_EOP = 0 PARTIAL_ES_WAVE_ON = 0 SWITCH_ON_EOI = 0 WD_SWITCH_ON_EOP = 0 MAX_PRIMGRP_IN_WAVE = 2 VGT_LS_HS_CONFIG <- NUM_PATCHES = 0 HS_NUM_INPUT_CP = 0 HS_NUM_OUTPUT_CP = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1962 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000120 NOP: Trace point ID: 288 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e24d100 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e24d300 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e24d500 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e24da00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e24dc00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2688 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000121 NOP: Trace point ID: 289 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e24e000 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e24e200 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e24e400 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e24e900 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e24eb00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 3342 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000122 NOP: Trace point ID: 290 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e24ef00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e24f100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e24f300 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e24f800 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e24fa00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 19344 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000123 NOP: Trace point ID: 291 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e24fe00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e250000 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e250200 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e250700 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e250900 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 14418 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000124 NOP: Trace point ID: 292 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e250d00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e250f00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e251100 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e251600 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e251800 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 19350 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000125 NOP: Trace point ID: 293 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e251c00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e251e00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e252000 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e252500 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e252700 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 19332 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000126 NOP: Trace point ID: 294 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e252b00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e252d00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e252f00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e253400 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e253600 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 5058 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000127 NOP: Trace point ID: 295 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e253a00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e253c00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e253e00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e254300 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e254500 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1236 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000128 NOP: Trace point ID: 296 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e254900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e254b00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e254d00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e255200 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e255400 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 4848 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000129 NOP: Trace point ID: 297 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e255800 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e255a00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e255c00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e256100 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e256300 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 5046 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000012a NOP: Trace point ID: 298 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e256700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e256900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e256b00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e257000 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e257200 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2136 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000012b NOP: Trace point ID: 299 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e257600 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e257800 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e257a00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1284 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000012c NOP: Trace point ID: 300 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e257e00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e258000 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e258200 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000012d NOP: Trace point ID: 301 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e258600 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e258800 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e258a00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e258f00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e259100 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2124 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000012e NOP: Trace point ID: 302 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e259500 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e259700 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e259900 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1290 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000012f NOP: Trace point ID: 303 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e259d00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e259f00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e25a100 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1518 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000130 NOP: Trace point ID: 304 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e25a500 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e25a700 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e25a900 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e25ae00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e25b000 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 8454 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000131 NOP: Trace point ID: 305 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e25b400 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e25b600 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e25b800 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 5202 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000132 NOP: Trace point ID: 306 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e25bc00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e25be00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e25c000 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 6012 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000133 NOP: Trace point ID: 307 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e25c400 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e25c600 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e25c800 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 5556 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000134 NOP: Trace point ID: 308 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e25cc00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e25ce00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e25d000 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 3438 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000135 NOP: Trace point ID: 309 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e25d400 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e25d600 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e25d800 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 3978 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000136 NOP: Trace point ID: 310 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e25dc00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e25de00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e25e000 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e25e500 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e25e700 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 7740 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000137 NOP: Trace point ID: 311 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e25eb00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e25ed00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e25ef00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 12774 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000138 NOP: Trace point ID: 312 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e25f300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e25f500 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e25f700 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 3066 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000139 NOP: Trace point ID: 313 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e25fb00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e25fd00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e25ff00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e260400 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e260600 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 942 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000013a NOP: Trace point ID: 314 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e260a00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e260c00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e260e00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 246 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000013b NOP: Trace point ID: 315 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e261200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e261400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e261600 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 444 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000013c NOP: Trace point ID: 316 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e261a00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e261c00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e261e00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 456 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000013d NOP: Trace point ID: 317 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e262700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e262900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e262b00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e263000 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e263200 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: SPI_INTERP_CONTROL_0 <- FLAT_SHADE_ENA = 1 PNT_SPRITE_ENA = 1 PNT_SPRITE_OVRD_X = SPI_PNT_SPRITE_SEL_S PNT_SPRITE_OVRD_Y = SPI_PNT_SPRITE_SEL_T PNT_SPRITE_OVRD_Z = SPI_PNT_SPRITE_SEL_0 PNT_SPRITE_OVRD_W = SPI_PNT_SPRITE_SEL_1 PNT_SPRITE_TOP_1 = 1 SET_CONTEXT_REG: PA_SU_POINT_SIZE <- HEIGHT = 8 WIDTH = 8 PA_SU_POINT_MINMAX <- MIN_SIZE = 8 MAX_SIZE = 8 PA_SU_LINE_CNTL <- WIDTH = 8 SET_CONTEXT_REG: PA_SC_MODE_CNTL_0 <- MSAA_ENABLE = 0 VPORT_SCISSOR_ENABLE = 0 LINE_STIPPLE_ENABLE = 0 SEND_UNLIT_STILES_TO_PKR = 0 SET_CONTEXT_REG: PA_SU_VTX_CNTL <- PIX_CENTER = 1 ROUND_MODE = X_TRUNCATE QUANT_MODE = X_16_8_FIXED_POINT_1_256TH SET_CONTEXT_REG: PA_SU_POLY_OFFSET_CLAMP <- 0 SET_CONTEXT_REG: PA_SU_SC_MODE_CNTL <- CULL_FRONT = 0 CULL_BACK = 1 FACE = 1 POLY_MODE = X_DISABLE_POLY_MODE POLYMODE_FRONT_PTYPE = X_DRAW_TRIANGLES POLYMODE_BACK_PTYPE = X_DRAW_TRIANGLES POLY_OFFSET_FRONT_ENABLE = 1 POLY_OFFSET_BACK_ENABLE = 1 POLY_OFFSET_PARA_ENABLE = 1 VTX_WINDOW_OFFSET_ENABLE = 0 PROVOKING_VTX_LAST = 1 PERSP_CORR_DIS = 0 MULTI_PRIM_IB_ENA = 0 SET_CONTEXT_REG: PA_SU_POLY_OFFSET_FRONT_SCALE <- 64.0f PA_SU_POLY_OFFSET_FRONT_OFFSET <- 80.0f PA_SU_POLY_OFFSET_BACK_SCALE <- 64.0f PA_SU_POLY_OFFSET_BACK_OFFSET <- 80.0f SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 0 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x012ce9a0 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 1 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x012ce9b0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 2 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 5205 VGT_DMA_BASE <- 0x4dca86e4 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 582 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000013e NOP: Trace point ID: 318 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e263b00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e263d00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e263f00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e264100 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 1 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0140b870 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 2 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0140b880 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 13575 VGT_DMA_BASE <- 0x4e9bdd76 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 3762 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000013f NOP: Trace point ID: 319 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e264a00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e264c00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e264e00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e265000 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 0 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x012ce9a0 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 1 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x012ce9b0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 2 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 9813 VGT_DMA_BASE <- 0x4e9bfada VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1890 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000140 NOP: Trace point ID: 320 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e265900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e265b00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e265d00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e266200 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e266400 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 3 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 102 VGT_DMA_BASE <- 0x3b56d0a8 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 102 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000141 NOP: Trace point ID: 321 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e266d00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e266f00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e267100 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 4 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 102 VGT_DMA_BASE <- 0x3afd4078 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 102 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000142 NOP: Trace point ID: 322 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e267a00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e267c00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e267e00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 3 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 60 VGT_DMA_BASE <- 0x3afd6000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 12 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000143 NOP: Trace point ID: 323 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e268700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e268900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e268b00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e269000 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e269200 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 19 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 114 VGT_DMA_BASE <- 0x362be090 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 114 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000144 NOP: Trace point ID: 324 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e269b00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e269d00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e269f00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e26a400 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e26a600 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 12 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 114 VGT_DMA_BASE <- 0x362be090 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 114 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000145 NOP: Trace point ID: 325 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e26af00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e26b100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e26b300 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e26b800 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e26ba00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 0 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x013afd10 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 5 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 1 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x013afd20 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 3 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 186 VGT_DMA_BASE <- 0x3b56d000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 84 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000146 NOP: Trace point ID: 326 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e26c300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e26c500 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e26c700 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 4 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 162 VGT_DMA_BASE <- 0x3afd4000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 60 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000147 NOP: Trace point ID: 327 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e26d000 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e26d200 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e26d400 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 3 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 48 VGT_DMA_BASE <- 0x3afd6018 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000148 NOP: Trace point ID: 328 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e26dd00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e26df00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e26e100 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e26e600 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e26e800 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 6 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 186 VGT_DMA_BASE <- 0x362be000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 72 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000149 NOP: Trace point ID: 329 This trace point was reached by the CP. SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 0 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 0 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e26f000 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e26f200 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e26f400 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e26f900 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 1 PERSP_CENTER_ENA = 0 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 1 PERSP_CENTER_ENA = 0 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 0 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x012ce9c0 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 4 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 0 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x012ce9d0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 1116 VGT_DMA_BASE <- 0x4dcaa6d6 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 861 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000014a NOP: Trace point ID: 330 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e270100 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e270300 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 255 VGT_DMA_BASE <- 0x4dcaad90 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 255 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000014b NOP: Trace point ID: 331 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e270b00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e270d00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 2 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 1845 VGT_DMA_BASE <- 0x4e9c391a VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1431 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000014c NOP: Trace point ID: 332 This trace point was reached by the CP. SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 1 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 0 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e271600 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e271800 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e271a00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e271f00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e272100 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 0 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0140b890 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 6 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 1 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0140b8a0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 27 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 3684 VGT_DMA_BASE <- 0x3a47d060 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 3684 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000014d NOP: Trace point ID: 333 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e272a00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e272c00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e272e00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e273000 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 1 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0140b8b0 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 6 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 2 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0140b8c0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 11 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 3684 VGT_DMA_BASE <- 0x3a47d060 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 3684 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000014e NOP: Trace point ID: 334 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e273900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e273b00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e273d00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e274200 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e274400 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 0 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0140b890 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 6 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 1 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0140b8a0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 4 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 4980 VGT_DMA_BASE <- 0x3affb000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 4860 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000014f NOP: Trace point ID: 335 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e274d00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e274f00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e275100 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e275300 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 1 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0140b8b0 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 6 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 2 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0140b8c0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 3 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 4980 VGT_DMA_BASE <- 0x3affb000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 4860 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000150 NOP: Trace point ID: 336 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e275c00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e275e00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e276000 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e276500 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e276700 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 0 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0140b890 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 6 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 1 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0140b8a0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 4 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 120 VGT_DMA_BASE <- 0x3affd5f8 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 120 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000151 NOP: Trace point ID: 337 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e277000 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e277200 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e277400 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e277600 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 1 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0140b8b0 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 6 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 2 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0140b8c0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 2 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 120 VGT_DMA_BASE <- 0x3affd5f8 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 120 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000152 NOP: Trace point ID: 338 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e277f00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e278100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e278300 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e278800 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e278a00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 0 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0140b890 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 6 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 1 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0140b8a0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 32 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 3732 VGT_DMA_BASE <- 0x3a47d000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000153 NOP: Trace point ID: 339 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e279300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e279500 SPI_SHADER_USER_DATA_PS_3 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 32 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 3732 VGT_DMA_BASE <- 0x3a47d000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000154 NOP: Trace point ID: 340 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e279f00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e27a100 SPI_SHADER_USER_DATA_PS_3 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 32 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 3732 VGT_DMA_BASE <- 0x3a47d000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000155 NOP: Trace point ID: 341 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e27ab00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e27ad00 SPI_SHADER_USER_DATA_PS_3 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 32 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 3732 VGT_DMA_BASE <- 0x3a47d000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000156 NOP: Trace point ID: 342 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e27b700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e27b900 SPI_SHADER_USER_DATA_PS_3 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 3 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 3732 VGT_DMA_BASE <- 0x3a47d000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000157 NOP: Trace point ID: 343 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e27c300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e27c500 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e27c700 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e27c900 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 1 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0140b8b0 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 6 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 2 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0140b8c0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 32 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 3732 VGT_DMA_BASE <- 0x3a47d000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000158 NOP: Trace point ID: 344 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e27d200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e27d400 SPI_SHADER_USER_DATA_PS_3 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 6 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 3732 VGT_DMA_BASE <- 0x3a47d000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000159 NOP: Trace point ID: 345 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e27d900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e27db00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e27dd00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e27e200 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e27e400 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: PA_CL_VPORT_XSCALE <- 1024.0f PA_CL_VPORT_XOFFSET <- 3072.0f PA_CL_VPORT_YSCALE <- 1024.0f PA_CL_VPORT_YOFFSET <- 1024.0f PA_CL_VPORT_ZSCALE <- 0.5f PA_CL_VPORT_ZOFFSET <- 0.5f SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: SPI_INTERP_CONTROL_0 <- FLAT_SHADE_ENA = 1 PNT_SPRITE_ENA = 1 PNT_SPRITE_OVRD_X = SPI_PNT_SPRITE_SEL_S PNT_SPRITE_OVRD_Y = SPI_PNT_SPRITE_SEL_T PNT_SPRITE_OVRD_Z = SPI_PNT_SPRITE_SEL_0 PNT_SPRITE_OVRD_W = SPI_PNT_SPRITE_SEL_1 PNT_SPRITE_TOP_1 = 1 SET_CONTEXT_REG: PA_SU_POINT_SIZE <- HEIGHT = 8 WIDTH = 8 PA_SU_POINT_MINMAX <- MIN_SIZE = 8 MAX_SIZE = 8 PA_SU_LINE_CNTL <- WIDTH = 8 SET_CONTEXT_REG: PA_SC_MODE_CNTL_0 <- MSAA_ENABLE = 0 VPORT_SCISSOR_ENABLE = 0 LINE_STIPPLE_ENABLE = 0 SEND_UNLIT_STILES_TO_PKR = 0 SET_CONTEXT_REG: PA_SU_VTX_CNTL <- PIX_CENTER = 1 ROUND_MODE = X_TRUNCATE QUANT_MODE = X_16_8_FIXED_POINT_1_256TH SET_CONTEXT_REG: PA_SU_POLY_OFFSET_CLAMP <- 0 SET_CONTEXT_REG: PA_SU_SC_MODE_CNTL <- CULL_FRONT = 0 CULL_BACK = 0 FACE = 1 POLY_MODE = X_DISABLE_POLY_MODE POLYMODE_FRONT_PTYPE = X_DRAW_TRIANGLES POLYMODE_BACK_PTYPE = X_DRAW_TRIANGLES POLY_OFFSET_FRONT_ENABLE = 1 POLY_OFFSET_BACK_ENABLE = 1 POLY_OFFSET_PARA_ENABLE = 1 VTX_WINDOW_OFFSET_ENABLE = 0 PROVOKING_VTX_LAST = 1 PERSP_CORR_DIS = 0 MULTI_PRIM_IB_ENA = 0 SET_CONTEXT_REG: PA_SU_POLY_OFFSET_FRONT_SCALE <- 64.0f PA_SU_POLY_OFFSET_FRONT_OFFSET <- 80.0f PA_SU_POLY_OFFSET_BACK_SCALE <- 64.0f PA_SU_POLY_OFFSET_BACK_OFFSET <- 80.0f SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 1 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x012ce980 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 5 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 0 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 2 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x012ce990 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1962 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000015a NOP: Trace point ID: 346 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e27e800 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e27ea00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e27ec00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e27f100 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e27f300 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2688 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000015b NOP: Trace point ID: 347 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e27f700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e27f900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e27fb00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e280000 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e280200 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 3342 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000015c NOP: Trace point ID: 348 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e280600 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e280800 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e280a00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e280f00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e281100 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 19344 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000015d NOP: Trace point ID: 349 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e281500 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e281700 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e281900 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e281e00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e282000 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 14418 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000015e NOP: Trace point ID: 350 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e282400 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e282600 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e282800 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e282d00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e282f00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 19350 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000015f NOP: Trace point ID: 351 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e283300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e283500 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e283700 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e283c00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e283e00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 19332 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000160 NOP: Trace point ID: 352 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e284200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e284400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e284600 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e284b00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e284d00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 5058 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000161 NOP: Trace point ID: 353 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e285100 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e285300 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e285500 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e285a00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e285c00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1236 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000162 NOP: Trace point ID: 354 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e286000 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e286200 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e286400 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e286900 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e286b00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 4848 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000163 NOP: Trace point ID: 355 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e286f00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e287100 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e287300 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e287800 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e287a00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 5046 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000164 NOP: Trace point ID: 356 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e287e00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e288000 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e288200 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e288700 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e288900 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2136 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000165 NOP: Trace point ID: 357 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e288d00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e288f00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e289100 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1284 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000166 NOP: Trace point ID: 358 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e289500 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e289700 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e289900 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1536 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000167 NOP: Trace point ID: 359 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e289d00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e289f00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e28a100 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e28a600 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e28a800 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2124 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000168 NOP: Trace point ID: 360 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e28ac00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e28ae00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e28b000 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1290 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000169 NOP: Trace point ID: 361 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e28b400 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e28b600 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e28b800 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1518 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000016a NOP: Trace point ID: 362 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e28bc00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e28be00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e28c000 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e28c500 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e28c700 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 8454 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000016b NOP: Trace point ID: 363 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e28cb00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e28cd00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e28cf00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 5202 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000016c NOP: Trace point ID: 364 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e28d300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e28d500 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e28d700 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 6012 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000016d NOP: Trace point ID: 365 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e28db00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e28dd00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e28df00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 5556 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000016e NOP: Trace point ID: 366 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e28e300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e28e500 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e28e700 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 3438 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000016f NOP: Trace point ID: 367 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e28eb00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e28ed00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e28ef00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 3978 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000170 NOP: Trace point ID: 368 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e28f300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e28f500 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e28f700 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e28fc00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e28fe00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 7740 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000171 NOP: Trace point ID: 369 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e290200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e290400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e290600 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 12774 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000172 NOP: Trace point ID: 370 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e290a00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e290c00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e290e00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 3066 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000173 NOP: Trace point ID: 371 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e291200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e291400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e291600 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 8730 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000174 NOP: Trace point ID: 372 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e291a00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e291c00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e291e00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 11406 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000175 NOP: Trace point ID: 373 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e292200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e292400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e292600 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 5172 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000176 NOP: Trace point ID: 374 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e292a00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e292c00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e292e00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e293300 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e293500 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 942 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000177 NOP: Trace point ID: 375 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e293900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e293b00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e293d00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 246 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000178 NOP: Trace point ID: 376 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e294100 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e294300 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e294500 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 444 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000179 NOP: Trace point ID: 377 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e294900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e294b00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e294d00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 456 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000017a NOP: Trace point ID: 378 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e295600 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e295800 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e295a00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e295f00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e296100 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: SPI_INTERP_CONTROL_0 <- FLAT_SHADE_ENA = 1 PNT_SPRITE_ENA = 1 PNT_SPRITE_OVRD_X = SPI_PNT_SPRITE_SEL_S PNT_SPRITE_OVRD_Y = SPI_PNT_SPRITE_SEL_T PNT_SPRITE_OVRD_Z = SPI_PNT_SPRITE_SEL_0 PNT_SPRITE_OVRD_W = SPI_PNT_SPRITE_SEL_1 PNT_SPRITE_TOP_1 = 1 SET_CONTEXT_REG: PA_SU_POINT_SIZE <- HEIGHT = 8 WIDTH = 8 PA_SU_POINT_MINMAX <- MIN_SIZE = 8 MAX_SIZE = 8 PA_SU_LINE_CNTL <- WIDTH = 8 SET_CONTEXT_REG: PA_SC_MODE_CNTL_0 <- MSAA_ENABLE = 0 VPORT_SCISSOR_ENABLE = 0 LINE_STIPPLE_ENABLE = 0 SEND_UNLIT_STILES_TO_PKR = 0 SET_CONTEXT_REG: PA_SU_VTX_CNTL <- PIX_CENTER = 1 ROUND_MODE = X_TRUNCATE QUANT_MODE = X_16_8_FIXED_POINT_1_256TH SET_CONTEXT_REG: PA_SU_POLY_OFFSET_CLAMP <- 0 SET_CONTEXT_REG: PA_SU_SC_MODE_CNTL <- CULL_FRONT = 0 CULL_BACK = 1 FACE = 1 POLY_MODE = X_DISABLE_POLY_MODE POLYMODE_FRONT_PTYPE = X_DRAW_TRIANGLES POLYMODE_BACK_PTYPE = X_DRAW_TRIANGLES POLY_OFFSET_FRONT_ENABLE = 1 POLY_OFFSET_BACK_ENABLE = 1 POLY_OFFSET_PARA_ENABLE = 1 VTX_WINDOW_OFFSET_ENABLE = 0 PROVOKING_VTX_LAST = 1 PERSP_CORR_DIS = 0 MULTI_PRIM_IB_ENA = 0 SET_CONTEXT_REG: PA_SU_POLY_OFFSET_FRONT_SCALE <- 64.0f PA_SU_POLY_OFFSET_FRONT_OFFSET <- 80.0f PA_SU_POLY_OFFSET_BACK_SCALE <- 64.0f PA_SU_POLY_OFFSET_BACK_OFFSET <- 80.0f SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 0 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x012ce9a0 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 1 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x012ce9b0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 7197 VGT_DMA_BASE <- 0x4e3de1ac VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1926 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000017b NOP: Trace point ID: 379 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e296a00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e296c00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e296e00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e297300 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e297500 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 6369 VGT_DMA_BASE <- 0x4dca7dcc VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1164 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000017c NOP: Trace point ID: 380 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e297e00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e298000 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e298200 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e298400 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 1 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0140b870 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 2 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0140b880 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 6369 VGT_DMA_BASE <- 0x4dca7dcc VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1164 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000017d NOP: Trace point ID: 381 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e298d00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e298f00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e299100 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e299300 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 0 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x012ce9a0 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 1 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x012ce9b0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 2 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 5205 VGT_DMA_BASE <- 0x4dca86e4 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 582 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000017e NOP: Trace point ID: 382 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e299c00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e299e00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e29a000 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e29a200 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 1 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0140b870 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 2 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0140b880 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 2 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 5205 VGT_DMA_BASE <- 0x4dca86e4 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 582 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000017f NOP: Trace point ID: 383 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e29ab00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e29ad00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e29af00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e29b100 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 0 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x012ce9a0 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 1 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x012ce9b0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 13575 VGT_DMA_BASE <- 0x4e9bdd76 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 3762 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000180 NOP: Trace point ID: 384 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e29ba00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e29bc00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e29be00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e29c000 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 1 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0140b870 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 2 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0140b880 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 13575 VGT_DMA_BASE <- 0x4e9bdd76 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 3762 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000181 NOP: Trace point ID: 385 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e29c900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e29cb00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e29cd00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e29cf00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 0 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x012ce9a0 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 1 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x012ce9b0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 2 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 9813 VGT_DMA_BASE <- 0x4e9bfada VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1890 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000182 NOP: Trace point ID: 386 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e29d800 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e29da00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e29dc00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e29de00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 1 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0140b870 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 2 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0140b880 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 9813 VGT_DMA_BASE <- 0x4e9bfada VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1890 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000183 NOP: Trace point ID: 387 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e29e700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e29e900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e29eb00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e29f000 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e29f200 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 0 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x012ce9a0 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 1 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x012ce9b0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 4 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 1599 VGT_DMA_BASE <- 0x36b322fc VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 150 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000184 NOP: Trace point ID: 388 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e29fb00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e29fd00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e29ff00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 4 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 4488 VGT_DMA_BASE <- 0x3623d672 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 450 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000185 NOP: Trace point ID: 389 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2a0800 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2a0a00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e2a0c00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2a0e00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 1 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0140b870 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 2 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0140b880 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 9015 VGT_DMA_BASE <- 0x2cea9f0e VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1482 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000186 NOP: Trace point ID: 390 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2a1700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2a1900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e2a1b00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2a1d00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 0 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x012ce9a0 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 1 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x012ce9b0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 3 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 7533 VGT_DMA_BASE <- 0x2ceaaaa2 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 750 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000187 NOP: Trace point ID: 391 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2a2600 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2a2800 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e2a2a00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2a2c00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 1 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0140b870 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 2 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0140b880 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 7533 VGT_DMA_BASE <- 0x2ceaaaa2 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 750 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000188 NOP: Trace point ID: 392 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2a3500 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2a3700 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e2a3900 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2a3b00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 0 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x012ce9a0 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 7 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 1 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x012ce9b0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 4 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 5283 VGT_DMA_BASE <- 0x27f6b302 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 288 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000189 NOP: Trace point ID: 393 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2a4400 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2a4600 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e2a4800 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e2a4d00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2a4f00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 8 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 102 VGT_DMA_BASE <- 0x3b56d0a8 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 102 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000018a NOP: Trace point ID: 394 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2a5800 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2a5a00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2a5c00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 7 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 102 VGT_DMA_BASE <- 0x3afd4078 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 102 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000018b NOP: Trace point ID: 395 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2a6500 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2a6700 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2a6900 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 7 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 60 VGT_DMA_BASE <- 0x3afd6000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 12 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000018c NOP: Trace point ID: 396 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2a7200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2a7400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e2a7600 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e2a7b00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2a7d00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 32 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 114 VGT_DMA_BASE <- 0x362be090 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 114 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000018d NOP: Trace point ID: 397 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2a8600 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2a8800 SPI_SHADER_USER_DATA_PS_3 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 5 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 114 VGT_DMA_BASE <- 0x362be090 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 114 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000018e NOP: Trace point ID: 398 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2a9200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2a9400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e2a9600 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e2a9b00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2a9d00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 23 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 114 VGT_DMA_BASE <- 0x362be090 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 114 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000018f NOP: Trace point ID: 399 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2aa600 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2aa800 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e2aaa00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e2aaf00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2ab100 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 0 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x013afd10 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 5 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 1 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x013afd20 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 8 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 186 VGT_DMA_BASE <- 0x3b56d000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 84 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000190 NOP: Trace point ID: 400 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2aba00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2abc00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2abe00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 7 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 162 VGT_DMA_BASE <- 0x3afd4000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 60 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000191 NOP: Trace point ID: 401 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2ac700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2ac900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2acb00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 7 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 48 VGT_DMA_BASE <- 0x3afd6018 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000192 NOP: Trace point ID: 402 This trace point was reached by the CP. SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 0 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 0 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2ad300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2ad500 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e2ad700 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2adc00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 1 PERSP_CENTER_ENA = 0 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 1 PERSP_CENTER_ENA = 0 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 0 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x012ce9c0 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 4 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 0 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x012ce9d0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 312 VGT_DMA_BASE <- 0x4e3e1776 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 312 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000193 NOP: Trace point ID: 403 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2ae400 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2ae600 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 3 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 1116 VGT_DMA_BASE <- 0x4dcaa6d6 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 861 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000194 NOP: Trace point ID: 404 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2aee00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2af000 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 255 VGT_DMA_BASE <- 0x4dcaad90 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 255 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000195 NOP: Trace point ID: 405 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2af800 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2afa00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 3 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 1845 VGT_DMA_BASE <- 0x4e9c391a VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1431 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000196 NOP: Trace point ID: 406 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2b0200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2b0400 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 4 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 294 VGT_DMA_BASE <- 0x27f6d9fc VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 294 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000197 NOP: Trace point ID: 407 This trace point was reached by the CP. SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY = 0 STENCIL_COPY = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 DECOMPRESS_ENABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 0 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 ZPASS_ENABLE = 0 ZFAIL_ENABLE = 0 SFAIL_ENABLE = 0 DBFAIL_ENABLE = 0 SLICE_EVEN_ENABLE = 0 SLICE_ODD_ENABLE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- PARTIAL_SQUAD_LAUNCH_CONTROL = PSLC_AUTO PARTIAL_SQUAD_LAUNCH_COUNTDOWN = 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION = 0 DISABLE_SMEM_EXPCLEAR_OPTIMIZATION = 0 DISABLE_COLOR_ON_VALIDATION = 0 DECOMPRESS_Z_ON_FLUSH = 0 DISABLE_REG_SNOOP = 0 DEPTH_BOUNDS_HIER_DEPTH_DISABLE = 0 SEPARATE_HIZS_FUNC_ENABLE = 0 HIZ_ZFUNC = 0 HIS_SFUNC_FF = 0 HIS_SFUNC_BF = 0 PRESERVE_ZRANGE = 0 PRESERVE_SRESULTS = 0 DISABLE_FAST_PASS = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_TEST_VAL_EXPORT_ENABLE = 0 STENCIL_OP_VAL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 1 COVERAGE_TO_MASK_ENABLE = 0 MASK_EXPORT_ENABLE = 0 EXEC_ON_HIER_FAIL = 0 EXEC_ON_NOOP = 0 ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2b0d00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2b0f00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e2b1100 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e2b1600 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2b1800 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 0 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0140b890 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 6 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 1 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0140b8a0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 4 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 120 VGT_DMA_BASE <- 0x3affd5f8 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 120 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000198 NOP: Trace point ID: 408 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2b2100 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2b2300 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e2b2500 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2b2700 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 1 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0140b8b0 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 6 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 2 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0140b8c0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 2 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 120 VGT_DMA_BASE <- 0x3affd5f8 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 120 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x00000199 NOP: Trace point ID: 409 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2b3000 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2b3200 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e2b3400 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e2b3900 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2b3b00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 0 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0140b890 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 6 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 1 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0140b8a0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 32 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 3732 VGT_DMA_BASE <- 0x3a47d000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000019a NOP: Trace point ID: 410 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2b4400 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2b4600 SPI_SHADER_USER_DATA_PS_3 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 32 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 3732 VGT_DMA_BASE <- 0x3a47d000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000019b NOP: Trace point ID: 411 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2b5000 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2b5200 SPI_SHADER_USER_DATA_PS_3 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 32 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 3732 VGT_DMA_BASE <- 0x3a47d000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000019c NOP: Trace point ID: 412 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2b5c00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2b5e00 SPI_SHADER_USER_DATA_PS_3 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 32 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 3732 VGT_DMA_BASE <- 0x3a47d000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000019d NOP: Trace point ID: 413 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2b6800 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2b6a00 SPI_SHADER_USER_DATA_PS_3 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 3 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 3732 VGT_DMA_BASE <- 0x3a47d000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000019e NOP: Trace point ID: 414 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2b7400 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2b7600 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e2b7800 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2b7a00 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 1 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x0140b8b0 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 6 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 3 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 2 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x0140b8c0 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 32 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 3732 VGT_DMA_BASE <- 0x3a47d000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x0000019f NOP: Trace point ID: 415 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2b8300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2b8500 SPI_SHADER_USER_DATA_PS_3 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 10 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 3732 VGT_DMA_BASE <- 0x3a47d000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 48 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000001a0 NOP: Trace point ID: 416 This trace point was reached by the CP. SET_CONTEXT_REG: CB_TARGET_MASK <- TARGET0_ENABLE = 0 TARGET1_ENABLE = 0 TARGET2_ENABLE = 0 TARGET3_ENABLE = 0 TARGET4_ENABLE = 0 TARGET5_ENABLE = 0 TARGET6_ENABLE = 0 TARGET7_ENABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 VS_OUT_MISC_SIDE_BUS_ENA = 1 USE_VTX_GS_CUT_FLAG = 0 USE_VTX_LINE_WIDTH = 0 SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 3 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2b8a00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2b8c00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e2b8e00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e2b9300 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2b9500 SPI_SHADER_USER_DATA_VS_9 <- 1 SET_CONTEXT_REG: PA_CL_VPORT_XSCALE <- 1024.0f PA_CL_VPORT_XOFFSET <- 1024.0f PA_CL_VPORT_YSCALE <- 1024.0f PA_CL_VPORT_YOFFSET <- 3072.0f PA_CL_VPORT_ZSCALE <- 0.5f PA_CL_VPORT_ZOFFSET <- 0.5f SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- OFFSET = 0 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SPI_PS_INPUT_CNTL_1 <- OFFSET = 1 DEFAULT_VAL = X_0_0F FLAT_SHADE = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 DUP = 0 FP16_INTERP_MODE = 0 USE_DEFAULT_ATTR1 = 0 DEFAULT_VAL_ATTR1 = 0 PT_SPRITE_TEX_ATTR1 = 0 ATTR0_VALID = 0 ATTR1_VALID = 0 SET_CONTEXT_REG: SPI_PS_INPUT_ENA <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SPI_PS_INPUT_ADDR <- PERSP_SAMPLE_ENA = 0 PERSP_CENTER_ENA = 1 PERSP_CENTROID_ENA = 0 PERSP_PULL_MODEL_ENA = 0 LINEAR_SAMPLE_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINE_STIPPLE_TEX_ENA = 0 POS_X_FLOAT_ENA = 0 POS_Y_FLOAT_ENA = 0 POS_Z_FLOAT_ENA = 0 POS_W_FLOAT_ENA = 0 FRONT_FACE_ENA = 0 ANCILLARY_ENA = 0 SAMPLE_COVERAGE_ENA = 0 POS_FIXED_PT_ENA = 0 SET_CONTEXT_REG: SPI_INTERP_CONTROL_0 <- FLAT_SHADE_ENA = 1 PNT_SPRITE_ENA = 1 PNT_SPRITE_OVRD_X = SPI_PNT_SPRITE_SEL_S PNT_SPRITE_OVRD_Y = SPI_PNT_SPRITE_SEL_T PNT_SPRITE_OVRD_Z = SPI_PNT_SPRITE_SEL_0 PNT_SPRITE_OVRD_W = SPI_PNT_SPRITE_SEL_1 PNT_SPRITE_TOP_1 = 1 SET_CONTEXT_REG: PA_SU_POINT_SIZE <- HEIGHT = 8 WIDTH = 8 PA_SU_POINT_MINMAX <- MIN_SIZE = 8 MAX_SIZE = 8 PA_SU_LINE_CNTL <- WIDTH = 8 SET_CONTEXT_REG: PA_SC_MODE_CNTL_0 <- MSAA_ENABLE = 0 VPORT_SCISSOR_ENABLE = 0 LINE_STIPPLE_ENABLE = 0 SEND_UNLIT_STILES_TO_PKR = 0 SET_CONTEXT_REG: PA_SU_VTX_CNTL <- PIX_CENTER = 1 ROUND_MODE = X_TRUNCATE QUANT_MODE = X_16_8_FIXED_POINT_1_256TH SET_CONTEXT_REG: PA_SU_POLY_OFFSET_CLAMP <- 0 SET_CONTEXT_REG: PA_SU_SC_MODE_CNTL <- CULL_FRONT = 0 CULL_BACK = 0 FACE = 1 POLY_MODE = X_DISABLE_POLY_MODE POLYMODE_FRONT_PTYPE = X_DRAW_TRIANGLES POLYMODE_BACK_PTYPE = X_DRAW_TRIANGLES POLY_OFFSET_FRONT_ENABLE = 1 POLY_OFFSET_BACK_ENABLE = 1 POLY_OFFSET_PARA_ENABLE = 1 VTX_WINDOW_OFFSET_ENABLE = 0 PROVOKING_VTX_LAST = 1 PERSP_CORR_DIS = 0 MULTI_PRIM_IB_ENA = 0 SET_CONTEXT_REG: PA_SU_POLY_OFFSET_FRONT_SCALE <- 64.0f PA_SU_POLY_OFFSET_FRONT_OFFSET <- 80.0f PA_SU_POLY_OFFSET_BACK_SCALE <- 64.0f PA_SU_POLY_OFFSET_BACK_OFFSET <- 80.0f SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF CUT_MODE = GS_CUT_1024 GS_C_PACK_EN = 0 ES_PASSTHRU = 0 COMPUTE_MODE = 0 FAST_COMPUTE_MODE = 0 ELEMENT_INFO_EN = 0 PARTIAL_THD_AT_EOI = 0 SUPPRESS_CUTS = 0 ES_WRITE_OPTIMIZE = 0 GS_WRITE_OPTIMIZE = 0 ONCHIP = X_0_OFFCHIP_GS SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 DISABLE_RESET_ON_EOI = 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_EXPORT_COUNT = 1 VS_HALF_PACK = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SPI_SHADER_POS_FORMAT <- POS0_EXPORT_FORMAT = SPI_SHADER_4COMP POS1_EXPORT_FORMAT = SPI_SHADER_NONE POS2_EXPORT_FORMAT = SPI_SHADER_NONE POS3_EXPORT_FORMAT = SPI_SHADER_NONE SET_SH_REG: SPI_SHADER_PGM_LO_VS <- 0x012ce980 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 5 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 0 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 12 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 DISPATCH_DRAW_EN = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_CNTL = 0 PERSP_CENTROID_CNTL = 0 LINEAR_CENTER_CNTL = 0 LINEAR_CENTROID_CNTL = 0 POS_FLOAT_LOCATION = X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT POS_FLOAT_ULC = 0 FRONT_FACE_ALL_BITS = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL <- NUM_INTERP = 2 PARAM_GEN = 0 FOG_ADDR = 0 BC_OPTIMIZE_DISABLE = 1 PASS_FOG_THROUGH_PS = 0 SET_CONTEXT_REG: SPI_SHADER_Z_FORMAT <- Z_EXPORT_FORMAT = SPI_SHADER_ZERO SPI_SHADER_COL_FORMAT <- COL0_EXPORT_FORMAT = SPI_SHADER_32_ABGR COL1_EXPORT_FORMAT = SPI_SHADER_ZERO COL2_EXPORT_FORMAT = SPI_SHADER_ZERO COL3_EXPORT_FORMAT = SPI_SHADER_ZERO COL4_EXPORT_FORMAT = SPI_SHADER_ZERO COL5_EXPORT_FORMAT = SPI_SHADER_ZERO COL6_EXPORT_FORMAT = SPI_SHADER_ZERO COL7_EXPORT_FORMAT = SPI_SHADER_ZERO SET_CONTEXT_REG: CB_SHADER_MASK <- OUTPUT0_ENABLE = 15 OUTPUT1_ENABLE = 0 OUTPUT2_ENABLE = 0 OUTPUT3_ENABLE = 0 OUTPUT4_ENABLE = 0 OUTPUT5_ENABLE = 0 OUTPUT6_ENABLE = 0 OUTPUT7_ENABLE = 0 SET_SH_REG: SPI_SHADER_PGM_LO_PS <- 0x012ce990 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 0 SGPRS = 9 PRIORITY = 0 FLOAT_MODE = 0 PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 10 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN = 0 EXCP_EN_CIK = 0 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1962 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000001a1 NOP: Trace point ID: 417 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2b9900 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2b9b00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e2b9d00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e2ba200 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2ba400 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2688 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000001a2 NOP: Trace point ID: 418 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2ba800 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2baa00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e2bac00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e2bb100 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2bb300 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 3342 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000001a3 NOP: Trace point ID: 419 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2bb700 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2bb900 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x5e2bbb00 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x5e2bc000 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2bc200 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 19344 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000001a4 NOP: Trace point ID: 420 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2bc600 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x5e2bc800 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x5e2bca00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2820 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000001a5 NOP: Trace point ID: 421 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x5e2bce00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x29400000 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x29400200 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x29400700 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x29400900 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 14418 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000001a6 NOP: Trace point ID: 422 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x29400d00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x29400f00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x29401100 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2100 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000001a7 NOP: Trace point ID: 423 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x29401500 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x29401700 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x29401900 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x29401e00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x29402000 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 19350 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000001a8 NOP: Trace point ID: 424 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x29402400 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x29402600 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x29402800 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2832 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000001a9 NOP: Trace point ID: 425 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x29402c00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x29402e00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x29403000 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x29403500 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x29403700 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 19332 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000001aa NOP: Trace point ID: 426 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x29403b00 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x29403d00 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x29403f00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 2832 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000001ab NOP: Trace point ID: 427 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x29404300 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x29404500 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x29404700 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x29404c00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x29404e00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 5058 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000001ac NOP: Trace point ID: 428 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x29405200 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x29405400 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x29405600 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x29405b00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x29405d00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 1236 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000001ad NOP: Trace point ID: 429 This trace point was reached by the CP. SET_SH_REG: SPI_SHADER_USER_DATA_VS_2 <- 0x29406100 SPI_SHADER_USER_DATA_VS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_2 <- 0x29406300 SPI_SHADER_USER_DATA_PS_3 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_6 <- 0x29406500 SPI_SHADER_USER_DATA_PS_7 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_PS_4 <- 0x29406a00 SPI_SHADER_USER_DATA_PS_5 <- 1 SET_SH_REG: SPI_SHADER_USER_DATA_VS_8 <- 0x29406c00 SPI_SHADER_USER_DATA_VS_9 <- 1 INDEX_TYPE: VGT_DMA_INDEX_TYPE <- INDEX_TYPE = VGT_INDEX_16 SWAP_MODE = VGT_DMA_SWAP_NONE BUF_TYPE = VGT_DMA_BUF_MEM RDREQ_POLICY = VGT_POLICY_LRU ATC = 0 NOT_EOP = 0 REQ_PATH = 0 MTYPE = 0 NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_2: VGT_DMA_MAX_SIZE <- 0x00008454 VGT_DMA_BASE <- 0x038b8000 VGT_DMA_BASE_HI <- BASE_ADDR = 1 VGT_NUM_INDICES <- 4848 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000001ae NOP: Trace point ID: 430 This trace point was reached by the CP. EVENT_WRITE: VGT_EVENT_INITIATOR <- EVENT_TYPE = FLUSH_AND_INV_CB_META EVENT_INDEX <- 0 INV_L2 <- 0 EVENT_WRITE: VGT_EVENT_INITIATOR <- EVENT_TYPE = FLUSH_AND_INV_DB_META EVENT_INDEX <- 0 INV_L2 <- 0 EVENT_WRITE: VGT_EVENT_INITIATOR <- EVENT_TYPE = PS_PARTIAL_FLUSH EVENT_INDEX <- 4 INV_L2 <- 0 ACQUIRE_MEM: CP_COHER_CNTL <- DEST_BASE_0_ENA = 0 DEST_BASE_1_ENA = 0 TC_SD_ACTION_ENA = 0 TC_NC_ACTION_ENA = 0 CB0_DEST_BASE_ENA = 1 CB1_DEST_BASE_ENA = 1 CB2_DEST_BASE_ENA = 1 CB3_DEST_BASE_ENA = 1 CB4_DEST_BASE_ENA = 1 CB5_DEST_BASE_ENA = 1 CB6_DEST_BASE_ENA = 1 CB7_DEST_BASE_ENA = 1 DB_DEST_BASE_ENA = 1 TCL1_VOL_ACTION_ENA = 0 TC_VOL_ACTION_ENA = 0 TC_WB_ACTION_ENA = 1 DEST_BASE_2_ENA = 0 DEST_BASE_3_ENA = 0 TCL1_ACTION_ENA = 1 TC_ACTION_ENA = 1 CB_ACTION_ENA = 1 DB_ACTION_ENA = 1 SH_KCACHE_ACTION_ENA = 0 SH_KCACHE_VOL_ACTION_ENA = 0 SH_ICACHE_ACTION_ENA = 0 SH_KCACHE_WB_ACTION_ENA = 0 SH_SD_ACTION_ENA = 0 CP_COHER_SIZE <- 0xffffffff CP_COHER_SIZE_HI <- COHER_SIZE_HI_256B = 255 CP_COHER_BASE <- 0 CP_COHER_BASE_HI <- COHER_BASE_HI_256B = 0 POLL_INTERVAL <- 10 WRITE_DATA: CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC DST_ADDR_LO <- 0x00111000 DST_ADDR_HI <- 1 0x000001af NOP: Trace point ID: 431 !!!!! This is the last trace point that was reached by the CP !!!!! ------------------- IB end -------------------