Running all tests... nv01_pgraph... nv01_pgraph: n/a nv10_tile... nv10_tile: n/a mpeg_crypt... test_sess_key: passed mpeg_crypt: passed nv50_ptherm... nv50_ptherm: n/a nv84_ptherm... nv84_read_temperature... test_ADC_enabled: passed test_read_temperature: passed test_read_calibrated_temperature: passed test_credible_temperature: passed nv84_read_temperature: passed nv84_sensor_calibration... test_temperature_enable_state: passed test_temperature_force: n/a test_temperature_calibration_hw: FAILED test_temperature_calibration_sw: FAILED nv84_sensor_calibration: FAILED nv84_temperature_thresholds... div 0 => 32.000000, cycles 0x7f: delay 53856; expected delay 14671 (prediction_error = 267.075984%) test_threshold_crit_filter: FAILED div 0 => 32.000000, cycles 0x7f: delay 54368; expected delay 14671 (prediction_error = 270.565748%) test_threshold_1_filter: FAILED div 0 => 32.000000, cycles 0x7f: delay 54240; expected delay 14671 (prediction_error = 269.693307%) test_threshold_2_filter: FAILED div 0 => 32.000000, cycles 0x7f: delay 54272; expected delay 14671 (prediction_error = 269.911417%) test_threshold_3_filter: FAILED div 0 => 32.000000, cycles 0x7f: delay 53664; expected delay 14671 (prediction_error = 265.767323%) test_threshold_4_filter: FAILED test_threshold_crit_state: passed test_threshold_1_state: passed test_threshold_2_state: passed test_threshold_3_state: passed test_threshold_4_state: passed test_threshold_crit_intr_rising: passed test_threshold_crit_intr_falling: passed test_threshold_crit_intr_both: passed test_threshold_1_intr_rising: passed test_threshold_1_intr_falling: passed test_threshold_1_intr_both: passed test_threshold_2_intr_rising: passed test_threshold_2_intr_falling: passed test_threshold_2_intr_both: passed test_threshold_3_intr_rising: passed test_threshold_3_intr_falling: passed test_threshold_3_intr_both: passed test_threshold_4_intr_rising: passed test_threshold_4_intr_falling: passed test_threshold_4_intr_both: passed nv84_temperature_thresholds: FAILED nv84_clock_gating... test_clock_gating_force_div_only: passed test_clock_gating_force_div_pwm: passed test_clock_gating_thermal_protect_crit: passed test_clock_gating_thermal_protect_threshold_2: FAILED test_clock_gating_thermal_protect_threshold_4: passed nv84_clock_gating: FAILED nv84_ptherm: FAILED vp2_macro... Mismatch on try 0 for insn 0x78f2167de1522d89 what initial expected real LUT[0x00] 0x2c8123e6 0x2c8123e6 0x2c8123e6 LUT[0x01] 0xa69be725 0xa69be725 0x00000000 * LUT[0x02] 0x461e7a7c 0x461e7a7c 0x461e7a7c LUT[0x03] 0xf318d7e3 0xf318d7e3 0x00000000 * LUT[0x04] 0x40f11939 0x40f11939 0x00000000 * LUT[0x05] 0xc8cf0b84 0xc8cf0b84 0xc8cf0b84 LUT[0x06] 0x2051a683 0x2051a683 0x00000000 * LUT[0x07] 0xfad7531d 0xfad7531d 0x00000000 * LUT[0x08] 0xa7e40a78 0xa7e40a78 0xa7e40a78 LUT[0x09] 0xfcb0137b 0xfcb0137b 0x00000000 * LUT[0x0a] 0xd0bacfe2 0xd0bacfe2 0x00000000 * LUT[0x0b] 0xfe102eb8 0xfe102eb8 0xfe102eb8 LUT[0x0c] 0xa16f866e 0xa16f866e 0x00000000 * LUT[0x0d] 0x526442b9 0x526442b9 0x526442b9 LUT[0x0e] 0x89a508e3 0x89a508e3 0x00000000 * LUT[0x0f] 0x79da7bd6 0x79da7bd6 0x00000000 * LUT[0x10] 0xccc07b63 0xccc07b63 0xccc07b63 LUT[0x11] 0xc012730a 0xc012730a 0x00000000 * LUT[0x12] 0x7624490c 0x7624490c 0x00000000 * LUT[0x13] 0x4ae92152 0x4ae92152 0x4ae92152 LUT[0x14] 0x4b962d69 0x4b962d69 0x00000000 * LUT[0x15] 0xa3fd6e24 0xa3fd6e24 0x00000000 * LUT[0x16] 0x84a3bd93 0x84a3bd93 0x00000000 * LUT[0x17] 0x8b5b5528 0x8b5b5528 0x00000000 * LUT[0x18] 0x2145bdf6 0x2145bdf6 0x2145bdf6 LUT[0x19] 0xb9439f9f 0xb9439f9f 0x00000000 * LUT[0x1a] 0x6a242d11 0x6a242d11 0x00000000 * LUT[0x1b] 0x03d0c814 0x03d0c814 0x03d0c814 LUT[0x1c] 0xeab618b3 0xeab618b3 0x00000000 * LUT[0x1d] 0xf0596345 0xf0596345 0x00000000 * LUT[0x1e] 0xcf506276 0xcf506276 0xcf506276 LUT[0x1f] 0xe6226778 0xe6226778 0x00000000 * PARAM[0][0] 0x00000092 0x00000092 0x00000000 * PARAM[0][1] 0x12cad982 0x12cad982 0x00000000 * PARAM[0][2] 0xdce6f4e0 0xdce6f4e0 0xdce6f4e0 PARAM[0][3] 0x20bf1624 0x20bf1624 0x20bf1624 PARAM[0][4] 0x91e31f72 0x91e31f72 0x00000000 * PARAM[0][5] 0x13964f15 0x13964f15 0x00000000 * PARAM[0][6] 0x00000033 0x00000033 0x00000033 PARAM[0][7] 0x92b66661 0x92b66661 0x00000000 * PARAM[1][0] 0x0000008c 0x0000008c 0x00000000 * PARAM[1][1] 0xabc60026 0xabc60026 0x00000033 * PARAM[1][2] 0x8d18178d 0x8d18178d 0x00000000 * PARAM[1][3] 0xf40bf58c 0xf40bf58c 0x00000000 * PARAM[1][4] 0x276cacfa 0x276cacfa 0xf40bf58c * PARAM[1][5] 0x777ee0d2 0x777ee0d2 0x00000000 * PARAM[1][6] 0x00000033 0x00000033 0x00000000 * PARAM[1][7] 0x9e6b63dd 0x9e6b63dd 0x00000033 * REG[0] 0x0000001c 0x0000001c 0x00000000 * REG[1] 0x00000018 0x00000018 0x00000000 * REG[2] 0xc487be79 0xc487be79 0xc487be79 REG[3] 0x000000de 0x000000de 0x00000000 * REG[4] 0x000000be 0x000000be 0x00000000 * REG[5] 0x00000055 0x00000055 0x00000055 PRED 0x00000001 0x00000001 0x00000000 * PARAM_SEL 0x00000001 0x00000000 0x00000000 DATA_HI 0x000000ea 0x000000ea 0x00000000 * LUT_IDX 0x00000016 0x00000016 0x00000000 * CACC 0xf675e1fd 0xf675e1fd 0xf675e1fd CMD 0x00004974 0x00004974 0x00000000 * DATA_LO 0x25d645fd 0x25d645fd 0x25d645fd DACC 0x6b94aab9 0x6b94aab9 0x00000000 * test_isa: FAILED vp2_macro: FAILED pvcomp_isa... pvcomp_isa: n/a vp1... vp1: n/a