From 42800396ef6f433d67077b02ddb4ddffc8e06d3a Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Wed, 30 Apr 2014 22:59:39 -0400 Subject: [PATCH] drm/radeon: Program TCC_DISABLE on SI v2 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit v2: Disable TCCs which CGTS_TCC_DISABLE says cannot be used, coding style cleanups Signed-off-by: Michel Dänzer --- drivers/gpu/drm/radeon/si.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index 07037e3..babbd59 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c @@ -3091,6 +3091,7 @@ static void si_gpu_init(struct radeon_device *rdev) u32 sx_debug_1; u32 hdp_host_path_cntl; u32 tmp; + u32 cgts_tcc_disable; int i, j; switch (rdev->family) { @@ -3287,6 +3288,12 @@ static void si_gpu_init(struct radeon_device *rdev) rdev->config.si.max_sh_per_se, rdev->config.si.max_backends_per_se); + cgts_tcc_disable = 0xffff0000; + for (i = 0; i < rdev->config.si.max_texture_channel_caches; i++) + cgts_tcc_disable &= ~(1 << (16 + i)); + cgts_tcc_disable |= RREG32(CGTS_TCC_DISABLE); + WREG32(CGTS_USER_TCC_DISABLE, cgts_tcc_disable); + si_setup_spi(rdev, rdev->config.si.max_shader_engines, rdev->config.si.max_sh_per_se, rdev->config.si.max_cu_per_sh); -- 2.6.2