SHADER KEY instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} as_es = 0 as_ls = 0 export_prim_id = 0 VERT DCL IN[0] DCL IN[1] DCL IN[2] DCL IN[3] DCL OUT[0], POSITION DCL OUT[1], GENERIC[0] DCL OUT[2], GENERIC[1] DCL OUT[3], GENERIC[2] DCL OUT[4], GENERIC[3] DCL CONST[1][0..16] DCL CONST[2][0..120] DCL TEMP[0..2], LOCAL DCL TEMP[3..5], ARRAY(1), LOCAL DCL TEMP[6..8], ARRAY(2), LOCAL DCL TEMP[9..11], LOCAL IMM[0] FLT32 { 2.0000, -1.0000, 1.0000, 0.0000} IMM[1] UINT32 {0, 16, 32, 224} IMM[2] UINT32 {48, 1, 800, 156} 0: MAD TEMP[0], IN[2], IMM[0].xxxx, IMM[0].yyyy 1: MAD TEMP[1].xyz, IN[1].xyzz, IMM[0].xxxx, IMM[0].yyyy 2: MUL TEMP[2].xyz, TEMP[0].zxyy, TEMP[1].yzxx 3: MAD TEMP[1].xyz, TEMP[0].yzxx, TEMP[1].zxyy, -TEMP[2].xyzz 4: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[0].wwww 5: MUL TEMP[2].xyz, TEMP[1].zxyy, TEMP[0].yzxx 6: MAD TEMP[1].xyz, TEMP[1].yzxx, TEMP[0].zxyy, -TEMP[2].xyzz 7: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[0].wwww 8: MOV TEMP[3].xyz, CONST[1][0].xyzx 9: MOV TEMP[4].xyz, CONST[1][1].xyzx 10: MOV TEMP[5].xyz, CONST[1][2].xyzx 11: MOV TEMP[6], TEMP[3].xyzz 12: MOV TEMP[7], TEMP[4].xyzz 13: MOV TEMP[8], TEMP[5].xyzz 14: MUL TEMP[6].xyz, TEMP[3].xyzz, CONST[1][14].xxxx 15: MUL TEMP[7].xyz, TEMP[7].xyzz, CONST[1][14].yyyy 16: MUL TEMP[8].xyz, TEMP[8].xyzz, CONST[1][14].zzzz 17: MOV TEMP[2].w, IMM[0].zzzz 18: MUL TEMP[9].xyz, CONST[1][0].xyzz, IN[0].xxxx 19: MAD TEMP[9].xyz, CONST[1][1].xyzz, IN[0].yyyy, TEMP[9].xyzz 20: MAD TEMP[9].xyz, CONST[1][2].xyzz, IN[0].zzzz, TEMP[9].xyzz 21: ADD TEMP[10].xyz, CONST[1][3].xyzz, CONST[2][50].xyzz 22: ADD TEMP[2].xyz, TEMP[9].xyzz, TEMP[10].xyzz 23: MUL TEMP[9], CONST[2][1], TEMP[2].yyyy 24: MAD TEMP[9], CONST[2][0], TEMP[2].xxxx, TEMP[9] 25: MAD TEMP[9], CONST[2][2], TEMP[2].zzzz, TEMP[9] 26: ADD TEMP[9], CONST[2][3], TEMP[9] 27: MOV TEMP[10].w, IMM[0].wwww 28: MUL TEMP[11].xyz, TEMP[1].yyyy, TEMP[7].xyzz 29: MAD TEMP[11].xyz, TEMP[1].xxxx, TEMP[6].xyzz, TEMP[11].xyzz 30: MAD TEMP[10].xyz, TEMP[1].zzzz, TEMP[8].xyzz, TEMP[11].xyzz 31: MUL TEMP[1].xyz, TEMP[0].yyyy, TEMP[7].xyzz 32: MAD TEMP[1].xyz, TEMP[0].xxxx, TEMP[6].xyzz, TEMP[1].xyzz 33: MAD TEMP[0].xyz, TEMP[0].zzzz, TEMP[8].xyzz, TEMP[1].xyzz 34: MAD TEMP[1].x, IN[2].wwww, IMM[0].xxxx, IMM[0].yyyy 35: MUL TEMP[1].x, TEMP[1].xxxx, CONST[1][9].wwww 36: MOV TEMP[0].w, TEMP[1].xxxx 37: MOV TEMP[1].xw, TEMP[9].xxxw 38: MOV TEMP[1].y, -TEMP[9].yyyy 39: MAD TEMP[9].x, IMM[0].xxxx, TEMP[9].zzzz, -TEMP[9].wwww 40: MOV TEMP[1].z, TEMP[9].xxxx 41: MOV OUT[0], TEMP[1] 42: MOV OUT[4], TEMP[2] 43: MOV OUT[3], IN[3] 44: MOV OUT[2], TEMP[0] 45: MOV OUT[1], TEMP[10] 46: END ; ModuleID = 'tgsi' define void @main([9 x <16 x i8>] addrspace(2)* byval, [17 x <16 x i8>] addrspace(2)* byval, [17 x <4 x i32>] addrspace(2)* byval, [34 x <8 x i32>] addrspace(2)* byval, [16 x <16 x i8>] addrspace(2)* byval, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 { main_body: %12 = getelementptr [17 x <16 x i8>], [17 x <16 x i8>] addrspace(2)* %1, i64 0, i64 1 %13 = load <16 x i8>, <16 x i8> addrspace(2)* %12, align 16, !tbaa !0 %14 = call float @llvm.SI.load.const(<16 x i8> %13, i32 0) %15 = call float @llvm.SI.load.const(<16 x i8> %13, i32 4) %16 = call float @llvm.SI.load.const(<16 x i8> %13, i32 8) %17 = call float @llvm.SI.load.const(<16 x i8> %13, i32 16) %18 = call float @llvm.SI.load.const(<16 x i8> %13, i32 20) %19 = call float @llvm.SI.load.const(<16 x i8> %13, i32 24) %20 = call float @llvm.SI.load.const(<16 x i8> %13, i32 32) %21 = call float @llvm.SI.load.const(<16 x i8> %13, i32 36) %22 = call float @llvm.SI.load.const(<16 x i8> %13, i32 40) %23 = call float @llvm.SI.load.const(<16 x i8> %13, i32 48) %24 = call float @llvm.SI.load.const(<16 x i8> %13, i32 52) %25 = call float @llvm.SI.load.const(<16 x i8> %13, i32 56) %26 = call float @llvm.SI.load.const(<16 x i8> %13, i32 156) %27 = call float @llvm.SI.load.const(<16 x i8> %13, i32 224) %28 = call float @llvm.SI.load.const(<16 x i8> %13, i32 228) %29 = call float @llvm.SI.load.const(<16 x i8> %13, i32 232) %30 = getelementptr [17 x <16 x i8>], [17 x <16 x i8>] addrspace(2)* %1, i64 0, i64 2 %31 = load <16 x i8>, <16 x i8> addrspace(2)* %30, align 16, !tbaa !0 %32 = call float @llvm.SI.load.const(<16 x i8> %31, i32 0) %33 = call float @llvm.SI.load.const(<16 x i8> %31, i32 4) %34 = call float @llvm.SI.load.const(<16 x i8> %31, i32 8) %35 = call float @llvm.SI.load.const(<16 x i8> %31, i32 12) %36 = call float @llvm.SI.load.const(<16 x i8> %31, i32 16) %37 = call float @llvm.SI.load.const(<16 x i8> %31, i32 20) %38 = call float @llvm.SI.load.const(<16 x i8> %31, i32 24) %39 = call float @llvm.SI.load.const(<16 x i8> %31, i32 28) %40 = call float @llvm.SI.load.const(<16 x i8> %31, i32 32) %41 = call float @llvm.SI.load.const(<16 x i8> %31, i32 36) %42 = call float @llvm.SI.load.const(<16 x i8> %31, i32 40) %43 = call float @llvm.SI.load.const(<16 x i8> %31, i32 44) %44 = call float @llvm.SI.load.const(<16 x i8> %31, i32 48) %45 = call float @llvm.SI.load.const(<16 x i8> %31, i32 52) %46 = call float @llvm.SI.load.const(<16 x i8> %31, i32 56) %47 = call float @llvm.SI.load.const(<16 x i8> %31, i32 60) %48 = call float @llvm.SI.load.const(<16 x i8> %31, i32 800) %49 = call float @llvm.SI.load.const(<16 x i8> %31, i32 804) %50 = call float @llvm.SI.load.const(<16 x i8> %31, i32 808) %51 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %4, i64 0, i64 0 %52 = load <16 x i8>, <16 x i8> addrspace(2)* %51, align 16, !tbaa !0 %53 = add i32 %5, %8 %54 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %52, i32 0, i32 %53) %55 = extractelement <4 x float> %54, i32 0 %56 = extractelement <4 x float> %54, i32 1 %57 = extractelement <4 x float> %54, i32 2 %58 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %4, i64 0, i64 1 %59 = load <16 x i8>, <16 x i8> addrspace(2)* %58, align 16, !tbaa !0 %60 = add i32 %5, %8 %61 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %59, i32 0, i32 %60) %62 = extractelement <4 x float> %61, i32 0 %63 = extractelement <4 x float> %61, i32 1 %64 = extractelement <4 x float> %61, i32 2 %65 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %4, i64 0, i64 2 %66 = load <16 x i8>, <16 x i8> addrspace(2)* %65, align 16, !tbaa !0 %67 = add i32 %5, %8 %68 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %66, i32 0, i32 %67) %69 = extractelement <4 x float> %68, i32 0 %70 = extractelement <4 x float> %68, i32 1 %71 = extractelement <4 x float> %68, i32 2 %72 = extractelement <4 x float> %68, i32 3 %73 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %4, i64 0, i64 3 %74 = load <16 x i8>, <16 x i8> addrspace(2)* %73, align 16, !tbaa !0 %75 = add i32 %5, %8 %76 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %74, i32 0, i32 %75) %77 = extractelement <4 x float> %76, i32 0 %78 = extractelement <4 x float> %76, i32 1 %79 = extractelement <4 x float> %76, i32 2 %80 = extractelement <4 x float> %76, i32 3 %81 = fmul float %69, 2.000000e+00 %82 = fadd float %81, -1.000000e+00 %83 = fmul float %70, 2.000000e+00 %84 = fadd float %83, -1.000000e+00 %85 = fmul float %71, 2.000000e+00 %86 = fadd float %85, -1.000000e+00 %87 = fmul float %72, 2.000000e+00 %88 = fadd float %87, -1.000000e+00 %89 = fmul float %62, 2.000000e+00 %90 = fadd float %89, -1.000000e+00 %91 = fmul float %63, 2.000000e+00 %92 = fadd float %91, -1.000000e+00 %93 = fmul float %64, 2.000000e+00 %94 = fadd float %93, -1.000000e+00 %95 = fmul float %86, %92 %96 = fmul float %82, %94 %97 = fmul float %84, %90 %98 = fmul float %84, %94 %99 = fsub float %98, %95 %100 = fmul float %86, %90 %101 = fsub float %100, %96 %102 = fmul float %82, %92 %103 = fsub float %102, %97 %104 = fmul float %99, %88 %105 = fmul float %101, %88 %106 = fmul float %103, %88 %107 = fmul float %106, %84 %108 = fmul float %104, %86 %109 = fmul float %105, %82 %110 = fmul float %105, %86 %111 = fsub float %110, %107 %112 = fmul float %106, %82 %113 = fsub float %112, %108 %114 = fmul float %104, %84 %115 = fsub float %114, %109 %116 = fmul float %111, %88 %117 = fmul float %113, %88 %118 = fmul float %115, %88 %119 = fmul float %14, %27 %120 = fmul float %15, %27 %121 = fmul float %16, %27 %122 = fmul float %17, %28 %123 = fmul float %18, %28 %124 = fmul float %19, %28 %125 = fmul float %20, %29 %126 = fmul float %21, %29 %127 = fmul float %22, %29 %128 = fmul float %14, %55 %129 = fmul float %15, %55 %130 = fmul float %16, %55 %131 = fmul float %17, %56 %132 = fadd float %131, %128 %133 = fmul float %18, %56 %134 = fadd float %133, %129 %135 = fmul float %19, %56 %136 = fadd float %135, %130 %137 = fmul float %20, %57 %138 = fadd float %137, %132 %139 = fmul float %21, %57 %140 = fadd float %139, %134 %141 = fmul float %22, %57 %142 = fadd float %141, %136 %143 = fadd float %23, %48 %144 = fadd float %24, %49 %145 = fadd float %25, %50 %146 = fadd float %138, %143 %147 = fadd float %140, %144 %148 = fadd float %142, %145 %149 = fmul float %36, %147 %150 = fmul float %37, %147 %151 = fmul float %38, %147 %152 = fmul float %39, %147 %153 = fmul float %32, %146 %154 = fadd float %153, %149 %155 = fmul float %33, %146 %156 = fadd float %155, %150 %157 = fmul float %34, %146 %158 = fadd float %157, %151 %159 = fmul float %35, %146 %160 = fadd float %159, %152 %161 = fmul float %40, %148 %162 = fadd float %161, %154 %163 = fmul float %41, %148 %164 = fadd float %163, %156 %165 = fmul float %42, %148 %166 = fadd float %165, %158 %167 = fmul float %43, %148 %168 = fadd float %167, %160 %169 = fadd float %44, %162 %170 = fadd float %45, %164 %171 = fadd float %46, %166 %172 = fadd float %47, %168 %173 = fmul float %117, %122 %174 = fmul float %117, %123 %175 = fmul float %117, %124 %176 = fmul float %116, %119 %177 = fadd float %176, %173 %178 = fmul float %116, %120 %179 = fadd float %178, %174 %180 = fmul float %116, %121 %181 = fadd float %180, %175 %182 = fmul float %118, %125 %183 = fadd float %182, %177 %184 = fmul float %118, %126 %185 = fadd float %184, %179 %186 = fmul float %118, %127 %187 = fadd float %186, %181 %188 = fmul float %84, %122 %189 = fmul float %84, %123 %190 = fmul float %84, %124 %191 = fmul float %82, %119 %192 = fadd float %191, %188 %193 = fmul float %82, %120 %194 = fadd float %193, %189 %195 = fmul float %82, %121 %196 = fadd float %195, %190 %197 = fmul float %86, %125 %198 = fadd float %197, %192 %199 = fmul float %86, %126 %200 = fadd float %199, %194 %201 = fmul float %86, %127 %202 = fadd float %201, %196 %203 = fmul float %72, 2.000000e+00 %204 = fadd float %203, -1.000000e+00 %205 = fmul float %204, %26 %206 = fsub float -0.000000e+00, %170 %207 = fmul float %171, 2.000000e+00 %208 = fsub float %207, %172 call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %183, float %185, float %187, float 0.000000e+00) call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %198, float %200, float %202, float %205) call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %77, float %78, float %79, float %80) call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %146, float %147, float %148, float 1.000000e+00) call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %169, float %206, float %208, float %172) ret void } ; Function Attrs: nounwind readnone declare float @llvm.SI.load.const(<16 x i8>, i32) #1 ; Function Attrs: nounwind readnone declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1 declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) attributes #0 = { "ShaderType"="1" "enable-no-nans-fp-math"="true" } attributes #1 = { nounwind readnone } !0 = !{!"const", null, i32 1} VM start=0x113A9B000 end=0x113A9C000 | Buffer 4096 bytes Shader Disassembly: v_mov_b32_e32 v1, 0 ; 7E020280 v_add_i32_e32 v0, vcc, s10, v0 ; 3200000A s_load_dwordx4 s[12:15], s[8:9], 0x0 ; C00A0304 00000000 s_nop 0 ; BF800000 s_load_dwordx4 s[16:19], s[8:9], 0x10 ; C00A0404 00000010 s_nop 0 ; BF800000 s_load_dwordx4 s[20:23], s[8:9], 0x20 ; C00A0504 00000020 s_nop 0 ; BF800000 s_load_dwordx4 s[8:11], s[8:9], 0x30 ; C00A0204 00000030 s_nop 0 ; BF800000 s_load_dwordx4 s[4:7], s[2:3], 0x10 ; C00A0101 00000010 s_nop 0 ; BF800000 s_load_dwordx4 s[0:3], s[2:3], 0x20 ; C00A0001 00000020 s_waitcnt lgkmcnt(0) ; BF8C007F buffer_load_format_xyzw v[2:5], v0, s[12:15], 0 idxen ; E00C2000 80030200 s_waitcnt vmcnt(0) ; BF8C0770 buffer_load_format_xyzw v[5:8], v0, s[16:19], 0 idxen ; E00C2000 80040500 s_waitcnt vmcnt(0) ; BF8C0770 buffer_load_format_xyzw v[8:11], v0, s[20:23], 0 idxen ; E00C2000 80050800 s_nop 0 ; BF800000 buffer_load_format_xyzw v[12:15], v0, s[8:11], 0 idxen ; E00C2000 80020C00 s_buffer_load_dword s8, s[4:7], 0x0 ; C0220202 00000000 s_nop 0 ; BF800000 s_buffer_load_dword s9, s[4:7], 0x4 ; C0220242 00000004 s_nop 0 ; BF800000 s_buffer_load_dword s10, s[4:7], 0x8 ; C0220282 00000008 s_nop 0 ; BF800000 s_buffer_load_dword s11, s[4:7], 0x10 ; C02202C2 00000010 s_nop 0 ; BF800000 s_buffer_load_dword s12, s[4:7], 0x14 ; C0220302 00000014 s_nop 0 ; BF800000 s_buffer_load_dword s13, s[4:7], 0x18 ; C0220342 00000018 s_nop 0 ; BF800000 s_buffer_load_dword s14, s[4:7], 0x20 ; C0220382 00000020 s_nop 0 ; BF800000 s_buffer_load_dword s15, s[4:7], 0x24 ; C02203C2 00000024 s_nop 0 ; BF800000 s_buffer_load_dword s16, s[4:7], 0x28 ; C0220402 00000028 s_nop 0 ; BF800000 s_buffer_load_dword s17, s[4:7], 0x30 ; C0220442 00000030 s_nop 0 ; BF800000 s_buffer_load_dword s18, s[4:7], 0x34 ; C0220482 00000034 s_nop 0 ; BF800000 s_buffer_load_dword s19, s[4:7], 0xe8 ; C02204C2 000000E8 s_nop 0 ; BF800000 s_buffer_load_dword s20, s[4:7], 0xe0 ; C0220502 000000E0 s_nop 0 ; BF800000 s_buffer_load_dword s21, s[4:7], 0xe4 ; C0220542 000000E4 s_waitcnt lgkmcnt(0) ; BF8C007F v_mov_b32_e32 v0, s20 ; 7E000214 v_mul_f32_e32 v16, s8, v0 ; 0A200008 s_waitcnt vmcnt(1) ; BF8C0771 v_add_f32_e32 v17, v8, v8 ; 02221108 v_mad_f32 v8, 2.0, v8, -1.0 ; D1C10008 03CE10F4 v_mul_f32_e32 v18, s8, v2 ; 0A240408 v_mul_f32_e32 v19, s9, v2 ; 0A260409 v_mul_f32_e32 v2, s10, v2 ; 0A04040A v_mac_f32_e32 v18, s11, v3 ; 2C24060B v_mac_f32_e32 v19, s12, v3 ; 2C26060C v_mac_f32_e32 v2, s13, v3 ; 2C04060D v_mac_f32_e32 v18, s14, v4 ; 2C24080E v_mac_f32_e32 v19, s15, v4 ; 2C26080F v_mac_f32_e32 v2, s16, v4 ; 2C040810 v_add_f32_e32 v3, v9, v9 ; 02061309 v_mad_f32 v4, 2.0, v9, -1.0 ; D1C10004 03CE12F4 v_add_f32_e32 v9, v10, v10 ; 0212150A v_mad_f32 v10, 2.0, v10, -1.0 ; D1C1000A 03CE14F4 v_add_f32_e32 v11, v11, v11 ; 0216170B v_mul_f32_e32 v20, s9, v0 ; 0A280009 v_mul_f32_e32 v0, s10, v0 ; 0A00000A v_mad_f32 v5, 2.0, v5, -1.0 ; D1C10005 03CE0AF4 v_mad_f32 v6, 2.0, v6, -1.0 ; D1C10006 03CE0CF4 v_mad_f32 v7, 2.0, v7, -1.0 ; D1C10007 03CE0EF4 v_mov_b32_e32 v21, s21 ; 7E2A0215 v_mul_f32_e32 v22, s11, v21 ; 0A2C2A0B v_mad_f32 v23, v9, v6, -v6 ; D1C10017 841A0D09 v_mad_f32 v23, v4, v7, -v23 ; D1C10017 845E0F04 v_mad_f32 v7, v17, v7, -v7 ; D1C10007 841E0F11 v_mad_f32 v7, v10, v5, -v7 ; D1C10007 841E0B0A v_mad_f32 v5, v3, v5, -v5 ; D1C10005 84160B03 v_mad_f32 v5, v8, v6, -v5 ; D1C10005 84160D08 v_mad_f32 v6, v11, v7, -v7 ; D1C10006 841E0F0B v_mad_f32 v5, v11, v5, -v5 ; D1C10005 84160B0B v_mad_f32 v7, v3, v5, -v5 ; D1C10007 84160B03 v_mad_f32 v17, v17, v6, -v6 ; D1C10011 841A0D11 v_mad_f32 v6, v6, v10, -v7 ; D1C10006 841E1506 v_mul_f32_e32 v7, s12, v21 ; 0A0E2A0C v_mul_f32_e32 v21, s13, v21 ; 0A2A2A0D v_mad_f32 v23, v11, v23, -v23 ; D1C10017 845E2F0B v_mad_f32 v9, v9, v23, -v23 ; D1C10009 845E2F09 v_mad_f32 v5, v5, v8, -v9 ; D1C10005 84261105 v_mov_b32_e32 v9, s19 ; 7E120213 v_mad_f32 v4, v23, v4, -v17 ; D1C10004 84460917 v_mad_f32 v6, v11, v6, -v6 ; D1C10006 841A0D0B v_mad_f32 v5, v11, v5, -v5 ; D1C10005 84160B0B v_mul_f32_e32 v17, v22, v5 ; 0A220B16 v_mul_f32_e32 v23, v7, v5 ; 0A2E0B07 v_mul_f32_e32 v5, v21, v5 ; 0A0A0B15 v_mac_f32_e32 v17, v16, v6 ; 2C220D10 v_mac_f32_e32 v23, v20, v6 ; 2C2E0D14 v_mac_f32_e32 v5, v0, v6 ; 2C0A0D00 v_mul_f32_e32 v6, s14, v9 ; 0A0C120E v_mul_f32_e32 v24, s15, v9 ; 0A30120F v_mul_f32_e32 v9, s16, v9 ; 0A121210 v_mad_f32 v4, v11, v4, -v4 ; D1C10004 8412090B v_mac_f32_e32 v17, v6, v4 ; 2C220906 v_mac_f32_e32 v23, v24, v4 ; 2C2E0918 v_mac_f32_e32 v5, v9, v4 ; 2C0A0909 s_buffer_load_dword s8, s[4:7], 0x38 ; C0220202 00000038 s_nop 0 ; BF800000 s_buffer_load_dword s4, s[4:7], 0x9c ; C0220102 0000009C s_nop 0 ; BF800000 s_buffer_load_dword s5, s[0:3], 0x0 ; C0220140 00000000 s_nop 0 ; BF800000 s_buffer_load_dword s6, s[0:3], 0x4 ; C0220180 00000004 s_nop 0 ; BF800000 s_buffer_load_dword s7, s[0:3], 0x8 ; C02201C0 00000008 s_nop 0 ; BF800000 s_buffer_load_dword s9, s[0:3], 0xc ; C0220240 0000000C s_nop 0 ; BF800000 s_buffer_load_dword s10, s[0:3], 0x10 ; C0220280 00000010 s_nop 0 ; BF800000 s_buffer_load_dword s11, s[0:3], 0x3c ; C02202C0 0000003C s_nop 0 ; BF800000 s_buffer_load_dword s12, s[0:3], 0x320 ; C0220300 00000320 s_nop 0 ; BF800000 s_buffer_load_dword s13, s[0:3], 0x324 ; C0220340 00000324 s_nop 0 ; BF800000 s_buffer_load_dword s14, s[0:3], 0x328 ; C0220380 00000328 s_nop 0 ; BF800000 s_buffer_load_dword s15, s[0:3], 0x14 ; C02203C0 00000014 s_nop 0 ; BF800000 s_buffer_load_dword s16, s[0:3], 0x18 ; C0220400 00000018 s_nop 0 ; BF800000 s_buffer_load_dword s19, s[0:3], 0x1c ; C02204C0 0000001C s_nop 0 ; BF800000 s_buffer_load_dword s20, s[0:3], 0x20 ; C0220500 00000020 s_nop 0 ; BF800000 s_buffer_load_dword s21, s[0:3], 0x24 ; C0220540 00000024 s_nop 0 ; BF800000 s_buffer_load_dword s22, s[0:3], 0x28 ; C0220580 00000028 s_nop 0 ; BF800000 s_buffer_load_dword s23, s[0:3], 0x2c ; C02205C0 0000002C s_nop 0 ; BF800000 s_buffer_load_dword s24, s[0:3], 0x30 ; C0220600 00000030 s_nop 0 ; BF800000 s_buffer_load_dword s25, s[0:3], 0x34 ; C0220640 00000034 s_nop 0 ; BF800000 s_buffer_load_dword s0, s[0:3], 0x38 ; C0220000 00000038 exp 15, 32, 0, 0, 0, v17, v23, v5, v1 ; C400020F 01051711 s_waitcnt expcnt(0) lgkmcnt(0) ; BF8C000F v_mov_b32_e32 v1, s12 ; 7E02020C v_add_f32_e32 v1, s17, v1 ; 02020211 v_mov_b32_e32 v4, s13 ; 7E08020D v_add_f32_e32 v4, s18, v4 ; 02080812 v_mov_b32_e32 v5, s14 ; 7E0A020E v_add_f32_e32 v5, s8, v5 ; 020A0A08 v_mad_f32 v11, v11, s4, -s4 ; D1C1000B 8010090B v_add_f32_e32 v4, v4, v19 ; 02082704 v_mul_f32_e32 v17, s10, v4 ; 0A22080A v_mul_f32_e32 v19, s15, v4 ; 0A26080F v_add_f32_e32 v1, v1, v18 ; 02022501 v_mul_f32_e32 v18, s16, v4 ; 0A240810 v_add_f32_e32 v2, v5, v2 ; 02040505 v_mul_f32_e32 v5, s19, v4 ; 0A0A0813 v_mac_f32_e32 v17, s5, v1 ; 2C220205 v_mac_f32_e32 v19, s6, v1 ; 2C260206 v_mac_f32_e32 v18, s7, v1 ; 2C240207 v_mac_f32_e32 v5, s9, v1 ; 2C0A0209 v_mac_f32_e32 v17, s20, v2 ; 2C220414 v_mac_f32_e32 v19, s21, v2 ; 2C260415 v_mac_f32_e32 v18, s22, v2 ; 2C240416 v_mad_f32 v22, v3, v22, -v22 ; D1C10016 845A2D03 v_mad_f32 v7, v3, v7, -v7 ; D1C10007 841E0F03 v_mad_f32 v3, v3, v21, -v21 ; D1C10003 84562B03 v_mac_f32_e32 v22, v16, v8 ; 2C2C1110 v_mac_f32_e32 v7, v20, v8 ; 2C0E1114 v_mac_f32_e32 v3, v0, v8 ; 2C061100 v_mac_f32_e32 v5, s23, v2 ; 2C0A0417 v_add_f32_e32 v0, s24, v17 ; 02002218 v_add_f32_e32 v8, s25, v19 ; 02102619 v_add_f32_e32 v16, s0, v18 ; 02202400 v_add_f32_e32 v5, s11, v5 ; 020A0A0B v_mac_f32_e32 v22, v6, v10 ; 2C2C1506 v_mac_f32_e32 v7, v24, v10 ; 2C0E1518 v_mac_f32_e32 v3, v9, v10 ; 2C061509 exp 15, 33, 0, 0, 0, v22, v7, v3, v11 ; C400021F 0B030716 s_waitcnt vmcnt(0) ; BF8C0770 exp 15, 34, 0, 0, 0, v12, v13, v14, v15 ; C400022F 0F0E0D0C s_waitcnt expcnt(0) ; BF8C070F v_mov_b32_e32 v3, 1.0 ; 7E0602F2 exp 15, 35, 0, 0, 0, v1, v4, v2, v3 ; C400023F 03020401 s_waitcnt expcnt(0) ; BF8C070F v_xor_b32_e32 v1, 0x80000000, v8 ; 2A0210FF 80000000 v_mad_f32 v2, 2.0, v16, -v5 ; D1C10002 841620F4 exp 15, 12, 0, 1, 0, v0, v1, v2, v5 ; C40008CF 05020100 s_endpgm ; BF810000 *** SHADER STATS *** SGPRS: 80 VGPRS: 28 Code Size: 1108 bytes LDS: 0 blocks Scratch: 0 bytes per wave ********************