ATTENTION: default value of option vblank_mode overridden by environment. 3: warning: unsupported glXCreateWindow call ; ModuleID = 'tgsi' target triple = "amdgcn--" define <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([9 x <16 x i8>] addrspace(2)* byval, [17 x <16 x i8>] addrspace(2)* byval, [17 x <8 x i32>] addrspace(2)* byval, i32 addrspace(2)* byval, float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 { main_body: %22 = getelementptr [17 x <16 x i8>], [17 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0 %23 = load <16 x i8>, <16 x i8> addrspace(2)* %22, align 16, !tbaa !0 %24 = call float @llvm.SI.load.const(<16 x i8> %23, i32 0) %25 = call float @llvm.SI.load.const(<16 x i8> %23, i32 4) %26 = call float @llvm.SI.load.const(<16 x i8> %23, i32 8) %27 = call float @llvm.SI.load.const(<16 x i8> %23, i32 16) %28 = call float @llvm.SI.load.const(<16 x i8> %23, i32 20) %29 = call float @llvm.SI.load.const(<16 x i8> %23, i32 24) %30 = call float @llvm.SI.load.const(<16 x i8> %23, i32 32) %31 = call float @llvm.SI.load.const(<16 x i8> %23, i32 36) %32 = call float @llvm.SI.load.const(<16 x i8> %23, i32 40) %33 = call float @llvm.SI.load.const(<16 x i8> %23, i32 48) %34 = call float @llvm.SI.load.const(<16 x i8> %23, i32 64) %35 = call float @llvm.SI.load.const(<16 x i8> %23, i32 80) %36 = call float @llvm.SI.load.const(<16 x i8> %23, i32 84) %37 = call float @llvm.SI.load.const(<16 x i8> %23, i32 96) %38 = call float @llvm.SI.load.const(<16 x i8> %23, i32 112) %39 = call float @llvm.SI.load.const(<16 x i8> %23, i32 116) %40 = call float @llvm.SI.load.const(<16 x i8> %23, i32 128) %41 = call float @llvm.SI.load.const(<16 x i8> %23, i32 144) %42 = call float @llvm.SI.load.const(<16 x i8> %23, i32 160) %43 = call float @llvm.SI.load.const(<16 x i8> %23, i32 176) %44 = call float @llvm.SI.load.const(<16 x i8> %23, i32 192) %45 = call float @llvm.SI.load.const(<16 x i8> %23, i32 208) %46 = call float @llvm.SI.load.const(<16 x i8> %23, i32 224) %47 = call float @llvm.SI.load.const(<16 x i8> %23, i32 240) %48 = call float @llvm.SI.load.const(<16 x i8> %23, i32 256) %49 = call float @llvm.SI.load.const(<16 x i8> %23, i32 272) %50 = call float @llvm.SI.load.const(<16 x i8> %23, i32 288) %51 = call float @llvm.SI.load.const(<16 x i8> %23, i32 292) %52 = call float @llvm.SI.load.const(<16 x i8> %23, i32 296) %53 = call float @llvm.SI.load.const(<16 x i8> %23, i32 300) %54 = call float @llvm.SI.load.const(<16 x i8> %23, i32 304) %55 = call float @llvm.SI.load.const(<16 x i8> %23, i32 308) %56 = call float @llvm.SI.load.const(<16 x i8> %23, i32 312) %57 = call float @llvm.SI.load.const(<16 x i8> %23, i32 316) %58 = call float @llvm.SI.load.const(<16 x i8> %23, i32 320) %59 = call float @llvm.SI.load.const(<16 x i8> %23, i32 324) %60 = call float @llvm.SI.load.const(<16 x i8> %23, i32 328) %61 = call float @llvm.SI.load.const(<16 x i8> %23, i32 332) %62 = call float @llvm.SI.load.const(<16 x i8> %23, i32 336) %63 = call float @llvm.SI.load.const(<16 x i8> %23, i32 340) %64 = call float @llvm.SI.load.const(<16 x i8> %23, i32 344) %65 = call float @llvm.SI.load.const(<16 x i8> %23, i32 348) %66 = call float @llvm.SI.load.const(<16 x i8> %23, i32 352) %67 = call float @llvm.SI.load.const(<16 x i8> %23, i32 356) %68 = call float @llvm.SI.load.const(<16 x i8> %23, i32 360) %69 = call float @llvm.SI.load.const(<16 x i8> %23, i32 364) %70 = call float @llvm.SI.load.const(<16 x i8> %23, i32 368) %71 = call float @llvm.SI.load.const(<16 x i8> %23, i32 372) %72 = call float @llvm.SI.load.const(<16 x i8> %23, i32 376) %73 = call float @llvm.SI.load.const(<16 x i8> %23, i32 380) %74 = call float @llvm.SI.load.const(<16 x i8> %23, i32 384) %75 = call float @llvm.SI.load.const(<16 x i8> %23, i32 388) %76 = call float @llvm.SI.load.const(<16 x i8> %23, i32 392) %77 = call float @llvm.SI.load.const(<16 x i8> %23, i32 396) %78 = call float @llvm.SI.load.const(<16 x i8> %23, i32 400) %79 = call float @llvm.SI.load.const(<16 x i8> %23, i32 404) %80 = call float @llvm.SI.load.const(<16 x i8> %23, i32 408) %81 = call float @llvm.SI.load.const(<16 x i8> %23, i32 412) %82 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %5, <2 x i32> %7) %83 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %5, <2 x i32> %7) %84 = fmul float %24, %82 %85 = fmul float %25, %82 %86 = fmul float %26, %82 %87 = fmul float %27, %83 %88 = fadd float %87, %84 %89 = fmul float %28, %83 %90 = fadd float %89, %85 %91 = fmul float %29, %83 %92 = fadd float %91, %86 %93 = fadd float %88, %30 %94 = fadd float %90, %31 %95 = fadd float %92, %32 %96 = fdiv float 1.000000e+00, %95 %97 = fmul float %93, %96 %98 = fmul float %94, %96 %99 = fsub float %40, %37 %100 = fsub float %98, %36 %101 = fsub float %39, %36 %102 = fsub float %97, %35 %103 = fsub float %38, %35 %104 = fmul float %102, %103 %105 = fmul float %100, %101 %106 = fadd float %105, %104 %107 = fmul float %37, %99 %108 = fadd float %107, %106 %109 = fsub float %98, %36 %110 = fsub float %98, %36 %111 = fsub float %97, %35 %112 = fsub float %97, %35 %113 = fmul float %111, %112 %114 = fmul float %109, %110 %115 = fadd float %114, %113 %116 = fmul float %37, %37 %117 = fsub float %115, %116 %118 = call float @llvm.fabs.f32(float %34) %119 = fcmp olt float %118, 0x3EE4F8B580000000 %120 = sext i1 %119 to i32 %121 = bitcast i32 %120 to float br i1 %119, label %IF, label %ELSE IF: ; preds = %main_body %122 = fcmp oeq float %108, 0.000000e+00 br i1 %122, label %ENDIF, label %ELSE38 ELSE: ; preds = %main_body %123 = fmul float %34, %117 %124 = fmul float %108, %108 %125 = fsub float %124, %123 %126 = fcmp olt float %125, 0.000000e+00 br i1 %126, label %ENDIF, label %ELSE41 ENDIF: ; preds = %ELSE41, %ELSE, %ELSE38, %IF %temp12.0 = phi float [ %117, %IF ], [ %117, %ELSE38 ], [ %133, %ELSE41 ], [ %125, %ELSE ] %temp20.0 = phi float [ 0.000000e+00, %IF ], [ %129, %ELSE38 ], [ %121, %ELSE41 ], [ 0.000000e+00, %ELSE ] %temp8.0 = phi float [ 0x36A0000000000000, %IF ], [ 0.000000e+00, %ELSE38 ], [ 0.000000e+00, %ELSE41 ], [ 0x36A0000000000000, %ELSE ] %temp4.0 = phi float [ 0.000000e+00, %IF ], [ %132, %ELSE38 ], [ %136, %ELSE41 ], [ 0.000000e+00, %ELSE ] %temp.0 = phi i32 [ 0, %IF ], [ -1, %ELSE38 ], [ -1, %ELSE41 ], [ 0, %ELSE ] %127 = icmp eq i32 %temp.0, 0 br i1 %127, label %ENDIF42, label %IF43 ELSE38: ; preds = %IF %128 = sext i1 %122 to i32 %129 = bitcast i32 %128 to float %130 = fmul float %117, 5.000000e-01 %131 = fdiv float 1.000000e+00, %108 %132 = fmul float %130, %131 br label %ENDIF ELSE41: ; preds = %ELSE %133 = call float @llvm.sqrt.f32(float %125) %134 = fadd float %108, %133 %135 = fdiv float 1.000000e+00, %34 %136 = fmul float %134, %135 br label %ENDIF IF43: ; preds = %ENDIF %137 = bitcast float %33 to i32 %138 = icmp eq i32 %137, 0 br i1 %138, label %IF46, label %ELSE47 ENDIF42: ; preds = %ENDIF, %IF67, %ENDIF63, %ENDIF45 %temp20.3 = phi float [ %temp20.0, %ENDIF ], [ %temp20.4, %ENDIF45 ], [ %175, %IF67 ], [ %temp4.6, %ENDIF63 ] %temp8.3 = phi float [ %temp8.0, %ENDIF ], [ %.temp8.0, %ENDIF45 ], [ %.temp8.0, %IF67 ], [ %.temp8.0, %ENDIF63 ] %139 = bitcast float %temp8.3 to i32 %140 = icmp eq i32 %139, 1 br i1 %140, label %ENDIF69, label %ELSE71 IF46: ; preds = %IF43 %141 = fcmp ole float %temp4.0, 0.000000e+00 %142 = fcmp ogt float %temp4.0, 1.000000e+00 %143 = or i1 %141, %142 br i1 %143, label %IF49, label %ENDIF48 ELSE47: ; preds = %IF43 %144 = fsub float %40, %37 %145 = fmul float %temp4.0, %144 %146 = fsub float -0.000000e+00, %37 %147 = fcmp ugt float %145, %146 br i1 %147, label %ENDIF54, label %IF55 ENDIF45: ; preds = %ENDIF54, %ENDIF48 %.sink = phi i1 [ %155, %ENDIF48 ], [ %162, %ENDIF54 ] %temp20.4 = phi float [ %temp4.4.temp20.0, %ENDIF48 ], [ %temp4.5.temp20.0, %ENDIF54 ] %temp4.3 = phi float [ %temp4.4, %ENDIF48 ], [ %temp4.5, %ENDIF54 ] %.temp8.0 = select i1 %.sink, float 0x36A0000000000000, float %temp8.0 %148 = icmp ne i32 %temp.0, 0 %not..sink = xor i1 %.sink, true %149 = and i1 %148, %not..sink br i1 %149, label %IF61, label %ENDIF42 IF49: ; preds = %IF46 %150 = fsub float %108, %temp12.0 %151 = fdiv float 1.000000e+00, %34 %152 = fmul float %150, %151 br label %ENDIF48 ENDIF48: ; preds = %IF46, %IF49 %temp4.4 = phi float [ %152, %IF49 ], [ %temp4.0, %IF46 ] %153 = fcmp ole float %temp4.4, 0.000000e+00 %154 = fcmp ogt float %temp4.4, 1.000000e+00 %155 = or i1 %153, %154 %temp4.4.temp20.0 = select i1 %155, float %temp4.4, float %temp20.0 br label %ENDIF45 IF55: ; preds = %ELSE47 %156 = fsub float %108, %temp12.0 %157 = fdiv float 1.000000e+00, %34 %158 = fmul float %156, %157 br label %ENDIF54 ENDIF54: ; preds = %ELSE47, %IF55 %temp4.5 = phi float [ %158, %IF55 ], [ %temp4.0, %ELSE47 ] %159 = fsub float %40, %37 %160 = fmul float %temp4.5, %159 %161 = fsub float -0.000000e+00, %37 %162 = fcmp ole float %160, %161 %temp4.5.temp20.0 = select i1 %162, float %temp4.5, float %temp20.0 br label %ENDIF45 IF61: ; preds = %ENDIF45 %163 = bitcast float %33 to i32 %164 = icmp eq i32 %163, 1 br i1 %164, label %IF64, label %ENDIF63 IF64: ; preds = %IF61 %165 = call float @llvm.floor.f32(float %temp4.3) %166 = fsub float %temp4.3, %165 br label %ENDIF63 ENDIF63: ; preds = %IF61, %IF64 %temp4.6 = phi float [ %166, %IF64 ], [ %temp4.3, %IF61 ] %167 = bitcast float %33 to i32 %168 = icmp eq i32 %167, 3 br i1 %168, label %IF67, label %ENDIF42 IF67: ; preds = %ENDIF63 %169 = fmul float %temp4.6, 5.000000e-01 %170 = fadd float %169, 5.000000e-01 %171 = call float @llvm.floor.f32(float %170) %172 = fsub float %170, %171 %173 = fmul float %172, 2.000000e+00 %174 = fadd float %173, -1.000000e+00 %175 = call float @llvm.fabs.f32(float %174) br label %ENDIF42 ELSE71: ; preds = %ENDIF42 %176 = fcmp olt float %temp20.3, %42 %177 = bitcast float %41 to i32 %178 = icmp sgt i32 %177, 0 %179 = and i1 %176, %178 br i1 %179, label %ENDIF72, label %ELSE74 ENDIF69: ; preds = %ENDIF42, %ENDIF96 %temp3.0 = phi float [ %222, %ENDIF96 ], [ 0.000000e+00, %ENDIF42 ] %temp2.0 = phi float [ %235, %ENDIF96 ], [ 0.000000e+00, %ENDIF42 ] %temp1.0 = phi float [ %234, %ENDIF96 ], [ 0.000000e+00, %ENDIF42 ] %temp.6 = phi float [ %233, %ENDIF96 ], [ 0.000000e+00, %ENDIF42 ] %180 = bitcast float %4 to i32 %181 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %180, 8 %182 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %181, float %temp.6, 9 %183 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %182, float %temp1.0, 10 %184 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %183, float %temp2.0, 11 %185 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %184, float %temp3.0, 12 %186 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %185, float %20, 22 ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %186 ELSE74: ; preds = %ELSE71 %187 = fcmp olt float %temp20.3, %43 %188 = bitcast float %41 to i32 %189 = icmp sgt i32 %188, 1 %190 = and i1 %187, %189 br i1 %190, label %ENDIF72, label %ELSE77 ENDIF72: ; preds = %ELSE92, %ELSE89, %ELSE86, %ELSE83, %ELSE80, %ELSE77, %ELSE74, %ELSE71 %temp12.2 = phi float [ %42, %ELSE71 ], [ %43, %ELSE74 ], [ %44, %ELSE77 ], [ %45, %ELSE80 ], [ %46, %ELSE83 ], [ %47, %ELSE86 ], [ %49, %ELSE92 ], [ %48, %ELSE89 ] %temp16.0 = phi float [ %42, %ELSE71 ], [ %42, %ELSE74 ], [ %43, %ELSE77 ], [ %44, %ELSE80 ], [ %45, %ELSE83 ], [ %46, %ELSE86 ], [ %., %ELSE92 ], [ %47, %ELSE89 ] %temp11.0 = phi float [ %53, %ELSE71 ], [ %57, %ELSE74 ], [ %61, %ELSE77 ], [ %65, %ELSE80 ], [ %69, %ELSE83 ], [ %73, %ELSE86 ], [ %81, %ELSE92 ], [ %77, %ELSE89 ] %temp10.0 = phi float [ %52, %ELSE71 ], [ %56, %ELSE74 ], [ %60, %ELSE77 ], [ %64, %ELSE80 ], [ %68, %ELSE83 ], [ %72, %ELSE86 ], [ %80, %ELSE92 ], [ %76, %ELSE89 ] %temp9.0 = phi float [ %51, %ELSE71 ], [ %55, %ELSE74 ], [ %59, %ELSE77 ], [ %63, %ELSE80 ], [ %67, %ELSE83 ], [ %71, %ELSE86 ], [ %79, %ELSE92 ], [ %75, %ELSE89 ] %temp8.7 = phi float [ %50, %ELSE71 ], [ %54, %ELSE74 ], [ %58, %ELSE77 ], [ %62, %ELSE80 ], [ %66, %ELSE83 ], [ %70, %ELSE86 ], [ %78, %ELSE92 ], [ %74, %ELSE89 ] %temp7.0 = phi float [ %53, %ELSE71 ], [ %53, %ELSE74 ], [ %57, %ELSE77 ], [ %61, %ELSE80 ], [ %65, %ELSE83 ], [ %69, %ELSE86 ], [ %.104, %ELSE92 ], [ %73, %ELSE89 ] %temp6.0 = phi float [ %52, %ELSE71 ], [ %52, %ELSE74 ], [ %56, %ELSE77 ], [ %60, %ELSE80 ], [ %64, %ELSE83 ], [ %68, %ELSE86 ], [ %.105, %ELSE92 ], [ %72, %ELSE89 ] %temp5.0 = phi float [ %51, %ELSE71 ], [ %51, %ELSE74 ], [ %55, %ELSE77 ], [ %59, %ELSE80 ], [ %63, %ELSE83 ], [ %67, %ELSE86 ], [ %.106, %ELSE92 ], [ %71, %ELSE89 ] %temp4.8 = phi float [ %50, %ELSE71 ], [ %50, %ELSE74 ], [ %54, %ELSE77 ], [ %58, %ELSE80 ], [ %62, %ELSE83 ], [ %66, %ELSE86 ], [ %.107, %ELSE92 ], [ %70, %ELSE89 ] %191 = fsub float %temp12.2, %temp16.0 %192 = fcmp ogt float %191, 2.000000e+00 br i1 %192, label %ENDIF96, label %ELSE98 ELSE77: ; preds = %ELSE74 %193 = fcmp olt float %temp20.3, %44 %194 = bitcast float %41 to i32 %195 = icmp sgt i32 %194, 2 %196 = and i1 %193, %195 br i1 %196, label %ENDIF72, label %ELSE80 ELSE80: ; preds = %ELSE77 %197 = fcmp olt float %temp20.3, %45 %198 = bitcast float %41 to i32 %199 = icmp sgt i32 %198, 3 %200 = and i1 %197, %199 br i1 %200, label %ENDIF72, label %ELSE83 ELSE83: ; preds = %ELSE80 %201 = fcmp olt float %temp20.3, %46 %202 = bitcast float %41 to i32 %203 = icmp sgt i32 %202, 4 %204 = and i1 %201, %203 br i1 %204, label %ENDIF72, label %ELSE86 ELSE86: ; preds = %ELSE83 %205 = fcmp olt float %temp20.3, %47 %206 = bitcast float %41 to i32 %207 = icmp sgt i32 %206, 5 %208 = and i1 %205, %207 br i1 %208, label %ENDIF72, label %ELSE89 ELSE89: ; preds = %ELSE86 %209 = fcmp olt float %temp20.3, %48 %210 = bitcast float %41 to i32 %211 = icmp sgt i32 %210, 6 %212 = and i1 %209, %211 br i1 %212, label %ENDIF72, label %ELSE92 ELSE92: ; preds = %ELSE89 %213 = fcmp olt float %temp20.3, %49 %214 = bitcast float %41 to i32 %215 = icmp sgt i32 %214, 7 %216 = and i1 %213, %215 %. = select i1 %216, float %48, float %49 %.104 = select i1 %216, float %77, float %81 %.105 = select i1 %216, float %76, float %80 %.106 = select i1 %216, float %75, float %79 %.107 = select i1 %216, float %74, float %78 br label %ENDIF72 ELSE98: ; preds = %ENDIF72 %217 = fsub float %temp12.2, %temp16.0 %218 = fcmp olt float %217, 0x3EB0C6F7A0000000 br i1 %218, label %ENDIF96, label %ELSE101 ENDIF96: ; preds = %ELSE101, %ELSE98, %ENDIF72 %temp24.0 = phi float [ 0.000000e+00, %ENDIF72 ], [ %239, %ELSE101 ], [ 0.000000e+00, %ELSE98 ] %219 = fsub float 1.000000e+00, %temp24.0 %220 = fmul float %temp24.0, %temp11.0 %221 = fmul float %219, %temp7.0 %222 = fadd float %221, %220 %223 = fsub float 1.000000e+00, %temp24.0 %224 = fmul float %temp24.0, %temp8.7 %225 = fmul float %temp24.0, %temp9.0 %226 = fmul float %temp24.0, %temp10.0 %227 = fmul float %223, %temp4.8 %228 = fadd float %227, %224 %229 = fmul float %223, %temp5.0 %230 = fadd float %229, %225 %231 = fmul float %223, %temp6.0 %232 = fadd float %231, %226 %233 = fmul float %228, %222 %234 = fmul float %230, %222 %235 = fmul float %232, %222 br label %ENDIF69 ELSE101: ; preds = %ELSE98 %236 = fsub float %temp20.3, %temp16.0 %237 = fsub float %temp12.2, %temp16.0 %238 = fdiv float 1.000000e+00, %237 %239 = fmul float %236, %238 br label %ENDIF96 } ; Function Attrs: nounwind readnone declare float @llvm.SI.load.const(<16 x i8>, i32) #1 ; Function Attrs: nounwind readnone declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1 ; Function Attrs: nounwind readnone declare float @llvm.fabs.f32(float) #1 ; Function Attrs: nounwind readnone declare float @llvm.sqrt.f32(float) #1 ; Function Attrs: nounwind readnone declare float @llvm.floor.f32(float) #1 attributes #0 = { "InitialPSInputAddr"="36983" "ShaderType"="0" } attributes #1 = { nounwind readnone } !0 = !{!"const", null, i32 1} Pixel Shader: Shader main disassembly: s_load_dwordx4 s[12:15], s[2:3], 0x0 ; C00A0301 00000000 s_waitcnt lgkmcnt(0) ; BF8C007F s_buffer_load_dword s0, s[12:15], 0x0 ; C0220006 00000000 s_nop 0 ; BF800000 s_buffer_load_dword s1, s[12:15], 0x4 ; C0220046 00000004 s_nop 0 ; BF800000 s_buffer_load_dword s2, s[12:15], 0x8 ; C0220086 00000008 s_nop 0 ; BF800000 s_buffer_load_dword s3, s[12:15], 0x10 ; C02200C6 00000010 s_nop 0 ; BF800000 s_buffer_load_dword s4, s[12:15], 0x14 ; C0220106 00000014 s_nop 0 ; BF800000 s_buffer_load_dword s5, s[12:15], 0x18 ; C0220146 00000018 s_nop 0 ; BF800000 s_buffer_load_dword s6, s[12:15], 0x20 ; C0220186 00000020 s_nop 0 ; BF800000 s_buffer_load_dword s7, s[12:15], 0x24 ; C02201C6 00000024 s_nop 0 ; BF800000 s_buffer_load_dword s10, s[12:15], 0x28 ; C0220286 00000028 s_nop 0 ; BF800000 s_buffer_load_dword s11, s[12:15], 0x40 ; C02202C6 00000040 s_mov_b32 m0, s9 ; BEFC0009 s_buffer_load_dword s9, s[12:15], 0x50 ; C0220246 00000050 s_nop 0 ; BF800000 s_buffer_load_dword s18, s[12:15], 0x54 ; C0220486 00000054 s_nop 0 ; BF800000 s_buffer_load_dword s16, s[12:15], 0x60 ; C0220406 00000060 s_nop 0 ; BF800000 s_buffer_load_dword s19, s[12:15], 0x70 ; C02204C6 00000070 s_nop 0 ; BF800000 s_buffer_load_dword s20, s[12:15], 0x74 ; C0220506 00000074 v_interp_p1_f32 v0, v2, 0, 0, [m0] ; D4000002 s_buffer_load_dword s17, s[12:15], 0x80 ; C0220446 00000080 v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0] ; D4010003 v_interp_p1_f32 v1, v2, 1, 0, [m0] ; D4040102 v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0] ; D4050103 s_waitcnt lgkmcnt(0) ; BF8C007F v_mov_b32_e32 v2, s6 ; 7E040206 v_mac_f32_e32 v2, s0, v0 ; 2C040000 v_mac_f32_e32 v2, s3, v1 ; 2C040203 v_mov_b32_e32 v3, s7 ; 7E060207 v_mov_b32_e32 v4, s10 ; 7E08020A v_mac_f32_e32 v4, s2, v0 ; 2C080002 v_mac_f32_e32 v4, s5, v1 ; 2C080205 v_rcp_f32_e32 v4, v4 ; 7E084504 v_mac_f32_e32 v3, s1, v0 ; 2C060001 v_mac_f32_e32 v3, s4, v1 ; 2C060204 v_mov_b32_e32 v0, s16 ; 7E000210 v_sub_f32_e32 v0, s17, v0 ; 04000011 v_mad_f32 v3, v3, v4, -s18 ; D1C10003 804A0903 v_mov_b32_e32 v1, s18 ; 7E020212 v_sub_f32_e32 v5, s20, v1 ; 040A0214 v_mad_f32 v2, v2, v4, -s9 ; D1C10002 80260902 v_mov_b32_e32 v1, s9 ; 7E020209 v_sub_f32_e32 v1, s19, v1 ; 04020213 v_mul_f32_e32 v1, v1, v2 ; 0A020501 v_mac_f32_e32 v1, v5, v3 ; 2C020705 v_mac_f32_e32 v1, s16, v0 ; 2C020010 v_mul_f32_e32 v0, v2, v2 ; 0A000502 v_mac_f32_e32 v0, v3, v3 ; 2C000703 v_mad_f32 v2, -s16, s16, v0 ; D1C10002 24002010 v_mov_b32_e32 v0, 0x3727c5ac ; 7E0002FF 3727C5AC v_cmp_lt_f32_e64 s[0:1], |s11|, v0 ; D0410100 0002000B v_cmp_nlt_f32_e64 s[2:3], |s11|, v0 ; D04E0102 0002000B s_and_b64 vcc, exec, s[2:3] ; 86EA027E v_cndmask_b32_e64 v6, 0, -1, s[0:1] ; D1000006 00018280 s_cbranch_vccnz BB0_2 ; BF870000 v_mov_b32_e32 v5, 0 ; 7E0A0280 v_cmp_neq_f32_e32 vcc, 0, v1 ; 7C9A0280 v_mov_b32_e32 v0, 1 ; 7E000281 v_mov_b32_e32 v3, 0 ; 7E060280 v_mov_b32_e32 v4, 0 ; 7E080280 s_and_saveexec_b64 s[0:1], vcc ; BE80206A s_xor_b64 s[0:1], exec, s[0:1] ; 8880007E v_mov_b32_e32 v0, 0 ; 7E000280 v_rcp_f32_e32 v3, v1 ; 7E064501 v_cmp_eq_f32_e32 vcc, 0, v1 ; 7C840280 v_cndmask_b32_e64 v4, 0, -1, vcc ; D1000004 01A98280 v_mul_f32_e32 v5, 0.5, v2 ; 0A0A04F0 v_mul_f32_e32 v5, v3, v5 ; 0A0A0B03 v_mov_b32_e32 v3, -1 ; 7E0602C1 s_or_b64 exec, exec, s[0:1] ; 87FE007E s_buffer_load_dword s2, s[12:15], 0xa0 ; C0220086 000000A0 s_nop 0 ; BF800000 s_buffer_load_dword s3, s[12:15], 0xb0 ; C02200C6 000000B0 s_nop 0 ; BF800000 s_buffer_load_dword s4, s[12:15], 0xc0 ; C0220106 000000C0 s_nop 0 ; BF800000 s_buffer_load_dword s5, s[12:15], 0xd0 ; C0220146 000000D0 s_nop 0 ; BF800000 s_buffer_load_dword s6, s[12:15], 0xe0 ; C0220186 000000E0 s_nop 0 ; BF800000 s_buffer_load_dword s7, s[12:15], 0xf0 ; C02201C6 000000F0 s_nop 0 ; BF800000 s_buffer_load_dword s9, s[12:15], 0x100 ; C0220246 00000100 s_nop 0 ; BF800000 s_buffer_load_dword s10, s[12:15], 0x110 ; C0220286 00000110 s_nop 0 ; BF800000 s_buffer_load_dword s26, s[12:15], 0x120 ; C0220686 00000120 s_nop 0 ; BF800000 s_buffer_load_dword s27, s[12:15], 0x124 ; C02206C6 00000124 s_nop 0 ; BF800000 s_buffer_load_dword s28, s[12:15], 0x128 ; C0220706 00000128 s_nop 0 ; BF800000 s_buffer_load_dword s29, s[12:15], 0x12c ; C0220746 0000012C s_nop 0 ; BF800000 s_buffer_load_dword s30, s[12:15], 0x130 ; C0220786 00000130 s_nop 0 ; BF800000 s_buffer_load_dword s31, s[12:15], 0x134 ; C02207C6 00000134 s_nop 0 ; BF800000 s_buffer_load_dword s32, s[12:15], 0x138 ; C0220806 00000138 s_nop 0 ; BF800000 s_buffer_load_dword s33, s[12:15], 0x13c ; C0220846 0000013C s_nop 0 ; BF800000 s_buffer_load_dword s34, s[12:15], 0x140 ; C0220886 00000140 s_nop 0 ; BF800000 s_buffer_load_dword s35, s[12:15], 0x144 ; C02208C6 00000144 s_nop 0 ; BF800000 s_buffer_load_dword s36, s[12:15], 0x148 ; C0220906 00000148 s_nop 0 ; BF800000 s_buffer_load_dword s37, s[12:15], 0x14c ; C0220946 0000014C s_nop 0 ; BF800000 s_buffer_load_dword s38, s[12:15], 0x150 ; C0220986 00000150 s_nop 0 ; BF800000 s_buffer_load_dword s39, s[12:15], 0x154 ; C02209C6 00000154 s_nop 0 ; BF800000 s_buffer_load_dword s40, s[12:15], 0x158 ; C0220A06 00000158 s_nop 0 ; BF800000 s_buffer_load_dword s41, s[12:15], 0x15c ; C0220A46 0000015C s_nop 0 ; BF800000 s_buffer_load_dword s42, s[12:15], 0x160 ; C0220A86 00000160 s_nop 0 ; BF800000 s_buffer_load_dword s43, s[12:15], 0x164 ; C0220AC6 00000164 s_nop 0 ; BF800000 s_buffer_load_dword s44, s[12:15], 0x168 ; C0220B06 00000168 s_nop 0 ; BF800000 s_buffer_load_dword s45, s[12:15], 0x16c ; C0220B46 0000016C s_nop 0 ; BF800000 s_buffer_load_dword s46, s[12:15], 0x170 ; C0220B86 00000170 s_nop 0 ; BF800000 s_buffer_load_dword s47, s[12:15], 0x174 ; C0220BC6 00000174 s_nop 0 ; BF800000 s_buffer_load_dword s48, s[12:15], 0x178 ; C0220C06 00000178 s_nop 0 ; BF800000 s_buffer_load_dword s49, s[12:15], 0x17c ; C0220C46 0000017C s_nop 0 ; BF800000 s_buffer_load_dword s18, s[12:15], 0x180 ; C0220486 00000180 s_nop 0 ; BF800000 s_buffer_load_dword s19, s[12:15], 0x184 ; C02204C6 00000184 s_nop 0 ; BF800000 s_buffer_load_dword s20, s[12:15], 0x188 ; C0220506 00000188 s_nop 0 ; BF800000 s_buffer_load_dword s21, s[12:15], 0x18c ; C0220546 0000018C s_nop 0 ; BF800000 s_buffer_load_dword s22, s[12:15], 0x190 ; C0220586 00000190 s_nop 0 ; BF800000 s_buffer_load_dword s23, s[12:15], 0x194 ; C02205C6 00000194 s_nop 0 ; BF800000 s_buffer_load_dword s24, s[12:15], 0x198 ; C0220606 00000198 s_nop 0 ; BF800000 s_buffer_load_dword s25, s[12:15], 0x19c ; C0220646 0000019C v_cmp_ne_i32_e32 vcc, 0, v3 ; 7D8A0680 s_waitcnt lgkmcnt(0) ; BF8C007F s_and_saveexec_b64 s[50:51], vcc ; BEB2206A s_xor_b64 s[50:51], exec, s[50:51] ; 88B2327E s_cbranch_execz BB0_12 ; BF880000 s_buffer_load_dword s0, s[12:15], 0x30 ; C0220006 00000030 v_mov_b32_e32 v10, -1 ; 7E1402C1 s_waitcnt lgkmcnt(0) ; BF8C007F v_mov_b32_e32 v6, s0 ; 7E0C0200 v_cmp_ne_i32_e32 vcc, 0, v6 ; 7D8A0C80 s_and_b64 vcc, exec, vcc ; 86EA6A7E s_cbranch_vccnz BB0_11 ; BF870000 s_branch BB0_18 ; BF820000 v_mov_b32_e32 v7, s17 ; 7E0E0211 v_subrev_f32_e32 v8, s16, v7 ; 06100E10 v_mul_f32_e32 v8, v8, v5 ; 0A100B08 v_cmp_le_f32_e64 s[0:1], v8, -s16 ; D0430000 40002108 v_mov_b32_e32 v8, v5 ; 7E100305 s_and_saveexec_b64 s[0:1], s[0:1] ; BE802000 s_xor_b64 s[0:1], exec, s[0:1] ; 8880007E v_rcp_f32_e32 v8, s11 ; 7E10440B v_subrev_f32_e32 v9, v2, v1 ; 06120302 v_mul_f32_e32 v8, v8, v9 ; 0A101308 s_or_b64 exec, exec, s[0:1] ; 87FE007E v_subrev_f32_e32 v7, s16, v7 ; 060E0E10 v_mul_f32_e32 v7, v7, v8 ; 0A0E1107 v_cmp_le_f32_e64 vcc, v7, -s16 ; D043006A 40002107 v_cndmask_b32_e64 v9, 0, -1, vcc ; D1000009 01A98280 v_cndmask_b32_e32 v7, v4, v8 ; 000E1104 v_mov_b32_e32 v10, 0 ; 7E140280 v_cmp_ne_i32_e32 vcc, 0, v10 ; 7D8A1480 s_and_b64 vcc, exec, vcc ; 86EA6A7E s_cbranch_vccnz BB0_10 ; BF870000 s_branch BB0_15 ; BF820000 v_cmp_ge_f32_e32 vcc, 0, v5 ; 7C8C0A80 v_cmp_lt_f32_e64 s[0:1], 1.0, v5 ; D0410000 00020AF2 s_or_b64 s[0:1], vcc, s[0:1] ; 8780006A s_and_saveexec_b64 s[0:1], s[0:1] ; BE802000 s_xor_b64 s[0:1], exec, s[0:1] ; 8880007E v_rcp_f32_e32 v5, s11 ; 7E0A440B v_subrev_f32_e32 v1, v2, v1 ; 06020302 v_mul_f32_e32 v5, v5, v1 ; 0A0A0305 s_or_b64 exec, exec, s[0:1] ; 87FE007E v_cmp_ge_f32_e32 vcc, 0, v5 ; 7C8C0A80 v_cmp_lt_f32_e64 s[0:1], 1.0, v5 ; D0410000 00020AF2 s_or_b64 vcc, vcc, s[0:1] ; 87EA006A v_cndmask_b32_e64 v9, 0, -1, vcc ; D1000009 01A98280 v_cndmask_b32_e32 v7, v4, v5 ; 000E0B04 v_mov_b32_e32 v8, v5 ; 7E100305 v_cmp_ne_i32_e32 vcc, 0, v9 ; 7D8A1280 v_cndmask_b32_e64 v0, v0, 1, vcc ; D1000000 01A90300 v_cmp_ne_i32_e64 s[0:1], 0, v3 ; D0C50000 00020680 s_xor_b64 s[52:53], vcc, -1 ; 88B4C16A s_and_b64 s[0:1], s[0:1], s[52:53] ; 86803400 s_and_saveexec_b64 s[0:1], s[0:1] ; BE802000 s_xor_b64 s[0:1], exec, s[0:1] ; 8880007E s_cbranch_execz BB0_22 ; BF880000 v_cmp_ne_i32_e32 vcc, 1, v6 ; 7D8A0C81 s_and_b64 vcc, exec, vcc ; 86EA6A7E v_mov_b32_e32 v7, v8 ; 7E0E0308 s_cbranch_vccnz BB0_23 ; BF870000 v_fract_f32_e32 v7, v8 ; 7E0E3708 v_cmp_ne_i32_e32 vcc, 3, v6 ; 7D8A0C83 s_and_b64 vcc, exec, vcc ; 86EA6A7E s_cbranch_vccnz BB0_22 ; BF870000 v_mad_f32 v1, 0.5, v7, 0.5 ; D1C10001 03C20EF0 v_fract_f32_e32 v1, v1 ; 7E023701 v_mad_f32 v1, 2.0, v1, -1.0 ; D1C10001 03CE02F4 v_and_b32_e32 v7, 0x7fffffff, v1 ; 260E02FF 7FFFFFFF s_or_b64 exec, exec, s[0:1] ; 87FE007E v_mov_b32_e32 v4, v7 ; 7E080307 s_or_b64 exec, exec, s[50:51] ; 87FE327E s_buffer_load_dword s0, s[12:15], 0x90 ; C0220006 00000090 v_mov_b32_e32 v24, s26 ; 7E30021A v_mov_b32_e32 v25, s27 ; 7E32021B v_mov_b32_e32 v28, s28 ; 7E38021C v_mov_b32_e32 v32, s29 ; 7E40021D v_mov_b32_e32 v38, s30 ; 7E4C021E v_mov_b32_e32 v40, s31 ; 7E50021F v_mov_b32_e32 v41, s32 ; 7E520220 v_mov_b32_e32 v42, s33 ; 7E540221 v_mov_b32_e32 v27, s34 ; 7E360222 v_mov_b32_e32 v29, s35 ; 7E3A0223 v_mov_b32_e32 v30, s36 ; 7E3C0224 v_mov_b32_e32 v31, s37 ; 7E3E0225 v_mov_b32_e32 v15, s38 ; 7E1E0226 v_mov_b32_e32 v16, s39 ; 7E200227 v_mov_b32_e32 v18, s40 ; 7E240228 v_mov_b32_e32 v20, s41 ; 7E280229 v_mov_b32_e32 v10, s42 ; 7E14022A v_mov_b32_e32 v11, s43 ; 7E16022B v_mov_b32_e32 v12, s44 ; 7E18022C v_mov_b32_e32 v14, s45 ; 7E1C022D v_mov_b32_e32 v8, s46 ; 7E10022E v_mov_b32_e32 v7, s47 ; 7E0E022F v_mov_b32_e32 v6, s48 ; 7E0C0230 v_mov_b32_e32 v5, s49 ; 7E0A0231 v_mov_b32_e32 v17, s18 ; 7E220212 v_mov_b32_e32 v19, s19 ; 7E260213 v_mov_b32_e32 v21, s20 ; 7E2A0214 v_mov_b32_e32 v22, s21 ; 7E2C0215 v_mov_b32_e32 v36, s22 ; 7E480216 v_mov_b32_e32 v35, s23 ; 7E460217 v_mov_b32_e32 v34, s24 ; 7E440218 v_mov_b32_e32 v33, s25 ; 7E420219 v_mov_b32_e32 v45, s2 ; 7E5A0202 v_mov_b32_e32 v44, s3 ; 7E580203 v_mov_b32_e32 v43, s4 ; 7E560204 v_mov_b32_e32 v39, s5 ; 7E4E0205 v_mov_b32_e32 v23, s6 ; 7E2E0206 v_mov_b32_e32 v9, s7 ; 7E120207 v_mov_b32_e32 v26, s9 ; 7E340209 v_mov_b32_e32 v37, s10 ; 7E4A020A s_waitcnt lgkmcnt(0) ; BF8C007F v_cmp_ne_i32_e32 vcc, 1, v0 ; 7D8A0081 v_mov_b32_e32 v0, 0 ; 7E000280 v_mov_b32_e32 v1, 0 ; 7E020280 v_mov_b32_e32 v2, 0 ; 7E040280 v_mov_b32_e32 v3, 0 ; 7E060280 s_and_saveexec_b64 s[12:13], vcc ; BE8C206A s_xor_b64 s[12:13], exec, s[12:13] ; 888C0C7E s_cbranch_execz BB0_34 ; BF880000 v_cmp_ngt_f32_e32 vcc, s2, v4 ; 7C960802 v_cmp_gt_i32_e64 s[14:15], 1, s0 ; D0C4000E 00000081 s_or_b64 s[14:15], vcc, s[14:15] ; 878E0E6A v_mov_b32_e32 v3, v45 ; 7E06032D v_mov_b32_e32 v2, v32 ; 7E040320 v_mov_b32_e32 v0, v28 ; 7E00031C v_mov_b32_e32 v1, v25 ; 7E020319 v_mov_b32_e32 v46, v24 ; 7E5C0318 s_and_saveexec_b64 s[14:15], s[14:15] ; BE8E200E s_xor_b64 s[14:15], exec, s[14:15] ; 888E0E7E s_cbranch_execz BB0_35 ; BF880000 v_cmp_ngt_f32_e32 vcc, s3, v4 ; 7C960803 v_cmp_gt_i32_e64 s[16:17], 2, s0 ; D0C40010 00000082 s_or_b64 s[16:17], vcc, s[16:17] ; 8790106A s_and_saveexec_b64 s[16:17], s[16:17] ; BE902010 s_xor_b64 s[16:17], exec, s[16:17] ; 8890107E s_cbranch_execz BB0_33 ; BF880000 v_cmp_ngt_f32_e32 vcc, s4, v4 ; 7C960804 v_cmp_gt_i32_e64 s[18:19], 3, s0 ; D0C40012 00000083 s_or_b64 s[18:19], vcc, s[18:19] ; 8792126A s_and_saveexec_b64 s[18:19], s[18:19] ; BE922012 s_xor_b64 s[18:19], exec, s[18:19] ; 8892127E s_cbranch_execz BB0_32 ; BF880000 v_cmp_ngt_f32_e32 vcc, s5, v4 ; 7C960805 v_cmp_gt_i32_e64 s[20:21], 4, s0 ; D0C40014 00000084 s_or_b64 s[20:21], vcc, s[20:21] ; 8794146A s_and_saveexec_b64 s[20:21], s[20:21] ; BE942014 s_xor_b64 s[20:21], exec, s[20:21] ; 8894147E s_cbranch_execz BB0_31 ; BF880000 v_cmp_ngt_f32_e32 vcc, s6, v4 ; 7C960806 v_cmp_gt_i32_e64 s[22:23], 5, s0 ; D0C40016 00000085 s_or_b64 s[22:23], vcc, s[22:23] ; 8796166A s_and_saveexec_b64 s[22:23], s[22:23] ; BE962016 s_xor_b64 s[22:23], exec, s[22:23] ; 8896167E s_cbranch_execz BB0_30 ; BF880000 v_cmp_ngt_f32_e32 vcc, s7, v4 ; 7C960807 v_cmp_gt_i32_e64 s[24:25], 6, s0 ; D0C40018 00000086 s_or_b64 s[24:25], vcc, s[24:25] ; 8798186A s_and_saveexec_b64 s[24:25], s[24:25] ; BE982018 s_xor_b64 s[24:25], exec, s[24:25] ; 8898187E s_cbranch_execz BB0_29 ; BF880000 v_cmp_ngt_f32_e32 vcc, s9, v4 ; 7C960809 v_cmp_gt_i32_e64 s[26:27], 7, s0 ; D0C4001A 00000087 s_or_b64 s[26:27], vcc, s[26:27] ; 879A1A6A s_and_saveexec_b64 s[26:27], s[26:27] ; BE9A201A s_xor_b64 s[26:27], exec, s[26:27] ; 889A1A7E s_cbranch_execz BB0_28 ; BF880000 v_cmp_gt_f32_e32 vcc, s10, v4 ; 7C88080A v_cmp_lt_i32_e64 s[28:29], 7, s0 ; D0C1001C 00000087 s_and_b64 vcc, vcc, s[28:29] ; 86EA1C6A v_cndmask_b32_e32 v9, v37, v26 ; 00123525 v_cndmask_b32_e32 v5, v33, v22 ; 000A2D21 v_cndmask_b32_e32 v6, v34, v21 ; 000C2B22 v_cndmask_b32_e32 v7, v35, v19 ; 000E2723 v_cndmask_b32_e32 v8, v36, v17 ; 00102324 v_mov_b32_e32 v17, v36 ; 7E220324 v_mov_b32_e32 v19, v35 ; 7E260323 v_mov_b32_e32 v21, v34 ; 7E2A0322 v_mov_b32_e32 v22, v33 ; 7E2C0321 v_mov_b32_e32 v26, v37 ; 7E340325 s_or_b64 exec, exec, s[26:27] ; 87FE1A7E v_mov_b32_e32 v10, v8 ; 7E140308 v_mov_b32_e32 v11, v7 ; 7E160307 v_mov_b32_e32 v12, v6 ; 7E180306 v_mov_b32_e32 v14, v5 ; 7E1C0305 v_mov_b32_e32 v8, v17 ; 7E100311 v_mov_b32_e32 v7, v19 ; 7E0E0313 v_mov_b32_e32 v6, v21 ; 7E0C0315 v_mov_b32_e32 v5, v22 ; 7E0A0316 v_mov_b32_e32 v23, v9 ; 7E2E0309 v_mov_b32_e32 v9, v26 ; 7E12031A s_or_b64 exec, exec, s[24:25] ; 87FE187E v_mov_b32_e32 v15, v10 ; 7E1E030A v_mov_b32_e32 v16, v11 ; 7E20030B v_mov_b32_e32 v18, v12 ; 7E24030C v_mov_b32_e32 v20, v14 ; 7E28030E v_mov_b32_e32 v10, v8 ; 7E140308 v_mov_b32_e32 v11, v7 ; 7E160307 v_mov_b32_e32 v12, v6 ; 7E180306 v_mov_b32_e32 v14, v5 ; 7E1C0305 v_mov_b32_e32 v39, v23 ; 7E4E0317 v_mov_b32_e32 v23, v9 ; 7E2E0309 s_or_b64 exec, exec, s[22:23] ; 87FE167E v_mov_b32_e32 v27, v15 ; 7E36030F v_mov_b32_e32 v29, v16 ; 7E3A0310 v_mov_b32_e32 v30, v18 ; 7E3C0312 v_mov_b32_e32 v31, v20 ; 7E3E0314 v_mov_b32_e32 v15, v10 ; 7E1E030A v_mov_b32_e32 v16, v11 ; 7E20030B v_mov_b32_e32 v18, v12 ; 7E24030C v_mov_b32_e32 v20, v14 ; 7E28030E v_mov_b32_e32 v43, v39 ; 7E560327 v_mov_b32_e32 v39, v23 ; 7E4E0317 s_or_b64 exec, exec, s[20:21] ; 87FE147E v_mov_b32_e32 v38, v27 ; 7E4C031B v_mov_b32_e32 v40, v29 ; 7E50031D v_mov_b32_e32 v41, v30 ; 7E52031E v_mov_b32_e32 v42, v31 ; 7E54031F v_mov_b32_e32 v27, v15 ; 7E36030F v_mov_b32_e32 v29, v16 ; 7E3A0310 v_mov_b32_e32 v30, v18 ; 7E3C0312 v_mov_b32_e32 v31, v20 ; 7E3E0314 v_mov_b32_e32 v44, v43 ; 7E58032B v_mov_b32_e32 v43, v39 ; 7E560327 s_or_b64 exec, exec, s[18:19] ; 87FE127E v_mov_b32_e32 v24, v38 ; 7E300326 v_mov_b32_e32 v25, v40 ; 7E320328 v_mov_b32_e32 v28, v41 ; 7E380329 v_mov_b32_e32 v32, v42 ; 7E40032A v_mov_b32_e32 v38, v27 ; 7E4C031B v_mov_b32_e32 v40, v29 ; 7E50031D v_mov_b32_e32 v41, v30 ; 7E52031E v_mov_b32_e32 v42, v31 ; 7E54031F v_mov_b32_e32 v45, v44 ; 7E5A032C v_mov_b32_e32 v44, v43 ; 7E58032B s_or_b64 exec, exec, s[16:17] ; 87FE107E v_mov_b32_e32 v3, v45 ; 7E06032D v_mov_b32_e32 v2, v32 ; 7E040320 v_mov_b32_e32 v0, v28 ; 7E00031C v_mov_b32_e32 v1, v25 ; 7E020319 v_mov_b32_e32 v46, v24 ; 7E5C0318 v_mov_b32_e32 v45, v44 ; 7E5A032C v_mov_b32_e32 v32, v42 ; 7E40032A v_mov_b32_e32 v28, v41 ; 7E380329 v_mov_b32_e32 v25, v40 ; 7E320328 v_mov_b32_e32 v24, v38 ; 7E300326 s_or_b64 exec, exec, s[14:15] ; 87FE0E7E v_subrev_f32_e32 v5, v3, v45 ; 060A5B03 v_cmp_nlt_f32_e32 vcc, 2.0, v5 ; 7C9C0AF4 v_mov_b32_e32 v5, 0 ; 7E0A0280 s_and_saveexec_b64 s[14:15], vcc ; BE8E206A s_xor_b64 s[14:15], exec, s[14:15] ; 888E0E7E s_cbranch_execz BB0_44 ; BF880000 v_subrev_f32_e32 v5, v3, v45 ; 060A5B03 v_mov_b32_e32 v6, 0x358637bd ; 7E0C02FF 358637BD v_cmp_ngt_f32_e32 vcc, v6, v5 ; 7C960B06 v_mov_b32_e32 v5, 0 ; 7E0A0280 s_and_saveexec_b64 s[16:17], vcc ; BE90206A s_xor_b64 s[16:17], exec, s[16:17] ; 8890107E v_subrev_f32_e32 v5, v3, v45 ; 060A5B03 v_rcp_f32_e32 v5, v5 ; 7E0A4505 v_subrev_f32_e32 v3, v3, v4 ; 06060903 v_mul_f32_e32 v5, v5, v3 ; 0A0A0705 s_or_b64 exec, exec, s[16:17] ; 87FE107E s_or_b64 exec, exec, s[14:15] ; 87FE0E7E v_sub_f32_e32 v4, 1.0, v5 ; 04080AF2 v_mul_f32_e32 v3, v32, v5 ; 0A060B20 v_mac_f32_e32 v3, v2, v4 ; 2C060902 v_mul_f32_e32 v2, v24, v5 ; 0A040B18 v_mul_f32_e32 v6, v25, v5 ; 0A0C0B19 v_mul_f32_e32 v5, v28, v5 ; 0A0A0B1C v_mac_f32_e32 v2, v46, v4 ; 2C04092E v_mac_f32_e32 v6, v1, v4 ; 2C0C0901 v_mac_f32_e32 v5, v0, v4 ; 2C0A0900 v_mul_f32_e32 v0, v3, v2 ; 0A000503 v_mul_f32_e32 v1, v3, v6 ; 0A020D03 v_mul_f32_e32 v2, v3, v5 ; 0A040B03 s_or_b64 exec, exec, s[12:13] ; 87FE0C7E v_mul_f32_e32 v0, s11, v2 ; 0A00040B v_mad_f32 v2, v1, v1, -v0 ; D1C10002 84020301 v_mov_b32_e32 v5, 0 ; 7E0A0280 v_cmp_ngt_f32_e32 vcc, 0, v2 ; 7C960480 v_mov_b32_e32 v0, 1 ; 7E000281 v_mov_b32_e32 v3, 0 ; 7E060280 v_mov_b32_e32 v4, 0 ; 7E080280 s_and_saveexec_b64 s[0:1], vcc ; BE80206A s_xor_b64 s[0:1], exec, s[0:1] ; 8880007E v_cmp_ne_i32_e32 vcc, 0, v6 ; 7D8A0C80 v_rcp_f32_e32 v0, s11 ; 7E00440B v_cndmask_b32_e64 v4, 0, -1, vcc ; D1000004 01A98280 v_sqrt_f32_e32 v2, v2 ; 7E044F02 v_add_f32_e32 v3, v2, v1 ; 02060302 v_mul_f32_e32 v5, v0, v3 ; 0A0A0700 v_mov_b32_e32 v0, 0 ; 7E000280 v_mov_b32_e32 v3, -1 ; 7E0602C1 s_or_b64 exec, exec, s[0:1] ; 87FE007E s_branch BB0_5 ; BF820000 Shader epilog disassembly: v_cvt_pkrtz_f16_f32_e64 v0, v0, v1 ; D2960000 00020300 v_cvt_pkrtz_f16_f32_e64 v1, v2, v3 ; D2960001 00020702 exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; C4001C0F 00000100 s_endpgm ; BF810000