; ModuleID = '/usr/lib/beignet/beignet.bc'
target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
target triple = "spir"

@self_test.tmp = internal unnamed_addr addrspace(3) global [3 x i32] undef, align 4

; Function Attrs: nounwind readnone
declare spir_func i32 @__gen_ocl_get_group_id0() #0

; Function Attrs: nounwind readnone
declare spir_func i32 @__gen_ocl_get_group_id1() #0

; Function Attrs: nounwind readnone
declare spir_func i32 @__gen_ocl_get_group_id2() #0

; Function Attrs: alwaysinline nounwind readnone
define i32 @_Z12get_local_idj(i32 %dim) #1 {
  br label %NodeBlock3

NodeBlock3:                                       ; preds = %0
  %Pivot4 = icmp slt i32 %dim, 1
  br i1 %Pivot4, label %LeafBlock, label %NodeBlock

NodeBlock:                                        ; preds = %NodeBlock3
  %Pivot = icmp slt i32 %dim, 2
  br i1 %Pivot, label %3, label %LeafBlock1

LeafBlock1:                                       ; preds = %NodeBlock
  %SwitchLeaf2 = icmp eq i32 %dim, 2
  br i1 %SwitchLeaf2, label %5, label %NewDefault

LeafBlock:                                        ; preds = %NodeBlock3
  %SwitchLeaf = icmp eq i32 %dim, 0
  br i1 %SwitchLeaf, label %1, label %NewDefault

; <label>:1                                       ; preds = %LeafBlock
  %2 = tail call i32 @__gen_ocl_get_local_id0() #5
  br label %7

; <label>:3                                       ; preds = %NodeBlock
  %4 = tail call i32 @__gen_ocl_get_local_id1() #5
  br label %7

; <label>:5                                       ; preds = %LeafBlock1
  %6 = tail call i32 @__gen_ocl_get_local_id2() #5
  br label %7

NewDefault:                                       ; preds = %LeafBlock1, %LeafBlock
  br label %7

; <label>:7                                       ; preds = %NewDefault, %5, %3, %1
  %.0 = phi i32 [ %2, %1 ], [ %4, %3 ], [ %6, %5 ], [ 0, %NewDefault ]
  ret i32 %.0
}

; Function Attrs: nounwind readnone
declare spir_func i32 @__gen_ocl_get_local_id0() #0

; Function Attrs: nounwind readnone
declare spir_func i32 @__gen_ocl_get_local_id1() #0

; Function Attrs: nounwind readnone
declare spir_func i32 @__gen_ocl_get_local_id2() #0

; Function Attrs: nounwind readnone
declare spir_func i32 @__gen_ocl_get_local_size0() #0

; Function Attrs: nounwind readnone
declare spir_func i32 @__gen_ocl_get_local_size1() #0

; Function Attrs: nounwind readnone
declare spir_func i32 @__gen_ocl_get_local_size2() #0

; Function Attrs: nounwind readnone
declare spir_func i32 @__gen_ocl_get_global_offset0() #0

; Function Attrs: nounwind readnone
declare spir_func i32 @__gen_ocl_get_global_offset1() #0

; Function Attrs: nounwind readnone
declare spir_func i32 @__gen_ocl_get_global_offset2() #0

; Function Attrs: alwaysinline nounwind readnone
define i32 @_Z13get_global_idj(i32 %dim) #1 {
  br label %NodeBlock3

NodeBlock3:                                       ; preds = %0
  %Pivot4 = icmp slt i32 %dim, 1
  br i1 %Pivot4, label %LeafBlock, label %NodeBlock

NodeBlock:                                        ; preds = %NodeBlock3
  %Pivot = icmp slt i32 %dim, 2
  br i1 %Pivot, label %_Z12get_local_idj.exit.thread6, label %LeafBlock1

LeafBlock1:                                       ; preds = %NodeBlock
  %SwitchLeaf2 = icmp eq i32 %dim, 2
  br i1 %SwitchLeaf2, label %_Z12get_local_idj.exit.thread8, label %NewDefault

LeafBlock:                                        ; preds = %NodeBlock3
  %SwitchLeaf = icmp eq i32 %dim, 0
  br i1 %SwitchLeaf, label %_Z12get_local_idj.exit.thread, label %NewDefault

_Z12get_local_idj.exit.thread:                    ; preds = %LeafBlock
  %1 = tail call i32 @__gen_ocl_get_local_id0() #5
  %2 = tail call i32 @__gen_ocl_get_local_size0() #5
  %3 = tail call i32 @__gen_ocl_get_group_id0() #5
  %4 = mul i32 %3, %2
  %5 = add i32 %4, %1
  %6 = tail call i32 @__gen_ocl_get_global_offset0() #5
  br label %_Z17get_global_offsetj.exit

_Z12get_local_idj.exit.thread6:                   ; preds = %NodeBlock
  %7 = tail call i32 @__gen_ocl_get_local_id1() #5
  %8 = tail call i32 @__gen_ocl_get_local_size1() #5
  %9 = tail call i32 @__gen_ocl_get_group_id1() #5
  %10 = mul i32 %9, %8
  %11 = add i32 %10, %7
  %12 = tail call i32 @__gen_ocl_get_global_offset1() #5
  br label %_Z17get_global_offsetj.exit

_Z12get_local_idj.exit.thread8:                   ; preds = %LeafBlock1
  %13 = tail call i32 @__gen_ocl_get_local_id2() #5
  %14 = tail call i32 @__gen_ocl_get_local_size2() #5
  %15 = tail call i32 @__gen_ocl_get_group_id2() #5
  %16 = mul i32 %15, %14
  %17 = add i32 %16, %13
  %18 = tail call i32 @__gen_ocl_get_global_offset2() #5
  br label %_Z17get_global_offsetj.exit

NewDefault:                                       ; preds = %LeafBlock1, %LeafBlock
  br label %_Z17get_global_offsetj.exit

_Z17get_global_offsetj.exit:                      ; preds = %NewDefault, %_Z12get_local_idj.exit.thread8, %_Z12get_local_idj.exit.thread6, %_Z12get_local_idj.exit.thread
  %19 = phi i32 [ %5, %_Z12get_local_idj.exit.thread ], [ %11, %_Z12get_local_idj.exit.thread6 ], [ %17, %_Z12get_local_idj.exit.thread8 ], [ 0, %NewDefault ]
  %.0.i3 = phi i32 [ %6, %_Z12get_local_idj.exit.thread ], [ %12, %_Z12get_local_idj.exit.thread6 ], [ %18, %_Z12get_local_idj.exit.thread8 ], [ 0, %NewDefault ]
  %20 = add i32 %.0.i3, %19
  ret i32 %20
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memcpy_gg_align(i8 addrspace(1)* nocapture %dst, i8 addrspace(1)* nocapture readonly %src, i32 %size) #2 {
  %1 = icmp ult i32 %size, 4
  br i1 %1, label %.preheader, label %.lr.ph4

.preheader:                                       ; preds = %.lr.ph4, %0
  %index.0.lcssa = phi i32 [ 0, %0 ], [ %3, %.lr.ph4 ]
  %2 = icmp ult i32 %index.0.lcssa, %size
  br i1 %2, label %.lr.ph, label %._crit_edge

.lr.ph4:                                          ; preds = %0, %.lr.ph4
  %3 = phi i32 [ %13, %.lr.ph4 ], [ 4, %0 ]
  %index.02 = phi i32 [ %3, %.lr.ph4 ], [ 0, %0 ]
  %4 = ptrtoint i8 addrspace(1)* %src to i32
  %5 = add i32 %4, %index.02
  %6 = inttoptr i32 %5 to i8 addrspace(1)*
  %7 = bitcast i8 addrspace(1)* %6 to i32 addrspace(1)*
  %8 = load i32, i32 addrspace(1)* %7, align 4, !tbaa !8
  %9 = ptrtoint i8 addrspace(1)* %dst to i32
  %10 = add i32 %9, %index.02
  %11 = inttoptr i32 %10 to i8 addrspace(1)*
  %12 = bitcast i8 addrspace(1)* %11 to i32 addrspace(1)*
  store i32 %8, i32 addrspace(1)* %12, align 4, !tbaa !8
  %13 = add i32 %3, 4
  %14 = icmp ugt i32 %13, %size
  br i1 %14, label %.preheader, label %.lr.ph4

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %index.11 = phi i32 [ %22, %.lr.ph ], [ %index.0.lcssa, %.preheader ]
  %15 = ptrtoint i8 addrspace(1)* %src to i32
  %16 = add i32 %15, %index.11
  %17 = inttoptr i32 %16 to i8 addrspace(1)*
  %18 = load i8, i8 addrspace(1)* %17, align 1, !tbaa !12
  %19 = ptrtoint i8 addrspace(1)* %dst to i32
  %20 = add i32 %19, %index.11
  %21 = inttoptr i32 %20 to i8 addrspace(1)*
  store i8 %18, i8 addrspace(1)* %21, align 1, !tbaa !12
  %22 = add nuw i32 %index.11, 1
  %23 = icmp ult i32 %22, %size
  br i1 %23, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %.preheader
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memcpy_gg(i8 addrspace(1)* nocapture %dst, i8 addrspace(1)* nocapture readonly %src, i32 %size) #2 {
  %1 = icmp eq i32 %size, 0
  br i1 %1, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %0, %.lr.ph
  %index.01 = phi i32 [ %9, %.lr.ph ], [ 0, %0 ]
  %2 = ptrtoint i8 addrspace(1)* %src to i32
  %3 = add i32 %2, %index.01
  %4 = inttoptr i32 %3 to i8 addrspace(1)*
  %5 = load i8, i8 addrspace(1)* %4, align 1, !tbaa !12
  %6 = ptrtoint i8 addrspace(1)* %dst to i32
  %7 = add i32 %6, %index.01
  %8 = inttoptr i32 %7 to i8 addrspace(1)*
  store i8 %5, i8 addrspace(1)* %8, align 1, !tbaa !12
  %9 = add nuw i32 %index.01, 1
  %10 = icmp ult i32 %9, %size
  br i1 %10, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %0
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memcpy_gl_align(i8 addrspace(1)* nocapture %dst, i8 addrspace(3)* nocapture readonly %src, i32 %size) #2 {
  %1 = icmp ult i32 %size, 4
  br i1 %1, label %.preheader, label %.lr.ph4

.preheader:                                       ; preds = %.lr.ph4, %0
  %index.0.lcssa = phi i32 [ 0, %0 ], [ %3, %.lr.ph4 ]
  %2 = icmp ult i32 %index.0.lcssa, %size
  br i1 %2, label %.lr.ph, label %._crit_edge

.lr.ph4:                                          ; preds = %0, %.lr.ph4
  %3 = phi i32 [ %13, %.lr.ph4 ], [ 4, %0 ]
  %index.02 = phi i32 [ %3, %.lr.ph4 ], [ 0, %0 ]
  %4 = ptrtoint i8 addrspace(3)* %src to i32
  %5 = add i32 %4, %index.02
  %6 = inttoptr i32 %5 to i8 addrspace(3)*
  %7 = bitcast i8 addrspace(3)* %6 to i32 addrspace(3)*
  %8 = load i32, i32 addrspace(3)* %7, align 4, !tbaa !8
  %9 = ptrtoint i8 addrspace(1)* %dst to i32
  %10 = add i32 %9, %index.02
  %11 = inttoptr i32 %10 to i8 addrspace(1)*
  %12 = bitcast i8 addrspace(1)* %11 to i32 addrspace(1)*
  store i32 %8, i32 addrspace(1)* %12, align 4, !tbaa !8
  %13 = add i32 %3, 4
  %14 = icmp ugt i32 %13, %size
  br i1 %14, label %.preheader, label %.lr.ph4

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %index.11 = phi i32 [ %22, %.lr.ph ], [ %index.0.lcssa, %.preheader ]
  %15 = ptrtoint i8 addrspace(3)* %src to i32
  %16 = add i32 %15, %index.11
  %17 = inttoptr i32 %16 to i8 addrspace(3)*
  %18 = load i8, i8 addrspace(3)* %17, align 1, !tbaa !12
  %19 = ptrtoint i8 addrspace(1)* %dst to i32
  %20 = add i32 %19, %index.11
  %21 = inttoptr i32 %20 to i8 addrspace(1)*
  store i8 %18, i8 addrspace(1)* %21, align 1, !tbaa !12
  %22 = add nuw i32 %index.11, 1
  %23 = icmp ult i32 %22, %size
  br i1 %23, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %.preheader
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memcpy_gl(i8 addrspace(1)* nocapture %dst, i8 addrspace(3)* nocapture readonly %src, i32 %size) #2 {
  %1 = icmp eq i32 %size, 0
  br i1 %1, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %0, %.lr.ph
  %index.01 = phi i32 [ %9, %.lr.ph ], [ 0, %0 ]
  %2 = ptrtoint i8 addrspace(3)* %src to i32
  %3 = add i32 %2, %index.01
  %4 = inttoptr i32 %3 to i8 addrspace(3)*
  %5 = load i8, i8 addrspace(3)* %4, align 1, !tbaa !12
  %6 = ptrtoint i8 addrspace(1)* %dst to i32
  %7 = add i32 %6, %index.01
  %8 = inttoptr i32 %7 to i8 addrspace(1)*
  store i8 %5, i8 addrspace(1)* %8, align 1, !tbaa !12
  %9 = add nuw i32 %index.01, 1
  %10 = icmp ult i32 %9, %size
  br i1 %10, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %0
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memcpy_gp_align(i8 addrspace(1)* nocapture %dst, i8* nocapture readonly %src, i32 %size) #2 {
  %1 = icmp ult i32 %size, 4
  br i1 %1, label %.preheader, label %.lr.ph4

.preheader:                                       ; preds = %.lr.ph4, %0
  %index.0.lcssa = phi i32 [ 0, %0 ], [ %3, %.lr.ph4 ]
  %2 = icmp ult i32 %index.0.lcssa, %size
  br i1 %2, label %.lr.ph, label %._crit_edge

.lr.ph4:                                          ; preds = %0, %.lr.ph4
  %3 = phi i32 [ %13, %.lr.ph4 ], [ 4, %0 ]
  %index.02 = phi i32 [ %3, %.lr.ph4 ], [ 0, %0 ]
  %4 = ptrtoint i8* %src to i32
  %5 = add i32 %4, %index.02
  %6 = inttoptr i32 %5 to i8*
  %7 = bitcast i8* %6 to i32*
  %8 = load i32, i32* %7, align 4, !tbaa !8
  %9 = ptrtoint i8 addrspace(1)* %dst to i32
  %10 = add i32 %9, %index.02
  %11 = inttoptr i32 %10 to i8 addrspace(1)*
  %12 = bitcast i8 addrspace(1)* %11 to i32 addrspace(1)*
  store i32 %8, i32 addrspace(1)* %12, align 4, !tbaa !8
  %13 = add i32 %3, 4
  %14 = icmp ugt i32 %13, %size
  br i1 %14, label %.preheader, label %.lr.ph4

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %index.11 = phi i32 [ %22, %.lr.ph ], [ %index.0.lcssa, %.preheader ]
  %15 = ptrtoint i8* %src to i32
  %16 = add i32 %15, %index.11
  %17 = inttoptr i32 %16 to i8*
  %18 = load i8, i8* %17, align 1, !tbaa !12
  %19 = ptrtoint i8 addrspace(1)* %dst to i32
  %20 = add i32 %19, %index.11
  %21 = inttoptr i32 %20 to i8 addrspace(1)*
  store i8 %18, i8 addrspace(1)* %21, align 1, !tbaa !12
  %22 = add nuw i32 %index.11, 1
  %23 = icmp ult i32 %22, %size
  br i1 %23, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %.preheader
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memcpy_gp(i8 addrspace(1)* nocapture %dst, i8* nocapture readonly %src, i32 %size) #2 {
  %1 = icmp eq i32 %size, 0
  br i1 %1, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %0, %.lr.ph
  %index.01 = phi i32 [ %9, %.lr.ph ], [ 0, %0 ]
  %2 = ptrtoint i8* %src to i32
  %3 = add i32 %2, %index.01
  %4 = inttoptr i32 %3 to i8*
  %5 = load i8, i8* %4, align 1, !tbaa !12
  %6 = ptrtoint i8 addrspace(1)* %dst to i32
  %7 = add i32 %6, %index.01
  %8 = inttoptr i32 %7 to i8 addrspace(1)*
  store i8 %5, i8 addrspace(1)* %8, align 1, !tbaa !12
  %9 = add nuw i32 %index.01, 1
  %10 = icmp ult i32 %9, %size
  br i1 %10, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %0
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memcpy_gc_align(i8 addrspace(1)* nocapture %dst, i8 addrspace(2)* nocapture readonly %src, i32 %size) #2 {
  %1 = icmp ult i32 %size, 4
  br i1 %1, label %.preheader, label %.lr.ph4

.preheader:                                       ; preds = %.lr.ph4, %0
  %index.0.lcssa = phi i32 [ 0, %0 ], [ %3, %.lr.ph4 ]
  %2 = icmp ult i32 %index.0.lcssa, %size
  br i1 %2, label %.lr.ph, label %._crit_edge

.lr.ph4:                                          ; preds = %0, %.lr.ph4
  %3 = phi i32 [ %13, %.lr.ph4 ], [ 4, %0 ]
  %index.02 = phi i32 [ %3, %.lr.ph4 ], [ 0, %0 ]
  %4 = ptrtoint i8 addrspace(2)* %src to i32
  %5 = add i32 %4, %index.02
  %6 = inttoptr i32 %5 to i8 addrspace(2)*
  %7 = bitcast i8 addrspace(2)* %6 to i32 addrspace(2)*
  %8 = load i32, i32 addrspace(2)* %7, align 4, !tbaa !8
  %9 = ptrtoint i8 addrspace(1)* %dst to i32
  %10 = add i32 %9, %index.02
  %11 = inttoptr i32 %10 to i8 addrspace(1)*
  %12 = bitcast i8 addrspace(1)* %11 to i32 addrspace(1)*
  store i32 %8, i32 addrspace(1)* %12, align 4, !tbaa !8
  %13 = add i32 %3, 4
  %14 = icmp ugt i32 %13, %size
  br i1 %14, label %.preheader, label %.lr.ph4

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %index.11 = phi i32 [ %22, %.lr.ph ], [ %index.0.lcssa, %.preheader ]
  %15 = ptrtoint i8 addrspace(2)* %src to i32
  %16 = add i32 %15, %index.11
  %17 = inttoptr i32 %16 to i8 addrspace(2)*
  %18 = load i8, i8 addrspace(2)* %17, align 1, !tbaa !12
  %19 = ptrtoint i8 addrspace(1)* %dst to i32
  %20 = add i32 %19, %index.11
  %21 = inttoptr i32 %20 to i8 addrspace(1)*
  store i8 %18, i8 addrspace(1)* %21, align 1, !tbaa !12
  %22 = add nuw i32 %index.11, 1
  %23 = icmp ult i32 %22, %size
  br i1 %23, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %.preheader
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memcpy_gc(i8 addrspace(1)* nocapture %dst, i8 addrspace(2)* nocapture readonly %src, i32 %size) #2 {
  %1 = icmp eq i32 %size, 0
  br i1 %1, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %0, %.lr.ph
  %index.01 = phi i32 [ %9, %.lr.ph ], [ 0, %0 ]
  %2 = ptrtoint i8 addrspace(2)* %src to i32
  %3 = add i32 %2, %index.01
  %4 = inttoptr i32 %3 to i8 addrspace(2)*
  %5 = load i8, i8 addrspace(2)* %4, align 1, !tbaa !12
  %6 = ptrtoint i8 addrspace(1)* %dst to i32
  %7 = add i32 %6, %index.01
  %8 = inttoptr i32 %7 to i8 addrspace(1)*
  store i8 %5, i8 addrspace(1)* %8, align 1, !tbaa !12
  %9 = add nuw i32 %index.01, 1
  %10 = icmp ult i32 %9, %size
  br i1 %10, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %0
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memcpy_lg_align(i8 addrspace(3)* nocapture %dst, i8 addrspace(1)* nocapture readonly %src, i32 %size) #2 {
  %1 = icmp ult i32 %size, 4
  br i1 %1, label %.preheader, label %.lr.ph4

.preheader:                                       ; preds = %.lr.ph4, %0
  %index.0.lcssa = phi i32 [ 0, %0 ], [ %3, %.lr.ph4 ]
  %2 = icmp ult i32 %index.0.lcssa, %size
  br i1 %2, label %.lr.ph, label %._crit_edge

.lr.ph4:                                          ; preds = %0, %.lr.ph4
  %3 = phi i32 [ %13, %.lr.ph4 ], [ 4, %0 ]
  %index.02 = phi i32 [ %3, %.lr.ph4 ], [ 0, %0 ]
  %4 = ptrtoint i8 addrspace(1)* %src to i32
  %5 = add i32 %4, %index.02
  %6 = inttoptr i32 %5 to i8 addrspace(1)*
  %7 = bitcast i8 addrspace(1)* %6 to i32 addrspace(1)*
  %8 = load i32, i32 addrspace(1)* %7, align 4, !tbaa !8
  %9 = ptrtoint i8 addrspace(3)* %dst to i32
  %10 = add i32 %9, %index.02
  %11 = inttoptr i32 %10 to i8 addrspace(3)*
  %12 = bitcast i8 addrspace(3)* %11 to i32 addrspace(3)*
  store i32 %8, i32 addrspace(3)* %12, align 4, !tbaa !8
  %13 = add i32 %3, 4
  %14 = icmp ugt i32 %13, %size
  br i1 %14, label %.preheader, label %.lr.ph4

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %index.11 = phi i32 [ %22, %.lr.ph ], [ %index.0.lcssa, %.preheader ]
  %15 = ptrtoint i8 addrspace(1)* %src to i32
  %16 = add i32 %15, %index.11
  %17 = inttoptr i32 %16 to i8 addrspace(1)*
  %18 = load i8, i8 addrspace(1)* %17, align 1, !tbaa !12
  %19 = ptrtoint i8 addrspace(3)* %dst to i32
  %20 = add i32 %19, %index.11
  %21 = inttoptr i32 %20 to i8 addrspace(3)*
  store i8 %18, i8 addrspace(3)* %21, align 1, !tbaa !12
  %22 = add nuw i32 %index.11, 1
  %23 = icmp ult i32 %22, %size
  br i1 %23, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %.preheader
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memcpy_lg(i8 addrspace(3)* nocapture %dst, i8 addrspace(1)* nocapture readonly %src, i32 %size) #2 {
  %1 = icmp eq i32 %size, 0
  br i1 %1, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %0, %.lr.ph
  %index.01 = phi i32 [ %9, %.lr.ph ], [ 0, %0 ]
  %2 = ptrtoint i8 addrspace(1)* %src to i32
  %3 = add i32 %2, %index.01
  %4 = inttoptr i32 %3 to i8 addrspace(1)*
  %5 = load i8, i8 addrspace(1)* %4, align 1, !tbaa !12
  %6 = ptrtoint i8 addrspace(3)* %dst to i32
  %7 = add i32 %6, %index.01
  %8 = inttoptr i32 %7 to i8 addrspace(3)*
  store i8 %5, i8 addrspace(3)* %8, align 1, !tbaa !12
  %9 = add nuw i32 %index.01, 1
  %10 = icmp ult i32 %9, %size
  br i1 %10, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %0
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memcpy_ll_align(i8 addrspace(3)* nocapture %dst, i8 addrspace(3)* nocapture readonly %src, i32 %size) #2 {
  %1 = icmp ult i32 %size, 4
  br i1 %1, label %.preheader, label %.lr.ph4

.preheader:                                       ; preds = %.lr.ph4, %0
  %index.0.lcssa = phi i32 [ 0, %0 ], [ %3, %.lr.ph4 ]
  %2 = icmp ult i32 %index.0.lcssa, %size
  br i1 %2, label %.lr.ph, label %._crit_edge

.lr.ph4:                                          ; preds = %0, %.lr.ph4
  %3 = phi i32 [ %13, %.lr.ph4 ], [ 4, %0 ]
  %index.02 = phi i32 [ %3, %.lr.ph4 ], [ 0, %0 ]
  %4 = ptrtoint i8 addrspace(3)* %src to i32
  %5 = add i32 %4, %index.02
  %6 = inttoptr i32 %5 to i8 addrspace(3)*
  %7 = bitcast i8 addrspace(3)* %6 to i32 addrspace(3)*
  %8 = load i32, i32 addrspace(3)* %7, align 4, !tbaa !8
  %9 = ptrtoint i8 addrspace(3)* %dst to i32
  %10 = add i32 %9, %index.02
  %11 = inttoptr i32 %10 to i8 addrspace(3)*
  %12 = bitcast i8 addrspace(3)* %11 to i32 addrspace(3)*
  store i32 %8, i32 addrspace(3)* %12, align 4, !tbaa !8
  %13 = add i32 %3, 4
  %14 = icmp ugt i32 %13, %size
  br i1 %14, label %.preheader, label %.lr.ph4

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %index.11 = phi i32 [ %22, %.lr.ph ], [ %index.0.lcssa, %.preheader ]
  %15 = ptrtoint i8 addrspace(3)* %src to i32
  %16 = add i32 %15, %index.11
  %17 = inttoptr i32 %16 to i8 addrspace(3)*
  %18 = load i8, i8 addrspace(3)* %17, align 1, !tbaa !12
  %19 = ptrtoint i8 addrspace(3)* %dst to i32
  %20 = add i32 %19, %index.11
  %21 = inttoptr i32 %20 to i8 addrspace(3)*
  store i8 %18, i8 addrspace(3)* %21, align 1, !tbaa !12
  %22 = add nuw i32 %index.11, 1
  %23 = icmp ult i32 %22, %size
  br i1 %23, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %.preheader
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memcpy_ll(i8 addrspace(3)* nocapture %dst, i8 addrspace(3)* nocapture readonly %src, i32 %size) #2 {
  %1 = icmp eq i32 %size, 0
  br i1 %1, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %0, %.lr.ph
  %index.01 = phi i32 [ %9, %.lr.ph ], [ 0, %0 ]
  %2 = ptrtoint i8 addrspace(3)* %src to i32
  %3 = add i32 %2, %index.01
  %4 = inttoptr i32 %3 to i8 addrspace(3)*
  %5 = load i8, i8 addrspace(3)* %4, align 1, !tbaa !12
  %6 = ptrtoint i8 addrspace(3)* %dst to i32
  %7 = add i32 %6, %index.01
  %8 = inttoptr i32 %7 to i8 addrspace(3)*
  store i8 %5, i8 addrspace(3)* %8, align 1, !tbaa !12
  %9 = add nuw i32 %index.01, 1
  %10 = icmp ult i32 %9, %size
  br i1 %10, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %0
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memcpy_lp_align(i8 addrspace(3)* nocapture %dst, i8* nocapture readonly %src, i32 %size) #2 {
  %1 = icmp ult i32 %size, 4
  br i1 %1, label %.preheader, label %.lr.ph4

.preheader:                                       ; preds = %.lr.ph4, %0
  %index.0.lcssa = phi i32 [ 0, %0 ], [ %3, %.lr.ph4 ]
  %2 = icmp ult i32 %index.0.lcssa, %size
  br i1 %2, label %.lr.ph, label %._crit_edge

.lr.ph4:                                          ; preds = %0, %.lr.ph4
  %3 = phi i32 [ %13, %.lr.ph4 ], [ 4, %0 ]
  %index.02 = phi i32 [ %3, %.lr.ph4 ], [ 0, %0 ]
  %4 = ptrtoint i8* %src to i32
  %5 = add i32 %4, %index.02
  %6 = inttoptr i32 %5 to i8*
  %7 = bitcast i8* %6 to i32*
  %8 = load i32, i32* %7, align 4, !tbaa !8
  %9 = ptrtoint i8 addrspace(3)* %dst to i32
  %10 = add i32 %9, %index.02
  %11 = inttoptr i32 %10 to i8 addrspace(3)*
  %12 = bitcast i8 addrspace(3)* %11 to i32 addrspace(3)*
  store i32 %8, i32 addrspace(3)* %12, align 4, !tbaa !8
  %13 = add i32 %3, 4
  %14 = icmp ugt i32 %13, %size
  br i1 %14, label %.preheader, label %.lr.ph4

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %index.11 = phi i32 [ %22, %.lr.ph ], [ %index.0.lcssa, %.preheader ]
  %15 = ptrtoint i8* %src to i32
  %16 = add i32 %15, %index.11
  %17 = inttoptr i32 %16 to i8*
  %18 = load i8, i8* %17, align 1, !tbaa !12
  %19 = ptrtoint i8 addrspace(3)* %dst to i32
  %20 = add i32 %19, %index.11
  %21 = inttoptr i32 %20 to i8 addrspace(3)*
  store i8 %18, i8 addrspace(3)* %21, align 1, !tbaa !12
  %22 = add nuw i32 %index.11, 1
  %23 = icmp ult i32 %22, %size
  br i1 %23, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %.preheader
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memcpy_lp(i8 addrspace(3)* nocapture %dst, i8* nocapture readonly %src, i32 %size) #2 {
  %1 = icmp eq i32 %size, 0
  br i1 %1, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %0, %.lr.ph
  %index.01 = phi i32 [ %9, %.lr.ph ], [ 0, %0 ]
  %2 = ptrtoint i8* %src to i32
  %3 = add i32 %2, %index.01
  %4 = inttoptr i32 %3 to i8*
  %5 = load i8, i8* %4, align 1, !tbaa !12
  %6 = ptrtoint i8 addrspace(3)* %dst to i32
  %7 = add i32 %6, %index.01
  %8 = inttoptr i32 %7 to i8 addrspace(3)*
  store i8 %5, i8 addrspace(3)* %8, align 1, !tbaa !12
  %9 = add nuw i32 %index.01, 1
  %10 = icmp ult i32 %9, %size
  br i1 %10, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %0
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memcpy_lc_align(i8 addrspace(3)* nocapture %dst, i8 addrspace(2)* nocapture readonly %src, i32 %size) #2 {
  %1 = icmp ult i32 %size, 4
  br i1 %1, label %.preheader, label %.lr.ph4

.preheader:                                       ; preds = %.lr.ph4, %0
  %index.0.lcssa = phi i32 [ 0, %0 ], [ %3, %.lr.ph4 ]
  %2 = icmp ult i32 %index.0.lcssa, %size
  br i1 %2, label %.lr.ph, label %._crit_edge

.lr.ph4:                                          ; preds = %0, %.lr.ph4
  %3 = phi i32 [ %13, %.lr.ph4 ], [ 4, %0 ]
  %index.02 = phi i32 [ %3, %.lr.ph4 ], [ 0, %0 ]
  %4 = ptrtoint i8 addrspace(2)* %src to i32
  %5 = add i32 %4, %index.02
  %6 = inttoptr i32 %5 to i8 addrspace(2)*
  %7 = bitcast i8 addrspace(2)* %6 to i32 addrspace(2)*
  %8 = load i32, i32 addrspace(2)* %7, align 4, !tbaa !8
  %9 = ptrtoint i8 addrspace(3)* %dst to i32
  %10 = add i32 %9, %index.02
  %11 = inttoptr i32 %10 to i8 addrspace(3)*
  %12 = bitcast i8 addrspace(3)* %11 to i32 addrspace(3)*
  store i32 %8, i32 addrspace(3)* %12, align 4, !tbaa !8
  %13 = add i32 %3, 4
  %14 = icmp ugt i32 %13, %size
  br i1 %14, label %.preheader, label %.lr.ph4

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %index.11 = phi i32 [ %22, %.lr.ph ], [ %index.0.lcssa, %.preheader ]
  %15 = ptrtoint i8 addrspace(2)* %src to i32
  %16 = add i32 %15, %index.11
  %17 = inttoptr i32 %16 to i8 addrspace(2)*
  %18 = load i8, i8 addrspace(2)* %17, align 1, !tbaa !12
  %19 = ptrtoint i8 addrspace(3)* %dst to i32
  %20 = add i32 %19, %index.11
  %21 = inttoptr i32 %20 to i8 addrspace(3)*
  store i8 %18, i8 addrspace(3)* %21, align 1, !tbaa !12
  %22 = add nuw i32 %index.11, 1
  %23 = icmp ult i32 %22, %size
  br i1 %23, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %.preheader
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memcpy_lc(i8 addrspace(3)* nocapture %dst, i8 addrspace(2)* nocapture readonly %src, i32 %size) #2 {
  %1 = icmp eq i32 %size, 0
  br i1 %1, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %0, %.lr.ph
  %index.01 = phi i32 [ %9, %.lr.ph ], [ 0, %0 ]
  %2 = ptrtoint i8 addrspace(2)* %src to i32
  %3 = add i32 %2, %index.01
  %4 = inttoptr i32 %3 to i8 addrspace(2)*
  %5 = load i8, i8 addrspace(2)* %4, align 1, !tbaa !12
  %6 = ptrtoint i8 addrspace(3)* %dst to i32
  %7 = add i32 %6, %index.01
  %8 = inttoptr i32 %7 to i8 addrspace(3)*
  store i8 %5, i8 addrspace(3)* %8, align 1, !tbaa !12
  %9 = add nuw i32 %index.01, 1
  %10 = icmp ult i32 %9, %size
  br i1 %10, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %0
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memcpy_pg_align(i8* nocapture %dst, i8 addrspace(1)* nocapture readonly %src, i32 %size) #2 {
  %1 = icmp ult i32 %size, 4
  br i1 %1, label %.preheader, label %.lr.ph4

.preheader:                                       ; preds = %.lr.ph4, %0
  %index.0.lcssa = phi i32 [ 0, %0 ], [ %3, %.lr.ph4 ]
  %2 = icmp ult i32 %index.0.lcssa, %size
  br i1 %2, label %.lr.ph, label %._crit_edge

.lr.ph4:                                          ; preds = %0, %.lr.ph4
  %3 = phi i32 [ %13, %.lr.ph4 ], [ 4, %0 ]
  %index.02 = phi i32 [ %3, %.lr.ph4 ], [ 0, %0 ]
  %4 = ptrtoint i8 addrspace(1)* %src to i32
  %5 = add i32 %4, %index.02
  %6 = inttoptr i32 %5 to i8 addrspace(1)*
  %7 = bitcast i8 addrspace(1)* %6 to i32 addrspace(1)*
  %8 = load i32, i32 addrspace(1)* %7, align 4, !tbaa !8
  %9 = ptrtoint i8* %dst to i32
  %10 = add i32 %9, %index.02
  %11 = inttoptr i32 %10 to i8*
  %12 = bitcast i8* %11 to i32*
  store i32 %8, i32* %12, align 4, !tbaa !8
  %13 = add i32 %3, 4
  %14 = icmp ugt i32 %13, %size
  br i1 %14, label %.preheader, label %.lr.ph4

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %index.11 = phi i32 [ %22, %.lr.ph ], [ %index.0.lcssa, %.preheader ]
  %15 = ptrtoint i8 addrspace(1)* %src to i32
  %16 = add i32 %15, %index.11
  %17 = inttoptr i32 %16 to i8 addrspace(1)*
  %18 = load i8, i8 addrspace(1)* %17, align 1, !tbaa !12
  %19 = ptrtoint i8* %dst to i32
  %20 = add i32 %19, %index.11
  %21 = inttoptr i32 %20 to i8*
  store i8 %18, i8* %21, align 1, !tbaa !12
  %22 = add nuw i32 %index.11, 1
  %23 = icmp ult i32 %22, %size
  br i1 %23, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %.preheader
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memcpy_pg(i8* nocapture %dst, i8 addrspace(1)* nocapture readonly %src, i32 %size) #2 {
  %1 = icmp eq i32 %size, 0
  br i1 %1, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %0, %.lr.ph
  %index.01 = phi i32 [ %9, %.lr.ph ], [ 0, %0 ]
  %2 = ptrtoint i8 addrspace(1)* %src to i32
  %3 = add i32 %2, %index.01
  %4 = inttoptr i32 %3 to i8 addrspace(1)*
  %5 = load i8, i8 addrspace(1)* %4, align 1, !tbaa !12
  %6 = ptrtoint i8* %dst to i32
  %7 = add i32 %6, %index.01
  %8 = inttoptr i32 %7 to i8*
  store i8 %5, i8* %8, align 1, !tbaa !12
  %9 = add nuw i32 %index.01, 1
  %10 = icmp ult i32 %9, %size
  br i1 %10, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %0
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memcpy_pl_align(i8* nocapture %dst, i8 addrspace(3)* nocapture readonly %src, i32 %size) #2 {
  %1 = icmp ult i32 %size, 4
  br i1 %1, label %.preheader, label %.lr.ph4

.preheader:                                       ; preds = %.lr.ph4, %0
  %index.0.lcssa = phi i32 [ 0, %0 ], [ %3, %.lr.ph4 ]
  %2 = icmp ult i32 %index.0.lcssa, %size
  br i1 %2, label %.lr.ph, label %._crit_edge

.lr.ph4:                                          ; preds = %0, %.lr.ph4
  %3 = phi i32 [ %13, %.lr.ph4 ], [ 4, %0 ]
  %index.02 = phi i32 [ %3, %.lr.ph4 ], [ 0, %0 ]
  %4 = ptrtoint i8 addrspace(3)* %src to i32
  %5 = add i32 %4, %index.02
  %6 = inttoptr i32 %5 to i8 addrspace(3)*
  %7 = bitcast i8 addrspace(3)* %6 to i32 addrspace(3)*
  %8 = load i32, i32 addrspace(3)* %7, align 4, !tbaa !8
  %9 = ptrtoint i8* %dst to i32
  %10 = add i32 %9, %index.02
  %11 = inttoptr i32 %10 to i8*
  %12 = bitcast i8* %11 to i32*
  store i32 %8, i32* %12, align 4, !tbaa !8
  %13 = add i32 %3, 4
  %14 = icmp ugt i32 %13, %size
  br i1 %14, label %.preheader, label %.lr.ph4

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %index.11 = phi i32 [ %22, %.lr.ph ], [ %index.0.lcssa, %.preheader ]
  %15 = ptrtoint i8 addrspace(3)* %src to i32
  %16 = add i32 %15, %index.11
  %17 = inttoptr i32 %16 to i8 addrspace(3)*
  %18 = load i8, i8 addrspace(3)* %17, align 1, !tbaa !12
  %19 = ptrtoint i8* %dst to i32
  %20 = add i32 %19, %index.11
  %21 = inttoptr i32 %20 to i8*
  store i8 %18, i8* %21, align 1, !tbaa !12
  %22 = add nuw i32 %index.11, 1
  %23 = icmp ult i32 %22, %size
  br i1 %23, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %.preheader
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memcpy_pl(i8* nocapture %dst, i8 addrspace(3)* nocapture readonly %src, i32 %size) #2 {
  %1 = icmp eq i32 %size, 0
  br i1 %1, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %0, %.lr.ph
  %index.01 = phi i32 [ %9, %.lr.ph ], [ 0, %0 ]
  %2 = ptrtoint i8 addrspace(3)* %src to i32
  %3 = add i32 %2, %index.01
  %4 = inttoptr i32 %3 to i8 addrspace(3)*
  %5 = load i8, i8 addrspace(3)* %4, align 1, !tbaa !12
  %6 = ptrtoint i8* %dst to i32
  %7 = add i32 %6, %index.01
  %8 = inttoptr i32 %7 to i8*
  store i8 %5, i8* %8, align 1, !tbaa !12
  %9 = add nuw i32 %index.01, 1
  %10 = icmp ult i32 %9, %size
  br i1 %10, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %0
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memcpy_pp_align(i8* nocapture %dst, i8* nocapture readonly %src, i32 %size) #2 {
  %1 = icmp ult i32 %size, 4
  br i1 %1, label %.preheader, label %.lr.ph4

.preheader:                                       ; preds = %.lr.ph4, %0
  %index.0.lcssa = phi i32 [ 0, %0 ], [ %3, %.lr.ph4 ]
  %2 = icmp ult i32 %index.0.lcssa, %size
  br i1 %2, label %.lr.ph, label %._crit_edge

.lr.ph4:                                          ; preds = %0, %.lr.ph4
  %3 = phi i32 [ %13, %.lr.ph4 ], [ 4, %0 ]
  %index.02 = phi i32 [ %3, %.lr.ph4 ], [ 0, %0 ]
  %4 = ptrtoint i8* %src to i32
  %5 = add i32 %4, %index.02
  %6 = inttoptr i32 %5 to i8*
  %7 = bitcast i8* %6 to i32*
  %8 = load i32, i32* %7, align 4, !tbaa !8
  %9 = ptrtoint i8* %dst to i32
  %10 = add i32 %9, %index.02
  %11 = inttoptr i32 %10 to i8*
  %12 = bitcast i8* %11 to i32*
  store i32 %8, i32* %12, align 4, !tbaa !8
  %13 = add i32 %3, 4
  %14 = icmp ugt i32 %13, %size
  br i1 %14, label %.preheader, label %.lr.ph4

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %index.11 = phi i32 [ %22, %.lr.ph ], [ %index.0.lcssa, %.preheader ]
  %15 = ptrtoint i8* %src to i32
  %16 = add i32 %15, %index.11
  %17 = inttoptr i32 %16 to i8*
  %18 = load i8, i8* %17, align 1, !tbaa !12
  %19 = ptrtoint i8* %dst to i32
  %20 = add i32 %19, %index.11
  %21 = inttoptr i32 %20 to i8*
  store i8 %18, i8* %21, align 1, !tbaa !12
  %22 = add nuw i32 %index.11, 1
  %23 = icmp ult i32 %22, %size
  br i1 %23, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %.preheader
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memcpy_pp(i8* nocapture %dst, i8* nocapture readonly %src, i32 %size) #2 {
  %1 = icmp eq i32 %size, 0
  br i1 %1, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %0, %.lr.ph
  %index.01 = phi i32 [ %9, %.lr.ph ], [ 0, %0 ]
  %2 = ptrtoint i8* %src to i32
  %3 = add i32 %2, %index.01
  %4 = inttoptr i32 %3 to i8*
  %5 = load i8, i8* %4, align 1, !tbaa !12
  %6 = ptrtoint i8* %dst to i32
  %7 = add i32 %6, %index.01
  %8 = inttoptr i32 %7 to i8*
  store i8 %5, i8* %8, align 1, !tbaa !12
  %9 = add nuw i32 %index.01, 1
  %10 = icmp ult i32 %9, %size
  br i1 %10, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %0
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memcpy_pc_align(i8* nocapture %dst, i8 addrspace(2)* nocapture readonly %src, i32 %size) #2 {
  %1 = icmp ult i32 %size, 4
  br i1 %1, label %.preheader, label %.lr.ph4

.preheader:                                       ; preds = %.lr.ph4, %0
  %index.0.lcssa = phi i32 [ 0, %0 ], [ %3, %.lr.ph4 ]
  %2 = icmp ult i32 %index.0.lcssa, %size
  br i1 %2, label %.lr.ph, label %._crit_edge

.lr.ph4:                                          ; preds = %0, %.lr.ph4
  %3 = phi i32 [ %13, %.lr.ph4 ], [ 4, %0 ]
  %index.02 = phi i32 [ %3, %.lr.ph4 ], [ 0, %0 ]
  %4 = ptrtoint i8 addrspace(2)* %src to i32
  %5 = add i32 %4, %index.02
  %6 = inttoptr i32 %5 to i8 addrspace(2)*
  %7 = bitcast i8 addrspace(2)* %6 to i32 addrspace(2)*
  %8 = load i32, i32 addrspace(2)* %7, align 4, !tbaa !8
  %9 = ptrtoint i8* %dst to i32
  %10 = add i32 %9, %index.02
  %11 = inttoptr i32 %10 to i8*
  %12 = bitcast i8* %11 to i32*
  store i32 %8, i32* %12, align 4, !tbaa !8
  %13 = add i32 %3, 4
  %14 = icmp ugt i32 %13, %size
  br i1 %14, label %.preheader, label %.lr.ph4

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %index.11 = phi i32 [ %22, %.lr.ph ], [ %index.0.lcssa, %.preheader ]
  %15 = ptrtoint i8 addrspace(2)* %src to i32
  %16 = add i32 %15, %index.11
  %17 = inttoptr i32 %16 to i8 addrspace(2)*
  %18 = load i8, i8 addrspace(2)* %17, align 1, !tbaa !12
  %19 = ptrtoint i8* %dst to i32
  %20 = add i32 %19, %index.11
  %21 = inttoptr i32 %20 to i8*
  store i8 %18, i8* %21, align 1, !tbaa !12
  %22 = add nuw i32 %index.11, 1
  %23 = icmp ult i32 %22, %size
  br i1 %23, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %.preheader
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memcpy_pc(i8* nocapture %dst, i8 addrspace(2)* nocapture readonly %src, i32 %size) #2 {
  %1 = icmp eq i32 %size, 0
  br i1 %1, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %0, %.lr.ph
  %index.01 = phi i32 [ %9, %.lr.ph ], [ 0, %0 ]
  %2 = ptrtoint i8 addrspace(2)* %src to i32
  %3 = add i32 %2, %index.01
  %4 = inttoptr i32 %3 to i8 addrspace(2)*
  %5 = load i8, i8 addrspace(2)* %4, align 1, !tbaa !12
  %6 = ptrtoint i8* %dst to i32
  %7 = add i32 %6, %index.01
  %8 = inttoptr i32 %7 to i8*
  store i8 %5, i8* %8, align 1, !tbaa !12
  %9 = add nuw i32 %index.01, 1
  %10 = icmp ult i32 %9, %size
  br i1 %10, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %0
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memset_g_align(i8 addrspace(1)* nocapture %dst, i8 zeroext %val, i32 %size) #2 {
  %1 = zext i8 %val to i32
  %2 = shl nuw i32 %1, 24
  %3 = shl nuw nsw i32 %1, 16
  %4 = shl nuw nsw i32 %1, 8
  %5 = or i32 %3, %1
  %6 = or i32 %5, %2
  %7 = or i32 %6, %4
  %8 = icmp ugt i32 %size, 4
  br i1 %8, label %.preheader, label %.lr.ph4

.preheader:                                       ; preds = %.lr.ph4, %0
  %index.0.lcssa = phi i32 [ 0, %0 ], [ %10, %.lr.ph4 ]
  %9 = icmp ult i32 %index.0.lcssa, %size
  br i1 %9, label %.lr.ph, label %._crit_edge

.lr.ph4:                                          ; preds = %0, %.lr.ph4
  %10 = phi i32 [ %15, %.lr.ph4 ], [ 4, %0 ]
  %index.02 = phi i32 [ %10, %.lr.ph4 ], [ 0, %0 ]
  %11 = ptrtoint i8 addrspace(1)* %dst to i32
  %12 = add i32 %11, %index.02
  %13 = inttoptr i32 %12 to i8 addrspace(1)*
  %14 = bitcast i8 addrspace(1)* %13 to i32 addrspace(1)*
  store i32 %7, i32 addrspace(1)* %14, align 4, !tbaa !8
  %15 = add i32 %10, 4
  %16 = icmp ult i32 %15, %size
  br i1 %16, label %.preheader, label %.lr.ph4

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %index.11 = phi i32 [ %20, %.lr.ph ], [ %index.0.lcssa, %.preheader ]
  %17 = ptrtoint i8 addrspace(1)* %dst to i32
  %18 = add i32 %17, %index.11
  %19 = inttoptr i32 %18 to i8 addrspace(1)*
  store i8 %val, i8 addrspace(1)* %19, align 1, !tbaa !12
  %20 = add nuw i32 %index.11, 1
  %21 = icmp ult i32 %20, %size
  br i1 %21, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %.preheader
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memset_g(i8 addrspace(1)* nocapture %dst, i8 zeroext %val, i32 %size) #2 {
  %1 = icmp eq i32 %size, 0
  br i1 %1, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %0, %.lr.ph
  %index.01 = phi i32 [ %5, %.lr.ph ], [ 0, %0 ]
  %2 = ptrtoint i8 addrspace(1)* %dst to i32
  %3 = add i32 %2, %index.01
  %4 = inttoptr i32 %3 to i8 addrspace(1)*
  store i8 %val, i8 addrspace(1)* %4, align 1, !tbaa !12
  %5 = add nuw i32 %index.01, 1
  %6 = icmp ult i32 %5, %size
  br i1 %6, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %0
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memset_l_align(i8 addrspace(3)* nocapture %dst, i8 zeroext %val, i32 %size) #2 {
  %1 = zext i8 %val to i32
  %2 = shl nuw i32 %1, 24
  %3 = shl nuw nsw i32 %1, 16
  %4 = shl nuw nsw i32 %1, 8
  %5 = or i32 %3, %1
  %6 = or i32 %5, %2
  %7 = or i32 %6, %4
  %8 = icmp ugt i32 %size, 4
  br i1 %8, label %.preheader, label %.lr.ph4

.preheader:                                       ; preds = %.lr.ph4, %0
  %index.0.lcssa = phi i32 [ 0, %0 ], [ %10, %.lr.ph4 ]
  %9 = icmp ult i32 %index.0.lcssa, %size
  br i1 %9, label %.lr.ph, label %._crit_edge

.lr.ph4:                                          ; preds = %0, %.lr.ph4
  %10 = phi i32 [ %15, %.lr.ph4 ], [ 4, %0 ]
  %index.02 = phi i32 [ %10, %.lr.ph4 ], [ 0, %0 ]
  %11 = ptrtoint i8 addrspace(3)* %dst to i32
  %12 = add i32 %11, %index.02
  %13 = inttoptr i32 %12 to i8 addrspace(3)*
  %14 = bitcast i8 addrspace(3)* %13 to i32 addrspace(3)*
  store i32 %7, i32 addrspace(3)* %14, align 4, !tbaa !8
  %15 = add i32 %10, 4
  %16 = icmp ult i32 %15, %size
  br i1 %16, label %.preheader, label %.lr.ph4

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %index.11 = phi i32 [ %20, %.lr.ph ], [ %index.0.lcssa, %.preheader ]
  %17 = ptrtoint i8 addrspace(3)* %dst to i32
  %18 = add i32 %17, %index.11
  %19 = inttoptr i32 %18 to i8 addrspace(3)*
  store i8 %val, i8 addrspace(3)* %19, align 1, !tbaa !12
  %20 = add nuw i32 %index.11, 1
  %21 = icmp ult i32 %20, %size
  br i1 %21, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %.preheader
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memset_l(i8 addrspace(3)* nocapture %dst, i8 zeroext %val, i32 %size) #2 {
  %1 = icmp eq i32 %size, 0
  br i1 %1, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %0, %.lr.ph
  %index.01 = phi i32 [ %5, %.lr.ph ], [ 0, %0 ]
  %2 = ptrtoint i8 addrspace(3)* %dst to i32
  %3 = add i32 %2, %index.01
  %4 = inttoptr i32 %3 to i8 addrspace(3)*
  store i8 %val, i8 addrspace(3)* %4, align 1, !tbaa !12
  %5 = add nuw i32 %index.01, 1
  %6 = icmp ult i32 %5, %size
  br i1 %6, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %0
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memset_p_align(i8* nocapture %dst, i8 zeroext %val, i32 %size) #2 {
  %1 = zext i8 %val to i32
  %2 = shl nuw i32 %1, 24
  %3 = shl nuw nsw i32 %1, 16
  %4 = shl nuw nsw i32 %1, 8
  %5 = or i32 %3, %1
  %6 = or i32 %5, %2
  %7 = or i32 %6, %4
  %8 = icmp ugt i32 %size, 4
  br i1 %8, label %.preheader, label %.lr.ph4

.preheader:                                       ; preds = %.lr.ph4, %0
  %index.0.lcssa = phi i32 [ 0, %0 ], [ %10, %.lr.ph4 ]
  %9 = icmp ult i32 %index.0.lcssa, %size
  br i1 %9, label %.lr.ph, label %._crit_edge

.lr.ph4:                                          ; preds = %0, %.lr.ph4
  %10 = phi i32 [ %15, %.lr.ph4 ], [ 4, %0 ]
  %index.02 = phi i32 [ %10, %.lr.ph4 ], [ 0, %0 ]
  %11 = ptrtoint i8* %dst to i32
  %12 = add i32 %11, %index.02
  %13 = inttoptr i32 %12 to i8*
  %14 = bitcast i8* %13 to i32*
  store i32 %7, i32* %14, align 4, !tbaa !8
  %15 = add i32 %10, 4
  %16 = icmp ult i32 %15, %size
  br i1 %16, label %.preheader, label %.lr.ph4

.lr.ph:                                           ; preds = %.preheader, %.lr.ph
  %index.11 = phi i32 [ %20, %.lr.ph ], [ %index.0.lcssa, %.preheader ]
  %17 = ptrtoint i8* %dst to i32
  %18 = add i32 %17, %index.11
  %19 = inttoptr i32 %18 to i8*
  store i8 %val, i8* %19, align 1, !tbaa !12
  %20 = add nuw i32 %index.11, 1
  %21 = icmp ult i32 %20, %size
  br i1 %21, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %.preheader
  ret void
}

; Function Attrs: alwaysinline norecurse nounwind
define void @__gen_memset_p(i8* nocapture %dst, i8 zeroext %val, i32 %size) #2 {
  %1 = icmp eq i32 %size, 0
  br i1 %1, label %._crit_edge, label %.lr.ph

.lr.ph:                                           ; preds = %0, %.lr.ph
  %index.01 = phi i32 [ %5, %.lr.ph ], [ 0, %0 ]
  %2 = ptrtoint i8* %dst to i32
  %3 = add i32 %2, %index.01
  %4 = inttoptr i32 %3 to i8*
  store i8 %val, i8* %4, align 1, !tbaa !12
  %5 = add nuw i32 %index.01, 1
  %6 = icmp ult i32 %5, %size
  br i1 %6, label %.lr.ph, label %._crit_edge

._crit_edge:                                      ; preds = %.lr.ph, %0
  ret void
}

; Function Attrs: alwaysinline noduplicate nounwind
define void @_Z7barrierj(i32 %flags) #3 {
  br label %NodeBlock3

NodeBlock3:                                       ; preds = %0
  %Pivot4 = icmp slt i32 %flags, 2
  br i1 %Pivot4, label %LeafBlock, label %NodeBlock

NodeBlock:                                        ; preds = %NodeBlock3
  %Pivot = icmp slt i32 %flags, 3
  br i1 %Pivot, label %barrier_global, label %LeafBlock1

LeafBlock1:                                       ; preds = %NodeBlock
  %SwitchLeaf2 = icmp eq i32 %flags, 3
  br i1 %SwitchLeaf2, label %barrier_local_global, label %NewDefault

LeafBlock:                                        ; preds = %NodeBlock3
  %SwitchLeaf = icmp eq i32 %flags, 1
  br i1 %SwitchLeaf, label %barrier_local, label %NewDefault

barrier_local_global:                             ; preds = %LeafBlock1
  tail call void @__gen_ocl_barrier_local_and_global()
  br label %done

barrier_local:                                    ; preds = %LeafBlock
  tail call void @__gen_ocl_barrier_local()
  br label %done

barrier_global:                                   ; preds = %NodeBlock
  tail call void @__gen_ocl_barrier_global()
  br label %done

NewDefault:                                       ; preds = %LeafBlock1, %LeafBlock
  br label %done

done:                                             ; preds = %NewDefault, %barrier_global, %barrier_local, %barrier_local_global
  ret void
}

; Function Attrs: alwaysinline noduplicate nounwind
declare void @__gen_ocl_barrier_local_and_global() #3

; Function Attrs: alwaysinline noduplicate nounwind
declare void @__gen_ocl_barrier_local() #3

; Function Attrs: alwaysinline noduplicate nounwind
declare void @__gen_ocl_barrier_global() #3

; Function Attrs: nounwind
define void @self_test(i32 addrspace(1)* nocapture %buf) #4 {
  %1 = tail call i32 @__gen_ocl_get_local_id0() #5
  %2 = ptrtoint i32 addrspace(1)* %buf to i32
  %3 = mul i32 4, %1
  %4 = add i32 %2, %3
  %5 = inttoptr i32 %4 to i32 addrspace(1)*
  %6 = load i32, i32 addrspace(1)* %5, align 4, !tbaa !8
  %7 = ptrtoint [3 x i32] addrspace(3)* @self_test.tmp to i32
  %8 = mul i32 4, %1
  %9 = add i32 %7, %8
  %10 = inttoptr i32 %9 to i32 addrspace(3)*
  store i32 %6, i32 addrspace(3)* %10, align 4, !tbaa !8
  tail call void @__gen_ocl_barrier_local() #6
  %11 = sub i32 2, %1
  %12 = ptrtoint [3 x i32] addrspace(3)* @self_test.tmp to i32
  %13 = mul i32 4, %11
  %14 = add i32 %12, %13
  %15 = inttoptr i32 %14 to i32 addrspace(3)*
  %16 = load i32, i32 addrspace(3)* %15, align 4, !tbaa !8
  %17 = tail call i32 @__gen_ocl_get_local_size0() #5
  %18 = tail call i32 @__gen_ocl_get_group_id0() #5
  %19 = mul i32 %18, %17
  %20 = add i32 %19, %1
  %21 = tail call i32 @__gen_ocl_get_global_offset0() #5
  %22 = add i32 %20, %21
  %23 = ptrtoint i32 addrspace(1)* %buf to i32
  %24 = mul i32 4, %22
  %25 = add i32 %23, %24
  %26 = inttoptr i32 %25 to i32 addrspace(1)*
  %27 = load i32, i32 addrspace(1)* %26, align 4, !tbaa !8
  %28 = add nsw i32 %27, %16
  store i32 %28, i32 addrspace(1)* %26, align 4, !tbaa !8
  ret void
}

attributes #0 = { nounwind readnone "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { alwaysinline nounwind readnone "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #2 = { alwaysinline norecurse nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #3 = { alwaysinline noduplicate nounwind }
attributes #4 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #5 = { nobuiltin nounwind readnone }
attributes #6 = { nounwind }

!llvm.ident = !{!0, !0, !0, !0, !0, !0, !0, !0, !0, !0, !0, !0, !0, !0, !0, !0, !0, !0, !0}
!opencl.kernels = !{!1}

!0 = !{!"clang version 3.8.0 (tags/RELEASE_380/final)"}
!1 = !{void (i32 addrspace(1)*)* @self_test, !2, !3, !4, !5, !6, !7}
!2 = !{!"kernel_arg_addr_space", i32 1}
!3 = !{!"kernel_arg_access_qual", !"none"}
!4 = !{!"kernel_arg_type", !"int*"}
!5 = !{!"kernel_arg_base_type", !"int*"}
!6 = !{!"kernel_arg_type_qual", !""}
!7 = !{!"kernel_arg_name", !"buf"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!10, !10, i64 0}
platform number 1
platform_profile "FULL_PROFILE"
platform_name "Intel Gen OCL Driver"
platform_vendor "Intel"
platform_version "OpenCL 1.2 beignet 1.2"
platform_extensions "cl_khr_global_int32_base_atomics cl_khr_global_int32_extended_atomics cl_khr_local_int32_base_atomics cl_khr_local_int32_extended_atomics cl_khr_byte_addressable_store cl_khr_image2d_from_buffer cl_khr_spir cl_khr_icd cl_intel_accelerator cl_intel_motion_estimation"
.decl_function self_test
## 67 registers ##
.decl.dword %0 local_id_0
.decl.dword %1 local_id_1
.decl.dword %2 local_id_2
.decl.dword %3 group_id_0
.decl.dword %4 group_id_1
.decl.dword %5 group_id_2
.decl.dword %6 num_groups_0
.decl.dword %7 num_groups_1
.decl.dword %8 num_groups_2
.decl.dword %9 local_size_0
.decl.dword %10 local_size_1
.decl.dword %11 local_size_2
.decl.dword %12 global_size_0
.decl.dword %13 global_size_1
.decl.dword %14 global_size_2
.decl.dword %15 global_offset_0
.decl.dword %16 global_offset_1
.decl.dword %17 global_offset_2
.decl.dword %18 stack_pointer
.decl.qword %19 stack_buffer
.decl.word %20 block_ip
.decl.dword %21 barrier_id
.decl.dword %22 thread_number
.decl.dword %23 work_dimension
.decl.dword %24 zero
.decl.dword %25 one
.decl.word %26 retVal
.decl.qword %27 printf_buffer_pointer
.decl.qword %28 printf_index_buffer_pointer
.decl.dword %29 dwblockip
.decl.qword %30 profiling_buffer_pointer
.decl.dword %31 profiling_timestamps0
.decl.dword %32 profiling_timestamps1
.decl.dword %33 profiling_timestamps2
.decl.dword %34 profiling_timestamps3
.decl.dword %35 profiling_timestamps4
.decl.dword %36 threadid
.decl.dword %37
.decl.dword %38
.decl.dword %39
.decl.dword %40
.decl.dword %41
.decl.dword %42
.decl.dword %43
.decl.dword %44
.decl.dword %45
.decl.dword %46
.decl.dword %47
.decl.dword %48
.decl.dword %49
.decl.dword %50
.decl.dword %51
.decl.dword %52
.decl.dword %53
.decl.dword %54
.decl.dword %55
.decl.dword %56
.decl.dword %57
.decl.dword %58
.decl.dword %59
.decl.dword %60
.decl.dword %61
.decl.dword %62
.decl.dword %63
.decl.dword %64
.decl.dword %65
.decl.dword %66
## 1 input registers ##
decl_input.global %37 buf
## 0 output register ##
## 0 pushed register
## 3 blocks ##
LABEL $0
LOADI.int32 %38 0

LABEL $1
LOADI.uint32 %55 4
MUL.int32 %39 %55 %0
ADD.int32 %40 %37 %39
SUB.uint32 %56 %40 %37
STORE.int32.global.aligned %56 {%41} bti:2
MUL.int32 %42 %55 %0
ADD.int32 %43 %38 %42
LOADI.uint32 %58 0
STORE.int32.local.aligned %43 {%41} bti:254
SYNC.workgroup.local_read.local_write
LOADI.uint32 %60 2
SUB.int32 %44 %60 %0
MUL.int32 %45 %55 %44
ADD.int32 %46 %38 %45
STORE.int32.local.aligned %46 {%47} bti:254
MUL.int32 %48 %3 %9
ADD.int32 %49 %48 %0
ADD.int32 %50 %49 %15
MUL.int32 %51 %55 %50
ADD.int32 %52 %37 %51
SUB.uint32 %65 %52 %37
STORE.int32.global.aligned %65 {%53} bti:2
ADD.int32 %54 %53 %47
SUB.uint32 %66 %52 %37
STORE.int32.global.aligned %66 {%54} bti:2

LABEL $2
RET

.end_function

self_test's disassemble begin:
  L0:
    (       0)  mov(16)         g2<1>:UW        0xffffUW                        { align1 WE_all 1H };
    (       2)  mov(16)         g2<1>:UW        0x0UW                           { align1 WE_normal 1H };
    (       4)  cmp.le(16)      null:UW         g2<8,8,1>:UW    0x0UW           { align1 WE_all 1H switch };
    (       6)  (+f0) if(16) 4                                                  { align1 WE_normal 1H };
    (       8)  mov(1)          g1.6<1>:D       0D                              { align1 WE_all };
    (      10)  endif(16) 0                     null                            { align1 WE_normal 1H };
  L1:
    (      12)  cmp.le(16)      null:UW         g2<8,8,1>:UW    0x1UW           { align1 WE_all 1H switch };
    (      14)  (+f0) mov(16)   g2<1>:UW        0xffffUW                        { align1 WE_normal 1H };
    (      16)  cmp.e(16)       null:UW         g2<8,8,1>:UW    0xffffUW        { align1 WE_all 1H switch };
    (      18)  (-f0.all16h) jmpi(1) 54                                         { align1 WE_all };
    (      20)  (+f0) mov(16)   g2<1>:UW        0x1UW                           { align1 WE_normal 1H };
    (      22)  mov(1)          g1.7<1>:UD      0x4UD                           { align1 WE_all };
    (      24)  mov(16)         g24<1>:UD       g8<8,8,1>:UD                    { align1 WE_normal 1H };
    (      26)  mul(16)         g18<1>:D        g1.7<0,1,0>:D   g4<8,8,1>:UD    { align1 WE_normal 1H };
    (      28)  mul(16)         g26<1>:D        g1.7<0,1,0>:D   g4<8,8,1>:UD    { align1 WE_normal 1H };
    (      30)  add(16)         g20<1>:D        g1.4<0,1,0>:D   g18<8,8,1>:D    { align1 WE_normal 1H };
    (      32)  add(16)         g6<1>:D         g1.6<0,1,0>:D   g26<8,8,1>:D    { align1 WE_normal 1H };
    (      34)  add(16)         g22<1>:UD       g20<8,8,1>:UD   -g1.4<0,1,0>:UD { align1 WE_normal 1H };
    (      36)  send(16)        null:UW         g22<8,8,1>:UD   134372866D
                data (1) (bti: 2, rgba: 14, SIMD16, legacy, Untyped Surface Write) mlen 4 rlen 0 { align1 WE_normal 1H };
    (      38)  send(16)        null:UW         g6<8,8,1>:UD    134373118D
                data (1) (bti: 254, rgba: 14, SIMD16, legacy, Untyped Surface Write) mlen 4 rlen 0 { align1 WE_normal 1H };
    (      40)  and(8)          g30<1>:UD       g0.2<0,1,0>:UD  0x8f000000UD    { align1 WE_all 1Q };
    (      42)  send(8)         null:F          g30<8,8,1>:UD   33587204D
                gateway (subfunc: barrier, notify: 1, ackreq: 0) mlen 1 rlen 0 { align1 WE_all 1Q };
    (      44)  wait(1)                         n0<0,1,0>:UD                    { align1 WE_normal };
    (      46)  add(16)         g32<1>:D        -g4<8,8,1>:D    2D              { align1 WE_normal 1H };
    (      48)  add(16)         g24<1>:D        g16<8,8,1>:D    g12<8,8,1>:D    { align1 WE_normal 1H };
    (      50)  mul(16)         g2<1>:UD        g32<8,8,1>:UD   0x4UW           { align1 WE_normal 1H };
    (      52)  add(16)         g10<1>:D        g1.6<0,1,0>:D   g2<8,8,1>:D     { align1 WE_normal 1H };
    (      54)  mul(1)          g1<1>:D         g0.1<0,1,0>:D   g1.2<0,1,0>:UD  { align1 WE_all };
    (      56)  send(16)        null:UW         g10<8,8,1>:UD   134373118D
                data (1) (bti: 254, rgba: 14, SIMD16, legacy, Untyped Surface Write) mlen 4 rlen 0 { align1 WE_normal 1H };
    (      58)  add(16)         g6<1>:D         g1<0,1,0>:D     g4<8,8,1>:D     { align1 WE_normal 1H };
    (      60)  add(16)         g8<1>:D         g6<8,8,1>:D     g1.3<0,1,0>:D   { align1 WE_normal 1H };
    (      62)  mul(16)         g18<1>:UD       g8<8,8,1>:UD    0x4UW           { align1 WE_normal 1H };
    (      64)  add(16)         g20<1>:D        g1.4<0,1,0>:D   g18<8,8,1>:D    { align1 WE_normal 1H };
    (      66)  add(16)         g14<1>:UD       g20<8,8,1>:UD   -g1.4<0,1,0>:UD { align1 WE_normal 1H };
    (      68)  add(16)         g22<1>:UD       g20<8,8,1>:UD   -g1.4<0,1,0>:UD { align1 WE_normal 1H };
    (      70)  send(16)        null:UW         gerror calling clGetDeviceIDs
14<8,8,1>:UD   134372866D
                data (1) (bti: 2, rgba: 14, SIMD16, legacy, Untyped Surface Write) mlen 4 rlen 0 { align1 WE_normal 1H };
    (      72)  send(16)        null:UW         g22<8,8,1>:UD   134372866D
                data (1) (bti: 2, rgba: 14, SIMD16, legacy, Untyped Surface Write) mlen 4 rlen 0 { align1 WE_normal 1H };
  L2:
    (      74)  mov(16)         g112<1>:UD      g0<8,8,1>:UD                    { align1 WE_all 1H };
    (      76)  send(8)         null:UD         g112<8,8,1>:UD  0x82000010UD
                thread_spawnerunsupported target 7 mlen 1 rlen 0 { align1 WE_normal 1Q EOT };
    (      78)  nop                                                             ;
    (      80)  nop                                                             ;
    (      82)  nop                                                             ;
    (      84)  nop                                                             ;
    (      86)  nop                                                             ;
    (      88)  nop                                                             ;
    (      90)  nop                                                             ;
    (      92)  nop                                                             ;
self_test's disassemble end.
Beignet: self-test failed: (3, 7, 5) + (5, 7, 3) returned (3, 7, 5)
See README.md or http://www.freedesktop.org/wiki/Software/Beignet/
Beignet: disabling non-working device
vload_bench_uchar()error calling clCreateProgramWithBinary

  Vector size 2:
	Offset 0 :  vload_bench_uchar()    [FAILED]
    Error: error calling cl_kernel_init with error CL_INVALID_CONTEXT 

  at file /home/armin/src/Beignet-1.1.1-Source/utests/vload_bench.cpp, function vload_bench, line 15
vload_bench_ushort()error calling clCreateProgramWithBinary

  Vector size 2:
	Offset 0 :  vload_bench_ushort()    [FAILED]
    Error: error calling cl_kernel_init with error CL_INVALID_CONTEXT 

  at file /home/armin/src/Beignet-1.1.1-Source/utests/vload_bench.cpp, function vload_bench, line 15
vload_bench_uint()error calling clCreateProgramWithBinary

  Vector size 2:
	Offset 0 :  vload_bench_uint()    [FAILED]
    Error: error calling cl_kernel_init with error CL_INVALID_CONTEXT 

  at file /home/armin/src/Beignet-1.1.1-Source/utests/vload_bench.cpp, function vload_bench, line 15
benchmark_copy_buf()  benchmark_copy_buf()    [FAILED]
    Error: error calling clCreateBuffer with error CL_INVALID_CONTEXT 

  at file /home/armin/src/Beignet-1.1.1-Source/benchmark/benchmark_copy_buf.cpp, function benchmark_copy_buf, line 14
benchmark_use_host_ptr_buffer()error calling clCreateProgramWithBinary
  benchmark_use_host_ptr_buffer()    [FAILED]
    Error: error calling cl_kernel_init with error CL_INVALID_CONTEXT 

  at file /home/armin/src/Beignet-1.1.1-Source/benchmark/benchmark_use_host_ptr_buffer.cpp, function benchmark_use_host_ptr_buffer, line 11
benchmark_read_buffer()  benchmark_read_buffer()    [FAILED]
    Error: error calling clCreateBuffer with error CL_INVALID_CONTEXT 

  at file /home/armin/src/Beignet-1.1.1-Source/benchmark/benchmark_read_buffer.cpp, function benchmark_read_buffer, line 12
benchmark_read_image()error calling clCreateProgramWithBinary
  benchmark_read_image()    [FAILED]
    Error: error calling cl_kernel_init with error CL_INVALID_CONTEXT 

  at file /home/armin/src/Beignet-1.1.1-Source/benchmark/benchmark_read_image.cpp, function benchmark_read_image, line 21
benchmark_copy_buffer_to_image()  benchmark_copy_buffer_to_image()    [FAILED]
    Error: error calling clCreateBuffer with error CL_INVALID_CONTEXT 

  at file /home/armin/src/Beignet-1.1.1-Source/benchmark/benchmark_copy_buffer_to_image.cpp, function benchmark_copy_buffer_to_image, line 31
benchmark_copy_image_to_buffer()  benchmark_copy_image_to_buffer()    [FAILED]
    Error: error calling clCreateImage with error CL_INVALID_CONTEXT 

  at file /home/armin/src/Beignet-1.1.1-Source/benchmark/benchmark_copy_image_to_buffer.cpp, function benchmark_copy_image_to_buffer, line 31
benchmark_copy_buffer_uchar()  benchmark_copy_buffer_uchar()    [FAILED]
    Error: error calling clCreateBuffer with error CL_INVALID_CONTEXT 

  at file /home/armin/src/Beignet-1.1.1-Source/benchmark/benchmark_copy_buffer.cpp, function benchmark_copy_buffer_uchar, line 53
benchmark_copy_buffer_ushort()  benchmark_copy_buffer_ushort()    [FAILED]
    Error: error calling clCreateBuffer with error CL_INVALID_CONTEXT 

  at file /home/armin/src/Beignet-1.1.1-Source/benchmark/benchmark_copy_buffer.cpp, function benchmark_copy_buffer_ushort, line 54
benchmark_copy_buffer_uint()  benchmark_copy_buffer_uint()    [FAILED]
    Error: error calling clCreateBuffer with error CL_INVALID_CONTEXT 

  at file /home/armin/src/Beignet-1.1.1-Source/benchmark/benchmark_copy_buffer.cpp, function benchmark_copy_buffer_uint, line 55
benchmark_filter_buffer_uchar()  benchmark_filter_buffer_uchar()    [FAILED]
    Error: error calling clCreateBuffer with error CL_INVALID_CONTEXT 

  at file /home/armin/src/Beignet-1.1.1-Source/benchmark/benchmark_copy_buffer.cpp, function benchmark_filter_buffer_uchar, line 56
benchmark_filter_buffer_ushort()  benchmark_filter_buffer_ushort()    [FAILED]
    Error: error calling clCreateBuffer with error CL_INVALID_CONTEXT 

  at file /home/armin/src/Beignet-1.1.1-Source/benchmark/benchmark_copy_buffer.cpp, function benchmark_filter_buffer_ushort, line 57
benchmark_filter_buffer_uint()  benchmark_filter_buffer_uint()    [FAILED]
    Error: error calling clCreateBuffer with error CL_INVALID_CONTEXT 

  at file /home/armin/src/Beignet-1.1.1-Source/benchmark/benchmark_copy_buffer.cpp, function benchmark_filter_buffer_uint, line 58
benchmark_copy_image_uchar()error calling clCreateProgramWithBinary
  benchmark_copy_image_uchar()    [FAILED]
    Error: error calling cl_kernel_init with error CL_INVALID_CONTEXT 

  at file /home/armin/src/Beignet-1.1.1-Source/benchmark/benchmark_copy_image.cpp, function benchmark_copy_image_uchar, line 68
benchmark_copy_image_ushort()error calling clCreateProgramWithBinary
  benchmark_copy_image_ushort()    [FAILED]
    Error: error calling cl_kernel_init with error CL_INVALID_CONTEXT 

  at file /home/armin/src/Beignet-1.1.1-Source/benchmark/benchmark_copy_image.cpp, function benchmark_copy_image_ushort, line 69
benchmark_copy_image_uint()error calling clCreateProgramWithBinary
  benchmark_copy_image_uint()    [FAILED]
    Error: error calling cl_kernel_init with error CL_INVALID_CONTEXT 

  at file /home/armin/src/Beignet-1.1.1-Source/benchmark/benchmark_copy_image.cpp, function benchmark_copy_image_uint, line 70
benchmark_filter_image_uchar()error calling clCreateProgramWithBinary
  benchmark_filter_image_uchar()    [FAILED]
    Error: error calling cl_kernel_init with error CL_INVALID_CONTEXT 

  at file /home/armin/src/Beignet-1.1.1-Source/benchmark/benchmark_copy_image.cpp, function benchmark_filter_image_uchar, line 71
benchmark_filter_image_ushort()error calling clCreateProgramWithBinary
  benchmark_filter_image_ushort()    [FAILED]
    Error: error calling cl_kernel_init with error CL_INVALID_CONTEXT 

  at file /home/armin/src/Beignet-1.1.1-Source/benchmark/benchmark_copy_image.cpp, function benchmark_filter_image_ushort, line 72
benchmark_filter_image_uint()error calling clCreateProgramWithBinary
  benchmark_filter_image_uint()    [FAILED]
    Error: error calling cl_kernel_init with error CL_INVALID_CONTEXT 

  at file /home/armin/src/Beignet-1.1.1-Source/benchmark/benchmark_copy_image.cpp, function benchmark_filter_image_uint, line 73

summary:
----------
  total: 21
  run: 21
  pass: 0
  fail: 21
  pass rate: 0.000000