Command: /usr/bin/X -nolisten tcp -auth /var/run/sddm/{171455cb-0042-4223-8472-7554bb060824} -background none -noreset -displayfd 18 vt1 Driver vendor: X.Org Device vendor: AMD Device name: AMD TONGA (DRM 3.3.0 / 4.8.10-gentoo, LLVM 3.9.0) Draw call sequence # = 734664 HW reached sequence # = 734663 Elapsed time = 2000 ms blit: dst.resource: {target = 2d, format = PIPE_FORMAT_R8G8B8A8_UNORM, width0 = 20, height0 = 919, depth0 = 1, array_size = 1, last_level = 0, nr_samples = 0, usage = 0, bind = 10, flags = 4, } dst.level: 0 dst.box: {x = 0, y = 0, z = 0, width = 20, height = 919, depth = 1, } dst.format: PIPE_FORMAT_R8G8B8A8_UNORM src.resource: {target = 2d, format = PIPE_FORMAT_B8G8R8A8_UNORM, width0 = 20, height0 = 919, depth0 = 1, array_size = 1, last_level = 0, nr_samples = 0, usage = 4, bind = 8, flags = 0, } src.level: 0 src.box: {x = 0, y = 0, z = 0, width = 20, height = 919, depth = 1, } src.format: PIPE_FORMAT_B8G8R8A8_UNORM mask: 0xf filter: 0 scissor_enable: 0 scissor: {minx = 0, miny = 0, maxx = 0, maxy = 0, } render_condition_enable: 0 ***************************************************************************** Driver-specific state: SHADER KEY instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} as_es = 0 as_ls = 0 export_prim_id = 0 Vertex Shader as VS - main shader part - LLVM IR: ; ModuleID = 'tgsi' source_filename = "tgsi" target triple = "amdgcn--" define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32) { main_body: %15 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0 %16 = load <16 x i8>, <16 x i8> addrspace(2)* %15, align 16, !invariant.load !0 %17 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %16, i32 0, i32 %14) %18 = extractelement <4 x float> %17, i32 0 %19 = extractelement <4 x float> %17, i32 1 %20 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0 %21 = load <16 x i8>, <16 x i8> addrspace(2)* %20, align 16, !invariant.load !0 %22 = call float @llvm.SI.load.const(<16 x i8> %21, i32 32) %23 = call float @llvm.SI.load.const(<16 x i8> %21, i32 36) %24 = fmul float %18, %22 %25 = fadd float %24, %23 %26 = call float @llvm.SI.load.const(<16 x i8> %21, i32 40) %27 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0 %28 = load <16 x i8>, <16 x i8> addrspace(2)* %27, align 16, !invariant.load !0 %29 = call float @llvm.SI.load.const(<16 x i8> %28, i32 44) %30 = fmul float %19, %26 %31 = fadd float %30, %29 %32 = call float @llvm.SI.load.const(<16 x i8> %28, i32 0) %33 = fadd float %32, %18 %34 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0 %35 = load <16 x i8>, <16 x i8> addrspace(2)* %34, align 16, !invariant.load !0 %36 = call float @llvm.SI.load.const(<16 x i8> %35, i32 4) %37 = fadd float %36, %19 %38 = call float @llvm.SI.load.const(<16 x i8> %35, i32 16) %39 = fmul float %33, %38 %40 = call float @llvm.SI.load.const(<16 x i8> %35, i32 20) %41 = fmul float %37, %40 %42 = bitcast i32 %12 to float %43 = insertvalue <{ float, float, float }> undef, float %42, 2 call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %39, float %41, float undef, float undef) call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %25, float %31, float 0.000000e+00, float 1.000000e+00) ret <{ float, float, float }> %43 } ; Function Attrs: nounwind readnone declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0 ; Function Attrs: nounwind readnone declare float @llvm.SI.load.const(<16 x i8>, i32) #0 ; Function Attrs: nounwind declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1 attributes #0 = { nounwind readnone } attributes #1 = { nounwind } !0 = !{} Vertex Shader as VS: Shader prolog disassembly: v_add_i32_e32 v4, vcc, s12, v0 ; 3208000C Shader main disassembly: s_load_dwordx4 s[4:7], s[10:11], 0x0 ; C00A0105 00000000 s_load_dwordx4 s[0:3], s[2:3], 0x0 ; C00A0001 00000000 s_waitcnt lgkmcnt(0) ; BF8C007F buffer_load_format_xyzw v[3:6], v4, s[4:7], 0 idxen ; E00C2000 80010304 s_buffer_load_dword s5, s[0:3], 0x24 ; C0220140 00000024 s_buffer_load_dword s7, s[0:3], 0x2c ; C02201C0 0000002C s_buffer_load_dword s4, s[0:3], 0x20 ; C0220100 00000020 s_buffer_load_dword s6, s[0:3], 0x28 ; C0220180 00000028 s_buffer_load_dword s8, s[0:3], 0x0 ; C0220200 00000000 s_buffer_load_dword s9, s[0:3], 0x4 ; C0220240 00000004 s_buffer_load_dword s10, s[0:3], 0x10 ; C0220280 00000010 s_buffer_load_dword s0, s[0:3], 0x14 ; C0220000 00000014 s_waitcnt lgkmcnt(0) ; BF8C007F v_mov_b32_e32 v0, s5 ; 7E000205 v_mov_b32_e32 v1, s7 ; 7E020207 s_waitcnt vmcnt(0) ; BF8C0F70 v_mov_b32_e32 v5, 1.0 ; 7E0A02F2 v_mac_f32_e32 v0, s4, v3 ; 2C000604 v_add_f32_e32 v3, s8, v3 ; 02060608 v_mac_f32_e32 v1, s6, v4 ; 2C020806 v_add_f32_e32 v4, s9, v4 ; 02080809 v_mul_f32_e32 v3, s10, v3 ; 0A06060A v_mul_f32_e32 v4, s0, v4 ; 0A080800 exp 15, 32, 0, 0, 0, v3, v4, v0, v0 ; C400020F 00000403 s_waitcnt expcnt(0) ; BF8C0F0F v_mov_b32_e32 v3, 0 ; 7E060280 exp 15, 12, 0, 1, 0, v0, v1, v3, v5 ; C40008CF 05030100 s_waitcnt expcnt(0) ; BF8C0F0F Shader epilog disassembly: s_endpgm ; BF810000 *** SHADER STATS *** SGPRS: 80 VGPRS: 8 Spilled SGPRs: 0 Spilled VGPRs: 0 Code Size: 172 bytes LDS: 0 blocks Scratch: 0 bytes per wave Max Waves: 10 ******************** SHADER KEY prolog.color_two_side = 0 prolog.flatshade_colors = 0 prolog.poly_stipple = 0 prolog.force_persp_sample_interp = 0 prolog.force_linear_sample_interp = 0 prolog.force_persp_center_interp = 0 prolog.force_linear_center_interp = 0 prolog.bc_optimize_for_persp = 0 prolog.bc_optimize_for_linear = 0 epilog.spi_shader_col_format = 0x4 epilog.color_is_int8 = 0x0 epilog.last_cbuf = 0 epilog.alpha_func = 7 epilog.alpha_to_one = 0 epilog.poly_line_smoothing = 0 epilog.clamp_color = 0 Pixel Shader - main shader part - LLVM IR: ; ModuleID = 'tgsi' source_filename = "tgsi" target triple = "amdgcn--" define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 { main_body: %23 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8) %24 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8) %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0 %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0 %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)* %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 3, !amdgpu.uniform !0 %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0 %30 = bitcast float %23 to i32 %31 = bitcast float %24 to i32 %32 = insertelement <2 x i32> undef, i32 %30, i32 0 %33 = insertelement <2 x i32> %32, i32 %31, i32 1 %34 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %33, <8 x i32> %26, <4 x i32> %29, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0) %35 = extractelement <4 x float> %34, i32 0 %36 = extractelement <4 x float> %34, i32 1 %37 = extractelement <4 x float> %34, i32 2 %38 = extractelement <4 x float> %34, i32 3 %39 = bitcast float %5 to i32 %40 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %39, 10 %41 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %40, float %35, 11 %42 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %41, float %36, 12 %43 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %42, float %37, 13 %44 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %43, float %38, 14 %45 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %44, float %21, 24 ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %45 } ; Function Attrs: nounwind readnone declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1 ; Function Attrs: nounwind readnone declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1 attributes #0 = { "InitialPSInputAddr"="36983" } attributes #1 = { nounwind readnone } !0 = !{} Pixel Shader: Shader main disassembly: s_wqm_b64 exec, exec ; BEFE077E s_load_dwordx8 s[12:19], s[4:5], 0x0 ; C00E0302 00000000 s_load_dwordx4 s[0:3], s[4:5], 0x30 ; C00A0002 00000030 s_mov_b32 m0, s11 ; BEFC000B v_interp_p1_f32 v0, v2, 0, 0, [m0] ; D4000002 v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0] ; D4010003 v_interp_p1_f32 v1, v2, 1, 0, [m0] ; D4040102 v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0] ; D4050103 s_waitcnt lgkmcnt(0) ; BF8C007F image_sample v[0:3], v[0:1], s[12:19], s[0:3] dmask:0xf ; F0800F00 00030000 s_waitcnt vmcnt(0) ; BF8C0F70 Shader epilog disassembly: v_cvt_pkrtz_f16_f32_e64 v0, v0, v1 ; D2960000 00020300 v_cvt_pkrtz_f16_f32_e64 v1, v2, v3 ; D2960001 00020702 exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; C4001C0F 00000100 s_endpgm ; BF810000 *** SHADER CONFIG *** SPI_PS_INPUT_ADDR = 0xd077 SPI_PS_INPUT_ENA = 0x0002 *** SHADER STATS *** SGPRS: 80 VGPRS: 16 Spilled SGPRs: 0 Spilled VGPRs: 0 Code Size: 84 bytes LDS: 0 blocks Scratch: 0 bytes per wave Max Waves: 10 ******************** Memory-mapped registers: GRBM_STATUS <- ME0PIPE0_CMDFIFO_AVAIL = 8 SRBM_RQ_PENDING = 1 ME0PIPE0_CF_RQ_PENDING = 0 ME0PIPE0_PF_RQ_PENDING = 0 GDS_DMA_RQ_PENDING = 0 DB_CLEAN = 1 CB_CLEAN = 1 TA_BUSY = 0 GDS_BUSY = 0 WD_BUSY_NO_DMA = 0 VGT_BUSY = 0 IA_BUSY_NO_DMA = 0 IA_BUSY = 0 SX_BUSY = 0 WD_BUSY = 0 SPI_BUSY = 0 BCI_BUSY = 0 SC_BUSY = 0 PA_BUSY = 0 DB_BUSY = 0 CP_COHERENCY_BUSY = 0 CP_BUSY = 1 CB_BUSY = 0 GUI_ACTIVE = 1 GRBM_STATUS2 <- ME0PIPE1_CMDFIFO_AVAIL = 8 ME0PIPE1_CF_RQ_PENDING = 0 ME0PIPE1_PF_RQ_PENDING = 0 ME1PIPE0_RQ_PENDING = 0 ME1PIPE1_RQ_PENDING = 0 ME1PIPE2_RQ_PENDING = 0 ME1PIPE3_RQ_PENDING = 0 ME2PIPE0_RQ_PENDING = 0 ME2PIPE1_RQ_PENDING = 0 ME2PIPE2_RQ_PENDING = 0 ME2PIPE3_RQ_PENDING = 0 RLC_RQ_PENDING = 0 RLC_BUSY = 0 TC_BUSY = 0 TCC_CC_RESIDENT = 0 CPF_BUSY = 1 CPC_BUSY = 0 CPG_BUSY = 1 GRBM_STATUS_SE0 <- DB_CLEAN = 1 CB_CLEAN = 1 BCI_BUSY = 0 VGT_BUSY = 0 PA_BUSY = 0 TA_BUSY = 0 SX_BUSY = 0 SPI_BUSY = 0 SC_BUSY = 0 DB_BUSY = 0 CB_BUSY = 0 GRBM_STATUS_SE1 <- DB_CLEAN = 1 CB_CLEAN = 1 BCI_BUSY = 0 VGT_BUSY = 0 PA_BUSY = 0 TA_BUSY = 0 SX_BUSY = 0 SPI_BUSY = 0 SC_BUSY = 0 DB_BUSY = 0 CB_BUSY = 0 GRBM_STATUS_SE2 <- DB_CLEAN = 1 CB_CLEAN = 1 BCI_BUSY = 0 VGT_BUSY = 0 PA_BUSY = 0 TA_BUSY = 0 SX_BUSY = 0 SPI_BUSY = 0 SC_BUSY = 0 DB_BUSY = 0 CB_BUSY = 0 GRBM_STATUS_SE3 <- DB_CLEAN = 1 CB_CLEAN = 1 BCI_BUSY = 0 VGT_BUSY = 0 PA_BUSY = 0 TA_BUSY = 0 SX_BUSY = 0 SPI_BUSY = 0 SC_BUSY = 0 DB_BUSY = 0 CB_BUSY = 0 SDMA0_STATUS_REG <- IDLE = 1 REG_IDLE = 1 RB_EMPTY = 1 RB_FULL = 0 RB_CMD_IDLE = 1 RB_CMD_FULL = 0 IB_CMD_IDLE = 1 IB_CMD_FULL = 0 BLOCK_IDLE = 1 INSIDE_IB = 0 EX_IDLE = 1 EX_IDLE_POLL_TIMER_EXPIRE = 1 PACKET_READY = 0 MC_WR_IDLE = 1 SRBM_IDLE = 1 CONTEXT_EMPTY = 1 DELTA_RPTR_FULL = 0 RB_MC_RREQ_IDLE = 1 IB_MC_RREQ_IDLE = 1 MC_RD_IDLE = 1 DELTA_RPTR_EMPTY = 1 MC_RD_RET_STALL = 0 MC_RD_NO_POLL_IDLE = 1 PREV_CMD_IDLE = 1 SEM_IDLE = 1 SEM_REQ_STALL = 0 SEM_RESP_STATE = 0 INT_IDLE = 1 INT_REQ_STALL = 0 SDMA1_STATUS_REG <- IDLE = 1 REG_IDLE = 1 RB_EMPTY = 1 RB_FULL = 0 RB_CMD_IDLE = 1 RB_CMD_FULL = 0 IB_CMD_IDLE = 1 IB_CMD_FULL = 0 BLOCK_IDLE = 1 INSIDE_IB = 0 EX_IDLE = 1 EX_IDLE_POLL_TIMER_EXPIRE = 1 PACKET_READY = 0 MC_WR_IDLE = 1 SRBM_IDLE = 1 CONTEXT_EMPTY = 1 DELTA_RPTR_FULL = 0 RB_MC_RREQ_IDLE = 1 IB_MC_RREQ_IDLE = 1 MC_RD_IDLE = 1 DELTA_RPTR_EMPTY = 1 MC_RD_RET_STALL = 0 MC_RD_NO_POLL_IDLE = 1 PREV_CMD_IDLE = 1 SEM_IDLE = 1 SEM_REQ_STALL = 0 SEM_RESP_STATE = 0 INT_IDLE = 1 INT_REQ_STALL = 0 SRBM_STATUS <- UVD_RQ_PENDING = 0 SAMMSP_RQ_PENDING = 0 ACP_RQ_PENDING = 0 SMU_RQ_PENDING = 0 GRBM_RQ_PENDING = 0 HI_RQ_PENDING = 1 VMC_BUSY = 0 MCB_BUSY = 0 MCB_NON_DISPLAY_BUSY = 0 MCC_BUSY = 0 MCD_BUSY = 0 VMC1_BUSY = 0 SEM_BUSY = 0 ACP_BUSY = 0 IH_BUSY = 0 UVD_BUSY = 0 SAMMSP_BUSY = 0 GCATCL2_BUSY = 0 OSATCL2_BUSY = 0 BIF_BUSY = 1 SRBM_STATUS2 <- SDMA_RQ_PENDING = 0 TST_RQ_PENDING = 0 SDMA1_RQ_PENDING = 0 VCE0_RQ_PENDING = 0 VP8_BUSY = 0 SDMA_BUSY = 0 SDMA1_BUSY = 0 VCE0_BUSY = 1 XDMA_BUSY = 0 CHUB_BUSY = 0 SDMA2_BUSY = 0 SDMA3_BUSY = 0 SAMSCP_BUSY = 0 ISP_BUSY = 0 VCE1_BUSY = 0 ODE_BUSY = 0 SDMA2_RQ_PENDING = 0 SDMA3_RQ_PENDING = 0 SAMSCP_RQ_PENDING = 0 ISP_RQ_PENDING = 0 VCE1_RQ_PENDING = 0 SRBM_STATUS3 <- MCC0_BUSY = 1 MCC1_BUSY = 1 MCC2_BUSY = 1 MCC3_BUSY = 1 MCC4_BUSY = 0 MCC5_BUSY = 0 MCC6_BUSY = 0 MCC7_BUSY = 0 MCD0_BUSY = 0 MCD1_BUSY = 0 MCD2_BUSY = 0 MCD3_BUSY = 0 MCD4_BUSY = 0 MCD5_BUSY = 0 MCD6_BUSY = 0 MCD7_BUSY = 0 CP_STAT <- ROQ_RING_BUSY = 1 ROQ_INDIRECT1_BUSY = 1 ROQ_INDIRECT2_BUSY = 1 ROQ_STATE_BUSY = 0 DC_BUSY = 0 ATCL2IU_BUSY = 0 PFP_BUSY = 1 MEQ_BUSY = 0 ME_BUSY = 1 QUERY_BUSY = 0 SEMAPHORE_BUSY = 0 INTERRUPT_BUSY = 0 SURFACE_SYNC_BUSY = 0 DMA_BUSY = 0 RCIU_BUSY = 0 SCRATCH_RAM_BUSY = 0 CPC_CPG_BUSY = 0 CE_BUSY = 0 TCIU_BUSY = 0 ROQ_CE_RING_BUSY = 0 ROQ_CE_INDIRECT1_BUSY = 0 ROQ_CE_INDIRECT2_BUSY = 0 CP_BUSY = 1 CP_STALLED_STAT1 <- RBIU_TO_DMA_NOT_RDY_TO_RCV = 0 RBIU_TO_SEM_NOT_RDY_TO_RCV = 0 RBIU_TO_MEMWR_NOT_RDY_TO_RCV = 0 ME_HAS_ACTIVE_CE_BUFFER_FLAG = 1 ME_HAS_ACTIVE_DE_BUFFER_FLAG = 1 ME_STALLED_ON_TC_WR_CONFIRM = 0 ME_STALLED_ON_ATOMIC_RTN_DATA = 0 ME_WAITING_ON_TC_READ_DATA = 0 ME_WAITING_ON_REG_READ_DATA = 0 RCIU_WAITING_ON_GDS_FREE = 0 RCIU_WAITING_ON_GRBM_FREE = 0 RCIU_WAITING_ON_VGT_FREE = 0 RCIU_STALLED_ON_ME_READ = 0 RCIU_STALLED_ON_DMA_READ = 0 RCIU_STALLED_ON_APPEND_READ = 0 RCIU_HALTED_BY_REG_VIOLATION = 0 CP_STALLED_STAT2 <- PFP_TO_CSF_NOT_RDY_TO_RCV = 0 PFP_TO_MEQ_NOT_RDY_TO_RCV = 0 PFP_TO_RCIU_NOT_RDY_TO_RCV = 0 PFP_TO_VGT_WRITES_PENDING = 0 PFP_RCIU_READ_PENDING = 0 PFP_WAITING_ON_BUFFER_DATA = 1 ME_WAIT_ON_CE_COUNTER = 0 ME_WAIT_ON_AVAIL_BUFFER = 0 GFX_CNTX_NOT_AVAIL_TO_ME = 0 ME_RCIU_NOT_RDY_TO_RCV = 0 ME_TO_CONST_NOT_RDY_TO_RCV = 0 ME_WAITING_DATA_FROM_PFP = 1 ME_WAITING_ON_PARTIAL_FLUSH = 0 MEQ_TO_ME_NOT_RDY_TO_RCV = 0 STQ_TO_ME_NOT_RDY_TO_RCV = 0 ME_WAITING_DATA_FROM_STQ = 0 PFP_STALLED_ON_TC_WR_CONFIRM = 0 PFP_STALLED_ON_ATOMIC_RTN_DATA = 0 EOPD_FIFO_NEEDS_SC_EOP_DONE = 0 EOPD_FIFO_NEEDS_WR_CONFIRM = 0 STRMO_WR_OF_PRIM_DATA_PENDING = 0 PIPE_STATS_WR_DATA_PENDING = 0 APPEND_RDY_WAIT_ON_CS_DONE = 0 APPEND_RDY_WAIT_ON_PS_DONE = 0 APPEND_WAIT_ON_WR_CONFIRM = 0 APPEND_ACTIVE_PARTITION = 0 APPEND_WAITING_TO_SEND_MEMWRITE = 0 SURF_SYNC_NEEDS_IDLE_CNTXS = 0 SURF_SYNC_NEEDS_ALL_CLEAN = 0 CP_STALLED_STAT3 <- CE_TO_CSF_NOT_RDY_TO_RCV = 0 CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV = 0 CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER = 0 CE_TO_RAM_INIT_NOT_RDY = 0 CE_TO_RAM_DUMP_NOT_RDY = 0 CE_TO_RAM_WRITE_NOT_RDY = 0 CE_TO_INC_FIFO_NOT_RDY_TO_RCV = 0 CE_TO_WR_FIFO_NOT_RDY_TO_RCV = 0 CE_WAITING_ON_BUFFER_DATA = 0 CE_WAITING_ON_CE_BUFFER_FLAG = 0 CE_WAITING_ON_DE_COUNTER = 0 CE_WAITING_ON_DE_COUNTER_UNDERFLOW = 0 TCIU_WAITING_ON_FREE = 0 TCIU_WAITING_ON_TAGS = 0 CE_STALLED_ON_TC_WR_CONFIRM = 0 CE_STALLED_ON_ATOMIC_RTN_DATA = 0 ATCL2IU_WAITING_ON_FREE = 0 ATCL2IU_WAITING_ON_TAGS = 0 ATCL1_WAITING_ON_TRANS = 0 CP_CPC_STATUS <- MEC1_BUSY = 0 MEC2_BUSY = 0 DC0_BUSY = 0 DC1_BUSY = 0 RCIU1_BUSY = 0 RCIU2_BUSY = 0 ROQ1_BUSY = 0 ROQ2_BUSY = 0 TCIU_BUSY = 0 SCRATCH_RAM_BUSY = 0 QU_BUSY = 0 ATCL2IU_BUSY = 0 CPG_CPC_BUSY = 0 CPF_CPC_BUSY = 0 CPC_BUSY = 0 CP_CPC_BUSY_STAT <- MEC1_LOAD_BUSY = 0 MEC1_SEMAPOHRE_BUSY = 0 MEC1_MUTEX_BUSY = 0 MEC1_MESSAGE_BUSY = 0 MEC1_EOP_QUEUE_BUSY = 0 MEC1_IQ_QUEUE_BUSY = 0 MEC1_IB_QUEUE_BUSY = 0 MEC1_TC_BUSY = 0 MEC1_DMA_BUSY = 0 MEC1_PARTIAL_FLUSH_BUSY = 0 MEC1_PIPE0_BUSY = 0 MEC1_PIPE1_BUSY = 0 MEC1_PIPE2_BUSY = 0 MEC1_PIPE3_BUSY = 0 MEC2_LOAD_BUSY = 0 MEC2_SEMAPOHRE_BUSY = 0 MEC2_MUTEX_BUSY = 0 MEC2_MESSAGE_BUSY = 0 MEC2_EOP_QUEUE_BUSY = 0 MEC2_IQ_QUEUE_BUSY = 0 MEC2_IB_QUEUE_BUSY = 0 MEC2_TC_BUSY = 0 MEC2_DMA_BUSY = 0 MEC2_PARTIAL_FLUSH_BUSY = 0 MEC2_PIPE0_BUSY = 0 MEC2_PIPE1_BUSY = 0 MEC2_PIPE2_BUSY = 0 MEC2_PIPE3_BUSY = 0 CP_CPC_STALLED_STAT1 <- RCIU_TX_FREE_STALL = 0 RCIU_PRIV_VIOLATION = 0 TCIU_TX_FREE_STALL = 0 MEC1_DECODING_PACKET = 0 MEC1_WAIT_ON_RCIU = 0 MEC1_WAIT_ON_RCIU_READ = 0 MEC1_WAIT_ON_ROQ_DATA = 0 MEC2_DECODING_PACKET = 0 MEC2_WAIT_ON_RCIU = 0 MEC2_WAIT_ON_RCIU_READ = 0 MEC2_WAIT_ON_ROQ_DATA = 0 ATCL2IU_WAITING_ON_FREE = 0 ATCL2IU_WAITING_ON_TAGS = 0 ATCL1_WAITING_ON_TRANS = 0 CP_CPF_STATUS <- POST_WPTR_GFX_BUSY = 1 CSF_BUSY = 1 ROQ_ALIGN_BUSY = 0 ROQ_RING_BUSY = 1 ROQ_INDIRECT1_BUSY = 1 ROQ_INDIRECT2_BUSY = 1 ROQ_STATE_BUSY = 0 ROQ_CE_RING_BUSY = 0 ROQ_CE_INDIRECT1_BUSY = 0 ROQ_CE_INDIRECT2_BUSY = 0 SEMAPHORE_BUSY = 0 INTERRUPT_BUSY = 0 TCIU_BUSY = 0 HQD_BUSY = 0 PRT_BUSY = 0 ATCL2IU_BUSY = 0 CPF_GFX_BUSY = 1 CPF_CMP_BUSY = 0 GRBM_CPF_STAT_BUSY = 1 CPC_CPF_BUSY = 0 CPF_BUSY = 1 CP_CPF_BUSY_STAT <- REG_BUS_FIFO_BUSY = 0 CSF_RING_BUSY = 1 CSF_INDIRECT1_BUSY = 1 CSF_INDIRECT2_BUSY = 0 CSF_STATE_BUSY = 0 CSF_CE_INDR1_BUSY = 0 CSF_CE_INDR2_BUSY = 0 CSF_ARBITER_BUSY = 0 CSF_INPUT_BUSY = 0 OUTSTANDING_READ_TAGS = 0 HPD_PROCESSING_EOP_BUSY = 0 HQD_DISPATCH_BUSY = 0 HQD_IQ_TIMER_BUSY = 0 HQD_DMA_OFFLOAD_BUSY = 0 HQD_WAIT_SEMAPHORE_BUSY = 0 HQD_SIGNAL_SEMAPHORE_BUSY = 0 HQD_MESSAGE_BUSY = 0 HQD_PQ_FETCHER_BUSY = 0 HQD_IB_FETCHER_BUSY = 0 HQD_IQ_FETCHER_BUSY = 0 HQD_EOP_FETCHER_BUSY = 0 HQD_CONSUMED_RPTR_BUSY = 0 HQD_FETCHER_ARB_BUSY = 0 HQD_ROQ_ALIGN_BUSY = 0 HQD_ROQ_EOP_BUSY = 0 HQD_ROQ_IQ_BUSY = 0 HQD_ROQ_PQ_BUSY = 0 HQD_ROQ_IB_BUSY = 0 HQD_WPTR_POLL_BUSY = 0 HQD_PQ_BUSY = 0 HQD_IB_BUSY = 0 CP_CPF_STALLED_STAT1 <- RING_FETCHING_DATA = 0 INDR1_FETCHING_DATA = 1 INDR2_FETCHING_DATA = 0 STATE_FETCHING_DATA = 0 TCIU_WAITING_ON_FREE = 0 TCIU_WAITING_ON_TAGS = 0 ATCL2IU_WAITING_ON_FREE = 0 ATCL2IU_WAITING_ON_TAGS = 0 ATCL1_WAITING_ON_TRANS = 0 Last 60 lines of dmesg: [ 1.783056] Adding 33554428k swap on /dev/sda4. Priority:-1 extents:1 across:33554428k SS [ 1.784044] [drm] ring test on 0 succeeded in 11 usecs [ 1.784258] [drm] ring test on 1 succeeded in 26 usecs [ 1.784292] [drm] ring test on 2 succeeded in 18 usecs [ 1.784301] [drm] ring test on 3 succeeded in 4 usecs [ 1.784307] [drm] ring test on 4 succeeded in 2 usecs [ 1.784314] [drm] ring test on 5 succeeded in 3 usecs [ 1.784330] [drm] ring test on 6 succeeded in 1 usecs [ 1.784337] [drm] ring test on 7 succeeded in 2 usecs [ 1.784345] [drm] ring test on 8 succeeded in 3 usecs [ 1.784391] [drm] ring test on 9 succeeded in 5 usecs [ 1.784397] [drm] ring test on 10 succeeded in 5 usecs [ 1.830461] [drm] ring test on 11 succeeded in 1 usecs [ 1.850508] [drm] UVD initialized successfully. [ 1.915256] random: crng init done [ 2.051695] [drm] ring test on 12 succeeded in 21 usecs [ 2.051709] [drm] ring test on 13 succeeded in 3 usecs [ 2.051710] [drm] VCE initialized successfully. [ 2.088317] [drm] fb mappable at 0xE0A9A000 [ 2.088319] [drm] vram apper at 0xE0000000 [ 2.088321] [drm] size 9216000 [ 2.088323] [drm] fb depth is 24 [ 2.088324] [drm] pitch is 7680 [ 2.088520] fbcon: amdgpudrmfb (fb0) is primary device [ 2.119342] usb 2-1.8.1: new low-speed USB device number 5 using ehci-pci [ 2.191692] Console: switching to colour frame buffer device 240x75 [ 2.205424] input: Logitech USB Optical Mouse as /devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.8/2-1.8.1/2-1.8.1:1.0/0003:046D:C05A.0001/input/input20 [ 2.205526] amdgpu 0000:01:00.0: fb0: amdgpudrmfb frame buffer device [ 2.205673] hid-generic 0003:046D:C05A.0001: input,hidraw0: USB HID v1.11 Mouse [Logitech USB Optical Mouse] on usb-0000:00:1d.0-1.8.1/input0 [ 2.205971] [drm] ib test on ring 0 succeeded [ 2.206029] [drm] ib test on ring 1 succeeded [ 2.206047] [drm] ib test on ring 2 succeeded [ 2.206064] [drm] ib test on ring 3 succeeded [ 2.206081] [drm] ib test on ring 4 succeeded [ 2.206098] [drm] ib test on ring 5 succeeded [ 2.206114] [drm] ib test on ring 6 succeeded [ 2.206131] [drm] ib test on ring 7 succeeded [ 2.206149] [drm] ib test on ring 8 succeeded [ 2.206164] [drm] ib test on ring 9 succeeded [ 2.206177] [drm] ib test on ring 10 succeeded [ 2.207427] [drm] ib test on ring 11 succeeded [ 2.207557] [drm] ib test on ring 12 succeeded [ 2.208757] [drm] Initialized amdgpu 3.3.0 20150101 for 0000:01:00.0 on minor 0 [ 2.262187] EXT4-fs (sdb3): mounted filesystem with ordered data mode. Opts: acl,user_xattr [ 2.272329] usb 2-1.8.2: new low-speed USB device number 6 using ehci-pci [ 2.362374] input: Logitech USB Keyboard as /devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.8/2-1.8.2/2-1.8.2:1.0/0003:046D:C31C.0002/input/input21 [ 2.414555] hid-generic 0003:046D:C31C.0002: input,hidraw1: USB HID v1.10 Keyboard [Logitech USB Keyboard] on usb-0000:00:1d.0-1.8.2/input0 [ 2.422079] input: Logitech USB Keyboard as /devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.8/2-1.8.2/2-1.8.2:1.1/0003:046D:C31C.0003/input/input22 [ 2.473573] hid-generic 0003:046D:C31C.0003: input,hidraw2: USB HID v1.10 Device [Logitech USB Keyboard] on usb-0000:00:1d.0-1.8.2/input1 [ 2.586475] clocksource: Switched to clocksource tsc [ 2.631689] IPv6: ADDRCONF(NETDEV_UP): enp5s0: link is not ready [ 2.677981] IPv6: ADDRCONF(NETDEV_UP): enp5s0: link is not ready [ 2.691030] IPv6: ADDRCONF(NETDEV_UP): enp6s0: link is not ready [ 2.737235] IPv6: ADDRCONF(NETDEV_UP): enp6s0: link is not ready [ 5.535570] igb 0000:06:00.0 enp6s0: igb: enp6s0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: RX/TX [ 6.058232] IPv6: ADDRCONF(NETDEV_CHANGE): enp6s0: link becomes ready [ 7971.855772] usb 1-1.3: USB disconnect, device number 3 [ 8850.390780] usb 3-2: new full-speed USB device number 2 using xhci_hcd [ 8979.042297] usb 3-2: USB disconnect, device number 2 [ 8980.934191] usb 3-1: new full-speed USB device number 3 using xhci_hcd