From 1cd4794782321af51846b8a08b728996773cabf5 Mon Sep 17 00:00:00 2001 From: Ander Conselvan de Oliveira Date: Fri, 7 Apr 2017 13:02:21 +0300 Subject: [PATCH] drm/i915/glk: Disable underrun reporting when enabling pipe scaler In Geminilake, the first time a scaler is enabled while attached to a pipe, a FIFO underrun happens on the first frame. This doesn't happen if the scaler was previously used to scale a plane or on subsequent modesets, unless the device goes through a suspend/resume cycle. Disabling power gating in SKL_PS_PWR_GATE doesn't seem to have any effect on this underrun. Workaround it by waiting for a vblank with underrun reporting disabling before continuing with the modeset. Signed-off-by: Ander Conselvan de Oliveira --- drivers/gpu/drm/i915/intel_display.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 3617927..20935c5 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5393,6 +5393,13 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config, if (dev_priv->display.initial_watermarks != NULL) dev_priv->display.initial_watermarks(old_intel_state, pipe_config); + /* + * The first time the pipe scaler is enabled in GLK it causes a FIFO + * underrun on the first frame. + */ + if (IS_GEMINILAKE(dev_priv) && pipe_config->pch_pfit.enabled) + intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false); + /* XXX: Do the pipe assertions at the right place for BXT DSI. */ if (!transcoder_is_dsi(cpu_transcoder)) intel_enable_pipe(intel_crtc); @@ -5414,6 +5421,9 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config, intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true); intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A, true); + } else if (IS_GEMINILAKE(dev_priv) && pipe_config->pch_pfit.enabled) { + intel_wait_for_vblank(dev_priv, pipe); + intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true); } /* If we change the relative order between pipe/planes enabling, we need -- 2.9.3