diff --git a/src/via_fp.c b/src/via_fp.c index 3a33537..1ac692e 100644 --- a/src/via_fp.c +++ b/src/via_fp.c @@ -602,6 +602,91 @@ viaFPIOPadSetting(ScrnInfoPtr pScrn, Bool ioPadOn) } static void +viaFPDisplaySource(ScrnInfoPtr pScrn, int index) +{ + vgaHWPtr hwp = VGAHWPTR(pScrn); + VIAPtr pVia = VIAPTR(pScrn); + CARD8 sr12, sr13; + CARD8 displaySource = index & 0x01; + + DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Entered viaFPDisplaySource.\n")); + + sr12 = hwp->readSeq(hwp, 0x12); + DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "SR12: 0x%02X\n", sr12)); + sr13 = hwp->readSeq(hwp, 0x13); + DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "SR13: 0x%02X\n", sr13)); + + switch (pVia->Chipset) { + case VIA_CLE266: + /* Code will be added later. */ + break; + case VIA_KM400: + case VIA_K8M800: + case VIA_PM800: + case VIA_P4M800PRO: + /* Code will be reworked later. */ + if (sr12 & 0x10) { + viaDFPHighSetDisplaySource(pScrn, displaySource); + viaDFPLowSetDisplaySource(pScrn, displaySource); + } else { + viaDFPLowSetDisplaySource(pScrn, displaySource); + } + + break; + case VIA_P4M890: + case VIA_K8M890: + case VIA_P4M900: + /* The tricky thing about VIA Technologies PCI Express based + * north bridge / south bridge 2 chip chipset is that + * it pin multiplexes DVP0 / DVP1 with north bridge's PCI + * Express x16 link. In particular, HP 2133 Mini-Note's WLAN + * is connected to north bridge's PCI Express Lane 0, but the + * Lane 0 is also pin multiplexed with DVP0. What this means is + * turning on DVP0 without probing the relevant strapping pin + * to determine the connected panel interface type will lead to + * the PCIe based WLAN to getting disabled by OpenChrome DDX + * when X.Org Server starts. + * The current remedy for this will be to turn on DVP0 + * only when an 18-bit / 24-bit interface flat panel is + * connected. */ + /* 3C5.12[4] - DVP0D4 pin strapping + * 0: Use DVP1 only for a flat panel. + * 1: Use DVP0 and DVP1 for a flat panel */ + if (sr12 & 0x10) { + viaDFPHighSetDisplaySource(pScrn, displaySource); + viaDFPLowSetDisplaySource(pScrn, displaySource); + } else { + viaDFPLowSetDisplaySource(pScrn, displaySource); + viaDVP1SetDisplaySource(pScrn, displaySource); + } + + break; + case VIA_CX700: + case VIA_VX800: + /* Code will be reworked later. */ + viaLVDS2SetDisplaySource(pScrn, displaySource); + break; + case VIA_VX855: + case VIA_VX900: + viaLVDS1SetDisplaySource(pScrn, displaySource); + break; + default: + break; + + } + + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "FP Display Source: IGA%d\n", + displaySource + 1); + + DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Exiting viaFPDisplaySource.\n")); +} + +static void ViaLVDSSoftwarePowerFirstSequence(ScrnInfoPtr pScrn, Bool on) { vgaHWPtr hwp = VGAHWPTR(pScrn); @@ -1315,25 +1400,11 @@ via_lvds_mode_set(xf86OutputPtr output, DisplayModePtr mode, break; } + viaFPDisplaySource(pScrn, iga->index); switch (pVia->Chipset) { - case VIA_KM400: - case VIA_K8M800: - case VIA_PM800: - case VIA_P4M800PRO: - viaDFPLowSetDisplaySource(pScrn, iga->index ? 0x01 : 0x00); - viaDFPHighSetDisplaySource(pScrn, iga->index ? 0x01 : 0x00); - break; - case VIA_P4M890: - case VIA_K8M890: - case VIA_P4M900: - viaDFPLowSetDisplaySource(pScrn, iga->index ? 0x01 : 0x00); - viaDVP1SetDisplaySource(pScrn, iga->index ? 0x01 : 0x00); - break; case VIA_CX700: case VIA_VX800: - viaLVDS2SetDisplaySource(pScrn, iga->index ? 0x01 : 0x00); - /* Set LVDS2 output color dithering. */ viaLVDS2SetDithering(pScrn, Panel->useDithering ? TRUE : FALSE); @@ -1345,8 +1416,6 @@ via_lvds_mode_set(xf86OutputPtr output, DisplayModePtr mode, break; case VIA_VX855: case VIA_VX900: - viaLVDS1SetDisplaySource(pScrn, iga->index ? 0x01 : 0x00); - /* Set LVDS1 output color dithering. */ viaLVDS1SetDithering(pScrn, Panel->useDithering ? TRUE : FALSE);