------------------ IB begin ------------------ MEM_WRITE: 0x00000000 0x00060000 0x00000001 0x00000000 NOP: 0x00000000 NOP: Trace point ID: 1 !!!!! This trace point was NOT reached by the CP !!!!! CONTEXT_CONTROL: 0x80000000 0x80000000 EVENT_WRITE: EVENT_INDEX <- 4 INV_L2 <- 0 EVENT_WRITE: EVENT_INDEX <- 0 INV_L2 <- 0 SET_CONFIG_REG: SQ_CONFIG <- VC_ENABLE = 1 EXPORT_SRC_C = 1 CS_PRIO = 0 LS_PRIO = 3 HS_PRIO = 3 PS_PRIO = 0 VS_PRIO = 1 GS_PRIO = 2 ES_PRIO = 3 SET_CONFIG_REG: SQ_GLOBAL_GPR_RESOURCE_MGMT_1 <- 0 SQ_GLOBAL_GPR_RESOURCE_MGMT_2 <- 0 SET_CONTEXT_REG: DB_DEPTH_CONTROL <- STENCIL_ENABLE = 0 Z_ENABLE = 0 Z_WRITE_ENABLE = 0 ZFUNC = 0 BACKFACE_ENABLE = 0 STENCILFUNC = STENCILFUNC_NEVER STENCILFAIL = STENCIL_KEEP STENCILZPASS = 0 STENCILZFAIL = 0 STENCILFUNC_BF = 0 STENCILFAIL_BF = 0 STENCILZPASS_BF = 0 STENCILZFAIL_BF = 0 SET_CONTEXT_REG: SX_MISC <- MULTIPASS = 0 SX_SURFACE_SYNC <- SURFACE_SYNC_MASK = 15 (0x0f) SET_CONFIG_REG: SQ_THREAD_RESOURCE_MGMT_1 <- NUM_PS_THREADS = 128 (0x80) NUM_VS_THREADS = 20 (0x14) NUM_GS_THREADS = 20 (0x14) NUM_ES_THREADS = 20 (0x14) SQ_THREAD_RESOURCE_MGMT_2 <- NUM_HS_THREADS = 20 (0x14) NUM_LS_THREADS = 20 (0x14) SQ_STACK_RESOURCE_MGMT_1 <- NUM_PS_STACK_ENTRIES = 42 (0x02a) NUM_VS_STACK_ENTRIES = 42 (0x02a) SQ_STACK_RESOURCE_MGMT_2 <- NUM_GS_STACK_ENTRIES = 42 (0x02a) NUM_ES_STACK_ENTRIES = 42 (0x02a) SQ_STACK_RESOURCE_MGMT_3 <- NUM_HS_STACK_ENTRIES = 42 (0x02a) NUM_LS_STACK_ENTRIES = 42 (0x02a) SET_CONFIG_REG: SQ_LDS_RESOURCE_MGMT <- NUM_PS_LDS = 4096 (0x1000) NUM_LS_LDS = 4096 (0x1000) SET_CONFIG_REG: SQ_STATIC_THREAD_MGMT1 <- 0xffffffff SQ_STATIC_THREAD_MGMT2 <- 0xffffffff SQ_STATIC_THREAD_MGMT3 <- 0xfffffffe SET_CONFIG_REG: SPI_CONFIG_CNTL <- 0 SET_CONFIG_REG: SPI_CONFIG_CNTL_1 <- VTX_DONE_DELAY = 4 SET_CONTEXT_REG: SQ_ESGS_RING_ITEMSIZE <- 0 SQ_GSVS_RING_ITEMSIZE <- 0 SQ_ESTMP_RING_ITEMSIZE <- 0 SQ_GSTMP_RING_ITEMSIZE <- 0 SQ_VSTMP_RING_ITEMSIZE <- 0 SQ_PSTMP_RING_ITEMSIZE <- 0 SET_CONTEXT_REG: SQ_GS_VERT_ITEMSIZE <- 0 SQ_GS_VERT_ITEMSIZE_1 <- 0 SQ_GS_VERT_ITEMSIZE_2 <- 0 SQ_GS_VERT_ITEMSIZE_3 <- 0 SET_CONTEXT_REG: VGT_OUTPUT_PATH_CNTL <- 0 VGT_HOS_CNTL <- 0 VGT_HOS_MAX_TESS_LEVEL <- 64.0f (0x42800000) VGT_HOS_MIN_TESS_LEVEL <- 1.0f (0x3f800000) VGT_HOS_REUSE_DEPTH <- 16 (0x00000010) VGT_GROUP_PRIM_TYPE <- 0 VGT_GROUP_FIRST_DECR <- 0 VGT_GROUP_DECR <- 0 VGT_GROUP_VECT_0_CNTL <- 0 VGT_GROUP_VECT_1_CNTL <- 0 VGT_GROUP_VECT_0_FMT_CNTL <- 0 VGT_GROUP_VECT_1_FMT_CNTL <- 0 VGT_GS_MODE <- MODE = GS_OFF ES_PASSTHRU = 0 CUT_MODE = GS_CUT_1024 COMPUTE_MODE = 0 PARTIAL_THD_AT_EOI = 0 SET_CONFIG_REG: PA_CL_ENHANCE <- 7 SET_CONTEXT_REG: SQ_VTX_SEMANTIC_CLEAR <- 0xffffffff SET_CONTEXT_REG: VGT_MAX_VTX_INDX <- 0xffffffff VGT_MIN_VTX_INDX <- 0 SET_CTL_CONST: 0x00000000 0x00000000 SET_CONTEXT_REG: DB_STENCIL_CLEAR <- 0 SET_CONTEXT_REG: PA_SC_WINDOW_OFFSET <- 0 SET_CONTEXT_REG: PA_SC_CLIPRECT_RULE <- 0x0000ffff SET_CONTEXT_REG: PA_SC_EDGERULE <- 0xaaaaaaaa SET_CONTEXT_REG: SPI_FOG_CNTL <- 0 SET_CONTEXT_REG: PA_CL_NANINF_CNTL <- 0 SET_CONTEXT_REG: DB_SRESULTS_COMPARE_STATE0 <- 0 DB_SRESULTS_COMPARE_STATE1 <- 0 DB_PRELOAD_CONTROL <- MAX_X = 0 MAX_Y = 0 SET_CONTEXT_REG: PA_SC_GENERIC_SCISSOR_TL <- TL_X = 0 TL_Y = 0 WINDOW_OFFSET_DISABLE = 0 PA_SC_GENERIC_SCISSOR_BR <- BR_X = 16384 (0x4000) BR_Y = 16384 (0x4000) SET_CONTEXT_REG: PA_SC_SCREEN_SCISSOR_TL <- TL_X = 0 TL_Y = 0 PA_SC_SCREEN_SCISSOR_BR <- BR_X = 16384 (0x4000) BR_Y = 16384 (0x4000) SET_CONTEXT_REG: SQ_PGM_RESOURCES_2_PS <- SINGLE_ROUND = 0 DOUBLE_ROUND = 0 ALLOW_SINGLE_DENORM_IN = 0 ALLOW_SINGLE_DENORM_OUT = 0 ALLOW_DOUBLE_DENORM_IN = 0 ALLOW_DOUBLE_DENORM_OUT = 0 SET_CONTEXT_REG: SQ_PGM_RESOURCES_2_VS <- SINGLE_ROUND = ROUND_NEAREST_EVEN DOUBLE_ROUND = 0 ALLOW_SINGLE_DENORM_IN = 0 ALLOW_SINGLE_DENORM_OUT = 0 ALLOW_DOUBLE_DENORM_IN = 0 ALLOW_DOUBLE_DENORM_OUT = 0 SET_CONTEXT_REG: SQ_PGM_RESOURCES_2_GS <- 0 SET_CONTEXT_REG: SQ_PGM_RESOURCES_2_ES <- 0 SET_CONTEXT_REG: SQ_PGM_RESOURCES_FS <- 0 SET_CONTEXT_REG: SQ_PGM_RESOURCES_2_HS <- 0 SET_CONTEXT_REG: SQ_PGM_RESOURCES_2_LS <- 0 SET_CONTEXT_REG: ALU_CONST_BUFFER_SIZE_PS_0 <- 0 ALU_CONST_BUFFER_SIZE_PS_1 <- 0 0x28148 <- 0x00000000 0x2814c <- 0x00000000 0x28150 <- 0x00000000 0x28154 <- 0x00000000 0x28158 <- 0x00000000 0x2815c <- 0x00000000 0x28160 <- 0x00000000 0x28164 <- 0x00000000 0x28168 <- 0x00000000 0x2816c <- 0x00000000 0x28170 <- 0x00000000 0x28174 <- 0x00000000 0x28178 <- 0x00000000 0x2817c <- 0x00000000 SET_CONTEXT_REG: ALU_CONST_BUFFER_SIZE_VS_0 <- 0 ALU_CONST_BUFFER_SIZE_VS_1 <- 0 0x28188 <- 0x00000000 0x2818c <- 0x00000000 0x28190 <- 0x00000000 0x28194 <- 0x00000000 0x28198 <- 0x00000000 0x2819c <- 0x00000000 0x281a0 <- 0x00000000 0x281a4 <- 0x00000000 0x281a8 <- 0x00000000 0x281ac <- 0x00000000 0x281b0 <- 0x00000000 0x281b4 <- 0x00000000 0x281b8 <- 0x00000000 0x281bc <- 0x00000000 SET_CONTEXT_REG: ALU_CONST_BUFFER_SIZE_GS_0 <- 0 0x281c4 <- 0x00000000 0x281c8 <- 0x00000000 0x281cc <- 0x00000000 0x281d0 <- 0x00000000 0x281d4 <- 0x00000000 0x281d8 <- 0x00000000 0x281dc <- 0x00000000 0x281e0 <- 0x00000000 0x281e4 <- 0x00000000 0x281e8 <- 0x00000000 0x281ec <- 0x00000000 0x281f0 <- 0x00000000 0x281f4 <- 0x00000000 0x281f8 <- 0x00000000 0x281fc <- 0x00000000 SET_CONTEXT_REG: ALU_CONST_BUFFER_SIZE_LS_0 <- 0 0x28fc4 <- 0x00000000 0x28fc8 <- 0x00000000 0x28fcc <- 0x00000000 0x28fd0 <- 0x00000000 0x28fd4 <- 0x00000000 0x28fd8 <- 0x00000000 0x28fdc <- 0x00000000 0x28fe0 <- 0x00000000 0x28fe4 <- 0x00000000 0x28fe8 <- 0x00000000 0x28fec <- 0x00000000 0x28ff0 <- 0x00000000 0x28ff4 <- 0x00000000 0x28ff8 <- 0x00000000 0x28ffc <- 0x00000000 SET_CONTEXT_REG: ALU_CONST_BUFFER_SIZE_HS_0 <- 0 0x28f84 <- 0x00000000 0x28f88 <- 0x00000000 0x28f8c <- 0x00000000 0x28f90 <- 0x00000000 0x28f94 <- 0x00000000 0x28f98 <- 0x00000000 0x28f9c <- 0x00000000 0x28fa0 <- 0x00000000 0x28fa4 <- 0x00000000 0x28fa8 <- 0x00000000 0x28fac <- 0x00000000 0x28fb0 <- 0x00000000 0x28fb4 <- 0x00000000 0x28fb8 <- 0x00000000 0x28fbc <- 0x00000000 SET_CONTEXT_REG: VGT_STRMOUT_BUFFER_CONFIG <- STREAM_0_BUFFER_EN = 0 STREAM_1_BUFFER_EN = 0 STREAM_2_BUFFER_EN = 0 STREAM_3_BUFFER_EN = 0 SET_CONTEXT_REG: VGT_STRMOUT_DRAW_OPAQUE_OFFSET <- 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE2 <- 0 SET_CONTEXT_REG: PA_SU_HARDWARE_SCREEN_OFFSET <- 0 SET_CONTEXT_REG: SPI_THREAD_GROUPING <- 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL_2 <- NUM_INTERP = 0 POSITION_ENA = 0 POSITION_CENTROID = 0 POSITION_ADDR = 0 PARAM_GEN = 0 PERSP_GRADIENT_ENA = 0 LINEAR_GRADIENT_ENA = 0 POSITION_SAMPLE = 0 SPI_COMPUTE_INPUT_CNTL <- TID_IN_GROUP_ENA = 0 TGID_ENA = 0 DISABLE_INDEX_PACK = 0 SET_CONTEXT_REG: SQ_LDS_ALLOC <- 0 SQ_LDS_ALLOC_PS <- 0 SET_CONTEXT_REG: VGT_SHADER_STAGES_EN <- LS_EN = LS_STAGE_OFF HS_EN = 0 ES_EN = ES_STAGE_OFF GS_EN = 0 VS_EN = VS_STAGE_REAL VGT_LS_HS_CONFIG <- NUM_PATCHES = 0 HS_NUM_INPUT_CP = 0 HS_NUM_OUTPUT_CP = 0 VGT_LS_SIZE <- SIZE = 0 PATCH_CP_SIZE = 0 VGT_HS_SIZE <- SIZE = 0 PATCH_CP_SIZE = 0 VGT_LS_HS_ALLOC <- HS_TOTAL_OUTPUT = 0 LS_HS_TOTAL_OUTPUT = 0 VGT_HS_PATCH_CONST <- SIZE = 0 STRIDE = 0 VGT_TF_PARAM <- TYPE = TESS_ISOLINE PARTITIONING = PART_INTEGER TOPOLOGY = OUTPUT_POINT RESERVED_REDUC_AXIS = 0 BUFFER_ACCESS_MODE = PATCH_MAJOR NUM_DS_WAVES_PER_SIMD = 0 SET_LOOP_CONST: 0x00000000 0x01000fff SET_LOOP_CONST: 0x00000020 0x01000fff SET_LOOP_CONST: 0x00000040 0x01000fff SET_LOOP_CONST: 0x00000060 0x01000fff SET_LOOP_CONST: 0x00000080 0x01000fff SET_CONFIG_REG: WAIT_UNTIL <- WAIT_CP_DMA_IDLE = 0 WAIT_CMDFIFO = 0 WAIT_2D_IDLE = 0 WAIT_3D_IDLE = 1 WAIT_2D_IDLECLEAN = 0 WAIT_3D_IDLECLEAN = 0 WAIT_EXTERN_SIG = 0 CMDFIFO_ENTRIES = 0 EVENT_WRITE: EVENT_INDEX <- 0 INV_L2 <- 0 EVENT_WRITE: EVENT_INDEX <- 0 INV_L2 <- 0 EVENT_WRITE: EVENT_INDEX <- 0 INV_L2 <- 0 SURFACE_SYNC: CP_COHER_CNTL <- DEST_BASE_0_ENA = 0 DEST_BASE_1_ENA = 0 SO0_DEST_BASE_ENA = 0 SO1_DEST_BASE_ENA = 0 SO2_DEST_BASE_ENA = 0 SO3_DEST_BASE_ENA = 0 CB0_DEST_BASE_ENA = 1 CB1_DEST_BASE_ENA = 1 CB2_DEST_BASE_ENA = 1 CB3_DEST_BASE_ENA = 1 CB4_DEST_BASE_ENA = 1 CB5_DEST_BASE_ENA = 1 CB6_DEST_BASE_ENA = 1 CB7_DEST_BASE_ENA = 1 DB_DEST_BASE_ENA = 1 CB8_DEST_BASE_ENA = 1 CB9_DEST_BASE_ENA = 1 CB10_DEST_BASE_ENA = 1 CB11_DEST_BASE_ENA = 1 TC_ACTION_ENA = 1 VC_ACTION_ENA = 1 CB_ACTION_ENA = 1 DB_ACTION_ENA = 1 SH_ACTION_ENA = 0 SMX_ACTION_ENA = 1 CR0_ACTION_ENA = 0 CR1_ACTION_ENA = 0 CR2_ACTION_ENA = 0 CP_COHER_SIZE <- 0xffffffff CP_COHER_BASE <- 0 POLL_INTERVAL <- 10 (0x000a) EVENT_WRITE: EVENT_INDEX <- 0 INV_L2 <- 0 SET_CONFIG_REG: SQ_GPR_RESOURCE_MGMT_1 <- NUM_PS_GPRS = 0 NUM_VS_GPRS = 0 NUM_CLAUSE_TEMP_GPRS = 4 SQ_GPR_RESOURCE_MGMT_2 <- NUM_GS_GPRS = 0 NUM_ES_GPRS = 0 SQ_GPR_RESOURCE_MGMT_3 <- NUM_HS_GPRS = 0 NUM_LS_GPRS = 0 SET_CONFIG_REG: SQ_DYN_GPR_CNTL_PS_FLUSH_REQ <- 256 (0x00000100) SET_CONTEXT_REG: SQ_DYN_GPR_RESOURCE_LIMIT_1 <- PS_GPRS = 30 (0x1e) VS_GPRS = 30 (0x1e) GS_GPRS = 30 (0x1e) ES_GPRS = 30 (0x1e) HS_GPRS = 30 (0x1e) LS_GPRS = 30 (0x1e) SET_CONTEXT_REG: CB_COLOR0_BASE <- 0 CB_COLOR0_PITCH <- PITCH_TILE_MAX = 31 (0x1f) CB_COLOR0_SLICE <- SLICE_TILE_MAX = 1023 (0x003ff) CB_COLOR0_VIEW <- SLICE_START = 0 SLICE_MAX = 0 CB_COLOR0_INFO <- ENDIAN = 0 FORMAT = COLOR_8_8_8_8 ARRAY_MODE = ARRAY_2D_TILED_THIN1 NUMBER_TYPE = NUMBER_UNORM COMP_SWAP = SWAP_STD FAST_CLEAR = 0 COMPRESSION = 0 BLEND_CLAMP = 1 BLEND_BYPASS = 0 SIMPLE_FLOAT = 0 ROUND_MODE = 0 TILE_COMPACT = 0 SOURCE_FORMAT = EXPORT_4C_16BPC RAT = 0 RESOURCE_TYPE = BUFFER CB_COLOR0_ATTRIB <- NON_DISP_TILING_ORDER = 0 TILE_SPLIT = 4 NUM_BANKS = 2 BANK_WIDTH = 0 BANK_HEIGHT = 1 MACRO_TILE_ASPECT = 1 FMASK_BANK_HEIGHT = 1 NUM_SAMPLES = 0 NUM_FRAGMENTS = 0 FORCE_DST_ALPHA_1 = 0 CB_COLOR0_DIM <- WIDTH_MAX = 0 HEIGHT_MAX = 0 CB_COLOR0_CMASK <- 0 CB_COLOR0_CMASK_SLICE <- TILE_MAX = 0 CB_COLOR0_FMASK <- 0 CB_COLOR0_FMASK_SLICE <- TILE_MAX = 1023 (0x003ff) CB_COLOR0_CLEAR_WORD0 <- 0 CB_COLOR0_CLEAR_WORD1 <- 0 NOP: 0x00000004 NOP: 0x00000004 NOP: 0x00000004 NOP: 0x00000004 SET_CONTEXT_REG: CB_COLOR1_INFO <- ENDIAN = 0 FORMAT = COLOR_INVALID ARRAY_MODE = ARRAY_LINEAR_GENERAL NUMBER_TYPE = NUMBER_UNORM COMP_SWAP = SWAP_STD FAST_CLEAR = 0 COMPRESSION = 0 BLEND_CLAMP = 0 BLEND_BYPASS = 0 SIMPLE_FLOAT = 0 ROUND_MODE = 0 TILE_COMPACT = 0 SOURCE_FORMAT = EXPORT_4C_32BPC RAT = 0 RESOURCE_TYPE = BUFFER SET_CONTEXT_REG: CB_COLOR2_INFO <- ENDIAN = 0 FORMAT = COLOR_INVALID ARRAY_MODE = ARRAY_LINEAR_GENERAL NUMBER_TYPE = NUMBER_UNORM COMP_SWAP = SWAP_STD FAST_CLEAR = 0 COMPRESSION = 0 BLEND_CLAMP = 0 BLEND_BYPASS = 0 SIMPLE_FLOAT = 0 ROUND_MODE = 0 TILE_COMPACT = 0 SOURCE_FORMAT = EXPORT_4C_32BPC RAT = 0 RESOURCE_TYPE = BUFFER SET_CONTEXT_REG: CB_COLOR3_INFO <- ENDIAN = 0 FORMAT = COLOR_INVALID ARRAY_MODE = ARRAY_LINEAR_GENERAL NUMBER_TYPE = NUMBER_UNORM COMP_SWAP = SWAP_STD FAST_CLEAR = 0 COMPRESSION = 0 BLEND_CLAMP = 0 BLEND_BYPASS = 0 SIMPLE_FLOAT = 0 ROUND_MODE = 0 TILE_COMPACT = 0 SOURCE_FORMAT = EXPORT_4C_32BPC RAT = 0 RESOURCE_TYPE = BUFFER SET_CONTEXT_REG: CB_COLOR4_INFO <- ENDIAN = 0 FORMAT = COLOR_INVALID ARRAY_MODE = ARRAY_LINEAR_GENERAL NUMBER_TYPE = NUMBER_UNORM COMP_SWAP = SWAP_STD FAST_CLEAR = 0 COMPRESSION = 0 BLEND_CLAMP = 0 BLEND_BYPASS = 0 SIMPLE_FLOAT = 0 ROUND_MODE = 0 TILE_COMPACT = 0 SOURCE_FORMAT = EXPORT_4C_32BPC RAT = 0 RESOURCE_TYPE = BUFFER SET_CONTEXT_REG: CB_COLOR5_INFO <- ENDIAN = 0 FORMAT = COLOR_INVALID ARRAY_MODE = ARRAY_LINEAR_GENERAL NUMBER_TYPE = NUMBER_UNORM COMP_SWAP = SWAP_STD FAST_CLEAR = 0 COMPRESSION = 0 BLEND_CLAMP = 0 BLEND_BYPASS = 0 SIMPLE_FLOAT = 0 ROUND_MODE = 0 TILE_COMPACT = 0 SOURCE_FORMAT = EXPORT_4C_32BPC RAT = 0 RESOURCE_TYPE = BUFFER SET_CONTEXT_REG: CB_COLOR6_INFO <- ENDIAN = 0 FORMAT = COLOR_INVALID ARRAY_MODE = ARRAY_LINEAR_GENERAL NUMBER_TYPE = NUMBER_UNORM COMP_SWAP = SWAP_STD FAST_CLEAR = 0 COMPRESSION = 0 BLEND_CLAMP = 0 BLEND_BYPASS = 0 SIMPLE_FLOAT = 0 ROUND_MODE = 0 TILE_COMPACT = 0 SOURCE_FORMAT = EXPORT_4C_32BPC RAT = 0 RESOURCE_TYPE = BUFFER SET_CONTEXT_REG: CB_COLOR7_INFO <- ENDIAN = 0 FORMAT = COLOR_INVALID ARRAY_MODE = ARRAY_LINEAR_GENERAL NUMBER_TYPE = NUMBER_UNORM COMP_SWAP = SWAP_STD FAST_CLEAR = 0 COMPRESSION = 0 BLEND_CLAMP = 0 BLEND_BYPASS = 0 SIMPLE_FLOAT = 0 ROUND_MODE = 0 TILE_COMPACT = 0 SOURCE_FORMAT = EXPORT_4C_32BPC RAT = 0 RESOURCE_TYPE = BUFFER SET_CONTEXT_REG: CB_COLOR8_INFO <- ENDIAN = 0 FORMAT = COLOR_INVALID ARRAY_MODE = ARRAY_LINEAR_GENERAL NUMBER_TYPE = NUMBER_UNORM COMP_SWAP = SWAP_STD FAST_CLEAR = 0 COMPRESSION = 0 BLEND_CLAMP = 0 BLEND_BYPASS = 0 SIMPLE_FLOAT = 0 ROUND_MODE = 0 TILE_COMPACT = 0 SOURCE_FORMAT = EXPORT_4C_32BPC RAT = 0 RESOURCE_TYPE = BUFFER SET_CONTEXT_REG: CB_COLOR9_INFO <- ENDIAN = 0 FORMAT = COLOR_INVALID ARRAY_MODE = ARRAY_LINEAR_GENERAL NUMBER_TYPE = NUMBER_UNORM COMP_SWAP = SWAP_STD FAST_CLEAR = 0 COMPRESSION = 0 BLEND_CLAMP = 0 BLEND_BYPASS = 0 SIMPLE_FLOAT = 0 ROUND_MODE = 0 TILE_COMPACT = 0 SOURCE_FORMAT = EXPORT_4C_32BPC RAT = 0 RESOURCE_TYPE = BUFFER SET_CONTEXT_REG: CB_COLOR10_INFO <- ENDIAN = 0 FORMAT = COLOR_INVALID ARRAY_MODE = ARRAY_LINEAR_GENERAL NUMBER_TYPE = NUMBER_UNORM COMP_SWAP = SWAP_STD FAST_CLEAR = 0 COMPRESSION = 0 BLEND_CLAMP = 0 BLEND_BYPASS = 0 SIMPLE_FLOAT = 0 ROUND_MODE = 0 TILE_COMPACT = 0 SOURCE_FORMAT = EXPORT_4C_32BPC RAT = 0 RESOURCE_TYPE = BUFFER SET_CONTEXT_REG: CB_COLOR11_INFO <- ENDIAN = 0 FORMAT = COLOR_INVALID ARRAY_MODE = ARRAY_LINEAR_GENERAL NUMBER_TYPE = NUMBER_UNORM COMP_SWAP = SWAP_STD FAST_CLEAR = 0 COMPRESSION = 0 BLEND_CLAMP = 0 BLEND_BYPASS = 0 SIMPLE_FLOAT = 0 ROUND_MODE = 0 TILE_COMPACT = 0 SOURCE_FORMAT = EXPORT_4C_32BPC RAT = 0 RESOURCE_TYPE = BUFFER SET_CONTEXT_REG: DB_Z_INFO <- FORMAT = Z_INVALID NUM_SAMPLES = 0 ARRAY_MODE = 0 READ_SIZE = 0 TILE_SURFACE_ENABLE = 0 ZRANGE_PRECISION = 0 TILE_SPLIT = 0 NUM_BANKS = 0 BANK_WIDTH = 0 BANK_HEIGHT = 0 MACRO_TILE_ASPECT = 0 DB_STENCIL_INFO <- FORMAT = STENCIL_INVALID TILE_SPLIT = 0 SET_CONTEXT_REG: PA_SC_WINDOW_SCISSOR_TL <- TL_X = 0 TL_Y = 0 WINDOW_OFFSET_DISABLE = 0 PA_SC_WINDOW_SCISSOR_BR <- BR_X = 250 (0x0fa) BR_Y = 250 (0x0fa) SET_CONTEXT_REG: PA_SC_LINE_CNTL <- EXPAND_LINE_WIDTH = 0 LAST_PIXEL = 1 PA_SC_AA_CONFIG <- MSAA_NUM_SAMPLES = 0 AA_MASK_CENTROID_DTMN = 0 MAX_SAMPLE_DIST = 0 SET_CONTEXT_REG: PA_SC_MODE_CNTL_1 <- MSAA_ENABLE = 0 VPORT_SCISSOR_ENABLE = 0 LINE_STIPPLE_ENABLE = 0 SET_CONTEXT_REG: 0x28174 <- 0x00000001 SET_CONTEXT_REG: 0x28974 <- 0x00000001 NOP: 0x00000008 SET_RESOURCE: 0x00000068 0x00000100 0x000ffeff 0x02301000 0x00003440 0x00000000 0x00000000 0x00000000 0xc0000000 NOP: 0x00000008 SET_RESOURCE: 0x00001f00 0x00000000 0x000fffff 0x00002000 0x00003440 0x00000000 0x00000000 0x00000000 0xc0000000 NOP: 0x00000008 SET_CONTEXT_REG: VGT_MULTI_PRIM_IB_RESET_EN <- RESET_EN = 0 SET_CONTEXT_REG: VGT_INDX_OFFSET <- 0 VGT_MULTI_PRIM_IB_RESET_INDX <- 0 SET_CONTEXT_REG: PA_SC_AA_MASK <- 0xffffffff SET_CONTEXT_REG: SX_ALPHA_TEST_CONTROL <- ALPHA_FUNC = 0 ALPHA_TEST_ENABLE = 0 ALPHA_TEST_BYPASS = 0 SET_CONTEXT_REG: SX_ALPHA_REF <- 0 SET_CONTEXT_REG: CB_BLEND_RED <- 0 CB_BLEND_GREEN <- 0 CB_BLEND_BLUE <- 0 CB_BLEND_ALPHA <- 0 SET_CONTEXT_REG: CB_COLOR_CONTROL <- DEGAMMA_ENABLE = 0 MODE = CB_NORMAL ROP3 = 204 (0xcc) SET_CONTEXT_REG: DB_ALPHA_TO_MASK <- ALPHA_TO_MASK_ENABLE = 0 ALPHA_TO_MASK_OFFSET0 = 2 ALPHA_TO_MASK_OFFSET1 = 2 ALPHA_TO_MASK_OFFSET2 = 2 ALPHA_TO_MASK_OFFSET3 = 2 OFFSET_ROUND = 0 SET_CONTEXT_REG: CB_BLEND0_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = 0 OPACITY_WEIGHT = 0 ALPHA_SRCBLEND = 0 ALPHA_COMB_FCN = 0 ALPHA_DESTBLEND = 0 SEPARATE_ALPHA_BLEND = 0 BLEND_CONTROL_ENABLE = 0 CB_BLEND1_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = 0 OPACITY_WEIGHT = 0 ALPHA_SRCBLEND = 0 ALPHA_COMB_FCN = 0 ALPHA_DESTBLEND = 0 SEPARATE_ALPHA_BLEND = 0 BLEND_CONTROL_ENABLE = 0 CB_BLEND2_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = 0 OPACITY_WEIGHT = 0 ALPHA_SRCBLEND = 0 ALPHA_COMB_FCN = 0 ALPHA_DESTBLEND = 0 SEPARATE_ALPHA_BLEND = 0 BLEND_CONTROL_ENABLE = 0 CB_BLEND3_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = 0 OPACITY_WEIGHT = 0 ALPHA_SRCBLEND = 0 ALPHA_COMB_FCN = 0 ALPHA_DESTBLEND = 0 SEPARATE_ALPHA_BLEND = 0 BLEND_CONTROL_ENABLE = 0 CB_BLEND4_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = 0 OPACITY_WEIGHT = 0 ALPHA_SRCBLEND = 0 ALPHA_COMB_FCN = 0 ALPHA_DESTBLEND = 0 SEPARATE_ALPHA_BLEND = 0 BLEND_CONTROL_ENABLE = 0 CB_BLEND5_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = 0 OPACITY_WEIGHT = 0 ALPHA_SRCBLEND = 0 ALPHA_COMB_FCN = 0 ALPHA_DESTBLEND = 0 SEPARATE_ALPHA_BLEND = 0 BLEND_CONTROL_ENABLE = 0 CB_BLEND6_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = 0 OPACITY_WEIGHT = 0 ALPHA_SRCBLEND = 0 ALPHA_COMB_FCN = 0 ALPHA_DESTBLEND = 0 SEPARATE_ALPHA_BLEND = 0 BLEND_CONTROL_ENABLE = 0 CB_BLEND7_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = 0 OPACITY_WEIGHT = 0 ALPHA_SRCBLEND = 0 ALPHA_COMB_FCN = 0 ALPHA_DESTBLEND = 0 SEPARATE_ALPHA_BLEND = 0 BLEND_CONTROL_ENABLE = 0 SET_CONTEXT_REG: CB_TARGET_MASK <- 15 (0x0000000f) CB_SHADER_MASK <- 15 (0x0000000f) SET_CONTEXT_REG: PA_CL_CLIP_CNTL <- UCP_ENA_0 = 0 UCP_ENA_1 = 0 UCP_ENA_2 = 0 UCP_ENA_3 = 0 UCP_ENA_4 = 0 UCP_ENA_5 = 0 PS_UCP_Y_SCALE_NEG = 0 PS_UCP_MODE = 0 CLIP_DISABLE = 0 UCP_CULL_ONLY_ENA = 0 BOUNDARY_EDGE_FLAG_ENA = 0 DX_CLIP_SPACE_DEF = 0 DIS_CLIP_ERR_DETECT = 0 VTX_KILL_OR = 0 DX_RASTERIZATION_KILL = 0 DX_LINEAR_ATTR_CLIP_ENA = 1 VTE_VPORT_PROVOKE_DISABLE = 0 ZCLIP_NEAR_DISABLE = 0 ZCLIP_FAR_DISABLE = 0 SET_CONTEXT_REG: PA_CL_VS_OUT_CNTL <- CLIP_DIST_ENA_0 = 0 CLIP_DIST_ENA_1 = 0 CLIP_DIST_ENA_2 = 0 CLIP_DIST_ENA_3 = 0 CLIP_DIST_ENA_4 = 0 CLIP_DIST_ENA_5 = 0 CLIP_DIST_ENA_6 = 0 CLIP_DIST_ENA_7 = 0 CULL_DIST_ENA_0 = 0 CULL_DIST_ENA_1 = 0 CULL_DIST_ENA_2 = 0 CULL_DIST_ENA_3 = 0 CULL_DIST_ENA_4 = 0 CULL_DIST_ENA_5 = 0 CULL_DIST_ENA_6 = 0 CULL_DIST_ENA_7 = 0 USE_VTX_POINT_SIZE = 0 USE_VTX_EDGE_FLAG = 0 USE_VTX_RENDER_TARGET_INDX = 0 USE_VTX_VIEWPORT_INDX = 0 USE_VTX_KILL_FLAG = 0 VS_OUT_MISC_VEC_ENA = 0 VS_OUT_CCDIST0_VEC_ENA = 0 VS_OUT_CCDIST1_VEC_ENA = 0 SET_CONTEXT_REG: VGT_REUSE_OFF <- 0 SET_CONTEXT_REG: PA_CL_UCP0_X <- 0 PA_CL_UCP0_Y <- 0 PA_CL_UCP0_Z <- 0 PA_CL_UCP0_W <- 0 PA_CL_UCP1_X <- 0 PA_CL_UCP1_Y <- 0 PA_CL_UCP1_Z <- 0 PA_CL_UCP1_W <- 0 PA_CL_UCP2_X <- 0 PA_CL_UCP2_Y <- 0 PA_CL_UCP2_Z <- 0 PA_CL_UCP2_W <- 0 PA_CL_UCP3_X <- 0 PA_CL_UCP3_Y <- 0 PA_CL_UCP3_Z <- 0 PA_CL_UCP3_W <- 0 PA_CL_UCP4_X <- 0 PA_CL_UCP4_Y <- 0 PA_CL_UCP4_Z <- 0 PA_CL_UCP4_W <- 0 PA_CL_UCP5_X <- 0 PA_CL_UCP5_Y <- 0 PA_CL_UCP5_Z <- 0 PA_CL_UCP5_W <- 0 SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY_ENABLE = 0 STENCIL_COPY_ENABLE = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 COLOR_DISABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 1 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE <- FORCE_HIZ_ENABLE = 0 FORCE_HIS_ENABLE0 = 2 FORCE_HIS_ENABLE1 = 2 FORCE_SHADER_Z_ORDER = 0 FAST_Z_DISABLE = 0 FAST_STENCIL_DISABLE = 0 NOOP_CULL_DISABLE = 0 FORCE_COLOR_KILL = 0 FORCE_Z_READ = 0 FORCE_STENCIL_READ = 0 FORCE_FULL_Z_RANGE = 0 FORCE_QC_SMASK_CONFLICT = 0 DISABLE_VIEWPORT_CLAMP = 0 IGNORE_SC_ZRANGE = 0 DISABLE_PIXEL_RATE_TILES = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 0 MASK_EXPORT_ENABLE = 0 DUAL_EXPORT_ENABLE = 1 DB_SOURCE_FORMAT = EXPORT_DB_TWO ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: DB_HTILE_SURFACE <- HTILE_WIDTH = 0 HTILE_HEIGHT = 0 LINEAR = 0 FULL_CACHE = 0 HTILE_USES_PRELOAD_WIN = 0 PRELOAD = 0 PREFETCH_WIDTH = 0 PREFETCH_HEIGHT = 0 SET_CONTEXT_REG: DB_PRELOAD_CONTROL <- MAX_X = 0 MAX_Y = 0 SET_CONTEXT_REG: DB_DEPTH_CONTROL <- STENCIL_ENABLE = 0 Z_ENABLE = 0 Z_WRITE_ENABLE = 0 ZFUNC = 0 BACKFACE_ENABLE = 0 STENCILFUNC = STENCILFUNC_NEVER STENCILFAIL = STENCIL_KEEP STENCILZPASS = 0 STENCILZFAIL = 0 STENCILFUNC_BF = 0 STENCILFAIL_BF = 0 STENCILZPASS_BF = 0 STENCILZFAIL_BF = 0 SET_CONTEXT_REG: PA_SU_POLY_OFFSET_FRONT_SCALE <- SCALE = 0 PA_SU_POLY_OFFSET_FRONT_OFFSET <- OFFSET = 0 PA_SU_POLY_OFFSET_BACK_SCALE <- SCALE = 0 PA_SU_POLY_OFFSET_BACK_OFFSET <- OFFSET = 0 SET_CONTEXT_REG: PA_SU_POLY_OFFSET_DB_FMT_CNTL <- POLY_OFFSET_NEG_NUM_DB_BITS = 233 (0xe9) POLY_OFFSET_DB_IS_FLOAT_FMT = 1 SET_CONTEXT_REG: PA_SU_POINT_SIZE <- HEIGHT = 0 WIDTH = 0 PA_SU_POINT_MINMAX <- MIN_SIZE = 0 MAX_SIZE = 0 PA_SU_LINE_CNTL <- WIDTH = 0 SET_CONTEXT_REG: SPI_INTERP_CONTROL_0 <- FLAT_SHADE_ENA = 1 PNT_SPRITE_ENA = 0 PNT_SPRITE_OVRD_X = 0 PNT_SPRITE_OVRD_Y = 0 PNT_SPRITE_OVRD_Z = 0 PNT_SPRITE_OVRD_W = 0 PNT_SPRITE_TOP_1 = 0 SET_CONTEXT_REG: PA_SC_MODE_CNTL_0 <- MSAA_ENABLE = 0 VPORT_SCISSOR_ENABLE = 1 LINE_STIPPLE_ENABLE = 0 SET_CONTEXT_REG: PA_SU_VTX_CNTL <- PIX_CENTER_HALF = 1 QUANT_MODE = X_1_256TH SET_CONTEXT_REG: PA_SU_POLY_OFFSET_CLAMP <- 0 SET_CONTEXT_REG: PA_SU_SC_MODE_CNTL <- CULL_FRONT = 0 CULL_BACK = 0 FACE = 1 POLY_MODE = 0 POLYMODE_FRONT_PTYPE = 2 POLYMODE_BACK_PTYPE = 2 POLY_OFFSET_FRONT_ENABLE = 0 POLY_OFFSET_BACK_ENABLE = 0 POLY_OFFSET_PARA_ENABLE = 0 VTX_WINDOW_OFFSET_ENABLE = 0 PROVOKING_VTX_LAST = 1 PERSP_CORR_DIS = 0 MULTI_PRIM_IB_ENA = 0 SET_CONTEXT_REG: PA_SC_VPORT_SCISSOR_0_TL <- TL_X = 0 TL_Y = 0 WINDOW_OFFSET_DISABLE = 1 PA_SC_VPORT_SCISSOR_0_BR <- BR_X = 16384 (0x4000) BR_Y = 16384 (0x4000) SET_CONTEXT_REG: PA_CL_GB_VERT_CLIP_ADJ <- 0x403ffe00 PA_CL_GB_VERT_DISC_ADJ <- 1.0f (0x3f800000) PA_CL_GB_HORZ_CLIP_ADJ <- 0x403ffe00 PA_CL_GB_HORZ_DISC_ADJ <- 1.0f (0x3f800000) SET_CONTEXT_REG: PA_CL_VPORT_XSCALE_0 <- 1.0f (0x3f800000) PA_CL_VPORT_XOFFSET_0 <- 0 PA_CL_VPORT_YSCALE_0 <- 1.0f (0x3f800000) PA_CL_VPORT_YOFFSET_0 <- 0 PA_CL_VPORT_ZSCALE_0 <- 1.0f (0x3f800000) PA_CL_VPORT_ZOFFSET_0 <- 0 SET_CONTEXT_REG: PA_SC_VPORT_ZMIN_0 <- -1.0f (0xbf800000) PA_SC_VPORT_ZMAX_0 <- 1.0f (0x3f800000) SET_CONTEXT_REG: DB_STENCILREFMASK <- STENCILREF = 0 STENCILMASK = 0 STENCILWRITEMASK = 0 DB_STENCILREFMASK_BF <- STENCILREF_BF = 0 STENCILMASK_BF = 0 STENCILWRITEMASK_BF = 0 SET_CONTEXT_REG: SQ_PGM_START_FS <- 0 NOP: 0x0000000c SET_CONTEXT_REG: VGT_STRMOUT_BUFFER_CONFIG <- STREAM_0_BUFFER_EN = 0 STREAM_1_BUFFER_EN = 0 STREAM_2_BUFFER_EN = 0 STREAM_3_BUFFER_EN = 0 SET_CONTEXT_REG: 0x28b94 <- 0x00000000 SET_CONTEXT_REG: SPI_PS_INPUT_CNTL_0 <- SEMANTIC = 1 DEFAULT_VAL = 0 FLAT_SHADE = 1 SEL_CENTROID = 0 SEL_LINEAR = 0 CYL_WRAP = 0 PT_SPRITE_TEX = 0 SEL_SAMPLE = 0 SET_CONTEXT_REG: SPI_PS_IN_CONTROL_0 <- NUM_INTERP = 1 POSITION_ENA = 0 POSITION_CENTROID = 0 POSITION_ADDR = 0 PARAM_GEN = 0 PERSP_GRADIENT_ENA = 1 LINEAR_GRADIENT_ENA = 0 POSITION_SAMPLE = 0 SPI_PS_IN_CONTROL_1 <- FRONT_FACE_ENA = 0 FRONT_FACE_CHAN = 0 FRONT_FACE_ALL_BITS = 0 FRONT_FACE_ADDR = 0 FOG_ADDR = 0 FIXED_PT_POSITION_ENA = 0 FIXED_PT_POSITION_ADDR = 0 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_ENA = 0 PERSP_CENTROID_ENA = 0 PERSP_SAMPLE_ENA = 1 PERSP_PULL_MODEL_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINEAR_SAMPLE_ENA = 0 SET_CONTEXT_REG: SPI_INPUT_Z <- PROVIDE_Z_TO_SPI = 0 SET_CONTEXT_REG: SQ_PGM_EXPORTS_PS <- EXPORT_COLORS = 1 EXPORT_Z = 0 SET_CONTEXT_REG: SQ_PGM_START_PS <- 0 SQ_PGM_RESOURCES_PS <- NUM_GPRS = 1 STACK_SIZE = 0 DX10_CLAMP = 0 PRIME_CACHE_ON_DRAW = 1 UNCACHED_FIRST_INST = 0 CLAMP_CONSTS = 0 NOP: 0x00000010 SET_CONTEXT_REG: SPI_VS_OUT_ID_0 <- 1 SPI_VS_OUT_ID_1 <- 0 SPI_VS_OUT_ID_2 <- 0 SPI_VS_OUT_ID_3 <- 0 SPI_VS_OUT_ID_4 <- 0 SPI_VS_OUT_ID_5 <- 0 SPI_VS_OUT_ID_6 <- 0 SPI_VS_OUT_ID_7 <- 0 SPI_VS_OUT_ID_8 <- 0 SPI_VS_OUT_ID_9 <- 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_PER_COMPONENT = 0 VS_EXPORT_COUNT = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SQ_PGM_RESOURCES_VS <- NUM_GPRS = 3 STACK_SIZE = 1 DX10_CLAMP = 0 UNCACHED_FIRST_INST = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SQ_PGM_START_VS <- 0 NOP: 0x00000014 SET_CONTEXT_REG: VGT_VTX_CNT_EN <- 0 SET_CONTEXT_REG: VGT_SHADER_STAGES_EN <- LS_EN = LS_STAGE_OFF HS_EN = 0 ES_EN = ES_STAGE_OFF GS_EN = 0 VS_EN = VS_STAGE_REAL SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_OFF ES_PASSTHRU = 0 CUT_MODE = GS_CUT_1024 COMPUTE_MODE = 0 PARTIAL_THD_AT_EOI = 0 SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 0 SET_CONTEXT_REG: VGT_TF_PARAM <- TYPE = TESS_ISOLINE PARTITIONING = PART_INTEGER TOPOLOGY = OUTPUT_POINT RESERVED_REDUC_AXIS = 0 BUFFER_ACCESS_MODE = PATCH_MAJOR NUM_DS_WAVES_PER_SIMD = 0 SET_CONTEXT_REG: VGT_LS_HS_CONFIG <- NUM_PATCHES = 0 HS_NUM_INPUT_CP = 0 HS_NUM_OUTPUT_CP = 0 SET_CONTEXT_REG: SQ_LDS_ALLOC <- 0 SET_CTL_CONST: 0x00000001 0x00000000 SET_CONFIG_REG: VGT_PRIMITIVE_TYPE <- PRIM_TYPE = DI_PT_RECTLIST NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_AUTO: VGT_NUM_INDICES <- 3 VGT_DRAW_INITIATOR <- SOURCE_SELECT = 2 MAJOR_MODE = 0 SPRITE_EN = 0 NOT_EOP = 0 USE_OPAQUE = 0 MEM_WRITE: 0x00000000 0x00060000 0x00000002 0x00000000 NOP: 0x00000000 NOP: Trace point ID: 2 !!!!! This trace point was NOT reached by the CP !!!!! SET_CONFIG_REG: WAIT_UNTIL <- WAIT_CP_DMA_IDLE = 0 WAIT_CMDFIFO = 0 WAIT_2D_IDLE = 0 WAIT_3D_IDLE = 1 WAIT_2D_IDLECLEAN = 0 WAIT_3D_IDLECLEAN = 0 WAIT_EXTERN_SIG = 0 CMDFIFO_ENTRIES = 0 EVENT_WRITE: EVENT_INDEX <- 0 INV_L2 <- 0 SET_CONFIG_REG: SQ_GPR_RESOURCE_MGMT_1 <- NUM_PS_GPRS = 93 (0x5d) NUM_VS_GPRS = 46 (0x2e) NUM_CLAUSE_TEMP_GPRS = 4 SQ_GPR_RESOURCE_MGMT_2 <- NUM_GS_GPRS = 31 (0x1f) NUM_ES_GPRS = 31 (0x1f) SQ_GPR_RESOURCE_MGMT_3 <- NUM_HS_GPRS = 23 (0x17) NUM_LS_GPRS = 23 (0x17) SET_CONFIG_REG: SQ_DYN_GPR_CNTL_PS_FLUSH_REQ <- 0 SET_CONTEXT_REG: 0x28ff8 <- 0x00000001 SET_CONTEXT_REG: 0x28f78 <- 0x00000002 NOP: 0x00000008 SET_RESOURCE: 0x000014f0 0x00000200 0x000ffdff 0x02301000 0x00003440 0x00000000 0x00000000 0x00000000 0xc0000000 NOP: 0x00000008 NOP: 0x00000018 SET_RESOURCE: 0x00000af8 0x00000000 0x0001bfff 0x02300400 0x00003444 0x00000000 0x00000000 0x00000000 0xc0000000 NOP: 0x00000018 SET_CONTEXT_REG: 0x28fb8 <- 0x00000001 SET_CONTEXT_REG: 0x28f38 <- 0x00000003 NOP: 0x00000008 SET_RESOURCE: 0x00000ff0 0x00000300 0x000ffcff 0x02301000 0x00003440 0x00000000 0x00000000 0x00000000 0xc0000000 NOP: 0x00000008 SET_CONTEXT_REG: 0x281b8 <- 0x00000001 SET_CONTEXT_REG: 0x289b8 <- 0x00000004 NOP: 0x00000008 SET_RESOURCE: 0x000005f0 0x00000400 0x000ffbff 0x02301000 0x00003440 0x00000000 0x00000000 0x00000000 0xc0000000 NOP: 0x00000008 NOP: 0x0000001c SET_RESOURCE: 0x000005f8 0x00000000 0x03ffffff 0x02300400 0x00003444 0x00000000 0x00000000 0x00000000 0xc0000000 NOP: 0x0000001c SET_RESOURCE: 0x00001f00 0x00000000 0x0000002f 0x00000800 0x00003440 0x00000000 0x00000000 0x00000000 0xc0000000 NOP: 0x00000020 SET_CONTEXT_REG: VGT_MULTI_PRIM_IB_RESET_EN <- RESET_EN = 0 SET_CONTEXT_REG: VGT_INDX_OFFSET <- 0 VGT_MULTI_PRIM_IB_RESET_INDX <- 0x081ba8e0 SET_CONTEXT_REG: CB_COLOR_CONTROL <- DEGAMMA_ENABLE = 0 MODE = CB_NORMAL ROP3 = 204 (0xcc) SET_CONTEXT_REG: DB_ALPHA_TO_MASK <- ALPHA_TO_MASK_ENABLE = 0 ALPHA_TO_MASK_OFFSET0 = 2 ALPHA_TO_MASK_OFFSET1 = 2 ALPHA_TO_MASK_OFFSET2 = 2 ALPHA_TO_MASK_OFFSET3 = 2 OFFSET_ROUND = 0 SET_CONTEXT_REG: CB_BLEND0_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = 0 OPACITY_WEIGHT = 0 ALPHA_SRCBLEND = 0 ALPHA_COMB_FCN = 0 ALPHA_DESTBLEND = 0 SEPARATE_ALPHA_BLEND = 0 BLEND_CONTROL_ENABLE = 0 CB_BLEND1_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = 0 OPACITY_WEIGHT = 0 ALPHA_SRCBLEND = 0 ALPHA_COMB_FCN = 0 ALPHA_DESTBLEND = 0 SEPARATE_ALPHA_BLEND = 0 BLEND_CONTROL_ENABLE = 0 CB_BLEND2_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = 0 OPACITY_WEIGHT = 0 ALPHA_SRCBLEND = 0 ALPHA_COMB_FCN = 0 ALPHA_DESTBLEND = 0 SEPARATE_ALPHA_BLEND = 0 BLEND_CONTROL_ENABLE = 0 CB_BLEND3_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = 0 OPACITY_WEIGHT = 0 ALPHA_SRCBLEND = 0 ALPHA_COMB_FCN = 0 ALPHA_DESTBLEND = 0 SEPARATE_ALPHA_BLEND = 0 BLEND_CONTROL_ENABLE = 0 CB_BLEND4_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = 0 OPACITY_WEIGHT = 0 ALPHA_SRCBLEND = 0 ALPHA_COMB_FCN = 0 ALPHA_DESTBLEND = 0 SEPARATE_ALPHA_BLEND = 0 BLEND_CONTROL_ENABLE = 0 CB_BLEND5_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = 0 OPACITY_WEIGHT = 0 ALPHA_SRCBLEND = 0 ALPHA_COMB_FCN = 0 ALPHA_DESTBLEND = 0 SEPARATE_ALPHA_BLEND = 0 BLEND_CONTROL_ENABLE = 0 CB_BLEND6_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = 0 OPACITY_WEIGHT = 0 ALPHA_SRCBLEND = 0 ALPHA_COMB_FCN = 0 ALPHA_DESTBLEND = 0 SEPARATE_ALPHA_BLEND = 0 BLEND_CONTROL_ENABLE = 0 CB_BLEND7_CONTROL <- COLOR_SRCBLEND = BLEND_ZERO COLOR_COMB_FCN = COMB_DST_PLUS_SRC COLOR_DESTBLEND = 0 OPACITY_WEIGHT = 0 ALPHA_SRCBLEND = 0 ALPHA_COMB_FCN = 0 ALPHA_DESTBLEND = 0 SEPARATE_ALPHA_BLEND = 0 BLEND_CONTROL_ENABLE = 0 SET_CONTEXT_REG: CB_TARGET_MASK <- 15 (0x0000000f) CB_SHADER_MASK <- 15 (0x0000000f) SET_CONTEXT_REG: DB_RENDER_CONTROL <- DEPTH_CLEAR_ENABLE = 0 STENCIL_CLEAR_ENABLE = 0 DEPTH_COPY_ENABLE = 0 STENCIL_COPY_ENABLE = 0 RESUMMARIZE_ENABLE = 0 STENCIL_COMPRESS_DISABLE = 0 DEPTH_COMPRESS_DISABLE = 0 COPY_CENTROID = 0 COPY_SAMPLE = 0 COLOR_DISABLE = 0 DB_COUNT_CONTROL <- ZPASS_INCREMENT_DISABLE = 1 PERFECT_ZPASS_COUNTS = 0 SAMPLE_RATE = 0 SET_CONTEXT_REG: DB_RENDER_OVERRIDE <- FORCE_HIZ_ENABLE = 0 FORCE_HIS_ENABLE0 = 2 FORCE_HIS_ENABLE1 = 2 FORCE_SHADER_Z_ORDER = 0 FAST_Z_DISABLE = 0 FAST_STENCIL_DISABLE = 0 NOOP_CULL_DISABLE = 0 FORCE_COLOR_KILL = 0 FORCE_Z_READ = 0 FORCE_STENCIL_READ = 0 FORCE_FULL_Z_RANGE = 0 FORCE_QC_SMASK_CONFLICT = 0 DISABLE_VIEWPORT_CLAMP = 0 IGNORE_SC_ZRANGE = 0 DISABLE_PIXEL_RATE_TILES = 0 SET_CONTEXT_REG: DB_SHADER_CONTROL <- Z_EXPORT_ENABLE = 0 STENCIL_EXPORT_ENABLE = 0 Z_ORDER = EARLY_Z_THEN_LATE_Z KILL_ENABLE = 0 MASK_EXPORT_ENABLE = 0 DUAL_EXPORT_ENABLE = 1 DB_SOURCE_FORMAT = EXPORT_DB_TWO ALPHA_TO_MASK_DISABLE = 0 DEPTH_BEFORE_SHADER = 0 CONSERVATIVE_Z_EXPORT = EXPORT_ANY_Z SET_CONTEXT_REG: DB_DEPTH_CONTROL <- STENCIL_ENABLE = 0 Z_ENABLE = 0 Z_WRITE_ENABLE = 0 ZFUNC = 0 BACKFACE_ENABLE = 0 STENCILFUNC = STENCILFUNC_NEVER STENCILFAIL = STENCIL_KEEP STENCILZPASS = 0 STENCILZFAIL = 0 STENCILFUNC_BF = 0 STENCILFAIL_BF = 0 STENCILZPASS_BF = 0 STENCILZFAIL_BF = 0 SET_CONTEXT_REG: PA_SU_POINT_SIZE <- HEIGHT = 8 WIDTH = 8 PA_SU_POINT_MINMAX <- MIN_SIZE = 8 MAX_SIZE = 8 PA_SU_LINE_CNTL <- WIDTH = 8 SET_CONTEXT_REG: SPI_INTERP_CONTROL_0 <- FLAT_SHADE_ENA = 1 PNT_SPRITE_ENA = 0 PNT_SPRITE_OVRD_X = 0 PNT_SPRITE_OVRD_Y = 0 PNT_SPRITE_OVRD_Z = 0 PNT_SPRITE_OVRD_W = 0 PNT_SPRITE_TOP_1 = 0 SET_CONTEXT_REG: PA_SC_MODE_CNTL_0 <- MSAA_ENABLE = 0 VPORT_SCISSOR_ENABLE = 1 LINE_STIPPLE_ENABLE = 0 SET_CONTEXT_REG: PA_SU_VTX_CNTL <- PIX_CENTER_HALF = 1 QUANT_MODE = X_1_256TH SET_CONTEXT_REG: PA_SU_POLY_OFFSET_CLAMP <- 0 SET_CONTEXT_REG: PA_SU_SC_MODE_CNTL <- CULL_FRONT = 0 CULL_BACK = 0 FACE = 1 POLY_MODE = 0 POLYMODE_FRONT_PTYPE = 2 POLYMODE_BACK_PTYPE = 2 POLY_OFFSET_FRONT_ENABLE = 0 POLY_OFFSET_BACK_ENABLE = 0 POLY_OFFSET_PARA_ENABLE = 0 VTX_WINDOW_OFFSET_ENABLE = 0 PROVOKING_VTX_LAST = 1 PERSP_CORR_DIS = 0 MULTI_PRIM_IB_ENA = 0 SET_CONTEXT_REG: PA_SC_VPORT_SCISSOR_0_TL <- TL_X = 0 TL_Y = 0 WINDOW_OFFSET_DISABLE = 1 PA_SC_VPORT_SCISSOR_0_BR <- BR_X = 250 (0x0fa) BR_Y = 250 (0x0fa) SET_CONTEXT_REG: PA_CL_GB_VERT_CLIP_ADJ <- 0x43829168 PA_CL_GB_VERT_DISC_ADJ <- 1.0f (0x3f800000) PA_CL_GB_HORZ_CLIP_ADJ <- 0x43829168 PA_CL_GB_HORZ_DISC_ADJ <- 1.0f (0x3f800000) SET_CONTEXT_REG: PA_CL_VPORT_XSCALE_0 <- 125.0f (0x42fa0000) PA_CL_VPORT_XOFFSET_0 <- 125.0f (0x42fa0000) PA_CL_VPORT_YSCALE_0 <- 125.0f (0x42fa0000) PA_CL_VPORT_YOFFSET_0 <- 125.0f (0x42fa0000) PA_CL_VPORT_ZSCALE_0 <- 0.5f (0x3f000000) PA_CL_VPORT_ZOFFSET_0 <- 0.5f (0x3f000000) SET_CONTEXT_REG: PA_SC_VPORT_ZMIN_0 <- 0 PA_SC_VPORT_ZMAX_0 <- 1.0f (0x3f800000) SET_CONTEXT_REG: DB_STENCILREFMASK <- STENCILREF = 0 STENCILMASK = 0 STENCILWRITEMASK = 0 DB_STENCILREFMASK_BF <- STENCILREF_BF = 0 STENCILMASK_BF = 0 STENCILWRITEMASK_BF = 0 SET_CONTEXT_REG: SQ_PGM_START_FS <- 5 NOP: 0x0000000c SET_CONTEXT_REG: SET_CONTEXT_REG: SPI_PS_IN_CONTROL_0 <- NUM_INTERP = 1 POSITION_ENA = 0 POSITION_CENTROID = 0 POSITION_ADDR = 0 PARAM_GEN = 0 PERSP_GRADIENT_ENA = 1 LINEAR_GRADIENT_ENA = 0 POSITION_SAMPLE = 0 SPI_PS_IN_CONTROL_1 <- FRONT_FACE_ENA = 0 FRONT_FACE_CHAN = 0 FRONT_FACE_ALL_BITS = 0 FRONT_FACE_ADDR = 0 FOG_ADDR = 0 FIXED_PT_POSITION_ENA = 0 FIXED_PT_POSITION_ADDR = 0 SET_CONTEXT_REG: SPI_BARYC_CNTL <- PERSP_CENTER_ENA = 0 PERSP_CENTROID_ENA = 0 PERSP_SAMPLE_ENA = 1 PERSP_PULL_MODEL_ENA = 0 LINEAR_CENTER_ENA = 0 LINEAR_CENTROID_ENA = 0 LINEAR_SAMPLE_ENA = 0 SET_CONTEXT_REG: SPI_INPUT_Z <- PROVIDE_Z_TO_SPI = 0 SET_CONTEXT_REG: SQ_PGM_EXPORTS_PS <- EXPORT_COLORS = 1 EXPORT_Z = 0 SET_CONTEXT_REG: SQ_PGM_START_PS <- 0 SQ_PGM_RESOURCES_PS <- NUM_GPRS = 0 STACK_SIZE = 0 DX10_CLAMP = 0 PRIME_CACHE_ON_DRAW = 1 UNCACHED_FIRST_INST = 0 CLAMP_CONSTS = 0 NOP: 0x00000024 SET_CONTEXT_REG: SPI_VS_OUT_ID_0 <- 0 SPI_VS_OUT_ID_1 <- 0 SPI_VS_OUT_ID_2 <- 0 SPI_VS_OUT_ID_3 <- 0 SPI_VS_OUT_ID_4 <- 0 SPI_VS_OUT_ID_5 <- 0 SPI_VS_OUT_ID_6 <- 0 SPI_VS_OUT_ID_7 <- 0 SPI_VS_OUT_ID_8 <- 0 SPI_VS_OUT_ID_9 <- 0 SET_CONTEXT_REG: SPI_VS_OUT_CONFIG <- VS_PER_COMPONENT = 0 VS_EXPORT_COUNT = 0 VS_EXPORTS_FOG = 0 VS_OUT_FOG_VEC_ADDR = 0 SET_CONTEXT_REG: SQ_PGM_RESOURCES_VS <- NUM_GPRS = 2 STACK_SIZE = 1 DX10_CLAMP = 0 UNCACHED_FIRST_INST = 0 SET_CONTEXT_REG: PA_CL_VTE_CNTL <- VPORT_X_SCALE_ENA = 1 VPORT_X_OFFSET_ENA = 1 VPORT_Y_SCALE_ENA = 1 VPORT_Y_OFFSET_ENA = 1 VPORT_Z_SCALE_ENA = 1 VPORT_Z_OFFSET_ENA = 1 VTX_XY_FMT = 0 VTX_Z_FMT = 0 VTX_W0_FMT = 1 SET_CONTEXT_REG: SQ_PGM_START_VS <- 0 NOP: 0x00000028 SET_CONTEXT_REG: VGT_GS_MAX_VERT_OUT <- MAX_VERT_OUT = 3 SET_CONTEXT_REG: VGT_GS_OUT_PRIM_TYPE <- OUTPRIM_TYPE = OUTPRIM_TYPE_TRISTRIP SET_CONTEXT_REG: VGT_GS_INSTANCE_CNT <- ENABLE = 1 CNT = 1 SET_CONTEXT_REG: SQ_GS_VERT_ITEMSIZE <- 4 SQ_GS_VERT_ITEMSIZE_1 <- 0 SQ_GS_VERT_ITEMSIZE_2 <- 0 SQ_GS_VERT_ITEMSIZE_3 <- 0 SET_CONTEXT_REG: SQ_ESGS_RING_ITEMSIZE <- 4 SET_CONTEXT_REG: SQ_GSVS_RING_ITEMSIZE <- 12 (0x0000000c) SET_CONTEXT_REG: SQ_GSVS_RING_OFFSET_1 <- 12 (0x0000000c) SQ_GSVS_RING_OFFSET_2 <- 12 (0x0000000c) SQ_GSVS_RING_OFFSET_3 <- 12 (0x0000000c) SET_CONTEXT_REG: GS_PER_ES <- 128 (0x00000080) ES_PER_GS <- 256 (0x00000100) GS_PER_VS <- 2 SET_CONTEXT_REG: SQ_PGM_RESOURCES_GS <- NUM_GPRS = 2 STACK_SIZE = 1 DX10_CLAMP = 0 UNCACHED_FIRST_INST = 0 SET_CONTEXT_REG: SQ_PGM_START_GS <- 0 NOP: 0x0000002c SET_CONTEXT_REG: SQ_PGM_RESOURCES_ES <- NUM_GPRS = 6 STACK_SIZE = 1 DX10_CLAMP = 0 UNCACHED_FIRST_INST = 0 SET_CONTEXT_REG: SQ_PGM_START_ES <- 0 NOP: 0x00000030 SET_CONTEXT_REG: SQ_PGM_RESOURCES_LS <- NUM_GPRS = 8 STACK_SIZE = 1 DX10_CLAMP = 0 PRIME_CACHE_ON_DRAW = 0 UNCACHED_FIRST_INST = 0 SET_CONTEXT_REG: SQ_PGM_START_LS <- 0 NOP: 0x00000034 SET_CONTEXT_REG: SQ_PGM_RESOURCES_HS <- NUM_GPRS = 13 (0x0d) STACK_SIZE = 1 DX10_CLAMP = 0 PRIME_CACHE_ON_DRAW = 0 UNCACHED_FIRST_INST = 0 SET_CONTEXT_REG: SQ_PGM_START_HS <- 0 NOP: 0x00000038 SET_CONTEXT_REG: VGT_VTX_CNT_EN <- 1 SET_CONTEXT_REG: VGT_SHADER_STAGES_EN <- LS_EN = LS_STAGE_ON HS_EN = 1 ES_EN = ES_STAGE_DS GS_EN = 1 VS_EN = VS_STAGE_COPY_SHADER SET_CONTEXT_REG: VGT_GS_MODE <- MODE = GS_SCENARIO_G ES_PASSTHRU = 0 CUT_MODE = GS_CUT_128 COMPUTE_MODE = 0 PARTIAL_THD_AT_EOI = 0 SET_CONTEXT_REG: VGT_PRIMITIVEID_EN <- PRIMITIVEID_EN = 1 SET_CONTEXT_REG: VGT_TF_PARAM <- TYPE = TESS_TRIANGLE PARTITIONING = PART_INTEGER TOPOLOGY = OUTPUT_TRIANGLE_CW RESERVED_REDUC_AXIS = 0 BUFFER_ACCESS_MODE = PATCH_MAJOR NUM_DS_WAVES_PER_SIMD = 0 SET_CONFIG_REG: WAIT_UNTIL <- WAIT_CP_DMA_IDLE = 0 WAIT_CMDFIFO = 0 WAIT_2D_IDLE = 0 WAIT_3D_IDLE = 1 WAIT_2D_IDLECLEAN = 0 WAIT_3D_IDLECLEAN = 0 WAIT_EXTERN_SIG = 0 CMDFIFO_ENTRIES = 0 EVENT_WRITE: EVENT_INDEX <- 0 INV_L2 <- 0 SET_CONFIG_REG: SQ_ESGS_RING_BASE <- 0 NOP: 0x00000018 SET_CONFIG_REG: SQ_ESGS_RING_SIZE <- 448 (0x000001c0) SET_CONFIG_REG: SQ_GSVS_RING_BASE <- 0 NOP: 0x0000001c SET_CONFIG_REG: SQ_GSVS_RING_SIZE <- 0x00040000 SET_CONFIG_REG: WAIT_UNTIL <- WAIT_CP_DMA_IDLE = 0 WAIT_CMDFIFO = 0 WAIT_2D_IDLE = 0 WAIT_3D_IDLE = 1 WAIT_2D_IDLECLEAN = 0 WAIT_3D_IDLECLEAN = 0 WAIT_EXTERN_SIG = 0 CMDFIFO_ENTRIES = 0 EVENT_WRITE: EVENT_INDEX <- 0 INV_L2 <- 0 SET_CONTEXT_REG: VGT_LS_HS_CONFIG <- NUM_PATCHES = 1 HS_NUM_INPUT_CP = 3 HS_NUM_OUTPUT_CP = 3 SET_CONTEXT_REG: SQ_LDS_ALLOC <- 16464 (0x00004050) SET_CONFIG_REG: VGT_PRIMITIVE_TYPE <- PRIM_TYPE = DI_PT_PATCH NUM_INSTANCES: VGT_NUM_INSTANCES <- 1 DRAW_INDEX_AUTO: VGT_NUM_INDICES <- 6 VGT_DRAW_INITIATOR <- SOURCE_SELECT = 2 MAJOR_MODE = 0 SPRITE_EN = 0 NOT_EOP = 0 USE_OPAQUE = 0 MEM_WRITE: 0x00000000 0x00060000 0x00000003 0x00000000 NOP: 0x00000000 NOP: Trace point ID: 3 !!!!! This trace point was NOT reached by the CP !!!!! SET_CONFIG_REG: WAIT_UNTIL <- WAIT_CP_DMA_IDLE = 1 WAIT_CMDFIFO = 0 WAIT_2D_IDLE = 0 WAIT_3D_IDLE = 1 WAIT_2D_IDLECLEAN = 0 WAIT_3D_IDLECLEAN = 0 WAIT_EXTERN_SIG = 0 CMDFIFO_ENTRIES = 0 EVENT_WRITE: EVENT_INDEX <- 0 INV_L2 <- 0 EVENT_WRITE: EVENT_INDEX <- 0 INV_L2 <- 0 EVENT_WRITE: EVENT_INDEX <- 0 INV_L2 <- 0 SURFACE_SYNC: CP_COHER_CNTL <- DEST_BASE_0_ENA = 0 DEST_BASE_1_ENA = 0 SO0_DEST_BASE_ENA = 0 SO1_DEST_BASE_ENA = 0 SO2_DEST_BASE_ENA = 0 SO3_DEST_BASE_ENA = 0 CB0_DEST_BASE_ENA = 1 CB1_DEST_BASE_ENA = 1 CB2_DEST_BASE_ENA = 1 CB3_DEST_BASE_ENA = 1 CB4_DEST_BASE_ENA = 1 CB5_DEST_BASE_ENA = 1 CB6_DEST_BASE_ENA = 1 CB7_DEST_BASE_ENA = 1 DB_DEST_BASE_ENA = 1 CB8_DEST_BASE_ENA = 1 CB9_DEST_BASE_ENA = 1 CB10_DEST_BASE_ENA = 1 CB11_DEST_BASE_ENA = 1 TC_ACTION_ENA = 0 VC_ACTION_ENA = 0 CB_ACTION_ENA = 1 DB_ACTION_ENA = 1 SH_ACTION_ENA = 0 SMX_ACTION_ENA = 1 CR0_ACTION_ENA = 0 CR1_ACTION_ENA = 0 CR2_ACTION_ENA = 0 CP_COHER_SIZE <- 0xffffffff CP_COHER_BASE <- 0 POLL_INTERVAL <- 10 (0x000a) MEM_WRITE: 0x00000000 0x00060000 0x00000004 0x00000000 NOP: 0x00000000 NOP: Trace point ID: 4 !!!!! This trace point was NOT reached by the CP !!!!! ------------------- IB end ------------------- Done.