From 0e3d7a8dada702fe1bd1ec4b366fc00b47b2c347 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Mon, 7 Aug 2017 04:51:28 +0100 Subject: [PATCH] radv/si: hack debug try to fix hangs patch --- src/amd/vulkan/radv_cmd_buffer.c | 12 +++++++++++- src/amd/vulkan/radv_private.h | 2 ++ 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 812f8de..a38d403 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -1623,6 +1623,11 @@ radv_cmd_buffer_flush_state(struct radv_cmd_buffer *cmd_buffer, MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, 4096); + if (cmd_buffer->last_op_compute == true){ + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH; + cmd_buffer->last_op_compute = false; + } + radv_cmd_buffer_update_vertex_descriptors(cmd_buffer); if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_PIPELINE) @@ -2233,7 +2238,8 @@ VkResult radv_EndCommandBuffer( RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); if (cmd_buffer->queue_family_index != RADV_QUEUE_TRANSFER) { - cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH; + if (cmd_buffer->device->physical_device->rad_info.chip_class == SI) + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH; si_emit_cache_flush(cmd_buffer); } @@ -2908,6 +2914,10 @@ void radv_CmdDrawIndexedIndirectCountAMD( static void radv_flush_compute_state(struct radv_cmd_buffer *cmd_buffer) { + if (cmd_buffer->last_op_compute == false) { + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_PS_PARTIAL_FLUSH; + cmd_buffer->last_op_compute = true; + } radv_emit_compute_pipeline(cmd_buffer); radv_flush_descriptors(cmd_buffer, VK_SHADER_STAGE_COMPUTE_BIT); radv_flush_constants(cmd_buffer, cmd_buffer->state.compute_pipeline, diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index c543554..0d8af9d 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -837,6 +837,8 @@ struct radv_cmd_buffer { uint32_t gfx9_fence_offset; struct radeon_winsys_bo *gfx9_fence_bo; uint32_t gfx9_fence_idx; + + bool last_op_compute; }; struct radv_image; -- 2.9.4