Patch to fix hard lockup on Radeon 7000 cards on SMP boxes (#138108).
This was a regression from 6.7.0 to 6.8.0 and searching through CVS
history turned up the dynamic clock scaling.  I'm not exactly sure
what the problem is, but the dynamic clock setup writes to PLL
registers even when the feature is turned off.  I have no idea why
this triggers lockups on SMP boxes.

Kristian Høgsberg <krh@redhat.com>

--- xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c.orig	2004-11-22 21:30:39.445800392 -0500
+++ xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c	2004-11-22 22:14:36.608297855 -0500
@@ -7785,7 +7778,9 @@
     CARD32 tmp;
     switch(mode) {
         case 0: /* Turn everything OFF (ForceON to everything)*/
-            if ( !info->HasCRTC2 ) {
+	    if (info->ChipFamily == CHIP_FAMILY_RV100) {
+		break;
+	    } else if ( !info->HasCRTC2 ) {
                 tmp = INPLL(pScrn, RADEON_SCLK_CNTL);
                 tmp |= (RADEON_SCLK_FORCE_CP   | RADEON_SCLK_FORCE_HDP |
 			RADEON_SCLK_FORCE_DISP1 | RADEON_SCLK_FORCE_TOP |
@@ -7925,7 +7920,9 @@
 	    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Dynamic Clock Scaling Disabled\n");
             break;
         case 1:
-            if (!info->HasCRTC2) {
+	    if (info->ChipFamily == CHIP_FAMILY_RV100) {
+		break;
+	    } else if (!info->HasCRTC2) {
                 tmp = INPLL(pScrn, RADEON_SCLK_CNTL);
 		if ((INREG(RADEON_CONFIG_CNTL) & RADEON_CFG_ATI_REV_ID_MASK) >
 		    RADEON_CFG_ATI_REV_A13) {