Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Linux version 4.16.0-rc1-drm-tip-ww8-commit-337c900+ (gfx@bifrost) (gcc version 5.4.0 20160609 (Ubuntu 5.4.0-6ubuntu1~16.04.5)) #1 SMP Tue Feb 20 08:27:22 CST 2018 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Command line: BOOT_IMAGE=/boot/vmlinuz-4.16.0-rc1-drm-tip-ww8-commit-337c900+ root=UUID=a4a52a15-d64d-4a8d-81ce-43ac39ad6135 ro quiet drm.debug=0x1e intel_iommu=igfx_off auto panic=1 nmi_watchdog=panic fsck.repair=yes i915.error_capture=yes resume=/dev/sda2 fastboot Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] KERNEL supported cpus: Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Intel GenuineIntel Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] AMD AuthenticAMD Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Centaur CentaurHauls Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] x86/fpu: Supporting XSAVE feature 0x001: 'x87 floating point registers' Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] x86/fpu: Supporting XSAVE feature 0x002: 'SSE registers' Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] x86/fpu: Supporting XSAVE feature 0x008: 'MPX bounds registers' Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] x86/fpu: Supporting XSAVE feature 0x010: 'MPX CSR' Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] x86/fpu: xstate_offset[3]: 576, xstate_sizes[3]: 64 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] x86/fpu: xstate_offset[4]: 640, xstate_sizes[4]: 64 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] x86/fpu: Enabled xstate features 0x1b, context size is 704 bytes, using 'compacted' format. Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] e820: BIOS-provided physical RAM map: Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] BIOS-e820: [mem 0x0000000000000000-0x0000000000057fff] usable Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] BIOS-e820: [mem 0x0000000000058000-0x0000000000059fff] reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] BIOS-e820: [mem 0x000000000005a000-0x000000000009dfff] usable Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] BIOS-e820: [mem 0x000000000009e000-0x00000000000fffff] reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] BIOS-e820: [mem 0x0000000000100000-0x000000000fffffff] usable Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] BIOS-e820: [mem 0x0000000010000000-0x0000000012151fff] reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] BIOS-e820: [mem 0x0000000012152000-0x0000000076ba9fff] usable Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] BIOS-e820: [mem 0x0000000076baa000-0x0000000076e90fff] reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] BIOS-e820: [mem 0x0000000076e91000-0x0000000076f80fff] type 20 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] BIOS-e820: [mem 0x0000000076f81000-0x0000000079980fff] reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] BIOS-e820: [mem 0x0000000079981000-0x00000000799e0fff] ACPI NVS Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] BIOS-e820: [mem 0x00000000799e1000-0x0000000079a20fff] ACPI data Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] BIOS-e820: [mem 0x0000000079a21000-0x000000007abfffff] usable Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] BIOS-e820: [mem 0x000000007ac00000-0x000000007fffffff] reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] BIOS-e820: [mem 0x00000000d3709000-0x00000000d3709fff] reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] BIOS-e820: [mem 0x00000000e0000000-0x00000000e3ffffff] reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] BIOS-e820: [mem 0x00000000fed01000-0x00000000fed01fff] reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] BIOS-e820: [mem 0x0000000100000000-0x000000027fffffff] usable Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] NX (Execute Disable) protection: active Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] efi: EFI v2.60 by EDK II Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] efi: SMBIOS=0x76e8d000 SMBIOS 3.0=0x76e8b000 ACPI=0x79a20000 ACPI 2.0=0x79a20014 ESRT=0x79940000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] random: fast init done Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] SMBIOS 3.1.1 present. Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] DMI: Intel Corp. Geminilake/GLK RVP1 DDR4 (05), BIOS GELKRVPA.X64.0077.B50.1712072148 12/07/2017 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] e820: last_pfn = 0x280000 max_arch_pfn = 0x400000000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] MTRR default type: uncachable Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] MTRR fixed ranges enabled: Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] 00000-9FFFF write-back Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] A0000-BFFFF uncachable Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] C0000-FFFFF write-protect Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] MTRR variable ranges enabled: Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] 0 base 00FF800000 mask 7FFF800000 write-protect Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] 1 base 0000000000 mask 7F80000000 write-back Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] 2 base 007B000000 mask 7FFF000000 uncachable Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] 3 base 007C000000 mask 7FFC000000 uncachable Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] 4 base 0100000000 mask 7F00000000 write-back Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] 5 base 0200000000 mask 7F80000000 write-back Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] 6 base 0090000000 mask 7FF0000000 write-combining Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] 7 disabled Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] 8 disabled Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] 9 disabled Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] x86/PAT: Configuration [0-7]: WB WC UC- UC WB WP UC- WT Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] e820: last_pfn = 0x7ac00 max_arch_pfn = 0x400000000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] esrt: ESRT header is not in the memory map. Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Scanning 1 areas for low memory corruption Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Base memory trampoline at [ (ptrval)] 98000 size 24576 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Using GB pages for direct mapping Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] BRK [0x1a69c000, 0x1a69cfff] PGTABLE Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] BRK [0x1a69d000, 0x1a69dfff] PGTABLE Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] BRK [0x1a69e000, 0x1a69efff] PGTABLE Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] BRK [0x1a69f000, 0x1a69ffff] PGTABLE Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] BRK [0x1a6a0000, 0x1a6a0fff] PGTABLE Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Secure boot could not be determined Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] RAMDISK: [mem 0x32fa5000-0x357c9fff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: Early table checksum verification disabled Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: RSDP 0x0000000079A20014 000024 (v02 INTEL ) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: XSDT 0x00000000799ED188 0000EC (v01 INTEL GLK-SOC 00000003 BRXT 01000013) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: FACP 0x0000000079A1A000 00010C (v05 INTEL GLK-SOC 00000003 BRXT 0100000D) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: DSDT 0x0000000079A00000 01262A (v02 INTEL GLK-SOC 00000003 BRXT 0100000D) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: FACS 0x00000000799D8000 000040 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: UEFI 0x00000000799DF000 000042 (v01 INTEL EDK2 00000002 BRXT 01000013) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: BDAT 0x0000000079A1E000 000030 (v02 00000000 00000000) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: HPET 0x0000000079A19000 000038 (v01 INTEL GLK-SOC 00000003 BRXT 0100000D) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: LPIT 0x0000000079A18000 00005C (v01 INTEL GLK-SOC 00000003 BRXT 0100000D) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: APIC 0x0000000079A17000 000084 (v03 INTEL GLK-SOC 00000003 BRXT 0100000D) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: MCFG 0x0000000079A16000 00003C (v01 INTEL GLK-SOC 00000003 BRXT 0100000D) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: NPKT 0x0000000079A15000 000065 (v01 INTEL GLK-SOC 00000003 BRXT 0100000D) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: PRAM 0x0000000079A14000 000030 (v01 INTEL GLK-SOC 00000003 BRXT 0100000D) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: WSMT 0x0000000079A13000 000028 (v01 INTEL GLK-SOC 00000003 BRXT 0100000D) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: SSDT 0x00000000799FC000 003F51 (v02 INTEL DptfTab 00000003 BRXT 0100000D) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: SSDT 0x00000000799F6000 005A24 (v02 INTEL RVPRtd3 00000003 BRXT 0100000D) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: SSDT 0x00000000799F4000 0010B3 (v02 INTEL UsbCTabl 00000003 BRXT 0100000D) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: SSDT 0x00000000799F2000 00153E (v01 Intel_ Platform 00001000 INTL 20160527) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: SSDT 0x00000000799F1000 0000B1 (v01 Intel_ ADebTabl 00001000 INTL 20160527) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: SSDT 0x00000000799F0000 000493 (v02 PmRef Cpu0Ist 00003000 INTL 20160527) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: SSDT 0x00000000799EF000 000775 (v02 CpuRef CpuSsdt 00003000 INTL 20160527) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: SSDT 0x00000000799EE000 000388 (v02 PmRef Cpu0Tst 00003000 INTL 20160527) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: SSDT 0x0000000079A1F000 0001E6 (v02 PmRef ApTst 00003000 INTL 20160527) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: SSDT 0x00000000799EA000 002939 (v02 SaSsdt SaSsdt 00003000 INTL 20160527) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: FPDT 0x00000000799E9000 000044 (v01 INTEL EDK2 00000002 BRXT 01000013) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: DBGP 0x0000000079A1C000 000034 (v01 INTEL GLK-SOC 00000003 BRXT 0100000D) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: DBG2 0x0000000079A1D000 000072 (v00 INTEL GLK-SOC 00000003 BRXT 0100000D) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: WDAT 0x0000000079A1B000 000104 (v01 00000000 00000000) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: NHLT 0x00000000799E7000 001A50 (v00 INTEL EDK2 00000002 BRXT 01000013) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: Local APIC address 0xfee00000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] No NUMA configuration found Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Faking a node at [mem 0x0000000000000000-0x000000027fffffff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] NODE_DATA(0) allocated [mem 0x27fff8000-0x27fffcfff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] tsc: Using PIT calibration value Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Zone ranges: Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] DMA [mem 0x0000000000001000-0x0000000000ffffff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] DMA32 [mem 0x0000000001000000-0x00000000ffffffff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Normal [mem 0x0000000100000000-0x000000027fffffff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Device empty Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Movable zone start for each node Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Early memory node ranges Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] node 0: [mem 0x0000000000001000-0x0000000000057fff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] node 0: [mem 0x000000000005a000-0x000000000009dfff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] node 0: [mem 0x0000000000100000-0x000000000fffffff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] node 0: [mem 0x0000000012152000-0x0000000076ba9fff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] node 0: [mem 0x0000000079a21000-0x000000007abfffff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] node 0: [mem 0x0000000100000000-0x000000027fffffff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Initmem setup node 0 [mem 0x0000000000001000-0x000000027fffffff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] On node 0 totalpages: 2055122 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] DMA zone: 64 pages used for memmap Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] DMA zone: 23 pages reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] DMA zone: 3995 pages, LIFO batch:0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] DMA32 zone: 7473 pages used for memmap Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] DMA32 zone: 478263 pages, LIFO batch:31 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Normal zone: 24576 pages used for memmap Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Normal zone: 1572864 pages, LIFO batch:31 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Reserved but unavailable: 98 pages Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Reserving Intel graphics memory at [mem 0x7c000000-0x7fffffff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: PM-Timer IO Port: 0x408 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: Local APIC address 0xfee00000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x01] high level lint[0x1]) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x02] high level lint[0x1]) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x03] high level lint[0x1]) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x04] high level lint[0x1]) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] IOAPIC[0]: apic_id 1, version 32, address 0xfec00000, GSI 0-119 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: IRQ0 used by override. Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: IRQ9 used by override. Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Using ACPI (MADT) for SMP configuration information Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: HPET id: 0x8086a701 base: 0xfed00000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] smpboot: Allowing 4 CPUs, 0 hotplug CPUs Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] PM: Registered nosave memory: [mem 0x00000000-0x00000fff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] PM: Registered nosave memory: [mem 0x00058000-0x00059fff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] PM: Registered nosave memory: [mem 0x0009e000-0x000fffff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] PM: Registered nosave memory: [mem 0x10000000-0x12151fff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] PM: Registered nosave memory: [mem 0x76baa000-0x76e90fff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] PM: Registered nosave memory: [mem 0x76e91000-0x76f80fff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] PM: Registered nosave memory: [mem 0x76f81000-0x79980fff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] PM: Registered nosave memory: [mem 0x79981000-0x799e0fff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] PM: Registered nosave memory: [mem 0x799e1000-0x79a20fff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] PM: Registered nosave memory: [mem 0x7ac00000-0x7fffffff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] PM: Registered nosave memory: [mem 0x80000000-0xd3708fff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] PM: Registered nosave memory: [mem 0xd3709000-0xd3709fff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] PM: Registered nosave memory: [mem 0xd370a000-0xdfffffff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] PM: Registered nosave memory: [mem 0xe0000000-0xe3ffffff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] PM: Registered nosave memory: [mem 0xe4000000-0xfed00fff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] PM: Registered nosave memory: [mem 0xfed01000-0xfed01fff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] PM: Registered nosave memory: [mem 0xfed02000-0xffffffff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] e820: [mem 0x80000000-0xd3708fff] available for PCI devices Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Booting paravirtualized kernel on bare hardware Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] clocksource: refined-jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645519600211568 ns Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] setup_percpu: NR_CPUS:256 nr_cpumask_bits:256 nr_cpu_ids:4 nr_node_ids:1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] percpu: Embedded 45 pages/cpu @ (ptrval) s146456 r8192 d29672 u524288 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] pcpu-alloc: s146456 r8192 d29672 u524288 alloc=1*2097152 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] pcpu-alloc: [0] 0 1 2 3 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 2022986 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Policy zone: Normal Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Kernel command line: BOOT_IMAGE=/boot/vmlinuz-4.16.0-rc1-drm-tip-ww8-commit-337c900+ root=UUID=a4a52a15-d64d-4a8d-81ce-43ac39ad6135 ro quiet drm.debug=0x1e intel_iommu=igfx_off auto panic=1 nmi_watchdog=panic fsck.repair=yes i915.error_capture=yes resume=/dev/sda2 fastboot Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] DMAR: Disable GFX device mapping Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Calgary: detecting Calgary via BIOS EBDA area Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Calgary: Unable to locate Rio Grande table in EBDA - bailing! Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Memory: 7908548K/8220488K available (12300K kernel code, 1519K rwdata, 4080K rodata, 2340K init, 1168K bss, 311940K reserved, 0K cma-reserved) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Kernel/User page tables isolation: enabled Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ftrace: allocating 39212 entries in 154 pages Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Hierarchical RCU implementation. Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=4. Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Tasks RCU enabled. Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] NR_IRQS: 16640, nr_irqs: 1024, preallocated irqs: 16 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] Console: colour dummy device 80x25 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] console [tty0] enabled Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: Core revision 20180105 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] ACPI: 11 ACPI AML tables successfully acquired and loaded Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] clocksource: hpet: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 99544814920 ns Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.000000] hpet clockevent registered Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.004000] APIC: Switch to symmetric I/O mode setup Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.004000] x2apic: IRQ remapping doesn't support X2APIC mode Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.008000] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.032000] tsc: PIT calibration matches HPET. 1 loops Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.032000] tsc: Detected 1094.590 MHz processor Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.032000] tsc: Detected 1094.400 MHz TSC Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.032000] clocksource: tsc-early: mask: 0xffffffffffffffff max_cycles: 0xfc66f4fc7c, max_idle_ns: 440795224246 ns Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.032000] Calibrating delay loop (skipped), value calculated using timer frequency.. 2188.80 BogoMIPS (lpj=4377600) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.032000] pid_max: default: 32768 minimum: 301 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.032000] Security Framework initialized Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.032000] Yama: becoming mindful. Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.036119] AppArmor: AppArmor initialized Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.039122] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.040609] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.040783] Mount-cache hash table entries: 16384 (order: 5, 131072 bytes) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.040848] Mountpoint-cache hash table entries: 16384 (order: 5, 131072 bytes) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.042073] CPU: Physical Processor ID: 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.042076] CPU: Processor Core ID: 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.042088] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.042102] mce: CPU supports 7 MCE banks Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.042148] CPU0: Thermal monitoring enabled (TM1) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.042209] process: using mwait in idle threads Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.042213] Last level iTLB entries: 4KB 0, 2MB 0, 4MB 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.042215] Last level dTLB entries: 4KB 0, 2MB 0, 4MB 0, 1GB 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.042220] Spectre V2 : Vulnerable: Minimal generic ASM retpoline Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.042521] Freeing SMP alternatives memory: 36K Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.047602] TSC deadline timer enabled Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.047612] smpboot: CPU0: Intel(R) Pentium(R) Silver N5000 CPU @ 1.10GHz (family: 0x6, model: 0x7a, stepping: 0x1) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.047977] Performance Events: PEBS fmt3+, Goldmont plus events, 32-deep LBR, full-width counters, Intel PMU driver. Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.048000] ... version: 4 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.048000] ... bit width: 48 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.048000] ... generic registers: 4 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.048000] ... value mask: 0000ffffffffffff Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.048000] ... max period: 00007fffffffffff Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.048000] ... fixed-purpose events: 3 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.048000] ... event mask: 000000070000000f Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.048000] Hierarchical SRCU implementation. Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.048000] smp: Bringing up secondary CPUs ... Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.048000] x86: Booting SMP configuration: Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.048000] .... node #0, CPUs: #1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.004000] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.049840] NMI watchdog: Enabled. Permanently consumes one hw-PMU counter. Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.049874] #2 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.004000] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.052620] #3 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.004000] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.054085] smp: Brought up 1 node, 4 CPUs Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.054085] smpboot: Max logical packages: 1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.054085] smpboot: Total of 4 processors activated (8755.20 BogoMIPS) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.067178] devtmpfs: initialized Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.068216] x86/mm: Memory block size: 128MB Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.076421] evm: security.selinux Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.076423] evm: security.SMACK64 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.076424] evm: security.SMACK64EXEC Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.076425] evm: security.SMACK64TRANSMUTE Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.076426] evm: security.SMACK64MMAP Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.076427] evm: security.apparmor Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.076428] evm: security.ima Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.076429] evm: security.capability Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.076525] PM: Registering ACPI NVS region [mem 0x79981000-0x799e0fff] (393216 bytes) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.076697] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.076697] futex hash table entries: 1024 (order: 4, 65536 bytes) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.076697] pinctrl core: initialized pinctrl subsystem Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.077196] RTC time: 3:45:58, date: 02/20/18 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.082615] NET: Registered protocol family 16 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.083422] audit: initializing netlink subsys (disabled) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.083458] audit: type=2000 audit(1519098357.080:1): state=initialized audit_enabled=0 res=1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.084536] cpuidle: using governor ladder Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.084536] cpuidle: using governor menu Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.084536] ACPI: bus type PCI registered Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.084536] acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.084853] PCI: MMCONFIG for domain 0000 [bus 00-3f] at [mem 0xe0000000-0xe3ffffff] (base 0xe0000000) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.084868] PCI: MMCONFIG at [mem 0xe0000000-0xe3ffffff] reserved in E820 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.084868] PCI: Using configuration type 1 for base access Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.100407] HugeTLB registered 1.00 GiB page size, pre-allocated 0 pages Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.100407] HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.100626] ACPI: Added _OSI(Module Device) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.100628] ACPI: Added _OSI(Processor Device) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.100630] ACPI: Added _OSI(3.0 _SCP Extensions) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.100632] ACPI: Added _OSI(Processor Aggregator Device) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.106423] ACPI: Executed 16 blocks of module-level executable AML code Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.227994] ACPI: Dynamic OEM Table Load: Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.228121] ACPI: SSDT 0xFFFF93A9F6395400 0001A5 (v02 PmRef Cpu0Cst 00003001 INTL 20160527) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.228977] ACPI: Executed 1 blocks of module-level executable AML code Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.233020] ACPI: Dynamic OEM Table Load: Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.233035] ACPI: SSDT 0xFFFF93A9F6394800 0001E6 (v02 PmRef ApIst 00003000 INTL 20160527) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.234520] ACPI: Executed 1 blocks of module-level executable AML code Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.235395] ACPI: Dynamic OEM Table Load: Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.235410] ACPI: SSDT 0xFFFF93A9F661CA00 0000C9 (v02 PmRef ApCst 00003000 INTL 20160527) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.236302] ACPI: Executed 1 blocks of module-level executable AML code Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.255547] ACPI: EC: EC started Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.255549] ACPI: EC: interrupt blocked Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.424560] ACPI: \_SB_.PCI0.LPCB.H_EC: Used as first EC Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.424569] ACPI: \_SB_.PCI0.LPCB.H_EC: GPE=0x25, EC_CMD/EC_SC=0x66, EC_DATA=0x62 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.424576] ACPI: \_SB_.PCI0.LPCB.H_EC: Used as boot DSDT EC to handle transactions Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.424578] ACPI: Interpreter enabled Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.424699] ACPI: (supports S0 S3 S4 S5) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.424702] ACPI: Using IOAPIC for interrupt routing Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.424943] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.436977] ACPI: GPE 0x0F active on init Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.437035] ACPI: Enabled 10 GPEs in block 00 to 7F Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.460471] ACPI: Power Resource [PXP] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.622787] ACPI: Power Resource [DRST] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.628500] ACPI: Power Resource [PXP] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.786759] ACPI: Power Resource [DRST] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.792228] ACPI: Power Resource [PXP] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.950747] ACPI: Power Resource [DRST] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.954882] ACPI: Power Resource [PXP] (off) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.966657] ACPI: Power Resource [DRST] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 0.972333] ACPI: Power Resource [PXP] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.009847] ACPI: Power Resource [DRST] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.015460] ACPI: Power Resource [PXP] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.174765] ACPI: Power Resource [DRST] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.176930] ACPI: Power Resource [SPPR] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.203576] ACPI: Power Resource [SPPR] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.208407] ACPI: Power Resource [UPPR] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.213381] ACPI: Power Resource [BTPR] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.217578] ACPI: Power Resource [UPPR] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.224361] ACPI: Power Resource [UPPR] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.231060] ACPI: Power Resource [PX03] (off) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.242176] ACPI: Power Resource [BTPR] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.246901] ACPI: Power Resource [UPPR] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.254169] ACPI: Power Resource [UPPR] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.260959] ACPI: Power Resource [UPPR] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.266595] ACPI: Power Resource [USBC] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.267886] ACPI: Power Resource [SDPR] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.297906] ACPI: Power Resource [LSPR] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.477488] ACPI: Power Resource [WRST] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.481200] ACPI: Power Resource [PAUD] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.538916] ACPI: Power Resource [FN00] (on) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.581284] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff]) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.581305] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.590358] acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug PME AER PCIeCapability] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.590457] acpi PNP0A08:00: [Firmware Info]: MMCONFIG for domain 0000 [bus 00-3f] only partially covers this bridge Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.596770] PCI host bridge to bus 0000:00 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.596779] pci_bus 0000:00: root bus resource [io 0x0070-0x0077] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.596786] pci_bus 0000:00: root bus resource [io 0x0000-0x006f window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.596793] pci_bus 0000:00: root bus resource [io 0x0078-0x0cf7 window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.596800] pci_bus 0000:00: root bus resource [io 0x0d00-0xffff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.596807] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.596814] pci_bus 0000:00: root bus resource [mem 0x000c0000-0x000dffff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.596821] pci_bus 0000:00: root bus resource [mem 0x000e0000-0x000fffff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.596828] pci_bus 0000:00: root bus resource [mem 0x7c000001-0x7fffffff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.596835] pci_bus 0000:00: root bus resource [mem 0x80000000-0xbfffffff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.596841] pci_bus 0000:00: root bus resource [mem 0xe0000000-0xefffffff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.596847] pci_bus 0000:00: root bus resource [mem 0xfea00000-0xfeafffff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.596854] pci_bus 0000:00: root bus resource [mem 0xfed00000-0xfed003ff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.596861] pci_bus 0000:00: root bus resource [mem 0xfed01000-0xfed01fff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.596867] pci_bus 0000:00: root bus resource [mem 0xfed03000-0xfed03fff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.596873] pci_bus 0000:00: root bus resource [mem 0xfed06000-0xfed06fff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.596880] pci_bus 0000:00: root bus resource [mem 0xfed08000-0xfed09fff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.596886] pci_bus 0000:00: root bus resource [mem 0xfed80000-0xfedbffff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.596893] pci_bus 0000:00: root bus resource [mem 0xfed1c000-0xfed1cfff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.596900] pci_bus 0000:00: root bus resource [mem 0xfee00000-0xfeefffff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.596908] pci_bus 0000:00: root bus resource [bus 00-ff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.596938] pci 0000:00:00.0: [8086:31f0] type 00 class 0x060000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.599205] pci 0000:00:00.1: [8086:318c] type 00 class 0x118000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.599249] pci 0000:00:00.1: reg 0x10: [mem 0x80000000-0x80007fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.601543] pci 0000:00:00.3: [8086:3190] type 00 class 0x088000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.601573] pci 0000:00:00.3: reg 0x10: [mem 0xa1218000-0xa1218fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.603754] pci 0000:00:02.0: [8086:3184] type 00 class 0x030000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.603775] pci 0000:00:02.0: reg 0x10: [mem 0xa0000000-0xa0ffffff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.603786] pci 0000:00:02.0: reg 0x18: [mem 0x90000000-0x9fffffff 64bit pref] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.603794] pci 0000:00:02.0: reg 0x20: [io 0x2000-0x203f] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.603843] pci 0000:00:02.0: BAR 2: assigned to efifb Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.606335] pci 0000:00:0e.0: [8086:3198] type 00 class 0x040100 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.606371] pci 0000:00:0e.0: reg 0x10: [mem 0xa1210000-0xa1213fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.606411] pci 0000:00:0e.0: reg 0x20: [mem 0xa1000000-0xa10fffff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.606517] pci 0000:00:0e.0: PME# supported from D0 D3hot D3cold Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.610701] pci 0000:00:0f.0: [8086:319a] type 00 class 0x078000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.610751] pci 0000:00:0f.0: reg 0x10: [mem 0xa1219000-0xa1219fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.610922] pci 0000:00:0f.0: PME# supported from D3hot Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.613105] pci 0000:00:11.0: [8086:31a2] type 00 class 0x005007 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.613147] pci 0000:00:11.0: reg 0x10: [mem 0xa1214000-0xa1215fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.613169] pci 0000:00:11.0: reg 0x18: [mem 0xa121a000-0xa121afff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.615646] pci 0000:00:12.0: [8086:31e3] type 00 class 0x010601 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.615672] pci 0000:00:12.0: reg 0x10: [mem 0xa1216000-0xa1217fff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.615683] pci 0000:00:12.0: reg 0x14: [mem 0xa123d000-0xa123d0ff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.615695] pci 0000:00:12.0: reg 0x18: [io 0x2080-0x2087] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.615725] pci 0000:00:12.0: reg 0x1c: [io 0x2088-0x208b] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.615736] pci 0000:00:12.0: reg 0x20: [io 0x2060-0x207f] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.615748] pci 0000:00:12.0: reg 0x24: [mem 0xa123b000-0xa123b7ff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.615826] pci 0000:00:12.0: PME# supported from D3hot Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.618365] pci 0000:00:13.0: [8086:31da] type 01 class 0x060400 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.618499] pci 0000:00:13.0: PME# supported from D0 D3hot D3cold Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.620793] pci 0000:00:15.0: [8086:31a8] type 00 class 0x0c0330 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.620823] pci 0000:00:15.0: reg 0x10: [mem 0xa1200000-0xa120ffff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.620932] pci 0000:00:15.0: PME# supported from D3hot D3cold Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.623170] pci 0000:00:16.0: [8086:31ac] type 00 class 0x118000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.623208] pci 0000:00:16.0: reg 0x10: [mem 0xa121b000-0xa121bfff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.623225] pci 0000:00:16.0: reg 0x18: [mem 0xa121c000-0xa121cfff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.626772] pci 0000:00:16.1: [8086:31ae] type 00 class 0x118000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.626812] pci 0000:00:16.1: reg 0x10: [mem 0xa121d000-0xa121dfff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.626829] pci 0000:00:16.1: reg 0x18: [mem 0xa121e000-0xa121efff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.629105] pci 0000:00:16.2: [8086:31b0] type 00 class 0x118000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.629142] pci 0000:00:16.2: reg 0x10: [mem 0xa121f000-0xa121ffff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.629160] pci 0000:00:16.2: reg 0x18: [mem 0xa1220000-0xa1220fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.631387] pci 0000:00:16.3: [8086:31b2] type 00 class 0x118000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.631448] pci 0000:00:16.3: reg 0x10: [mem 0xa1221000-0xa1221fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.631466] pci 0000:00:16.3: reg 0x18: [mem 0xa1222000-0xa1222fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.633863] pci 0000:00:17.0: [8086:31b4] type 00 class 0x118000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.633901] pci 0000:00:17.0: reg 0x10: [mem 0xa1223000-0xa1223fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.633918] pci 0000:00:17.0: reg 0x18: [mem 0xa1224000-0xa1224fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.636137] pci 0000:00:17.1: [8086:31b6] type 00 class 0x118000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.636174] pci 0000:00:17.1: reg 0x10: [mem 0xa1225000-0xa1225fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.636192] pci 0000:00:17.1: reg 0x18: [mem 0xa1226000-0xa1226fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.638433] pci 0000:00:17.2: [8086:31b8] type 00 class 0x118000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.638467] pci 0000:00:17.2: reg 0x10: [mem 0xa1227000-0xa1227fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.638486] pci 0000:00:17.2: reg 0x18: [mem 0xa1228000-0xa1228fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.641004] pci 0000:00:17.3: [8086:31ba] type 00 class 0x118000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.641057] pci 0000:00:17.3: reg 0x10: [mem 0xa1229000-0xa1229fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.641075] pci 0000:00:17.3: reg 0x18: [mem 0xa122a000-0xa122afff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.643327] pci 0000:00:18.0: [8086:31bc] type 00 class 0x118000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.643362] pci 0000:00:18.0: reg 0x10: [mem 0xa122b000-0xa122bfff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.643399] pci 0000:00:18.0: reg 0x18: [mem 0xa122c000-0xa122cfff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.645639] pci 0000:00:18.1: [8086:31be] type 00 class 0x118000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.645678] pci 0000:00:18.1: reg 0x10: [mem 0xa122d000-0xa122dfff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.645696] pci 0000:00:18.1: reg 0x18: [mem 0xa122e000-0xa122efff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.647950] pci 0000:00:18.3: [8086:31ee] type 00 class 0x118000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.647986] pci 0000:00:18.3: reg 0x10: [mem 0xa122f000-0xa122ffff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.648000] pci 0000:00:18.3: reg 0x18: [mem 0xa1230000-0xa1230fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.650455] pci 0000:00:19.0: [8086:31c2] type 00 class 0x118000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.650492] pci 0000:00:19.0: reg 0x10: [mem 0xa1231000-0xa1231fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.650511] pci 0000:00:19.0: reg 0x18: [mem 0xa1232000-0xa1232fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.652769] pci 0000:00:19.1: [8086:31c4] type 00 class 0x118000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.652805] pci 0000:00:19.1: reg 0x10: [mem 0xa1233000-0xa1233fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.652822] pci 0000:00:19.1: reg 0x18: [mem 0xa1234000-0xa1234fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.655067] pci 0000:00:19.2: [8086:31c6] type 00 class 0x118000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.655105] pci 0000:00:19.2: reg 0x10: [mem 0xa1235000-0xa1235fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.655122] pci 0000:00:19.2: reg 0x18: [mem 0xa1236000-0xa1236fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.657628] pci 0000:00:1c.0: [8086:31cc] type 00 class 0x080501 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.657664] pci 0000:00:1c.0: reg 0x10: [mem 0xa1237000-0xa1237fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.657696] pci 0000:00:1c.0: reg 0x18: [mem 0xa1238000-0xa1238fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.660193] pci 0000:00:1e.0: [8086:31d0] type 00 class 0x080501 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.660232] pci 0000:00:1e.0: reg 0x10: [mem 0xa1239000-0xa1239fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.660251] pci 0000:00:1e.0: reg 0x18: [mem 0xa123a000-0xa123afff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.662499] pci 0000:00:1f.0: [8086:3197] type 00 class 0x060100 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.665027] pci 0000:00:1f.1: [8086:31d4] type 00 class 0x0c0500 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.665103] pci 0000:00:1f.1: reg 0x10: [mem 0xa123c000-0xa123c0ff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.665199] pci 0000:00:1f.1: reg 0x20: [io 0x2040-0x205f] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.667724] pci 0000:01:00.0: [10ec:8168] type 00 class 0x020000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.667761] pci 0000:01:00.0: reg 0x10: [io 0x1000-0x10ff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.667788] pci 0000:01:00.0: reg 0x18: [mem 0xa1104000-0xa1104fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.667823] pci 0000:01:00.0: reg 0x20: [mem 0xa1100000-0xa1103fff 64bit] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.667842] pci 0000:01:00.0: can't set Max Payload Size to 256; if necessary, use "pci=pcie_bus_safe" and report a bug Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.667994] pci 0000:01:00.0: supports D1 D2 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.667997] pci 0000:01:00.0: PME# supported from D0 D1 D2 D3hot D3cold Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.680253] pci 0000:00:13.0: PCI bridge to [bus 01] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.680260] pci 0000:00:13.0: bridge window [io 0x1000-0x1fff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.680265] pci 0000:00:13.0: bridge window [mem 0xa1100000-0xa11fffff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.774225] ACPI: PCI Interrupt Link [LNKA] (IRQs *3 4 5 6 10 11 12 14 15) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.775046] ACPI: PCI Interrupt Link [LNKB] (IRQs 3 *4 5 6 10 11 12 14 15) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.775858] ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 *5 6 10 11 12 14 15) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.776936] ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 5 *6 10 11 12 14 15) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.777750] ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 10 11 12 14 15) *7 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.778572] ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 10 11 12 14 15) *9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.779393] ACPI: PCI Interrupt Link [LNKG] (IRQs 3 4 5 6 *10 11 12 14 15) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.780220] ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 10 *11 12 14 15) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.793069] ACPI: EC: interrupt unblocked Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.793093] ACPI: EC: event unblocked Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.793122] ACPI: \_SB_.PCI0.LPCB.H_EC: GPE=0x25, EC_CMD/EC_SC=0x66, EC_DATA=0x62 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.793131] ACPI: \_SB_.PCI0.LPCB.H_EC: Used as boot DSDT EC to handle transactions and events Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.793877] pci 0000:00:02.0: vgaarb: setting as boot VGA device Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.793877] pci 0000:00:02.0: vgaarb: VGA device added: decodes=io+mem,owns=io+mem,locks=none Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.793877] pci 0000:00:02.0: vgaarb: bridge control possible Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.793877] vgaarb: loaded Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.793905] SCSI subsystem initialized Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.796072] libata version 3.00 loaded. Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.796244] ACPI: bus type USB registered Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.796386] usbcore: registered new interface driver usbfs Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.796459] usbcore: registered new interface driver hub Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.796544] usbcore: registered new device driver usb Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.796727] pps_core: LinuxPPS API ver. 1 registered Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.796729] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.796754] PTP clock support registered Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.796840] EDAC MC: Ver: 3.0.0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.796840] Registered efivars operations Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.807376] PCI: Using ACPI for IRQ routing Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.812177] PCI: pci_cache_line_size set to 64 bytes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.812403] e820: reserve RAM buffer [mem 0x00058000-0x0005ffff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.812414] e820: reserve RAM buffer [mem 0x0009e000-0x0009ffff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.812420] e820: reserve RAM buffer [mem 0x76baa000-0x77ffffff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.812426] e820: reserve RAM buffer [mem 0x7ac00000-0x7bffffff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.813300] NetLabel: Initializing Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.813302] NetLabel: domain hash size = 128 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.813303] NetLabel: protocols = UNLABELED CIPSOv4 CALIPSO Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.813416] NetLabel: unlabeled traffic allowed by default Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.816246] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0, 0, 0, 0, 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.816257] hpet0: 8 comparators, 64-bit 19.200000 MHz counter Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.818314] clocksource: Switched to clocksource tsc-early Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.922920] VFS: Disk quotas dquot_6.6.0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.923072] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.924142] AppArmor: AppArmor Filesystem Enabled Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.924310] pnp: PnP ACPI init Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.925463] system 00:00: [io 0x06a4] has been reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.925475] system 00:00: [io 0x06a0] has been reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.925498] system 00:00: Plug and Play ACPI device, IDs PNP0c02 (active) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.927964] pnp 00:01: disabling [io 0x164e-0x164f] because it overlaps 0000:00:13.0 BAR 13 [io 0x1000-0x1fff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.928203] system 00:01: [io 0x0680-0x069f] has been reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.928215] system 00:01: [io 0x0400-0x047f] has been reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.928226] system 00:01: [io 0x0500-0x05fe] has been reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.928237] system 00:01: [io 0x0600-0x061f] has been reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.928258] system 00:01: Plug and Play ACPI device, IDs PNP0c02 (active) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.928864] pnp 00:02: Plug and Play ACPI device, IDs PNP0303 (active) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.964809] system 00:03: [mem 0xe0000000-0xefffffff] could not be reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.964826] system 00:03: [mem 0xfea00000-0xfeafffff] has been reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.964838] system 00:03: [mem 0xfed01000-0xfed01fff] has been reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.964849] system 00:03: [mem 0xfed03000-0xfed03fff] has been reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.964865] system 00:03: [mem 0xfed06000-0xfed06fff] has been reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.964877] system 00:03: [mem 0xfed08000-0xfed09fff] has been reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.964888] system 00:03: [mem 0xfed80000-0xfedbffff] has been reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.964900] system 00:03: [mem 0xfed1c000-0xfed1cfff] has been reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.964912] system 00:03: [mem 0xfee00000-0xfeefffff] has been reserved Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.964932] system 00:03: Plug and Play ACPI device, IDs PNP0c02 (active) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.967762] pnp 00:04: Plug and Play ACPI device, IDs PNP0b00 (active) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.971486] pnp: PnP ACPI: found 5 devices Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.988259] clocksource: acpi_pm: mask: 0xffffff max_cycles: 0xffffff, max_idle_ns: 2085701024 ns Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.990339] pci 0000:00:13.0: PCI bridge to [bus 01] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.990346] pci 0000:00:13.0: bridge window [io 0x1000-0x1fff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.990354] pci 0000:00:13.0: bridge window [mem 0xa1100000-0xa11fffff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.990370] pci_bus 0000:00: resource 4 [io 0x0070-0x0077] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.990373] pci_bus 0000:00: resource 5 [io 0x0000-0x006f window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.990376] pci_bus 0000:00: resource 6 [io 0x0078-0x0cf7 window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.990379] pci_bus 0000:00: resource 7 [io 0x0d00-0xffff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.990382] pci_bus 0000:00: resource 8 [mem 0x000a0000-0x000bffff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.990385] pci_bus 0000:00: resource 9 [mem 0x000c0000-0x000dffff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.990388] pci_bus 0000:00: resource 10 [mem 0x000e0000-0x000fffff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.990391] pci_bus 0000:00: resource 11 [mem 0x7c000001-0x7fffffff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.990394] pci_bus 0000:00: resource 12 [mem 0x80000000-0xbfffffff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.990397] pci_bus 0000:00: resource 13 [mem 0xe0000000-0xefffffff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.990400] pci_bus 0000:00: resource 14 [mem 0xfea00000-0xfeafffff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.990403] pci_bus 0000:00: resource 15 [mem 0xfed00000-0xfed003ff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.990405] pci_bus 0000:00: resource 16 [mem 0xfed01000-0xfed01fff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.990408] pci_bus 0000:00: resource 17 [mem 0xfed03000-0xfed03fff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.990411] pci_bus 0000:00: resource 18 [mem 0xfed06000-0xfed06fff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.990413] pci_bus 0000:00: resource 19 [mem 0xfed08000-0xfed09fff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.990416] pci_bus 0000:00: resource 20 [mem 0xfed80000-0xfedbffff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.990418] pci_bus 0000:00: resource 21 [mem 0xfed1c000-0xfed1cfff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.990421] pci_bus 0000:00: resource 22 [mem 0xfee00000-0xfeefffff window] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.990424] pci_bus 0000:01: resource 0 [io 0x1000-0x1fff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.990427] pci_bus 0000:01: resource 1 [mem 0xa1100000-0xa11fffff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.992159] NET: Registered protocol family 2 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.993031] tcp_listen_portaddr_hash hash table entries: 4096 (order: 4, 65536 bytes) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.993122] TCP established hash table entries: 65536 (order: 7, 524288 bytes) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.993411] TCP bind hash table entries: 65536 (order: 8, 1048576 bytes) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.993707] TCP: Hash tables configured (established 65536 bind 65536) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.993891] UDP hash table entries: 4096 (order: 5, 131072 bytes) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.993967] UDP-Lite hash table entries: 4096 (order: 5, 131072 bytes) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.994330] NET: Registered protocol family 1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.994385] pci 0000:00:02.0: Video device with shadowed ROM at [mem 0x000c0000-0x000dffff] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.996709] PCI: CLS 64 bytes, default 64 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 1.996975] Trying to unpack rootfs image as initramfs... Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.679809] Freeing initrd memory: 41108K Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.679816] PCI-DMA: Using software bounce buffering for IO (SWIOTLB) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.679823] software IO TLB [mem 0x6ec00000-0x72c00000] (64MB) mapped at [000000003c2875e9-00000000e3d885e3] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.680115] clocksource: tsc: mask: 0xffffffffffffffff max_cycles: 0xfc66f4fc7c, max_idle_ns: 440795224246 ns Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.680144] clocksource: Switched to clocksource tsc Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.680485] Scanning for low memory corruption every 60 seconds Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.684347] Initialise system trusted keyrings Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.684396] Key type blacklist registered Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.684541] workingset: timestamp_bits=40 max_order=21 bucket_order=0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.699399] zbud: loaded Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.702943] squashfs: version 4.0 (2009/01/31) Phillip Lougher Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.704578] fuse init (API version 7.26) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.705633] Allocating IMA blacklist keyring. Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.709822] Key type asymmetric registered Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.709824] Asymmetric key parser 'x509' registered Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.710099] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 245) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.710217] io scheduler noop registered Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.710219] io scheduler deadline registered (default) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.710695] io scheduler cfq registered Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.710697] io scheduler mq-deadline registered (default) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.710699] io scheduler kyber registered Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.713087] pcieport 0000:00:13.0: Signaling PME with IRQ 120 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.713409] efifb: probing for efifb Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.713466] efifb: framebuffer at 0x90000000, using 9024k, total 9024k Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.713469] efifb: mode is 1920x1200x32, linelength=7680, pages=1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.713470] efifb: scrolling: redraw Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.713473] efifb: Truecolor: size=8:8:8:8, shift=24:16:8:0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.726231] Console: switching to colour frame buffer device 240x75 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.738206] fb0: EFI VGA frame buffer device Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.738288] intel_idle: MWAIT substates: 0x11242020 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.738290] intel_idle: v0.4.1 model 0x7A Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.740359] intel_idle: lapic_timer_reliable_states 0xffffffff Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.741006] ACPI: AC Adapter [ADP1] (on-line) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.741420] input: Lid Switch as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:01/PNP0C09:00/PNP0C0D:00/input/input0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.741473] ACPI: Lid Switch [LID0] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.741849] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.741896] ACPI: Power Button [PWRB] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.742224] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input2 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.742271] ACPI: Power Button [PWRF] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.784987] thermal LNXTHERM:00: registered as thermal_zone0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.784990] ACPI: Thermal Zone [TZ01] (35 C) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.785869] Serial: 8250/16550 driver, 32 ports, IRQ sharing enabled Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.786735] ACPI: Battery Slot [BAT0] (battery present) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.787071] ACPI: Battery Slot [BAT1] (battery absent) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.808034] serial8250: ttyS0 at I/O 0x3f8 (irq = 4, base_baud = 115200) is a 16550A Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.819352] Linux agpgart interface v0.103 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.819665] drm_mm: Testing DRM range manger (struct drm_mm), with random_seed=0xcb4ae998 max_iterations=8192 max_prime=128 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.819668] drm_mm: igt_sanitycheck - ok! Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.819677] igt_debug 0x0000000000000000-0x0000000000000200: 512: free Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.819680] igt_debug 0x0000000000000200-0x0000000000000600: 1024: used Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.819682] igt_debug 0x0000000000000600-0x0000000000000a00: 1024: free Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.819683] igt_debug 0x0000000000000a00-0x0000000000000e00: 1024: used Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.819685] igt_debug 0x0000000000000e00-0x0000000000001000: 512: free Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 3.819687] igt_debug total: 4096, used 2048 free 2048 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.553417] brd: module loaded Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.568668] loop: module loaded Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.571127] libphy: Fixed MDIO Bus: probed Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.571130] tun: Universal TUN/TAP device driver, 1.6 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.571426] PPP generic driver version 2.4.2 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.571707] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.571721] ehci-pci: EHCI PCI platform driver Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.571768] ehci-platform: EHCI generic platform driver Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.571834] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.571856] ohci-pci: OHCI PCI platform driver Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.571901] ohci-platform: OHCI generic platform driver Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.571937] uhci_hcd: USB Universal Host Controller Interface driver Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.573335] xhci_hcd 0000:00:15.0: xHCI Host Controller Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.573373] xhci_hcd 0000:00:15.0: new USB bus registered, assigned bus number 1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.574633] xhci_hcd 0000:00:15.0: hcc params 0x200077c1 hci version 0x100 quirks 0x00009810 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.574642] xhci_hcd 0000:00:15.0: cache line size of 64 is not supported Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.575446] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.575450] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.575453] usb usb1: Product: xHCI Host Controller Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.575456] usb usb1: Manufacturer: Linux 4.16.0-rc1-drm-tip-ww8-commit-337c900+ xhci-hcd Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.575458] usb usb1: SerialNumber: 0000:00:15.0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.576256] hub 1-0:1.0: USB hub found Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.576311] hub 1-0:1.0: 9 ports detected Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.595197] xhci_hcd 0000:00:15.0: xHCI Host Controller Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.595223] xhci_hcd 0000:00:15.0: new USB bus registered, assigned bus number 2 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.595521] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.595524] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.595527] usb usb2: Product: xHCI Host Controller Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.595529] usb usb2: Manufacturer: Linux 4.16.0-rc1-drm-tip-ww8-commit-337c900+ xhci-hcd Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.595532] usb usb2: SerialNumber: 0000:00:15.0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.596316] hub 2-0:1.0: USB hub found Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.596368] hub 2-0:1.0: 7 ports detected Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.610656] i8042: PNP: PS/2 Controller [PNP0303:PS2K] at 0x60,0x64 irq 1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.610658] i8042: PNP: PS/2 appears to have AUX port disabled, if this is incorrect please boot with i8042.nopnp Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.611077] i8042: Warning: Keylock active Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.611213] serio: i8042 KBD port at 0x60,0x64 irq 1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.611862] mousedev: PS/2 mouse device common for all mice Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.612985] rtc_cmos 00:04: RTC can wake from S4 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.613730] rtc_cmos 00:04: rtc core: registered rtc_cmos as rtc0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.613850] rtc_cmos 00:04: alarms up to one month, y3k, 242 bytes nvram, hpet irqs Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.613893] i2c /dev entries driver Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.614278] device-mapper: uevent: version 1.0.3 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.614797] device-mapper: ioctl: 4.37.0-ioctl (2017-09-20) initialised: dm-devel@redhat.com Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.614810] intel_pstate: Intel P-state driver initializing Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.615675] ledtrig-cpu: registered to indicate activity on CPUs Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.615680] EFI Variables Facility v0.08 2004-May-17 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.629432] NET: Registered protocol family 10 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.630108] Segment Routing with IPv6 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.630139] NET: Registered protocol family 17 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.630169] Key type dns_resolver registered Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.630990] microcode: sig=0x706a1, pf=0x1, revision=0x1e Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.631153] microcode: Microcode Update Driver: v2.2. Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.631178] sched_clock: Marking stable (76631140226, 0)->(76613984796, 17155430) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.631870] registered taskstats version 1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.631874] Loading compiled-in X.509 certificates Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.636028] Loaded X.509 cert 'Build time autogenerated kernel key: f10df8e7090fe7fefd592a53179a96b766013931' Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.636093] zswap: loaded using pool lzo/zbud Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.636500] kmemleak: Kernel memory leak detector initialized Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.636504] kmemleak: Automatic memory scanning thread started Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.641741] Key type big_key registered Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.644438] Key type trusted registered Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.647158] Key type encrypted registered Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.647163] AppArmor: AppArmor sha1 policy hashing enabled Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.647166] ima: No TPM chip found, activating TPM-bypass! (rc=-19) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.647238] evm: HMAC attrs: 0x1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.649947] Magic number: 6:30:766 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.650260] rtc_cmos 00:04: setting system clock to 2018-02-20 03:47:14 UTC (1519098434) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.650462] BIOS EDD facility v0.16 2004-Jun-25, 0 devices found Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.650462] EDD information not available. Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.840189] atkbd serio0: Failed to deactivate keyboard on isa0060/serio0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 76.928181] usb 1-5: new high-speed USB device number 2 using xhci_hcd Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.077134] usb 1-5: New USB device found, idVendor=0781, idProduct=5575 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.077137] usb 1-5: New USB device strings: Mfr=1, Product=2, SerialNumber=3 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.077138] usb 1-5: Product: Cruzer Glide Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.077139] usb 1-5: Manufacturer: SanDisk Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.077140] usb 1-5: SerialNumber: 20051740120EDF31B4DF Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.220193] atkbd serio0: Failed to enable keyboard on isa0060/serio0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.220478] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input3 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.226086] Freeing unused kernel memory: 2340K Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.226087] Write protecting the kernel read-only data: 18432k Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.226958] Freeing unused kernel memory: 2004K Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.227149] Freeing unused kernel memory: 16K Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.235642] x86/mm: Checked W+X mappings: passed, no W+X pages found. Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.235642] x86/mm: Checking user space page tables Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.243760] x86/mm: Checked W+X mappings: passed, no W+X pages found. Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.510151] hidraw: raw HID events driver (C) Jiri Kosina Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.517395] acpi PNP0C14:01: duplicate WMI GUID 05901221-D566-11D1-B2F0-00A0C9062910 (first instance was on PNP0C14:00) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.521186] r8169 Gigabit Ethernet driver 2.3LK-NAPI loaded Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.521254] r8169 0000:01:00.0: enabling device (0000 -> 0003) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.526278] ahci 0000:00:12.0: version 3.0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.533965] r8169 0000:01:00.0 eth0: RTL8168h/8111h at 0x00000000efe407d4, 90:49:fa:02:ac:bb, XID 14100800 IRQ 123 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.533968] r8169 0000:01:00.0 eth0: jumbo features [frames: 9200 bytes, tx checksumming: ko] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.537147] ahci 0000:00:12.0: AHCI 0001.0301 32 slots 1 ports 6 Gbps 0x1 impl SATA mode Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.537150] ahci 0000:00:12.0: flags: 64bit ncq sntf pm clo only pmp pio slum part deso sadm sds apst Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.542108] scsi host0: ahci Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.542492] ata1: SATA max UDMA/133 abar m2048@0xa123b000 port 0xa123b100 irq 122 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.562955] usb-storage 1-5:1.0: USB Mass Storage device detected Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.569284] scsi host1: usb-storage 1-5:1.0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.569611] usbcore: registered new interface driver usb-storage Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.571039] r8169 0000:01:00.0 enp1s0: renamed from eth0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.576830] usbcore: registered new interface driver uas Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.582024] [drm] GuC: No firmware known for this platform! Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.582026] [drm] HuC: No firmware known for this platform! Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.582250] [drm:i915_driver_load [i915]] No PCH found. Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.582296] [drm:intel_power_domains_init [i915]] Allowed DC state mask 09 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.583215] [drm:i915_driver_load [i915]] ppgtt mode: 3 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.583265] [drm:intel_uc_sanitize_options [i915]] enable_guc=0 (submission:no huc:no) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.583303] [drm:i915_driver_load [i915]] guc_log_level=0 (enabled:no verbosity:-1) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.583390] [drm:i915_ggtt_probe_hw [i915]] GGTT size = 4096M Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.583429] [drm:i915_ggtt_probe_hw [i915]] GMADR size = 256M Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.583468] [drm:i915_ggtt_probe_hw [i915]] DSM size = 64M Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.583475] checking generic (90000000 8d0000) vs hw (90000000 10000000) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.583476] fb: switching to inteldrmfb from EFI VGA Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.583541] Console: switching to colour dummy device 80x25 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.583712] [drm] Replacing VGA console driver Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.583794] [drm:i915_gem_init_stolen [i915]] Memory reserved for graphics device: 65536K, usable: 57344K Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.583847] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x799d3018 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.583909] [drm:intel_opregion_setup [i915]] Public ACPI methods supported Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.583952] [drm:intel_opregion_setup [i915]] ASLE supported Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.584008] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.584199] [drm:intel_gvt_init [i915]] GVT-g is disabled by kernel params Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.584204] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.584204] [drm] Driver supports precise vblank timestamp query. Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.584249] [drm:intel_bios_init [i915]] Set default to SSC at 100000 kHz Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.584292] [drm:intel_bios_init [i915]] VBT signature "$VBT GEMINILAKE ", BDB version 212 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.584335] [drm:intel_bios_init [i915]] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 0 lvds_use_ssc 0 lvds_ssc_freq 120000 display_clock_mode 0 fdi_rx_polarity_inverted 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.584377] [drm:intel_bios_init [i915]] crt_ddc_bus_pin: 2 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.584427] [drm:intel_opregion_get_panel_type [i915]] Failed to get panel details from OpRegion (-19) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.584469] [drm:intel_bios_init [i915]] Panel type: 2 (VBT) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.584510] [drm:intel_bios_init [i915]] DRRS supported mode is seamless Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.584555] [drm:intel_bios_init [i915]] Found panel mode in BIOS VBT tables: Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.584562] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 0 65000 1024 1048 1184 1344 768 771 777 806 0x8 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.584602] [drm:intel_bios_init [i915]] VBT initial LVDS value 300 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.584644] [drm:intel_bios_init [i915]] VBT backlight PWM modulation frequency 200 Hz, active high, min brightness 0, level 180, controller 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.584685] [drm:intel_bios_init [i915]] DRRS State Enabled:1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.584731] [drm:intel_bios_init [i915]] Skipping SDVO device mapping Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.584774] [drm:intel_bios_init [i915]] Port A VBT info: DP:1 HDMI:0 DVI:0 EDP:1 CRT:0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.584814] [drm:intel_bios_init [i915]] VBT HDMI level shift for port A: 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.584854] [drm:intel_bios_init [i915]] Port B VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.584893] [drm:intel_bios_init [i915]] VBT HDMI level shift for port B: 8 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.584933] [drm:intel_bios_init [i915]] Port C VBT info: DP:0 HDMI:1 DVI:1 EDP:0 CRT:0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.584972] [drm:intel_bios_init [i915]] VBT HDMI level shift for port C: 8 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.585212] [drm:intel_dsm_detect [i915]] no _DSM method for intel device Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.585265] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.585306] [drm:intel_power_well_enable [i915]] enabling power well 1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.585356] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.585407] [drm:intel_power_well_enable [i915]] enabling always-on Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.585447] [drm:intel_power_well_enable [i915]] enabling DC off Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.585487] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.585527] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.585536] i915 0000:00:02.0: vgaarb: changed VGA decodes: olddecodes=io+mem,decodes=io+mem:owns=io+mem Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.585576] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.585722] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.585783] [drm:intel_power_well_enable [i915]] DDI PHY 0 already enabled, won't reprogram it Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.585819] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.585983] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.586020] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.586056] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.586131] [drm:intel_csr_ucode_init [i915]] Loading i915/glk_dmc_ver1_04.bin Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.586397] [drm] Finished loading DMC firmware i915/glk_dmc_ver1_04.bin (v1.4) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.586498] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.587487] [drm:intel_fbc_init [i915]] Sanitized enable_fbc value: 1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.587544] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM0 latency 7 (7.0 usec) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.587581] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM1 latency 7 (7.0 usec) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.587618] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM2 latency 8 (8.0 usec) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.587654] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM3 latency 22 (22.0 usec) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.587690] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM4 latency 22 (22.0 usec) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.587726] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM5 latency 22 (22.0 usec) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.587761] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM6 latency 22 (22.0 usec) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.587797] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM7 latency 22 (22.0 usec) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.587843] [drm:intel_modeset_init [i915]] 3 display pipes available. Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.588379] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.588427] [drm:intel_update_max_cdclk [i915]] Max CD clock rate: 316800 kHz Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.588469] [drm:intel_modeset_init [i915]] Max dotclock rate: 627264 kHz Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.588830] [drm:intel_ddi_init [i915]] Forcing DDI_A_4_LANES for port A Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.588884] [drm:intel_dp_init_connector [i915]] Adding eDP connector on port A Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.588932] [drm:intel_dp_init_connector [i915]] using AUX A for port A (VBT) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.588988] [drm:intel_pps_dump_state [i915]] cur t1_t3 0 t8 0 t9 0 t10 500 t11_t12 6000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.589029] [drm:intel_pps_dump_state [i915]] vbt t1_t3 2000 t8 10 t9 2000 t10 500 t11_t12 6000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.589071] [drm:intel_dp_init_panel_power_sequencer [i915]] panel power up delay 200, power down delay 50, power cycle delay 600 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.589111] [drm:intel_dp_init_panel_power_sequencer [i915]] backlight on delay 1, off delay 200 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.589159] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.589202] [drm:intel_edp_panel_vdd_sanitize [i915]] VDD left on by BIOS, adjusting state tracking Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.589632] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 82 41 00 00 01 80 02 00 00 00 0f 0b 00 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.590007] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.590321] [drm:intel_dp_init_connector [i915]] Detected EDP PSR Panel. Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.590659] [drm:intel_dp_init_connector [i915]] eDP DPCD: 02 fb e7 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.593766] [drm:drm_add_edid_modes] ELD: no CEA Extension found Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.593768] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.593792] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.593863] [drm:intel_dp_init_connector [i915]] Downclock mode is not found. DRRS not supported Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.593909] [drm:get_backlight_max_vbt [i915]] VBT defined backlight frequency 200 Hz Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.593952] [drm:intel_panel_setup_backlight [i915]] Connector eDP-1 backlight initialized, disabled, brightness 0/96000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.594045] [drm:intel_ddi_init [i915]] Forcing DDI_A_4_LANES for port A Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.594095] [drm:intel_dp_init_connector [i915]] Adding DP connector on port B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.594142] [drm:intel_dp_init_connector [i915]] using AUX B for port B (VBT) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.594256] [drm:intel_hdmi_init_connector [i915]] Adding HDMI connector on port B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.594300] [drm:intel_hdmi_init_connector [i915]] Using DDC pin 0x1 for port B (VBT) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.594375] [drm:intel_ddi_init [i915]] Forcing DDI_A_4_LANES for port A Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.594427] [drm:intel_hdmi_init_connector [i915]] Adding HDMI connector on port C Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.594470] [drm:intel_hdmi_init_connector [i915]] Using DDC pin 0x2 for port C (VBT) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.594525] [drm:intel_dsi_init [i915]] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.594604] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.594647] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.594690] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.594731] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.594773] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.594819] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:43:pipe A] hw state readout: enabled Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.594863] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.594904] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.594945] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.594985] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.595026] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.595066] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:59:pipe B] hw state readout: disabled Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.595110] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.595151] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.595191] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.595231] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.595271] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.595311] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:75:pipe C] hw state readout: disabled Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.595356] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL A hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.595411] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL B hw state readout: crtc_mask 0x00000001, on 1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.595451] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.595493] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:76:DDI A] hw state readout: disabled, pipe A Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.595544] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:83:DDI B] hw state readout: enabled, pipe A Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.595587] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:85:DP-MST A] hw state readout: disabled, pipe A Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.595626] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:86:DP-MST B] hw state readout: disabled, pipe B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.595665] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:87:DP-MST C] hw state readout: disabled, pipe C Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.595705] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:93:DDI C] hw state readout: disabled, pipe A Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.595751] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:77:eDP-1] hw state readout: disabled Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.595792] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:84:DP-1] hw state readout: enabled Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.595833] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:90:HDMI-A-1] hw state readout: disabled Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.595873] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:94:HDMI-A-2] hw state readout: disabled Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.595882] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1200] for CRTC state 00000000baf20d21 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.595928] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.595981] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][setup_hw_state] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596022] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596069] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 24, dithering: 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596109] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 3588460, gmch_n: 8388608, link_m: 299038, link_n: 524288, tu: 64 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596149] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596188] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596194] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 153999 1920 1968 2000 2080 1200 1203 1209 1235 0x40 0x9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596233] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596235] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 153999 1920 1968 2000 2080 1200 1203 1209 1235 0x40 0x9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596275] [drm:intel_dump_pipe_config [i915]] crtc timings: 153999 1920 1968 2000 2080 1200 1203 1209 1235, type: 0x40 flags: 0x9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596315] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1200, pixel rate 153999 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596356] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596398] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596436] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596483] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596522] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596560] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596602] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596640] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596678] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596717] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596755] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][setup_hw_state] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596793] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596831] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596869] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596907] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596910] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596947] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596950] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.596988] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597029] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597067] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597105] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597143] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597183] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597221] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597260] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597297] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597335] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597373] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597411] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597449] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][setup_hw_state] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597487] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597525] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597562] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597600] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597602] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597639] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597642] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597680] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597717] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597755] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597792] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597830] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597870] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597908] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597945] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.597983] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.598021] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.598058] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.598096] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.598187] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.598227] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.598266] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.598342] [drm:skylake_get_initial_plane_config [i915]] pipe A/plane 1A with fb: size=1920x1200@32, offset=0, pitch 7680, size 0x8ca000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.598387] [drm:i915_gem_object_create_stolen_for_preallocated [i915]] creating preallocated stolen object: stolen_offset=0x0000000000000000, gtt_offset=0x0000000000000000, size=0x00000000008ca000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.598432] [drm:i915_gem_object_create_stolen_for_preallocated [i915]] failed to allocate stolen space Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.598475] [drm:intel_plane_disable_noatomic [i915]] pipe A active planes 0x0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.598874] [drm:i915_gem_init_ggtt [i915]] clearing unused GTT space: [1000, 100000000] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.599004] [drm:i915_gem_contexts_init [i915]] logical context support initialized Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.599084] [drm:intel_engine_create_scratch [i915]] rcs0 pipe control offset: 0xfffff000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.599471] [drm:intel_engine_init_common [i915]] rcs0 hws offset: 0x00003000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.599711] [drm:intel_engine_init_common [i915]] bcs0 hws offset: 0x00006000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.599935] [drm:intel_engine_init_common [i915]] vcs0 hws offset: 0x00009000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.600263] [drm:intel_engine_init_common [i915]] vecs0 hws offset: 0x0000c000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.600312] [drm:intel_init_gt_powersave [i915]] BIOS enabled RC states: HW_CTRL off HW_RC6 off SW_TARGET_STATE 4 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.600502] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 11 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.601372] [drm:intel_fbdev_init [i915]] pipe A not active or no fb, skipping Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.601415] [drm:intel_fbdev_init [i915]] pipe B not active or no fb, skipping Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.601455] [drm:intel_fbdev_init [i915]] pipe C not active or no fb, skipping Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.601497] [drm:intel_fbdev_init [i915]] no active fbs found, not using BIOS config Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.601569] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.602852] [drm:intel_backlight_device_register [i915]] Connector eDP-1 backlight sysfs interface registered Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.602909] [drm:intel_dp_connector_register [i915]] registering DPDDC-A bus for card0-eDP-1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.603428] [drm:intel_dp_connector_register [i915]] registering DPDDC-B bus for card0-DP-1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.603973] [drm] Initialized i915 1.6.0 20180214 for 0000:00:02.0 on minor 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.604574] [drm:intel_opregion_register [i915]] 4 outputs detected Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.609905] ACPI: Video Device [GFX0] (multi-head: yes rom: no post: no) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611071] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:00/input/input4 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611386] i915 device info: pciid=0x3184 rev=0x03 platform=GEMINILAKE gen=9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611388] i915 device info: is_mobile: no Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611388] i915 device info: is_lp: yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611389] i915 device info: is_alpha_support: no Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611390] i915 device info: has_64bit_reloc: yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611390] i915 device info: has_aliasing_ppgtt: yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611391] i915 device info: has_csr: yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611392] i915 device info: has_ddi: yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611393] i915 device info: has_dp_mst: yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611393] i915 device info: has_reset_engine: yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611394] i915 device info: has_fbc: yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611395] i915 device info: has_fpga_dbg: yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611395] i915 device info: has_full_ppgtt: yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611396] i915 device info: has_full_48bit_ppgtt: yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611397] i915 device info: has_gmch_display: no Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611397] i915 device info: has_guc: yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611398] i915 device info: has_guc_ct: no Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611399] i915 device info: has_hotplug: yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611399] i915 device info: has_l3_dpf: no Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611400] i915 device info: has_llc: no Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611400] i915 device info: has_logical_ring_contexts: yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611401] i915 device info: has_logical_ring_preemption: yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611402] i915 device info: has_overlay: no Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611402] i915 device info: has_pooled_eu: yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611403] i915 device info: has_psr: yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611404] i915 device info: has_rc6: yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611404] i915 device info: has_rc6p: no Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611405] i915 device info: has_resource_streamer: yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611406] i915 device info: has_runtime_pm: yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611406] i915 device info: has_snoop: yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611407] i915 device info: unfenced_needs_alignment: no Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611408] i915 device info: cursor_needs_physical: no Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611408] i915 device info: hws_needs_physical: no Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611409] i915 device info: overlay_needs_physical: no Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611410] i915 device info: supports_tv: no Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611410] i915 device info: has_ipc: yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611411] i915 device info: slice mask: 0001 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611412] i915 device info: slice total: 1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611412] i915 device info: subslice total: 3 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611413] i915 device info: subslice mask 0007 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611414] i915 device info: subslice per slice: 3 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611419] [drm:drm_setup_crtcs] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611420] i915 device info: EU total: 18 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611421] i915 device info: EU per subslice: 6 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611422] i915 device info: has slice power gating: no Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611422] i915 device info: has subslice power gating: yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611423] i915 device info: has EU power gating: yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611424] i915 device info: CS timestamp frequency: 19200 kHz Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611438] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:77:eDP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611502] [drm:intel_dp_detect [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611549] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611590] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611629] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.611993] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.612570] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:77:eDP-1] status updated from unknown to connected Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.612577] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.612588] [drm:drm_add_edid_modes] ELD: no CEA Extension found Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.612589] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.612616] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:77:eDP-1] probed modes : Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.612619] [drm:drm_mode_debug_printmodeline] Modeline 78:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.612621] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:84:DP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.612664] [drm:intel_dp_detect [i915]] [CONNECTOR:84:DP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.612708] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.613135] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 00 02 02 06 05 00 00 00 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.613443] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.613480] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.613517] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.613877] [drm:drm_dp_read_desc] DP sink: OUI 00-00-00 dev-ID HW-rev 0.0 SW-rev 0.0 quirks 0x0000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.613914] [drm:intel_dp_detect [i915]] Sink is not MST capable Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.617683] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.617690] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:84:DP-1] status updated from unknown to connected Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.617694] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.617700] [drm:drm_add_edid_modes] ELD: no CEA Extension found Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.617701] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.617794] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:84:DP-1] probed modes : Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.617797] [drm:drm_mode_debug_printmodeline] Modeline 98:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.617799] [drm:drm_mode_debug_printmodeline] Modeline 102:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.617801] [drm:drm_mode_debug_printmodeline] Modeline 105:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.617803] [drm:drm_mode_debug_printmodeline] Modeline 99:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.617806] [drm:drm_mode_debug_printmodeline] Modeline 103:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.617808] [drm:drm_mode_debug_printmodeline] Modeline 106:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.617810] [drm:drm_mode_debug_printmodeline] Modeline 100:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.617812] [drm:drm_mode_debug_printmodeline] Modeline 101:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.617814] [drm:drm_mode_debug_printmodeline] Modeline 104:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.617816] [drm:drm_mode_debug_printmodeline] Modeline 109:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.617818] [drm:drm_mode_debug_printmodeline] Modeline 107:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.617820] [drm:drm_mode_debug_printmodeline] Modeline 108:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.617822] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:90:HDMI-A-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.617862] [drm:intel_hdmi_detect [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.618065] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.618103] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.618296] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.618301] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.618341] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.618378] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.618932] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.618969] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.619164] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.619200] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.619391] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.619398] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.619400] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:90:HDMI-A-1] status updated from unknown to disconnected Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.619401] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:90:HDMI-A-1] disconnected Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.619403] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:94:HDMI-A-2] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.619439] [drm:intel_hdmi_detect [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.645892] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.645935] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646131] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646141] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646145] [drm:drm_detect_monitor_audio] Monitor has basic audio support Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646150] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:94:HDMI-A-2] status updated from unknown to connected Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646153] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646155] [drm:drm_add_display_info] HDMI: DVI dual 0, max TMDS clock 225000 kHz Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646185] [drm:drm_add_edid_modes] ELD monitor DELL U2713HM Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646188] [drm:drm_add_edid_modes] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646189] [drm:drm_add_edid_modes] ELD size 36, SAD count 1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646190] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646192] [drm:drm_add_display_info] HDMI: DVI dual 0, max TMDS clock 225000 kHz Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646596] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:94:HDMI-A-2] probed modes : Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646599] [drm:drm_mode_debug_printmodeline] Modeline 111:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646602] [drm:drm_mode_debug_printmodeline] Modeline 129:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646604] [drm:drm_mode_debug_printmodeline] Modeline 149:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646606] [drm:drm_mode_debug_printmodeline] Modeline 113:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646608] [drm:drm_mode_debug_printmodeline] Modeline 145:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646610] [drm:drm_mode_debug_printmodeline] Modeline 143:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646612] [drm:drm_mode_debug_printmodeline] Modeline 142:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646614] [drm:drm_mode_debug_printmodeline] Modeline 144:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646616] [drm:drm_mode_debug_printmodeline] Modeline 157:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646618] [drm:drm_mode_debug_printmodeline] Modeline 119:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646620] [drm:drm_mode_debug_printmodeline] Modeline 117:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646622] [drm:drm_mode_debug_printmodeline] Modeline 125:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646624] [drm:drm_mode_debug_printmodeline] Modeline 120:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646626] [drm:drm_mode_debug_printmodeline] Modeline 116:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646628] [drm:drm_mode_debug_printmodeline] Modeline 118:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646630] [drm:drm_mode_debug_printmodeline] Modeline 114:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646632] [drm:drm_mode_debug_printmodeline] Modeline 146:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646634] [drm:drm_mode_debug_printmodeline] Modeline 141:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646636] [drm:drm_mode_debug_printmodeline] Modeline 126:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646638] [drm:drm_mode_debug_printmodeline] Modeline 127:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646640] [drm:drm_mode_debug_printmodeline] Modeline 128:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646642] [drm:drm_mode_debug_printmodeline] Modeline 121:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646644] [drm:drm_mode_debug_printmodeline] Modeline 138:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646646] [drm:drm_mode_debug_printmodeline] Modeline 135:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646648] [drm:drm_mode_debug_printmodeline] Modeline 147:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646650] [drm:drm_mode_debug_printmodeline] Modeline 115:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646652] [drm:drm_mode_debug_printmodeline] Modeline 154:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646654] [drm:drm_mode_debug_printmodeline] Modeline 134:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646656] [drm:drm_mode_debug_printmodeline] Modeline 122:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646658] [drm:drm_mode_debug_printmodeline] Modeline 148:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646660] [drm:drm_mode_debug_printmodeline] Modeline 123:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646662] [drm:drm_mode_debug_printmodeline] Modeline 124:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646665] [drm:drm_setup_crtcs] connector 77 enabled? yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646667] [drm:drm_setup_crtcs] connector 84 enabled? yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646669] [drm:drm_setup_crtcs] connector 90 enabled? no Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646670] [drm:drm_setup_crtcs] connector 94 enabled? yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646730] [drm:intel_fb_initial_config [i915]] Not using firmware configuration Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646733] [drm:drm_setup_crtcs] looking for cmdline mode on connector 77 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646734] [drm:drm_setup_crtcs] looking for preferred mode on connector 77 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646735] [drm:drm_setup_crtcs] found mode 1920x1080 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646736] [drm:drm_setup_crtcs] looking for cmdline mode on connector 84 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646738] [drm:drm_setup_crtcs] looking for preferred mode on connector 84 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646739] [drm:drm_setup_crtcs] found mode 1920x1200 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646740] [drm:drm_setup_crtcs] looking for cmdline mode on connector 94 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646741] [drm:drm_setup_crtcs] looking for preferred mode on connector 94 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646742] [drm:drm_setup_crtcs] found mode 1920x1080 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646743] [drm:drm_setup_crtcs] picking CRTCs for 8192x8192 config Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646786] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 43 (0,0) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646790] [drm:drm_setup_crtcs] desired mode 1920x1200 set on crtc 59 (0,0) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646793] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 75 (0,0) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.646845] [drm:intelfb_create [i915]] no BIOS fb, allocating a new one Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.649534] [drm:intelfb_create [i915]] allocated 1920x1200 fb: 0x00040000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.649807] fbcon: inteldrmfb (fb0) is primary device Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650008] [drm:drm_atomic_state_init] Allocated atomic state 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650014] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 0000000027fe1add state to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650019] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 00000000376cc073 state to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650021] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000376cc073 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650022] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000376cc073 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650026] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 00000000a536a9d2 state to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650027] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000a536a9d2 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650028] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000a536a9d2 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650033] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 00000000227bfdf9 state to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650034] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000227bfdf9 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650035] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000227bfdf9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650039] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 0000000093e25ec3 state to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650040] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000093e25ec3 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650040] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000093e25ec3 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650044] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 00000000c08e1955 state to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650048] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 0000000067e81408 state to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650049] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000067e81408 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650049] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000067e81408 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650053] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 0000000046f03dfd state to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650054] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000046f03dfd to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650055] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000046f03dfd Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650059] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 000000006f0fabca state to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650060] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000006f0fabca to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650061] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000006f0fabca Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650064] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000e28ec503 state to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650065] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000e28ec503 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650066] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000e28ec503 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650069] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 00000000fe2c79c8 state to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650073] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 000000006e4f63c5 state to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650074] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000006e4f63c5 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650075] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000006e4f63c5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650079] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 000000007b82fb18 state to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650079] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000007b82fb18 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650080] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000007b82fb18 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650085] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 0000000060dd6522 state to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650085] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000060dd6522 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650086] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000060dd6522 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650090] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 000000009c32ac85 state to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650091] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000009c32ac85 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650092] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000009c32ac85 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650098] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000ef0c3392 state to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650103] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 00000000ef0c3392 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650105] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000027fe1add to [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650106] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 0000000027fe1add Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650107] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650115] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 00000000ed8ff304 state to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650117] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000ed8ff304 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650121] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 00000000c2a490d5 state to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650122] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000c2a490d5 to [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650128] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000d712504d state to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650133] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1200] for CRTC state 00000000d712504d Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650134] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000c08e1955 to [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650135] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 00000000c08e1955 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650136] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650138] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000ed8ff304 to [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650144] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 0000000057f46293 state to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650148] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 0000000057f46293 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650149] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000fe2c79c8 to [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650150] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 00000000fe2c79c8 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650151] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650156] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 00000000c56beb28 state to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650157] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000c56beb28 to [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650159] [drm:drm_atomic_check_only] checking 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650162] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] mode changed Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650163] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] mode changed Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650165] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] enable changed Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650166] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] active changed Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650167] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] mode changed Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650168] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] enable changed Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650170] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] active changed Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650172] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650175] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:77:eDP-1] using [ENCODER:76:DDI A] on [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650177] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650178] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:84:DP-1] keeps [ENCODER:83:DDI B], now on [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650180] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650181] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:94:HDMI-A-2] using [ENCODER:93:DDI C] on [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650183] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: y, active: y Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650184] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650186] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: y, active: y Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650188] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650189] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: y, active: y Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650191] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650193] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650239] [drm:intel_atomic_check [i915]] [CONNECTOR:77:eDP-1] checking for sink bpp constrains Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650282] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650286] [drm:drm_mode_debug_printmodeline] Modeline 80:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650329] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 141000KHz Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650375] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650415] [drm:intel_dp_compute_config [i915]] DP link bw required 423000 available 540000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650456] [drm:intel_dp_compute_config [i915]] PSR disable by flag Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650504] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650549] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][modeset] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650591] [drm:intel_dump_pipe_config [i915]] output_types: EDP (0x100) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650637] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650677] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6571076, gmch_n: 8388608, link_m: 273794, link_n: 524288, tu: 64 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650717] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650756] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650759] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650798] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650800] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650840] [drm:intel_dump_pipe_config [i915]] crtc timings: 141000 1920 1936 1952 2104 1080 1083 1097 1116, type: 0x48 flags: 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650879] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 141000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650921] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650960] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.650998] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651045] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651084] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651123] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651162] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651200] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651238] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651277] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651281] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651323] [drm:intel_atomic_check [i915]] [CONNECTOR:84:DP-1] checking for sink bpp constrains Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651362] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651404] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 154000KHz Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651449] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651488] [drm:intel_dp_compute_config [i915]] DP link bw required 462000 available 648000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651526] [drm:intel_dp_compute_config [i915]] PSR disable by flag Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651566] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651605] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][modeset] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651643] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651682] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 24, dithering: 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651720] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5980766, gmch_n: 8388608, link_m: 249198, link_n: 262144, tu: 64 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651758] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651795] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651798] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651835] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651837] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651876] [drm:intel_dump_pipe_config [i915]] crtc timings: 154000 1920 1968 2000 2080 1200 1203 1209 1235, type: 0x48 flags: 0x9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651914] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1200, pixel rate 154000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651951] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.651989] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652026] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652075] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652112] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652150] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652188] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652225] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652263] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652300] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652302] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652343] [drm:intel_atomic_check [i915]] [CONNECTOR:94:HDMI-A-2] checking for sink bpp constrains Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652400] [drm:intel_hdmi_compute_config [i915]] picking bpc to 12 for HDMI output Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652439] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 36 for HDMI Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652478] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 36, dithering: 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652516] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][modeset] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652554] [drm:intel_dump_pipe_config [i915]] output_types: HDMI (0x40) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652592] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 36, dithering: 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652629] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652666] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652668] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652705] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652707] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652745] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1082 1087 1125, type: 0x48 flags: 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652783] [drm:intel_dump_pipe_config [i915]] port clock: 222750, pipe src size: 1920x1080, pixel rate 148500 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652820] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652856] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652893] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652933] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.652970] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653007] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653044] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653081] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653117] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653154] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653198] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653238] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 13, actual 13 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653287] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653325] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653363] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653401] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653438] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:60:plane 1C] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653476] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:60:plane 1C] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653518] [drm:bxt_get_dpll [i915]] [CRTC:43:pipe A] using pre-allocated PORT PLL A Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653558] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe A Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653601] [drm:bxt_get_dpll [i915]] [CRTC:59:pipe B] using pre-allocated PORT PLL B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653638] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653682] [drm:bxt_get_dpll [i915]] [CRTC:75:pipe C] using pre-allocated PORT PLL C Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653720] [drm:intel_reference_shared_dpll [i915]] using PORT PLL C for pipe C Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653771] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 510) -> (0 - 332) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653810] [drm:skl_compute_wm [i915]] [PLANE:40:cursor A] ddb (0 - 0) -> (332 - 340) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653848] [drm:skl_compute_wm [i915]] [PLANE:44:plane 1B] ddb (510 - 1020) -> (340 - 672) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653886] [drm:skl_compute_wm [i915]] [PLANE:56:cursor B] ddb (0 - 0) -> (672 - 680) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653923] [drm:skl_compute_wm [i915]] [PLANE:60:plane 1C] ddb (0 - 0) -> (680 - 1012) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653960] [drm:skl_compute_wm [i915]] [PLANE:72:cursor C] ddb (0 - 0) -> (1012 - 1020) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.653962] [drm:drm_atomic_commit] committing 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.654048] [drm:intel_disable_pipe [i915]] disabling pipe A Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.662699] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.662896] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.662935] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.663008] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 1, on? 1) for crtc 43 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.663074] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.663113] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.663294] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.663334] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.663375] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.663413] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.663454] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.663491] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.663531] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.663573] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.663611] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.663670] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 1, on? 0) for crtc 43 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.663708] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.663844] [drm:edp_panel_on [i915]] Turn eDP port A panel power on Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 77.663887] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.016263] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.018007] ata1.00: ATA-9: INTEL SSDSC2CW120A3, 400i, max UDMA/133 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.018010] ata1.00: 234441648 sectors, multi 16: LBA48 NCQ (depth 31/32), AA Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.027987] ata1.00: configured for UDMA/133 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.028665] scsi 0:0:0:0: Direct-Access ATA INTEL SSDSC2CW12 400i PQ: 0 ANSI: 5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.029715] sd 0:0:0:0: Attached scsi generic sg0 type 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.029856] sd 0:0:0:0: [sda] 234441648 512-byte logical blocks: (120 GB/112 GiB) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.029936] sd 0:0:0:0: [sda] Write Protect is off Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.029938] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.030032] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.031576] sda: sda1 sda2 sda3 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.032452] sd 0:0:0:0: [sda] Attached SCSI disk Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.208334] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 0000006a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.208379] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.208419] [drm:edp_panel_on [i915]] Wait for panel power on Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.208457] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 0000006b Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.409322] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.409371] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.410497] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.410536] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.410579] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.411199] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.411234] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.411819] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.411858] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.412764] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.412803] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:77:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.413115] [drm:intel_enable_pipe [i915]] enabling pipe A Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.413167] [drm:intel_edp_backlight_on [i915]] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.413209] [drm:intel_panel_enable_backlight [i915]] pipe A Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.413251] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 96000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.420160] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.420257] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.420294] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.430010] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 2, on? 0) for crtc 59 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.430075] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.430220] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.430270] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.430461] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.431095] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.431293] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.431329] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.431508] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.431557] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.431595] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.431633] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.431672] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.431876] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.432013] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.432204] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.432240] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.432451] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.432491] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.432529] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.432568] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.432787] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.433220] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.433409] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.433444] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.433655] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.433695] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.434053] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.434091] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.434277] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.434426] [drm:intel_enable_pipe [i915]] enabling pipe B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.434495] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.434563] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL C (active 4, on? 0) for crtc 75 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.434601] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL C Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.434726] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.434907] [drm:intel_enable_pipe [i915]] enabling pipe C Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.435362] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:94:HDMI-A-2], [ENCODER:93:DDI C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.435402] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe C, 36 bytes ELD Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.435444] [drm:audio_config_hdmi_pixel_clock [i915]] Configuring HDMI audio for pixel clock 148500 (0x00090000) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.435483] [drm:hsw_audio_config_update [i915]] using automatic N Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.452376] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.452447] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.452516] [drm:intel_ddi_get_config [i915]] pipe has 24 bpp for eDP panel, overriding BIOS-provided max 18 bpp Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.452567] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.452640] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.452680] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.452746] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.452817] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.452856] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.452920] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.452958] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.452998] [drm:__drm_atomic_state_free] Freeing atomic state 00000000e12dc717 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453016] Console: switching to colour frame buffer device 240x67 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453078] [drm:drm_atomic_state_init] Allocated atomic state 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453084] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 00000000d30d2087 state to 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453092] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000459e359d state to 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453095] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 00000000c2ba9554 state to 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453097] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000c2ba9554 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453098] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000c2ba9554 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453101] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 0000000029219b18 state to 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453102] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000029219b18 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453103] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000029219b18 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453107] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 000000004b748766 state to 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453108] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000004b748766 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453109] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000004b748766 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453112] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 00000000cada050c state to 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453113] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000cada050c to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453114] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000cada050c Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453117] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 00000000c089859b state to 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453121] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000c84421b2 state to 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453124] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 00000000678a856b state to 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453125] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000678a856b to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453126] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000678a856b Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453129] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 000000003145be17 state to 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453130] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000003145be17 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453130] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000003145be17 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453134] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 00000000e68fadd4 state to 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453134] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000e68fadd4 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453135] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000e68fadd4 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453139] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000ac52e12b state to 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453140] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000ac52e12b to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453141] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000ac52e12b Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453144] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 000000000ccc44de state to 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453148] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000003b82e97e state to 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453151] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 00000000e80b8e93 state to 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453152] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000e80b8e93 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453153] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000e80b8e93 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453156] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 0000000089d9919b state to 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453157] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000089d9919b to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453158] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000089d9919b Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453161] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 000000006231feca state to 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453162] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000006231feca to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453163] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000006231feca Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453166] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 000000008588cc43 state to 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453167] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000008588cc43 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453167] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000008588cc43 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453174] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 00000000459e359d Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453175] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000d30d2087 to [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453177] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 00000000d30d2087 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453179] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453187] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 00000000bf3b0671 state to 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453189] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000bf3b0671 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453190] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000bf3b0671 to [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453195] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1200] for CRTC state 00000000c84421b2 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453196] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000c089859b to [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453197] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 00000000c089859b Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453198] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453202] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 00000000f799b3e3 state to 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453203] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000f799b3e3 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453204] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000f799b3e3 to [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453208] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 000000003b82e97e Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453209] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000000ccc44de to [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453210] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 000000000ccc44de Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453211] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453215] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 00000000477274bb state to 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453216] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000477274bb to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453217] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000477274bb to [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453219] [drm:drm_atomic_check_only] checking 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453225] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453228] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:77:eDP-1] keeps [ENCODER:76:DDI A], now on [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453229] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453231] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:84:DP-1] keeps [ENCODER:83:DDI B], now on [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453232] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453234] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:94:HDMI-A-2] keeps [ENCODER:93:DDI C], now on [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453278] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453316] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453354] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453391] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453428] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:60:plane 1C] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453465] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:60:plane 1C] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.453475] [drm:drm_atomic_commit] committing 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.468994] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.469038] [drm:__drm_atomic_state_free] Freeing atomic state 000000006cccd805 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.473916] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.496228] [drm:drm_fb_helper_hotplug_event.part.33] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.496231] [drm:drm_setup_crtcs] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.496273] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:77:eDP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.496341] [drm:intel_dp_detect [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.496395] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.496462] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.496510] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.497407] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.499753] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.499768] [drm:drm_add_edid_modes] ELD: no CEA Extension found Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.499770] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.499797] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:77:eDP-1] probed modes : Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.499801] [drm:drm_mode_debug_printmodeline] Modeline 78:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.499803] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:84:DP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.499853] [drm:intel_dp_detect [i915]] [CONNECTOR:84:DP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.499884] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.500708] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 00 02 02 06 04 00 00 00 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.501014] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.501046] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.501076] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.501444] [drm:drm_dp_read_desc] DP sink: OUI 00-00-00 dev-ID HW-rev 0.0 SW-rev 0.0 quirks 0x0000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.501476] [drm:intel_dp_detect [i915]] Sink is not MST capable Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505255] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505261] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505271] [drm:drm_add_edid_modes] ELD: no CEA Extension found Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505273] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505381] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:84:DP-1] probed modes : Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505384] [drm:drm_mode_debug_printmodeline] Modeline 98:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505387] [drm:drm_mode_debug_printmodeline] Modeline 102:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505389] [drm:drm_mode_debug_printmodeline] Modeline 105:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505391] [drm:drm_mode_debug_printmodeline] Modeline 99:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505393] [drm:drm_mode_debug_printmodeline] Modeline 103:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505395] [drm:drm_mode_debug_printmodeline] Modeline 106:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505397] [drm:drm_mode_debug_printmodeline] Modeline 100:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505399] [drm:drm_mode_debug_printmodeline] Modeline 101:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505401] [drm:drm_mode_debug_printmodeline] Modeline 104:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505403] [drm:drm_mode_debug_printmodeline] Modeline 109:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505405] [drm:drm_mode_debug_printmodeline] Modeline 107:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505407] [drm:drm_mode_debug_printmodeline] Modeline 108:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505410] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:90:HDMI-A-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505443] [drm:intel_hdmi_detect [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505634] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505664] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505848] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505851] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505881] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.505911] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.506442] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.506472] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.506656] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.506685] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.506867] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.506871] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.506873] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:90:HDMI-A-1] disconnected Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.506875] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:94:HDMI-A-2] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.506907] [drm:intel_hdmi_detect [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.532935] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.532970] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533155] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533162] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533166] [drm:drm_detect_monitor_audio] Monitor has basic audio support Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533171] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533173] [drm:drm_add_display_info] HDMI: DVI dual 0, max TMDS clock 225000 kHz Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533193] [drm:drm_add_edid_modes] ELD monitor DELL U2713HM Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533195] [drm:drm_add_edid_modes] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533197] [drm:drm_add_edid_modes] ELD size 36, SAD count 1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533198] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533200] [drm:drm_add_display_info] HDMI: DVI dual 0, max TMDS clock 225000 kHz Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533586] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:94:HDMI-A-2] probed modes : Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533590] [drm:drm_mode_debug_printmodeline] Modeline 111:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533592] [drm:drm_mode_debug_printmodeline] Modeline 129:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533594] [drm:drm_mode_debug_printmodeline] Modeline 149:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533596] [drm:drm_mode_debug_printmodeline] Modeline 113:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533598] [drm:drm_mode_debug_printmodeline] Modeline 145:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533600] [drm:drm_mode_debug_printmodeline] Modeline 143:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533602] [drm:drm_mode_debug_printmodeline] Modeline 142:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533604] [drm:drm_mode_debug_printmodeline] Modeline 144:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533606] [drm:drm_mode_debug_printmodeline] Modeline 157:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533608] [drm:drm_mode_debug_printmodeline] Modeline 119:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533610] [drm:drm_mode_debug_printmodeline] Modeline 117:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533612] [drm:drm_mode_debug_printmodeline] Modeline 125:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533614] [drm:drm_mode_debug_printmodeline] Modeline 120:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533616] [drm:drm_mode_debug_printmodeline] Modeline 116:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533618] [drm:drm_mode_debug_printmodeline] Modeline 118:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533620] [drm:drm_mode_debug_printmodeline] Modeline 114:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533622] [drm:drm_mode_debug_printmodeline] Modeline 146:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533624] [drm:drm_mode_debug_printmodeline] Modeline 141:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533626] [drm:drm_mode_debug_printmodeline] Modeline 126:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533628] [drm:drm_mode_debug_printmodeline] Modeline 127:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533630] [drm:drm_mode_debug_printmodeline] Modeline 128:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533632] [drm:drm_mode_debug_printmodeline] Modeline 121:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533634] [drm:drm_mode_debug_printmodeline] Modeline 138:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533636] [drm:drm_mode_debug_printmodeline] Modeline 135:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533638] [drm:drm_mode_debug_printmodeline] Modeline 147:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533640] [drm:drm_mode_debug_printmodeline] Modeline 115:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533642] [drm:drm_mode_debug_printmodeline] Modeline 154:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533645] [drm:drm_mode_debug_printmodeline] Modeline 134:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533646] [drm:drm_mode_debug_printmodeline] Modeline 122:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533648] [drm:drm_mode_debug_printmodeline] Modeline 148:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533650] [drm:drm_mode_debug_printmodeline] Modeline 123:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533652] [drm:drm_mode_debug_printmodeline] Modeline 124:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533655] [drm:drm_setup_crtcs] connector 77 enabled? yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533656] [drm:drm_setup_crtcs] connector 84 enabled? yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533658] [drm:drm_setup_crtcs] connector 90 enabled? no Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533659] [drm:drm_setup_crtcs] connector 94 enabled? yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533699] [drm:intel_fb_initial_config [i915]] Not using firmware configuration Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533702] [drm:drm_setup_crtcs] looking for cmdline mode on connector 77 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533704] [drm:drm_setup_crtcs] looking for preferred mode on connector 77 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533705] [drm:drm_setup_crtcs] found mode 1920x1080 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533706] [drm:drm_setup_crtcs] looking for cmdline mode on connector 84 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533707] [drm:drm_setup_crtcs] looking for preferred mode on connector 84 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533708] [drm:drm_setup_crtcs] found mode 1920x1200 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533709] [drm:drm_setup_crtcs] looking for cmdline mode on connector 94 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533710] [drm:drm_setup_crtcs] looking for preferred mode on connector 94 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533711] [drm:drm_setup_crtcs] found mode 1920x1080 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533712] [drm:drm_setup_crtcs] picking CRTCs for 1920x1200 config Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533755] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 43 (0,0) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533758] [drm:drm_setup_crtcs] desired mode 1920x1200 set on crtc 59 (0,0) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533761] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 75 (0,0) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533786] [drm:drm_atomic_state_init] Allocated atomic state 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533795] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 0000000078e0bdf6 state to 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533801] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 0000000057f46293 state to 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533806] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 0000000027fe1add state to 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533808] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000027fe1add to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533809] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000027fe1add Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533814] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 000000009c32ac85 state to 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533815] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000009c32ac85 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533816] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000009c32ac85 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533820] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 000000007aa60c8a state to 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533821] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000007aa60c8a to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533822] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000007aa60c8a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533825] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 0000000060dd6522 state to 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533826] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000060dd6522 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533827] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000060dd6522 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533831] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 000000007b82fb18 state to 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533835] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000d712504d state to 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533839] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 000000006e4f63c5 state to 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533840] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000006e4f63c5 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533841] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000006e4f63c5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533844] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 00000000fe2c79c8 state to 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533845] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000fe2c79c8 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533846] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000fe2c79c8 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533849] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 00000000ff81899e state to 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533850] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000ff81899e to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533851] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000ff81899e Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533854] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000e28ec503 state to 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533855] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000e28ec503 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533856] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000e28ec503 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533859] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 000000006f0fabca state to 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533863] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000ef0c3392 state to 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533867] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 0000000046f03dfd state to 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533868] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000046f03dfd to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533869] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000046f03dfd Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533872] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 0000000067e81408 state to 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533873] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000067e81408 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533874] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000067e81408 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533877] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 00000000c08e1955 state to 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533878] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000c08e1955 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533879] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000c08e1955 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533882] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 00000000a2decf04 state to 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533883] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000a2decf04 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533884] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000a2decf04 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533889] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 0000000057f46293 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533890] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000078e0bdf6 to [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533892] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 0000000078e0bdf6 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533893] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533902] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 00000000c2a490d5 state to 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533903] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000c2a490d5 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533905] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000c2a490d5 to [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533908] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1200] for CRTC state 00000000d712504d Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533910] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000007b82fb18 to [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533911] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 000000007b82fb18 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533912] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533916] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 0000000029e13602 state to 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533918] [drm:drm_atomic_set_crtc_for_connector] Link connector state 0000000029e13602 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533919] [drm:drm_atomic_set_crtc_for_connector] Link connector state 0000000029e13602 to [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533923] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 00000000ef0c3392 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533924] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000006f0fabca to [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533925] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 000000006f0fabca Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533926] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533930] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 00000000c1d3f229 state to 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533931] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000c1d3f229 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533933] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000c1d3f229 to [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533934] [drm:drm_atomic_check_only] checking 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533939] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533942] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:77:eDP-1] keeps [ENCODER:76:DDI A], now on [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533944] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533946] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:84:DP-1] keeps [ENCODER:83:DDI B], now on [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533947] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533949] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:94:HDMI-A-2] keeps [ENCODER:93:DDI C], now on [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.533987] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.534019] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.534050] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.534081] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.534111] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:60:plane 1C] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.534141] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:60:plane 1C] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.534153] [drm:drm_atomic_commit] committing 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.546418] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.546454] [drm:__drm_atomic_state_free] Freeing atomic state 00000000ac2578d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.546516] [drm:drm_fb_helper_hotplug_event.part.33] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.546517] [drm:drm_setup_crtcs] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.546531] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:77:eDP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.546583] [drm:intel_dp_detect [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.546621] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.546652] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.546682] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.547041] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.547617] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.547629] [drm:drm_add_edid_modes] ELD: no CEA Extension found Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.547630] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.547655] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:77:eDP-1] probed modes : Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.547658] [drm:drm_mode_debug_printmodeline] Modeline 78:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.547660] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:84:DP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.547698] [drm:intel_dp_detect [i915]] [CONNECTOR:84:DP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.547729] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.548146] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 00 02 02 06 05 00 00 00 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.548442] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.548471] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.548500] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.548859] [drm:drm_dp_read_desc] DP sink: OUI 00-00-00 dev-ID HW-rev 0.0 SW-rev 0.0 quirks 0x0000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.548888] [drm:intel_dp_detect [i915]] Sink is not MST capable Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.552660] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.552667] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.552678] [drm:drm_add_edid_modes] ELD: no CEA Extension found Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.552680] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.552787] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:84:DP-1] probed modes : Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.552790] [drm:drm_mode_debug_printmodeline] Modeline 98:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.552792] [drm:drm_mode_debug_printmodeline] Modeline 102:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.552794] [drm:drm_mode_debug_printmodeline] Modeline 105:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.552796] [drm:drm_mode_debug_printmodeline] Modeline 99:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.552798] [drm:drm_mode_debug_printmodeline] Modeline 103:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.552800] [drm:drm_mode_debug_printmodeline] Modeline 106:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.552802] [drm:drm_mode_debug_printmodeline] Modeline 100:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.552804] [drm:drm_mode_debug_printmodeline] Modeline 101:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.552806] [drm:drm_mode_debug_printmodeline] Modeline 104:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.552808] [drm:drm_mode_debug_printmodeline] Modeline 109:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.552810] [drm:drm_mode_debug_printmodeline] Modeline 107:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.552812] [drm:drm_mode_debug_printmodeline] Modeline 108:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.552815] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:90:HDMI-A-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.552845] [drm:intel_hdmi_detect [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.553034] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.553063] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.553245] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.553249] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.553278] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.553306] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.553837] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.553866] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.554049] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.554077] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.554259] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.554263] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.554265] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:90:HDMI-A-1] disconnected Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.554268] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:94:HDMI-A-2] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.554300] [drm:intel_hdmi_detect [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.572401] EXT4-fs (sda3): mounted filesystem with ordered data mode. Opts: (null) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580294] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580327] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580514] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580521] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580526] [drm:drm_detect_monitor_audio] Monitor has basic audio support Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580530] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580532] [drm:drm_add_display_info] HDMI: DVI dual 0, max TMDS clock 225000 kHz Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580548] [drm:drm_add_edid_modes] ELD monitor DELL U2713HM Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580551] [drm:drm_add_edid_modes] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580552] [drm:drm_add_edid_modes] ELD size 36, SAD count 1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580554] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580555] [drm:drm_add_display_info] HDMI: DVI dual 0, max TMDS clock 225000 kHz Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580942] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:94:HDMI-A-2] probed modes : Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580945] [drm:drm_mode_debug_printmodeline] Modeline 111:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580947] [drm:drm_mode_debug_printmodeline] Modeline 129:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580950] [drm:drm_mode_debug_printmodeline] Modeline 149:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580952] [drm:drm_mode_debug_printmodeline] Modeline 113:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580954] [drm:drm_mode_debug_printmodeline] Modeline 145:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580956] [drm:drm_mode_debug_printmodeline] Modeline 143:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580958] [drm:drm_mode_debug_printmodeline] Modeline 142:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580960] [drm:drm_mode_debug_printmodeline] Modeline 144:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580962] [drm:drm_mode_debug_printmodeline] Modeline 157:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580964] [drm:drm_mode_debug_printmodeline] Modeline 119:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580966] [drm:drm_mode_debug_printmodeline] Modeline 117:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580968] [drm:drm_mode_debug_printmodeline] Modeline 125:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580970] [drm:drm_mode_debug_printmodeline] Modeline 120:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580972] [drm:drm_mode_debug_printmodeline] Modeline 116:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580974] [drm:drm_mode_debug_printmodeline] Modeline 118:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580976] [drm:drm_mode_debug_printmodeline] Modeline 114:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580978] [drm:drm_mode_debug_printmodeline] Modeline 146:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580980] [drm:drm_mode_debug_printmodeline] Modeline 141:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580982] [drm:drm_mode_debug_printmodeline] Modeline 126:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580984] [drm:drm_mode_debug_printmodeline] Modeline 127:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580986] [drm:drm_mode_debug_printmodeline] Modeline 128:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580988] [drm:drm_mode_debug_printmodeline] Modeline 121:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580990] [drm:drm_mode_debug_printmodeline] Modeline 138:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580992] [drm:drm_mode_debug_printmodeline] Modeline 135:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580994] [drm:drm_mode_debug_printmodeline] Modeline 147:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580996] [drm:drm_mode_debug_printmodeline] Modeline 115:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.580998] [drm:drm_mode_debug_printmodeline] Modeline 154:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581000] [drm:drm_mode_debug_printmodeline] Modeline 134:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581002] [drm:drm_mode_debug_printmodeline] Modeline 122:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581004] [drm:drm_mode_debug_printmodeline] Modeline 148:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581006] [drm:drm_mode_debug_printmodeline] Modeline 123:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581008] [drm:drm_mode_debug_printmodeline] Modeline 124:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581011] [drm:drm_setup_crtcs] connector 77 enabled? yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581012] [drm:drm_setup_crtcs] connector 84 enabled? yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581014] [drm:drm_setup_crtcs] connector 90 enabled? no Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581016] [drm:drm_setup_crtcs] connector 94 enabled? yes Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581060] [drm:intel_fb_initial_config [i915]] Not using firmware configuration Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581064] [drm:drm_setup_crtcs] looking for cmdline mode on connector 77 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581065] [drm:drm_setup_crtcs] looking for preferred mode on connector 77 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581066] [drm:drm_setup_crtcs] found mode 1920x1080 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581067] [drm:drm_setup_crtcs] looking for cmdline mode on connector 84 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581068] [drm:drm_setup_crtcs] looking for preferred mode on connector 84 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581070] [drm:drm_setup_crtcs] found mode 1920x1200 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581071] [drm:drm_setup_crtcs] looking for cmdline mode on connector 94 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581072] [drm:drm_setup_crtcs] looking for preferred mode on connector 94 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581073] [drm:drm_setup_crtcs] found mode 1920x1080 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581074] [drm:drm_setup_crtcs] picking CRTCs for 1920x1200 config Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581116] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 43 (0,0) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581120] [drm:drm_setup_crtcs] desired mode 1920x1200 set on crtc 59 (0,0) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581123] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 75 (0,0) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581143] [drm:drm_atomic_state_init] Allocated atomic state 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581151] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 000000008c1457c2 state to 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581158] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000003b82e97e state to 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581162] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 00000000715769b9 state to 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581164] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000715769b9 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581165] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000715769b9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581170] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 000000003101cd67 state to 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581171] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000003101cd67 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581172] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000003101cd67 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581176] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 000000008588cc43 state to 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581177] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000008588cc43 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581178] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000008588cc43 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581182] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 000000006231feca state to 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581184] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000006231feca to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581185] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000006231feca Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581188] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 0000000089d9919b state to 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581193] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000c84421b2 state to 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581196] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 00000000e80b8e93 state to 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581197] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000e80b8e93 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581198] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000e80b8e93 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581201] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 000000000ccc44de state to 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581202] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000000ccc44de to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581203] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000000ccc44de Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581207] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 00000000ac52e12b state to 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581208] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000ac52e12b to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581209] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000ac52e12b Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581212] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000e68fadd4 state to 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581213] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000e68fadd4 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581214] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000e68fadd4 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581218] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 000000003145be17 state to 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581222] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000459e359d state to 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581226] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 00000000678a856b state to 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581227] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000678a856b to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581228] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000678a856b Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581231] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 00000000c089859b state to 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581232] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000c089859b to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581233] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000c089859b Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581237] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 000000001e9ed47a state to 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581238] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000001e9ed47a to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581239] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000001e9ed47a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581242] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 00000000cada050c state to 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581243] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000cada050c to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581244] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000cada050c Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581250] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 000000003b82e97e Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581251] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000008c1457c2 to [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581253] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 000000008c1457c2 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581254] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581262] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 00000000477274bb state to 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581264] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000477274bb to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581265] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000477274bb to [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581269] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1200] for CRTC state 00000000c84421b2 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581271] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000089d9919b to [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581272] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 0000000089d9919b Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581273] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581277] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 00000000f799b3e3 state to 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581279] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000f799b3e3 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581280] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000f799b3e3 to [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581284] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 00000000459e359d Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581285] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000003145be17 to [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581286] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 000000003145be17 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581288] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581292] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 00000000bf3b0671 state to 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581293] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000bf3b0671 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581295] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000bf3b0671 to [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581296] [drm:drm_atomic_check_only] checking 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581302] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581304] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:77:eDP-1] keeps [ENCODER:76:DDI A], now on [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581306] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581308] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:84:DP-1] keeps [ENCODER:83:DDI B], now on [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581310] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581312] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:94:HDMI-A-2] keeps [ENCODER:93:DDI C], now on [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581351] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581383] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581416] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581447] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581478] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:60:plane 1C] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581508] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:60:plane 1C] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.581520] [drm:drm_atomic_commit] committing 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.596417] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.596459] [drm:__drm_atomic_state_free] Freeing atomic state 00000000e36202f9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.596992] scsi 1:0:0:0: Direct-Access SanDisk Cruzer Glide 1.27 PQ: 0 ANSI: 6 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.597846] sd 1:0:0:0: Attached scsi generic sg1 type 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.598296] sd 1:0:0:0: [sdb] 15633408 512-byte logical blocks: (8.00 GB/7.45 GiB) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.598956] sd 1:0:0:0: [sdb] Write Protect is off Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.598957] sd 1:0:0:0: [sdb] Mode Sense: 43 00 00 00 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.599200] sd 1:0:0:0: [sdb] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.602070] sdb: sdb1 sdb2 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.603368] sd 1:0:0:0: [sdb] Attached SCSI removable disk Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.890487] lp: driver loaded but no devices found Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.894661] ppdev: user-space parallel port driver Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 78.984878] EXT4-fs (sda3): re-mounted. Opts: (null) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.291676] input: Intel HID events as /devices/platform/INT33D5:00/input/input5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.298973] intel-hid INT33D5:00: platform supports 5 button array Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.299160] input: Intel HID 5 button array as /devices/platform/INT33D5:00/input/input6 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.355630] input: Intel Virtual Button driver as /devices/pci0000:00/0000:00:1f.0/PNP0C09:00/INT33D6:00/input/input7 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.488774] idma64 idma64.0: Found Intel integrated DMA 64-bit Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.543596] [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=96000/96000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.543631] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 96000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.569662] idma64 idma64.1: Found Intel integrated DMA 64-bit Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.617900] shpchp: Standard Hot Plug PCI Controller Driver version: 0.4 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.630807] idma64 idma64.2: Found Intel integrated DMA 64-bit Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.687296] idma64 idma64.3: Found Intel integrated DMA 64-bit Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.736492] snd_hda_intel 0000:00:0e.0: bound 0000:00:02.0 (ops i915_audio_component_bind_ops [i915]) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.743456] idma64 idma64.4: Found Intel integrated DMA 64-bit Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.776440] FAT-fs (sda1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.783042] snd_hda_codec_realtek hdaudioC0D0: autoconfig for ALC298: line_outs=1 (0x14/0x0/0x0/0x0/0x0) type:speaker Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.783044] snd_hda_codec_realtek hdaudioC0D0: speaker_outs=0 (0x0/0x0/0x0/0x0/0x0) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.783046] snd_hda_codec_realtek hdaudioC0D0: hp_outs=1 (0x21/0x0/0x0/0x0/0x0) Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.783047] snd_hda_codec_realtek hdaudioC0D0: mono: mono_out=0x0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.783048] snd_hda_codec_realtek hdaudioC0D0: inputs: Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.783049] snd_hda_codec_realtek hdaudioC0D0: Mic=0x18 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.783050] snd_hda_codec_realtek hdaudioC0D0: Internal Mic=0x12 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.839940] idma64 idma64.5: Found Intel integrated DMA 64-bit Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.866003] [drm:i915_audio_component_get_eld [i915]] Not valid for port B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.866038] [drm:i915_audio_component_get_eld [i915]] Not valid for port B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.866070] [drm:i915_audio_component_get_eld [i915]] Not valid for port B Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.866109] [drm:i915_audio_component_get_eld [i915]] Not valid for port C Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.866140] [drm:i915_audio_component_get_eld [i915]] Not valid for port C Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.866171] [drm:i915_audio_component_get_eld [i915]] Not valid for port D Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.866202] [drm:i915_audio_component_get_eld [i915]] Not valid for port D Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.866232] [drm:i915_audio_component_get_eld [i915]] Not valid for port D Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.872307] input: HDA Intel PCH Mic as /devices/pci0000:00/0000:00:0e.0/sound/card0/input8 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.872606] input: HDA Intel PCH Headphone as /devices/pci0000:00/0000:00:0e.0/sound/card0/input9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.872873] input: HDA Intel PCH HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:0e.0/sound/card0/input10 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.873699] input: HDA Intel PCH HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:0e.0/sound/card0/input11 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.873976] input: HDA Intel PCH HDMI/DP,pcm=8 as /devices/pci0000:00/0000:00:0e.0/sound/card0/input12 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.874254] input: HDA Intel PCH HDMI/DP,pcm=9 as /devices/pci0000:00/0000:00:0e.0/sound/card0/input13 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.874554] input: HDA Intel PCH HDMI/DP,pcm=10 as /devices/pci0000:00/0000:00:0e.0/sound/card0/input14 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.885087] Adding 8000508k swap on /dev/sda2. Priority:-2 extents:1 across:8000508k SSFS Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.930549] idma64 idma64.6: Found Intel integrated DMA 64-bit Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 79.986658] idma64 idma64.7: Found Intel integrated DMA 64-bit Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.001267] audit: type=1400 audit(1519098437.847:2): apparmor="STATUS" operation="profile_load" profile="unconfined" name="libreoffice-oopslash" pid=503 comm="apparmor_parser" Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.002295] audit: type=1400 audit(1519098437.847:3): apparmor="STATUS" operation="profile_load" profile="unconfined" name="libreoffice-senddoc" pid=504 comm="apparmor_parser" Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.002798] audit: type=1400 audit(1519098437.847:4): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/sbin/dhclient" pid=500 comm="apparmor_parser" Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.002811] audit: type=1400 audit(1519098437.847:5): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=500 comm="apparmor_parser" Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.002822] audit: type=1400 audit(1519098437.847:6): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-helper" pid=500 comm="apparmor_parser" Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.002832] audit: type=1400 audit(1519098437.847:7): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=500 comm="apparmor_parser" Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.011867] audit: type=1400 audit(1519098437.855:8): apparmor="STATUS" operation="profile_load" profile="unconfined" name="libreoffice-xpdfimport" pid=506 comm="apparmor_parser" Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.016545] audit: type=1400 audit(1519098437.863:9): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/snapd/snap-confine" pid=507 comm="apparmor_parser" Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.016559] audit: type=1400 audit(1519098437.863:10): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/snapd/snap-confine//mount-namespace-capture-helper" pid=507 comm="apparmor_parser" Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.016571] audit: type=1400 audit(1519098437.863:11): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/snapd/snap-confine//snap_update_ns" pid=507 comm="apparmor_parser" Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.082275] idma64 idma64.8: Found Intel integrated DMA 64-bit Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.086040] idma64 idma64.9: Found Intel integrated DMA 64-bit Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.090555] idma64 idma64.11: Found Intel integrated DMA 64-bit Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.093003] idma64 idma64.12: Found Intel integrated DMA 64-bit Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.094675] idma64 idma64.13: Found Intel integrated DMA 64-bit Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.106703] random: crng init done Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.123956] r8169 0000:01:00.0 enp1s0: link down Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.123957] r8169 0000:01:00.0 enp1s0: link down Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.133319] IPv6: ADDRCONF(NETDEV_UP): enp1s0: link is not ready Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.306677] RAPL PMU: API unit is 2^-32 Joules, 4 fixed counters, 655360 ms ovfl timer Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.306680] RAPL PMU: hw unit of domain pp0-core 2^-14 Joules Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.306680] RAPL PMU: hw unit of domain package 2^-14 Joules Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.306681] RAPL PMU: hw unit of domain dram 2^-14 Joules Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.306681] RAPL PMU: hw unit of domain pp1-gpu 2^-14 Joules Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.317010] cryptd: max_cpu_qlen set to 1000 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.347031] SSE version of gcm_enc/dec engaged. Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.552780] intel_telemetry_core Init Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.680589] intel_rapl: Found RAPL domain package Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.680593] intel_rapl: Found RAPL domain core Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.680595] intel_rapl: Found RAPL domain uncore Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.680596] intel_rapl: Found RAPL domain dram Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891354] [drm:drm_atomic_state_init] Allocated atomic state 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891362] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 000000005ff88288 state to 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891371] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000602ecb81 state to 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891376] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 00000000ea2913f1 state to 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891378] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000ea2913f1 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891379] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000ea2913f1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891384] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 000000000cb394fa state to 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891386] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000000cb394fa to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891387] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000000cb394fa Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891391] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 00000000f6d7d954 state to 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891392] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000f6d7d954 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891393] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000f6d7d954 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891398] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 000000004ebc99cd state to 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891399] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000004ebc99cd to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891400] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000004ebc99cd Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891404] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 0000000011844058 state to 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891410] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000000f5a6246 state to 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891414] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 00000000247b3886 state to 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891415] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000247b3886 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891416] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000247b3886 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891420] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 00000000c4a6bb48 state to 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891421] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000c4a6bb48 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891422] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000c4a6bb48 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891428] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 0000000041695713 state to 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891429] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000041695713 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891430] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000041695713 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891434] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000228ab754 state to 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891435] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000228ab754 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891436] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000228ab754 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891441] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 0000000044a2ede3 state to 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891447] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 0000000066ecb64b state to 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891451] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 000000006edd76b1 state to 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891452] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000006edd76b1 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891453] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000006edd76b1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891457] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 00000000bd5e7f37 state to 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891458] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000bd5e7f37 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891459] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000bd5e7f37 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891466] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 000000007aa60c8a state to 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891467] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000007aa60c8a to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891468] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000007aa60c8a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891476] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 000000009d900c75 state to 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891477] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000009d900c75 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891477] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000009d900c75 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891487] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 00000000602ecb81 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891489] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000005ff88288 to [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891490] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 000000005ff88288 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891492] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891505] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 000000007d4949a9 state to 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891508] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000007d4949a9 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891509] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000007d4949a9 to [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891515] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1200] for CRTC state 000000000f5a6246 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891516] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000011844058 to [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891517] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 0000000011844058 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891518] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891524] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 000000004c22ee84 state to 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891526] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000004c22ee84 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891527] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000004c22ee84 to [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891536] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 0000000066ecb64b Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891537] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000044a2ede3 to [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891538] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 0000000044a2ede3 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891540] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891545] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 00000000e026e7a0 state to 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891546] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000e026e7a0 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891548] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000e026e7a0 to [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891579] [drm:drm_atomic_check_only] checking 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891587] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891590] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:77:eDP-1] keeps [ENCODER:76:DDI A], now on [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891592] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891594] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:84:DP-1] keeps [ENCODER:83:DDI B], now on [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891595] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891597] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:94:HDMI-A-2] keeps [ENCODER:93:DDI C], now on [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891653] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891687] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891720] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891752] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891784] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:60:plane 1C] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891815] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:60:plane 1C] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.891828] [drm:drm_atomic_commit] committing 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.903250] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.903294] [drm:__drm_atomic_state_free] Freeing atomic state 0000000034141595 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978530] [drm:drm_atomic_state_init] Allocated atomic state 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978539] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 000000002a08db8e state to 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978548] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 0000000077960742 state to 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978553] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 000000007ef58376 state to 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978554] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000007ef58376 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978556] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000007ef58376 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978561] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 00000000aee87bb0 state to 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978562] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000aee87bb0 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978563] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000aee87bb0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978568] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 0000000011b5351f state to 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978569] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000011b5351f to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978570] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000011b5351f Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978575] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 0000000000fe8653 state to 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978576] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000000fe8653 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978577] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000000fe8653 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978581] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 0000000060975b3d state to 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978588] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000459e359d state to 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978592] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 0000000061cbeeda state to 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978593] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000061cbeeda to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978594] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000061cbeeda Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978598] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 0000000093259357 state to 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978599] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000093259357 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978600] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000093259357 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978605] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 0000000002d1aefb state to 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978606] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000002d1aefb to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978607] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000002d1aefb Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978614] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000759eb6a9 state to 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978615] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000759eb6a9 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978615] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000759eb6a9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978623] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 000000003101cd67 state to 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978629] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000c84421b2 state to 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978637] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 00000000715769b9 state to 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978637] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000715769b9 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978638] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000715769b9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978643] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 000000008c1457c2 state to 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978644] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000008c1457c2 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978645] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000008c1457c2 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978651] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 00000000cada050c state to 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978652] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000cada050c to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978653] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000cada050c Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978658] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 00000000d486aaeb state to 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978659] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000d486aaeb to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978660] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000d486aaeb Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978668] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 0000000077960742 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978669] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000002a08db8e to [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978671] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 000000002a08db8e Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978673] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978686] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 00000000fbb15d19 state to 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978688] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000fbb15d19 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978690] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000fbb15d19 to [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978696] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1200] for CRTC state 00000000459e359d Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978697] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000060975b3d to [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978698] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 0000000060975b3d Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978700] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978706] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 00000000209c0800 state to 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978707] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000209c0800 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978709] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000209c0800 to [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978713] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 00000000c84421b2 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978714] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000003101cd67 to [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978715] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 000000003101cd67 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978717] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978722] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 000000002a9f4045 state to 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978723] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000002a9f4045 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978725] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000002a9f4045 to [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978726] [drm:drm_atomic_check_only] checking 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978735] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978737] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:77:eDP-1] keeps [ENCODER:76:DDI A], now on [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978739] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978741] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:84:DP-1] keeps [ENCODER:83:DDI B], now on [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978742] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978744] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:94:HDMI-A-2] keeps [ENCODER:93:DDI C], now on [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978803] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978836] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978869] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978901] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978933] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:60:plane 1C] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978964] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:60:plane 1C] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.978976] [drm:drm_atomic_commit] committing 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.997004] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 80.997069] [drm:__drm_atomic_state_free] Freeing atomic state 00000000abecc599 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004349] [drm:drm_atomic_state_init] Allocated atomic state 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004358] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 0000000092cb6b97 state to 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004367] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000081b0e63 state to 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004375] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 00000000bd442384 state to 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004377] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000bd442384 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004379] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000bd442384 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004384] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 0000000097afbca6 state to 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004386] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000097afbca6 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004388] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000097afbca6 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004394] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 00000000c4badb63 state to 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004396] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000c4badb63 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004398] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000c4badb63 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004403] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 0000000098347880 state to 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004405] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000098347880 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004407] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000098347880 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004412] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 0000000067df3f2a state to 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004417] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000ddcfc4f3 state to 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004422] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 000000008800291c state to 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004424] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000008800291c to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004426] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000008800291c Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004430] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 0000000030f76c08 state to 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004432] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000030f76c08 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004434] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000030f76c08 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004438] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 00000000c97dff9e state to 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004439] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000c97dff9e to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004440] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000c97dff9e Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004444] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000d9567a7b state to 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004445] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000d9567a7b to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004446] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000d9567a7b Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004450] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 00000000bcbbf201 state to 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004455] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000001ba6ab2b state to 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004459] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 000000002c690472 state to 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004460] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000002c690472 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004461] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000002c690472 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004465] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 000000006c1386c9 state to 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004466] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000006c1386c9 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004467] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000006c1386c9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004472] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 00000000b945c1f4 state to 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004473] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000b945c1f4 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004474] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000b945c1f4 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004478] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 00000000b502cf20 state to 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004479] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000b502cf20 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004480] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000b502cf20 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004489] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 00000000081b0e63 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004491] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000092cb6b97 to [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004492] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 0000000092cb6b97 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004494] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004504] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 000000004068c079 state to 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004506] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000004068c079 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004508] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000004068c079 to [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004515] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1200] for CRTC state 00000000ddcfc4f3 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004517] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000067df3f2a to [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004518] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 0000000067df3f2a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004519] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004524] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 00000000ccfee9e4 state to 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004525] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000ccfee9e4 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004526] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000ccfee9e4 to [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004532] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 000000001ba6ab2b Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004533] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000bcbbf201 to [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004534] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 00000000bcbbf201 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004535] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004540] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 000000002990811d state to 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004541] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000002990811d to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004542] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000002990811d to [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004543] [drm:drm_atomic_check_only] checking 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004552] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004555] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:77:eDP-1] keeps [ENCODER:76:DDI A], now on [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004558] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004561] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:84:DP-1] keeps [ENCODER:83:DDI B], now on [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004563] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004566] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:94:HDMI-A-2] keeps [ENCODER:93:DDI C], now on [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004623] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004658] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004692] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004725] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004757] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:60:plane 1C] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004789] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:60:plane 1C] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.004803] [drm:drm_atomic_commit] committing 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.020395] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.020472] [drm:__drm_atomic_state_free] Freeing atomic state 00000000dce6658a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050062] [drm:drm_atomic_state_init] Allocated atomic state 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050071] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 00000000dc16ddff state to 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050080] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000002cdca724 state to 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050085] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 000000001d74e592 state to 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050086] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000001d74e592 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050088] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000001d74e592 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050093] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 000000007eb876d0 state to 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050094] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000007eb876d0 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050095] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000007eb876d0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050100] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 0000000087d68c09 state to 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050101] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000087d68c09 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050102] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000087d68c09 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050106] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 00000000546f3480 state to 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050107] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000546f3480 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050108] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000546f3480 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050115] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 00000000f1984474 state to 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050120] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000009193fd08 state to 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050127] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 000000007dc05a11 state to 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050128] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000007dc05a11 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050129] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000007dc05a11 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050133] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 0000000063a02161 state to 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050134] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000063a02161 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050135] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000063a02161 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050143] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 000000000c329804 state to 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050144] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000000c329804 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050145] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000000c329804 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050154] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000ae8780a4 state to 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050155] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000ae8780a4 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050156] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000ae8780a4 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050161] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 000000002753e743 state to 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050167] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000002ba2e6c5 state to 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050171] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 000000003f7da1e5 state to 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050172] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000003f7da1e5 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050173] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000003f7da1e5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050177] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 00000000a1775643 state to 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050178] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000a1775643 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050179] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000a1775643 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050185] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 000000009d5eec85 state to 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050185] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000009d5eec85 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050186] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000009d5eec85 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050191] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 00000000cb9b55d4 state to 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050192] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000cb9b55d4 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050193] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000cb9b55d4 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050202] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 000000002cdca724 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050203] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000dc16ddff to [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050205] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 00000000dc16ddff Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050207] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050217] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 000000000d252df7 state to 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050220] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000000d252df7 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050221] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000000d252df7 to [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050227] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1200] for CRTC state 000000009193fd08 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050228] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000f1984474 to [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050229] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 00000000f1984474 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050230] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050235] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 0000000060279ed5 state to 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050237] [drm:drm_atomic_set_crtc_for_connector] Link connector state 0000000060279ed5 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050238] [drm:drm_atomic_set_crtc_for_connector] Link connector state 0000000060279ed5 to [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050243] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 000000002ba2e6c5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050244] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000002753e743 to [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050245] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 000000002753e743 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050246] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050252] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 00000000a7053045 state to 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050253] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000a7053045 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050254] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000a7053045 to [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050256] [drm:drm_atomic_check_only] checking 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050264] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050266] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:77:eDP-1] keeps [ENCODER:76:DDI A], now on [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050268] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050270] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:84:DP-1] keeps [ENCODER:83:DDI B], now on [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050271] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050273] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:94:HDMI-A-2] keeps [ENCODER:93:DDI C], now on [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050330] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050364] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050397] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050429] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050460] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:60:plane 1C] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050491] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:60:plane 1C] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.050504] [drm:drm_atomic_commit] committing 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.061126] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.061171] [drm:__drm_atomic_state_free] Freeing atomic state 000000005704c416 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120805] [drm:drm_atomic_state_init] Allocated atomic state 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120813] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 000000002917805a state to 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120823] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000eb76b9fb state to 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120829] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 000000001b836842 state to 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120830] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000001b836842 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120832] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000001b836842 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120838] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 0000000050b48292 state to 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120839] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000050b48292 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120840] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000050b48292 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120845] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 00000000b07bd9e9 state to 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120846] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000b07bd9e9 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120847] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000b07bd9e9 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120851] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 000000004b9b2212 state to 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120852] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000004b9b2212 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120853] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000004b9b2212 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120858] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 00000000c2f7c533 state to 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120863] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000007f3f3db1 state to 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120870] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 00000000a3504d8d state to 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120871] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000a3504d8d to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120872] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000a3504d8d Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120881] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 0000000067152623 state to 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120882] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000067152623 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120883] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000067152623 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120888] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 00000000a7d4da38 state to 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120889] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000a7d4da38 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120890] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000a7d4da38 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120894] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000a6e957f5 state to 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120895] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000a6e957f5 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120896] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000a6e957f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120901] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 000000009a9489e7 state to 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120906] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 0000000098098753 state to 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120912] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 0000000062042352 state to 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120913] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000062042352 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120913] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000062042352 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120918] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 000000006bbb2bbb state to 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120919] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000006bbb2bbb to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120920] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000006bbb2bbb Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120924] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 0000000055713518 state to 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120925] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000055713518 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120926] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000055713518 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120930] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 00000000ecd57a17 state to 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120931] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000ecd57a17 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120932] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000ecd57a17 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120941] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 00000000eb76b9fb Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120942] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000002917805a to [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120944] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 000000002917805a Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120946] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120957] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 000000006fd837a1 state to 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120959] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000006fd837a1 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120961] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000006fd837a1 to [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120966] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1200] for CRTC state 000000007f3f3db1 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120967] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000c2f7c533 to [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120968] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 00000000c2f7c533 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120969] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120975] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 000000000d82ba69 state to 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120976] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000000d82ba69 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120978] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000000d82ba69 to [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120982] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 0000000098098753 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120983] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000009a9489e7 to [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120984] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 000000009a9489e7 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120986] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120990] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 00000000ce53e0d3 state to 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120991] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000ce53e0d3 to [NOCRTC] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120993] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000ce53e0d3 to [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.120994] [drm:drm_atomic_check_only] checking 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.121002] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.121005] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:77:eDP-1] keeps [ENCODER:76:DDI A], now on [CRTC:43:pipe A] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.121006] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.121008] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:84:DP-1] keeps [ENCODER:83:DDI B], now on [CRTC:59:pipe B] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.121010] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.121011] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:94:HDMI-A-2] keeps [ENCODER:93:DDI C], now on [CRTC:75:pipe C] Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.121068] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.121101] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.121134] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.121166] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.121198] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:60:plane 1C] with fb 132 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.121228] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:60:plane 1C] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.121241] [drm:drm_atomic_commit] committing 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.136764] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000f88010f5 Feb 19 21:47:18 GLK-2-GLKRVP1DDR405 kernel: [ 81.136827] [drm:__drm_atomic_state_free] Freeing atomic state 00000000f88010f5 Feb 19 21:47:19 GLK-2-GLKRVP1DDR405 kernel: [ 81.256941] dw-apb-uart.8: ttyS4 at MMIO 0xa122b000 (irq = 4, base_baud = 115200) is a 16550A Feb 19 21:47:19 GLK-2-GLKRVP1DDR405 kernel: [ 81.384964] dw-apb-uart.9: ttyS5 at MMIO 0xa122d000 (irq = 5, base_baud = 115200) is a 16550A Feb 19 21:47:19 GLK-2-GLKRVP1DDR405 kernel: [ 81.512712] dw-apb-uart.10: ttyS6 at MMIO 0xa122f000 (irq = 7, base_baud = 115200) is a 16550A Feb 19 21:47:19 GLK-2-GLKRVP1DDR405 kernel: [ 81.632115] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off Feb 19 21:47:19 GLK-2-GLKRVP1DDR405 kernel: [ 81.632150] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000067 Feb 19 21:47:19 GLK-2-GLKRVP1DDR405 kernel: [ 81.632178] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:47:21 GLK-2-GLKRVP1DDR405 kernel: [ 84.060346] r8169 0000:01:00.0 enp1s0: link up Feb 19 21:47:21 GLK-2-GLKRVP1DDR405 kernel: [ 84.060371] IPv6: ADDRCONF(NETDEV_CHANGE): enp1s0: link becomes ready Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.802772] Console: switching to colour dummy device 80x25 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.806936] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:77:eDP-1] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.806983] [drm:intel_dp_detect [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.807013] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.807048] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.807078] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.807107] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.807139] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.807169] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006f Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.807538] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.808114] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.808132] [drm:drm_add_edid_modes] ELD: no CEA Extension found Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.808134] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.808159] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:77:eDP-1] probed modes : Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.808163] [drm:drm_mode_debug_printmodeline] Modeline 78:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.808233] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:84:DP-1] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.808268] [drm:intel_dp_detect [i915]] [CONNECTOR:84:DP-1] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.808298] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.808710] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 00 02 02 06 05 00 00 00 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.809003] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.809034] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.809063] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.809414] [drm:drm_dp_read_desc] DP sink: OUI 00-00-00 dev-ID HW-rev 0.0 SW-rev 0.0 quirks 0x0000 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.809444] [drm:intel_dp_detect [i915]] Sink is not MST capable Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813152] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813156] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813164] [drm:drm_add_edid_modes] ELD: no CEA Extension found Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813166] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813264] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:84:DP-1] probed modes : Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813266] [drm:drm_mode_debug_printmodeline] Modeline 98:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813269] [drm:drm_mode_debug_printmodeline] Modeline 102:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0xa Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813271] [drm:drm_mode_debug_printmodeline] Modeline 105:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813273] [drm:drm_mode_debug_printmodeline] Modeline 99:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813275] [drm:drm_mode_debug_printmodeline] Modeline 103:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813277] [drm:drm_mode_debug_printmodeline] Modeline 106:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813279] [drm:drm_mode_debug_printmodeline] Modeline 100:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813281] [drm:drm_mode_debug_printmodeline] Modeline 101:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813283] [drm:drm_mode_debug_printmodeline] Modeline 104:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813285] [drm:drm_mode_debug_printmodeline] Modeline 109:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813287] [drm:drm_mode_debug_printmodeline] Modeline 107:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813289] [drm:drm_mode_debug_printmodeline] Modeline 108:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813361] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:90:HDMI-A-1] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813392] [drm:intel_hdmi_detect [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813581] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813610] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813792] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813795] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813824] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.813853] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.814383] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.814411] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.814595] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.814623] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.814805] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.814809] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.814811] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:90:HDMI-A-1] disconnected Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.814874] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:94:HDMI-A-2] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.814907] [drm:intel_hdmi_detect [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.841525] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.841576] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.841780] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.841789] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.841794] [drm:drm_detect_monitor_audio] Monitor has basic audio support Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.841800] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.841803] [drm:drm_add_display_info] HDMI: DVI dual 0, max TMDS clock 225000 kHz Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.841852] [drm:drm_add_edid_modes] ELD monitor DELL U2713HM Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.841856] [drm:drm_add_edid_modes] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.841858] [drm:drm_add_edid_modes] ELD size 36, SAD count 1 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.841860] [drm:drm_add_display_info] non_desktop set to 0 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.841862] [drm:drm_add_display_info] HDMI: DVI dual 0, max TMDS clock 225000 kHz Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842481] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:94:HDMI-A-2] probed modes : Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842486] [drm:drm_mode_debug_printmodeline] Modeline 111:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842490] [drm:drm_mode_debug_printmodeline] Modeline 129:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842493] [drm:drm_mode_debug_printmodeline] Modeline 149:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842496] [drm:drm_mode_debug_printmodeline] Modeline 113:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842499] [drm:drm_mode_debug_printmodeline] Modeline 145:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842502] [drm:drm_mode_debug_printmodeline] Modeline 143:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842505] [drm:drm_mode_debug_printmodeline] Modeline 142:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842508] [drm:drm_mode_debug_printmodeline] Modeline 144:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842512] [drm:drm_mode_debug_printmodeline] Modeline 157:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842515] [drm:drm_mode_debug_printmodeline] Modeline 119:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842518] [drm:drm_mode_debug_printmodeline] Modeline 117:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842521] [drm:drm_mode_debug_printmodeline] Modeline 125:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842524] [drm:drm_mode_debug_printmodeline] Modeline 120:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842527] [drm:drm_mode_debug_printmodeline] Modeline 116:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842530] [drm:drm_mode_debug_printmodeline] Modeline 118:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842533] [drm:drm_mode_debug_printmodeline] Modeline 114:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842536] [drm:drm_mode_debug_printmodeline] Modeline 146:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842539] [drm:drm_mode_debug_printmodeline] Modeline 141:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842542] [drm:drm_mode_debug_printmodeline] Modeline 126:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842545] [drm:drm_mode_debug_printmodeline] Modeline 127:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842548] [drm:drm_mode_debug_printmodeline] Modeline 128:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842552] [drm:drm_mode_debug_printmodeline] Modeline 121:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842555] [drm:drm_mode_debug_printmodeline] Modeline 138:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842558] [drm:drm_mode_debug_printmodeline] Modeline 135:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842561] [drm:drm_mode_debug_printmodeline] Modeline 147:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842564] [drm:drm_mode_debug_printmodeline] Modeline 115:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842567] [drm:drm_mode_debug_printmodeline] Modeline 154:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842570] [drm:drm_mode_debug_printmodeline] Modeline 134:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842573] [drm:drm_mode_debug_printmodeline] Modeline 122:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842576] [drm:drm_mode_debug_printmodeline] Modeline 148:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842579] [drm:drm_mode_debug_printmodeline] Modeline 123:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842582] [drm:drm_mode_debug_printmodeline] Modeline 124:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.842868] [drm:drm_mode_addfb2] [FB:97] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.845245] [drm:drm_mode_addfb2] [FB:97] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.845433] [drm:drm_mode_addfb2] [FB:97] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.845886] [drm:drm_mode_addfb2] [FB:140] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.852224] [drm:drm_atomic_state_init] Allocated atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.852236] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 00000000e808f8b5 state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.852248] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 0000000002e9fd8a state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.852251] [drm:drm_atomic_check_only] checking 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.852324] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb 132 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.852370] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.852385] [drm:drm_atomic_commit] committing 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.861830] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.861868] [drm:__drm_atomic_state_free] Freeing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.861939] [drm:drm_mode_setcrtc] [CRTC:43:pipe A] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.861983] [drm:drm_mode_setcrtc] [CONNECTOR:77:eDP-1] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.862002] [drm:drm_atomic_state_init] Allocated atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.862012] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000eb76b9fb state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.862019] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 0000000044a5545d state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.862028] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 00000000eb76b9fb Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.862030] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000044a5545d to [CRTC:43:pipe A] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.862032] [drm:drm_atomic_set_fb_for_plane] Set [FB:140] for plane state 0000000044a5545d Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.862035] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.862049] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 000000008ddb3b41 state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.862053] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000008ddb3b41 to [NOCRTC] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.862055] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000008ddb3b41 to [CRTC:43:pipe A] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.862061] [drm:drm_atomic_check_only] checking 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.862066] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.862070] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:77:eDP-1] keeps [ENCODER:76:DDI A], now on [CRTC:43:pipe A] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.862141] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb 140 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.862188] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.862200] [drm:drm_atomic_commit] committing 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878482] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878523] [drm:__drm_atomic_state_free] Freeing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878636] [drm:drm_atomic_state_init] Allocated atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878649] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 00000000e808f8b5 state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878652] [drm:drm_atomic_check_only] checking 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878658] [drm:drm_atomic_commit] committing 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878692] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878701] [drm:__drm_atomic_state_free] Freeing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878741] [drm:drm_atomic_state_init] Allocated atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878749] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 00000000f68b9c05 state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878751] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000f68b9c05 to [NOCRTC] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878754] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000f68b9c05 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878756] [drm:drm_atomic_check_only] checking 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878759] [drm:drm_atomic_commit] committing 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878774] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878778] [drm:__drm_atomic_state_free] Freeing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878809] [drm:drm_atomic_state_init] Allocated atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878816] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 00000000e808f8b5 state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878819] [drm:drm_atomic_check_only] checking 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878822] [drm:drm_atomic_commit] committing 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878842] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878869] [drm:__drm_atomic_state_free] Freeing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878910] [drm:drm_atomic_state_init] Allocated atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878920] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 00000000f68b9c05 state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878923] [drm:drm_atomic_check_only] checking 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878927] [drm:drm_atomic_commit] committing 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878946] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878952] [drm:__drm_atomic_state_free] Freeing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.878993] [drm:drm_atomic_state_init] Allocated atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879002] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 000000008dc8cee8 state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879005] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000008dc8cee8 to [NOCRTC] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879008] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000008dc8cee8 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879011] [drm:drm_atomic_check_only] checking 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879015] [drm:drm_atomic_commit] committing 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879034] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879040] [drm:__drm_atomic_state_free] Freeing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879079] [drm:drm_atomic_state_init] Allocated atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879088] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 00000000f68b9c05 state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879091] [drm:drm_atomic_check_only] checking 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879095] [drm:drm_atomic_commit] committing 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879114] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879120] [drm:__drm_atomic_state_free] Freeing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879159] [drm:drm_atomic_state_init] Allocated atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879169] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 000000008dc8cee8 state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879172] [drm:drm_atomic_check_only] checking 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879176] [drm:drm_atomic_commit] committing 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879196] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879202] [drm:__drm_atomic_state_free] Freeing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879244] [drm:drm_atomic_state_init] Allocated atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879254] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 00000000b1c255e1 state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879257] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000b1c255e1 to [NOCRTC] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879259] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000b1c255e1 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879262] [drm:drm_atomic_check_only] checking 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879266] [drm:drm_atomic_commit] committing 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879286] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879291] [drm:__drm_atomic_state_free] Freeing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879329] [drm:drm_atomic_state_init] Allocated atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879339] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 000000008dc8cee8 state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879342] [drm:drm_atomic_check_only] checking 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879346] [drm:drm_atomic_commit] committing 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879365] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879370] [drm:__drm_atomic_state_free] Freeing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879410] [drm:drm_atomic_state_init] Allocated atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879421] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 00000000b1c255e1 state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879423] [drm:drm_atomic_check_only] checking 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879428] [drm:drm_atomic_commit] committing 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879448] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879453] [drm:__drm_atomic_state_free] Freeing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879497] [drm:drm_atomic_state_init] Allocated atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879509] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 0000000046b10b03 state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879512] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000046b10b03 to [NOCRTC] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879515] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000046b10b03 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879517] [drm:drm_atomic_check_only] checking 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879521] [drm:drm_atomic_commit] committing 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879543] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879549] [drm:__drm_atomic_state_free] Freeing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879593] [drm:drm_atomic_state_init] Allocated atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879602] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 00000000a0578f83 state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879605] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000a0578f83 to [NOCRTC] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879608] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000a0578f83 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879610] [drm:drm_atomic_check_only] checking 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879614] [drm:drm_atomic_commit] committing 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879635] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879641] [drm:__drm_atomic_state_free] Freeing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879683] [drm:drm_atomic_state_init] Allocated atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879693] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 00000000b199bd3f state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879706] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 0000000002e9fd8a state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879709] [drm:drm_atomic_check_only] checking 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879823] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb 132 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879909] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.879925] [drm:drm_atomic_commit] committing 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.886570] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.886581] [drm:__drm_atomic_state_free] Freeing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.886612] [drm:drm_mode_setcrtc] [CRTC:59:pipe B] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.886640] [drm:drm_atomic_state_init] Allocated atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.886652] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000007f3f3db1 state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.886662] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 00000000966e4e76 state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.886666] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state 000000007f3f3db1 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.886669] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000966e4e76 to [NOCRTC] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.886671] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000966e4e76 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.886675] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.886693] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 0000000065bf929c state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.886698] [drm:drm_atomic_set_crtc_for_connector] Link connector state 0000000065bf929c to [NOCRTC] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.886701] [drm:drm_atomic_check_only] checking 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.886707] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] mode changed Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.886710] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] enable changed Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.886714] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] active changed Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.886717] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.886721] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:84:DP-1] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.886726] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: n, active: n Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.886730] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.886819] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.886895] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 13, actual 13 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.886973] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb -1 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.887044] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.887062] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000eb0756fe state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.887076] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 00000000cda04ffd state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.887089] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000002cdca724 state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.887103] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 0000000036fb692c state to 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.887175] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 332) -> (0 - 502) Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.887240] [drm:skl_compute_wm [i915]] [PLANE:40:cursor A] ddb (332 - 340) -> (502 - 510) Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.887304] [drm:skl_compute_wm [i915]] [PLANE:44:plane 1B] ddb (340 - 672) -> (0 - 0) Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.887374] [drm:skl_compute_wm [i915]] [PLANE:56:cursor B] ddb (672 - 680) -> (0 - 0) Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.887440] [drm:skl_compute_wm [i915]] [PLANE:60:plane 1C] ddb (680 - 1012) -> (510 - 1012) Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.887443] [drm:drm_atomic_commit] committing 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.887582] [drm:intel_disable_pipe [i915]] disabling pipe B Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.904284] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.904478] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.904509] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.904570] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 2, on? 1) for crtc 59 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.904624] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.904668] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.904697] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.904727] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.904754] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.904782] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.904809] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.904838] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.904868] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.904911] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.904939] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919035] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919100] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919126] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919165] [drm:__drm_atomic_state_free] Freeing atomic state 00000000fdd8f2c6 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919266] [drm:drm_atomic_state_init] Allocated atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919275] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 0000000030126982 state to 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919277] [drm:drm_atomic_check_only] checking 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919282] [drm:drm_atomic_commit] committing 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919302] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919308] [drm:__drm_atomic_state_free] Freeing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919336] [drm:drm_atomic_state_init] Allocated atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919341] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 00000000dc2a1906 state to 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919343] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000dc2a1906 to [NOCRTC] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919345] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000dc2a1906 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919347] [drm:drm_atomic_check_only] checking 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919349] [drm:drm_atomic_commit] committing 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919358] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919360] [drm:__drm_atomic_state_free] Freeing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919383] [drm:drm_atomic_state_init] Allocated atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919388] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 0000000030126982 state to 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919390] [drm:drm_atomic_check_only] checking 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919392] [drm:drm_atomic_commit] committing 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919399] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919402] [drm:__drm_atomic_state_free] Freeing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919424] [drm:drm_atomic_state_init] Allocated atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919429] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 00000000dc2a1906 state to 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919431] [drm:drm_atomic_check_only] checking 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919433] [drm:drm_atomic_commit] committing 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919441] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919445] [drm:__drm_atomic_state_free] Freeing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919467] [drm:drm_atomic_state_init] Allocated atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919472] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 000000006a382809 state to 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919473] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000006a382809 to [NOCRTC] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919475] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000006a382809 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919476] [drm:drm_atomic_check_only] checking 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919479] [drm:drm_atomic_commit] committing 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919486] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919488] [drm:__drm_atomic_state_free] Freeing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919508] [drm:drm_atomic_state_init] Allocated atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919513] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 00000000dc2a1906 state to 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919514] [drm:drm_atomic_check_only] checking 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919516] [drm:drm_atomic_commit] committing 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919523] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919525] [drm:__drm_atomic_state_free] Freeing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919545] [drm:drm_atomic_state_init] Allocated atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919550] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 000000006a382809 state to 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919552] [drm:drm_atomic_check_only] checking 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919554] [drm:drm_atomic_commit] committing 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919560] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919563] [drm:__drm_atomic_state_free] Freeing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919583] [drm:drm_atomic_state_init] Allocated atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919589] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 000000004e267ae2 state to 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919590] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000004e267ae2 to [NOCRTC] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919592] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000004e267ae2 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919593] [drm:drm_atomic_check_only] checking 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919595] [drm:drm_atomic_commit] committing 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919603] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919605] [drm:__drm_atomic_state_free] Freeing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919625] [drm:drm_atomic_state_init] Allocated atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919629] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 000000006a382809 state to 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919631] [drm:drm_atomic_check_only] checking 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919633] [drm:drm_atomic_commit] committing 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919639] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919642] [drm:__drm_atomic_state_free] Freeing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919661] [drm:drm_atomic_state_init] Allocated atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919667] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 000000004e267ae2 state to 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919668] [drm:drm_atomic_check_only] checking 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919671] [drm:drm_atomic_commit] committing 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919677] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919680] [drm:__drm_atomic_state_free] Freeing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919702] [drm:drm_atomic_state_init] Allocated atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919707] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 0000000061cbeeda state to 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919708] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000061cbeeda to [NOCRTC] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919710] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000061cbeeda Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919711] [drm:drm_atomic_check_only] checking 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919713] [drm:drm_atomic_commit] committing 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919720] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919723] [drm:__drm_atomic_state_free] Freeing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919743] [drm:drm_atomic_state_init] Allocated atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919748] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 000000004e267ae2 state to 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919750] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000004e267ae2 to [NOCRTC] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919751] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000004e267ae2 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919753] [drm:drm_atomic_check_only] checking 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919755] [drm:drm_atomic_commit] committing 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919762] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919765] [drm:__drm_atomic_state_free] Freeing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919785] [drm:drm_atomic_state_init] Allocated atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919790] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 0000000061cbeeda state to 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919800] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000000618a073 state to 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919801] [drm:drm_atomic_check_only] checking 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919860] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:60:plane 1C] with fb 132 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919902] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:60:plane 1C] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.919914] [drm:drm_atomic_commit] committing 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935643] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935667] [drm:__drm_atomic_state_free] Freeing atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935744] [drm:drm_mode_setcrtc] [CRTC:75:pipe C] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935779] [drm:drm_atomic_state_init] Allocated atomic state 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935792] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000001489da91 state to 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935798] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 0000000011b5351f state to 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935801] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state 000000001489da91 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935802] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000011b5351f to [NOCRTC] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935804] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000011b5351f Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935806] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935820] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 0000000075445cae state to 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935821] [drm:drm_atomic_set_crtc_for_connector] Link connector state 0000000075445cae to [NOCRTC] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935824] [drm:drm_atomic_check_only] checking 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935828] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] mode changed Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935830] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] enable changed Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935831] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] active changed Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935833] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935835] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:94:HDMI-A-2] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935838] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: n, active: n Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935840] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935856] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000081b0e63 state to 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935861] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000af0fd297 state to 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935863] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935869] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 000000006c3ba6db state to 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935875] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 0000000093259357 state to 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935932] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.935969] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.936016] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb 140 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.936117] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 1, on 1, ms 1 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.936157] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:60:plane 1C] with fb -1 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.936194] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:60:plane 1C] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.936235] [drm:bxt_get_dpll [i915]] [CRTC:43:pipe A] using pre-allocated PORT PLL A Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.936273] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe A Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.936317] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 502) -> (0 - 988) Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.936350] [drm:skl_compute_wm [i915]] [PLANE:40:cursor A] ddb (502 - 510) -> (988 - 1020) Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.936383] [drm:skl_compute_wm [i915]] [PLANE:60:plane 1C] ddb (510 - 1012) -> (0 - 0) Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.936418] [drm:skl_compute_wm [i915]] [PLANE:72:cursor C] ddb (1012 - 1020) -> (0 - 0) Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.936422] [drm:drm_atomic_commit] committing 00000000dbd6ebfd Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 120.936500] [drm:intel_edp_backlight_off [i915]] Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 121.144333] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0 Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 121.144440] [drm:intel_disable_pipe [i915]] disabling pipe A Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 121.145053] [drm:intel_edp_panel_off.part.32 [i915]] Turn eDP port A panel power off Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 121.145142] [drm:intel_edp_panel_off.part.32 [i915]] Wait for panel power off time Feb 19 21:47:58 GLK-2-GLKRVP1DDR405 kernel: [ 121.145232] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000060 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.196528] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.196630] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.196724] [drm:intel_power_well_disable [i915]] disabling DDI A IO power well Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.196867] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.196975] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL A (active 1, on? 1) for crtc 43 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.197099] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL A Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.197219] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe C Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.197322] [drm:i915_audio_component_get_eld [i915]] Not valid for port C Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.197451] [drm:intel_disable_pipe [i915]] disabling pipe C Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.198241] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.198352] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.198454] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.198627] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.202932] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.203086] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL C (active 4, on? 1) for crtc 75 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.203218] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL C Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.203346] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.203483] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.203583] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.203681] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.203775] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.203870] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.203965] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.204091] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.204179] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.204252] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.204325] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.204443] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 1, on? 0) for crtc 43 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.204513] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.204736] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.204816] [drm:edp_panel_on [i915]] Turn eDP port A panel power on Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.204891] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.824209] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000060 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.824298] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.824378] [drm:edp_panel_on [i915]] Wait for panel power on Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.824457] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000063 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.926399] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.926515] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.926620] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 121.926798] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.025138] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.025241] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.025342] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.025469] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.025579] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.025683] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.026873] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.026970] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.027068] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.027759] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.027851] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.028583] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.028678] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.029661] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.029758] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:77:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.030352] [drm:intel_enable_pipe [i915]] enabling pipe A Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.030469] [drm:intel_edp_backlight_on [i915]] Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.030566] [drm:intel_panel_enable_backlight [i915]] pipe A Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.030665] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 96000 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.036306] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.036430] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.036531] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.047423] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.047520] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.047654] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.047747] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.047822] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.047921] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.047945] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000dbd6ebfd Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048046] [drm:__drm_atomic_state_free] Freeing atomic state 00000000dbd6ebfd Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048157] [drm:drm_atomic_state_init] Allocated atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048172] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 0000000089d9919b state to 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048176] [drm:drm_atomic_check_only] checking 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048184] [drm:drm_atomic_commit] committing 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048225] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048233] [drm:__drm_atomic_state_free] Freeing atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048285] [drm:drm_atomic_state_init] Allocated atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048299] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 00000000c2ba9554 state to 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048302] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000c2ba9554 to [NOCRTC] Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048306] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000c2ba9554 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048309] [drm:drm_atomic_check_only] checking 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048313] [drm:drm_atomic_commit] committing 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048337] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048347] [drm:__drm_atomic_state_free] Freeing atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048402] [drm:drm_atomic_state_init] Allocated atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048413] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 0000000089d9919b state to 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048416] [drm:drm_atomic_check_only] checking 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048420] [drm:drm_atomic_commit] committing 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048441] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048447] [drm:__drm_atomic_state_free] Freeing atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048489] [drm:drm_atomic_state_init] Allocated atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048499] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 00000000c2ba9554 state to 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048503] [drm:drm_atomic_check_only] checking 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048507] [drm:drm_atomic_commit] committing 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048527] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048534] [drm:__drm_atomic_state_free] Freeing atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048575] [drm:drm_atomic_state_init] Allocated atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048584] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 0000000099aea991 state to 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048588] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000099aea991 to [NOCRTC] Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048590] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000099aea991 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048593] [drm:drm_atomic_check_only] checking 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048597] [drm:drm_atomic_commit] committing 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048621] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048627] [drm:__drm_atomic_state_free] Freeing atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048671] [drm:drm_atomic_state_init] Allocated atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048681] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 000000002b9437ad state to 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048684] [drm:drm_atomic_check_only] checking 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048688] [drm:drm_atomic_commit] committing 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048709] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048715] [drm:__drm_atomic_state_free] Freeing atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048757] [drm:drm_atomic_state_init] Allocated atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048767] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 00000000c2ba9554 state to 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048770] [drm:drm_atomic_check_only] checking 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048774] [drm:drm_atomic_commit] committing 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048794] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048800] [drm:__drm_atomic_state_free] Freeing atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048844] [drm:drm_atomic_state_init] Allocated atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048853] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 000000009ebe54ce state to 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048856] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000009ebe54ce to [NOCRTC] Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048859] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000009ebe54ce Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048862] [drm:drm_atomic_check_only] checking 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048866] [drm:drm_atomic_commit] committing 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048888] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048894] [drm:__drm_atomic_state_free] Freeing atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048933] [drm:drm_atomic_state_init] Allocated atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048943] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 00000000c2ba9554 state to 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048946] [drm:drm_atomic_check_only] checking 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048950] [drm:drm_atomic_commit] committing 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048970] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.048977] [drm:__drm_atomic_state_free] Freeing atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049016] [drm:drm_atomic_state_init] Allocated atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049027] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 000000009ebe54ce state to 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049030] [drm:drm_atomic_check_only] checking 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049035] [drm:drm_atomic_commit] committing 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049058] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049065] [drm:__drm_atomic_state_free] Freeing atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049106] [drm:drm_atomic_state_init] Allocated atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049120] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 00000000113b7ebf state to 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049123] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000113b7ebf to [NOCRTC] Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049126] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000113b7ebf Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049129] [drm:drm_atomic_check_only] checking 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049133] [drm:drm_atomic_commit] committing 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049157] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049164] [drm:__drm_atomic_state_free] Freeing atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049205] [drm:drm_atomic_state_init] Allocated atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049216] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 0000000099aea991 state to 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049219] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000099aea991 to [NOCRTC] Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049222] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000099aea991 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049224] [drm:drm_atomic_check_only] checking 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049229] [drm:drm_atomic_commit] committing 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049250] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049257] [drm:__drm_atomic_state_free] Freeing atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049294] [drm:drm_atomic_state_init] Allocated atomic state 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049316] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 00000000b9a2050b state to 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049328] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000007a231afd state to 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049332] [drm:drm_atomic_check_only] checking 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049342] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049348] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:77:eDP-1] keeps [ENCODER:76:DDI A], now on [CRTC:43:pipe A] Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049353] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: y, active: y Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049357] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049372] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 00000000f15f7b0a state to 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049379] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049463] [drm:intel_atomic_check [i915]] [CONNECTOR:77:eDP-1] checking for sink bpp constrains Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049541] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049553] [drm:drm_mode_debug_printmodeline] Modeline 80:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049635] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 141000KHz Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049719] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049796] [drm:intel_dp_compute_config [i915]] DP link bw required 423000 available 540000 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049873] [drm:intel_dp_compute_config [i915]] PSR disable by flag Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.049953] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.050035] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][modeset] Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.050113] [drm:intel_dump_pipe_config [i915]] output_types: EDP (0x100) Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.050189] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.050267] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6571076, gmch_n: 8388608, link_m: 273794, link_n: 524288, tu: 64 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.050344] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.050417] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.050424] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.050498] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.050506] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.050582] [drm:intel_dump_pipe_config [i915]] crtc timings: 141000 1920 1936 1952 2104 1080 1083 1097 1116, type: 0x48 flags: 0xa Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.050659] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 141000 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.050734] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.050808] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.050882] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.050968] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.051041] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.051118] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] FB:140, fb = 1920x1080 format = XR24 little-endian (0x34325258) Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.051194] [drm:intel_dump_pipe_config [i915]] scaler:-1 src 0x0+1920+1080 dst 0x0+1920+1080 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.051271] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.051345] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.051418] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.051492] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.051575] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.051650] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.051735] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb 140 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.051812] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 1, on 1, ms 1 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.051895] [drm:bxt_get_dpll [i915]] [CRTC:43:pipe A] using pre-allocated PORT PLL A Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.051972] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe A Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.051987] [drm:drm_atomic_commit] committing 00000000c49eebc8 Feb 19 21:47:59 GLK-2-GLKRVP1DDR405 kernel: [ 122.052160] [drm:intel_edp_backlight_off [i915]] Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.260341] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0 Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.260451] [drm:intel_disable_pipe [i915]] disabling pipe A Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.266479] [drm:intel_edp_panel_off.part.32 [i915]] Turn eDP port A panel power off Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.266574] [drm:intel_edp_panel_off.part.32 [i915]] Wait for panel power off time Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.266669] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000060 Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.317706] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.317810] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.317906] [drm:intel_power_well_disable [i915]] disabling DDI A IO power well Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.318052] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.318165] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL A (active 1, on? 1) for crtc 43 Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.318293] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL A Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.318408] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.318508] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.318605] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.318701] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.318796] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.318890] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.318990] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.319086] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.319181] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.319319] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 1, on? 0) for crtc 43 Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.319413] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.319600] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010 Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.319710] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.319818] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0 Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.319915] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.320028] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.320161] [drm:edp_panel_on [i915]] Turn eDP port A panel power on Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.320266] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.421014] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00000010, dig 0x18001819, pins 0x00000020 Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.421106] [drm:intel_hpd_irq_handler [i915]] digital hpd port B - short Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.421260] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on port B - short Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.421347] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.421504] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.421699] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.944360] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000060 Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.944471] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.944570] [drm:edp_panel_on [i915]] Wait for panel power on Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 122.944668] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000063 Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 123.046575] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010 Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 123.046690] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 123.046795] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1 Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 123.145674] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 123.145775] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 123.145876] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 123.146013] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 123.146122] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 123.146226] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 123.147416] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 123.147509] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:48:00 GLK-2-GLKRVP1DDR405 kernel: [ 123.147605] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.148364] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.148473] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.149453] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.149554] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:77:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.150150] [drm:intel_enable_pipe [i915]] enabling pipe A Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.150270] [drm:intel_edp_backlight_on [i915]] Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.150369] [drm:intel_panel_enable_backlight [i915]] pipe A Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.150469] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 96000 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.156314] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.156438] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.156537] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.167232] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.167352] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.167512] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.167554] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000c49eebc8 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.167596] [drm:__drm_atomic_state_free] Freeing atomic state 00000000c49eebc8 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.167714] [drm:drm_atomic_state_init] Allocated atomic state 00000000fa051a3d Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.168198] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 00 02 02 06 03 00 00 00 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169244] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169257] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 0000000011976385 state to 00000000fa051a3d Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169264] [drm:drm_atomic_check_only] checking 00000000fa051a3d Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169354] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169365] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169453] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169459] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:84:DP-1] Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169467] [drm:drm_atomic_commit] committing 00000000fa051a3d Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169502] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000fa051a3d Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169513] [drm:__drm_atomic_state_free] Freeing atomic state 00000000fa051a3d Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169657] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169662] [drm:drm_atomic_state_init] Allocated atomic state 0000000010d3b731 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169681] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:90:HDMI-A-1] 0000000071536413 state to 0000000010d3b731 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169686] [drm:drm_atomic_check_only] checking 0000000010d3b731 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169692] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:90:HDMI-A-1] Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169697] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:90:HDMI-A-1] Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169703] [drm:drm_atomic_commit] committing 0000000010d3b731 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169724] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000010d3b731 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169737] [drm:__drm_atomic_state_free] Freeing atomic state 0000000010d3b731 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169777] [drm:drm_atomic_state_init] Allocated atomic state 0000000010d3b731 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169797] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 000000002d63b92b state to 0000000010d3b731 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169801] [drm:drm_atomic_check_only] checking 0000000010d3b731 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169807] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169811] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:94:HDMI-A-2] Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169816] [drm:drm_atomic_commit] committing 0000000010d3b731 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169835] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000010d3b731 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.169844] [drm:__drm_atomic_state_free] Freeing atomic state 0000000010d3b731 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.324171] [drm:drm_atomic_state_init] Allocated atomic state 000000000f462726 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.324180] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 000000002c476bad state to 000000000f462726 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.324190] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000cd24c7ab state to 000000000f462726 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.324192] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000002c476bad to [CRTC:43:pipe A] Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.324194] [drm:drm_atomic_set_fb_for_plane] Set [FB:131] for plane state 000000002c476bad Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.324195] [drm:drm_atomic_check_only] checking 000000000f462726 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.324250] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb 131 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.324281] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 0 -> 1, off 0, on 1, ms 0 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.324294] [drm:drm_atomic_commit] committing 000000000f462726 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.324362] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000000f462726 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.324370] [drm:__drm_atomic_state_free] Freeing atomic state 000000000f462726 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.324386] [drm:drm_atomic_set_fb_for_plane] Set [FB:131] for plane state 000000001f9e9406 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.324418] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb 131 Feb 19 21:48:01 GLK-2-GLKRVP1DDR405 kernel: [ 123.324449] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 123.422197] PM: suspend entry (deep) Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 123.422200] PM: Syncing filesystems ... done. Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 123.423473] Freezing user space processes ... (elapsed 0.001 seconds) done. Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 123.424773] OOM killer disabled. Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 123.424773] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done. Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 123.425931] Suspending console(s) (use no_console_suspend to debug) Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.220120] sd 0:0:0:0: [sda] Synchronizing SCSI cache Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.220740] sd 0:0:0:0: [sda] Stopping disk Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.222979] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223045] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223180] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223312] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223341] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223712] [drm:drm_atomic_state_init] Allocated atomic state 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223722] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000004110ac54 state to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223726] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000001d209655 state to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223731] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 0000000094c88f9c state to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223736] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 00000000c4badb63 state to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223741] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 00000000b945c1f4 state to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223748] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 000000000c329804 state to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223756] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 00000000ed0aeaca state to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223760] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 00000000250fdcc7 state to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223766] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 00000000d7c0a359 state to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223770] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 00000000386ef7f6 state to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223775] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 0000000008fba07f state to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223780] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 0000000063a02161 state to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223784] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 000000007dc05a11 state to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223791] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 00000000f1984474 state to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223797] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 00000000a3504d8d state to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223802] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 00000000546f3480 state to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223806] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 0000000087d68c09 state to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223810] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 000000007eb876d0 state to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223822] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 00000000209c0800 state to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223828] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 000000002a9f4045 state to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223833] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:90:HDMI-A-1] 000000000a5e8a70 state to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223837] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 000000007d4949a9 state to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223846] [drm:drm_atomic_state_init] Allocated atomic state 00000000d4280ce4 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223850] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 0000000044f8e72c state to 00000000d4280ce4 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223852] [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state 0000000044f8e72c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223856] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 00000000dc16ddff state to 00000000d4280ce4 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223864] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 00000000c2f7c533 state to 00000000d4280ce4 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223866] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000d4280ce4 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223872] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 000000001787b6ff state to 00000000d4280ce4 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223876] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000d925f289 state to 00000000d4280ce4 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223878] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000d4280ce4 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223882] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 0000000073697094 state to 00000000d4280ce4 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223884] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000d4280ce4 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223885] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000001787b6ff to [NOCRTC] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223886] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000dc16ddff to [NOCRTC] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223888] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000dc16ddff Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223889] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000c2f7c533 to [NOCRTC] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223890] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000c2f7c533 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223891] [drm:drm_atomic_check_only] checking 00000000d4280ce4 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223895] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] mode changed Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223897] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] enable changed Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223898] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] active changed Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223900] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223902] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:77:eDP-1] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223905] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: n, active: n Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223906] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000d4280ce4 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223944] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.223976] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.224010] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.224046] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.224077] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.224107] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.224141] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 988) -> (0 - 0) Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.224168] [drm:skl_compute_wm [i915]] [PLANE:40:cursor A] ddb (988 - 1020) -> (0 - 0) Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.224170] [drm:drm_atomic_commit] committing 00000000d4280ce4 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.224233] [drm:intel_edp_backlight_off [i915]] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.292949] hpet_rtc_timer_reinit: 13 callbacks suppressed Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.292949] hpet1: lost 7160 rtc interrupts Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.432100] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.432140] [drm:intel_disable_pipe [i915]] disabling pipe A Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.433063] [drm:intel_edp_panel_off.part.32 [i915]] Turn eDP port A panel power off Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.433096] [drm:intel_edp_panel_off.part.32 [i915]] Wait for panel power off time Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.433132] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status 80000008 control 00000060 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.485280] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.485309] [drm:intel_power_well_disable [i915]] disabling DDI A IO power well Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.485374] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.485410] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL A (active 1, on? 1) for crtc 43 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.485467] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL A Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.485510] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.485543] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.485575] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.485607] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.485635] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.485666] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.485699] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.485729] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.485759] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.485788] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.485829] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.485848] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000d4280ce4 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.485867] [drm:__drm_atomic_state_free] Freeing atomic state 00000000d4280ce4 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.493119] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.493151] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.493182] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.493210] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.493241] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.493269] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.493297] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.493325] [drm:intel_power_well_disable [i915]] disabling DC off Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.493357] [drm:gen9_enable_dc5 [i915]] Enabling DC5 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.493390] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.493420] [drm:intel_power_well_disable [i915]] disabling always-on Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.494387] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.494459] [drm:intel_power_well_disable [i915]] disabling power well 1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.494494] [drm:hsw_power_well_disable [i915]] power well 1 forced on (bios:1 driver:0 kvmr:0 debug:0) Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.494560] [drm:bxt_enable_dc9 [i915]] Enabling DC9 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.494591] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 08 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.558010] ACPI: Preparing to enter system sleep state S3 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.561354] ACPI: EC: event blocked Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.561355] ACPI: EC: EC stopped Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.561357] PM: Saving platform NVS memory Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.561367] Disabling non-boot CPUs ... Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.581750] IRQ 124: no longer affine to CPU1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.582779] smpboot: CPU 1 is now offline Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.609571] IRQ fixup: irq 1 move in progress, old vector 33 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.609670] IRQ 122: no longer affine to CPU2 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.610702] smpboot: CPU 2 is now offline Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.633686] IRQ 1: no longer affine to CPU3 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.633704] IRQ 8: no longer affine to CPU3 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.633713] IRQ 9: no longer affine to CPU3 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.633730] IRQ 27: no longer affine to CPU3 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.633740] IRQ 28: no longer affine to CPU3 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.633751] IRQ 30: no longer affine to CPU3 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.633772] IRQ 33: no longer affine to CPU3 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.633782] IRQ 34: no longer affine to CPU3 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.634870] smpboot: CPU 3 is now offline Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.640969] ACPI: Low-level resume complete Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.641179] ACPI: EC: EC started Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.641180] PM: Restoring platform NVS memory Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.642247] Enabling non-boot CPUs ... Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.642525] x86: Booting SMP configuration: Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.642527] smpboot: Booting Node 0 Processor 1 APIC 0x2 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.643782] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.644384] cache: parent cpu1 should not be sleeping Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.645779] CPU1 is up Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.645932] smpboot: Booting Node 0 Processor 2 APIC 0x4 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.647211] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.647769] cache: parent cpu2 should not be sleeping Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.649373] CPU2 is up Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.649556] smpboot: Booting Node 0 Processor 3 APIC 0x6 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.650849] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.651410] cache: parent cpu3 should not be sleeping Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.653058] CPU3 is up Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.662543] ACPI: Waking up from system sleep state S3 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.753760] ACPI: button: The lid device is not compliant to SW_LID. Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.827255] [drm:gen9_sanitize_dc_state [i915]] Resetting DC state tracking from 08 to 00 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.827323] [drm:bxt_disable_dc9 [i915]] Disabling DC9 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.827390] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.827466] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.827535] [drm:intel_power_well_enable [i915]] enabling power well 1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.827623] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.827978] [drm:intel_power_well_enable [i915]] enabling always-on Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.828043] [drm:intel_power_well_enable [i915]] enabling DC off Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.828108] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.828178] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.828248] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.828407] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.828606] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.828805] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.828869] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 124.828933] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.003863] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x799d3018 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.003983] ACPI: EC: event unblocked Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.004109] [drm:intel_opregion_setup [i915]] Public ACPI methods supported Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.004206] [drm:intel_opregion_setup [i915]] ASLE supported Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.004421] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA) Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.004548] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:10001010 hp_port:38 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.004661] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.004760] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.005448] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 11 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.005956] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.006049] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.006170] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.006270] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.006367] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.006464] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.006577] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.006673] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:43:pipe A] hw state readout: disabled Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.006781] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.006875] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.006969] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.007063] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.007157] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.007250] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:59:pipe B] hw state readout: disabled Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.007352] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.007449] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.007546] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.007648] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.007846] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.007944] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:75:pipe C] hw state readout: disabled Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.008040] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL A hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.008134] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL B hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.008228] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.008323] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:76:DDI A] hw state readout: disabled, pipe A Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.008419] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:83:DDI B] hw state readout: disabled, pipe A Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.008512] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:85:DP-MST A] hw state readout: disabled, pipe A Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.008606] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:86:DP-MST B] hw state readout: disabled, pipe B Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.008698] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:87:DP-MST C] hw state readout: disabled, pipe C Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.008794] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:93:DDI C] hw state readout: disabled, pipe A Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.008892] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:77:eDP-1] hw state readout: disabled Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.008988] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:84:DP-1] hw state readout: disabled Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.009082] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:90:HDMI-A-1] hw state readout: disabled Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.009177] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:94:HDMI-A-2] hw state readout: disabled Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.009282] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][setup_hw_state] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.009378] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.009473] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.009567] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.009659] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.009673] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.009765] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.009773] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.009868] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.009962] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.010056] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.010149] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.010242] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.010342] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.010435] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.010541] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.010637] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.010730] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.010823] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.010916] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.011009] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][setup_hw_state] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.011101] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.011195] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.011287] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.011381] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.011389] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.011482] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.011489] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.011584] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.011678] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.011770] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.011862] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.011954] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.012054] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.012147] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.012240] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.012332] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.012424] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.012516] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.012608] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.012700] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][setup_hw_state] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.012792] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.012883] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.012974] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.013064] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.013072] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.013163] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.013170] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.013263] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.013355] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.013446] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.013538] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.013629] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.013728] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.013819] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.013911] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014003] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014095] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014187] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014279] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014356] sd 0:0:0:0: [sda] Starting disk Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014435] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014478] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014515] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014552] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014590] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014627] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014664] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014685] [drm:drm_atomic_check_only] checking 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014692] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] mode changed Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014694] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] enable changed Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014695] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] active changed Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014700] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014703] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:77:eDP-1] keeps [ENCODER:76:DDI A], now on [CRTC:43:pipe A] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014705] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014707] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:84:DP-1] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014709] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:90:HDMI-A-1] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014710] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:90:HDMI-A-1] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014712] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014714] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:94:HDMI-A-2] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014716] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: y, active: y Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014719] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014722] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: n, active: n Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014724] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014729] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: n, active: n Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014731] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014735] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014773] [drm:intel_atomic_check [i915]] [CONNECTOR:77:eDP-1] checking for sink bpp constrains Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014815] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014826] [drm:drm_mode_debug_printmodeline] Modeline 80:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014865] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 141000KHz Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014906] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014945] [drm:intel_dp_compute_config [i915]] DP link bw required 423000 available 540000 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.014984] [drm:intel_dp_compute_config [i915]] PSR disable by flag Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015024] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015064] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][modeset] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015100] [drm:intel_dump_pipe_config [i915]] output_types: EDP (0x100) Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015135] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015174] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6571076, gmch_n: 8388608, link_m: 273794, link_n: 524288, tu: 64 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015208] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015243] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015246] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015280] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015283] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015319] [drm:intel_dump_pipe_config [i915]] crtc timings: 141000 1920 1936 1952 2104 1080 1083 1097 1116, type: 0x48 flags: 0xa Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015354] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 141000 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015389] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015423] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015458] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015496] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015531] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015566] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015600] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015635] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015670] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015704] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015743] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015778] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015820] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb 140 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015858] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015896] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb 131 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015931] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.015970] [drm:bxt_get_dpll [i915]] [CRTC:43:pipe A] using pre-allocated PORT PLL A Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.016007] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe A Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.016049] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 0) -> (0 - 988) Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.016083] [drm:skl_compute_wm [i915]] [PLANE:40:cursor A] ddb (0 - 0) -> (988 - 1020) Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.016085] [drm:drm_atomic_commit] committing 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.016396] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.016542] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.016609] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.016644] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.016679] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.016714] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.016749] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.016784] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.016819] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.016855] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.016890] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.016925] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.016961] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.016996] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.017052] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 1, on? 0) for crtc 43 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.017089] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.017233] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.017269] [drm:edp_panel_on [i915]] Turn eDP port A panel power on Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.017299] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.017333] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000062 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.017362] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.017392] [drm:edp_panel_on [i915]] Wait for panel power on Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.017423] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 0000000a control 00000063 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.025434] r8169 0000:01:00.0 enp1s0: link down Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.119483] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.119573] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.119658] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.119813] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.218732] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.218813] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.218894] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.218984] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.219073] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.219158] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.220313] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.220388] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.220467] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.221130] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.221203] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.221842] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.221917] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.222866] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.222944] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:77:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.223521] [drm:intel_enable_pipe [i915]] enabling pipe A Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.223615] [drm:intel_edp_backlight_on [i915]] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.223697] [drm:intel_panel_enable_backlight [i915]] pipe A Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.223778] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 96000 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.230538] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.230609] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.230669] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.240550] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.240625] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.240739] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.240817] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.240879] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.240915] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.241036] [drm:__drm_atomic_state_free] Freeing atomic state 00000000df89f07c Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.241151] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.241233] [drm:intel_opregion_register [i915]] 4 outputs detected Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.241322] [drm:intel_dp_detect [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.241405] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.241481] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.241556] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.244341] acpi LNXPOWER:1b: Turning OFF Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.244396] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.245018] [drm:drm_helper_hpd_irq_event] [CONNECTOR:77:eDP-1] status updated from connected to connected Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.245095] [drm:intel_dp_detect [i915]] [CONNECTOR:84:DP-1] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.245170] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.245285] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.245472] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.245955] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 00 02 02 06 06 00 00 00 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.246308] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.246383] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.246457] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.246842] [drm:drm_dp_read_desc] DP sink: OUI 00-00-00 dev-ID HW-rev 0.0 SW-rev 0.0 quirks 0x0000 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.246920] [drm:intel_dp_detect [i915]] Sink is not MST capable Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.248224] acpi LNXPOWER:1a: Turning OFF Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.250840] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.250914] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.250987] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.251001] [drm:drm_helper_hpd_irq_event] [CONNECTOR:84:DP-1] status updated from connected to connected Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.251078] [drm:intel_hdmi_detect [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.251326] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.251401] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.251613] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.251617] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.251663] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.251692] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.252275] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.252304] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.252486] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.252514] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.252696] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.252700] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.252702] [drm:drm_helper_hpd_irq_event] [CONNECTOR:90:HDMI-A-1] status updated from disconnected to disconnected Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.252731] [drm:intel_hdmi_detect [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.256908] acpi LNXPOWER:0d: Turning OFF Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.258047] acpi LNXPOWER:0b: Turning OFF Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.260888] acpi LNXPOWER:09: Turning OFF Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.263653] acpi LNXPOWER:07: Turning OFF Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.265784] acpi LNXPOWER:05: Turning OFF Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.268564] acpi LNXPOWER:03: Turning OFF Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.270482] atkbd serio0: Failed to deactivate keyboard on isa0060/serio0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.271680] acpi LNXPOWER:01: Turning OFF Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.274094] OOM killer enabled. Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.274095] Restarting tasks ... done. Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.293013] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.293047] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.293238] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.293246] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.293250] [drm:drm_detect_monitor_audio] Monitor has basic audio support Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.293254] [drm:drm_helper_hpd_irq_event] [CONNECTOR:94:HDMI-A-2] status updated from connected to connected Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.494133] PM: suspend exit Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.518573] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300) Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.531351] ata1.00: configured for UDMA/133 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.540289] [drm:drm_atomic_state_init] Allocated atomic state 00000000f5946cbe Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.540297] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 000000002c476bad state to 00000000f5946cbe Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.540305] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000005db9e11a state to 00000000f5946cbe Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.540307] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000002c476bad to [NOCRTC] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.540308] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000002c476bad Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.540310] [drm:drm_atomic_check_only] checking 00000000f5946cbe Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.540365] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb -1 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.540397] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 1 -> 0, off 1, on 0, ms 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.540408] [drm:drm_atomic_commit] committing 00000000f5946cbe Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.540456] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000f5946cbe Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.540465] [drm:__drm_atomic_state_free] Freeing atomic state 00000000f5946cbe Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.629232] [drm:drm_atomic_state_init] Allocated atomic state 00000000f5946cbe Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.629241] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 000000003176e56a state to 00000000f5946cbe Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.629252] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000000b9987b5 state to 00000000f5946cbe Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.629254] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000003176e56a to [CRTC:43:pipe A] Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.629255] [drm:drm_atomic_set_fb_for_plane] Set [FB:131] for plane state 000000003176e56a Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.629257] [drm:drm_atomic_check_only] checking 00000000f5946cbe Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.629312] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb 131 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.629344] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 0 -> 1, off 0, on 1, ms 0 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.629356] [drm:drm_atomic_commit] committing 00000000f5946cbe Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.629410] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000f5946cbe Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.629418] [drm:__drm_atomic_state_free] Freeing atomic state 00000000f5946cbe Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.629433] [drm:drm_atomic_set_fb_for_plane] Set [FB:131] for plane state 00000000da4c4cc9 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.629465] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb 131 Feb 19 21:48:18 GLK-2-GLKRVP1DDR405 kernel: [ 125.629496] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:48:19 GLK-2-GLKRVP1DDR405 kernel: [ 125.646629] atkbd serio0: Failed to enable keyboard on isa0060/serio0 Feb 19 21:48:19 GLK-2-GLKRVP1DDR405 kernel: [ 125.728276] PM: suspend entry (deep) Feb 19 21:48:19 GLK-2-GLKRVP1DDR405 kernel: [ 125.728279] PM: Syncing filesystems ... done. Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 125.736228] Freezing user space processes ... (elapsed 0.001 seconds) done. Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 125.737536] OOM killer disabled. Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 125.737536] Freezing remaining freezable tasks ... (elapsed 0.000 seconds) done. Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 125.738574] Suspending console(s) (use no_console_suspend to debug) Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.527324] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.527442] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.527583] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.527710] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.527739] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528216] [drm:drm_atomic_state_init] Allocated atomic state 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528226] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000007a231afd state to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528232] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000cd24c7ab state to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528236] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000f0faa210 state to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528241] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 00000000fe531068 state to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528245] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 000000002c476bad state to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528253] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 00000000250fdcc7 state to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528260] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 00000000ed4e2a26 state to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528265] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 0000000097afbca6 state to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528270] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 0000000067df3f2a state to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528276] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 000000006231feca state to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528281] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 0000000099aea991 state to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528284] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 00000000c2ba9554 state to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528291] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000678a856b state to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528296] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 00000000e6102d63 state to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528300] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 0000000089d9919b state to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528304] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 00000000d486aaeb state to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528312] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 0000000011b5351f state to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528320] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 000000002a08db8e state to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528333] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 000000007743aa10 state to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528338] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 000000007afc959a state to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528343] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:90:HDMI-A-1] 00000000f54c78ea state to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528349] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 00000000057a4910 state to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528365] [drm:drm_atomic_state_init] Allocated atomic state 00000000a29091be Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528371] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000004d155375 state to 00000000a29091be Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528373] [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state 000000004d155375 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528379] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 00000000aee87bb0 state to 00000000a29091be Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528383] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 000000006a382809 state to 00000000a29091be Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528385] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000a29091be Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528390] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 00000000db3615fc state to 00000000a29091be Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528395] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 0000000055d7c9e3 state to 00000000a29091be Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528397] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000a29091be Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528402] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000005db9e11a state to 00000000a29091be Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528404] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000a29091be Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528406] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000db3615fc to [NOCRTC] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528407] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000aee87bb0 to [NOCRTC] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528408] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000aee87bb0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528409] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000006a382809 to [NOCRTC] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528410] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000006a382809 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528412] [drm:drm_atomic_check_only] checking 00000000a29091be Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528416] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] mode changed Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528417] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] enable changed Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528418] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] active changed Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528420] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528422] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:77:eDP-1] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528425] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: n, active: n Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528426] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000a29091be Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528465] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528497] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528531] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528562] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528592] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528621] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528655] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 988) -> (0 - 0) Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528683] [drm:skl_compute_wm [i915]] [PLANE:40:cursor A] ddb (988 - 1020) -> (0 - 0) Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528685] [drm:drm_atomic_commit] committing 00000000a29091be Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.528745] [drm:intel_edp_backlight_off [i915]] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.530563] sd 0:0:0:0: [sda] Synchronizing SCSI cache Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.531180] sd 0:0:0:0: [sda] Stopping disk Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.594345] hpet1: lost 7160 rtc interrupts Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.734529] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.734567] [drm:intel_disable_pipe [i915]] disabling pipe A Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.740047] [drm:intel_edp_panel_off.part.32 [i915]] Turn eDP port A panel power off Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.740079] [drm:intel_edp_panel_off.part.32 [i915]] Wait for panel power off time Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.740115] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status 80000008 control 00000060 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.792282] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.792314] [drm:intel_power_well_disable [i915]] disabling DDI A IO power well Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.792376] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.792412] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL A (active 1, on? 1) for crtc 43 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.792469] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL A Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.792513] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.792545] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.792574] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.792608] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.792637] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.792668] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.792698] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.792728] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.792758] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.792790] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.792827] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.792846] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000a29091be Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.792858] [drm:__drm_atomic_state_free] Freeing atomic state 00000000a29091be Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.794081] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.794111] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.794139] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.794170] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.794198] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.794226] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.794254] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.794284] [drm:intel_power_well_disable [i915]] disabling DC off Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.794318] [drm:gen9_enable_dc5 [i915]] Enabling DC5 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.794351] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.794381] [drm:intel_power_well_disable [i915]] disabling always-on Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.795355] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.795439] [drm:intel_power_well_disable [i915]] disabling power well 1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.795475] [drm:hsw_power_well_disable [i915]] power well 1 forced on (bios:1 driver:0 kvmr:0 debug:0) Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.795541] [drm:bxt_enable_dc9 [i915]] Enabling DC9 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.795572] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 08 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.865836] ACPI: Preparing to enter system sleep state S3 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.870333] ACPI: EC: event blocked Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.870335] ACPI: EC: EC stopped Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.870337] PM: Saving platform NVS memory Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.870349] Disabling non-boot CPUs ... Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.890111] smpboot: CPU 1 is now offline Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.918535] smpboot: CPU 2 is now offline Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.953141] smpboot: CPU 3 is now offline Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.959056] ACPI: Low-level resume complete Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.959257] ACPI: EC: EC started Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.959259] PM: Restoring platform NVS memory Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.960320] Enabling non-boot CPUs ... Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.960540] x86: Booting SMP configuration: Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.960541] smpboot: Booting Node 0 Processor 1 APIC 0x2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.961470] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.961925] cache: parent cpu1 should not be sleeping Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.962949] CPU1 is up Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.963074] smpboot: Booting Node 0 Processor 2 APIC 0x4 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.963936] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.964415] cache: parent cpu2 should not be sleeping Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.965517] CPU2 is up Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.965636] smpboot: Booting Node 0 Processor 3 APIC 0x6 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.966500] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.967005] cache: parent cpu3 should not be sleeping Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.968158] CPU3 is up Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 126.974489] ACPI: Waking up from system sleep state S3 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.137617] [drm:gen9_sanitize_dc_state [i915]] Resetting DC state tracking from 08 to 00 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.137686] [drm:bxt_disable_dc9 [i915]] Disabling DC9 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.137753] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.137829] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.137899] [drm:intel_power_well_enable [i915]] enabling power well 1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.137986] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.138343] [drm:intel_power_well_enable [i915]] enabling always-on Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.138408] [drm:intel_power_well_enable [i915]] enabling DC off Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.138475] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.138544] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.138614] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.138771] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.138944] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.139143] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.139207] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.139271] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.314244] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x799d3018 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.314459] [drm:intel_opregion_setup [i915]] Public ACPI methods supported Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.314461] ACPI: EC: event unblocked Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.314549] [drm:intel_opregion_setup [i915]] ASLE supported Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.314784] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA) Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.314898] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:10001010 hp_port:38 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.314998] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.315087] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.315732] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 11 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.316203] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.316286] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.316396] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.316484] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.316570] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.316656] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.316740] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.316824] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:43:pipe A] hw state readout: disabled Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.316950] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.317025] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.317101] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.317176] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.317251] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.317325] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:59:pipe B] hw state readout: disabled Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.317408] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.317483] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.317558] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.317632] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.317707] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.317781] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:75:pipe C] hw state readout: disabled Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.317862] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL A hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.317940] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL B hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.318018] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.318218] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:76:DDI A] hw state readout: disabled, pipe A Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.318294] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:83:DDI B] hw state readout: disabled, pipe A Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.318368] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:85:DP-MST A] hw state readout: disabled, pipe A Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.318442] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:86:DP-MST B] hw state readout: disabled, pipe B Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.318516] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:87:DP-MST C] hw state readout: disabled, pipe C Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.318592] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:93:DDI C] hw state readout: disabled, pipe A Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.318668] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:77:eDP-1] hw state readout: disabled Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.318745] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:84:DP-1] hw state readout: disabled Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.318821] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:90:HDMI-A-1] hw state readout: disabled Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.318897] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:94:HDMI-A-2] hw state readout: disabled Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.318983] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][setup_hw_state] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.319059] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.319136] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.319211] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.319286] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.319297] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.319371] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.319377] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.319453] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.319528] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.319602] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.319677] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.319751] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.319831] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.319906] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.319981] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.320055] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.320130] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.320205] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.320279] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.320354] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][setup_hw_state] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.320428] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.320502] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.320576] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.320649] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.320655] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.320728] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.320734] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.320810] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.320885] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.320967] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.321042] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.321117] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.321197] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.321271] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.321346] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.321422] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.321498] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.321573] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.321648] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.321722] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][setup_hw_state] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.321796] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.321871] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.321945] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.322018] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.322024] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.322097] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.322103] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.322179] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.322254] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.322328] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.322403] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.322477] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.322557] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.322631] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.322706] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.322780] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.322854] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.322928] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323002] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323139] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323212] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323285] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323357] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323430] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323501] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323572] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323596] [drm:drm_atomic_check_only] checking 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323607] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] mode changed Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323611] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] enable changed Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323614] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] active changed Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323622] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323628] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:77:eDP-1] keeps [ENCODER:76:DDI A], now on [CRTC:43:pipe A] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323633] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323636] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:84:DP-1] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323640] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:90:HDMI-A-1] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323643] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:90:HDMI-A-1] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323647] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323650] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:94:HDMI-A-2] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323654] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: y, active: y Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323659] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323665] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: n, active: n Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323669] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323674] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: n, active: n Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323677] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323685] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323764] [drm:intel_atomic_check [i915]] [CONNECTOR:77:eDP-1] checking for sink bpp constrains Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323839] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323849] [drm:drm_mode_debug_printmodeline] Modeline 80:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.323930] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 141000KHz Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.324011] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.324087] [drm:intel_dp_compute_config [i915]] DP link bw required 423000 available 540000 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.324164] [drm:intel_dp_compute_config [i915]] PSR disable by flag Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.324243] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.324321] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][modeset] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.324396] [drm:intel_dump_pipe_config [i915]] output_types: EDP (0x100) Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.324470] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.324546] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6571076, gmch_n: 8388608, link_m: 273794, link_n: 524288, tu: 64 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.324620] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.324694] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.324701] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.324774] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.324777] sd 0:0:0:0: [sda] Starting disk Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.324784] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.324861] [drm:intel_dump_pipe_config [i915]] crtc timings: 141000 1920 1936 1952 2104 1080 1083 1097 1116, type: 0x48 flags: 0xa Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.324943] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 141000 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.325016] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.325090] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.325163] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.325243] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.325317] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.325390] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.325464] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.325538] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.325611] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.325685] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.325765] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.325840] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.325928] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb 140 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.326004] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.326081] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb 131 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.326170] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.326243] [drm:bxt_get_dpll [i915]] [CRTC:43:pipe A] using pre-allocated PORT PLL A Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.326313] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe A Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.326397] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 0) -> (0 - 988) Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.326462] [drm:skl_compute_wm [i915]] [PLANE:40:cursor A] ddb (0 - 0) -> (988 - 1020) Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.326466] [drm:drm_atomic_commit] committing 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.326877] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.327040] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.327142] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.327211] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.327279] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.327346] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.327413] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.327480] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.327548] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.327616] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.327683] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.327751] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.327819] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.327887] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.327979] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 1, on? 0) for crtc 43 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.328049] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.328249] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.328315] [drm:edp_panel_on [i915]] Turn eDP port A panel power on Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.328398] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.328431] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000062 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.328460] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.328490] [drm:edp_panel_on [i915]] Wait for panel power on Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.328521] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000063 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.335996] r8169 0000:01:00.0 enp1s0: link down Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.430516] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.430628] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.430733] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.430883] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.529172] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.529272] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.529371] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.529480] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.529589] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.529694] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.530879] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.530975] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.531071] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.531751] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.531844] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.532825] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.532940] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:77:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.533550] [drm:intel_enable_pipe [i915]] enabling pipe A Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.533671] [drm:intel_edp_backlight_on [i915]] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.533771] [drm:intel_panel_enable_backlight [i915]] pipe A Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.533871] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 96000 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.540945] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.541028] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.541098] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.550504] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.550584] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.550708] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.550797] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.550870] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.550902] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.551015] [drm:__drm_atomic_state_free] Freeing atomic state 0000000084f7b0d2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.551136] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.551226] [drm:intel_opregion_register [i915]] 4 outputs detected Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.551320] [drm:intel_dp_detect [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.551408] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.551490] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.551571] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.554567] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.555193] [drm:drm_helper_hpd_irq_event] [CONNECTOR:77:eDP-1] status updated from connected to connected Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.555278] [drm:intel_dp_detect [i915]] [CONNECTOR:84:DP-1] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.555360] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.555485] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.555658] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.556057] acpi LNXPOWER:1a: Turning OFF Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.556143] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 00 02 02 06 06 00 00 00 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.556510] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.556592] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.556673] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.556872] atkbd serio0: Failed to deactivate keyboard on isa0060/serio0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.557049] [drm:drm_dp_read_desc] DP sink: OUI 00-00-00 dev-ID HW-rev 0.0 SW-rev 0.0 quirks 0x0000 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.557132] [drm:intel_dp_detect [i915]] Sink is not MST capable Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.561101] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.561183] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.561263] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.561278] [drm:drm_helper_hpd_irq_event] [CONNECTOR:84:DP-1] status updated from connected to connected Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.561364] [drm:intel_hdmi_detect [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.561585] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.561623] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.561807] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.561815] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.561844] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.561873] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.562456] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.562484] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.562669] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.562698] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.562880] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.562885] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.562887] [drm:drm_helper_hpd_irq_event] [CONNECTOR:90:HDMI-A-1] status updated from disconnected to disconnected Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.562915] [drm:intel_hdmi_detect [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.566682] acpi LNXPOWER:0b: Turning OFF Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.569767] acpi LNXPOWER:09: Turning OFF Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.572553] acpi LNXPOWER:07: Turning OFF Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.574659] acpi LNXPOWER:05: Turning OFF Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.577722] acpi LNXPOWER:03: Turning OFF Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.580836] acpi LNXPOWER:01: Turning OFF Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.583460] OOM killer enabled. Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.583461] Restarting tasks ... done. Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.594427] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.594461] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.595098] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.595106] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.595111] [drm:drm_detect_monitor_audio] Monitor has basic audio support Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.595115] [drm:drm_helper_hpd_irq_event] [CONNECTOR:94:HDMI-A-2] status updated from connected to connected Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.775546] PM: suspend exit Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.817176] [drm:drm_atomic_state_init] Allocated atomic state 00000000bd36bdea Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.817193] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 000000006ee8874b state to 00000000bd36bdea Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.817209] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000002cdca724 state to 00000000bd36bdea Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.817212] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000006ee8874b to [NOCRTC] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.817215] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000006ee8874b Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.817219] [drm:drm_atomic_check_only] checking 00000000bd36bdea Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.817322] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.817398] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 1 -> 0, off 1, on 0, ms 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.817417] [drm:drm_atomic_commit] committing 00000000bd36bdea Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.817497] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000bd36bdea Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.817514] [drm:__drm_atomic_state_free] Freeing atomic state 00000000bd36bdea Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.828951] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300) Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.846967] ata1.00: configured for UDMA/133 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.886812] [drm:drm_atomic_state_init] Allocated atomic state 00000000bd36bdea Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.886835] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 000000005c98ea7f state to 00000000bd36bdea Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.886852] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 0000000098098753 state to 00000000bd36bdea Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.886856] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000005c98ea7f Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.886859] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000005c98ea7f to [NOCRTC] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.886866] [drm:drm_atomic_check_only] checking 00000000bd36bdea Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.886988] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb -1 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.887081] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 0, off 1, on 0, ms 0 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.887170] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 988) -> (0 - 0) Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.887175] [drm:drm_atomic_commit] committing 00000000bd36bdea Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.900158] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000bd36bdea Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.900188] [drm:__drm_atomic_state_free] Freeing atomic state 00000000bd36bdea Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.900737] [drm:drm_mode_setcrtc] [CRTC:43:pipe A] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.900785] [drm:drm_atomic_state_init] Allocated atomic state 000000000f462726 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.900808] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000cf728f1b state to 000000000f462726 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.900824] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 000000000b144b4e state to 000000000f462726 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.900829] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state 00000000cf728f1b Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.900901] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000000b144b4e to [NOCRTC] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.900906] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000000b144b4e Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.900912] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 000000000f462726 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.900946] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 000000005f1d5eed state to 000000000f462726 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.900958] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000005f1d5eed to [NOCRTC] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.900974] [drm:drm_atomic_check_only] checking 000000000f462726 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.900986] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] mode changed Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.900993] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] enable changed Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.900998] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] active changed Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.901003] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.901008] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:77:eDP-1] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.901015] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: n, active: n Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.901019] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 000000000f462726 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.901162] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.901273] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.901307] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000003f66a08b state to 000000000f462726 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.901328] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000b046e594 state to 000000000f462726 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.901431] [drm:skl_compute_wm [i915]] [PLANE:40:cursor A] ddb (988 - 1020) -> (0 - 0) Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.901438] [drm:drm_atomic_commit] committing 000000000f462726 Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.901616] [drm:intel_edp_backlight_off [i915]] Feb 19 21:48:36 GLK-2-GLKRVP1DDR405 kernel: [ 127.932996] atkbd serio0: Failed to enable keyboard on isa0060/serio0 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.109175] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.109295] [drm:intel_disable_pipe [i915]] disabling pipe A Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.118047] [drm:intel_edp_panel_off.part.32 [i915]] Turn eDP port A panel power off Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.118154] [drm:intel_edp_panel_off.part.32 [i915]] Wait for panel power off time Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.118260] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000060 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.169521] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.169625] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.169722] [drm:intel_power_well_disable [i915]] disabling DDI A IO power well Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.169871] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.169982] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL A (active 1, on? 1) for crtc 43 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.170110] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL A Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.170237] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.170339] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.170437] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.170534] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.170630] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.170725] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.170824] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.170923] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.171019] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.171115] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.171210] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.171320] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.171414] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.171521] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.171618] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.171661] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.171776] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.171781] [drm:__drm_atomic_state_free] Freeing atomic state 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.172370] [drm:drm_mode_addfb2] [FB:136] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181606] [drm:drm_mode_setcrtc] [CRTC:43:pipe A] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181638] [drm:drm_mode_setcrtc] [CONNECTOR:84:DP-1] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181666] [drm:drm_atomic_state_init] Allocated atomic state 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181677] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000cd24c7ab state to 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181684] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 000000000e08762c state to 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181695] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1200] for CRTC state 00000000cd24c7ab Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181697] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000000e08762c to [CRTC:43:pipe A] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181700] [drm:drm_atomic_set_fb_for_plane] Set [FB:136] for plane state 000000000e08762c Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181702] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181720] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 00000000faf60314 state to 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181722] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000faf60314 to [CRTC:43:pipe A] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181728] [drm:drm_atomic_check_only] checking 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181733] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] mode changed Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181735] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] enable changed Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181736] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] active changed Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181739] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181743] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:84:DP-1] using [ENCODER:83:DDI B] on [CRTC:43:pipe A] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181746] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: y, active: y Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181748] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181752] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181812] [drm:intel_atomic_check [i915]] [CONNECTOR:84:DP-1] checking for sink bpp constrains Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181853] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181900] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 154000KHz Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181945] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.181985] [drm:intel_dp_compute_config [i915]] DP link bw required 462000 available 648000 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182028] [drm:intel_dp_compute_config [i915]] PSR disable by flag Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182074] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182119] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][modeset] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182159] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80) Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182205] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 24, dithering: 0 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182247] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5980766, gmch_n: 8388608, link_m: 249198, link_n: 262144, tu: 64 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182289] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182327] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182332] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182371] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182374] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182414] [drm:intel_dump_pipe_config [i915]] crtc timings: 154000 1920 1968 2000 2080 1200 1203 1209 1235, type: 0x48 flags: 0x9 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182455] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1200, pixel rate 154000 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182495] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182534] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182573] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182621] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182660] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182699] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182744] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182786] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182827] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182869] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182912] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.182953] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.183004] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb 136 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.183043] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.183086] [drm:bxt_get_dpll [i915]] [CRTC:43:pipe A] using pre-allocated PORT PLL B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.183132] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe A Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.183149] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000007a231afd state to 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.183157] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 0000000055d7c9e3 state to 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.183202] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 0) -> (0 - 988) Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.183240] [drm:skl_compute_wm [i915]] [PLANE:40:cursor A] ddb (0 - 0) -> (988 - 1020) Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.183242] [drm:drm_atomic_commit] committing 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.183503] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.183587] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.183859] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.183898] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.183940] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.183981] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.184022] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.184064] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.184106] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.184147] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.184187] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.184252] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 1, on? 0) for crtc 43 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.184291] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.184431] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.184485] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.184674] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.185315] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.185502] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.185541] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.185727] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.185781] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.185821] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.185865] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.185907] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.186119] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.186258] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.186436] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.186478] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.186696] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.186753] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.186793] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.186831] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.187036] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.187174] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.187351] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.187390] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.187598] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.187629] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.187661] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.187691] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.187889] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.188314] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.188478] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.188506] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.188717] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.188748] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.189099] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.189132] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.189298] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.189672] [drm:intel_enable_pipe [i915]] enabling pipe A Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.189745] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.189779] [drm:intel_fbc_enable [i915]] reserved 18432000 bytes of contiguous stolen space for FBC, threshold: 1 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.189811] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.206753] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.206795] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.206873] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.206911] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.206945] [drm:__drm_atomic_state_free] Freeing atomic state 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.207044] [drm:drm_atomic_state_init] Allocated atomic state 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.207051] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 000000009cfe84a8 state to 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.207053] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000009cfe84a8 to [NOCRTC] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.207054] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000009cfe84a8 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.207056] [drm:drm_atomic_check_only] checking 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.207060] [drm:drm_atomic_commit] committing 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.207085] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.207091] [drm:__drm_atomic_state_free] Freeing atomic state 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.296003] [drm:drm_atomic_state_init] Allocated atomic state 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.296011] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 00000000f8fdfc71 state to 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.296024] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000004d155375 state to 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.296025] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000f8fdfc71 to [CRTC:43:pipe A] Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.296027] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 00000000f8fdfc71 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.296028] [drm:drm_atomic_check_only] checking 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.296085] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb 137 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.296116] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 0 -> 1, off 0, on 1, ms 0 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.296127] [drm:drm_atomic_commit] committing 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.296245] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.296251] [drm:__drm_atomic_state_free] Freeing atomic state 000000000f462726 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.296266] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 000000003e7fb887 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.296301] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb 137 Feb 19 21:48:37 GLK-2-GLKRVP1DDR405 kernel: [ 128.296332] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 128.393915] PM: suspend entry (deep) Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 128.393918] PM: Syncing filesystems ... done. Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 128.394656] Freezing user space processes ... (elapsed 0.003 seconds) done. Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 128.398070] OOM killer disabled. Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 128.398071] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done. Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 128.399246] Suspending console(s) (use no_console_suspend to debug) Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.185083] sd 0:0:0:0: [sda] Synchronizing SCSI cache Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.185807] sd 0:0:0:0: [sda] Stopping disk Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188100] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188227] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188378] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188407] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188434] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188794] [drm:drm_atomic_state_init] Allocated atomic state 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188804] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000002cdca724 state to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188810] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 0000000002e9fd8a state to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188816] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000eb76b9fb state to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188823] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 0000000041695713 state to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188835] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 000000000cb394fa state to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188840] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 00000000bd5e7f37 state to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188844] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 00000000c4a6bb48 state to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188848] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 00000000247b3886 state to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188853] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 00000000bb81506e state to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188857] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 00000000ecc8474b state to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188861] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 00000000f6d7d954 state to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188867] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 000000006ee8874b state to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188871] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 000000002a6caab8 state to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188875] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 000000005c98ea7f state to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188879] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 00000000b5f113aa state to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188886] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 00000000ad0b91ef state to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188893] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 000000007fc523ae state to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188905] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 00000000adeb828e state to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188917] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 00000000c19bc491 state to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188926] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 000000008a770fa6 state to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188931] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:90:HDMI-A-1] 00000000d5b13998 state to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188936] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 000000009022db5c state to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188945] [drm:drm_atomic_state_init] Allocated atomic state 00000000445a1cbc Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188950] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 0000000098098753 state to 00000000445a1cbc Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188952] [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state 0000000098098753 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188956] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 000000004e52bc83 state to 00000000445a1cbc Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188960] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 00000000ed0f526e state to 00000000445a1cbc Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188962] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000445a1cbc Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188968] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 000000006e57d982 state to 00000000445a1cbc Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188973] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000eb0756fe state to 00000000445a1cbc Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188974] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000445a1cbc Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188981] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000d600d325 state to 00000000445a1cbc Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188982] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000445a1cbc Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188984] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000006e57d982 to [NOCRTC] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188985] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000004e52bc83 to [NOCRTC] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188986] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000004e52bc83 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188988] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000ed0f526e to [NOCRTC] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188989] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000ed0f526e Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188990] [drm:drm_atomic_check_only] checking 00000000445a1cbc Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188994] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] mode changed Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188995] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] enable changed Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188997] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] active changed Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.188999] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.189000] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:84:DP-1] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.189003] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: n, active: n Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.189004] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000445a1cbc Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.189042] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.189073] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.189107] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.189138] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.189168] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.189198] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.189231] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 988) -> (0 - 0) Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.189259] [drm:skl_compute_wm [i915]] [PLANE:40:cursor A] ddb (988 - 1020) -> (0 - 0) Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.189261] [drm:drm_atomic_commit] committing 00000000445a1cbc Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.189322] [drm:intel_disable_pipe [i915]] disabling pipe A Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.190812] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.190872] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.190906] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 1, on? 1) for crtc 43 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.190961] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.191003] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.191033] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.191063] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.191092] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.191124] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.191155] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.191184] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.191215] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.191245] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.191274] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.191310] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.191325] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000445a1cbc Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.191341] [drm:__drm_atomic_state_free] Freeing atomic state 00000000445a1cbc Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.263122] hpet1: lost 7160 rtc interrupts Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.319282] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.319311] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.319339] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.319367] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.319398] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.319426] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.319454] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.319485] [drm:intel_power_well_disable [i915]] disabling DC off Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.319520] [drm:gen9_enable_dc5 [i915]] Enabling DC5 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.319549] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.319579] [drm:intel_power_well_disable [i915]] disabling always-on Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.320545] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.320617] [drm:intel_power_well_disable [i915]] disabling power well 1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.320654] [drm:hsw_power_well_disable [i915]] power well 1 forced on (bios:1 driver:0 kvmr:0 debug:0) Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.320720] [drm:bxt_enable_dc9 [i915]] Enabling DC9 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.320752] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 08 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.387480] ACPI: Preparing to enter system sleep state S3 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.391265] ACPI: EC: event blocked Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.391267] ACPI: EC: EC stopped Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.391268] PM: Saving platform NVS memory Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.391279] Disabling non-boot CPUs ... Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.411580] smpboot: CPU 1 is now offline Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.439570] smpboot: CPU 2 is now offline Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.455413] smpboot: CPU 3 is now offline Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.461368] ACPI: Low-level resume complete Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.461583] ACPI: EC: EC started Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.461584] PM: Restoring platform NVS memory Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.462664] Enabling non-boot CPUs ... Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.462890] x86: Booting SMP configuration: Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.462891] smpboot: Booting Node 0 Processor 1 APIC 0x2 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.463966] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.464504] cache: parent cpu1 should not be sleeping Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.465737] CPU1 is up Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.465882] smpboot: Booting Node 0 Processor 2 APIC 0x4 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.466983] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.467499] cache: parent cpu2 should not be sleeping Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.468820] CPU2 is up Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.468955] smpboot: Booting Node 0 Processor 3 APIC 0x6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.470057] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.470639] cache: parent cpu3 should not be sleeping Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.472163] CPU3 is up Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.480230] ACPI: Waking up from system sleep state S3 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.648097] [drm:gen9_sanitize_dc_state [i915]] Resetting DC state tracking from 08 to 00 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.648173] [drm:bxt_disable_dc9 [i915]] Disabling DC9 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.648247] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.648330] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.648407] [drm:intel_power_well_enable [i915]] enabling power well 1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.648503] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.648869] [drm:intel_power_well_enable [i915]] enabling always-on Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.648940] [drm:intel_power_well_enable [i915]] enabling DC off Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.649012] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.649088] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.649194] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.649382] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.649582] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.649782] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.649874] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.649962] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.824765] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x799d3018 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.824985] [drm:intel_opregion_setup [i915]] Public ACPI methods supported Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.824988] ACPI: EC: event unblocked Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.825086] [drm:intel_opregion_setup [i915]] ASLE supported Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.825504] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA) Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.825629] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:10001010 hp_port:38 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.825742] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.825841] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.826527] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 11 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.827052] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.827155] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.827275] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.827394] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.827492] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.827587] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.827682] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.827777] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:43:pipe A] hw state readout: disabled Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.827880] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.827973] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.828066] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.828159] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.828252] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.828344] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:59:pipe B] hw state readout: disabled Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.828819] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.828912] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.829005] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.829103] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.829195] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.829287] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:75:pipe C] hw state readout: disabled Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.829383] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL A hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.829477] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL B hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.829570] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.829665] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:76:DDI A] hw state readout: disabled, pipe A Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.829759] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:83:DDI B] hw state readout: disabled, pipe A Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.829852] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:85:DP-MST A] hw state readout: disabled, pipe A Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.829945] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:86:DP-MST B] hw state readout: disabled, pipe B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.830037] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:87:DP-MST C] hw state readout: disabled, pipe C Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.830130] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:93:DDI C] hw state readout: disabled, pipe A Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.830225] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:77:eDP-1] hw state readout: disabled Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.830319] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:84:DP-1] hw state readout: disabled Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.830413] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:90:HDMI-A-1] hw state readout: disabled Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.830507] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:94:HDMI-A-2] hw state readout: disabled Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.830612] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][setup_hw_state] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.830708] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.830804] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.830898] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.830991] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.831005] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.831097] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.831105] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.831201] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.831294] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.831397] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.831492] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.831670] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.831770] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.831864] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.831957] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.832050] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.832143] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.832236] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.832329] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.832423] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][setup_hw_state] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.832518] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.832611] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.832706] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.832799] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.832807] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.832900] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.832908] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.833002] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.833094] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.833186] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.833278] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.833369] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.833467] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.833560] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.833652] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.833744] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.833836] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.833928] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.834019] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.834111] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][setup_hw_state] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.834202] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.834294] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.834385] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.834475] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.834483] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.834574] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.834581] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.834674] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.834765] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.834857] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.834948] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835039] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835136] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835234] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835288] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835290] sd 0:0:0:0: [sda] Starting disk Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835377] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835429] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835479] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835527] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835765] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835795] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835823] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835851] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835880] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835908] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835937] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835953] [drm:drm_atomic_check_only] checking 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835959] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] mode changed Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835961] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] enable changed Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835962] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] active changed Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835966] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835967] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:77:eDP-1] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835969] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835972] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:84:DP-1] keeps [ENCODER:83:DDI B], now on [CRTC:43:pipe A] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835973] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:90:HDMI-A-1] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835974] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:90:HDMI-A-1] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835976] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835977] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:94:HDMI-A-2] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835979] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: y, active: y Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835981] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835984] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: n, active: n Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835985] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835987] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: n, active: n Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835988] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.835992] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836023] [drm:intel_atomic_check [i915]] [CONNECTOR:84:DP-1] checking for sink bpp constrains Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836053] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836086] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 154000KHz Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836117] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836147] [drm:intel_dp_compute_config [i915]] DP link bw required 462000 available 648000 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836177] [drm:intel_dp_compute_config [i915]] PSR disable by flag Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836207] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836237] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][modeset] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836267] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80) Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836295] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 24, dithering: 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836325] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5980766, gmch_n: 8388608, link_m: 249198, link_n: 262144, tu: 64 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836353] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836381] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836384] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836412] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836417] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836446] [drm:intel_dump_pipe_config [i915]] crtc timings: 154000 1920 1968 2000 2080 1200 1203 1209 1235, type: 0x48 flags: 0x9 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836475] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1200, pixel rate 154000 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836503] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836532] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836560] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836591] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8200, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x19999a, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836620] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836648] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836677] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836708] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836736] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836764] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836799] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836828] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836863] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb 136 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836892] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836922] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb 137 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836951] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.836982] [drm:bxt_get_dpll [i915]] [CRTC:43:pipe A] using pre-allocated PORT PLL B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.837012] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe A Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.837049] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 0) -> (0 - 988) Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.837077] [drm:skl_compute_wm [i915]] [PLANE:40:cursor A] ddb (0 - 0) -> (988 - 1020) Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.837079] [drm:drm_atomic_commit] committing 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.837389] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.837427] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.837682] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.837742] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.837771] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.837800] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.837828] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.837857] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.837886] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.837915] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.837944] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.837974] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.838004] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.838033] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.838062] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.838111] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 1, on? 0) for crtc 43 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.838140] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.838266] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.838307] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.838471] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.839099] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.839268] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.839305] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.839512] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.839557] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.839588] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.839619] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.839649] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.839847] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.839976] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.840139] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.840168] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.840418] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.840459] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.840487] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.840516] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.840706] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.840833] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.840995] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.841023] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.841225] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.841257] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.841288] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.841318] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.841513] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.841938] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.842102] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.842130] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.842332] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.842366] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.842716] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.842746] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.842910] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.843289] [drm:intel_enable_pipe [i915]] enabling pipe A Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.843364] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.843400] [drm:intel_fbc_enable [i915]] reserved 18432000 bytes of contiguous stolen space for FBC, threshold: 1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.843430] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.850319] r8169 0000:01:00.0 enp1s0: link down Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.860343] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.860398] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.860493] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.860554] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.860603] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.860642] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.860736] [drm:__drm_atomic_state_free] Freeing atomic state 00000000fdd8f2c6 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.860803] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.860849] [drm:intel_opregion_register [i915]] 4 outputs detected Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.860900] [drm:intel_dp_detect [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.860943] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.863839] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.863905] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.863964] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.864021] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.864082] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.864139] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.864200] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000062 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.864257] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.864315] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x0000006a Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.864371] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.886100] acpi LNXPOWER:1a: Turning OFF Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.899958] acpi LNXPOWER:0b: Turning OFF Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.902760] acpi LNXPOWER:09: Turning OFF Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.905488] acpi LNXPOWER:07: Turning OFF Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.907640] acpi LNXPOWER:05: Turning OFF Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.910492] acpi LNXPOWER:03: Turning OFF Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.913338] acpi LNXPOWER:01: Turning OFF Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.916009] OOM killer enabled. Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.916010] Restarting tasks ... done. Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.966163] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.966197] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.966229] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 129.966288] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.071460] atkbd serio0: Failed to deactivate keyboard on isa0060/serio0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.071854] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.072509] [drm:drm_helper_hpd_irq_event] [CONNECTOR:77:eDP-1] status updated from connected to connected Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.072622] [drm:intel_dp_detect [i915]] [CONNECTOR:84:DP-1] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.072705] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.073201] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 00 02 02 06 03 00 00 00 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.073576] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.073661] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.073745] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.074128] [drm:drm_dp_read_desc] DP sink: OUI 00-00-00 dev-ID HW-rev 0.0 SW-rev 0.0 quirks 0x0000 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.074223] [drm:intel_dp_detect [i915]] Sink is not MST capable Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.074642] [drm:intel_dp_check_link_status [i915]] DDI B: channel EQ not ok, retraining Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.075649] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.075718] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.075786] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.076473] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.076544] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.077530] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.077943] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.097466] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.097479] [drm:drm_helper_hpd_irq_event] [CONNECTOR:84:DP-1] status updated from connected to connected Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.097540] [drm:intel_hdmi_detect [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.097763] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.097814] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.098078] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.098085] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.098145] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.098206] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.098815] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.098872] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.099193] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.099249] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.099720] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.099731] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.099735] [drm:drm_helper_hpd_irq_event] [CONNECTOR:90:HDMI-A-1] status updated from disconnected to disconnected Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.099793] [drm:intel_hdmi_detect [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.126212] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.126281] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.126510] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.126517] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.126523] [drm:drm_detect_monitor_audio] Monitor has basic audio support Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.126528] [drm:drm_helper_hpd_irq_event] [CONNECTOR:94:HDMI-A-2] status updated from connected to connected Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.339482] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300) Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.358476] ata1.00: configured for UDMA/133 Feb 19 21:48:54 GLK-2-GLKRVP1DDR405 kernel: [ 130.451351] atkbd serio0: Failed to enable keyboard on isa0060/serio0 Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 130.981925] PM: suspend exit Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.028158] [drm:drm_atomic_state_init] Allocated atomic state 00000000e3cefc7f Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.028180] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 00000000b945c1f4 state to 00000000e3cefc7f Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.028199] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000004d155375 state to 00000000e3cefc7f Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.028204] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000b945c1f4 to [NOCRTC] Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.028207] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000b945c1f4 Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.028211] [drm:drm_atomic_check_only] checking 00000000e3cefc7f Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.028332] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb -1 Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.028425] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 1 -> 0, off 1, on 0, ms 0 Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.028447] [drm:drm_atomic_commit] committing 00000000e3cefc7f Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.028539] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000e3cefc7f Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.028561] [drm:__drm_atomic_state_free] Freeing atomic state 00000000e3cefc7f Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.117296] [drm:drm_atomic_state_init] Allocated atomic state 00000000e3cefc7f Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.117306] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 00000000ed4e2a26 state to 00000000e3cefc7f Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.117317] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000cd24c7ab state to 00000000e3cefc7f Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.117319] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000ed4e2a26 to [CRTC:43:pipe A] Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.117320] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 00000000ed4e2a26 Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.117322] [drm:drm_atomic_check_only] checking 00000000e3cefc7f Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.117376] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb 137 Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.117408] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 0 -> 1, off 0, on 1, ms 0 Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.117418] [drm:drm_atomic_commit] committing 00000000e3cefc7f Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.117514] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000e3cefc7f Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.117522] [drm:__drm_atomic_state_free] Freeing atomic state 00000000e3cefc7f Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.117537] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 0000000097afbca6 Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.117572] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb 137 Feb 19 21:48:55 GLK-2-GLKRVP1DDR405 kernel: [ 131.117603] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 131.218122] PM: suspend entry (deep) Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 131.218126] PM: Syncing filesystems ... done. Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 131.218951] Freezing user space processes ... (elapsed 0.001 seconds) done. Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 131.220485] OOM killer disabled. Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 131.220486] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done. Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 131.221792] Suspending console(s) (use no_console_suspend to debug) Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.003504] sd 0:0:0:0: [sda] Synchronizing SCSI cache Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.004188] sd 0:0:0:0: [sda] Stopping disk Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012012] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012168] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012197] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012570] [drm:drm_atomic_state_init] Allocated atomic state 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012580] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000007c4516cf state to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012585] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000002ce42df6 state to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012589] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000006cf75dd6 state to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012596] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 0000000080b51f49 state to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012600] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 0000000001599055 state to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012604] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 00000000abbb2ba7 state to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012608] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 000000006bf6f443 state to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012612] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 000000003a567aba state to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012615] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 00000000ccdf20cd state to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012619] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 00000000fef97ffe state to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012622] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 000000002b8f1807 state to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012626] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 000000000741dd09 state to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012631] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000b2965f7f state to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012635] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 000000001152cb01 state to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012639] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 00000000ba568439 state to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012643] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 00000000b2c0e6e9 state to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012647] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 000000003f2d9ab1 state to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012650] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 000000000da7356e state to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012663] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 0000000011bb2f42 state to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012668] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 0000000069ce500a state to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012672] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:90:HDMI-A-1] 000000004784a882 state to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012677] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 00000000fda61954 state to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012685] [drm:drm_atomic_state_init] Allocated atomic state 00000000f5ca3309 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012689] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000081b0e63 state to 00000000f5ca3309 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012691] [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state 00000000081b0e63 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012695] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 0000000086471232 state to 00000000f5ca3309 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012699] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 000000008ca171b7 state to 00000000f5ca3309 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012701] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000f5ca3309 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012707] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 0000000004a1b9f3 state to 00000000f5ca3309 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012712] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000af0fd297 state to 00000000f5ca3309 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012713] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000f5ca3309 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012717] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000001489da91 state to 00000000f5ca3309 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012719] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000f5ca3309 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012720] [drm:drm_atomic_set_crtc_for_connector] Link connector state 0000000004a1b9f3 to [NOCRTC] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012722] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000086471232 to [NOCRTC] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012723] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000086471232 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012724] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000008ca171b7 to [NOCRTC] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012725] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000008ca171b7 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012726] [drm:drm_atomic_check_only] checking 00000000f5ca3309 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012730] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] mode changed Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012732] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] enable changed Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012733] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] active changed Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012735] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012737] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:84:DP-1] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012740] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: n, active: n Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012741] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000f5ca3309 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012779] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012811] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012846] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012877] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012907] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012936] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012970] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 988) -> (0 - 0) Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012997] [drm:skl_compute_wm [i915]] [PLANE:40:cursor A] ddb (988 - 1020) -> (0 - 0) Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.012999] [drm:drm_atomic_commit] committing 00000000f5ca3309 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.013066] [drm:intel_disable_pipe [i915]] disabling pipe A Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.030116] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.030176] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.030211] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 1, on? 1) for crtc 43 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.030268] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.030309] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.030341] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.030372] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.030403] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.030434] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.030466] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.030495] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.030527] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.030556] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.030586] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.030625] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.030642] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000f5ca3309 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.030659] [drm:__drm_atomic_state_free] Freeing atomic state 00000000f5ca3309 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.030728] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.030761] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000062 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.085310] hpet1: lost 7160 rtc interrupts Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.140949] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.140981] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.141009] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.141037] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.141065] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.141093] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.141121] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.141149] [drm:intel_power_well_disable [i915]] disabling DC off Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.141179] [drm:gen9_enable_dc5 [i915]] Enabling DC5 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.141210] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.141240] [drm:intel_power_well_disable [i915]] disabling always-on Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.142206] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.142281] [drm:intel_power_well_disable [i915]] disabling power well 1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.142317] [drm:hsw_power_well_disable [i915]] power well 1 forced on (bios:1 driver:0 kvmr:0 debug:0) Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.142383] [drm:bxt_enable_dc9 [i915]] Enabling DC9 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.142412] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 08 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.208117] ACPI: Preparing to enter system sleep state S3 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.210814] ACPI: EC: event blocked Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.210815] ACPI: EC: EC stopped Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.210816] PM: Saving platform NVS memory Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.210825] Disabling non-boot CPUs ... Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.235188] smpboot: CPU 1 is now offline Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.265963] smpboot: CPU 2 is now offline Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.289818] smpboot: CPU 3 is now offline Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.295695] ACPI: Low-level resume complete Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.295905] ACPI: EC: EC started Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.295907] PM: Restoring platform NVS memory Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.296967] Enabling non-boot CPUs ... Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.297191] x86: Booting SMP configuration: Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.297193] smpboot: Booting Node 0 Processor 1 APIC 0x2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.298442] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.299030] cache: parent cpu1 should not be sleeping Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.300469] CPU1 is up Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.300630] smpboot: Booting Node 0 Processor 2 APIC 0x4 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.301933] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.302483] cache: parent cpu2 should not be sleeping Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.303867] CPU2 is up Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.304027] smpboot: Booting Node 0 Processor 3 APIC 0x6 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.305217] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.305798] cache: parent cpu3 should not be sleeping Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.307287] CPU3 is up Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.316128] ACPI: Waking up from system sleep state S3 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.486467] [drm:gen9_sanitize_dc_state [i915]] Resetting DC state tracking from 08 to 00 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.486536] [drm:bxt_disable_dc9 [i915]] Disabling DC9 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.486603] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.486679] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.486748] [drm:intel_power_well_enable [i915]] enabling power well 1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.486837] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.487192] [drm:intel_power_well_enable [i915]] enabling always-on Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.487257] [drm:intel_power_well_enable [i915]] enabling DC off Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.487322] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.487392] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.487462] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.487618] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.487817] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.488017] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.488081] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.488146] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.663169] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x799d3018 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.663379] [drm:intel_opregion_setup [i915]] Public ACPI methods supported Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.663478] [drm:intel_opregion_setup [i915]] ASLE supported Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.663480] ACPI: EC: event unblocked Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.663766] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA) Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.663890] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:10001010 hp_port:38 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.664002] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.664100] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.664784] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 11 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.665328] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.665425] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.665545] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.665645] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.665743] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.665857] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.665952] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.666047] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:43:pipe A] hw state readout: disabled Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.666150] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.666246] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.666339] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.666432] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.666525] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.666618] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:59:pipe B] hw state readout: disabled Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.666718] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.666811] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.666906] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.667095] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.667222] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.667342] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:75:pipe C] hw state readout: disabled Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.667438] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL A hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.667532] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL B hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.667626] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.667721] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:76:DDI A] hw state readout: disabled, pipe A Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.667815] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:83:DDI B] hw state readout: disabled, pipe A Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.667909] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:85:DP-MST A] hw state readout: disabled, pipe A Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.668001] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:86:DP-MST B] hw state readout: disabled, pipe B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.668093] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:87:DP-MST C] hw state readout: disabled, pipe C Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.668188] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:93:DDI C] hw state readout: disabled, pipe A Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.668283] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:77:eDP-1] hw state readout: disabled Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.668378] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:84:DP-1] hw state readout: disabled Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.668473] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:90:HDMI-A-1] hw state readout: disabled Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.668568] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:94:HDMI-A-2] hw state readout: disabled Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.668673] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][setup_hw_state] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.668769] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.668864] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.668958] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.669051] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.669064] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.669156] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.669164] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.669259] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.669352] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.669446] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.669539] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.669632] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.669734] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.669836] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.669930] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.670112] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.670205] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.670298] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.670391] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.670484] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][setup_hw_state] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.670577] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.670671] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.670764] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.670858] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.670866] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.670959] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.670967] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.671062] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.671155] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.671248] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.671340] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.671432] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.671531] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.671624] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.671717] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.671809] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.671901] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.671993] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.672088] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.672180] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][setup_hw_state] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.672272] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.672363] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.672455] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.672545] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.672553] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.672644] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.672651] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.672745] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.672837] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.672928] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.673020] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.673112] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.673210] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.673302] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.673395] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.673487] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.673579] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.673671] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.673781] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.673809] sd 0:0:0:0: [sda] Starting disk Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.673915] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674047] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674141] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674174] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674209] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674242] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674276] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674313] [drm:drm_atomic_check_only] checking 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674320] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] mode changed Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674322] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] enable changed Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674323] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] active changed Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674328] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674330] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:77:eDP-1] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674332] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674334] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:84:DP-1] keeps [ENCODER:83:DDI B], now on [CRTC:43:pipe A] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674336] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:90:HDMI-A-1] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674337] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:90:HDMI-A-1] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674339] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674341] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:94:HDMI-A-2] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674343] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: y, active: y Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674345] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674348] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: n, active: n Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674350] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674352] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: n, active: n Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674354] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674357] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674395] [drm:intel_atomic_check [i915]] [CONNECTOR:84:DP-1] checking for sink bpp constrains Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674430] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674468] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 154000KHz Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674505] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674539] [drm:intel_dp_compute_config [i915]] DP link bw required 462000 available 648000 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674574] [drm:intel_dp_compute_config [i915]] PSR disable by flag Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674610] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674646] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][modeset] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674681] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80) Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674715] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 24, dithering: 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674749] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5980766, gmch_n: 8388608, link_m: 249198, link_n: 262144, tu: 64 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674783] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674817] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674820] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674854] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674856] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674891] [drm:intel_dump_pipe_config [i915]] crtc timings: 154000 1920 1968 2000 2080 1200 1203 1209 1235, type: 0x48 flags: 0x9 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674925] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1200, pixel rate 154000 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674958] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.674992] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.675025] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.675064] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8200, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x19999a, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.675098] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.675131] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.675165] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.675198] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.675231] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.675265] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.675302] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.675336] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.675376] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb 136 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.675413] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.675449] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb 137 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.675483] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.675524] [drm:bxt_get_dpll [i915]] [CRTC:43:pipe A] using pre-allocated PORT PLL B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.675561] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe A Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.675628] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 0) -> (0 - 988) Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.675660] [drm:skl_compute_wm [i915]] [PLANE:40:cursor A] ddb (0 - 0) -> (988 - 1020) Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.675662] [drm:drm_atomic_commit] committing 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.675996] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.676039] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.676302] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.676368] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.676402] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.676436] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.676470] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.676503] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.676536] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.676571] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.676605] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.676640] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.676674] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.676708] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.676743] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.676797] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 1, on? 0) for crtc 43 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.676832] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.676994] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.677036] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.677201] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.677835] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.678004] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.678033] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.678201] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.678244] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.678274] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.678306] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.678335] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.678529] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.678658] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.678818] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.678847] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.679146] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.679192] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.679222] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.679252] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.679465] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.679594] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.679757] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.679785] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.680011] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.680043] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.680072] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.680102] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.680297] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.680723] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.680888] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.680916] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.681119] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.681153] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.681504] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.681534] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.681699] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.682085] [drm:intel_enable_pipe [i915]] enabling pipe A Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.682150] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.682185] [drm:intel_fbc_enable [i915]] reserved 18432000 bytes of contiguous stolen space for FBC, threshold: 1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.682215] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.685015] r8169 0000:01:00.0 enp1s0: link down Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.699133] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.699189] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.699284] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.699346] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.699394] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.699433] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.699515] [drm:__drm_atomic_state_free] Freeing atomic state 0000000084f7b0d2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.699599] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.699648] [drm:intel_opregion_register [i915]] 4 outputs detected Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.699702] [drm:intel_dp_detect [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.699746] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.702595] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.702651] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.702696] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.702740] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.702788] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.702832] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.702879] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000062 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.702922] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.702967] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x0000006a Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.703011] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.723844] acpi LNXPOWER:1a: Turning OFF Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.735997] acpi LNXPOWER:0b: Turning OFF Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.739024] acpi LNXPOWER:09: Turning OFF Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.742002] acpi LNXPOWER:07: Turning OFF Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.744176] acpi LNXPOWER:05: Turning OFF Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.746857] acpi LNXPOWER:03: Turning OFF Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.749637] acpi LNXPOWER:01: Turning OFF Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.751956] OOM killer enabled. Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.751956] Restarting tasks ... done. Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.804951] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.805041] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.805075] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.805188] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.905850] atkbd serio0: Failed to deactivate keyboard on isa0060/serio0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.910413] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.911057] [drm:drm_helper_hpd_irq_event] [CONNECTOR:77:eDP-1] status updated from connected to connected Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.911170] [drm:intel_dp_detect [i915]] [CONNECTOR:84:DP-1] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.911253] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.911749] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 00 02 02 06 03 00 00 00 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.912122] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.912209] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.912296] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.912675] [drm:drm_dp_read_desc] DP sink: OUI 00-00-00 dev-ID HW-rev 0.0 SW-rev 0.0 quirks 0x0000 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.912759] [drm:intel_dp_detect [i915]] Sink is not MST capable Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.913167] [drm:intel_dp_check_link_status [i915]] DDI B: channel EQ not ok, retraining Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.914266] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.914349] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.914436] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.915114] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.915200] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.916180] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.916598] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.936077] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.936085] [drm:drm_helper_hpd_irq_event] [CONNECTOR:84:DP-1] status updated from connected to connected Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.936151] [drm:intel_hdmi_detect [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.936380] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.936440] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.936657] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.936664] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.936721] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.936779] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.937371] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.937428] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.937647] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.937702] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.937932] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.937939] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.937943] [drm:drm_helper_hpd_irq_event] [CONNECTOR:90:HDMI-A-1] status updated from disconnected to disconnected Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.938001] [drm:intel_hdmi_detect [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.964799] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.964875] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.965110] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.965122] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.965130] [drm:drm_detect_monitor_audio] Monitor has basic audio support Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 132.965137] [drm:drm_helper_hpd_irq_event] [CONNECTOR:94:HDMI-A-2] status updated from connected to connected Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 133.177881] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300) Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 133.191934] ata1.00: configured for UDMA/133 Feb 19 21:49:12 GLK-2-GLKRVP1DDR405 kernel: [ 133.285872] atkbd serio0: Failed to enable keyboard on isa0060/serio0 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.460597] PM: suspend exit Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.500015] [drm:drm_atomic_state_init] Allocated atomic state 0000000090ec9983 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.500035] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 0000000045c8d2fa state to 0000000090ec9983 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.500055] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000163e7a8c state to 0000000090ec9983 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.500059] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000045c8d2fa to [NOCRTC] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.500063] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000045c8d2fa Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.500068] [drm:drm_atomic_check_only] checking 0000000090ec9983 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.500189] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb -1 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.500303] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 1 -> 0, off 1, on 0, ms 0 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.500324] [drm:drm_atomic_commit] committing 0000000090ec9983 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.500414] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000090ec9983 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.500433] [drm:__drm_atomic_state_free] Freeing atomic state 0000000090ec9983 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.570381] [drm:drm_atomic_state_init] Allocated atomic state 000000002099920d Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.570405] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 000000002efd069a state to 000000002099920d Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.570423] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000602ecb81 state to 000000002099920d Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.570427] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000002efd069a Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.570431] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000002efd069a to [NOCRTC] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.570437] [drm:drm_atomic_check_only] checking 000000002099920d Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.570558] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb -1 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.570651] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 0, off 1, on 0, ms 0 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.570744] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 988) -> (0 - 0) Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.570749] [drm:drm_atomic_commit] committing 000000002099920d Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583111] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000002099920d Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583133] [drm:__drm_atomic_state_free] Freeing atomic state 000000002099920d Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583555] [drm:drm_mode_setcrtc] [CRTC:43:pipe A] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583597] [drm:drm_atomic_state_init] Allocated atomic state 00000000e62db53e Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583613] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000be38ada1 state to 00000000e62db53e Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583622] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 0000000021c368f4 state to 00000000e62db53e Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583626] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state 00000000be38ada1 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583629] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000021c368f4 to [NOCRTC] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583632] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000021c368f4 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583636] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000e62db53e Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583657] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 0000000054a2e870 state to 00000000e62db53e Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583660] [drm:drm_atomic_set_crtc_for_connector] Link connector state 0000000054a2e870 to [NOCRTC] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583664] [drm:drm_atomic_check_only] checking 00000000e62db53e Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583670] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] mode changed Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583673] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] enable changed Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583676] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] active changed Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583680] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583683] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:84:DP-1] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583688] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: n, active: n Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583691] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000e62db53e Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583786] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583856] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583876] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000008e7794e3 state to 00000000e62db53e Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583888] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000000618a073 state to 00000000e62db53e Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583959] [drm:skl_compute_wm [i915]] [PLANE:40:cursor A] ddb (988 - 1020) -> (0 - 0) Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.583963] [drm:drm_atomic_commit] committing 00000000e62db53e Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.584084] [drm:intel_disable_pipe [i915]] disabling pipe A Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.602001] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.602237] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.602320] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.602442] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.602535] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 1, on? 1) for crtc 43 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.602642] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.602744] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.602826] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.602907] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.602985] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.603062] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.603139] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.603220] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.603299] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.603377] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.603453] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.603544] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.603623] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.603728] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.603767] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000e62db53e Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.603810] [drm:__drm_atomic_state_free] Freeing atomic state 00000000e62db53e Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.604369] [drm:drm_mode_addfb2] [FB:136] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614029] [drm:drm_mode_setcrtc] [CRTC:43:pipe A] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614063] [drm:drm_mode_setcrtc] [CONNECTOR:94:HDMI-A-2] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614090] [drm:drm_atomic_state_init] Allocated atomic state 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614103] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000006cf75dd6 state to 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614110] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 000000004eabda11 state to 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614119] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 000000006cf75dd6 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614121] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000004eabda11 to [CRTC:43:pipe A] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614124] [drm:drm_atomic_set_fb_for_plane] Set [FB:136] for plane state 000000004eabda11 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614128] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614145] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 00000000b9a2050b state to 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614148] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000b9a2050b to [CRTC:43:pipe A] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614153] [drm:drm_atomic_check_only] checking 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614159] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] mode changed Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614162] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] enable changed Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614164] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] active changed Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614168] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614172] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:94:HDMI-A-2] using [ENCODER:93:DDI C] on [CRTC:43:pipe A] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614176] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: y, active: y Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614178] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614184] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614254] [drm:intel_atomic_check [i915]] [CONNECTOR:94:HDMI-A-2] checking for sink bpp constrains Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614326] [drm:intel_hdmi_compute_config [i915]] picking bpc to 12 for HDMI output Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614380] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 36 for HDMI Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614436] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 36, dithering: 0 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614492] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][modeset] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614543] [drm:intel_dump_pipe_config [i915]] output_types: HDMI (0x40) Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614599] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 36, dithering: 0 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614649] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 1 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614698] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614705] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614754] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614759] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614810] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1082 1087 1125, type: 0x48 flags: 0x5 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614859] [drm:intel_dump_pipe_config [i915]] port clock: 222750, pipe src size: 1920x1080, pixel rate 148500 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614910] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.614962] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.615011] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.615071] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8200, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x19999a, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.615120] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.615169] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.615226] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.615278] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.615330] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.615382] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.615397] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000002ce42df6 state to 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.615404] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000769564db state to 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.615456] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.615505] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 13, actual 13 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.615567] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb 136 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.615617] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.615676] [drm:bxt_get_dpll [i915]] [CRTC:43:pipe A] using pre-allocated PORT PLL C Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.615729] [drm:intel_reference_shared_dpll [i915]] using PORT PLL C for pipe A Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.615795] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 0) -> (0 - 988) Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.615843] [drm:skl_compute_wm [i915]] [PLANE:40:cursor A] ddb (0 - 0) -> (988 - 1020) Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.615846] [drm:drm_atomic_commit] committing 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.616117] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.616220] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.616412] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.616473] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.616500] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.616530] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.616557] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.616587] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.616614] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.616645] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.616676] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.616704] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.616756] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL C (active 1, on? 0) for crtc 43 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.616783] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL C Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.616906] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.617087] [drm:intel_enable_pipe [i915]] enabling pipe A Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.617583] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:94:HDMI-A-2], [ENCODER:93:DDI C] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.617614] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe A, 36 bytes ELD Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.617650] [drm:audio_config_hdmi_pixel_clock [i915]] Configuring HDMI audio for pixel clock 148500 (0x00090000) Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.617678] [drm:hsw_audio_config_update [i915]] using automatic N Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.617879] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.617910] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.634649] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.634696] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.634774] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.634813] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.634836] [drm:__drm_atomic_state_free] Freeing atomic state 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.634931] [drm:drm_atomic_state_init] Allocated atomic state 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.634940] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 0000000021c368f4 state to 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.634942] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000021c368f4 to [NOCRTC] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.634944] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000021c368f4 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.634945] [drm:drm_atomic_check_only] checking 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.634950] [drm:drm_atomic_commit] committing 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.634977] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.634985] [drm:__drm_atomic_state_free] Freeing atomic state 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.722513] [drm:drm_atomic_state_init] Allocated atomic state 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.722521] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 0000000001325f05 state to 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.722533] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000000618a073 state to 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.722535] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000001325f05 to [CRTC:43:pipe A] Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.722536] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 0000000001325f05 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.722538] [drm:drm_atomic_check_only] checking 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.722594] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb 137 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.722626] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 0 -> 1, off 0, on 1, ms 0 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.722639] [drm:drm_atomic_commit] committing 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.722682] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.722686] [drm:__drm_atomic_state_free] Freeing atomic state 0000000054b5993b Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.722703] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 0000000050be610e Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.722736] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb 137 Feb 19 21:49:13 GLK-2-GLKRVP1DDR405 kernel: [ 133.722766] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 133.826278] PM: suspend entry (deep) Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 133.826282] PM: Syncing filesystems ... done. Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 133.827223] Freezing user space processes ... (elapsed 0.001 seconds) done. Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 133.828608] OOM killer disabled. Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 133.828609] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done. Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 133.829829] Suspending console(s) (use no_console_suspend to debug) Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.614149] sd 0:0:0:0: [sda] Synchronizing SCSI cache Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.614848] sd 0:0:0:0: [sda] Stopping disk Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.622817] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.622969] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.622998] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623388] [drm:drm_atomic_state_init] Allocated atomic state 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623398] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000163e7a8c state to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623404] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000d600d325 state to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623408] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 0000000077960742 state to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623414] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 0000000067df3f2a state to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623419] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 0000000097afbca6 state to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623424] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 00000000ed4e2a26 state to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623428] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 00000000b945c1f4 state to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623435] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 000000002efd069a state to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623439] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 000000005292adf1 state to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623446] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 0000000080b51f49 state to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623450] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 000000003a567aba state to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623455] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 00000000dec7cbe3 state to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623460] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 000000004a814f92 state to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623464] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 000000008ca171b7 state to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623468] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 0000000086471232 state to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623472] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 0000000026cfa631 state to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623477] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 000000007dc05a11 state to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623483] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 0000000063a02161 state to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623494] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 000000002e497200 state to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623499] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 00000000e009e69d state to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623503] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:90:HDMI-A-1] 00000000d968fcb2 state to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623508] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 000000000d62abd8 state to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623524] [drm:drm_atomic_state_init] Allocated atomic state 0000000010d3b731 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623528] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000da8df8fe state to 0000000010d3b731 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623531] [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state 00000000da8df8fe Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623534] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 0000000080254a2a state to 0000000010d3b731 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623538] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 00000000845bc458 state to 0000000010d3b731 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623540] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 0000000010d3b731 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623546] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 00000000bd5e0b13 state to 0000000010d3b731 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623550] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000000f5a6246 state to 0000000010d3b731 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623552] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 0000000010d3b731 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623556] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000602ecb81 state to 0000000010d3b731 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623558] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 0000000010d3b731 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623559] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000bd5e0b13 to [NOCRTC] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623561] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000080254a2a to [NOCRTC] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623562] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000080254a2a Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623563] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000845bc458 to [NOCRTC] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623564] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000845bc458 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623565] [drm:drm_atomic_check_only] checking 0000000010d3b731 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623570] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] mode changed Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623571] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] enable changed Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623572] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] active changed Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623574] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623576] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:94:HDMI-A-2] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623579] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: n, active: n Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623580] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 0000000010d3b731 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623618] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623649] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623683] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623714] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623745] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623774] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623808] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 988) -> (0 - 0) Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623836] [drm:skl_compute_wm [i915]] [PLANE:40:cursor A] ddb (988 - 1020) -> (0 - 0) Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623838] [drm:drm_atomic_commit] committing 0000000010d3b731 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623904] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe A Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.623939] [drm:intel_disable_pipe [i915]] disabling pipe A Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.636294] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.636351] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.636389] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL C (active 1, on? 1) for crtc 43 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.636443] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL C Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.636485] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.636546] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.636578] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.636609] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.636638] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.636669] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.636700] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.636731] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.636763] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.636792] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.636821] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.636857] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.636872] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000010d3b731 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.636883] [drm:__drm_atomic_state_free] Freeing atomic state 0000000010d3b731 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.636953] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.636988] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000062 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.691217] hpet1: lost 7161 rtc interrupts Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.751478] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.751508] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.751536] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.751567] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.751595] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.751624] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.751652] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.751683] [drm:intel_power_well_disable [i915]] disabling DC off Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.751718] [drm:gen9_enable_dc5 [i915]] Enabling DC5 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.751746] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.751776] [drm:intel_power_well_disable [i915]] disabling always-on Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.752743] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.752816] [drm:intel_power_well_disable [i915]] disabling power well 1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.752853] [drm:hsw_power_well_disable [i915]] power well 1 forced on (bios:1 driver:0 kvmr:0 debug:0) Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.752919] [drm:bxt_enable_dc9 [i915]] Enabling DC9 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.752950] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 08 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.825442] ACPI: Preparing to enter system sleep state S3 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.828437] ACPI: EC: event blocked Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.828438] ACPI: EC: EC stopped Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.828439] PM: Saving platform NVS memory Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.828449] Disabling non-boot CPUs ... Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.860726] smpboot: CPU 1 is now offline Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.880427] smpboot: CPU 2 is now offline Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.904210] smpboot: CPU 3 is now offline Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.910082] ACPI: Low-level resume complete Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.910290] ACPI: EC: EC started Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.910291] PM: Restoring platform NVS memory Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.911372] Enabling non-boot CPUs ... Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.911564] x86: Booting SMP configuration: Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.911566] smpboot: Booting Node 0 Processor 1 APIC 0x2 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.912638] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.913172] cache: parent cpu1 should not be sleeping Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.914397] CPU1 is up Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.914532] smpboot: Booting Node 0 Processor 2 APIC 0x4 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.915636] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.916203] cache: parent cpu2 should not be sleeping Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.917535] CPU2 is up Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.917672] smpboot: Booting Node 0 Processor 3 APIC 0x6 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.918784] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.919333] cache: parent cpu3 should not be sleeping Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.920852] CPU3 is up Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 134.928923] ACPI: Waking up from system sleep state S3 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.096904] [drm:gen9_sanitize_dc_state [i915]] Resetting DC state tracking from 08 to 00 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.096972] [drm:bxt_disable_dc9 [i915]] Disabling DC9 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.097039] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.097116] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.097186] [drm:intel_power_well_enable [i915]] enabling power well 1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.097273] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.097630] [drm:intel_power_well_enable [i915]] enabling always-on Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.097695] [drm:intel_power_well_enable [i915]] enabling DC off Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.097760] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.097829] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.097901] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.098058] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.098258] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.098457] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.098521] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.098586] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.273537] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x799d3018 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.273738] [drm:intel_opregion_setup [i915]] Public ACPI methods supported Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.273740] ACPI: EC: event unblocked Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.273826] [drm:intel_opregion_setup [i915]] ASLE supported Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.274113] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA) Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.274227] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:10001010 hp_port:38 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.274327] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.274415] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.275060] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 11 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.275580] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.275668] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.275775] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.275865] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.275952] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.276037] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.276123] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.276224] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:43:pipe A] hw state readout: disabled Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.276330] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.276414] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.276498] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.276581] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.276664] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.276747] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:59:pipe B] hw state readout: disabled Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.276837] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.276920] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.277003] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.277093] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.277296] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.277377] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:75:pipe C] hw state readout: disabled Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.277466] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL A hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.277549] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL B hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.277640] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.277725] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:76:DDI A] hw state readout: disabled, pipe A Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.277810] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:83:DDI B] hw state readout: disabled, pipe A Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.277892] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:85:DP-MST A] hw state readout: disabled, pipe A Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.277975] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:86:DP-MST B] hw state readout: disabled, pipe B Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.278058] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:87:DP-MST C] hw state readout: disabled, pipe C Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.278142] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:93:DDI C] hw state readout: disabled, pipe A Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.278227] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:77:eDP-1] hw state readout: disabled Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.278312] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:84:DP-1] hw state readout: disabled Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.278396] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:90:HDMI-A-1] hw state readout: disabled Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.278481] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:94:HDMI-A-2] hw state readout: disabled Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.278574] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][setup_hw_state] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.278660] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.278745] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.278829] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.278911] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.278924] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.279006] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.279013] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.279098] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.279180] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.279264] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.279346] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.279429] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.279519] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.279602] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.279686] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.279769] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.279852] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.279934] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.280017] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.280099] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][setup_hw_state] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.280182] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.280275] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.280356] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.280527] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.280534] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.280615] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.280622] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.280705] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.280787] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.280869] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.280951] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.281032] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.281121] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.281203] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.281286] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.281368] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.281450] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.281532] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.281614] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.281697] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][setup_hw_state] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.281778] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.281859] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.281941] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.282021] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.282028] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.282109] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.282116] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.282198] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.282280] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.282362] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.282443] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.282524] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.282612] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.282694] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.282777] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.282858] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.282940] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.283022] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.283104] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.283441] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.283525] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.283606] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.283608] sd 0:0:0:0: [sda] Starting disk Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.283687] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.283768] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.283847] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.283927] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.283954] [drm:drm_atomic_check_only] checking 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.283965] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] mode changed Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.283970] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] enable changed Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.283974] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] active changed Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.283982] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.283986] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:77:eDP-1] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.283990] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.283994] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:84:DP-1] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.283998] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:90:HDMI-A-1] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.284002] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:90:HDMI-A-1] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.284006] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.284012] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:94:HDMI-A-2] keeps [ENCODER:93:DDI C], now on [CRTC:43:pipe A] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.284016] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: y, active: y Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.284022] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.284029] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: n, active: n Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.284032] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.284038] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: n, active: n Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.284042] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.284049] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.284139] [drm:intel_atomic_check [i915]] [CONNECTOR:94:HDMI-A-2] checking for sink bpp constrains Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.284266] [drm:intel_hdmi_compute_config [i915]] picking bpc to 12 for HDMI output Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.284354] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 36 for HDMI Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.284443] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 36, dithering: 0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.284529] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][modeset] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.284613] [drm:intel_dump_pipe_config [i915]] output_types: HDMI (0x40) Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.284696] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 36, dithering: 0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.284778] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.284860] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.284867] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.284949] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.284955] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.285040] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1082 1087 1125, type: 0x48 flags: 0x5 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.285125] [drm:intel_dump_pipe_config [i915]] port clock: 222750, pipe src size: 1920x1080, pixel rate 148500 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.285207] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.285289] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.285370] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.285459] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x6200, ebb4: 0x2000,pll0: 0x21, pll1: 0x100, pll2: 0x1a6666, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.285541] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.285623] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.285704] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.285786] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.285867] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.285948] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.286039] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.286125] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 13, actual 13 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.286220] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb 136 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.286307] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.286392] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb 137 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.286475] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.286572] [drm:bxt_get_dpll [i915]] [CRTC:43:pipe A] using pre-allocated PORT PLL C Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.286657] [drm:intel_reference_shared_dpll [i915]] using PORT PLL C for pipe A Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.286796] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 0) -> (0 - 988) Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.286839] [drm:skl_compute_wm [i915]] [PLANE:40:cursor A] ddb (0 - 0) -> (988 - 1020) Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.286841] [drm:drm_atomic_commit] committing 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.287194] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.287231] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.287484] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.287514] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.287543] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.287571] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.287599] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.287627] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.287657] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.287706] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.287735] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.287763] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.287793] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.287821] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.287870] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL C (active 1, on? 0) for crtc 43 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.287900] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL C Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.288019] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.288224] [drm:intel_enable_pipe [i915]] enabling pipe A Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.288718] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:94:HDMI-A-2], [ENCODER:93:DDI C] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.288748] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe A, 36 bytes ELD Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.288781] [drm:audio_config_hdmi_pixel_clock [i915]] Configuring HDMI audio for pixel clock 148500 (0x00090000) Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.288810] [drm:hsw_audio_config_update [i915]] using automatic N Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.288853] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.288883] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.299116] r8169 0000:01:00.0 enp1s0: link down Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.305621] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.305680] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.305768] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.305833] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.305883] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.305909] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.305953] [drm:__drm_atomic_state_free] Freeing atomic state 0000000013a1df23 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.306017] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.306072] [drm:intel_opregion_register [i915]] 4 outputs detected Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.306154] [drm:intel_dp_detect [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.306201] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.309155] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.309208] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.309256] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.309303] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.309354] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.309401] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.309450] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000062 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.309497] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.309544] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x0000006a Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.309590] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.339097] acpi LNXPOWER:1a: Turning OFF Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.350828] acpi LNXPOWER:0b: Turning OFF Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.353568] acpi LNXPOWER:09: Turning OFF Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.356322] acpi LNXPOWER:07: Turning OFF Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.358359] acpi LNXPOWER:05: Turning OFF Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.361106] acpi LNXPOWER:03: Turning OFF Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.363763] acpi LNXPOWER:01: Turning OFF Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.366160] OOM killer enabled. Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.366161] Restarting tasks ... done. Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.411354] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.411388] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.411421] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.411482] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.435855] PM: suspend exit Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.472587] [drm:drm_atomic_state_init] Allocated atomic state 00000000f5ca3309 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.472606] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 00000000bd5e7f37 state to 00000000f5ca3309 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.472626] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 0000000076f24e80 state to 00000000f5ca3309 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.472631] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000bd5e7f37 to [NOCRTC] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.472634] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000bd5e7f37 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.472638] [drm:drm_atomic_check_only] checking 00000000f5ca3309 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.472751] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb -1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.472835] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 1 -> 0, off 1, on 0, ms 0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.472856] [drm:drm_atomic_commit] committing 00000000f5ca3309 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.472929] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000f5ca3309 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.472947] [drm:__drm_atomic_state_free] Freeing atomic state 00000000f5ca3309 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.516701] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.517346] [drm:drm_helper_hpd_irq_event] [CONNECTOR:77:eDP-1] status updated from connected to connected Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.517471] [drm:intel_dp_detect [i915]] [CONNECTOR:84:DP-1] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.517565] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.517781] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.518279] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 00 02 02 06 06 00 00 00 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.518657] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.518753] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.518846] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.519220] [drm:drm_dp_read_desc] DP sink: OUI 00-00-00 dev-ID HW-rev 0.0 SW-rev 0.0 quirks 0x0000 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.519314] [drm:intel_dp_detect [i915]] Sink is not MST capable Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.520146] atkbd serio0: Failed to deactivate keyboard on isa0060/serio0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.523562] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.523654] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.523663] [drm:drm_helper_hpd_irq_event] [CONNECTOR:84:DP-1] status updated from connected to connected Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.523762] [drm:intel_hdmi_detect [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.524035] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.524131] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.524410] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.524419] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.524502] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.524585] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.525151] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.525235] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.525486] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.525567] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.525814] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.525824] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.525830] [drm:drm_helper_hpd_irq_event] [CONNECTOR:90:HDMI-A-1] status updated from disconnected to disconnected Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.525913] [drm:intel_hdmi_detect [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.552143] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.552213] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.552428] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.552438] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.552445] [drm:drm_detect_monitor_audio] Monitor has basic audio support Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.552451] [drm:drm_helper_hpd_irq_event] [CONNECTOR:94:HDMI-A-2] status updated from connected to connected Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.557918] [drm:drm_atomic_state_init] Allocated atomic state 00000000f5ca3309 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.557924] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 00000000f6d7d954 state to 00000000f5ca3309 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.557934] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000cf728f1b state to 00000000f5ca3309 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.557935] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000f6d7d954 to [CRTC:43:pipe A] Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.557937] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 00000000f6d7d954 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.557938] [drm:drm_atomic_check_only] checking 00000000f5ca3309 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.557979] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb 137 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.558012] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 0 -> 1, off 0, on 1, ms 0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.558024] [drm:drm_atomic_commit] committing 00000000f5ca3309 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.558066] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000f5ca3309 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.558073] [drm:__drm_atomic_state_free] Freeing atomic state 00000000f5ca3309 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.558091] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 00000000c4a6bb48 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.558125] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb 137 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.558156] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.788333] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300) Feb 19 21:49:30 GLK-2-GLKRVP1DDR405 kernel: [ 135.807439] ata1.00: configured for UDMA/133 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 135.826844] PM: suspend entry (deep) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 135.826846] PM: Syncing filesystems ... done. Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 135.827576] Freezing user space processes ... (elapsed 0.001 seconds) done. Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 135.828925] OOM killer disabled. Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 135.828925] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done. Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 135.830090] Suspending console(s) (use no_console_suspend to debug) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 135.896165] atkbd serio0: Failed to enable keyboard on isa0060/serio0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.620376] sd 0:0:0:0: [sda] Synchronizing SCSI cache Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.621145] sd 0:0:0:0: [sda] Stopping disk Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.622329] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.622515] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.622544] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623039] [drm:drm_atomic_state_init] Allocated atomic state 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623050] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000602ecb81 state to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623054] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000000f5a6246 state to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623059] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000da8df8fe state to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623064] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 00000000cd32830b state to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623068] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 000000002b1f7611 state to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623073] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 0000000026fe54a7 state to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623077] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 00000000fa64f480 state to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623081] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 000000004db0de77 state to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623085] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 00000000f8af5ec7 state to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623089] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 00000000a99e6923 state to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623093] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 00000000330b92c6 state to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623096] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 00000000f3f4b8a1 state to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623100] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 000000009e3779c4 state to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623104] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 00000000845bc458 state to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623107] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 00000000c6e56a57 state to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623112] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 0000000080254a2a state to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623115] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 000000003586939c state to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623119] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 000000003bea3e39 state to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623132] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 000000002e90fddc state to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623137] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 000000006e57d982 state to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623142] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:90:HDMI-A-1] 00000000e960cdb2 state to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623146] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 00000000ab52a8e3 state to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623158] [drm:drm_atomic_state_init] Allocated atomic state 000000003c6712ae Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623163] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000163e7a8c state to 000000003c6712ae Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623165] [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state 00000000163e7a8c Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623170] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 000000009fa3190b state to 000000003c6712ae Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623174] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 000000002d9bf969 state to 000000003c6712ae Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623176] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 000000003c6712ae Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623183] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 00000000504e0611 state to 000000003c6712ae Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623187] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 0000000031529d9f state to 000000003c6712ae Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623189] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 000000003c6712ae Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623195] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000f0faa210 state to 000000003c6712ae Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623197] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000003c6712ae Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623199] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000504e0611 to [NOCRTC] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623200] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000009fa3190b to [NOCRTC] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623201] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000009fa3190b Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623202] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000002d9bf969 to [NOCRTC] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623203] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000002d9bf969 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623205] [drm:drm_atomic_check_only] checking 000000003c6712ae Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623209] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] mode changed Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623210] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] enable changed Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623211] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] active changed Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623213] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623215] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:94:HDMI-A-2] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623218] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: n, active: n Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623219] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 000000003c6712ae Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623257] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623289] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623323] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623353] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623384] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623413] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623446] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 988) -> (0 - 0) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623474] [drm:skl_compute_wm [i915]] [PLANE:40:cursor A] ddb (988 - 1020) -> (0 - 0) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623475] [drm:drm_atomic_commit] committing 000000003c6712ae Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623531] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.623567] [drm:intel_disable_pipe [i915]] disabling pipe A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.640180] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.640239] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.640274] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL C (active 1, on? 1) for crtc 43 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.640328] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL C Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.640368] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.640428] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.640458] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.640487] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.640515] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.640544] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.640572] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.640603] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.640633] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.640662] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.640691] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.640727] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.640741] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000003c6712ae Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.640757] [drm:__drm_atomic_state_free] Freeing atomic state 000000003c6712ae Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.640827] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.640859] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000062 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.670600] hpet1: lost 7161 rtc interrupts Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.754414] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.754446] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.754475] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.754503] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.754533] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.754562] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.754590] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.754619] [drm:intel_power_well_disable [i915]] disabling DC off Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.754650] [drm:gen9_enable_dc5 [i915]] Enabling DC5 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.754679] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.754710] [drm:intel_power_well_disable [i915]] disabling always-on Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.755697] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.755776] [drm:intel_power_well_disable [i915]] disabling power well 1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.755811] [drm:hsw_power_well_disable [i915]] power well 1 forced on (bios:1 driver:0 kvmr:0 debug:0) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.755885] [drm:bxt_enable_dc9 [i915]] Enabling DC9 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.755917] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 08 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.823910] ACPI: Preparing to enter system sleep state S3 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.826279] ACPI: EC: event blocked Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.826280] ACPI: EC: EC stopped Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.826280] PM: Saving platform NVS memory Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 136.826288] Disabling non-boot CPUs ... Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.077102] smpboot: CPU 1 is now offline Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.325237] smpboot: CPU 2 is now offline Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.559489] smpboot: CPU 3 is now offline Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.564100] ACPI: Low-level resume complete Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.564309] ACPI: EC: EC started Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.564311] PM: Restoring platform NVS memory Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.565366] Enabling non-boot CPUs ... Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.565626] x86: Booting SMP configuration: Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.565628] smpboot: Booting Node 0 Processor 1 APIC 0x2 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.569577] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.570190] cache: parent cpu1 should not be sleeping Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.573161] CPU1 is up Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.573294] smpboot: Booting Node 0 Processor 2 APIC 0x4 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.574276] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.575002] cache: parent cpu2 should not be sleeping Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.578650] CPU2 is up Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.578873] smpboot: Booting Node 0 Processor 3 APIC 0x6 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.579856] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.580640] cache: parent cpu3 should not be sleeping Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.584026] CPU3 is up Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.589828] ACPI: Waking up from system sleep state S3 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.834021] [drm:gen9_sanitize_dc_state [i915]] Resetting DC state tracking from 08 to 00 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.834050] [drm:bxt_disable_dc9 [i915]] Disabling DC9 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.834079] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.834114] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.834145] [drm:intel_power_well_enable [i915]] enabling power well 1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.834184] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.834453] [drm:intel_power_well_enable [i915]] enabling always-on Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.834480] [drm:intel_power_well_enable [i915]] enabling DC off Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.834508] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.834539] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.834571] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.834703] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.834857] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.835010] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.835037] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 137.835065] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.010207] ACPI: EC: event unblocked Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.010285] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x799d3018 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.010369] [drm:intel_opregion_setup [i915]] Public ACPI methods supported Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.010400] [drm:intel_opregion_setup [i915]] ASLE supported Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.010572] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.010625] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:10001010 hp_port:38 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.010665] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.010698] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.011170] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 11 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.011534] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.011570] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.011615] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.011649] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.011680] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.011710] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.011741] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.011771] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:43:pipe A] hw state readout: disabled Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.011806] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.011836] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.011866] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.011896] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.011926] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.011955] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:59:pipe B] hw state readout: disabled Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.011991] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012021] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012050] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012084] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012114] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012143] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:75:pipe C] hw state readout: disabled Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012177] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL A hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012207] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL B hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012237] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012269] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:76:DDI A] hw state readout: disabled, pipe A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012302] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:83:DDI B] hw state readout: disabled, pipe A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012332] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:85:DP-MST A] hw state readout: disabled, pipe A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012362] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:86:DP-MST B] hw state readout: disabled, pipe B Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012391] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:87:DP-MST C] hw state readout: disabled, pipe C Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012421] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:93:DDI C] hw state readout: disabled, pipe A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012452] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:77:eDP-1] hw state readout: disabled Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012482] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:84:DP-1] hw state readout: disabled Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012512] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:90:HDMI-A-1] hw state readout: disabled Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012543] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:94:HDMI-A-2] hw state readout: disabled Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012577] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][setup_hw_state] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012607] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012639] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012668] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012697] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012704] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012733] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012735] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012765] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012794] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012823] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012852] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012881] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012913] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012941] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.012971] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.013000] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.013029] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.013058] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.013087] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.013116] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][setup_hw_state] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.013145] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.013173] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.013202] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.013230] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.013233] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.013261] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.013264] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.013293] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.013321] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.013350] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.013379] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.013407] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.013438] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.014133] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.014177] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.014221] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.014265] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.014310] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.014354] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.014398] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][setup_hw_state] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.014442] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.014486] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.014529] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.014573] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.014577] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.014621] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.014624] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.014669] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.014713] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.014757] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.014801] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.014845] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.014893] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.014937] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.014982] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015026] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015070] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015113] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015157] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015254] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015298] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015341] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015383] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015426] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015469] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015511] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015529] [drm:drm_atomic_check_only] checking 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015537] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] mode changed Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015539] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] enable changed Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015541] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] active changed Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015546] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015548] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:77:eDP-1] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015551] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015553] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:84:DP-1] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015555] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:90:HDMI-A-1] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015557] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:90:HDMI-A-1] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015560] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015563] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:94:HDMI-A-2] keeps [ENCODER:93:DDI C], now on [CRTC:43:pipe A] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015566] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: y, active: y Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015569] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015573] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: n, active: n Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015575] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015578] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: n, active: n Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015580] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015584] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015632] [drm:intel_atomic_check [i915]] [CONNECTOR:94:HDMI-A-2] checking for sink bpp constrains Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015694] [drm:intel_hdmi_compute_config [i915]] picking bpc to 12 for HDMI output Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015740] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 36 for HDMI Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015787] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 36, dithering: 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015833] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][modeset] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015877] [drm:intel_dump_pipe_config [i915]] output_types: HDMI (0x40) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015921] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 36, dithering: 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.015965] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.016008] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.016012] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.016055] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.016059] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.016104] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1082 1087 1125, type: 0x48 flags: 0x5 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.016148] [drm:intel_dump_pipe_config [i915]] port clock: 222750, pipe src size: 1920x1080, pixel rate 148500 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.016192] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.016235] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.016279] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.016326] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x6200, ebb4: 0x2000,pll0: 0x21, pll1: 0x100, pll2: 0x1a6666, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.016370] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.016413] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.016457] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.016500] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.016543] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.016586] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.016634] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.016679] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 13, actual 13 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.016730] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb 136 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.016774] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.016820] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb 137 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.016865] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.016917] [drm:bxt_get_dpll [i915]] [CRTC:43:pipe A] using pre-allocated PORT PLL C Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.016962] [drm:intel_reference_shared_dpll [i915]] using PORT PLL C for pipe A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.017015] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 0) -> (0 - 988) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.017057] [drm:skl_compute_wm [i915]] [PLANE:40:cursor A] ddb (0 - 0) -> (988 - 1020) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.017060] [drm:drm_atomic_commit] committing 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.017396] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.017449] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.017910] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.017957] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.018001] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.018045] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.018089] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.018132] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.018177] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.018245] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.018289] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.018333] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.018378] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.018422] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.018488] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL C (active 1, on? 0) for crtc 43 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.018533] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL C Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.018671] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.018906] [drm:intel_enable_pipe [i915]] enabling pipe A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.019407] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:94:HDMI-A-2], [ENCODER:93:DDI C] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.019453] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe A, 36 bytes ELD Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.019504] [drm:audio_config_hdmi_pixel_clock [i915]] Configuring HDMI audio for pixel clock 148500 (0x00090000) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.019549] [drm:hsw_audio_config_update [i915]] using automatic N Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.019611] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.019656] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.020501] sd 0:0:0:0: [sda] Starting disk Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.028429] r8169 0000:01:00.0 enp1s0: link down Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.036428] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.036495] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.036625] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.036699] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.036757] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.036797] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.036885] [drm:__drm_atomic_state_free] Freeing atomic state 000000005e0b1790 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.036964] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.037024] [drm:intel_opregion_register [i915]] 4 outputs detected Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.037089] [drm:intel_dp_detect [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.037143] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.040266] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.040327] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.040381] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.040435] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.040493] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.040546] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.040602] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000062 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.040655] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.040709] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x0000006a Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.040762] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.072649] acpi LNXPOWER:1a: Turning OFF Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.083843] acpi LNXPOWER:0b: Turning OFF Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.086682] acpi LNXPOWER:09: Turning OFF Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.089394] acpi LNXPOWER:07: Turning OFF Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.091586] acpi LNXPOWER:05: Turning OFF Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.094430] acpi LNXPOWER:03: Turning OFF Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.097197] acpi LNXPOWER:01: Turning OFF Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.099555] OOM killer enabled. Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.099556] Restarting tasks ... done. Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.142526] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.142560] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.142593] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.142636] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.169701] PM: suspend exit Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.219977] [drm:drm_atomic_state_init] Allocated atomic state 00000000ad3acdd8 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.219998] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 00000000386ef7f6 state to 00000000ad3acdd8 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.220018] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000d600d325 state to 00000000ad3acdd8 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.220022] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000386ef7f6 to [NOCRTC] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.220027] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000386ef7f6 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.220031] [drm:drm_atomic_check_only] checking 00000000ad3acdd8 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.220154] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:40:cursor A] with fb -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.220247] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:cursor A] visible 1 -> 0, off 1, on 0, ms 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.220270] [drm:drm_atomic_commit] committing 00000000ad3acdd8 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.220361] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000ad3acdd8 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.220378] [drm:__drm_atomic_state_free] Freeing atomic state 00000000ad3acdd8 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.246110] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.246739] [drm:drm_helper_hpd_irq_event] [CONNECTOR:77:eDP-1] status updated from connected to connected Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.246864] [drm:intel_dp_detect [i915]] [CONNECTOR:84:DP-1] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.246959] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.247176] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.247675] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 00 02 02 06 06 00 00 00 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.248053] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.248150] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.248244] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.248618] [drm:drm_dp_read_desc] DP sink: OUI 00-00-00 dev-ID HW-rev 0.0 SW-rev 0.0 quirks 0x0000 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.248712] [drm:intel_dp_detect [i915]] Sink is not MST capable Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.249459] atkbd serio0: Failed to deactivate keyboard on isa0060/serio0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.252829] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.252957] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.252967] [drm:drm_helper_hpd_irq_event] [CONNECTOR:84:DP-1] status updated from connected to connected Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.253069] [drm:intel_hdmi_detect [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.253363] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.253460] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.253756] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.253766] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.253860] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.253955] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.254531] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.254625] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.254902] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.254995] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.255266] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.255276] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.255283] [drm:drm_helper_hpd_irq_event] [CONNECTOR:90:HDMI-A-1] status updated from disconnected to disconnected Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.255377] [drm:intel_hdmi_detect [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.282084] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.282137] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.282343] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.282352] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.282358] [drm:drm_detect_monitor_audio] Monitor has basic audio support Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.282363] [drm:drm_helper_hpd_irq_event] [CONNECTOR:94:HDMI-A-2] status updated from connected to connected Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.288459] [drm:drm_atomic_state_init] Allocated atomic state 00000000943b182d Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.288474] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 00000000ad0b91ef state to 00000000943b182d Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.288486] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000cf2438f9 state to 00000000943b182d Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.288488] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000ad0b91ef Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.288490] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000ad0b91ef to [NOCRTC] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.288494] [drm:drm_atomic_check_only] checking 00000000943b182d Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.288558] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.288610] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 0, off 1, on 0, ms 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.288661] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 988) -> (0 - 0) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.288664] [drm:drm_atomic_commit] committing 00000000943b182d Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303015] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000943b182d Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303041] [drm:__drm_atomic_state_free] Freeing atomic state 00000000943b182d Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303511] [drm:drm_mode_setcrtc] [CRTC:43:pipe A] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303558] [drm:drm_atomic_state_init] Allocated atomic state 00000000ad3acdd8 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303571] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000602ecb81 state to 00000000ad3acdd8 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303586] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 00000000bd5e7f37 state to 00000000ad3acdd8 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303590] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state 00000000602ecb81 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303593] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000bd5e7f37 to [NOCRTC] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303597] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000bd5e7f37 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303601] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000ad3acdd8 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303624] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 00000000e899384b state to 00000000ad3acdd8 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303628] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000e899384b to [NOCRTC] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303632] [drm:drm_atomic_check_only] checking 00000000ad3acdd8 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303639] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] mode changed Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303642] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] enable changed Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303645] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] active changed Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303650] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303653] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:94:HDMI-A-2] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303658] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: n, active: n Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303662] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000ad3acdd8 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303681] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 0000000077960742 state to 00000000ad3acdd8 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303691] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000d600d325 state to 00000000ad3acdd8 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303786] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303861] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303943] [drm:skl_compute_wm [i915]] [PLANE:40:cursor A] ddb (988 - 1020) -> (0 - 0) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.303947] [drm:drm_atomic_commit] committing 00000000ad3acdd8 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.304102] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.304179] [drm:i915_audio_component_get_eld [i915]] Not valid for port C Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.304288] [drm:intel_disable_pipe [i915]] disabling pipe A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.320015] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.320156] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.320258] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL C (active 1, on? 1) for crtc 43 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.320375] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL C Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.320489] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.320613] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.320701] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.320788] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.320873] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.320958] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.321042] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.321133] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.321219] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.321304] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.321387] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.321495] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.321653] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.321734] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.321767] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000ad3acdd8 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.321812] [drm:__drm_atomic_state_free] Freeing atomic state 00000000ad3acdd8 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.322173] [drm:drm_mode_addfb2] [FB:136] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.329708] [drm:drm_mode_setcrtc] [CRTC:59:pipe B] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.329741] [drm:drm_mode_setcrtc] [CONNECTOR:77:eDP-1] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.329770] [drm:drm_atomic_state_init] Allocated atomic state 0000000062aec802 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.329783] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000cf2438f9 state to 0000000062aec802 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.329796] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 00000000ad0b91ef state to 0000000062aec802 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.329810] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 00000000cf2438f9 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.329813] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000ad0b91ef to [CRTC:59:pipe B] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.329816] [drm:drm_atomic_set_fb_for_plane] Set [FB:136] for plane state 00000000ad0b91ef Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.329820] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 0000000062aec802 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.329837] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 0000000071a45d0d state to 0000000062aec802 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.329840] [drm:drm_atomic_set_crtc_for_connector] Link connector state 0000000071a45d0d to [CRTC:59:pipe B] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.329846] [drm:drm_atomic_check_only] checking 0000000062aec802 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.329852] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] mode changed Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.329855] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] enable changed Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.329858] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] active changed Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.329862] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.329866] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:77:eDP-1] using [ENCODER:76:DDI A] on [CRTC:59:pipe B] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.329870] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: y, active: y Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.329872] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 0000000062aec802 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.329879] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 0000000062aec802 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.329953] [drm:intel_atomic_check [i915]] [CONNECTOR:77:eDP-1] checking for sink bpp constrains Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.330008] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.330015] [drm:drm_mode_debug_printmodeline] Modeline 80:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.330075] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 141000KHz Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.330134] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.330188] [drm:intel_dp_compute_config [i915]] DP link bw required 423000 available 540000 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.330243] [drm:intel_dp_compute_config [i915]] PSR disable by flag Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.330300] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.330357] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][modeset] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.330413] [drm:intel_dump_pipe_config [i915]] output_types: EDP (0x100) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.330468] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.330522] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6571076, gmch_n: 8388608, link_m: 273794, link_n: 524288, tu: 64 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.330576] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.330629] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.330634] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.330686] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.330691] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.330748] [drm:intel_dump_pipe_config [i915]] crtc timings: 141000 1920 1936 1952 2104 1080 1083 1097 1116, type: 0x48 flags: 0xa Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.330801] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 141000 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.330856] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.330909] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.330962] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.331024] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8200, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x19999a, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.331077] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.331130] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.331189] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.331242] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.331296] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.331350] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.331409] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.331465] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.331530] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb 136 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.331587] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.331646] [drm:bxt_get_dpll [i915]] [CRTC:59:pipe B] using pre-allocated PORT PLL A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.331704] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe B Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.331724] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000003e5747bc state to 0000000062aec802 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.331735] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000001a6472c9 state to 0000000062aec802 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.331796] [drm:skl_compute_wm [i915]] [PLANE:44:plane 1B] ddb (0 - 0) -> (0 - 988) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.331847] [drm:skl_compute_wm [i915]] [PLANE:56:cursor B] ddb (0 - 0) -> (988 - 1020) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.331850] [drm:drm_atomic_commit] committing 0000000062aec802 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.332138] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.332249] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.332295] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.332326] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.332357] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.332388] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.332419] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.332448] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.332481] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.332510] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.332564] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 2, on? 0) for crtc 59 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.332593] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.332725] [drm:edp_panel_on [i915]] Turn eDP port A panel power on Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.332761] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.332799] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 0000006a Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.332828] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.332857] [drm:edp_panel_on [i915]] Wait for panel power on Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.332888] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 0000006b Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.521630] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300) Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.534979] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.535086] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.536289] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.536387] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.536486] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.537168] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.537260] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.537942] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.538036] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.539008] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.539106] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:77:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.539666] [drm:intel_enable_pipe [i915]] enabling pipe B Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.539810] [drm:intel_edp_backlight_on [i915]] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.539907] [drm:intel_panel_enable_backlight [i915]] pipe B Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.540007] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 96000 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.541032] ata1.00: configured for UDMA/133 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.545698] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.556701] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.556774] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.556874] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.556909] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000062aec802 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.556935] [drm:__drm_atomic_state_free] Freeing atomic state 0000000062aec802 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.557051] [drm:drm_atomic_state_init] Allocated atomic state 0000000062aec802 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.557061] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 000000003ae5c7a7 state to 0000000062aec802 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.557063] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000003ae5c7a7 to [NOCRTC] Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.557066] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000003ae5c7a7 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.557068] [drm:drm_atomic_check_only] checking 0000000062aec802 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.557074] [drm:drm_atomic_commit] committing 0000000062aec802 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.557128] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000062aec802 Feb 19 21:49:48 GLK-2-GLKRVP1DDR405 kernel: [ 138.557134] [drm:__drm_atomic_state_free] Freeing atomic state 0000000062aec802 Feb 19 21:49:49 GLK-2-GLKRVP1DDR405 kernel: [ 138.625524] atkbd serio0: Failed to enable keyboard on isa0060/serio0 Feb 19 21:49:49 GLK-2-GLKRVP1DDR405 kernel: [ 138.641661] [drm:drm_atomic_state_init] Allocated atomic state 000000001ca44fce Feb 19 21:49:49 GLK-2-GLKRVP1DDR405 kernel: [ 138.641668] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 000000004b9b2212 state to 000000001ca44fce Feb 19 21:49:49 GLK-2-GLKRVP1DDR405 kernel: [ 138.641678] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 0000000044f8e72c state to 000000001ca44fce Feb 19 21:49:49 GLK-2-GLKRVP1DDR405 kernel: [ 138.641679] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000004b9b2212 to [CRTC:59:pipe B] Feb 19 21:49:49 GLK-2-GLKRVP1DDR405 kernel: [ 138.641681] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 000000004b9b2212 Feb 19 21:49:49 GLK-2-GLKRVP1DDR405 kernel: [ 138.641683] [drm:drm_atomic_check_only] checking 000000001ca44fce Feb 19 21:49:49 GLK-2-GLKRVP1DDR405 kernel: [ 138.641739] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:56:cursor B] with fb 137 Feb 19 21:49:49 GLK-2-GLKRVP1DDR405 kernel: [ 138.641771] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:56:cursor B] visible 0 -> 1, off 0, on 1, ms 0 Feb 19 21:49:49 GLK-2-GLKRVP1DDR405 kernel: [ 138.641784] [drm:drm_atomic_commit] committing 000000001ca44fce Feb 19 21:49:49 GLK-2-GLKRVP1DDR405 kernel: [ 138.641837] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000001ca44fce Feb 19 21:49:49 GLK-2-GLKRVP1DDR405 kernel: [ 138.641848] [drm:__drm_atomic_state_free] Freeing atomic state 000000001ca44fce Feb 19 21:49:49 GLK-2-GLKRVP1DDR405 kernel: [ 138.641867] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 00000000ae8780a4 Feb 19 21:49:49 GLK-2-GLKRVP1DDR405 kernel: [ 138.641900] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:56:cursor B] with fb 137 Feb 19 21:49:49 GLK-2-GLKRVP1DDR405 kernel: [ 138.641930] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:56:cursor B] visible 1 -> 0, off 1, on 0, ms 0 Feb 19 21:49:49 GLK-2-GLKRVP1DDR405 kernel: [ 138.748804] PM: suspend entry (deep) Feb 19 21:49:49 GLK-2-GLKRVP1DDR405 kernel: [ 138.748807] PM: Syncing filesystems ... done. Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 138.749660] Freezing user space processes ... (elapsed 0.001 seconds) done. Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 138.751092] OOM killer disabled. Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 138.751092] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done. Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 138.752293] Suspending console(s) (use no_console_suspend to debug) Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.539234] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.539385] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.539518] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.539547] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.540927] [drm:drm_atomic_state_init] Allocated atomic state 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.540936] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000a01d40e2 state to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.540944] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000d8d951cd state to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.540948] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000003a6f3d63 state to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.540954] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 00000000955eeae8 state to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.540961] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 0000000037c5b2bb state to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.540965] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 0000000084796fe3 state to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.540970] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 00000000ed5e98ff state to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.540975] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 00000000445863a1 state to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.540979] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 00000000eae07e1f state to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.540983] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 00000000d6cd234b state to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.540987] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 00000000ac9dcc17 state to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.540991] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 0000000008cea68f state to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.540995] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000b903a30f state to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.540999] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 0000000031bb0cdb state to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541003] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 000000000adda8b9 state to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541007] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 00000000713b7e28 state to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541011] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 00000000826b5346 state to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541014] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 000000003ae5c7a7 state to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541025] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 00000000c194cee8 state to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541030] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 0000000057b43134 state to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541035] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:90:HDMI-A-1] 00000000aad38139 state to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541039] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 000000009f9b47a8 state to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541048] [drm:drm_atomic_state_init] Allocated atomic state 000000001c9eb73e Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541053] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000b8918516 state to 000000001c9eb73e Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541055] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 000000001c9eb73e Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541059] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000138dd323 state to 000000001c9eb73e Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541061] [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state 00000000138dd323 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541065] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 00000000c84f65c3 state to 000000001c9eb73e Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541069] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000ed0aeaca state to 000000001c9eb73e Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541070] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 000000001c9eb73e Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541076] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 00000000499363f9 state to 000000001c9eb73e Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541080] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000cce3343c state to 000000001c9eb73e Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541081] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000001c9eb73e Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541083] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000499363f9 to [NOCRTC] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541084] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000c84f65c3 to [NOCRTC] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541085] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000c84f65c3 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541086] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000ed0aeaca to [NOCRTC] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541087] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000ed0aeaca Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541089] [drm:drm_atomic_check_only] checking 000000001c9eb73e Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541093] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] mode changed Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541094] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] enable changed Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541096] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] active changed Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541098] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541099] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:77:eDP-1] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541102] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: n, active: n Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541103] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 000000001c9eb73e Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541141] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541173] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541207] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541238] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541272] [drm:skl_compute_wm [i915]] [PLANE:44:plane 1B] ddb (0 - 988) -> (0 - 0) Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541300] [drm:skl_compute_wm [i915]] [PLANE:56:cursor B] ddb (988 - 1020) -> (0 - 0) Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541301] [drm:drm_atomic_commit] committing 000000001c9eb73e Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541358] [drm:intel_edp_backlight_off [i915]] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.541850] sd 0:0:0:0: [sda] Synchronizing SCSI cache Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.542481] sd 0:0:0:0: [sda] Stopping disk Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.616213] hpet1: lost 7160 rtc interrupts Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.745505] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.745542] [drm:intel_disable_pipe [i915]] disabling pipe B Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.756220] [drm:intel_edp_panel_off.part.32 [i915]] Turn eDP port A panel power off Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.756255] [drm:intel_edp_panel_off.part.32 [i915]] Wait for panel power off time Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.756288] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status 80000008 control 00000060 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.808449] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.808481] [drm:intel_power_well_disable [i915]] disabling DDI A IO power well Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.808549] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL A (active 2, on? 1) for crtc 59 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.808608] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL A Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.808649] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.808683] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.808713] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.808744] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.808776] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.808808] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.808838] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.808868] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.808897] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.808926] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.808965] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.808981] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000001c9eb73e Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.808992] [drm:__drm_atomic_state_free] Freeing atomic state 000000001c9eb73e Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.810471] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.810500] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.810528] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.810556] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.810587] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.810615] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.810646] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.810674] [drm:intel_power_well_disable [i915]] disabling DC off Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.810709] [drm:gen9_enable_dc5 [i915]] Enabling DC5 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.810741] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.810771] [drm:intel_power_well_disable [i915]] disabling always-on Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.811738] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.811810] [drm:intel_power_well_disable [i915]] disabling power well 1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.811846] [drm:hsw_power_well_disable [i915]] power well 1 forced on (bios:1 driver:0 kvmr:0 debug:0) Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.811915] [drm:bxt_enable_dc9 [i915]] Enabling DC9 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.811946] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 08 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.877923] ACPI: Preparing to enter system sleep state S3 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.880546] ACPI: EC: event blocked Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.880547] ACPI: EC: EC stopped Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.880548] PM: Saving platform NVS memory Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.880559] Disabling non-boot CPUs ... Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.897124] smpboot: CPU 1 is now offline Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.919961] smpboot: CPU 2 is now offline Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.951943] smpboot: CPU 3 is now offline Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.957864] ACPI: Low-level resume complete Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.958073] ACPI: EC: EC started Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.958075] PM: Restoring platform NVS memory Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.959164] Enabling non-boot CPUs ... Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.959341] x86: Booting SMP configuration: Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.959342] smpboot: Booting Node 0 Processor 1 APIC 0x2 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.960269] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.960765] cache: parent cpu1 should not be sleeping Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.961780] CPU1 is up Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.961894] smpboot: Booting Node 0 Processor 2 APIC 0x4 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.962756] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.963255] cache: parent cpu2 should not be sleeping Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.964460] CPU2 is up Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.964575] smpboot: Booting Node 0 Processor 3 APIC 0x6 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.965436] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.965917] cache: parent cpu3 should not be sleeping Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.967079] CPU3 is up Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 139.973107] ACPI: Waking up from system sleep state S3 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.140621] [drm:gen9_sanitize_dc_state [i915]] Resetting DC state tracking from 08 to 00 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.140690] [drm:bxt_disable_dc9 [i915]] Disabling DC9 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.140758] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.140833] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.140902] [drm:intel_power_well_enable [i915]] enabling power well 1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.140990] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.141345] [drm:intel_power_well_enable [i915]] enabling always-on Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.141409] [drm:intel_power_well_enable [i915]] enabling DC off Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.141475] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.141544] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.141616] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.141767] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.141966] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.142165] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.142230] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.142294] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.317362] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x799d3018 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.317570] [drm:intel_opregion_setup [i915]] Public ACPI methods supported Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.317668] [drm:intel_opregion_setup [i915]] ASLE supported Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.317671] ACPI: EC: event unblocked Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.317995] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA) Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.318119] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:10001010 hp_port:38 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.318229] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.318327] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.319009] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 11 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.319509] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.319602] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.319727] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.319827] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.319925] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.320036] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.320133] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.320228] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:43:pipe A] hw state readout: disabled Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.320328] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.320422] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.320515] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.320609] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.320704] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.320797] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:59:pipe B] hw state readout: disabled Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.320899] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.320993] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.321090] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.321259] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.321385] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.321478] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:75:pipe C] hw state readout: disabled Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.321579] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL A hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.321673] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL B hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.321767] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.321863] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:76:DDI A] hw state readout: disabled, pipe A Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.321958] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:83:DDI B] hw state readout: disabled, pipe A Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.322052] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:85:DP-MST A] hw state readout: disabled, pipe A Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.322144] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:86:DP-MST B] hw state readout: disabled, pipe B Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.322237] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:87:DP-MST C] hw state readout: disabled, pipe C Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.322331] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:93:DDI C] hw state readout: disabled, pipe A Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.322428] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:77:eDP-1] hw state readout: disabled Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.322523] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:84:DP-1] hw state readout: disabled Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.322618] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:90:HDMI-A-1] hw state readout: disabled Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.322713] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:94:HDMI-A-2] hw state readout: disabled Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.322818] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][setup_hw_state] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.322914] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.323010] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.323104] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.323196] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.323209] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.323301] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.323309] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.323405] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.323499] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.323592] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.323686] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.323779] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.323881] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.323985] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.324080] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.324174] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.324269] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.324362] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.324457] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.324553] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][setup_hw_state] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.324647] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.324742] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.324835] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.324926] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.324946] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.325038] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.325051] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.325151] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.325251] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.325351] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.325450] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.325550] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.325655] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.325753] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.325847] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.325940] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.326033] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.326126] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.326219] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.326312] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][setup_hw_state] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.326404] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.326497] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.326589] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.326681] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.326688] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.326780] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.326788] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.326882] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.326974] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327067] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327143] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327176] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327212] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327245] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327279] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327313] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327347] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327383] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327416] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327505] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327539] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327572] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327604] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327638] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327672] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327705] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327722] [drm:drm_atomic_check_only] checking 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327728] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] mode changed Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327729] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] enable changed Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327731] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] active changed Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327754] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327757] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:77:eDP-1] keeps [ENCODER:76:DDI A], now on [CRTC:59:pipe B] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327759] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327761] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:84:DP-1] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327762] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:90:HDMI-A-1] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327764] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:90:HDMI-A-1] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327765] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327767] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:94:HDMI-A-2] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327769] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: n, active: n Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327771] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327774] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: y, active: y Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327776] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327778] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: n, active: n Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327780] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327783] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327818] [drm:intel_atomic_check [i915]] [CONNECTOR:77:eDP-1] checking for sink bpp constrains Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327820] sd 0:0:0:0: [sda] Starting disk Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327853] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327862] [drm:drm_mode_debug_printmodeline] Modeline 80:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327899] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 141000KHz Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327934] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.327967] [drm:intel_dp_compute_config [i915]] DP link bw required 423000 available 540000 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328000] [drm:intel_dp_compute_config [i915]] PSR disable by flag Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328034] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328069] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][modeset] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328101] [drm:intel_dump_pipe_config [i915]] output_types: EDP (0x100) Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328134] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328167] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6571076, gmch_n: 8388608, link_m: 273794, link_n: 524288, tu: 64 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328199] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328231] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328234] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328267] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328269] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328302] [drm:intel_dump_pipe_config [i915]] crtc timings: 141000 1920 1936 1952 2104 1080 1083 1097 1116, type: 0x48 flags: 0xa Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328335] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 141000 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328368] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328401] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328432] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328467] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328499] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328532] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328564] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328597] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328629] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328661] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328697] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328729] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328771] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb 136 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328808] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328846] [drm:bxt_get_dpll [i915]] [CRTC:59:pipe B] using pre-allocated PORT PLL A Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328880] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe B Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328923] [drm:skl_compute_wm [i915]] [PLANE:44:plane 1B] ddb (0 - 0) -> (0 - 988) Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328954] [drm:skl_compute_wm [i915]] [PLANE:56:cursor B] ddb (0 - 0) -> (988 - 1020) Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.328956] [drm:drm_atomic_commit] committing 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.329261] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.329303] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.329444] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.329509] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.329542] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.329575] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.329607] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.329639] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.329672] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.329705] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.329738] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.329770] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.329802] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.329835] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.329872] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.329935] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 2, on? 0) for crtc 59 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.329969] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.330112] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.330144] [drm:edp_panel_on [i915]] Turn eDP port A panel power on Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.330175] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.330208] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000062 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.330237] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.330267] [drm:edp_panel_on [i915]] Wait for panel power on Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.330298] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000063 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.342874] r8169 0000:01:00.0 enp1s0: link down Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.432193] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.432292] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.432384] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.432529] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.531570] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.531659] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.531749] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.531849] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.531980] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.532073] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.533244] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.533327] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.533414] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.534077] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.534160] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.535124] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.535210] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:77:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.535760] [drm:intel_enable_pipe [i915]] enabling pipe B Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.535883] [drm:intel_edp_backlight_on [i915]] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.535978] [drm:intel_panel_enable_backlight [i915]] pipe B Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.536067] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 96000 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.536159] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.552686] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.552824] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.552918] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.553059] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.553162] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.553212] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.553331] [drm:__drm_atomic_state_free] Freeing atomic state 0000000062aec802 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.553434] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.553523] [drm:intel_opregion_register [i915]] 4 outputs detected Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.553617] [drm:intel_dp_detect [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.553705] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.553787] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.553868] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.556803] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.557444] [drm:drm_helper_hpd_irq_event] [CONNECTOR:77:eDP-1] status updated from connected to connected Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.557539] [drm:intel_dp_detect [i915]] [CONNECTOR:84:DP-1] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.557629] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.557817] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.558317] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 00 02 02 06 06 00 00 00 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.558697] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.558789] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.558880] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.558966] acpi LNXPOWER:1a: Turning OFF Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.559260] [drm:drm_dp_read_desc] DP sink: OUI 00-00-00 dev-ID HW-rev 0.0 SW-rev 0.0 quirks 0x0000 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.559352] [drm:intel_dp_detect [i915]] Sink is not MST capable Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.559876] atkbd serio0: Failed to deactivate keyboard on isa0060/serio0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.563269] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.563302] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.563305] [drm:drm_helper_hpd_irq_event] [CONNECTOR:84:DP-1] status updated from connected to connected Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.563339] [drm:intel_hdmi_detect [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.563533] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.563565] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.563758] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.563763] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.563807] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.563836] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.564422] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.564451] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.564636] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.564664] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.564849] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.564854] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.564856] [drm:drm_helper_hpd_irq_event] [CONNECTOR:90:HDMI-A-1] status updated from disconnected to disconnected Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.564884] [drm:intel_hdmi_detect [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.569023] acpi LNXPOWER:0b: Turning OFF Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.571902] acpi LNXPOWER:09: Turning OFF Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.574656] acpi LNXPOWER:07: Turning OFF Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.576963] acpi LNXPOWER:05: Turning OFF Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.579709] acpi LNXPOWER:03: Turning OFF Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.582642] acpi LNXPOWER:01: Turning OFF Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.584991] OOM killer enabled. Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.584992] Restarting tasks ... done. Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.594907] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.594941] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.595130] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.595137] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.595144] [drm:drm_detect_monitor_audio] Monitor has basic audio support Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.595148] [drm:drm_helper_hpd_irq_event] [CONNECTOR:94:HDMI-A-2] status updated from connected to connected Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.778673] PM: suspend exit Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.819416] [drm:drm_atomic_state_init] Allocated atomic state 000000000283868b Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.819434] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000c84f65c3 state to 000000000283868b Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.819454] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000081b0e63 state to 000000000283868b Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.819458] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000c84f65c3 to [NOCRTC] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.819462] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000c84f65c3 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.819466] [drm:drm_atomic_check_only] checking 000000000283868b Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.819494] [drm:drm_atomic_commit] committing 000000000283868b Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.819577] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000000283868b Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.819594] [drm:__drm_atomic_state_free] Freeing atomic state 000000000283868b Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.828050] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300) Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.841013] ata1.00: configured for UDMA/133 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.898144] [drm:drm_atomic_state_init] Allocated atomic state 0000000081684b8e Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.898155] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000c3567c2f state to 0000000081684b8e Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.898165] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000644f9357 state to 0000000081684b8e Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.898167] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000c3567c2f to [CRTC:59:pipe B] Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.898168] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 00000000c3567c2f Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.898170] [drm:drm_atomic_check_only] checking 0000000081684b8e Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.898187] [drm:drm_atomic_commit] committing 0000000081684b8e Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.898248] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000081684b8e Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.898260] [drm:__drm_atomic_state_free] Freeing atomic state 0000000081684b8e Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.898276] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 0000000001325f05 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.898327] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:56:cursor B] with fb 137 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.898360] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:56:cursor B] visible 0 -> 1, off 0, on 1, ms 0 Feb 19 21:50:06 GLK-2-GLKRVP1DDR405 kernel: [ 140.939877] atkbd serio0: Failed to enable keyboard on isa0060/serio0 Feb 19 21:50:07 GLK-2-GLKRVP1DDR405 kernel: [ 140.983037] PM: suspend entry (deep) Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 140.983039] PM: Syncing filesystems ... done. Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 140.983766] Freezing user space processes ... (elapsed 0.001 seconds) done. Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 140.985115] OOM killer disabled. Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 140.985116] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done. Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 140.986287] Suspending console(s) (use no_console_suspend to debug) Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.768297] sd 0:0:0:0: [sda] Synchronizing SCSI cache Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.768878] sd 0:0:0:0: [sda] Stopping disk Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.770734] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.770879] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771011] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771040] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771536] [drm:drm_atomic_state_init] Allocated atomic state 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771545] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 0000000077960742 state to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771551] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000602ecb81 state to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771556] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000da8df8fe state to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771561] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 0000000070c51792 state to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771567] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 00000000b64c0b02 state to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771571] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 000000004219628e state to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771575] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 0000000048b14729 state to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771579] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 00000000c3b9876c state to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771583] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 00000000785462f0 state to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771586] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 000000002cfc62bd state to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771591] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 0000000019ee27aa state to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771594] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 00000000ba4610a9 state to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771599] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 000000008a5e07aa state to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771604] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 00000000af37cd34 state to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771607] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 0000000047a064ee state to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771615] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 00000000c2f7c533 state to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771619] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 000000004b9b2212 state to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771623] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 000000002753e743 state to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771635] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 00000000ced049b5 state to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771640] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 00000000741df15a state to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771645] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:90:HDMI-A-1] 000000009c2dc154 state to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771649] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 00000000c23bee36 state to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771664] [drm:drm_atomic_state_init] Allocated atomic state 000000008862cea1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771669] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000000f5a6246 state to 000000008862cea1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771671] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 000000008862cea1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771676] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000d600d325 state to 000000008862cea1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771678] [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state 00000000d600d325 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771684] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 000000002a6caab8 state to 000000008862cea1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771689] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 000000005c98ea7f state to 000000008862cea1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771690] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 000000008862cea1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771696] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 00000000d7631186 state to 000000008862cea1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771700] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 0000000031529d9f state to 000000008862cea1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771702] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000008862cea1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771704] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000d7631186 to [NOCRTC] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771705] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000002a6caab8 to [NOCRTC] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771706] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000002a6caab8 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771707] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000005c98ea7f to [NOCRTC] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771708] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000005c98ea7f Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771709] [drm:drm_atomic_check_only] checking 000000008862cea1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771714] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] mode changed Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771715] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] enable changed Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771717] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] active changed Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771719] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771720] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:77:eDP-1] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771723] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: n, active: n Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771724] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 000000008862cea1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771762] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771794] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771829] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771860] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771897] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:56:cursor B] with fb -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771926] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:56:cursor B] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771960] [drm:skl_compute_wm [i915]] [PLANE:44:plane 1B] ddb (0 - 988) -> (0 - 0) Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771987] [drm:skl_compute_wm [i915]] [PLANE:56:cursor B] ddb (988 - 1020) -> (0 - 0) Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.771989] [drm:drm_atomic_commit] committing 000000008862cea1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.772050] [drm:intel_edp_backlight_off [i915]] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.831131] hpet1: lost 7161 rtc interrupts Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.979930] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.979967] [drm:intel_disable_pipe [i915]] disabling pipe B Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.985444] [drm:intel_edp_panel_off.part.32 [i915]] Turn eDP port A panel power off Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.985477] [drm:intel_edp_panel_off.part.32 [i915]] Wait for panel power off time Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 141.985515] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status 80000008 control 00000060 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.037662] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.037697] [drm:intel_power_well_disable [i915]] disabling DDI A IO power well Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.037760] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL A (active 2, on? 1) for crtc 59 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.037819] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL A Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.037863] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.037897] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.037929] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.037961] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.037990] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.038021] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.038051] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.038081] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.038111] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.038140] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.038180] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.038197] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000008862cea1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.038209] [drm:__drm_atomic_state_free] Freeing atomic state 000000008862cea1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.051953] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.051985] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.052013] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.052041] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.052070] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.052098] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.052126] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.052153] [drm:intel_power_well_disable [i915]] disabling DC off Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.052188] [drm:gen9_enable_dc5 [i915]] Enabling DC5 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.052221] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.052251] [drm:intel_power_well_disable [i915]] disabling always-on Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.053218] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.053291] [drm:intel_power_well_disable [i915]] disabling power well 1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.053327] [drm:hsw_power_well_disable [i915]] power well 1 forced on (bios:1 driver:0 kvmr:0 debug:0) Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.053393] [drm:bxt_enable_dc9 [i915]] Enabling DC9 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.053421] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 08 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.121892] ACPI: Preparing to enter system sleep state S3 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.125097] ACPI: EC: event blocked Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.125098] ACPI: EC: EC stopped Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.125100] PM: Saving platform NVS memory Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.125110] Disabling non-boot CPUs ... Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.149578] IRQ fixup: irq 121 move in progress, old vector 54 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.149594] irq_migrate_all_off_this_cpu: 5 callbacks suppressed Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.149597] IRQ 124: no longer affine to CPU1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.150637] smpboot: CPU 1 is now offline Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.173576] IRQ 122: no longer affine to CPU2 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.174612] smpboot: CPU 2 is now offline Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.197583] IRQ 1: no longer affine to CPU3 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.197593] IRQ 8: no longer affine to CPU3 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.197604] IRQ 9: no longer affine to CPU3 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.197624] IRQ 121: no longer affine to CPU3 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.198679] smpboot: CPU 3 is now offline Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.204596] ACPI: Low-level resume complete Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.204797] ACPI: EC: EC started Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.204799] PM: Restoring platform NVS memory Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.205856] Enabling non-boot CPUs ... Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.206071] x86: Booting SMP configuration: Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.206072] smpboot: Booting Node 0 Processor 1 APIC 0x2 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.207330] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.207935] cache: parent cpu1 should not be sleeping Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.209337] CPU1 is up Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.209487] smpboot: Booting Node 0 Processor 2 APIC 0x4 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.210777] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.211346] cache: parent cpu2 should not be sleeping Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.212850] CPU2 is up Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.212999] smpboot: Booting Node 0 Processor 3 APIC 0x6 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.214286] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.214848] cache: parent cpu3 should not be sleeping Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.216489] CPU3 is up Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.225975] ACPI: Waking up from system sleep state S3 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.383051] [drm:gen9_sanitize_dc_state [i915]] Resetting DC state tracking from 08 to 00 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.383120] [drm:bxt_disable_dc9 [i915]] Disabling DC9 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.383187] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.383264] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.383333] [drm:intel_power_well_enable [i915]] enabling power well 1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.383421] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.383776] [drm:intel_power_well_enable [i915]] enabling always-on Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.383840] [drm:intel_power_well_enable [i915]] enabling DC off Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.383905] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.383975] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.384046] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.384199] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.384398] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.384597] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.384662] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.384726] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.559673] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x799d3018 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.559872] [drm:intel_opregion_setup [i915]] Public ACPI methods supported Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.559874] ACPI: EC: event unblocked Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.559983] [drm:intel_opregion_setup [i915]] ASLE supported Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.560340] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA) Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.560464] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:10001010 hp_port:38 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.560575] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.560674] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.561366] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 11 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.561861] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.561954] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.562078] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.562177] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.562275] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.562391] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.562486] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.562580] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:43:pipe A] hw state readout: disabled Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.562678] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.562773] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.562866] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.562960] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.563052] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.563144] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:59:pipe B] hw state readout: disabled Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.563563] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.563664] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.563757] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.563855] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.563947] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.564039] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:75:pipe C] hw state readout: disabled Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.564135] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL A hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.564229] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL B hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.564322] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.564418] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:76:DDI A] hw state readout: disabled, pipe A Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.564512] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:83:DDI B] hw state readout: disabled, pipe A Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.564605] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:85:DP-MST A] hw state readout: disabled, pipe A Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.564697] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:86:DP-MST B] hw state readout: disabled, pipe B Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.564790] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:87:DP-MST C] hw state readout: disabled, pipe C Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.564884] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:93:DDI C] hw state readout: disabled, pipe A Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.564980] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:77:eDP-1] hw state readout: disabled Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.565075] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:84:DP-1] hw state readout: disabled Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.565169] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:90:HDMI-A-1] hw state readout: disabled Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.565264] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:94:HDMI-A-2] hw state readout: disabled Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.565368] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][setup_hw_state] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.565463] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.565559] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.565652] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.565745] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.565758] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.565850] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.565858] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.565952] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.566045] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.566138] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.566231] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.566324] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.566433] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.566528] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.566623] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.566718] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.566812] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.566906] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.566999] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.567093] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][setup_hw_state] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.567187] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.567280] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.567372] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.567463] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.567471] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.567562] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.567569] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.567663] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.567756] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.567848] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.567941] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.568033] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.568132] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.568225] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.568318] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.568411] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.568503] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.568596] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.568689] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.568781] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][setup_hw_state] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.568873] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.568964] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.569055] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.569146] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.569154] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.569241] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.569244] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.569288] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.569332] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.569375] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.569418] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.569461] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.569508] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.569551] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.569595] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.569638] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.569681] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.569727] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.569771] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.569872] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.569916] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.569959] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570001] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570045] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570088] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570090] sd 0:0:0:0: [sda] Starting disk Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570132] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570151] [drm:drm_atomic_check_only] checking 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570159] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] mode changed Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570161] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] enable changed Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570163] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] active changed Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570168] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570172] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:77:eDP-1] keeps [ENCODER:76:DDI A], now on [CRTC:59:pipe B] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570175] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570177] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:84:DP-1] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570180] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:90:HDMI-A-1] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570182] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:90:HDMI-A-1] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570184] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570186] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:94:HDMI-A-2] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570188] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: n, active: n Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570192] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570195] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: y, active: y Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570197] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570200] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: n, active: n Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570202] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570207] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570254] [drm:intel_atomic_check [i915]] [CONNECTOR:77:eDP-1] checking for sink bpp constrains Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570307] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570313] [drm:drm_mode_debug_printmodeline] Modeline 80:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570362] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 141000KHz Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570409] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570454] [drm:intel_dp_compute_config [i915]] DP link bw required 423000 available 540000 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570498] [drm:intel_dp_compute_config [i915]] PSR disable by flag Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570545] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570590] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][modeset] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570635] [drm:intel_dump_pipe_config [i915]] output_types: EDP (0x100) Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570679] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570723] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6571076, gmch_n: 8388608, link_m: 273794, link_n: 524288, tu: 64 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570766] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570809] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570813] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570856] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570859] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570905] [drm:intel_dump_pipe_config [i915]] crtc timings: 141000 1920 1936 1952 2104 1080 1083 1097 1116, type: 0x48 flags: 0xa Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570949] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 141000 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.570993] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.571036] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.571079] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.571126] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.571170] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.571214] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.571257] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.571300] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.571343] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.571386] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.571436] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.571482] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.571535] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb 136 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.571580] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.571625] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:56:cursor B] with fb 137 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.571671] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:56:cursor B] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.571719] [drm:bxt_get_dpll [i915]] [CRTC:59:pipe B] using pre-allocated PORT PLL A Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.571764] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe B Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.571820] [drm:skl_compute_wm [i915]] [PLANE:44:plane 1B] ddb (0 - 0) -> (0 - 988) Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.571862] [drm:skl_compute_wm [i915]] [PLANE:56:cursor B] ddb (0 - 0) -> (988 - 1020) Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.571864] [drm:drm_atomic_commit] committing 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.572201] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.572254] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.572412] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.572488] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.572532] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.572576] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.572619] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.572662] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.572706] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.572750] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.572794] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.572838] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.572882] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.572927] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.572971] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.573037] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 2, on? 0) for crtc 59 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.573082] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.573226] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.573283] [drm:edp_panel_on [i915]] Turn eDP port A panel power on Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.573313] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.573347] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000062 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.573376] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.573406] [drm:edp_panel_on [i915]] Wait for panel power on Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.573438] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000063 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.581264] r8169 0000:01:00.0 enp1s0: link down Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.675399] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.675498] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.675593] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.675724] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.773866] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.773958] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.774048] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.774147] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.774245] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.774368] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.775543] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.775627] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.775714] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.776371] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.776454] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.777411] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.777496] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:77:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.778045] [drm:intel_enable_pipe [i915]] enabling pipe B Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.778167] [drm:intel_edp_backlight_on [i915]] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.778255] [drm:intel_panel_enable_backlight [i915]] pipe B Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.778352] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 96000 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.778445] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.794932] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.795027] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.795083] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.795181] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.795249] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.795286] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.795357] [drm:__drm_atomic_state_free] Freeing atomic state 00000000f58a3f25 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.795458] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.795531] [drm:intel_opregion_register [i915]] 4 outputs detected Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.795608] [drm:intel_dp_detect [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.795680] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.795747] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.795813] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.798282] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.798897] [drm:drm_helper_hpd_irq_event] [CONNECTOR:77:eDP-1] status updated from connected to connected Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.798966] [drm:intel_dp_detect [i915]] [CONNECTOR:84:DP-1] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.799032] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.799190] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.799654] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 00 02 02 06 06 00 00 00 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.799996] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.800063] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.800129] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.800499] [drm:drm_dp_read_desc] DP sink: OUI 00-00-00 dev-ID HW-rev 0.0 SW-rev 0.0 quirks 0x0000 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.800566] [drm:intel_dp_detect [i915]] Sink is not MST capable Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.800748] acpi LNXPOWER:1a: Turning OFF Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.802271] atkbd serio0: Failed to deactivate keyboard on isa0060/serio0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.805497] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.805526] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.805530] [drm:drm_helper_hpd_irq_event] [CONNECTOR:84:DP-1] status updated from connected to connected Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.805561] [drm:intel_hdmi_detect [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.805751] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.805780] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.805965] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.805969] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.805998] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.806027] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.806613] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.806642] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.806913] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.806942] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.807127] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.807131] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.807133] [drm:drm_helper_hpd_irq_event] [CONNECTOR:90:HDMI-A-1] status updated from disconnected to disconnected Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.807162] [drm:intel_hdmi_detect [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.810643] acpi LNXPOWER:0b: Turning OFF Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.813548] acpi LNXPOWER:09: Turning OFF Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.816425] acpi LNXPOWER:07: Turning OFF Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.818682] acpi LNXPOWER:05: Turning OFF Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.821901] acpi LNXPOWER:03: Turning OFF Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.825205] acpi LNXPOWER:01: Turning OFF Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.828054] OOM killer enabled. Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.828056] Restarting tasks ... done. Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.843706] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.843739] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.843929] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.843937] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.843942] [drm:drm_detect_monitor_audio] Monitor has basic audio support Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 142.843946] [drm:drm_helper_hpd_irq_event] [CONNECTOR:94:HDMI-A-2] status updated from connected to connected Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 143.066438] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300) Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 143.081279] ata1.00: configured for UDMA/133 Feb 19 21:50:24 GLK-2-GLKRVP1DDR405 kernel: [ 143.178318] atkbd serio0: Failed to enable keyboard on isa0060/serio0 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.427009] PM: suspend exit Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.461160] [drm:drm_atomic_state_init] Allocated atomic state 000000004f84703f Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.461170] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000c3567c2f state to 000000004f84703f Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.461180] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000644f9357 state to 000000004f84703f Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.461182] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000c3567c2f to [NOCRTC] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.461184] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000c3567c2f Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.461186] [drm:drm_atomic_check_only] checking 000000004f84703f Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.461251] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:56:cursor B] with fb -1 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.461292] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:56:cursor B] visible 1 -> 0, off 1, on 0, ms 0 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.461303] [drm:drm_atomic_commit] committing 000000004f84703f Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.461355] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000004f84703f Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.461365] [drm:__drm_atomic_state_free] Freeing atomic state 000000004f84703f Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.529408] [drm:drm_atomic_state_init] Allocated atomic state 000000009c0002f4 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.529418] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 00000000ae8780a4 state to 000000009c0002f4 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.529425] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000004cbd5e49 state to 000000009c0002f4 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.529426] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000ae8780a4 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.529428] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000ae8780a4 to [NOCRTC] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.529430] [drm:drm_atomic_check_only] checking 000000009c0002f4 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.529493] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb -1 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.529530] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 1 -> 0, off 1, on 0, ms 0 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.529566] [drm:skl_compute_wm [i915]] [PLANE:44:plane 1B] ddb (0 - 988) -> (0 - 0) Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.529568] [drm:drm_atomic_commit] committing 000000009c0002f4 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544168] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000009c0002f4 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544177] [drm:__drm_atomic_state_free] Freeing atomic state 000000009c0002f4 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544371] [drm:drm_mode_setcrtc] [CRTC:59:pipe B] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544391] [drm:drm_atomic_state_init] Allocated atomic state 000000004f84703f Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544398] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000a01d40e2 state to 000000004f84703f Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544403] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 00000000a1d21531 state to 000000004f84703f Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544405] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state 00000000a01d40e2 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544406] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000a1d21531 to [NOCRTC] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544407] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000a1d21531 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544409] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 000000004f84703f Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544422] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 0000000064d2fdec state to 000000004f84703f Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544424] [drm:drm_atomic_set_crtc_for_connector] Link connector state 0000000064d2fdec to [NOCRTC] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544425] [drm:drm_atomic_check_only] checking 000000004f84703f Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544429] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] mode changed Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544431] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] enable changed Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544432] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] active changed Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544434] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544436] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:77:eDP-1] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544438] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: n, active: n Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544440] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 000000004f84703f Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544490] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544527] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544538] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000003e5747bc state to 000000004f84703f Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544543] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000001a6472c9 state to 000000004f84703f Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544583] [drm:skl_compute_wm [i915]] [PLANE:56:cursor B] ddb (988 - 1020) -> (0 - 0) Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544585] [drm:drm_atomic_commit] committing 000000004f84703f Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.544643] [drm:intel_edp_backlight_off [i915]] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.750460] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.750570] [drm:intel_disable_pipe [i915]] disabling pipe B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.761246] [drm:intel_edp_panel_off.part.32 [i915]] Turn eDP port A panel power off Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.761341] [drm:intel_edp_panel_off.part.32 [i915]] Wait for panel power off time Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.761436] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000060 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.812164] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.812255] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.812342] [drm:intel_power_well_disable [i915]] disabling DDI A IO power well Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.812481] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL A (active 2, on? 1) for crtc 59 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.812600] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL A Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.812713] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.812804] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.812891] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.812976] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.813061] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.813146] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.813234] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.813321] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.813405] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.813489] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.813591] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.813684] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.813792] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.813828] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000004f84703f Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.813874] [drm:__drm_atomic_state_free] Freeing atomic state 000000004f84703f Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.814385] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.814496] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.814605] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.814749] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.815167] [drm:drm_mode_addfb2] [FB:136] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825345] [drm:drm_mode_setcrtc] [CRTC:59:pipe B] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825370] [drm:drm_mode_setcrtc] [CONNECTOR:84:DP-1] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825392] [drm:drm_atomic_state_init] Allocated atomic state 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825401] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000003dd94d3d state to 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825407] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 00000000721af2b8 state to 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825413] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1200] for CRTC state 000000003dd94d3d Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825414] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000721af2b8 to [CRTC:59:pipe B] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825416] [drm:drm_atomic_set_fb_for_plane] Set [FB:136] for plane state 00000000721af2b8 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825418] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825432] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 000000007d4949a9 state to 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825434] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000007d4949a9 to [CRTC:59:pipe B] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825438] [drm:drm_atomic_check_only] checking 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825442] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] mode changed Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825443] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] enable changed Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825445] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] active changed Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825447] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825449] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:84:DP-1] using [ENCODER:83:DDI B] on [CRTC:59:pipe B] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825452] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: y, active: y Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825453] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825457] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825507] [drm:intel_atomic_check [i915]] [CONNECTOR:84:DP-1] checking for sink bpp constrains Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825537] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825570] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 154000KHz Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825601] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825631] [drm:intel_dp_compute_config [i915]] DP link bw required 462000 available 648000 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825660] [drm:intel_dp_compute_config [i915]] PSR disable by flag Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825691] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825722] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][modeset] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825753] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80) Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825783] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 24, dithering: 0 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825813] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5980766, gmch_n: 8388608, link_m: 249198, link_n: 262144, tu: 64 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825841] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825870] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825873] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825902] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825904] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825933] [drm:intel_dump_pipe_config [i915]] crtc timings: 154000 1920 1968 2000 2080 1200 1203 1209 1235, type: 0x48 flags: 0x9 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825962] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1200, pixel rate 154000 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.825992] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.826020] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.826049] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.826081] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.826109] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.826138] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.826167] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.826196] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.826224] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.826252] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.826306] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.826337] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.826374] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb 136 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.826408] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.826444] [drm:bxt_get_dpll [i915]] [CRTC:59:pipe B] using pre-allocated PORT PLL B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.826476] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.826494] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000001d209655 state to 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.826504] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 0000000021240f11 state to 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.826538] [drm:skl_compute_wm [i915]] [PLANE:44:plane 1B] ddb (0 - 0) -> (0 - 988) Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.826566] [drm:skl_compute_wm [i915]] [PLANE:56:cursor B] ddb (0 - 0) -> (988 - 1020) Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.826570] [drm:drm_atomic_commit] committing 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.826835] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.826904] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.827160] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.827190] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.827219] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.827250] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.827279] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.827307] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.827337] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.827369] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.827399] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.827448] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 2, on? 0) for crtc 59 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.827478] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.827602] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.827643] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.827809] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.828439] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.828609] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.828638] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.828808] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.828851] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.828881] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.828913] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.828943] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.829138] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.829273] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.829440] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.829476] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.829684] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.829732] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.829766] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.829801] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.829994] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.830128] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.830648] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.830686] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.830906] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.830944] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.830979] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.831014] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.831213] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.831640] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.831801] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.831830] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.832033] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.832065] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.832420] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.832451] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.832615] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.832953] [drm:intel_enable_pipe [i915]] enabling pipe B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.833012] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.849890] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.849930] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.850004] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.850039] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.850067] [drm:__drm_atomic_state_free] Freeing atomic state 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.850139] [drm:drm_atomic_state_init] Allocated atomic state 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.850146] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000a003ce4f state to 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.850148] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000a003ce4f to [NOCRTC] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.850149] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000a003ce4f Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.850150] [drm:drm_atomic_check_only] checking 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.850155] [drm:drm_atomic_commit] committing 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.850177] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.850181] [drm:__drm_atomic_state_free] Freeing atomic state 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.928219] [drm:drm_atomic_state_init] Allocated atomic state 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.928228] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 0000000050b48292 state to 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.928237] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000d925f289 state to 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.928239] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000050b48292 to [CRTC:59:pipe B] Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.928240] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 0000000050b48292 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.928242] [drm:drm_atomic_check_only] checking 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.928297] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:56:cursor B] with fb 137 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.928330] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:56:cursor B] visible 0 -> 1, off 0, on 1, ms 0 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.928341] [drm:drm_atomic_commit] committing 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.928402] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.928407] [drm:__drm_atomic_state_free] Freeing atomic state 00000000fcbbdd19 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.928423] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 000000003fa5eda5 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.928457] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:56:cursor B] with fb 137 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 143.928489] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:56:cursor B] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 144.020767] PM: suspend entry (deep) Feb 19 21:50:25 GLK-2-GLKRVP1DDR405 kernel: [ 144.020875] PM: Syncing filesystems ... done. Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.028861] Freezing user space processes ... (elapsed 0.006 seconds) done. Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.035508] OOM killer disabled. Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.035509] Freezing remaining freezable tasks ... (elapsed 0.002 seconds) done. Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.038866] Suspending console(s) (use no_console_suspend to debug) Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.877676] hpet1: lost 7161 rtc interrupts Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925046] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925177] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925339] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925367] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925395] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925773] [drm:drm_atomic_state_init] Allocated atomic state 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925782] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000f0faa210 state to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925788] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000cd24c7ab state to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925792] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000000b9987b5 state to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925797] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 000000006ee8874b state to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925802] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 000000002a6caab8 state to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925810] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 00000000ed0aeaca state to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925820] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 0000000081b81083 state to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925824] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 00000000a3311db0 state to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925829] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 00000000822f5dcf state to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925833] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 000000004b44951c state to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925836] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 0000000065fae432 state to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925840] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 00000000c91d627c state to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925844] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 000000001351c489 state to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925848] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 000000007f126fb6 state to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925851] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 00000000e77ed880 state to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925855] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 000000007064a2dd state to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925859] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 00000000aa8f626f state to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925863] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 00000000dd7ab258 state to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925875] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 000000003904f1e2 state to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925880] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 00000000d004f389 state to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925887] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:90:HDMI-A-1] 000000002f0dd009 state to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925892] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 000000009e42dcce state to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925901] [drm:drm_atomic_state_init] Allocated atomic state 00000000626277da Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925905] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000007a231afd state to 00000000626277da Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925907] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000626277da Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925912] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 0000000055d7c9e3 state to 00000000626277da Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925914] [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state 0000000055d7c9e3 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925920] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 0000000025648f3e state to 00000000626277da Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925924] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000ed0731e4 state to 00000000626277da Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925925] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000626277da Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925931] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 00000000c5778ed1 state to 00000000626277da Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925936] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000004d155375 state to 00000000626277da Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925938] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000626277da Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925940] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000c5778ed1 to [NOCRTC] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925941] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000025648f3e to [NOCRTC] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925942] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000025648f3e Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925943] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000ed0731e4 to [NOCRTC] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925944] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000ed0731e4 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925945] [drm:drm_atomic_check_only] checking 00000000626277da Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925950] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] mode changed Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925951] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] enable changed Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925952] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] active changed Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925954] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925956] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:84:DP-1] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925959] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: n, active: n Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925960] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000626277da Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.925997] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.926028] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.926062] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.926092] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.926122] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:56:cursor B] with fb -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.926152] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:56:cursor B] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.926185] [drm:skl_compute_wm [i915]] [PLANE:44:plane 1B] ddb (0 - 988) -> (0 - 0) Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.926213] [drm:skl_compute_wm [i915]] [PLANE:56:cursor B] ddb (988 - 1020) -> (0 - 0) Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.926215] [drm:drm_atomic_commit] committing 00000000626277da Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.926289] [drm:intel_disable_pipe [i915]] disabling pipe B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.926499] sd 0:0:0:0: [sda] Synchronizing SCSI cache Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.927280] sd 0:0:0:0: [sda] Stopping disk Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.934527] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.934586] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 2, on? 1) for crtc 59 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.934644] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.934685] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.934715] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.934745] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.934777] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.934811] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.934840] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.934870] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.934900] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.934930] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.934960] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.934998] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.935012] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000626277da Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 144.935023] [drm:__drm_atomic_state_free] Freeing atomic state 00000000626277da Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.080946] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.080978] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.081006] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.081034] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.081063] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.081091] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.081119] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.081147] [drm:intel_power_well_disable [i915]] disabling DC off Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.081182] [drm:gen9_enable_dc5 [i915]] Enabling DC5 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.081211] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.081241] [drm:intel_power_well_disable [i915]] disabling always-on Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.082207] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.082282] [drm:intel_power_well_disable [i915]] disabling power well 1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.082316] [drm:hsw_power_well_disable [i915]] power well 1 forced on (bios:1 driver:0 kvmr:0 debug:0) Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.082382] [drm:bxt_enable_dc9 [i915]] Enabling DC9 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.082415] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 08 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.153659] ACPI: Preparing to enter system sleep state S3 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.157509] ACPI: EC: event blocked Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.157511] ACPI: EC: EC stopped Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.157512] PM: Saving platform NVS memory Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.157524] Disabling non-boot CPUs ... Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.178471] smpboot: CPU 1 is now offline Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.205124] smpboot: CPU 2 is now offline Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.228821] smpboot: CPU 3 is now offline Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.234738] ACPI: Low-level resume complete Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.234946] ACPI: EC: EC started Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.234947] PM: Restoring platform NVS memory Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.236007] Enabling non-boot CPUs ... Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.236240] x86: Booting SMP configuration: Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.236242] smpboot: Booting Node 0 Processor 1 APIC 0x2 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.237491] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.238092] cache: parent cpu1 should not be sleeping Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.239481] CPU1 is up Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.239642] smpboot: Booting Node 0 Processor 2 APIC 0x4 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.240931] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.241444] cache: parent cpu2 should not be sleeping Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.242632] CPU2 is up Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.242756] smpboot: Booting Node 0 Processor 3 APIC 0x6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.243720] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.244234] cache: parent cpu3 should not be sleeping Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.245630] CPU3 is up Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.252648] ACPI: Waking up from system sleep state S3 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.413364] [drm:gen9_sanitize_dc_state [i915]] Resetting DC state tracking from 08 to 00 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.413426] [drm:bxt_disable_dc9 [i915]] Disabling DC9 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.413488] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.413559] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.413623] [drm:intel_power_well_enable [i915]] enabling power well 1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.413703] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.414040] [drm:intel_power_well_enable [i915]] enabling always-on Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.414099] [drm:intel_power_well_enable [i915]] enabling DC off Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.414159] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.414222] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.414287] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.414435] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.414628] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.414819] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.414878] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.414937] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.589875] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x799d3018 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.590076] [drm:intel_opregion_setup [i915]] Public ACPI methods supported Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.590079] ACPI: EC: event unblocked Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.590188] [drm:intel_opregion_setup [i915]] ASLE supported Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.590565] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA) Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.590690] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:10001010 hp_port:38 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.590802] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.590901] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.591587] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 11 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.592088] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.592182] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.592307] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.592413] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.592500] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.592587] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.592674] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.592775] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:43:pipe A] hw state readout: disabled Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.592865] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.592949] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.593034] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.593121] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.593206] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.593298] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:59:pipe B] hw state readout: disabled Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.593391] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.593477] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.593560] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.593662] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.593754] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.593835] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:75:pipe C] hw state readout: disabled Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.593922] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL A hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.594005] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL B hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.594094] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.594178] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:76:DDI A] hw state readout: disabled, pipe A Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.594262] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:83:DDI B] hw state readout: disabled, pipe A Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.594344] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:85:DP-MST A] hw state readout: disabled, pipe A Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.594428] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:86:DP-MST B] hw state readout: disabled, pipe B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.594510] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:87:DP-MST C] hw state readout: disabled, pipe C Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.594598] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:93:DDI C] hw state readout: disabled, pipe A Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.594683] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:77:eDP-1] hw state readout: disabled Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.594767] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:84:DP-1] hw state readout: disabled Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.594851] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:90:HDMI-A-1] hw state readout: disabled Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.594936] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:94:HDMI-A-2] hw state readout: disabled Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.595030] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][setup_hw_state] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.595115] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.595199] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.595282] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.595364] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.595376] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.595458] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.595470] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.595555] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.595637] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.595720] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.595809] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.595891] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.595980] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.596070] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.596153] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.596241] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.596323] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.596411] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.596500] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.596582] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][setup_hw_state] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.596669] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.596768] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.596850] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.596931] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.596942] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.597024] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.597031] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.597115] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.597201] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.597284] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.597366] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.597457] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.597544] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.597634] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.597718] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.597806] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.597889] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.597976] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.598059] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.598147] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][setup_hw_state] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.598229] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.598312] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.598394] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.598476] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.598482] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.598564] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.598571] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.598655] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.598738] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.598820] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.598903] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.598985] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.599072] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.599154] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.599237] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.599319] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.599401] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.599484] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.599566] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.599715] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.599797] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.599885] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.599965] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600046] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600126] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600206] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600232] [drm:drm_atomic_check_only] checking 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600243] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] mode changed Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600248] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] enable changed Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600251] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] active changed Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600259] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600266] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:77:eDP-1] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600272] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600284] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:84:DP-1] keeps [ENCODER:83:DDI B], now on [CRTC:59:pipe B] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600288] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:90:HDMI-A-1] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600292] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:90:HDMI-A-1] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600296] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600300] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:94:HDMI-A-2] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600304] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: n, active: n Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600310] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600317] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: y, active: y Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600321] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600327] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: n, active: n Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600331] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600337] sd 0:0:0:0: [sda] Starting disk Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600341] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600434] [drm:intel_atomic_check [i915]] [CONNECTOR:84:DP-1] checking for sink bpp constrains Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600464] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600497] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 154000KHz Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600527] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600556] [drm:intel_dp_compute_config [i915]] DP link bw required 462000 available 648000 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600586] [drm:intel_dp_compute_config [i915]] PSR disable by flag Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600616] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600646] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][modeset] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600676] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80) Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600712] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 24, dithering: 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600741] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5980766, gmch_n: 8388608, link_m: 249198, link_n: 262144, tu: 64 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600770] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600798] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600801] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600829] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600832] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600861] [drm:intel_dump_pipe_config [i915]] crtc timings: 154000 1920 1968 2000 2080 1200 1203 1209 1235, type: 0x48 flags: 0x9 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600889] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1200, pixel rate 154000 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600918] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600946] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.600974] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.601005] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8200, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x19999a, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.601033] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.601062] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.601090] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.601118] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.601146] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.601174] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.601206] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.601235] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.601270] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb 136 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.601299] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.601329] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:56:cursor B] with fb 137 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.601358] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:56:cursor B] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.601390] [drm:bxt_get_dpll [i915]] [CRTC:59:pipe B] using pre-allocated PORT PLL B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.601421] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.601459] [drm:skl_compute_wm [i915]] [PLANE:44:plane 1B] ddb (0 - 0) -> (0 - 988) Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.601486] [drm:skl_compute_wm [i915]] [PLANE:56:cursor B] ddb (0 - 0) -> (988 - 1020) Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.601488] [drm:drm_atomic_commit] committing 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.601804] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.601840] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.602092] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.602179] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.602208] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.602237] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.602267] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.602295] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.602323] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.602352] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.602384] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.602413] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.602442] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.602471] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.602500] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.602549] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 2, on? 0) for crtc 59 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.602578] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.602702] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.602743] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.602911] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.603538] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.603709] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.603738] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.603908] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.603950] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.603980] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.604014] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.604043] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.604267] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.604395] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.604561] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.604589] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.604793] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.604834] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.604863] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.604891] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.605078] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.605206] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.605370] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.605404] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.605611] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.605642] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.605671] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.605701] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.605895] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.606321] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.606481] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.606509] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.606711] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.606743] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.607093] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.607123] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.607290] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.607629] [drm:intel_enable_pipe [i915]] enabling pipe B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.607691] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.608020] r8169 0000:01:00.0 enp1s0: link down Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.624659] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.624754] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.624797] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.624876] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.624930] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.624965] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.625037] [drm:__drm_atomic_state_free] Freeing atomic state 00000000500f20f6 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.625097] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.625137] [drm:intel_opregion_register [i915]] 4 outputs detected Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.625182] [drm:intel_dp_detect [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.625219] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.628168] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.628222] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.628270] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.628316] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.628366] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.628412] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.628462] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000062 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.628508] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.628556] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x0000006a Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.628601] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.651111] acpi LNXPOWER:1a: Turning OFF Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.664207] acpi LNXPOWER:0b: Turning OFF Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.667722] acpi LNXPOWER:09: Turning OFF Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.670377] acpi LNXPOWER:07: Turning OFF Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.672415] acpi LNXPOWER:05: Turning OFF Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.675257] acpi LNXPOWER:03: Turning OFF Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.677901] acpi LNXPOWER:01: Turning OFF Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.680162] OOM killer enabled. Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.680163] Restarting tasks ... done. Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.730394] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.730430] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.730463] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.730509] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.832703] atkbd serio0: Failed to deactivate keyboard on isa0060/serio0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.833100] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.833695] [drm:drm_helper_hpd_irq_event] [CONNECTOR:77:eDP-1] status updated from connected to connected Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.833745] [drm:intel_dp_detect [i915]] [CONNECTOR:84:DP-1] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.833775] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.834193] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 00 02 02 06 03 00 00 00 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.834492] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.834522] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.834551] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.834913] [drm:drm_dp_read_desc] DP sink: OUI 00-00-00 dev-ID HW-rev 0.0 SW-rev 0.0 quirks 0x0000 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.834942] [drm:intel_dp_detect [i915]] Sink is not MST capable Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.835280] [drm:intel_dp_check_link_status [i915]] DDI B: channel EQ not ok, retraining Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.836206] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.836234] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.836264] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.836906] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.836935] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.837874] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.838229] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.841698] [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR* CPU pipe B FIFO underrun Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.844829] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.844838] [drm:drm_helper_hpd_irq_event] [CONNECTOR:84:DP-1] status updated from connected to connected Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.844872] [drm:intel_hdmi_detect [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.845065] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.845096] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.845283] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.845288] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.845319] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.845350] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.845937] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.845967] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.846153] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.846181] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.846365] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.846369] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.846371] [drm:drm_helper_hpd_irq_event] [CONNECTOR:90:HDMI-A-1] status updated from disconnected to disconnected Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.846401] [drm:intel_hdmi_detect [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.873351] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.873395] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.873593] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.873601] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.873607] [drm:drm_detect_monitor_audio] Monitor has basic audio support Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 145.873612] [drm:drm_helper_hpd_irq_event] [CONNECTOR:94:HDMI-A-2] status updated from connected to connected Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 146.104880] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300) Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 146.123903] ata1.00: configured for UDMA/133 Feb 19 21:50:42 GLK-2-GLKRVP1DDR405 kernel: [ 146.208691] atkbd serio0: Failed to enable keyboard on isa0060/serio0 Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.377552] PM: suspend exit Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.425503] [drm:drm_atomic_state_init] Allocated atomic state 00000000cc05888c Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.425521] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 0000000046ec628e state to 00000000cc05888c Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.425539] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000cf728f1b state to 00000000cc05888c Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.425543] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000046ec628e to [NOCRTC] Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.425546] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000046ec628e Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.425550] [drm:drm_atomic_check_only] checking 00000000cc05888c Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.425661] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:56:cursor B] with fb -1 Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.425744] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:56:cursor B] visible 1 -> 0, off 1, on 0, ms 0 Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.425764] [drm:drm_atomic_commit] committing 00000000cc05888c Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.425849] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000cc05888c Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.425870] [drm:__drm_atomic_state_free] Freeing atomic state 00000000cc05888c Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.514739] [drm:drm_atomic_state_init] Allocated atomic state 00000000cc05888c Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.514748] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 000000004eabda11 state to 00000000cc05888c Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.514757] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 0000000076f24e80 state to 00000000cc05888c Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.514759] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000004eabda11 to [CRTC:59:pipe B] Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.514760] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 000000004eabda11 Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.514762] [drm:drm_atomic_check_only] checking 00000000cc05888c Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.514816] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:56:cursor B] with fb 137 Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.514847] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:56:cursor B] visible 0 -> 1, off 0, on 1, ms 0 Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.514860] [drm:drm_atomic_commit] committing 00000000cc05888c Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.514915] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000cc05888c Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.514921] [drm:__drm_atomic_state_free] Freeing atomic state 00000000cc05888c Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.514936] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 00000000754b571d Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.514969] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:56:cursor B] with fb 137 Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.514999] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:56:cursor B] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.619127] PM: suspend entry (deep) Feb 19 21:50:43 GLK-2-GLKRVP1DDR405 kernel: [ 146.619129] PM: Syncing filesystems ... done. Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 146.627269] Freezing user space processes ... (elapsed 0.005 seconds) done. Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 146.633275] OOM killer disabled. Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 146.633275] Freezing remaining freezable tasks ... (elapsed 0.002 seconds) done. Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 146.636396] Suspending console(s) (use no_console_suspend to debug) Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.483325] hpet1: lost 7160 rtc interrupts Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.516857] sd 0:0:0:0: [sda] Synchronizing SCSI cache Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.517725] sd 0:0:0:0: [sda] Stopping disk Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.522658] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.522814] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.522843] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523213] [drm:drm_atomic_state_init] Allocated atomic state 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523223] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000602ecb81 state to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523228] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000000f5a6246 state to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523232] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000d600d325 state to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523237] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 0000000070c51792 state to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523241] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 000000007f3a7693 state to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523245] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 000000006c082b7b state to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523250] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 0000000024592d64 state to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523253] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 000000008a5e07aa state to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523257] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 00000000785462f0 state to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523261] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 000000004219628e state to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523265] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 0000000048b14729 state to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523269] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 00000000c3b9876c state to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523274] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 000000002cfc62bd state to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523278] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 0000000019ee27aa state to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523282] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 00000000af37cd34 state to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523286] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 00000000ba4610a9 state to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523289] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 0000000047a064ee state to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523296] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 00000000b5f113aa state to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523309] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 000000004c8dd423 state to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523314] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 00000000734e6247 state to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523322] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:90:HDMI-A-1] 00000000c23bee36 state to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523327] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 000000009c2dc154 state to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523341] [drm:drm_atomic_state_init] Allocated atomic state 000000000738540d Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523346] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 0000000031529d9f state to 000000000738540d Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523348] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 000000000738540d Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523354] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000163e7a8c state to 000000000738540d Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523355] [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state 00000000163e7a8c Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523360] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 0000000050b48292 state to 000000000738540d Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523365] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 000000004c371c11 state to 000000000738540d Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523366] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 000000000738540d Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523373] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 00000000ced049b5 state to 000000000738540d Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523377] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 0000000077960742 state to 000000000738540d Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523379] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000000738540d Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523380] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000ced049b5 to [NOCRTC] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523382] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000050b48292 to [NOCRTC] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523383] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000050b48292 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523384] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000004c371c11 to [NOCRTC] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523385] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000004c371c11 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523386] [drm:drm_atomic_check_only] checking 000000000738540d Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523390] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] mode changed Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523392] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] enable changed Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523393] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] active changed Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523395] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523396] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:84:DP-1] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523399] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: n, active: n Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523401] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 000000000738540d Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523438] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523470] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523504] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523535] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523565] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:56:cursor B] with fb -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523594] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:56:cursor B] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523628] [drm:skl_compute_wm [i915]] [PLANE:44:plane 1B] ddb (0 - 988) -> (0 - 0) Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523656] [drm:skl_compute_wm [i915]] [PLANE:56:cursor B] ddb (988 - 1020) -> (0 - 0) Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523658] [drm:drm_atomic_commit] committing 000000000738540d Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.523718] [drm:intel_disable_pipe [i915]] disabling pipe B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.526535] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.526596] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 2, on? 1) for crtc 59 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.526653] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.526696] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.526727] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.526757] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.526786] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.526820] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.526849] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.526879] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.526909] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.526938] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.526967] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.527003] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.527017] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000000738540d Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.527035] [drm:__drm_atomic_state_free] Freeing atomic state 000000000738540d Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.527107] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.527140] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000062 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.654070] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.654102] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.654130] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.654161] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.654190] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.654218] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.654246] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.654274] [drm:intel_power_well_disable [i915]] disabling DC off Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.654307] [drm:gen9_enable_dc5 [i915]] Enabling DC5 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.654338] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.654368] [drm:intel_power_well_disable [i915]] disabling always-on Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.655335] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.655406] [drm:intel_power_well_disable [i915]] disabling power well 1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.655443] [drm:hsw_power_well_disable [i915]] power well 1 forced on (bios:1 driver:0 kvmr:0 debug:0) Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.655509] [drm:bxt_enable_dc9 [i915]] Enabling DC9 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.655540] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 08 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.721856] ACPI: Preparing to enter system sleep state S3 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.724715] ACPI: EC: event blocked Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.724716] ACPI: EC: EC stopped Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.724717] PM: Saving platform NVS memory Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.724727] Disabling non-boot CPUs ... Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.750953] smpboot: CPU 1 is now offline Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.775122] smpboot: CPU 2 is now offline Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.799200] smpboot: CPU 3 is now offline Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.805116] ACPI: Low-level resume complete Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.805331] ACPI: EC: EC started Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.805332] PM: Restoring platform NVS memory Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.806387] Enabling non-boot CPUs ... Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.806617] x86: Booting SMP configuration: Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.806619] smpboot: Booting Node 0 Processor 1 APIC 0x2 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.807867] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.808441] cache: parent cpu1 should not be sleeping Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.809818] CPU1 is up Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.809988] smpboot: Booting Node 0 Processor 2 APIC 0x4 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.811562] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.812031] cache: parent cpu2 should not be sleeping Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.813180] CPU2 is up Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.813313] smpboot: Booting Node 0 Processor 3 APIC 0x6 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.814284] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.814816] cache: parent cpu3 should not be sleeping Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.816231] CPU3 is up Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.823360] ACPI: Waking up from system sleep state S3 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.987921] [drm:gen9_sanitize_dc_state [i915]] Resetting DC state tracking from 08 to 00 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.987996] [drm:bxt_disable_dc9 [i915]] Disabling DC9 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.988070] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.988152] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.988228] [drm:intel_power_well_enable [i915]] enabling power well 1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.988324] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.988689] [drm:intel_power_well_enable [i915]] enabling always-on Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.988760] [drm:intel_power_well_enable [i915]] enabling DC off Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.988832] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.988908] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.989011] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.989196] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.989396] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.989596] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.989685] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 147.989773] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.164592] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x799d3018 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.164797] [drm:intel_opregion_setup [i915]] Public ACPI methods supported Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.164800] ACPI: EC: event unblocked Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.164897] [drm:intel_opregion_setup [i915]] ASLE supported Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.165385] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA) Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.165511] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:10001010 hp_port:38 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.165622] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.165721] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.166407] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 11 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.166915] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.167008] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.167148] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.167243] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.167321] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.167400] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.167481] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.167558] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:43:pipe A] hw state readout: disabled Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.167638] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.167713] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.167788] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.167863] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.167938] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.168012] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:59:pipe B] hw state readout: disabled Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.168097] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.168173] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.168252] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.168418] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.168524] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.168598] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:75:pipe C] hw state readout: disabled Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.168675] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL A hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.168750] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL B hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.168826] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.168908] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:76:DDI A] hw state readout: disabled, pipe A Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.168984] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:83:DDI B] hw state readout: disabled, pipe A Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.169058] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:85:DP-MST A] hw state readout: disabled, pipe A Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.169132] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:86:DP-MST B] hw state readout: disabled, pipe B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.169206] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:87:DP-MST C] hw state readout: disabled, pipe C Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.169282] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:93:DDI C] hw state readout: disabled, pipe A Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.169360] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:77:eDP-1] hw state readout: disabled Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.169437] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:84:DP-1] hw state readout: disabled Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.169513] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:90:HDMI-A-1] hw state readout: disabled Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.169589] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:94:HDMI-A-2] hw state readout: disabled Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.169674] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][setup_hw_state] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.169751] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.169828] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.169903] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.169979] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.169990] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.170064] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.170071] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.170147] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.170222] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.170298] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.170373] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.170447] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.170528] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.170603] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.170678] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.170753] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.170829] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.170903] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.170978] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.171052] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][setup_hw_state] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.171127] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.171211] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.171286] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.171360] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.171366] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.171440] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.171446] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.171521] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.171596] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.171671] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.171746] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.171820] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.171900] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.171974] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.172049] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.172123] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.172198] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.172272] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.172346] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.172421] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][setup_hw_state] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.172495] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.172569] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.172643] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.172716] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.172722] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.172796] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.172802] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.172878] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.172953] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.173027] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.173102] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.173176] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.173257] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.173332] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.173406] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.173480] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.173554] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.173628] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.173703] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.173846] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.173920] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.173992] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174064] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174137] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174208] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174280] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174306] [drm:drm_atomic_check_only] checking 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174317] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] mode changed Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174321] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] enable changed Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174325] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] active changed Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174331] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174335] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:77:eDP-1] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174340] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174345] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:84:DP-1] keeps [ENCODER:83:DDI B], now on [CRTC:59:pipe B] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174349] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:90:HDMI-A-1] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174353] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:90:HDMI-A-1] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174356] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174360] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174364] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: n, active: n Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174369] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174374] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: y, active: y Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174378] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174383] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: n, active: n Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174387] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174394] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174473] [drm:intel_atomic_check [i915]] [CONNECTOR:84:DP-1] checking for sink bpp constrains Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174550] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174633] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 154000KHz Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174713] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174790] [drm:intel_dp_compute_config [i915]] DP link bw required 462000 available 648000 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174867] [drm:intel_dp_compute_config [i915]] PSR disable by flag Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.174946] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175027] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][modeset] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175104] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80) Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175107] sd 0:0:0:0: [sda] Starting disk Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175207] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 24, dithering: 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175238] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5980766, gmch_n: 8388608, link_m: 249198, link_n: 262144, tu: 64 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175268] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175297] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175300] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175329] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175332] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175362] [drm:intel_dump_pipe_config [i915]] crtc timings: 154000 1920 1968 2000 2080 1200 1203 1209 1235, type: 0x48 flags: 0x9 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175392] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1200, pixel rate 154000 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175422] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175452] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175482] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175514] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8200, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x19999a, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175544] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175574] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175603] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175633] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175666] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175695] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175728] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175758] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175795] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb 136 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175825] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175856] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:56:cursor B] with fb 137 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175887] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:56:cursor B] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175920] [drm:bxt_get_dpll [i915]] [CRTC:59:pipe B] using pre-allocated PORT PLL B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175951] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.175991] [drm:skl_compute_wm [i915]] [PLANE:44:plane 1B] ddb (0 - 0) -> (0 - 988) Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.176020] [drm:skl_compute_wm [i915]] [PLANE:56:cursor B] ddb (0 - 0) -> (988 - 1020) Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.176022] [drm:drm_atomic_commit] committing 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.176348] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.176387] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.176642] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.176741] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.176771] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.176802] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.176832] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.176861] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.176891] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.176922] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.176955] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.176986] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.177016] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.177047] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.177077] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.177127] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 2, on? 0) for crtc 59 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.177158] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.177283] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.177325] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.177524] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.178152] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.178326] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.178356] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.178528] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.178572] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.178602] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.178634] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.178665] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.178865] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.178994] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.179159] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.179188] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.179393] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.179436] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.179466] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.179495] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.179685] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.179814] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.179978] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.180008] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.180213] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.180244] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.180277] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.180308] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.180503] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.180930] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.181092] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.181120] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.181323] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.181357] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.181708] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.181737] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.181902] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.182243] [drm:intel_enable_pipe [i915]] enabling pipe B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.182304] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.186072] r8169 0000:01:00.0 enp1s0: link down Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.199181] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.199253] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.199288] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.199360] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.199407] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.199440] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.199500] [drm:__drm_atomic_state_free] Freeing atomic state 00000000f7e522bf Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.199580] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.199633] [drm:intel_opregion_register [i915]] 4 outputs detected Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.199690] [drm:intel_dp_detect [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.199737] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.202665] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.202719] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.202767] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.202814] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.202865] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.202912] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.202962] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000062 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.203009] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.203056] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x0000006a Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.203103] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.225773] acpi LNXPOWER:1a: Turning OFF Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.235763] acpi LNXPOWER:0b: Turning OFF Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.238999] acpi LNXPOWER:09: Turning OFF Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.241909] acpi LNXPOWER:07: Turning OFF Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.244105] acpi LNXPOWER:05: Turning OFF Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.246713] acpi LNXPOWER:03: Turning OFF Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.249348] acpi LNXPOWER:01: Turning OFF Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.251976] OOM killer enabled. Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.251977] Restarting tasks ... done. Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.305021] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.305085] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.305127] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.305220] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.407288] atkbd serio0: Failed to deactivate keyboard on isa0060/serio0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.411822] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.412478] [drm:drm_helper_hpd_irq_event] [CONNECTOR:77:eDP-1] status updated from connected to connected Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.412605] [drm:intel_dp_detect [i915]] [CONNECTOR:84:DP-1] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.412699] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.413213] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 00 02 02 06 03 00 00 00 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.413613] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.413713] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.413814] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.414199] [drm:drm_dp_read_desc] DP sink: OUI 00-00-00 dev-ID HW-rev 0.0 SW-rev 0.0 quirks 0x0000 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.414296] [drm:intel_dp_detect [i915]] Sink is not MST capable Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.414728] [drm:intel_dp_check_link_status [i915]] DDI B: channel EQ not ok, retraining Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.415749] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.415844] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.415963] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.416670] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.416765] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.417707] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.418067] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.436414] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.436428] [drm:drm_helper_hpd_irq_event] [CONNECTOR:84:DP-1] status updated from connected to connected Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.436499] [drm:intel_hdmi_detect [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.436733] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.436792] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.437000] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.437008] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.437069] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.437126] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.437738] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.437796] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.438039] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.438087] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.438295] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.438301] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.438305] [drm:drm_helper_hpd_irq_event] [CONNECTOR:90:HDMI-A-1] status updated from disconnected to disconnected Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.438357] [drm:intel_hdmi_detect [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.468358] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.468441] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.468682] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.468694] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.468702] [drm:drm_detect_monitor_audio] Monitor has basic audio support Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.468710] [drm:drm_helper_hpd_irq_event] [CONNECTOR:94:HDMI-A-2] status updated from connected to connected Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.679316] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300) Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.691831] ata1.00: configured for UDMA/133 Feb 19 21:51:00 GLK-2-GLKRVP1DDR405 kernel: [ 148.787176] atkbd serio0: Failed to enable keyboard on isa0060/serio0 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 148.918179] PM: suspend exit Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 148.966773] [drm:drm_atomic_state_init] Allocated atomic state 00000000f58a3f25 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 148.966793] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000d6039998 state to 00000000f58a3f25 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 148.966813] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000da8df8fe state to 00000000f58a3f25 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 148.966817] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000d6039998 to [NOCRTC] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 148.966821] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000d6039998 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 148.966826] [drm:drm_atomic_check_only] checking 00000000f58a3f25 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 148.966949] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:56:cursor B] with fb -1 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 148.967041] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:56:cursor B] visible 1 -> 0, off 1, on 0, ms 0 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 148.967063] [drm:drm_atomic_commit] committing 00000000f58a3f25 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 148.967200] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000f58a3f25 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 148.967223] [drm:__drm_atomic_state_free] Freeing atomic state 00000000f58a3f25 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.037589] [drm:drm_atomic_state_init] Allocated atomic state 00000000fa958669 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.037617] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 000000004c371c11 state to 00000000fa958669 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.037637] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000d8d951cd state to 00000000fa958669 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.037642] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000004c371c11 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.037646] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000004c371c11 to [NOCRTC] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.037651] [drm:drm_atomic_check_only] checking 00000000fa958669 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.037789] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb -1 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.037894] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 1 -> 0, off 1, on 0, ms 0 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.037995] [drm:skl_compute_wm [i915]] [PLANE:44:plane 1B] ddb (0 - 988) -> (0 - 0) Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.038001] [drm:drm_atomic_commit] committing 00000000fa958669 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.049882] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000fa958669 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.049912] [drm:__drm_atomic_state_free] Freeing atomic state 00000000fa958669 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.050463] [drm:drm_mode_setcrtc] [CRTC:59:pipe B] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.050516] [drm:drm_atomic_state_init] Allocated atomic state 000000003390936d Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.050537] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000081b0e63 state to 000000003390936d Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.050552] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 0000000081b81083 state to 000000003390936d Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.050557] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state 00000000081b0e63 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.050561] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000081b81083 to [NOCRTC] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.050566] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000081b81083 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.050571] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 000000003390936d Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.050599] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 00000000e41de39e state to 000000003390936d Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.050604] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000e41de39e to [NOCRTC] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.050609] [drm:drm_atomic_check_only] checking 000000003390936d Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.050618] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] mode changed Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.050623] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] enable changed Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.050628] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] active changed Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.050633] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.050638] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:84:DP-1] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.050645] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: n, active: n Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.050650] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 000000003390936d Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.050784] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.050888] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.050916] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000001489da91 state to 000000003390936d Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.050932] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000006cf75dd6 state to 000000003390936d Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.051037] [drm:skl_compute_wm [i915]] [PLANE:56:cursor B] ddb (988 - 1020) -> (0 - 0) Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.051042] [drm:drm_atomic_commit] committing 000000003390936d Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.051274] [drm:intel_disable_pipe [i915]] disabling pipe B Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.067418] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.067679] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.067778] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.067927] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 2, on? 1) for crtc 59 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.068060] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.068187] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.068287] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.068387] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.068483] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.068578] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.068673] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.068772] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.068870] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.068968] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.069062] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.069171] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.069269] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.069394] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.069425] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000003390936d Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.069462] [drm:__drm_atomic_state_free] Freeing atomic state 000000003390936d Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.070128] [drm:drm_mode_addfb2] [FB:136] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.078918] [drm:drm_mode_setcrtc] [CRTC:59:pipe B] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.078949] [drm:drm_mode_setcrtc] [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.078973] [drm:drm_atomic_state_init] Allocated atomic state 0000000056d194e6 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.078985] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000d600d325 state to 0000000056d194e6 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.078992] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 000000004db84b0f state to 0000000056d194e6 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079000] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 00000000d600d325 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079002] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000004db84b0f to [CRTC:59:pipe B] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079004] [drm:drm_atomic_set_fb_for_plane] Set [FB:136] for plane state 000000004db84b0f Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079007] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 0000000056d194e6 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079022] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 0000000011976385 state to 0000000056d194e6 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079024] [drm:drm_atomic_set_crtc_for_connector] Link connector state 0000000011976385 to [CRTC:59:pipe B] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079029] [drm:drm_atomic_check_only] checking 0000000056d194e6 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079034] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] mode changed Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079036] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] enable changed Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079038] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] active changed Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079041] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079044] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:94:HDMI-A-2] using [ENCODER:93:DDI C] on [CRTC:59:pipe B] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079047] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: y, active: y Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079049] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 0000000056d194e6 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079054] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 0000000056d194e6 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079112] [drm:intel_atomic_check [i915]] [CONNECTOR:94:HDMI-A-2] checking for sink bpp constrains Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079182] [drm:intel_hdmi_compute_config [i915]] picking bpc to 12 for HDMI output Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079225] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 36 for HDMI Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079273] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 36, dithering: 0 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079315] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][modeset] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079356] [drm:intel_dump_pipe_config [i915]] output_types: HDMI (0x40) Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079400] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 36, dithering: 0 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079442] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 1 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079482] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079488] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079527] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079535] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079577] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1082 1087 1125, type: 0x48 flags: 0x5 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079618] [drm:intel_dump_pipe_config [i915]] port clock: 222750, pipe src size: 1920x1080, pixel rate 148500 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079660] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079703] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079742] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079784] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8200, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x19999a, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079822] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079863] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079906] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079944] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.079981] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.080019] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.080033] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000602ecb81 state to 0000000056d194e6 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.080039] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000000f5a6246 state to 0000000056d194e6 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.080078] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.080116] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 13, actual 13 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.080162] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb 136 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.080201] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.080247] [drm:bxt_get_dpll [i915]] [CRTC:59:pipe B] using pre-allocated PORT PLL C Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.080286] [drm:intel_reference_shared_dpll [i915]] using PORT PLL C for pipe B Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.080335] [drm:skl_compute_wm [i915]] [PLANE:44:plane 1B] ddb (0 - 0) -> (0 - 988) Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.080371] [drm:skl_compute_wm [i915]] [PLANE:56:cursor B] ddb (0 - 0) -> (988 - 1020) Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.080373] [drm:drm_atomic_commit] committing 0000000056d194e6 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.080601] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.080680] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.080858] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.080931] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.080971] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.081014] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.081052] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.081090] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.081126] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.081173] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.081214] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.081252] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.081314] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL C (active 2, on? 0) for crtc 59 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.081354] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL C Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.081485] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.081668] [drm:intel_enable_pipe [i915]] enabling pipe B Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.082162] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:94:HDMI-A-2], [ENCODER:93:DDI C] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.082205] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe B, 36 bytes ELD Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.082248] [drm:audio_config_hdmi_pixel_clock [i915]] Configuring HDMI audio for pixel clock 148500 (0x00090000) Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.082286] [drm:hsw_audio_config_update [i915]] using automatic N Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.099267] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.099331] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.099429] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.099469] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000056d194e6 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.099490] [drm:__drm_atomic_state_free] Freeing atomic state 0000000056d194e6 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.099614] [drm:drm_atomic_state_init] Allocated atomic state 00000000fa958669 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.099625] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 0000000050b48292 state to 00000000fa958669 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.099627] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000050b48292 to [NOCRTC] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.099629] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000050b48292 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.099632] [drm:drm_atomic_check_only] checking 00000000fa958669 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.099638] [drm:drm_atomic_commit] committing 00000000fa958669 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.099672] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000fa958669 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.099678] [drm:__drm_atomic_state_free] Freeing atomic state 00000000fa958669 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.182687] [drm:drm_atomic_state_init] Allocated atomic state 00000000fa958669 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.182697] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 000000002753e743 state to 00000000fa958669 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.182707] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000cce3343c state to 00000000fa958669 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.182708] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000002753e743 to [CRTC:59:pipe B] Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.182710] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 000000002753e743 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.182712] [drm:drm_atomic_check_only] checking 00000000fa958669 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.182768] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:56:cursor B] with fb 137 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.182802] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:56:cursor B] visible 0 -> 1, off 0, on 1, ms 0 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.182813] [drm:drm_atomic_commit] committing 00000000fa958669 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.182858] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000fa958669 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.182865] [drm:__drm_atomic_state_free] Freeing atomic state 00000000fa958669 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.182881] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 0000000065b132f0 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.182914] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:56:cursor B] with fb 137 Feb 19 21:51:01 GLK-2-GLKRVP1DDR405 kernel: [ 149.182944] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:56:cursor B] visible 1 -> 0, off 1, on 0, ms 0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 149.290137] PM: suspend entry (deep) Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 149.290140] PM: Syncing filesystems ... done. Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 149.290877] Freezing user space processes ... (elapsed 0.001 seconds) done. Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 149.292335] OOM killer disabled. Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 149.292336] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done. Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 149.293549] Suspending console(s) (use no_console_suspend to debug) Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.080518] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.080675] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.080703] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081091] [drm:drm_atomic_state_init] Allocated atomic state 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081102] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000a01d40e2 state to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081109] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000003e5747bc state to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081113] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000644f9357 state to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081118] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 00000000ae8780a4 state to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081123] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 00000000c4dc3301 state to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081127] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 000000004b9b2212 state to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081131] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 00000000c2f7c533 state to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081137] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 00000000785462f0 state to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081141] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 000000002cfc62bd state to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081145] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 00000000b64c0b02 state to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081149] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 0000000078e4ba6b state to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081153] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 00000000bfbaa7a5 state to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081158] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 000000002a5604ce state to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081162] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 000000003780443c state to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081166] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 000000006c1cfee8 state to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081170] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 00000000c56bdf33 state to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081177] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 000000007dc05a11 state to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081182] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 0000000063a02161 state to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081197] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 00000000e27fc06f state to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081202] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 00000000c5de68ff state to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081208] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:90:HDMI-A-1] 00000000270e63e9 state to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081213] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 000000008a3c0b5d state to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081226] [drm:drm_atomic_state_init] Allocated atomic state 00000000581791a0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081230] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000cf2438f9 state to 00000000581791a0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081233] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000581791a0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081237] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000d8d951cd state to 00000000581791a0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081239] [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state 00000000d8d951cd Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081243] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 000000002efd069a state to 00000000581791a0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081249] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000386ef7f6 state to 00000000581791a0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081251] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000581791a0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081260] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 000000007a0e59c8 state to 00000000581791a0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081264] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000003ce41128 state to 00000000581791a0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081266] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000581791a0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081267] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000007a0e59c8 to [NOCRTC] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081269] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000002efd069a to [NOCRTC] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081270] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000002efd069a Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081271] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000386ef7f6 to [NOCRTC] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081272] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000386ef7f6 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081273] [drm:drm_atomic_check_only] checking 00000000581791a0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081277] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] mode changed Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081279] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] enable changed Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081280] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] active changed Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081282] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081283] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081286] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: n, active: n Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081288] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000581791a0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081330] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081361] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081398] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081428] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081463] [drm:skl_compute_wm [i915]] [PLANE:44:plane 1B] ddb (0 - 988) -> (0 - 0) Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081490] [drm:skl_compute_wm [i915]] [PLANE:56:cursor B] ddb (988 - 1020) -> (0 - 0) Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081492] [drm:drm_atomic_commit] committing 00000000581791a0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081558] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe B Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081592] [drm:i915_audio_component_get_eld [i915]] Not valid for port C Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.081635] [drm:intel_disable_pipe [i915]] disabling pipe B Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.082318] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.082379] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL C (active 2, on? 1) for crtc 59 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.082435] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL C Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.082478] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.082544] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.082574] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.082604] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.082634] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.082663] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.082691] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.082722] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.082752] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.082782] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.082811] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.082849] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.082864] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000581791a0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.082876] [drm:__drm_atomic_state_free] Freeing atomic state 00000000581791a0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.082946] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.082978] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000062 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.091252] sd 0:0:0:0: [sda] Synchronizing SCSI cache Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.091872] sd 0:0:0:0: [sda] Stopping disk Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.156704] hpet1: lost 7161 rtc interrupts Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.216735] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.216766] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.216794] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.216822] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.216850] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.216878] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.216906] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.216937] [drm:intel_power_well_disable [i915]] disabling DC off Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.216967] [drm:gen9_enable_dc5 [i915]] Enabling DC5 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.216997] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.217030] [drm:intel_power_well_disable [i915]] disabling always-on Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.217993] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.218065] [drm:intel_power_well_disable [i915]] disabling power well 1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.218102] [drm:hsw_power_well_disable [i915]] power well 1 forced on (bios:1 driver:0 kvmr:0 debug:0) Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.218167] [drm:bxt_enable_dc9 [i915]] Enabling DC9 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.218199] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 08 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.289608] ACPI: Preparing to enter system sleep state S3 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.293256] ACPI: EC: event blocked Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.293258] ACPI: EC: EC stopped Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.293259] PM: Saving platform NVS memory Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.293270] Disabling non-boot CPUs ... Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.317623] smpboot: CPU 1 is now offline Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.337823] smpboot: CPU 2 is now offline Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.361792] smpboot: CPU 3 is now offline Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.367764] ACPI: Low-level resume complete Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.367963] ACPI: EC: EC started Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.367964] PM: Restoring platform NVS memory Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.369029] Enabling non-boot CPUs ... Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.369227] x86: Booting SMP configuration: Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.369228] smpboot: Booting Node 0 Processor 1 APIC 0x2 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.370301] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.370845] cache: parent cpu1 should not be sleeping Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.372068] CPU1 is up Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.372203] smpboot: Booting Node 0 Processor 2 APIC 0x4 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.373304] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.373865] cache: parent cpu2 should not be sleeping Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.375183] CPU2 is up Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.375313] smpboot: Booting Node 0 Processor 3 APIC 0x6 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.376410] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.376974] cache: parent cpu3 should not be sleeping Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.378493] CPU3 is up Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.386563] ACPI: Waking up from system sleep state S3 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.558284] [drm:gen9_sanitize_dc_state [i915]] Resetting DC state tracking from 08 to 00 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.558352] [drm:bxt_disable_dc9 [i915]] Disabling DC9 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.558421] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.558497] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.558566] [drm:intel_power_well_enable [i915]] enabling power well 1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.558654] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.559009] [drm:intel_power_well_enable [i915]] enabling always-on Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.559074] [drm:intel_power_well_enable [i915]] enabling DC off Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.559140] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.559208] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.559280] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.559435] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.559635] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.559834] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.559898] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.559963] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.734994] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x799d3018 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.735207] [drm:intel_opregion_setup [i915]] Public ACPI methods supported Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.735210] ACPI: EC: event unblocked Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.735307] [drm:intel_opregion_setup [i915]] ASLE supported Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.735713] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA) Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.735856] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:10001010 hp_port:38 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.735968] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.736068] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.736752] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 11 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.737289] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.737386] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.737511] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.737630] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.737726] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.737820] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.737914] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.738008] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:43:pipe A] hw state readout: disabled Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.738107] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.738200] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.738293] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.738386] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.738479] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.738571] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:59:pipe B] hw state readout: disabled Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.738672] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.738765] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.738858] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.738950] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.739144] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.739236] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:75:pipe C] hw state readout: disabled Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.739337] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL A hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.739430] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL B hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.739524] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.739619] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:76:DDI A] hw state readout: disabled, pipe A Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.739713] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:83:DDI B] hw state readout: disabled, pipe A Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.739806] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:85:DP-MST A] hw state readout: disabled, pipe A Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.739898] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:86:DP-MST B] hw state readout: disabled, pipe B Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.739990] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:87:DP-MST C] hw state readout: disabled, pipe C Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.740084] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:93:DDI C] hw state readout: disabled, pipe A Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.740179] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:77:eDP-1] hw state readout: disabled Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.740274] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:84:DP-1] hw state readout: disabled Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.740368] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:90:HDMI-A-1] hw state readout: disabled Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.740462] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:94:HDMI-A-2] hw state readout: disabled Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.740567] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][setup_hw_state] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.740663] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.740759] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.740853] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.740946] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.740959] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.741052] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.741060] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.741155] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.741249] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.741343] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.741436] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.741529] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.741638] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.741733] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.741828] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.741922] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.742015] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.742109] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.742203] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.742297] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][setup_hw_state] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.742391] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.742484] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.742576] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.742668] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.742676] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.742769] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.742776] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.742871] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.742966] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.743059] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.743152] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.743244] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.743345] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.743439] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.743534] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.743627] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.743721] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.743815] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.743910] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.744003] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][setup_hw_state] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.744095] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.744188] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.744280] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.744372] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.744380] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.744471] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.744478] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.744572] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.744664] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.744848] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.744940] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.745032] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.745131] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.745223] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.745317] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.745409] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.745502] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.745594] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.745648] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.745651] sd 0:0:0:0: [sda] Starting disk Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.745773] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.745904] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746059] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746111] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746165] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746217] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746276] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746306] [drm:drm_atomic_check_only] checking 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746312] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] mode changed Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746313] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] enable changed Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746315] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] active changed Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746318] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746320] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:77:eDP-1] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746322] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746323] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:84:DP-1] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746325] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:90:HDMI-A-1] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746326] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:90:HDMI-A-1] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746328] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746330] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:94:HDMI-A-2] keeps [ENCODER:93:DDI C], now on [CRTC:59:pipe B] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746332] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: n, active: n Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746334] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746336] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: y, active: y Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746337] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746340] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: n, active: n Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746341] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746344] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746376] [drm:intel_atomic_check [i915]] [CONNECTOR:94:HDMI-A-2] checking for sink bpp constrains Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746417] [drm:intel_hdmi_compute_config [i915]] picking bpc to 12 for HDMI output Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746447] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 36 for HDMI Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746478] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 36, dithering: 0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746508] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][modeset] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746538] [drm:intel_dump_pipe_config [i915]] output_types: HDMI (0x40) Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746567] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 36, dithering: 0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746595] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746623] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746626] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746654] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746657] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746687] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1082 1087 1125, type: 0x48 flags: 0x5 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746715] [drm:intel_dump_pipe_config [i915]] port clock: 222750, pipe src size: 1920x1080, pixel rate 148500 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746744] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746773] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746801] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746832] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x6200, ebb4: 0x2000,pll0: 0x21, pll1: 0x100, pll2: 0x1a6666, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746861] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746890] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746918] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746947] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.746975] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.747004] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.747036] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.747065] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 13, actual 13 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.747102] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb 136 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.747131] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.747168] [drm:bxt_get_dpll [i915]] [CRTC:59:pipe B] using pre-allocated PORT PLL C Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.747198] [drm:intel_reference_shared_dpll [i915]] using PORT PLL C for pipe B Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.747236] [drm:skl_compute_wm [i915]] [PLANE:44:plane 1B] ddb (0 - 0) -> (0 - 988) Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.747263] [drm:skl_compute_wm [i915]] [PLANE:56:cursor B] ddb (0 - 0) -> (988 - 1020) Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.747265] [drm:drm_atomic_commit] committing 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.747556] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.747593] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.747846] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.747875] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.747904] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.747933] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.747961] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.747990] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.748019] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.748049] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.748077] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.748106] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.748140] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.748168] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.748218] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL C (active 2, on? 0) for crtc 59 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.748247] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL C Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.748367] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.748564] [drm:intel_enable_pipe [i915]] enabling pipe B Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.749059] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:94:HDMI-A-2], [ENCODER:93:DDI C] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.749089] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe B, 36 bytes ELD Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.749122] [drm:audio_config_hdmi_pixel_clock [i915]] Configuring HDMI audio for pixel clock 148500 (0x00090000) Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.749151] [drm:hsw_audio_config_update [i915]] using automatic N Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.756477] r8169 0000:01:00.0 enp1s0: link down Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.765964] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.766040] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.766082] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.766157] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.766212] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.766247] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.766320] [drm:__drm_atomic_state_free] Freeing atomic state 000000009730c187 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.766387] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.766428] [drm:intel_opregion_register [i915]] 4 outputs detected Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.766474] [drm:intel_dp_detect [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.766510] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.769194] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.769237] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.769274] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.769309] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.769349] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.769384] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.769422] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000062 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.769457] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.769494] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x0000006a Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.769534] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.803637] acpi LNXPOWER:1a: Turning OFF Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.816811] acpi LNXPOWER:0b: Turning OFF Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.819564] acpi LNXPOWER:09: Turning OFF Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.822221] acpi LNXPOWER:07: Turning OFF Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.824231] acpi LNXPOWER:05: Turning OFF Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.826900] acpi LNXPOWER:03: Turning OFF Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.829620] acpi LNXPOWER:01: Turning OFF Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.831891] OOM killer enabled. Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.831891] Restarting tasks ... done. Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.871329] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.871364] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.871396] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.871437] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.973692] atkbd serio0: Failed to deactivate keyboard on isa0060/serio0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.978107] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.978739] [drm:drm_helper_hpd_irq_event] [CONNECTOR:77:eDP-1] status updated from connected to connected Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.978866] [drm:intel_dp_detect [i915]] [CONNECTOR:84:DP-1] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.978962] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.979171] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.979673] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 00 02 02 06 06 00 00 00 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.980054] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.980152] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.980250] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.980625] [drm:drm_dp_read_desc] DP sink: OUI 00-00-00 dev-ID HW-rev 0.0 SW-rev 0.0 quirks 0x0000 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.980720] [drm:intel_dp_detect [i915]] Sink is not MST capable Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.984691] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.984781] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.984791] [drm:drm_helper_hpd_irq_event] [CONNECTOR:84:DP-1] status updated from connected to connected Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.984889] [drm:intel_hdmi_detect [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.985159] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.985253] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.985512] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.985541] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.985635] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.985737] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.986322] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.986417] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.986681] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.986772] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.987031] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.987040] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.987047] [drm:drm_helper_hpd_irq_event] [CONNECTOR:90:HDMI-A-1] status updated from disconnected to disconnected Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 150.987140] [drm:intel_hdmi_detect [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 151.013471] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 151.013521] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 151.013776] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 151.013786] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 151.013793] [drm:drm_detect_monitor_audio] Monitor has basic audio support Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 151.013799] [drm:drm_helper_hpd_irq_event] [CONNECTOR:94:HDMI-A-2] status updated from connected to connected Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 151.245700] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300) Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 151.262375] ata1.00: configured for UDMA/133 Feb 19 21:51:18 GLK-2-GLKRVP1DDR405 kernel: [ 151.349687] atkbd serio0: Failed to enable keyboard on isa0060/serio0 Feb 19 21:51:19 GLK-2-GLKRVP1DDR405 kernel: [ 151.530432] PM: suspend exit Feb 19 21:51:19 GLK-2-GLKRVP1DDR405 kernel: [ 151.566190] [drm:drm_atomic_state_init] Allocated atomic state 00000000b39cb456 Feb 19 21:51:19 GLK-2-GLKRVP1DDR405 kernel: [ 151.566206] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 000000002c10563a state to 00000000b39cb456 Feb 19 21:51:19 GLK-2-GLKRVP1DDR405 kernel: [ 151.566223] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000cf728f1b state to 00000000b39cb456 Feb 19 21:51:19 GLK-2-GLKRVP1DDR405 kernel: [ 151.566226] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000002c10563a to [NOCRTC] Feb 19 21:51:19 GLK-2-GLKRVP1DDR405 kernel: [ 151.566230] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000002c10563a Feb 19 21:51:19 GLK-2-GLKRVP1DDR405 kernel: [ 151.566234] [drm:drm_atomic_check_only] checking 00000000b39cb456 Feb 19 21:51:19 GLK-2-GLKRVP1DDR405 kernel: [ 151.566260] [drm:drm_atomic_commit] committing 00000000b39cb456 Feb 19 21:51:19 GLK-2-GLKRVP1DDR405 kernel: [ 151.566331] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000b39cb456 Feb 19 21:51:19 GLK-2-GLKRVP1DDR405 kernel: [ 151.566349] [drm:__drm_atomic_state_free] Freeing atomic state 00000000b39cb456 Feb 19 21:51:19 GLK-2-GLKRVP1DDR405 kernel: [ 151.651380] [drm:drm_atomic_state_init] Allocated atomic state 00000000b39cb456 Feb 19 21:51:19 GLK-2-GLKRVP1DDR405 kernel: [ 151.651390] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000ed0731e4 state to 00000000b39cb456 Feb 19 21:51:19 GLK-2-GLKRVP1DDR405 kernel: [ 151.651399] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 0000000076f24e80 state to 00000000b39cb456 Feb 19 21:51:19 GLK-2-GLKRVP1DDR405 kernel: [ 151.651401] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000ed0731e4 to [CRTC:59:pipe B] Feb 19 21:51:19 GLK-2-GLKRVP1DDR405 kernel: [ 151.651403] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 00000000ed0731e4 Feb 19 21:51:19 GLK-2-GLKRVP1DDR405 kernel: [ 151.651404] [drm:drm_atomic_check_only] checking 00000000b39cb456 Feb 19 21:51:19 GLK-2-GLKRVP1DDR405 kernel: [ 151.651423] [drm:drm_atomic_commit] committing 00000000b39cb456 Feb 19 21:51:19 GLK-2-GLKRVP1DDR405 kernel: [ 151.651468] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000b39cb456 Feb 19 21:51:19 GLK-2-GLKRVP1DDR405 kernel: [ 151.651475] [drm:__drm_atomic_state_free] Freeing atomic state 00000000b39cb456 Feb 19 21:51:19 GLK-2-GLKRVP1DDR405 kernel: [ 151.651491] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 00000000c91d627c Feb 19 21:51:19 GLK-2-GLKRVP1DDR405 kernel: [ 151.651546] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:56:cursor B] with fb 137 Feb 19 21:51:19 GLK-2-GLKRVP1DDR405 kernel: [ 151.651581] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:56:cursor B] visible 0 -> 1, off 0, on 1, ms 0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 151.755387] PM: suspend entry (deep) Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 151.755391] PM: Syncing filesystems ... done. Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 151.756220] Freezing user space processes ... (elapsed 0.001 seconds) done. Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 151.757642] OOM killer disabled. Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 151.757644] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done. Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 151.758860] Suspending console(s) (use no_console_suspend to debug) Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.546694] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.546851] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.546879] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547265] [drm:drm_atomic_state_init] Allocated atomic state 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547274] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000be38ada1 state to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547279] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000007c4516cf state to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547284] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000000bee5da8 state to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547289] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 00000000c2632bf2 state to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547293] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 00000000357672af state to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547297] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 00000000136d9b45 state to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547302] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 00000000c62c6176 state to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547306] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 000000004d67e973 state to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547311] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 00000000d6b6792a state to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547316] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 000000006acc6adf state to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547320] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 00000000ac4877a7 state to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547324] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 000000004361f5aa state to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547329] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000d6039998 state to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547333] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 000000004d8e659b state to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547339] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 00000000fb6b4695 state to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547343] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 0000000043eceaaf state to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547348] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 00000000e7faba09 state to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547352] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 00000000aeeaf704 state to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547366] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 0000000004a1b9f3 state to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547370] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 0000000069ce500a state to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547375] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:90:HDMI-A-1] 00000000fda61954 state to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547379] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 00000000678abb02 state to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547388] [drm:drm_atomic_state_init] Allocated atomic state 0000000026288e11 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547392] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000000618a073 state to 0000000026288e11 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547395] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 0000000026288e11 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547400] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000008e7794e3 state to 0000000026288e11 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547402] [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state 000000008e7794e3 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547407] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 00000000694c2f10 state to 0000000026288e11 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547414] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 000000001ab6701a state to 0000000026288e11 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547415] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 0000000026288e11 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547421] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 00000000cfc6a4d5 state to 0000000026288e11 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547425] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000af0fd297 state to 0000000026288e11 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547426] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 0000000026288e11 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547428] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000cfc6a4d5 to [NOCRTC] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547430] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000694c2f10 to [NOCRTC] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547431] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000694c2f10 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547432] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000001ab6701a to [NOCRTC] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547433] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000001ab6701a Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547434] [drm:drm_atomic_check_only] checking 0000000026288e11 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547439] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] mode changed Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547440] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] enable changed Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547441] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] active changed Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547443] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547445] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547448] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: n, active: n Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547449] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 0000000026288e11 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547486] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547518] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547552] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547582] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547613] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:56:cursor B] with fb -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547642] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:56:cursor B] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547676] [drm:skl_compute_wm [i915]] [PLANE:44:plane 1B] ddb (0 - 988) -> (0 - 0) Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547703] [drm:skl_compute_wm [i915]] [PLANE:56:cursor B] ddb (988 - 1020) -> (0 - 0) Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547705] [drm:drm_atomic_commit] committing 0000000026288e11 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547767] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe B Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.547803] [drm:intel_disable_pipe [i915]] disabling pipe B Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.549618] sd 0:0:0:0: [sda] Synchronizing SCSI cache Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.550378] sd 0:0:0:0: [sda] Stopping disk Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.550415] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.550478] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL C (active 2, on? 1) for crtc 59 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.550534] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL C Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.550576] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.550636] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.550669] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.550698] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.550726] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.550756] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.550786] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.550817] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.550847] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.550876] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.550905] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.550940] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.550954] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000026288e11 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.550971] [drm:__drm_atomic_state_free] Freeing atomic state 0000000026288e11 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.551038] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.551073] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000062 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.621767] hpet1: lost 7161 rtc interrupts Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.683020] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.683050] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.683078] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.683109] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.683137] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.683165] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.683193] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.683221] [drm:intel_power_well_disable [i915]] disabling DC off Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.683256] [drm:gen9_enable_dc5 [i915]] Enabling DC5 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.683287] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.683316] [drm:intel_power_well_disable [i915]] disabling always-on Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.684283] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.684355] [drm:intel_power_well_disable [i915]] disabling power well 1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.684389] [drm:hsw_power_well_disable [i915]] power well 1 forced on (bios:1 driver:0 kvmr:0 debug:0) Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.684457] [drm:bxt_enable_dc9 [i915]] Enabling DC9 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.684489] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 08 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.751527] ACPI: Preparing to enter system sleep state S3 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.754767] ACPI: EC: event blocked Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.754768] ACPI: EC: EC stopped Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.754770] PM: Saving platform NVS memory Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.754780] Disabling non-boot CPUs ... Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.777677] smpboot: CPU 1 is now offline Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.800355] smpboot: CPU 2 is now offline Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.824063] smpboot: CPU 3 is now offline Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.829968] ACPI: Low-level resume complete Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.830183] ACPI: EC: EC started Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.830184] PM: Restoring platform NVS memory Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.831232] Enabling non-boot CPUs ... Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.831456] x86: Booting SMP configuration: Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.831457] smpboot: Booting Node 0 Processor 1 APIC 0x2 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.832710] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.833294] cache: parent cpu1 should not be sleeping Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.834704] CPU1 is up Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.834864] smpboot: Booting Node 0 Processor 2 APIC 0x4 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.836158] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.836669] cache: parent cpu2 should not be sleeping Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.837897] CPU2 is up Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.838041] smpboot: Booting Node 0 Processor 3 APIC 0x6 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.839068] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.839596] cache: parent cpu3 should not be sleeping Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.841039] CPU3 is up Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 152.848680] ACPI: Waking up from system sleep state S3 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.008697] [drm:gen9_sanitize_dc_state [i915]] Resetting DC state tracking from 08 to 00 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.008766] [drm:bxt_disable_dc9 [i915]] Disabling DC9 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.008835] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.008912] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.008982] [drm:intel_power_well_enable [i915]] enabling power well 1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.009069] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.009424] [drm:intel_power_well_enable [i915]] enabling always-on Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.009489] [drm:intel_power_well_enable [i915]] enabling DC off Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.009555] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.009624] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.009696] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.009853] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.010053] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.010251] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.010316] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.010381] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.185399] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x799d3018 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.185614] [drm:intel_opregion_setup [i915]] Public ACPI methods supported Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.185616] ACPI: EC: event unblocked Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.185714] [drm:intel_opregion_setup [i915]] ASLE supported Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.186150] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA) Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.186276] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:10001010 hp_port:38 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.186389] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.186487] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.187175] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 11 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.187698] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.187805] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.187936] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.188056] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.188155] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.188253] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.188351] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.188450] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:43:pipe A] hw state readout: disabled Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.188550] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.188644] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.188738] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.188831] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.188927] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.189019] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:59:pipe B] hw state readout: disabled Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.189442] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.189535] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.189628] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.189728] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.189821] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.189913] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:75:pipe C] hw state readout: disabled Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.190011] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL A hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.190107] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL B hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.190201] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.190298] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:76:DDI A] hw state readout: disabled, pipe A Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.190392] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:83:DDI B] hw state readout: disabled, pipe A Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.190485] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:85:DP-MST A] hw state readout: disabled, pipe A Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.190577] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:86:DP-MST B] hw state readout: disabled, pipe B Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.190669] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:87:DP-MST C] hw state readout: disabled, pipe C Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.190764] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:93:DDI C] hw state readout: disabled, pipe A Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.190859] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:77:eDP-1] hw state readout: disabled Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.190954] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:84:DP-1] hw state readout: disabled Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.191049] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:90:HDMI-A-1] hw state readout: disabled Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.191144] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:94:HDMI-A-2] hw state readout: disabled Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.191248] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][setup_hw_state] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.191344] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.191439] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.191533] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.191625] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.191638] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.191731] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.191739] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.191834] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.191927] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.192029] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.192123] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.192215] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.192315] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.192409] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.192503] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.192597] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.192690] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.192783] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.192875] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.193062] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][setup_hw_state] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.193155] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.193247] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.193340] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.193432] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.193440] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.193531] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.193538] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.193632] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.193724] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.193816] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.193908] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.193999] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.194098] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.194191] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.194283] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.194375] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.194468] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.194559] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.194650] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.194742] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][setup_hw_state] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.194833] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.194925] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.195016] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.195106] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.195114] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.195204] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.195211] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.195304] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.195396] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.195488] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.195579] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.195670] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.195777] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.195860] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.195930] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.195931] sd 0:0:0:0: [sda] Starting disk Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.195969] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196004] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196042] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196077] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196315] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196351] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196386] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196421] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196456] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196491] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196526] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196544] [drm:drm_atomic_check_only] checking 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196551] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] mode changed Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196553] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] enable changed Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196555] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] active changed Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196558] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196560] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:77:eDP-1] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196563] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196564] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:84:DP-1] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196566] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:90:HDMI-A-1] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196567] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:90:HDMI-A-1] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196569] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196572] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:94:HDMI-A-2] keeps [ENCODER:93:DDI C], now on [CRTC:59:pipe B] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196574] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: n, active: n Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196577] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196580] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: y, active: y Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196581] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196584] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: n, active: n Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196586] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196590] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196628] [drm:intel_atomic_check [i915]] [CONNECTOR:94:HDMI-A-2] checking for sink bpp constrains Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196679] [drm:intel_hdmi_compute_config [i915]] picking bpc to 12 for HDMI output Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196716] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 36 for HDMI Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196754] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 36, dithering: 0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196791] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][modeset] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196827] [drm:intel_dump_pipe_config [i915]] output_types: HDMI (0x40) Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196863] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 36, dithering: 0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196898] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196932] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196935] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196970] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.196973] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.197009] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1082 1087 1125, type: 0x48 flags: 0x5 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.197044] [drm:intel_dump_pipe_config [i915]] port clock: 222750, pipe src size: 1920x1080, pixel rate 148500 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.197079] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.197114] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.197149] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.197187] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x6200, ebb4: 0x2000,pll0: 0x21, pll1: 0x100, pll2: 0x1a6666, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.197223] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.197258] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.197293] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.197328] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.197363] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.197397] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.197436] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.197472] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 13, actual 13 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.197513] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb 136 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.197549] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.197586] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:56:cursor B] with fb 137 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.197622] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:56:cursor B] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.197665] [drm:bxt_get_dpll [i915]] [CRTC:59:pipe B] using pre-allocated PORT PLL C Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.197702] [drm:intel_reference_shared_dpll [i915]] using PORT PLL C for pipe B Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.197745] [drm:skl_compute_wm [i915]] [PLANE:44:plane 1B] ddb (0 - 0) -> (0 - 988) Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.197779] [drm:skl_compute_wm [i915]] [PLANE:56:cursor B] ddb (0 - 0) -> (988 - 1020) Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.197781] [drm:drm_atomic_commit] committing 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.198098] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.198143] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.198416] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.198445] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.198474] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.198502] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.198531] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.198559] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.198588] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.198617] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.198646] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.198674] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.198703] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.198732] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.198781] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL C (active 2, on? 0) for crtc 59 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.198811] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL C Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.198930] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.199133] [drm:intel_enable_pipe [i915]] enabling pipe B Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.199603] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:94:HDMI-A-2], [ENCODER:93:DDI C] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.199634] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe B, 36 bytes ELD Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.199668] [drm:audio_config_hdmi_pixel_clock [i915]] Configuring HDMI audio for pixel clock 148500 (0x00090000) Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.199696] [drm:hsw_audio_config_update [i915]] using automatic N Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.206866] r8169 0000:01:00.0 enp1s0: link down Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.216609] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.216694] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.216742] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.216824] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.216886] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.216923] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.217008] [drm:__drm_atomic_state_free] Freeing atomic state 00000000bd36bdea Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.217070] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.217117] [drm:intel_opregion_register [i915]] 4 outputs detected Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.217168] [drm:intel_dp_detect [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.217211] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.220082] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.220130] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.220172] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.220214] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.220260] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.220301] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.220346] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000062 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.220387] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.220429] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x0000006a Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.220470] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.255115] acpi LNXPOWER:1a: Turning OFF Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.265591] acpi LNXPOWER:0b: Turning OFF Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.269275] acpi LNXPOWER:09: Turning OFF Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.272102] acpi LNXPOWER:07: Turning OFF Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.274135] acpi LNXPOWER:05: Turning OFF Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.276815] acpi LNXPOWER:03: Turning OFF Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.279476] acpi LNXPOWER:01: Turning OFF Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.281979] OOM killer enabled. Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.281980] Restarting tasks ... done. Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.322271] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.322305] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.322337] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.322382] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.428108] atkbd serio0: Failed to deactivate keyboard on isa0060/serio0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.428470] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.429087] [drm:drm_helper_hpd_irq_event] [CONNECTOR:77:eDP-1] status updated from connected to connected Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.429182] [drm:intel_dp_detect [i915]] [CONNECTOR:84:DP-1] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.429250] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.429437] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.429901] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 00 02 02 06 06 00 00 00 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.430246] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.430316] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.430384] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.430751] [drm:drm_dp_read_desc] DP sink: OUI 00-00-00 dev-ID HW-rev 0.0 SW-rev 0.0 quirks 0x0000 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.430820] [drm:intel_dp_detect [i915]] Sink is not MST capable Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.434823] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.434889] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.434897] [drm:drm_helper_hpd_irq_event] [CONNECTOR:84:DP-1] status updated from connected to connected Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.434968] [drm:intel_hdmi_detect [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.435210] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.435280] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.435510] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.435517] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.435585] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.435653] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.436235] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.436268] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.436458] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.436490] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.436679] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.436683] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.436686] [drm:drm_helper_hpd_irq_event] [CONNECTOR:90:HDMI-A-1] status updated from disconnected to disconnected Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.436720] [drm:intel_hdmi_detect [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.467318] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.467375] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.467584] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.467593] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.467600] [drm:drm_detect_monitor_audio] Monitor has basic audio support Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.467605] [drm:drm_helper_hpd_irq_event] [CONNECTOR:94:HDMI-A-2] status updated from connected to connected Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.696114] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300) Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.714661] ata1.00: configured for UDMA/133 Feb 19 21:51:36 GLK-2-GLKRVP1DDR405 kernel: [ 153.803938] atkbd serio0: Failed to enable keyboard on isa0060/serio0 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 153.983478] PM: suspend exit Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.033505] [drm:drm_atomic_state_init] Allocated atomic state 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.033526] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 000000006c1cfee8 state to 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.033547] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000003dd94d3d state to 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.033552] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000006c1cfee8 to [NOCRTC] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.033556] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000006c1cfee8 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.033560] [drm:drm_atomic_check_only] checking 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.033683] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:56:cursor B] with fb -1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.033776] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:56:cursor B] visible 1 -> 0, off 1, on 0, ms 0 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.033797] [drm:drm_atomic_commit] committing 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.033867] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.033885] [drm:__drm_atomic_state_free] Freeing atomic state 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.103663] [drm:drm_atomic_state_init] Allocated atomic state 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.103691] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 00000000785462f0 state to 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.103713] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 0000000021240f11 state to 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.103718] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000785462f0 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.103722] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000785462f0 to [NOCRTC] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.103728] [drm:drm_atomic_check_only] checking 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.103865] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb -1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.103971] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 1 -> 0, off 1, on 0, ms 0 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.104109] [drm:skl_compute_wm [i915]] [PLANE:44:plane 1B] ddb (0 - 988) -> (0 - 0) Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.104124] [drm:drm_atomic_commit] committing 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.116540] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.116567] [drm:__drm_atomic_state_free] Freeing atomic state 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117126] [drm:drm_mode_setcrtc] [CRTC:59:pipe B] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117173] [drm:drm_atomic_state_init] Allocated atomic state 00000000b1f88d26 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117193] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000005db9e11a state to 00000000b1f88d26 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117207] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 00000000548ffc36 state to 00000000b1f88d26 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117212] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state 000000005db9e11a Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117215] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000548ffc36 to [NOCRTC] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117219] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000548ffc36 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117224] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000b1f88d26 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117249] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 000000008a770fa6 state to 00000000b1f88d26 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117253] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000008a770fa6 to [NOCRTC] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117258] [drm:drm_atomic_check_only] checking 00000000b1f88d26 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117265] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] mode changed Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117270] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] enable changed Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117274] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] active changed Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117278] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117283] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117289] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: n, active: n Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117293] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000b1f88d26 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117318] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 0000000092762ca6 state to 00000000b1f88d26 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117338] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000f0faa210 state to 00000000b1f88d26 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117451] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117543] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117642] [drm:skl_compute_wm [i915]] [PLANE:56:cursor B] ddb (988 - 1020) -> (0 - 0) Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117647] [drm:drm_atomic_commit] committing 00000000b1f88d26 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117804] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe B Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.117898] [drm:i915_audio_component_get_eld [i915]] Not valid for port C Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.118025] [drm:intel_disable_pipe [i915]] disabling pipe B Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.133660] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.133736] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL C (active 2, on? 1) for crtc 59 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.133800] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL C Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.133852] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.133920] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.133957] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.133993] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.134028] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.134063] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.134098] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.134136] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.134170] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.134203] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.134236] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.134285] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.134324] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.134381] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.134404] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000b1f88d26 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.134430] [drm:__drm_atomic_state_free] Freeing atomic state 00000000b1f88d26 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.134734] [drm:drm_mode_addfb2] [FB:136] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.140982] [drm:drm_mode_setcrtc] [CRTC:75:pipe C] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141014] [drm:drm_mode_setcrtc] [CONNECTOR:77:eDP-1] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141039] [drm:drm_atomic_state_init] Allocated atomic state 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141053] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 0000000021240f11 state to 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141060] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 0000000024592d64 state to 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141069] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 0000000021240f11 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141072] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000024592d64 to [CRTC:75:pipe C] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141074] [drm:drm_atomic_set_fb_for_plane] Set [FB:136] for plane state 0000000024592d64 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141077] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141094] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 000000007d4949a9 state to 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141096] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000007d4949a9 to [CRTC:75:pipe C] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141102] [drm:drm_atomic_check_only] checking 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141107] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] mode changed Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141110] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] enable changed Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141112] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] active changed Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141115] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141119] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:77:eDP-1] using [ENCODER:76:DDI A] on [CRTC:75:pipe C] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141122] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: y, active: y Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141124] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141130] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141195] [drm:intel_atomic_check [i915]] [CONNECTOR:77:eDP-1] checking for sink bpp constrains Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141240] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141247] [drm:drm_mode_debug_printmodeline] Modeline 80:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141298] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 141000KHz Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141349] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141394] [drm:intel_dp_compute_config [i915]] DP link bw required 423000 available 540000 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141441] [drm:intel_dp_compute_config [i915]] PSR disable by flag Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141493] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141542] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][modeset] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141588] [drm:intel_dump_pipe_config [i915]] output_types: EDP (0x100) Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141637] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141684] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6571076, gmch_n: 8388608, link_m: 273794, link_n: 524288, tu: 64 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141728] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141772] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141776] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141819] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141823] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141867] [drm:intel_dump_pipe_config [i915]] crtc timings: 141000 1920 1936 1952 2104 1080 1083 1097 1116, type: 0x48 flags: 0xa Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141911] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 141000 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.141957] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.142001] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.142044] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.142097] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x6200, ebb4: 0x2000,pll0: 0x21, pll1: 0x100, pll2: 0x1a6666, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.142141] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.142185] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.142234] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.142280] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.142326] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.142372] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.142419] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.142466] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.142521] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:60:plane 1C] with fb 136 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.142566] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:60:plane 1C] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.142616] [drm:bxt_get_dpll [i915]] [CRTC:75:pipe C] using pre-allocated PORT PLL A Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.142664] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe C Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.142682] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000003dd94d3d state to 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.142690] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000d925f289 state to 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.142742] [drm:skl_compute_wm [i915]] [PLANE:60:plane 1C] ddb (0 - 0) -> (0 - 988) Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.142784] [drm:skl_compute_wm [i915]] [PLANE:72:cursor C] ddb (0 - 0) -> (988 - 1020) Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.142786] [drm:drm_atomic_commit] committing 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.143034] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.143126] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.143170] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.143214] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.143259] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.143305] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.143351] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.143395] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.143443] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.143487] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.143557] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 4, on? 0) for crtc 75 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.143602] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.143753] [drm:edp_panel_on [i915]] Turn eDP port A panel power on Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.143801] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.143857] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 0000006a Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.143902] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.143967] [drm:edp_panel_on [i915]] Wait for panel power on Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.144018] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 0000006b Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.345744] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.345841] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.347029] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.347116] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.347204] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.347859] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.347945] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.348987] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.349086] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:77:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.349656] [drm:intel_enable_pipe [i915]] enabling pipe C Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.349783] [drm:intel_edp_backlight_on [i915]] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.349871] [drm:intel_panel_enable_backlight [i915]] pipe C Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.349966] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 96000 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.356185] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.366741] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.366858] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.367001] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.367043] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.367082] [drm:__drm_atomic_state_free] Freeing atomic state 0000000038e733c1 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.367241] [drm:drm_atomic_state_init] Allocated atomic state 00000000f5946cbe Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.367256] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 00000000c4dc3301 state to 00000000f5946cbe Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.367260] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000c4dc3301 to [NOCRTC] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.367264] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000c4dc3301 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.367268] [drm:drm_atomic_check_only] checking 00000000f5946cbe Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.367277] [drm:drm_atomic_commit] committing 00000000f5946cbe Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.367310] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000f5946cbe Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.367317] [drm:__drm_atomic_state_free] Freeing atomic state 00000000f5946cbe Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.455351] [drm:drm_atomic_state_init] Allocated atomic state 00000000f5946cbe Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.455361] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 0000000050b48292 state to 00000000f5946cbe Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.455370] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000081b0e63 state to 00000000f5946cbe Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.455372] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000050b48292 to [CRTC:75:pipe C] Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.455373] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 0000000050b48292 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.455375] [drm:drm_atomic_check_only] checking 00000000f5946cbe Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.455431] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:72:cursor C] with fb 137 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.455465] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:72:cursor C] visible 0 -> 1, off 0, on 1, ms 0 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.455476] [drm:drm_atomic_commit] committing 00000000f5946cbe Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.455588] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000f5946cbe Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.455596] [drm:__drm_atomic_state_free] Freeing atomic state 00000000f5946cbe Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.455614] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 000000004b9b2212 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.455649] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:72:cursor C] with fb 137 Feb 19 21:51:37 GLK-2-GLKRVP1DDR405 kernel: [ 154.455682] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:72:cursor C] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 154.558375] PM: suspend entry (deep) Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 154.558379] PM: Syncing filesystems ... done. Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 154.559103] Freezing user space processes ... (elapsed 0.001 seconds) done. Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 154.560695] OOM killer disabled. Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 154.560697] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done. Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 154.561988] Suspending console(s) (use no_console_suspend to debug) Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.344382] sd 0:0:0:0: [sda] Synchronizing SCSI cache Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.345111] sd 0:0:0:0: [sda] Stopping disk Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.350728] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.350863] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.350995] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351024] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351411] [drm:drm_atomic_state_init] Allocated atomic state 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351421] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000006cf75dd6 state to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351427] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000002ce42df6 state to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351431] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000769564db state to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351437] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 000000003f7da1e5 state to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351441] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 000000003fa5eda5 state to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351445] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 00000000a003ce4f state to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351449] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 00000000eba9cecb state to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351453] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 0000000065b132f0 state to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351457] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 000000004c371c11 state to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351461] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 00000000b07bd9e9 state to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351464] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 00000000ae8780a4 state to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351468] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 00000000c2f7c533 state to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351475] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000f6d7d954 state to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351480] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 00000000ea2913f1 state to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351484] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 00000000247b3886 state to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351492] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 00000000ed0aeaca state to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351498] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 00000000b5f113aa state to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351502] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 000000002a6caab8 state to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351516] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 00000000777e00de state to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351521] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 00000000d7631186 state to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351525] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:90:HDMI-A-1] 000000002a148760 state to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351529] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 00000000ac3420e0 state to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351538] [drm:drm_atomic_state_init] Allocated atomic state 000000004261731b Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351543] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000cd2a97bf state to 000000004261731b Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351545] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 000000004261731b Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351550] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000000bee5da8 state to 000000004261731b Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351551] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 000000004261731b Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351556] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000be38ada1 state to 000000004261731b Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351558] [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state 00000000be38ada1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351566] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 0000000018dbc03d state to 000000004261731b Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351570] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 00000000ad0b91ef state to 000000004261731b Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351571] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000004261731b Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351578] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 0000000037f56bc4 state to 000000004261731b Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351579] [drm:drm_atomic_set_crtc_for_connector] Link connector state 0000000037f56bc4 to [NOCRTC] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351581] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000018dbc03d to [NOCRTC] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351582] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000018dbc03d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351583] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000ad0b91ef to [NOCRTC] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351584] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000ad0b91ef Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351585] [drm:drm_atomic_check_only] checking 000000004261731b Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351590] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] mode changed Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351591] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] enable changed Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351593] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] active changed Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351595] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351597] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:77:eDP-1] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351599] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: n, active: n Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351601] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000004261731b Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351638] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351670] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351705] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:60:plane 1C] with fb -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351736] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:60:plane 1C] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351767] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:72:cursor C] with fb -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351797] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:72:cursor C] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351830] [drm:skl_compute_wm [i915]] [PLANE:60:plane 1C] ddb (0 - 988) -> (0 - 0) Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351858] [drm:skl_compute_wm [i915]] [PLANE:72:cursor C] ddb (988 - 1020) -> (0 - 0) Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351860] [drm:drm_atomic_commit] committing 000000004261731b Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.351923] [drm:intel_edp_backlight_off [i915]] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.425180] hpet1: lost 7161 rtc interrupts Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.559998] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.560034] [drm:intel_disable_pipe [i915]] disabling pipe C Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.568228] [drm:intel_edp_panel_off.part.32 [i915]] Turn eDP port A panel power off Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.568261] [drm:intel_edp_panel_off.part.32 [i915]] Wait for panel power off time Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.568296] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status 80000008 control 00000060 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.620460] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.620490] [drm:intel_power_well_disable [i915]] disabling DDI A IO power well Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.620557] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL A (active 4, on? 1) for crtc 75 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.620616] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL A Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.620661] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.620695] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.620727] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.620755] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.620787] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.620818] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.620847] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.620878] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.620907] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.620936] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.620976] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.620991] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000004261731b Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.621003] [drm:__drm_atomic_state_free] Freeing atomic state 000000004261731b Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.622162] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.622193] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.622223] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.622251] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.622282] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.622310] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.622338] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.622368] [drm:intel_power_well_disable [i915]] disabling DC off Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.622403] [drm:gen9_enable_dc5 [i915]] Enabling DC5 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.622431] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.622461] [drm:intel_power_well_disable [i915]] disabling always-on Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.623428] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.623518] [drm:intel_power_well_disable [i915]] disabling power well 1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.623552] [drm:hsw_power_well_disable [i915]] power well 1 forced on (bios:1 driver:0 kvmr:0 debug:0) Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.623615] [drm:bxt_enable_dc9 [i915]] Enabling DC9 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.623646] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 08 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.685980] ACPI: Preparing to enter system sleep state S3 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.689462] ACPI: EC: event blocked Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.689463] ACPI: EC: EC stopped Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.689465] PM: Saving platform NVS memory Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.689476] Disabling non-boot CPUs ... Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.710741] smpboot: CPU 1 is now offline Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.734608] smpboot: CPU 2 is now offline Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.758678] smpboot: CPU 3 is now offline Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.764650] ACPI: Low-level resume complete Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.764853] ACPI: EC: EC started Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.764854] PM: Restoring platform NVS memory Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.765938] Enabling non-boot CPUs ... Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.766136] x86: Booting SMP configuration: Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.766137] smpboot: Booting Node 0 Processor 1 APIC 0x2 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.767213] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.767760] cache: parent cpu1 should not be sleeping Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.768979] CPU1 is up Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.769128] smpboot: Booting Node 0 Processor 2 APIC 0x4 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.770226] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.770783] cache: parent cpu2 should not be sleeping Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.772090] CPU2 is up Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.772231] smpboot: Booting Node 0 Processor 3 APIC 0x6 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.773331] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.773885] cache: parent cpu3 should not be sleeping Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.775406] CPU3 is up Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.783473] ACPI: Waking up from system sleep state S3 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.943125] [drm:gen9_sanitize_dc_state [i915]] Resetting DC state tracking from 08 to 00 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.943194] [drm:bxt_disable_dc9 [i915]] Disabling DC9 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.943261] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.943336] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.943406] [drm:intel_power_well_enable [i915]] enabling power well 1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.943495] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.943850] [drm:intel_power_well_enable [i915]] enabling always-on Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.943915] [drm:intel_power_well_enable [i915]] enabling DC off Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.943980] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.944050] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.944120] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.944274] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.944473] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.944672] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.944736] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 155.944801] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.119536] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x799d3018 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.119734] [drm:intel_opregion_setup [i915]] Public ACPI methods supported Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.119736] ACPI: EC: event unblocked Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.119823] [drm:intel_opregion_setup [i915]] ASLE supported Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.120239] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA) Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.120353] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:10001010 hp_port:38 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.120453] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.120541] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.121185] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 11 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.121700] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.121788] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.121897] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.121986] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.122072] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.122159] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.122243] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.122328] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:43:pipe A] hw state readout: disabled Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.122478] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.122573] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.122667] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.122761] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.122855] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.122948] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:59:pipe B] hw state readout: disabled Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.123396] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.123490] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.123582] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.123676] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.123776] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.123870] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:75:pipe C] hw state readout: disabled Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.123966] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL A hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.124061] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL B hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.124155] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.124251] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:76:DDI A] hw state readout: disabled, pipe A Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.124346] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:83:DDI B] hw state readout: disabled, pipe A Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.124440] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:85:DP-MST A] hw state readout: disabled, pipe A Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.124532] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:86:DP-MST B] hw state readout: disabled, pipe B Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.124625] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:87:DP-MST C] hw state readout: disabled, pipe C Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.124720] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:93:DDI C] hw state readout: disabled, pipe A Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.124816] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:77:eDP-1] hw state readout: disabled Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.124911] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:84:DP-1] hw state readout: disabled Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.125006] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:90:HDMI-A-1] hw state readout: disabled Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.125102] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:94:HDMI-A-2] hw state readout: disabled Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.125207] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][setup_hw_state] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.125303] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.125399] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.125493] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.125586] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.125600] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.125693] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.125701] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.125795] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.125889] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.125982] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.126076] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.126171] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.126274] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.126371] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.126476] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.126570] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.126663] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.126756] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.126849] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.126943] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][setup_hw_state] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.127036] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.127128] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.127220] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.127312] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.127320] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.127411] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.127419] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.127513] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.127606] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.127698] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.127790] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.127882] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.127981] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.128074] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.128167] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.128349] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.128442] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.128535] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.128627] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.128720] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][setup_hw_state] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.128811] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.128903] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.128994] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.129085] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.129092] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.129183] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.129191] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.129284] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.129376] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.129468] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.129560] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.129651] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.129749] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.129842] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.129945] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.129989] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.129991] sd 0:0:0:0: [sda] Starting disk Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130035] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130079] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130122] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130356] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130427] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130470] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130513] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130556] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130599] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130642] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130663] [drm:drm_atomic_check_only] checking 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130670] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] mode changed Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130673] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] enable changed Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130675] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] active changed Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130679] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130682] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:77:eDP-1] keeps [ENCODER:76:DDI A], now on [CRTC:75:pipe C] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130685] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130688] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:84:DP-1] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130690] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:90:HDMI-A-1] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130692] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:90:HDMI-A-1] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130694] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130696] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130698] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: n, active: n Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130702] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130705] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: n, active: n Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130707] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130710] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: y, active: y Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130712] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130717] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130765] [drm:intel_atomic_check [i915]] [CONNECTOR:77:eDP-1] checking for sink bpp constrains Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130810] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130816] [drm:drm_mode_debug_printmodeline] Modeline 80:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130865] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 141000KHz Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130912] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.130957] [drm:intel_dp_compute_config [i915]] DP link bw required 423000 available 540000 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131002] [drm:intel_dp_compute_config [i915]] PSR disable by flag Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131049] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131095] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][modeset] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131139] [drm:intel_dump_pipe_config [i915]] output_types: EDP (0x100) Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131183] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131227] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6571076, gmch_n: 8388608, link_m: 273794, link_n: 524288, tu: 64 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131271] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131314] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131318] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131360] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131364] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131408] [drm:intel_dump_pipe_config [i915]] crtc timings: 141000 1920 1936 1952 2104 1080 1083 1097 1116, type: 0x48 flags: 0xa Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131452] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 141000 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131496] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131539] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131582] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131629] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131673] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131716] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131759] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131802] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131845] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131888] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131935] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.131979] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.132030] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:60:plane 1C] with fb 136 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.132075] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:60:plane 1C] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.132120] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:72:cursor C] with fb 137 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.132164] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:72:cursor C] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.132212] [drm:bxt_get_dpll [i915]] [CRTC:75:pipe C] using pre-allocated PORT PLL A Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.132260] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe C Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.132339] [drm:skl_compute_wm [i915]] [PLANE:60:plane 1C] ddb (0 - 0) -> (0 - 988) Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.132382] [drm:skl_compute_wm [i915]] [PLANE:72:cursor C] ddb (0 - 0) -> (988 - 1020) Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.132384] [drm:drm_atomic_commit] committing 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.132746] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.132804] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.132942] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.133011] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.133049] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.133086] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.133123] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.133160] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.133197] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.133235] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.133273] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.133310] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.133347] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.133385] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.133423] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.133482] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 4, on? 0) for crtc 75 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.133520] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.133666] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.133698] [drm:edp_panel_on [i915]] Turn eDP port A panel power on Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.133728] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.133761] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000062 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.133790] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.133820] [drm:edp_panel_on [i915]] Wait for panel power on Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.133852] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000063 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.137291] r8169 0000:01:00.0 enp1s0: link down Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.235810] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.235910] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.236006] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.236160] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.334644] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.334734] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.334824] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.334922] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.335019] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.335112] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.336277] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.336361] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.336447] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.337103] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.337186] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.338143] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.338229] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:77:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.338797] [drm:intel_enable_pipe [i915]] enabling pipe C Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.338903] [drm:intel_edp_backlight_on [i915]] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.338994] [drm:intel_panel_enable_backlight [i915]] pipe C Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.339084] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 96000 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.346443] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.355727] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.355835] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.355977] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.356071] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.356211] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.356274] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.356378] [drm:__drm_atomic_state_free] Freeing atomic state 000000003a00a21d Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.356492] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.356587] [drm:intel_opregion_register [i915]] 4 outputs detected Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.356687] [drm:intel_dp_detect [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.356780] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.356867] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.356952] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.359774] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.360405] [drm:drm_helper_hpd_irq_event] [CONNECTOR:77:eDP-1] status updated from connected to connected Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.360493] [drm:intel_dp_detect [i915]] [CONNECTOR:84:DP-1] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.360579] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.360760] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.361200] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 00 02 02 06 06 00 00 00 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.361332] acpi LNXPOWER:1a: Turning OFF Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.361521] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.361569] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.361616] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.361984] [drm:drm_dp_read_desc] DP sink: OUI 00-00-00 dev-ID HW-rev 0.0 SW-rev 0.0 quirks 0x0000 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.362031] [drm:intel_dp_detect [i915]] Sink is not MST capable Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.362349] atkbd serio0: Failed to deactivate keyboard on isa0060/serio0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.365873] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.365919] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.365924] [drm:drm_helper_hpd_irq_event] [CONNECTOR:84:DP-1] status updated from connected to connected Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.365973] [drm:intel_hdmi_detect [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.366184] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.366231] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.366435] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.366440] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.366487] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.366540] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.367131] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.367178] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.367370] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.367398] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.367580] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.367584] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.367586] [drm:drm_helper_hpd_irq_event] [CONNECTOR:90:HDMI-A-1] status updated from disconnected to disconnected Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.367615] [drm:intel_hdmi_detect [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.370253] acpi LNXPOWER:0b: Turning OFF Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.373171] acpi LNXPOWER:09: Turning OFF Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.375863] acpi LNXPOWER:07: Turning OFF Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.377956] acpi LNXPOWER:05: Turning OFF Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.380665] acpi LNXPOWER:03: Turning OFF Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.383784] acpi LNXPOWER:01: Turning OFF Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.386775] OOM killer enabled. Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.386776] Restarting tasks ... done. Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.395537] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.395569] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.395754] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.395760] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.395765] [drm:drm_detect_monitor_audio] Monitor has basic audio support Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.395769] [drm:drm_helper_hpd_irq_event] [CONNECTOR:94:HDMI-A-2] status updated from connected to connected Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.584389] PM: suspend exit Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.622423] [drm:drm_atomic_state_init] Allocated atomic state 0000000077a00af6 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.622442] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 000000004eabda11 state to 0000000077a00af6 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.622459] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000001a6472c9 state to 0000000077a00af6 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.622462] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000004eabda11 to [NOCRTC] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.622466] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000004eabda11 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.622469] [drm:drm_atomic_check_only] checking 0000000077a00af6 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.622574] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:72:cursor C] with fb -1 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.622650] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:72:cursor C] visible 1 -> 0, off 1, on 0, ms 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.622669] [drm:drm_atomic_commit] committing 0000000077a00af6 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.622755] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000077a00af6 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.622770] [drm:__drm_atomic_state_free] Freeing atomic state 0000000077a00af6 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.634584] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300) Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.647536] ata1.00: configured for UDMA/133 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.708083] [drm:drm_atomic_state_init] Allocated atomic state 00000000c1987fc4 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.708091] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 0000000045c8d2fa state to 00000000c1987fc4 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.708103] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000007f3f3db1 state to 00000000c1987fc4 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.708104] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000045c8d2fa to [CRTC:75:pipe C] Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.708106] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 0000000045c8d2fa Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.708108] [drm:drm_atomic_check_only] checking 00000000c1987fc4 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.708165] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:72:cursor C] with fb 137 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.708200] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:72:cursor C] visible 0 -> 1, off 0, on 1, ms 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.708212] [drm:drm_atomic_commit] committing 00000000c1987fc4 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.708266] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000c1987fc4 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.708280] [drm:__drm_atomic_state_free] Freeing atomic state 00000000c1987fc4 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.708296] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 00000000fff48e46 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.708333] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:72:cursor C] with fb 137 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.708365] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:72:cursor C] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:51:54 GLK-2-GLKRVP1DDR405 kernel: [ 156.742613] atkbd serio0: Failed to enable keyboard on isa0060/serio0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 156.808128] PM: suspend entry (deep) Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 156.808131] PM: Syncing filesystems ... done. Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 156.808758] Freezing user space processes ... (elapsed 0.001 seconds) done. Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 156.810104] OOM killer disabled. Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 156.810105] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done. Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 156.811291] Suspending console(s) (use no_console_suspend to debug) Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.598531] sd 0:0:0:0: [sda] Synchronizing SCSI cache Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.598707] sd 0:0:0:0: [sda] Stopping disk Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.602764] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.602906] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603038] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603066] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603549] [drm:drm_atomic_state_init] Allocated atomic state 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603560] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 0000000098098753 state to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603565] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000eb0756fe state to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603571] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000002cdca724 state to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603577] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 0000000050b48292 state to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603582] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 00000000721af2b8 state to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603587] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 000000004b9b2212 state to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603591] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 000000002753e743 state to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603598] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 000000002a6caab8 state to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603603] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 000000006ee8874b state to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603610] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 00000000bd5e7f37 state to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603615] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 000000000cb394fa state to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603619] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 0000000041695713 state to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603622] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000c4a6bb48 state to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603627] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 00000000ecc8474b state to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603637] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 0000000081986595 state to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603642] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 000000007eb5d928 state to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603645] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 00000000ee565b5e state to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603650] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 00000000d90d4a3c state to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603662] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 00000000f54c78ea state to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603667] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 000000007afc959a state to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603672] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:90:HDMI-A-1] 00000000e1d68cd5 state to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603677] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 000000001266d843 state to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603685] [drm:drm_atomic_state_init] Allocated atomic state 0000000026288e11 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603690] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 0000000002e9fd8a state to 0000000026288e11 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603692] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 0000000026288e11 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603698] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000eb76b9fb state to 0000000026288e11 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603700] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 0000000026288e11 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603707] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000004390e994 state to 0000000026288e11 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603709] [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state 000000004390e994 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603713] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 000000007f52a23a state to 0000000026288e11 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603717] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 000000000ff9356b state to 0000000026288e11 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603718] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 0000000026288e11 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603724] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 00000000db3615fc state to 0000000026288e11 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603726] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000db3615fc to [NOCRTC] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603727] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000007f52a23a to [NOCRTC] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603728] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000007f52a23a Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603729] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000000ff9356b to [NOCRTC] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603730] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000000ff9356b Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603732] [drm:drm_atomic_check_only] checking 0000000026288e11 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603736] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] mode changed Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603738] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] enable changed Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603739] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] active changed Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603741] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603742] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:77:eDP-1] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603745] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: n, active: n Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603746] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 0000000026288e11 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603784] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603816] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603854] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:60:plane 1C] with fb -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603885] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:60:plane 1C] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603918] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:72:cursor C] with fb -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603948] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:72:cursor C] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.603986] [drm:skl_compute_wm [i915]] [PLANE:60:plane 1C] ddb (0 - 988) -> (0 - 0) Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.604014] [drm:skl_compute_wm [i915]] [PLANE:72:cursor C] ddb (988 - 1020) -> (0 - 0) Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.604016] [drm:drm_atomic_commit] committing 0000000026288e11 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.604078] [drm:intel_edp_backlight_off [i915]] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.673079] hpet1: lost 7161 rtc interrupts Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.810423] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.810460] [drm:intel_disable_pipe [i915]] disabling pipe C Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.821241] [drm:intel_edp_panel_off.part.32 [i915]] Turn eDP port A panel power off Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.821274] [drm:intel_edp_panel_off.part.32 [i915]] Wait for panel power off time Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.821310] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000060 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.873471] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.873501] [drm:intel_power_well_disable [i915]] disabling DDI A IO power well Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.873541] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL A (active 4, on? 1) for crtc 75 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.873597] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL A Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.873642] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.873675] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.873705] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.873736] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.873768] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.873799] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.873829] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.873861] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.873891] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.873920] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.873959] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.873978] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000026288e11 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.873993] [drm:__drm_atomic_state_free] Freeing atomic state 0000000026288e11 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.875141] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.875173] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.875202] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.875230] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.875261] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.875291] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.875319] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.875350] [drm:intel_power_well_disable [i915]] disabling DC off Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.875382] [drm:gen9_enable_dc5 [i915]] Enabling DC5 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.875415] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.875445] [drm:intel_power_well_disable [i915]] disabling always-on Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.876412] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.876483] [drm:intel_power_well_disable [i915]] disabling power well 1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.876519] [drm:hsw_power_well_disable [i915]] power well 1 forced on (bios:1 driver:0 kvmr:0 debug:0) Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.876583] [drm:bxt_enable_dc9 [i915]] Enabling DC9 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.876614] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 08 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.940389] ACPI: Preparing to enter system sleep state S3 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.943984] ACPI: EC: event blocked Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.943985] ACPI: EC: EC stopped Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.943987] PM: Saving platform NVS memory Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.943998] Disabling non-boot CPUs ... Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 157.976905] smpboot: CPU 1 is now offline Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.004996] smpboot: CPU 2 is now offline Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.020899] smpboot: CPU 3 is now offline Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.026739] ACPI: Low-level resume complete Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.026936] ACPI: EC: EC started Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.026937] PM: Restoring platform NVS memory Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.027996] Enabling non-boot CPUs ... Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.028216] x86: Booting SMP configuration: Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.028218] smpboot: Booting Node 0 Processor 1 APIC 0x2 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.029466] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.030050] cache: parent cpu1 should not be sleeping Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.031459] CPU1 is up Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.031611] smpboot: Booting Node 0 Processor 2 APIC 0x4 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.032904] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.033399] cache: parent cpu2 should not be sleeping Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.034476] CPU2 is up Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.034591] smpboot: Booting Node 0 Processor 3 APIC 0x6 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.035455] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.035951] cache: parent cpu3 should not be sleeping Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.037189] CPU3 is up Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.043420] ACPI: Waking up from system sleep state S3 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.209511] [drm:gen9_sanitize_dc_state [i915]] Resetting DC state tracking from 08 to 00 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.209579] [drm:bxt_disable_dc9 [i915]] Disabling DC9 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.209646] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.209722] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.209791] [drm:intel_power_well_enable [i915]] enabling power well 1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.209879] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.210235] [drm:intel_power_well_enable [i915]] enabling always-on Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.210299] [drm:intel_power_well_enable [i915]] enabling DC off Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.210365] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.210434] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.210507] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.210659] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.210858] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.211058] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.211123] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.211187] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.386159] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x799d3018 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.386347] [drm:intel_opregion_setup [i915]] Public ACPI methods supported Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.386349] ACPI: EC: event unblocked Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.386458] [drm:intel_opregion_setup [i915]] ASLE supported Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.386915] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA) Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.387043] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:10001010 hp_port:38 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.387174] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.387272] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.387954] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 11 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.388458] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.388550] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.388677] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.388778] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.388897] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.389004] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.389102] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.389207] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:43:pipe A] hw state readout: disabled Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.389313] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.389408] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.389510] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.389604] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.389699] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.389792] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:59:pipe B] hw state readout: disabled Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.390174] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.390268] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.390363] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.390464] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.390564] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.390657] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:75:pipe C] hw state readout: disabled Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.390762] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL A hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.390856] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL B hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.390958] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.391061] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:76:DDI A] hw state readout: disabled, pipe A Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.391124] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:83:DDI B] hw state readout: disabled, pipe A Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.391186] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:85:DP-MST A] hw state readout: disabled, pipe A Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.391251] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:86:DP-MST B] hw state readout: disabled, pipe B Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.391317] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:87:DP-MST C] hw state readout: disabled, pipe C Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.391380] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:93:DDI C] hw state readout: disabled, pipe A Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.391449] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:77:eDP-1] hw state readout: disabled Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.391517] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:84:DP-1] hw state readout: disabled Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.391581] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:90:HDMI-A-1] hw state readout: disabled Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.391645] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:94:HDMI-A-2] hw state readout: disabled Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.391722] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][setup_hw_state] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.391792] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.391856] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.391919] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.391981] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.391991] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.392052] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.392058] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.392121] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.392183] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.392245] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.392314] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.392375] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.392446] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.392513] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.392576] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.392642] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.392708] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.392771] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.392840] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.392908] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][setup_hw_state] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.392975] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.393037] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.393098] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.393159] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.393165] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.393226] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.393231] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.393293] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.393355] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.393417] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.393479] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.393540] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.393606] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.393668] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.393730] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.393791] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.393853] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.393914] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.393976] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.394038] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][setup_hw_state] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.394099] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.394161] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.394222] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.394283] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.394291] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.394352] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.394357] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.394420] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.394482] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.394543] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.394605] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.394666] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.394731] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.394793] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.394855] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.394916] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.394978] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395039] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395101] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395223] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395285] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395345] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395405] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395467] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395527] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395587] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395609] [drm:drm_atomic_check_only] checking 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395619] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] mode changed Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395622] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] enable changed Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395625] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] active changed Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395631] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395636] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:77:eDP-1] keeps [ENCODER:76:DDI A], now on [CRTC:75:pipe C] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395639] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395642] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:84:DP-1] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395645] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:90:HDMI-A-1] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395648] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:90:HDMI-A-1] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395651] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395653] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:94:HDMI-A-2] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395657] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: n, active: n Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395662] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395667] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: n, active: n Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395670] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395674] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: y, active: y Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395677] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395683] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395750] [drm:intel_atomic_check [i915]] [CONNECTOR:77:eDP-1] checking for sink bpp constrains Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395817] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395825] [drm:drm_mode_debug_printmodeline] Modeline 80:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395894] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 141000KHz Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.395960] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396023] [drm:intel_dp_compute_config [i915]] DP link bw required 423000 available 540000 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396086] [drm:intel_dp_compute_config [i915]] PSR disable by flag Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396153] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396218] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][modeset] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396281] [drm:intel_dump_pipe_config [i915]] output_types: EDP (0x100) Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396343] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396409] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6571076, gmch_n: 8388608, link_m: 273794, link_n: 524288, tu: 64 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396471] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396533] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396539] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396599] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396602] sd 0:0:0:0: [sda] Starting disk Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396607] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396661] [drm:intel_dump_pipe_config [i915]] crtc timings: 141000 1920 1936 1952 2104 1080 1083 1097 1116, type: 0x48 flags: 0xa Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396691] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 141000 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396720] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396750] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396783] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396815] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396844] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396874] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396903] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396932] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396962] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.396991] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.397024] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.397054] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.397089] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:60:plane 1C] with fb 136 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.397120] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:60:plane 1C] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.397151] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:72:cursor C] with fb 137 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.397180] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:72:cursor C] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.397213] [drm:bxt_get_dpll [i915]] [CRTC:75:pipe C] using pre-allocated PORT PLL A Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.397244] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe C Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.397282] [drm:skl_compute_wm [i915]] [PLANE:60:plane 1C] ddb (0 - 0) -> (0 - 988) Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.397311] [drm:skl_compute_wm [i915]] [PLANE:72:cursor C] ddb (0 - 0) -> (988 - 1020) Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.397312] [drm:drm_atomic_commit] committing 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.397614] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.397653] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.397791] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.397852] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.397882] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.397911] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.397941] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.397970] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.398000] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.398030] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.398060] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.398089] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.398119] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.398149] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.398179] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.398229] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 4, on? 0) for crtc 75 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.398260] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.398385] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.398419] [drm:edp_panel_on [i915]] Turn eDP port A panel power on Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.398450] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.398485] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000062 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.398516] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.398548] [drm:edp_panel_on [i915]] Wait for panel power on Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.398581] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000063 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.411723] r8169 0000:01:00.0 enp1s0: link down Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.500558] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.500637] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.500713] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.500860] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.599690] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.599781] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.599871] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.599972] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.600071] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.600164] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.601339] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.601424] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.601511] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.602187] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.602268] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.602926] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.603008] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.603967] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.604053] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:77:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.604620] [drm:intel_enable_pipe [i915]] enabling pipe C Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.604729] [drm:intel_edp_backlight_on [i915]] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.604842] [drm:intel_panel_enable_backlight [i915]] pipe C Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.604894] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 96000 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.604948] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.621537] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.621591] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.621680] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.621732] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.621825] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.621874] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.621952] [drm:__drm_atomic_state_free] Freeing atomic state 000000005e0b1790 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.622019] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.622070] [drm:intel_opregion_register [i915]] 4 outputs detected Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.622124] [drm:intel_dp_detect [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.622173] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.622219] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.622265] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.624360] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.624980] [drm:drm_helper_hpd_irq_event] [CONNECTOR:77:eDP-1] status updated from connected to connected Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.625051] [drm:intel_dp_detect [i915]] [CONNECTOR:84:DP-1] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.625117] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.625276] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.625743] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 00 02 02 06 06 00 00 00 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.626089] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.626156] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.626223] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.626595] [drm:drm_dp_read_desc] DP sink: OUI 00-00-00 dev-ID HW-rev 0.0 SW-rev 0.0 quirks 0x0000 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.626662] [drm:intel_dp_detect [i915]] Sink is not MST capable Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.626979] acpi LNXPOWER:1a: Turning OFF Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.628754] atkbd serio0: Failed to deactivate keyboard on isa0060/serio0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.630570] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.630637] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.630644] [drm:drm_helper_hpd_irq_event] [CONNECTOR:84:DP-1] status updated from connected to connected Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.630714] [drm:intel_hdmi_detect [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.630952] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.631024] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.631256] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.631263] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.631330] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.631398] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.632004] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.632072] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.632304] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.632371] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.632600] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.632608] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.632612] [drm:drm_helper_hpd_irq_event] [CONNECTOR:90:HDMI-A-1] status updated from disconnected to disconnected Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.632679] [drm:intel_hdmi_detect [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.637272] acpi LNXPOWER:0b: Turning OFF Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.640209] acpi LNXPOWER:09: Turning OFF Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.643097] acpi LNXPOWER:07: Turning OFF Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.645399] acpi LNXPOWER:05: Turning OFF Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.648825] acpi LNXPOWER:03: Turning OFF Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.652391] acpi LNXPOWER:01: Turning OFF Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.655528] OOM killer enabled. Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.655529] Restarting tasks ... done. Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.660367] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.660407] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.660601] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.660609] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.660614] [drm:drm_detect_monitor_audio] Monitor has basic audio support Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.660619] [drm:drm_helper_hpd_irq_event] [CONNECTOR:94:HDMI-A-2] status updated from connected to connected Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.847051] PM: suspend exit Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.888233] [drm:drm_atomic_state_init] Allocated atomic state 00000000cd0473f5 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.888252] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 000000004d8e659b state to 00000000cd0473f5 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.888272] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 0000000094c88f9c state to 00000000cd0473f5 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.888277] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000004d8e659b to [NOCRTC] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.888280] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000004d8e659b Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.888284] [drm:drm_atomic_check_only] checking 00000000cd0473f5 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.888397] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:72:cursor C] with fb -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.888481] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:72:cursor C] visible 1 -> 0, off 1, on 0, ms 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.888501] [drm:drm_atomic_commit] committing 00000000cd0473f5 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.888572] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000cd0473f5 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.888589] [drm:__drm_atomic_state_free] Freeing atomic state 00000000cd0473f5 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.900930] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300) Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.918032] ata1.00: configured for UDMA/133 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.958095] [drm:drm_atomic_state_init] Allocated atomic state 00000000cd0473f5 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.958119] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 00000000b90968a7 state to 00000000cd0473f5 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.958137] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000004110ac54 state to 00000000cd0473f5 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.958141] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000b90968a7 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.958145] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000b90968a7 to [NOCRTC] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.958149] [drm:drm_atomic_check_only] checking 00000000cd0473f5 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.958271] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:60:plane 1C] with fb -1 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.958364] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:60:plane 1C] visible 1 -> 0, off 1, on 0, ms 0 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.958453] [drm:skl_compute_wm [i915]] [PLANE:60:plane 1C] ddb (0 - 988) -> (0 - 0) Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.958458] [drm:drm_atomic_commit] committing 00000000cd0473f5 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.971235] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000cd0473f5 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.971264] [drm:__drm_atomic_state_free] Freeing atomic state 00000000cd0473f5 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.971733] [drm:drm_mode_setcrtc] [CRTC:75:pipe C] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.971783] [drm:drm_atomic_state_init] Allocated atomic state 000000008b8ac8bc Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.971804] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000b2635480 state to 000000008b8ac8bc Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.971817] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 00000000d6e6ac8a state to 000000008b8ac8bc Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.971822] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state 00000000b2635480 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.971825] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000d6e6ac8a to [NOCRTC] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.971829] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000d6e6ac8a Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.971834] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000008b8ac8bc Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.971859] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 00000000ce53e0d3 state to 000000008b8ac8bc Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.971864] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000ce53e0d3 to [NOCRTC] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.971869] [drm:drm_atomic_check_only] checking 000000008b8ac8bc Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.971877] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] mode changed Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.971881] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] enable changed Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.971885] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] active changed Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.971890] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.971894] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:77:eDP-1] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.971901] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: n, active: n Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.971905] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000008b8ac8bc Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.972026] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.972117] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.972142] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000ef254acf state to 000000008b8ac8bc Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.972155] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000008e319968 state to 000000008b8ac8bc Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.972248] [drm:skl_compute_wm [i915]] [PLANE:72:cursor C] ddb (988 - 1020) -> (0 - 0) Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.972252] [drm:drm_atomic_commit] committing 000000008b8ac8bc Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 158.972414] [drm:intel_edp_backlight_off [i915]] Feb 19 21:52:12 GLK-2-GLKRVP1DDR405 kernel: [ 159.008920] atkbd serio0: Failed to enable keyboard on isa0060/serio0 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.177034] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.177087] [drm:intel_disable_pipe [i915]] disabling pipe C Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.187798] [drm:intel_edp_panel_off.part.32 [i915]] Turn eDP port A panel power off Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.187864] [drm:intel_edp_panel_off.part.32 [i915]] Wait for panel power off time Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.187933] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000060 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.238610] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.238701] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.238787] [drm:intel_power_well_disable [i915]] disabling DDI A IO power well Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.238926] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL A (active 4, on? 1) for crtc 75 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.239045] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL A Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.239158] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.239249] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.239336] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.239422] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.239507] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.239592] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.239680] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.239767] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.239852] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.239936] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.240040] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.240132] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.240241] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.240277] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.240316] [drm:__drm_atomic_state_free] Freeing atomic state 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.240857] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.240964] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.240972] [drm:drm_mode_addfb2] [FB:136] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.241068] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.241249] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253395] [drm:drm_mode_setcrtc] [CRTC:75:pipe C] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253422] [drm:drm_mode_setcrtc] [CONNECTOR:84:DP-1] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253448] [drm:drm_atomic_state_init] Allocated atomic state 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253459] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000e3355f98 state to 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253464] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 0000000046bf8dae state to 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253470] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1200] for CRTC state 00000000e3355f98 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253471] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000046bf8dae to [CRTC:75:pipe C] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253473] [drm:drm_atomic_set_fb_for_plane] Set [FB:136] for plane state 0000000046bf8dae Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253475] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253489] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 000000008a770fa6 state to 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253491] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000008a770fa6 to [CRTC:75:pipe C] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253495] [drm:drm_atomic_check_only] checking 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253499] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] mode changed Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253501] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] enable changed Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253502] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] active changed Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253504] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253507] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:84:DP-1] using [ENCODER:83:DDI B] on [CRTC:75:pipe C] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253509] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: y, active: y Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253511] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253514] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253562] [drm:intel_atomic_check [i915]] [CONNECTOR:84:DP-1] checking for sink bpp constrains Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253591] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253626] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 154000KHz Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253658] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253687] [drm:intel_dp_compute_config [i915]] DP link bw required 462000 available 648000 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253718] [drm:intel_dp_compute_config [i915]] PSR disable by flag Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253752] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253785] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][modeset] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253814] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80) Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253847] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 24, dithering: 0 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253878] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5980766, gmch_n: 8388608, link_m: 249198, link_n: 262144, tu: 64 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253906] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253933] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253937] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253965] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253967] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.253995] [drm:intel_dump_pipe_config [i915]] crtc timings: 154000 1920 1968 2000 2080 1200 1203 1209 1235, type: 0x48 flags: 0x9 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.254023] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1200, pixel rate 154000 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.254052] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.254080] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.254107] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.254143] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.254170] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.254198] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.254228] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.254258] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.254288] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.254318] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.254349] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.254379] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.254417] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:60:plane 1C] with fb 136 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.254445] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:60:plane 1C] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.254477] [drm:bxt_get_dpll [i915]] [CRTC:75:pipe C] using pre-allocated PORT PLL B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.254508] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe C Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.254523] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000a6094b47 state to 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.254529] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000007afc5f3c state to 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.254564] [drm:skl_compute_wm [i915]] [PLANE:60:plane 1C] ddb (0 - 0) -> (0 - 988) Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.254593] [drm:skl_compute_wm [i915]] [PLANE:72:cursor C] ddb (0 - 0) -> (988 - 1020) Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.254594] [drm:drm_atomic_commit] committing 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.254810] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.254878] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.255135] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.255163] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.255193] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.255223] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.255253] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.255283] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.255311] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.255343] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.255371] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.255423] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 4, on? 0) for crtc 75 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.255451] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.255577] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.255619] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.255810] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.256436] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.256611] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.256640] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.256814] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.256858] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.256890] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.256926] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.256956] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.257153] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.257282] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.257448] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.257477] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.257683] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.257726] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.257755] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.257784] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.257974] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.258104] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.258267] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.258296] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.258502] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.258533] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.258565] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.258594] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.258792] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.259218] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.259383] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.259411] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.259617] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.259648] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.260002] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.260032] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.260197] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.260544] [drm:intel_enable_pipe [i915]] enabling pipe C Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.260593] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.277572] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.277615] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.277694] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.277731] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.277751] [drm:__drm_atomic_state_free] Freeing atomic state 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.277843] [drm:drm_atomic_state_init] Allocated atomic state 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.277850] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 00000000d6e6ac8a state to 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.277851] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000d6e6ac8a to [NOCRTC] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.277853] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000d6e6ac8a Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.277854] [drm:drm_atomic_check_only] checking 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.277858] [drm:drm_atomic_commit] committing 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.277887] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.277895] [drm:__drm_atomic_state_free] Freeing atomic state 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.366982] [drm:drm_atomic_state_init] Allocated atomic state 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.366990] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 00000000d90d4a3c state to 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.366999] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000b2635480 state to 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.367001] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000d90d4a3c to [CRTC:75:pipe C] Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.367002] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 00000000d90d4a3c Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.367004] [drm:drm_atomic_check_only] checking 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.367057] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:72:cursor C] with fb 137 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.367089] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:72:cursor C] visible 0 -> 1, off 0, on 1, ms 0 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.367101] [drm:drm_atomic_commit] committing 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.367155] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.367161] [drm:__drm_atomic_state_free] Freeing atomic state 000000008b8ac8bc Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.367176] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 000000007f52a23a Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.367209] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:72:cursor C] with fb 137 Feb 19 21:52:13 GLK-2-GLKRVP1DDR405 kernel: [ 159.367239] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:72:cursor C] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 159.470074] PM: suspend entry (deep) Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 159.470078] PM: Syncing filesystems ... done. Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 159.470898] Freezing user space processes ... (elapsed 0.003 seconds) done. Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 159.474549] OOM killer disabled. Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 159.474550] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done. Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 159.475839] Suspending console(s) (use no_console_suspend to debug) Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.257107] sd 0:0:0:0: [sda] Synchronizing SCSI cache Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.260351] sd 0:0:0:0: [sda] Stopping disk Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.263727] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.263856] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264010] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264038] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264066] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264437] [drm:drm_atomic_state_init] Allocated atomic state 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264447] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000e3355f98 state to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264452] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000008e319968 state to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264457] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000ef254acf state to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264463] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 000000001018b9ce state to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264470] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 000000003efa1ad1 state to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264475] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 0000000043239ec4 state to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264479] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 00000000f81e9ccc state to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264482] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 00000000266439a8 state to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264487] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 000000009a3cb760 state to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264490] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 000000005be88aec state to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264495] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 00000000b77441be state to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264498] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 00000000ba2ece01 state to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264502] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000b19fa387 state to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264506] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 000000008be5c8b2 state to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264511] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 000000001dcb4bbf state to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264514] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 00000000656065ab state to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264518] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 00000000edee95b8 state to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264522] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 00000000054e67a7 state to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264534] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 00000000504e0611 state to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264538] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 00000000e20abd92 state to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264542] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:90:HDMI-A-1] 00000000b963feb4 state to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264546] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 000000003c5d02ff state to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264555] [drm:drm_atomic_state_init] Allocated atomic state 00000000ebf5bf22 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264559] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 0000000096cd1992 state to 00000000ebf5bf22 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264562] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000ebf5bf22 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264566] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000001e730b49 state to 00000000ebf5bf22 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264567] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000ebf5bf22 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264571] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000d978eea1 state to 00000000ebf5bf22 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264573] [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state 00000000d978eea1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264577] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 0000000094471d50 state to 00000000ebf5bf22 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264581] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 0000000051431422 state to 00000000ebf5bf22 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264582] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000ebf5bf22 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264589] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 0000000053834d2c state to 00000000ebf5bf22 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264590] [drm:drm_atomic_set_crtc_for_connector] Link connector state 0000000053834d2c to [NOCRTC] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264592] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000094471d50 to [NOCRTC] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264593] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000094471d50 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264594] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000051431422 to [NOCRTC] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264595] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000051431422 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264596] [drm:drm_atomic_check_only] checking 00000000ebf5bf22 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264600] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] mode changed Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264602] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] enable changed Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264603] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] active changed Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264605] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264607] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:84:DP-1] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264609] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: n, active: n Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264611] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000ebf5bf22 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264648] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264679] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264713] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:60:plane 1C] with fb -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264743] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:60:plane 1C] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264778] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:72:cursor C] with fb -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264808] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:72:cursor C] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264841] [drm:skl_compute_wm [i915]] [PLANE:60:plane 1C] ddb (0 - 988) -> (0 - 0) Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264869] [drm:skl_compute_wm [i915]] [PLANE:72:cursor C] ddb (988 - 1020) -> (0 - 0) Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264871] [drm:drm_atomic_commit] committing 00000000ebf5bf22 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.264932] [drm:intel_disable_pipe [i915]] disabling pipe C Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.279589] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.279655] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 4, on? 1) for crtc 75 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.279714] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.279759] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.279789] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.279819] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.279853] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.279884] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.279912] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.279942] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.279972] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.280001] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.280030] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.280068] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.280084] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000ebf5bf22 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.280091] [drm:__drm_atomic_state_free] Freeing atomic state 00000000ebf5bf22 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.339435] hpet1: lost 7160 rtc interrupts Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.393897] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.393929] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.393958] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.393986] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.394017] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.394045] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.394073] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.394100] [drm:intel_power_well_disable [i915]] disabling DC off Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.394133] [drm:gen9_enable_dc5 [i915]] Enabling DC5 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.394166] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.394196] [drm:intel_power_well_disable [i915]] disabling always-on Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.395162] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.395238] [drm:intel_power_well_disable [i915]] disabling power well 1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.395272] [drm:hsw_power_well_disable [i915]] power well 1 forced on (bios:1 driver:0 kvmr:0 debug:0) Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.395335] [drm:bxt_enable_dc9 [i915]] Enabling DC9 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.395366] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 08 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.471437] ACPI: Preparing to enter system sleep state S3 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.475479] ACPI: EC: event blocked Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.475481] ACPI: EC: EC stopped Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.475483] PM: Saving platform NVS memory Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.475494] Disabling non-boot CPUs ... Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.491788] smpboot: CPU 1 is now offline Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.515478] smpboot: CPU 2 is now offline Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.531304] smpboot: CPU 3 is now offline Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.537258] ACPI: Low-level resume complete Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.537464] ACPI: EC: EC started Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.537465] PM: Restoring platform NVS memory Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.538527] Enabling non-boot CPUs ... Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.538741] x86: Booting SMP configuration: Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.538743] smpboot: Booting Node 0 Processor 1 APIC 0x2 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.540008] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.540556] cache: parent cpu1 should not be sleeping Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.541713] CPU1 is up Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.541862] smpboot: Booting Node 0 Processor 2 APIC 0x4 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.542895] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.543450] cache: parent cpu2 should not be sleeping Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.544728] CPU2 is up Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.544857] smpboot: Booting Node 0 Processor 3 APIC 0x6 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.545889] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.546416] cache: parent cpu3 should not be sleeping Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.547862] CPU3 is up Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.555365] ACPI: Waking up from system sleep state S3 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.723961] [drm:gen9_sanitize_dc_state [i915]] Resetting DC state tracking from 08 to 00 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.724029] [drm:bxt_disable_dc9 [i915]] Disabling DC9 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.724097] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.724174] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.724244] [drm:intel_power_well_enable [i915]] enabling power well 1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.724332] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.724688] [drm:intel_power_well_enable [i915]] enabling always-on Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.724753] [drm:intel_power_well_enable [i915]] enabling DC off Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.724819] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.724904] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.724983] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.725149] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.725336] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.725519] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.725590] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.725661] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.900644] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x799d3018 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.900855] [drm:intel_opregion_setup [i915]] Public ACPI methods supported Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.900858] ACPI: EC: event unblocked Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.900957] [drm:intel_opregion_setup [i915]] ASLE supported Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.901518] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA) Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.901644] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:10001010 hp_port:38 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.901755] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.901853] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.902537] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 11 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.903030] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.903123] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.903248] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.903368] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.903465] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.903563] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.903659] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.903754] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:43:pipe A] hw state readout: disabled Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.903858] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.903951] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.904044] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.904137] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.904233] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.904325] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:59:pipe B] hw state readout: disabled Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.904522] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.904616] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.904708] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.904801] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.904893] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.904985] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:75:pipe C] hw state readout: disabled Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.905086] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL A hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.905179] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL B hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.905272] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.905367] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:76:DDI A] hw state readout: disabled, pipe A Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.905461] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:83:DDI B] hw state readout: disabled, pipe A Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.905554] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:85:DP-MST A] hw state readout: disabled, pipe A Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.905646] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:86:DP-MST B] hw state readout: disabled, pipe B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.905739] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:87:DP-MST C] hw state readout: disabled, pipe C Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.905832] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:93:DDI C] hw state readout: disabled, pipe A Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.905927] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:77:eDP-1] hw state readout: disabled Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.906022] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:84:DP-1] hw state readout: disabled Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.906116] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:90:HDMI-A-1] hw state readout: disabled Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.906211] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:94:HDMI-A-2] hw state readout: disabled Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.906316] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][setup_hw_state] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.906412] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.906508] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.906601] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.906694] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.906707] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.906799] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.906807] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.906902] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.906996] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.907089] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.907184] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.907285] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.907386] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.907479] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.907573] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.907667] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.907760] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.907853] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.907945] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.908039] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][setup_hw_state] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.908131] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.908223] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.908314] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.908406] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.908414] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.908506] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.908513] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.908608] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.908701] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.908794] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.908887] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.908979] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.909078] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.909170] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.909264] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.909356] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.909449] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.909541] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.909634] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.909727] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][setup_hw_state] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.909819] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.909877] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.909914] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.909950] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.909953] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.909989] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.909992] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910029] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910066] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910103] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910140] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910176] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910215] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910252] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910289] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910326] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910362] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910402] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910439] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910530] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910568] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910604] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910640] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910677] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910714] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910750] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910768] [drm:drm_atomic_check_only] checking 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910775] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] mode changed Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910777] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] enable changed Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910779] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] active changed Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910782] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910784] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:77:eDP-1] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910787] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910790] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:84:DP-1] keeps [ENCODER:83:DDI B], now on [CRTC:75:pipe C] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910791] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:90:HDMI-A-1] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910793] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:90:HDMI-A-1] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910795] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910797] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:94:HDMI-A-2] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910799] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: n, active: n Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910802] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910805] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: n, active: n Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910806] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910809] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: y, active: y Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910810] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910814] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910855] [drm:intel_atomic_check [i915]] [CONNECTOR:84:DP-1] checking for sink bpp constrains Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910892] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910934] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 154000KHz Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.910974] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911013] [drm:intel_dp_compute_config [i915]] DP link bw required 462000 available 648000 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911052] [drm:intel_dp_compute_config [i915]] PSR disable by flag Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911092] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911094] sd 0:0:0:0: [sda] Starting disk Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911147] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][modeset] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911182] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80) Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911221] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 24, dithering: 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911256] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5980766, gmch_n: 8388608, link_m: 249198, link_n: 262144, tu: 64 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911289] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911323] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911326] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911359] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911362] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911397] [drm:intel_dump_pipe_config [i915]] crtc timings: 154000 1920 1968 2000 2080 1200 1203 1209 1235, type: 0x48 flags: 0x9 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911430] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1200, pixel rate 154000 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911464] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911497] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911531] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911567] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8200, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x19999a, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911601] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911634] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911668] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911701] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911734] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911768] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911806] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911840] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911880] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:60:plane 1C] with fb 136 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911915] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:60:plane 1C] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911951] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:72:cursor C] with fb 137 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.911985] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:72:cursor C] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.912024] [drm:bxt_get_dpll [i915]] [CRTC:75:pipe C] using pre-allocated PORT PLL B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.912062] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe C Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.912104] [drm:skl_compute_wm [i915]] [PLANE:60:plane 1C] ddb (0 - 0) -> (0 - 988) Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.912137] [drm:skl_compute_wm [i915]] [PLANE:72:cursor C] ddb (0 - 0) -> (988 - 1020) Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.912139] [drm:drm_atomic_commit] committing 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.912475] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.912518] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.912778] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.912843] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.912877] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.912911] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.912945] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.912978] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.913013] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.913050] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.913087] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.913121] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.913155] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.913189] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.913224] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.913278] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 4, on? 0) for crtc 75 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.913313] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.913443] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.913489] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.913656] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.914283] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.914463] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.914491] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.914662] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.914704] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.914734] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.914764] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.914795] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.915034] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.915163] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.915330] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.915359] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.915563] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.915603] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.915632] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.915660] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.915848] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.915976] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.916140] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.916168] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.916373] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.916405] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.916437] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.916466] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.916664] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.917089] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.917253] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.917281] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.917486] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.917521] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.917872] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.917904] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.918069] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.918423] [drm:intel_enable_pipe [i915]] enabling pipe C Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.918469] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.922125] r8169 0000:01:00.0 enp1s0: link down Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.935338] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.935382] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.935447] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.935482] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.935553] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.935599] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.935664] [drm:__drm_atomic_state_free] Freeing atomic state 00000000943b182d Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.935740] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.935793] [drm:intel_opregion_register [i915]] 4 outputs detected Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.935852] [drm:intel_dp_detect [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.935899] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.938830] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.938884] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.938932] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.938979] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.939029] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.939076] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.939126] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000062 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.939173] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.939231] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x0000006a Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.939277] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.961891] acpi LNXPOWER:1a: Turning OFF Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.972786] acpi LNXPOWER:0b: Turning OFF Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.975536] acpi LNXPOWER:09: Turning OFF Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.978172] acpi LNXPOWER:07: Turning OFF Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.980300] acpi LNXPOWER:05: Turning OFF Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.982938] acpi LNXPOWER:03: Turning OFF Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.985658] acpi LNXPOWER:01: Turning OFF Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.988198] OOM killer enabled. Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 160.988199] Restarting tasks ... done. Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.041201] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.041272] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.041334] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.041386] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.143356] atkbd serio0: Failed to deactivate keyboard on isa0060/serio0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.147868] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.148513] [drm:drm_helper_hpd_irq_event] [CONNECTOR:77:eDP-1] status updated from connected to connected Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.148639] [drm:intel_dp_detect [i915]] [CONNECTOR:84:DP-1] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.148733] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.149234] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 00 02 02 06 03 00 00 00 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.149617] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.149713] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.149807] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.150187] [drm:drm_dp_read_desc] DP sink: OUI 00-00-00 dev-ID HW-rev 0.0 SW-rev 0.0 quirks 0x0000 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.150282] [drm:intel_dp_detect [i915]] Sink is not MST capable Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.150696] [drm:intel_dp_check_link_status [i915]] DDI B: channel EQ not ok, retraining Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.151875] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.151968] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.152063] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.152766] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.152858] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.153778] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.154138] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.172287] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.172293] [drm:drm_helper_hpd_irq_event] [CONNECTOR:84:DP-1] status updated from connected to connected Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.172355] [drm:intel_hdmi_detect [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.172581] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.172636] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.172850] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.172856] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.172910] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.172963] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.173557] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.173610] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.173819] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.173868] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.174075] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.174081] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.174084] [drm:drm_helper_hpd_irq_event] [CONNECTOR:90:HDMI-A-1] status updated from disconnected to disconnected Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.174133] [drm:intel_hdmi_detect [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.202037] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.202120] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.202364] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.202372] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.202379] [drm:drm_detect_monitor_audio] Monitor has basic audio support Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.202384] [drm:drm_helper_hpd_irq_event] [CONNECTOR:94:HDMI-A-2] status updated from connected to connected Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.415328] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300) Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.435799] ata1.00: configured for UDMA/133 Feb 19 21:52:30 GLK-2-GLKRVP1DDR405 kernel: [ 161.519239] atkbd serio0: Failed to enable keyboard on isa0060/serio0 Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.691406] PM: suspend exit Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.736240] [drm:drm_atomic_state_init] Allocated atomic state 000000004261731b Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.736255] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 00000000678a856b state to 000000004261731b Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.736268] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000003a6f3d63 state to 000000004261731b Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.736271] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000678a856b to [NOCRTC] Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.736274] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000678a856b Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.736277] [drm:drm_atomic_check_only] checking 000000004261731b Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.736358] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:72:cursor C] with fb -1 Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.736414] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:72:cursor C] visible 1 -> 0, off 1, on 0, ms 0 Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.736429] [drm:drm_atomic_commit] committing 000000004261731b Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.736499] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000004261731b Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.736513] [drm:__drm_atomic_state_free] Freeing atomic state 000000004261731b Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.828042] [drm:drm_atomic_state_init] Allocated atomic state 000000004261731b Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.828053] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 00000000d486aaeb state to 000000004261731b Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.828064] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000dd9aca45 state to 000000004261731b Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.828065] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000d486aaeb to [CRTC:75:pipe C] Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.828067] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 00000000d486aaeb Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.828068] [drm:drm_atomic_check_only] checking 000000004261731b Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.828124] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:72:cursor C] with fb 137 Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.828156] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:72:cursor C] visible 0 -> 1, off 0, on 1, ms 0 Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.828168] [drm:drm_atomic_commit] committing 000000004261731b Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.828227] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000004261731b Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.828235] [drm:__drm_atomic_state_free] Freeing atomic state 000000004261731b Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.828251] [drm:drm_atomic_set_fb_for_plane] Set [FB:137] for plane state 00000000678a856b Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.828286] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:72:cursor C] with fb 137 Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.828317] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:72:cursor C] visible 1 -> 1, off 0, on 0, ms 0 Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.926573] PM: suspend entry (deep) Feb 19 21:52:31 GLK-2-GLKRVP1DDR405 kernel: [ 161.926577] PM: Syncing filesystems ... done. Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 161.927369] Freezing user space processes ... (elapsed 0.001 seconds) done. Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 161.928881] OOM killer disabled. Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 161.928882] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done. Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 161.930145] Suspending console(s) (use no_console_suspend to debug) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.711501] sd 0:0:0:0: [sda] Synchronizing SCSI cache Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.713298] sd 0:0:0:0: [sda] Stopping disk Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725165] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725337] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725366] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725842] [drm:drm_atomic_state_init] Allocated atomic state 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725852] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 000000006cf75dd6 state to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725858] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000008e7794e3 state to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725863] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000000618a073 state to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725869] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 00000000b052148a state to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725874] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 00000000754b571d state to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725879] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 000000007b17fae3 state to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725883] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 00000000adeb828e state to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725887] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 000000004eabda11 state to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725891] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 0000000021c368f4 state to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725895] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 0000000046ec628e state to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725898] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 00000000c675cc6a state to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725903] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 0000000085a23474 state to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725907] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 0000000050be610e state to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725911] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 00000000baaf6ed2 state to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725915] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 000000006a9af25d state to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725923] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 00000000ed0aeaca state to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725928] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 00000000ecb9a168 state to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725932] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 000000003a2e9c8c state to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725944] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 00000000e27fc06f state to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725948] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 00000000270e63e9 state to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725952] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:90:HDMI-A-1] 000000005f1d5eed state to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725958] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 000000008a3c0b5d state to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725967] [drm:drm_atomic_state_init] Allocated atomic state 000000008862cea1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725971] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 00000000cd2a97bf state to 000000008862cea1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725973] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 000000008862cea1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725978] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 000000000bee5da8 state to 000000008862cea1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725979] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 000000008862cea1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725983] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000be38ada1 state to 000000008862cea1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725986] [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state 00000000be38ada1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725990] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 000000007bcc1816 state to 000000008862cea1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725993] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 0000000050a3e7f4 state to 000000008862cea1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.725995] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000008862cea1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.726002] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 0000000082ccfc7c state to 000000008862cea1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.726004] [drm:drm_atomic_set_crtc_for_connector] Link connector state 0000000082ccfc7c to [NOCRTC] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.726005] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000007bcc1816 to [NOCRTC] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.726006] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000007bcc1816 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.726008] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000050a3e7f4 to [NOCRTC] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.726008] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000050a3e7f4 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.726010] [drm:drm_atomic_check_only] checking 000000008862cea1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.726015] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] mode changed Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.726016] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] enable changed Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.726017] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] active changed Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.726019] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.726021] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:84:DP-1] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.726023] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: n, active: n Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.726025] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000008862cea1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.726062] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.726094] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.726129] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:60:plane 1C] with fb -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.726159] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:60:plane 1C] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.726189] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:72:cursor C] with fb -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.726219] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:72:cursor C] visible 1 -> 0, off 1, on 0, ms 1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.726252] [drm:skl_compute_wm [i915]] [PLANE:60:plane 1C] ddb (0 - 988) -> (0 - 0) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.726279] [drm:skl_compute_wm [i915]] [PLANE:72:cursor C] ddb (988 - 1020) -> (0 - 0) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.726281] [drm:drm_atomic_commit] committing 000000008862cea1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.726340] [drm:intel_disable_pipe [i915]] disabling pipe C Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.737953] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.738016] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 4, on? 1) for crtc 75 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.738075] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.738120] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.738150] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.738181] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.738212] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.738244] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.738275] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.738305] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.738335] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.738367] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.738396] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.738437] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.738454] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000008862cea1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.738469] [drm:__drm_atomic_state_free] Freeing atomic state 000000008862cea1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.738540] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.738577] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000062 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.793706] hpet1: lost 7160 rtc interrupts Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.853516] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.853545] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.853573] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.853601] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.853632] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.853660] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.853689] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.853717] [drm:intel_power_well_disable [i915]] disabling DC off Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.853752] [drm:gen9_enable_dc5 [i915]] Enabling DC5 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.853785] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.853815] [drm:intel_power_well_disable [i915]] disabling always-on Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.854782] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.854858] [drm:intel_power_well_disable [i915]] disabling power well 1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.854894] [drm:hsw_power_well_disable [i915]] power well 1 forced on (bios:1 driver:0 kvmr:0 debug:0) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.854960] [drm:bxt_enable_dc9 [i915]] Enabling DC9 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.854991] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 08 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.921779] ACPI: Preparing to enter system sleep state S3 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.925280] ACPI: EC: event blocked Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.925281] ACPI: EC: EC stopped Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.925283] PM: Saving platform NVS memory Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.925293] Disabling non-boot CPUs ... Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.953036] IRQ fixup: irq 121 move in progress, old vector 40 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.953052] IRQ 124: no longer affine to CPU1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.954093] smpboot: CPU 1 is now offline Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.976905] IRQ 122: no longer affine to CPU2 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 162.977940] smpboot: CPU 2 is now offline Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.000658] IRQ 1: no longer affine to CPU3 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.000668] IRQ 8: no longer affine to CPU3 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.000679] IRQ 9: no longer affine to CPU3 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.000700] IRQ 121: no longer affine to CPU3 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.001730] smpboot: CPU 3 is now offline Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.007661] ACPI: Low-level resume complete Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.007859] ACPI: EC: EC started Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.007861] PM: Restoring platform NVS memory Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.008906] Enabling non-boot CPUs ... Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.009124] x86: Booting SMP configuration: Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.009126] smpboot: Booting Node 0 Processor 1 APIC 0x2 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.010381] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.010972] cache: parent cpu1 should not be sleeping Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.012359] CPU1 is up Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.012509] smpboot: Booting Node 0 Processor 2 APIC 0x4 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.013801] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.014375] cache: parent cpu2 should not be sleeping Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.015893] CPU2 is up Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.016052] smpboot: Booting Node 0 Processor 3 APIC 0x6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.017339] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.017945] cache: parent cpu3 should not be sleeping Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.019552] CPU3 is up Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.029173] ACPI: Waking up from system sleep state S3 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.190325] [drm:gen9_sanitize_dc_state [i915]] Resetting DC state tracking from 08 to 00 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.190394] [drm:bxt_disable_dc9 [i915]] Disabling DC9 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.190462] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.190542] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.190612] [drm:intel_power_well_enable [i915]] enabling power well 1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.190699] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.191054] [drm:intel_power_well_enable [i915]] enabling always-on Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.191119] [drm:intel_power_well_enable [i915]] enabling DC off Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.191184] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.191299] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.191384] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.191561] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.191750] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.191939] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.192018] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.192097] [drm:intel_power_well_enable [i915]] enabling AUX C Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.367060] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x799d3018 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.367273] [drm:intel_opregion_setup [i915]] Public ACPI methods supported Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.367275] ACPI: EC: event unblocked Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.367376] [drm:intel_opregion_setup [i915]] ASLE supported Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.367958] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.368084] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:10001010 hp_port:38 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.368195] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.368295] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.368980] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 11 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.369478] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.369572] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.369711] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.369809] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.369906] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.370001] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.370097] [drm:intel_modeset_setup_hw_state [i915]] pipe A active planes 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.370193] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:43:pipe A] hw state readout: disabled Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.370296] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.370391] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.370485] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.370580] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.370673] [drm:intel_modeset_setup_hw_state [i915]] pipe B active planes 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.370766] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:59:pipe B] hw state readout: disabled Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.371048] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.371145] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.371242] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.371335] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.371428] [drm:intel_modeset_setup_hw_state [i915]] pipe C active planes 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.371527] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:75:pipe C] hw state readout: disabled Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.371623] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL A hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.371718] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL B hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.371812] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.371908] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:76:DDI A] hw state readout: disabled, pipe A Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.372002] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:83:DDI B] hw state readout: disabled, pipe A Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.372096] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:85:DP-MST A] hw state readout: disabled, pipe A Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.372189] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:86:DP-MST B] hw state readout: disabled, pipe B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.372282] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:87:DP-MST C] hw state readout: disabled, pipe C Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.372377] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:93:DDI C] hw state readout: disabled, pipe A Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.372473] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:77:eDP-1] hw state readout: disabled Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.372568] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:84:DP-1] hw state readout: disabled Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.372662] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:90:HDMI-A-1] hw state readout: disabled Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.372758] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:94:HDMI-A-2] hw state readout: disabled Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.372862] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][setup_hw_state] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.372957] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.373053] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 0, dithering: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.373147] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.373239] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.373252] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.373345] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.373352] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.373447] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.373540] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.373634] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.373737] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.373829] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.373930] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.374023] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.374116] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.374208] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.374301] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.374393] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.374486] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.374579] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][setup_hw_state] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.374671] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.374763] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.374855] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.374946] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.374954] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.375046] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.375053] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.375147] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.375239] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.375332] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.375424] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.375515] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.375614] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.375707] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.375799] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.375892] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.375966] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376005] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376044] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376083] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][setup_hw_state] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376121] [drm:intel_dump_pipe_config [i915]] output_types: (0x0) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376160] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376199] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376237] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376240] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376278] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376281] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376320] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376359] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376400] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376439] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376477] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376518] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376556] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376595] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376634] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376675] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376716] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376755] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376850] [drm:intel_power_well_disable [i915]] disabling AUX C Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376889] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376927] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.376965] [drm:intel_power_well_disable [i915]] disabling dpio-common-c Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377004] [drm:intel_power_well_disable [i915]] disabling dpio-common-b Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377042] [drm:intel_power_well_disable [i915]] disabling dpio-common-a Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377080] [drm:intel_power_well_disable [i915]] disabling power well 2 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377098] [drm:drm_atomic_check_only] checking 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377106] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] mode changed Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377108] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] enable changed Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377109] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] active changed Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377113] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377115] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:77:eDP-1] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377118] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377121] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:84:DP-1] keeps [ENCODER:83:DDI B], now on [CRTC:75:pipe C] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377123] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:90:HDMI-A-1] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377125] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:90:HDMI-A-1] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377127] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377129] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:94:HDMI-A-2] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377131] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: n, active: n Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377134] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377137] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: n, active: n Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377139] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377142] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: y, active: y Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377144] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377148] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377190] [drm:intel_atomic_check [i915]] [CONNECTOR:84:DP-1] checking for sink bpp constrains Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377231] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377275] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 154000KHz Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377317] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377358] [drm:intel_dp_compute_config [i915]] DP link bw required 462000 available 648000 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377398] [drm:intel_dp_compute_config [i915]] PSR disable by flag Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377440] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377496] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][modeset] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377532] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377534] sd 0:0:0:0: [sda] Starting disk Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377570] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 24, dithering: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377612] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5980766, gmch_n: 8388608, link_m: 249198, link_n: 262144, tu: 64 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377647] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377682] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377685] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377720] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377723] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377759] [drm:intel_dump_pipe_config [i915]] crtc timings: 154000 1920 1968 2000 2080 1200 1203 1209 1235, type: 0x48 flags: 0x9 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377794] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1200, pixel rate 154000 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377829] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377864] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377899] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377937] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8200, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x19999a, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.377972] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.378008] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.378042] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.378077] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.378113] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.378148] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.378187] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.378222] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.378265] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:60:plane 1C] with fb 136 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.378301] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:60:plane 1C] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.378338] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:72:cursor C] with fb 137 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.378374] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:72:cursor C] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.378420] [drm:bxt_get_dpll [i915]] [CRTC:75:pipe C] using pre-allocated PORT PLL B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.378459] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe C Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.378506] [drm:skl_compute_wm [i915]] [PLANE:60:plane 1C] ddb (0 - 0) -> (0 - 988) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.378539] [drm:skl_compute_wm [i915]] [PLANE:72:cursor C] ddb (0 - 0) -> (988 - 1020) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.378542] [drm:drm_atomic_commit] committing 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.378887] [drm:intel_power_well_enable [i915]] enabling power well 2 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.378930] [drm:intel_power_well_enable [i915]] enabling dpio-common-b Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.379195] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.379261] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.379297] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.379332] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.379367] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.379402] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.379437] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.379474] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.379509] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.379546] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.379586] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.379622] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.379658] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.379714] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 4, on? 0) for crtc 75 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.379750] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.379895] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.379936] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.380104] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.380731] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.380903] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.380932] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.381105] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.381147] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.381176] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.381207] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.381236] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.381432] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.381560] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.381726] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.381755] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.381958] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.382000] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.382029] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.382057] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.382244] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.382372] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.382534] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.382562] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.382768] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.382799] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.382831] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.382863] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.383059] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.383485] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.383649] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.383678] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.383883] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.383916] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.384269] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.384298] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.384463] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.384818] [drm:intel_enable_pipe [i915]] enabling pipe C Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.384864] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.392573] r8169 0000:01:00.0 enp1s0: link down Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.401740] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.401809] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.401874] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.401908] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.401979] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.402027] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.402084] [drm:__drm_atomic_state_free] Freeing atomic state 0000000056d194e6 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.402159] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.402203] [drm:intel_opregion_register [i915]] 4 outputs detected Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.402252] [drm:intel_dp_detect [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.402292] [drm:intel_power_well_enable [i915]] enabling dpio-common-a Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.405041] [drm:intel_power_well_enable [i915]] enabling AUX A Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.405087] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.405127] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.405166] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.405209] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.405249] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.405292] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000062 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.405331] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.405371] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x0000006a Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.405410] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.431882] acpi LNXPOWER:1a: Turning OFF Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.447226] acpi LNXPOWER:0b: Turning OFF Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.450027] acpi LNXPOWER:09: Turning OFF Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.452682] acpi LNXPOWER:07: Turning OFF Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.454818] acpi LNXPOWER:05: Turning OFF Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.457469] acpi LNXPOWER:03: Turning OFF Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.460213] acpi LNXPOWER:01: Turning OFF Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.462825] OOM killer enabled. Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.462826] Restarting tasks ... done. Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.507197] [drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.507232] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.507264] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.507305] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.535283] PM: suspend exit Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.585516] [drm:drm_atomic_state_init] Allocated atomic state 0000000090ec9983 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.585536] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 00000000ba568439 state to 0000000090ec9983 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.585636] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 00000000ff9594b3 state to 0000000090ec9983 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.585647] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000ba568439 to [NOCRTC] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.585658] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000ba568439 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.585665] [drm:drm_atomic_check_only] checking 0000000090ec9983 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.585790] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:72:cursor C] with fb -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.585895] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:72:cursor C] visible 1 -> 0, off 1, on 0, ms 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.585919] [drm:drm_atomic_commit] committing 0000000090ec9983 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.585997] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000090ec9983 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.586013] [drm:__drm_atomic_state_free] Freeing atomic state 0000000090ec9983 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.609798] atkbd serio0: Failed to deactivate keyboard on isa0060/serio0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.610146] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.610804] [drm:drm_helper_hpd_irq_event] [CONNECTOR:77:eDP-1] status updated from connected to connected Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.610929] [drm:intel_dp_detect [i915]] [CONNECTOR:84:DP-1] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.611022] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.611531] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 00 02 02 06 03 00 00 00 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.611916] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.612012] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.612106] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.612488] [drm:drm_dp_read_desc] DP sink: OUI 00-00-00 dev-ID HW-rev 0.0 SW-rev 0.0 quirks 0x0000 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.612583] [drm:intel_dp_detect [i915]] Sink is not MST capable Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.612997] [drm:intel_dp_check_link_status [i915]] DDI B: channel EQ not ok, retraining Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.614016] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.614109] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.614203] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.614900] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.614993] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.615985] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.616415] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.618950] [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR* CPU pipe C FIFO underrun Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.622193] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.622199] [drm:drm_helper_hpd_irq_event] [CONNECTOR:84:DP-1] status updated from connected to connected Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.622247] [drm:intel_hdmi_detect [i915]] [CONNECTOR:90:HDMI-A-1] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.622456] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.622499] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.622699] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.622704] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.622746] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.622788] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.623381] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.623422] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.623609] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.623637] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.623820] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.623824] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.623826] [drm:drm_helper_hpd_irq_event] [CONNECTOR:90:HDMI-A-1] status updated from disconnected to disconnected Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.623855] [drm:intel_hdmi_detect [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.650521] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.650574] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.650781] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.650790] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID: (err -6) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.650796] [drm:drm_detect_monitor_audio] Monitor has basic audio support Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.650801] [drm:drm_helper_hpd_irq_event] [CONNECTOR:94:HDMI-A-2] status updated from connected to connected Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.881771] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.898800] ata1.00: configured for UDMA/133 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.902543] [drm:drm_mode_addfb2] [FB:97] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.902740] [drm:drm_mode_addfb2] [FB:97] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.903058] [drm:drm_mode_addfb2] [FB:97] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.903232] [drm:drm_mode_addfb2] [FB:97] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.904164] [drm:drm_mode_addfb2] [FB:97] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.951673] [drm:drm_atomic_state_init] Allocated atomic state 0000000083b0a7cf Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.951691] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 0000000050b48292 state to 0000000083b0a7cf Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.951704] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 0000000096cd1992 state to 0000000083b0a7cf Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.951706] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000050b48292 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.951709] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000050b48292 to [NOCRTC] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.951712] [drm:drm_atomic_check_only] checking 0000000083b0a7cf Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.951793] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:60:plane 1C] with fb -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.951850] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:60:plane 1C] visible 1 -> 0, off 1, on 0, ms 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.951906] [drm:skl_compute_wm [i915]] [PLANE:60:plane 1C] ddb (0 - 988) -> (0 - 0) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.951910] [drm:drm_atomic_commit] committing 0000000083b0a7cf Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.968867] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000083b0a7cf Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.968894] [drm:__drm_atomic_state_free] Freeing atomic state 0000000083b0a7cf Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969111] [drm:drm_atomic_state_init] Allocated atomic state 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969128] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 1A] 00000000685d8341 state to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969139] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane 2A] 000000004db84b0f state to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969143] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000004db84b0f to [NOCRTC] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969147] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000004db84b0f Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969158] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 3A] 00000000ac4877a7 state to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969161] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000ac4877a7 to [NOCRTC] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969163] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000ac4877a7 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969173] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 4A] 000000006acc6adf state to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969176] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000006acc6adf to [NOCRTC] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969179] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000006acc6adf Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969188] [drm:drm_atomic_get_plane_state] Added [PLANE:40:cursor A] 000000004d67e973 state to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969191] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000004d67e973 to [NOCRTC] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969194] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000004d67e973 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969204] [drm:drm_atomic_get_plane_state] Added [PLANE:44:plane 1B] 00000000c62c6176 state to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969213] [drm:drm_atomic_get_plane_state] Added [PLANE:47:plane 2B] 00000000136d9b45 state to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969216] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000136d9b45 to [NOCRTC] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969219] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000136d9b45 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969228] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 3B] 0000000091a48dd2 state to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969230] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000091a48dd2 to [NOCRTC] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969233] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000091a48dd2 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969242] [drm:drm_atomic_get_plane_state] Added [PLANE:53:plane 4B] 00000000357672af state to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969245] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000357672af to [NOCRTC] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969248] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000357672af Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969259] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor B] 00000000c2632bf2 state to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969261] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000c2632bf2 to [NOCRTC] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969264] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000c2632bf2 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969274] [drm:drm_atomic_get_plane_state] Added [PLANE:60:plane 1C] 000000000b3a8aef state to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969283] [drm:drm_atomic_get_plane_state] Added [PLANE:63:plane 2C] 000000000660b730 state to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969286] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000000660b730 to [NOCRTC] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969289] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000000660b730 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969298] [drm:drm_atomic_get_plane_state] Added [PLANE:66:plane 3C] 000000009e375ea3 state to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969301] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000009e375ea3 to [NOCRTC] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969304] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000009e375ea3 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969313] [drm:drm_atomic_get_plane_state] Added [PLANE:69:plane 4C] 0000000089c0a25e state to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969316] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000089c0a25e to [NOCRTC] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969319] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000089c0a25e Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969327] [drm:drm_atomic_get_plane_state] Added [PLANE:72:cursor C] 00000000d6b6792a state to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969330] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000d6b6792a to [NOCRTC] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969333] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000d6b6792a Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969350] [drm:drm_atomic_get_crtc_state] Added [CRTC:43:pipe A] 0000000077960742 state to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969366] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 0000000077960742 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969370] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000685d8341 to [CRTC:43:pipe A] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969374] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 00000000685d8341 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969378] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969409] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:77:eDP-1] 000000005406978a state to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969413] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000005406978a to [CRTC:43:pipe A] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969426] [drm:drm_atomic_get_crtc_state] Added [CRTC:59:pipe B] 00000000163e7a8c state to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969437] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1200] for CRTC state 00000000163e7a8c Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969441] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000c62c6176 to [CRTC:59:pipe B] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969444] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 00000000c62c6176 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969448] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969461] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:84:DP-1] 00000000a1a55d13 state to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969473] [drm:drm_atomic_get_crtc_state] Added [CRTC:75:pipe C] 000000000f5a6246 state to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969477] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000a1a55d13 to [CRTC:59:pipe B] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969481] [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state 000000000f5a6246 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969492] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state 000000000f5a6246 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969495] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000000b3a8aef to [CRTC:75:pipe C] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969499] [drm:drm_atomic_set_fb_for_plane] Set [FB:132] for plane state 000000000b3a8aef Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969503] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969515] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:94:HDMI-A-2] 00000000edd02a9c state to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969519] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000edd02a9c to [CRTC:75:pipe C] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969522] [drm:drm_atomic_check_only] checking 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969531] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] mode changed Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969535] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] enable changed Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969539] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] active changed Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969542] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] mode changed Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969546] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] enable changed Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969549] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] active changed Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969593] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] mode changed Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969602] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:77:eDP-1] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969608] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:77:eDP-1] using [ENCODER:76:DDI A] on [CRTC:43:pipe A] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969613] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:84:DP-1] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969618] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:84:DP-1] keeps [ENCODER:83:DDI B], now on [CRTC:59:pipe B] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969622] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:94:HDMI-A-2] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969626] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:94:HDMI-A-2] using [ENCODER:93:DDI C] on [CRTC:75:pipe C] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969631] [drm:drm_atomic_helper_check_modeset] [CRTC:43:pipe A] needs all connectors, enable: y, active: y Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969635] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969642] [drm:drm_atomic_helper_check_modeset] [CRTC:59:pipe B] needs all connectors, enable: y, active: y Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969645] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969650] [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: y, active: y Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969658] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969671] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:43:pipe A] to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969781] [drm:intel_atomic_check [i915]] [CONNECTOR:77:eDP-1] checking for sink bpp constrains Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969875] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969891] [drm:drm_mode_debug_printmodeline] Modeline 80:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.969980] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 141000KHz Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.970067] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.970148] [drm:intel_dp_compute_config [i915]] DP link bw required 423000 available 540000 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.970230] [drm:intel_dp_compute_config [i915]] PSR disable by flag Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.970321] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.970406] [drm:intel_dump_pipe_config [i915]] [CRTC:43:pipe A][modeset] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.970490] [drm:intel_dump_pipe_config [i915]] output_types: EDP (0x100) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.970577] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.970664] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6571076, gmch_n: 8388608, link_m: 273794, link_n: 524288, tu: 64 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.970743] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.970823] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.970837] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.970915] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.970930] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.971013] [drm:intel_dump_pipe_config [i915]] crtc timings: 141000 1920 1936 1952 2104 1080 1083 1097 1116, type: 0x48 flags: 0xa Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.971093] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 141000 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.971174] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.971255] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.971338] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.971424] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x6200, ebb4: 0x2000,pll0: 0x21, pll1: 0x100, pll2: 0x1a6666, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.971505] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.971585] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.971665] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2A] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.971742] [drm:intel_dump_pipe_config [i915]] [PLANE:34:plane 3A] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.971818] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 4A] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.971900] [drm:intel_dump_pipe_config [i915]] [PLANE:40:cursor A] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.971912] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:59:pipe B] to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.971996] [drm:intel_atomic_check [i915]] [CONNECTOR:84:DP-1] checking for sink bpp constrains Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.972076] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.972161] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 154000KHz Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.972246] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.972330] [drm:intel_dp_compute_config [i915]] DP link bw required 462000 available 648000 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.972411] [drm:intel_dp_compute_config [i915]] PSR disable by flag Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.972491] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.972574] [drm:intel_dump_pipe_config [i915]] [CRTC:59:pipe B][modeset] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.972657] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.972736] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 24, dithering: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.972817] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5980766, gmch_n: 8388608, link_m: 249198, link_n: 262144, tu: 64 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.972897] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.972979] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.972989] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.973069] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.973080] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.973160] [drm:intel_dump_pipe_config [i915]] crtc timings: 154000 1920 1968 2000 2080 1200 1203 1209 1235, type: 0x48 flags: 0x9 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.973239] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1200, pixel rate 154000 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.973322] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.973400] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.973474] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.973560] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x6200, ebb4: 0x2000,pll0: 0x21, pll1: 0x100, pll2: 0x1a6666, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.973665] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.973738] [drm:intel_dump_pipe_config [i915]] [PLANE:44:plane 1B] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.973806] [drm:intel_dump_pipe_config [i915]] [PLANE:47:plane 2B] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.973874] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 3B] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.973944] [drm:intel_dump_pipe_config [i915]] [PLANE:53:plane 4B] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.974011] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor B] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.974018] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.974088] [drm:intel_atomic_check [i915]] [CONNECTOR:94:HDMI-A-2] checking for sink bpp constrains Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.974184] [drm:intel_hdmi_compute_config [i915]] picking bpc to 12 for HDMI output Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.974258] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 36 for HDMI Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.974328] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 36, dithering: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.974400] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C][modeset] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.974471] [drm:intel_dump_pipe_config [i915]] output_types: HDMI (0x40) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.974538] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 36, dithering: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.974605] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.974674] [drm:intel_dump_pipe_config [i915]] requested mode: Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.974683] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.974750] [drm:intel_dump_pipe_config [i915]] adjusted mode: Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.974756] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x48 0x5 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.974824] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1082 1087 1125, type: 0x48 flags: 0x5 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.974891] [drm:intel_dump_pipe_config [i915]] port clock: 222750, pipe src size: 1920x1080, pixel rate 148500 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.974960] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.975029] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.975096] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.975168] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8200, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x19999a, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.975238] [drm:intel_dump_pipe_config [i915]] planes on this crtc Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.975308] [drm:intel_dump_pipe_config [i915]] [PLANE:60:plane 1C] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.975375] [drm:intel_dump_pipe_config [i915]] [PLANE:63:plane 2C] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.975443] [drm:intel_dump_pipe_config [i915]] [PLANE:66:plane 3C] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.975511] [drm:intel_dump_pipe_config [i915]] [PLANE:69:plane 4C] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.975581] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor C] disabled, scaler_id = -1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.975655] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.975726] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 13, actual 13 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.975808] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:43:pipe A] has [PLANE:28:plane 1A] with fb 132 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.975880] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.975950] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:59:pipe B] has [PLANE:44:plane 1B] with fb 132 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.976018] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:44:plane 1B] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.976090] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:75:pipe C] has [PLANE:60:plane 1C] with fb 132 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.976160] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:60:plane 1C] visible 0 -> 1, off 0, on 1, ms 1 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.976233] [drm:bxt_get_dpll [i915]] [CRTC:43:pipe A] using pre-allocated PORT PLL A Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.976305] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe A Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.976378] [drm:bxt_get_dpll [i915]] [CRTC:59:pipe B] using pre-allocated PORT PLL B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.976448] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.976524] [drm:bxt_get_dpll [i915]] [CRTC:75:pipe C] using pre-allocated PORT PLL C Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.976590] [drm:intel_reference_shared_dpll [i915]] using PORT PLL C for pipe C Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.976676] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 0) -> (0 - 332) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.976742] [drm:skl_compute_wm [i915]] [PLANE:40:cursor A] ddb (0 - 0) -> (332 - 340) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.976807] [drm:skl_compute_wm [i915]] [PLANE:44:plane 1B] ddb (0 - 0) -> (340 - 672) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.976875] [drm:skl_compute_wm [i915]] [PLANE:56:cursor B] ddb (0 - 0) -> (672 - 680) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.976942] [drm:skl_compute_wm [i915]] [PLANE:60:plane 1C] ddb (0 - 0) -> (680 - 1012) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.977006] [drm:skl_compute_wm [i915]] [PLANE:72:cursor C] ddb (988 - 1020) -> (1012 - 1020) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.977010] [drm:drm_atomic_commit] committing 000000000738540d Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.977162] [drm:intel_power_well_enable [i915]] enabling dpio-common-c Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.977342] [drm:intel_disable_pipe [i915]] disabling pipe C Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.985662] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.985835] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.985869] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.985935] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 4, on? 1) for crtc 75 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.985992] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.986030] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.986092] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DDI A] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.986121] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.986157] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.986186] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.986215] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.986244] [drm:intel_atomic_commit_tail [i915]] [ENCODER:93:DDI C] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.986279] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.986313] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.986342] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.986394] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL C (active 4, on? 0) for crtc 75 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.986424] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL C Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.986544] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.986712] [drm:intel_enable_pipe [i915]] enabling pipe C Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.987225] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:94:HDMI-A-2], [ENCODER:93:DDI C] Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.987255] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe C, 36 bytes ELD Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.987291] [drm:audio_config_hdmi_pixel_clock [i915]] Configuring HDMI audio for pixel clock 148500 (0x00090000) Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.987321] [drm:hsw_audio_config_update [i915]] using automatic N Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 163.993598] atkbd serio0: Failed to enable keyboard on isa0060/serio0 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 164.004291] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 1, on? 0) for crtc 43 Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 164.004330] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 164.004466] [drm:edp_panel_on [i915]] Turn eDP port A panel power on Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 164.004500] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 164.004539] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 0000006a Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 164.004572] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 164.004604] [drm:edp_panel_on [i915]] Wait for panel power on Feb 19 21:52:48 GLK-2-GLKRVP1DDR405 kernel: [ 164.004637] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 0000000a control 0000006b Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.206955] [drm:wait_panel_status [i915]] Wait complete Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.207059] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.208263] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.208361] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.208457] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.209133] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.209226] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.210209] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.210305] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:77:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2 Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.210730] [drm:intel_enable_pipe [i915]] enabling pipe A Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.210855] [drm:intel_edp_backlight_on [i915]] Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.210952] [drm:intel_panel_enable_backlight [i915]] pipe A Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.211048] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 96000 Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.217671] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.217757] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1 Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.217834] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.217965] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 2, on? 0) for crtc 59 Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.218041] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.218234] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.218319] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.218534] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.219204] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.219426] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.219498] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.219720] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.219807] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0 Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.219881] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0 Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.219955] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1 Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.220028] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.220275] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.220447] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.220662] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.220734] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.220986] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.221061] [drm:intel_dp_start_link_train [i915]] clock recovery OK Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.221135] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2 Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.221208] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.221449] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.221921] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.222135] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.222208] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.222461] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.222540] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.222948] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4 Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.223022] [drm:intel_power_well_enable [i915]] enabling AUX B Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.223237] [drm:intel_power_well_disable [i915]] disabling AUX B Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.223463] [drm:intel_enable_pipe [i915]] enabling pipe B Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.223582] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.240508] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:77:eDP-1] Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.240611] [drm:intel_atomic_commit_tail [i915]] [CRTC:43:pipe A] Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.240737] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL A Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.240856] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:84:DP-1] Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.240946] [drm:intel_atomic_commit_tail [i915]] [CRTC:59:pipe B] Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.241056] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL B Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.241173] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:94:HDMI-A-2] Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.241267] [drm:intel_atomic_commit_tail [i915]] [CRTC:75:pipe C] Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.241374] [drm:verify_single_dpll_state.isra.115 [i915]] PORT PLL C Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.241427] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000000738540d Feb 19 21:52:49 GLK-2-GLKRVP1DDR405 kernel: [ 164.241504] [drm:__drm_atomic_state_free] Freeing atomic state 000000000738540d Feb 19 21:52:52 GLK-2-GLKRVP1DDR405 kernel: [ 167.237872] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off Feb 19 21:52:52 GLK-2-GLKRVP1DDR405 kernel: [ 167.237981] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000067 Feb 19 21:52:52 GLK-2-GLKRVP1DDR405 kernel: [ 167.238073] [drm:intel_power_well_disable [i915]] disabling AUX A Feb 19 21:52:52 GLK-2-GLKRVP1DDR405 kernel: [ 167.941753] r8169 0000:01:00.0 enp1s0: link up