From 7203eb5b2b9079cbfe7b88ab5e9bf1443ce87029 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Nicolai=20H=C3=A4hnle?= Date: Thu, 24 May 2018 13:57:38 +0200 Subject: [PATCH] radv: add RADV_DEBUG=ds128 option --- src/amd/common/ac_llvm_util.c | 5 +++-- src/amd/common/ac_llvm_util.h | 1 + src/amd/vulkan/radv_debug.h | 1 + src/amd/vulkan/radv_device.c | 1 + src/amd/vulkan/radv_shader.c | 2 ++ 5 files changed, 8 insertions(+), 2 deletions(-) diff --git a/src/amd/common/ac_llvm_util.c b/src/amd/common/ac_llvm_util.c index be2d92b4c08..3bb88ecd9f3 100644 --- a/src/amd/common/ac_llvm_util.c +++ b/src/amd/common/ac_llvm_util.c @@ -128,25 +128,26 @@ const char *ac_get_llvm_processor_name(enum radeon_family family) LLVMTargetMachineRef ac_create_target_machine(enum radeon_family family, enum ac_target_machine_options tm_options, const char **out_triple) { assert(family >= CHIP_TAHITI); char features[256]; const char *triple = (tm_options & AC_TM_SUPPORTS_SPILL) ? "amdgcn-mesa-mesa3d" : "amdgcn--"; LLVMTargetRef target = ac_get_llvm_target(triple); snprintf(features, sizeof(features), - "+DumpCode,+vgpr-spilling,-fp32-denormals,+fp64-denormals%s%s%s%s", + "+DumpCode,+vgpr-spilling,-fp32-denormals,+fp64-denormals%s%s%s%s%s", tm_options & AC_TM_SISCHED ? ",+si-scheduler" : "", tm_options & AC_TM_FORCE_ENABLE_XNACK ? ",+xnack" : "", tm_options & AC_TM_FORCE_DISABLE_XNACK ? ",-xnack" : "", - tm_options & AC_TM_PROMOTE_ALLOCA_TO_SCRATCH ? ",-promote-alloca" : ""); + tm_options & AC_TM_PROMOTE_ALLOCA_TO_SCRATCH ? ",-promote-alloca" : "", + tm_options & AC_TM_DS128 ? ",+enable-ds128" : ""); LLVMTargetMachineRef tm = LLVMCreateTargetMachine( target, triple, ac_get_llvm_processor_name(family), features, LLVMCodeGenLevelDefault, LLVMRelocDefault, LLVMCodeModelDefault); diff --git a/src/amd/common/ac_llvm_util.h b/src/amd/common/ac_llvm_util.h index 0aa803c5bc1..abfe7adff30 100644 --- a/src/amd/common/ac_llvm_util.h +++ b/src/amd/common/ac_llvm_util.h @@ -52,20 +52,21 @@ enum ac_func_attr { */ AC_FUNC_ATTR_LEGACY = (1u << 31), }; enum ac_target_machine_options { AC_TM_SUPPORTS_SPILL = (1 << 0), AC_TM_SISCHED = (1 << 1), AC_TM_FORCE_ENABLE_XNACK = (1 << 2), AC_TM_FORCE_DISABLE_XNACK = (1 << 3), AC_TM_PROMOTE_ALLOCA_TO_SCRATCH = (1 << 4), + AC_TM_DS128 = (1 << 5), }; enum ac_float_mode { AC_FLOAT_MODE_DEFAULT, AC_FLOAT_MODE_NO_SIGNED_ZEROS_FP_MATH, AC_FLOAT_MODE_UNSAFE_FP_MATH, }; const char *ac_get_llvm_processor_name(enum radeon_family family); LLVMTargetMachineRef ac_create_target_machine(enum radeon_family family, diff --git a/src/amd/vulkan/radv_debug.h b/src/amd/vulkan/radv_debug.h index b6993cee1c8..9035a8fac6d 100644 --- a/src/amd/vulkan/radv_debug.h +++ b/src/amd/vulkan/radv_debug.h @@ -39,20 +39,21 @@ enum { RADV_DEBUG_NO_IBS = 0x200, RADV_DEBUG_DUMP_SPIRV = 0x400, RADV_DEBUG_VM_FAULTS = 0x800, RADV_DEBUG_ZERO_VRAM = 0x1000, RADV_DEBUG_SYNC_SHADERS = 0x2000, RADV_DEBUG_NO_SISCHED = 0x4000, RADV_DEBUG_PREOPTIR = 0x8000, RADV_DEBUG_NO_DYNAMIC_BOUNDS = 0x10000, RADV_DEBUG_NO_OUT_OF_ORDER = 0x20000, RADV_DEBUG_INFO = 0x40000, + RADV_DEBUG_DS128 = 0x80000, }; enum { RADV_PERFTEST_NO_BATCHCHAIN = 0x1, RADV_PERFTEST_SISCHED = 0x2, RADV_PERFTEST_LOCAL_BOS = 0x4, RADV_PERFTEST_BINNING = 0x8, RADV_PERFTEST_OUT_OF_ORDER = 0x10, RADV_PERFTEST_DCC_MSAA = 0x20, }; diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 61b4fba23f8..cebed78c280 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -385,20 +385,21 @@ static const struct debug_control radv_debug_options[] = { {"noibs", RADV_DEBUG_NO_IBS}, {"spirv", RADV_DEBUG_DUMP_SPIRV}, {"vmfaults", RADV_DEBUG_VM_FAULTS}, {"zerovram", RADV_DEBUG_ZERO_VRAM}, {"syncshaders", RADV_DEBUG_SYNC_SHADERS}, {"nosisched", RADV_DEBUG_NO_SISCHED}, {"preoptir", RADV_DEBUG_PREOPTIR}, {"nodynamicbounds", RADV_DEBUG_NO_DYNAMIC_BOUNDS}, {"nooutoforder", RADV_DEBUG_NO_OUT_OF_ORDER}, {"info", RADV_DEBUG_INFO}, + {"ds128", RADV_DEBUG_DS128}, {NULL, 0} }; const char * radv_get_debug_option_name(int id) { assert(id < ARRAY_SIZE(radv_debug_options) - 1); return radv_debug_options[id].string; } diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index 84ad215ccb3..f8d8905dd7a 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -494,20 +494,22 @@ shader_variant_create(struct radv_device *device, options->dump_preoptir = options->dump_shader && device->instance->debug_flags & RADV_DEBUG_PREOPTIR; options->record_llvm_ir = device->keep_shader_info; options->tess_offchip_block_dw_size = device->tess_offchip_block_dw_size; options->address32_hi = device->physical_device->rad_info.address32_hi; if (options->supports_spill) tm_options |= AC_TM_SUPPORTS_SPILL; if (device->instance->perftest_flags & RADV_PERFTEST_SISCHED) tm_options |= AC_TM_SISCHED; + if (device->instance->debug_flags & RADV_DEBUG_DS128) + tm_options |= AC_TM_DS128; tm = ac_create_target_machine(chip_family, tm_options, NULL); if (gs_copy_shader) { assert(shader_count == 1); radv_compile_gs_copy_shader(tm, *shaders, &binary, &variant->config, &variant->info, options); } else { radv_compile_nir_shader(tm, &binary, &variant->config, &variant->info, shaders, shader_count, -- 2.14.1