From e6bc45dea45dc7df440db834ed53f7370ee214d1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michel=20D=C3=A4nzer?= Date: Thu, 14 Jun 2018 13:02:07 +0200 Subject: [PATCH 2/3] drm/amdgpu: Make amdgpu_vram_mgr_bo_sizes accurate in all cases MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Even BOs with AMDGPU_GEM_CREATE_NO_CPU_ACCESS may end up at least partially in CPU visible VRAM, in particular when all VRAM is visible. Signed-off-by: Michel Dänzer --- drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 27 +++++++++++++++----- 1 file changed, 21 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c index 09095233c62c..0fa8b4ab0063 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c @@ -110,13 +110,28 @@ static u64 amdgpu_vram_mgr_vis_size(struct amdgpu_device *adev, void amdgpu_vram_mgr_bo_sizes(struct amdgpu_bo *bo, u64 *visible, u64 *invisible) { - if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS) { - *visible = 0; - *invisible = amdgpu_bo_size(bo); - } else { - *visible = amdgpu_bo_size(bo); - *invisible = 0; + struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); + struct amdgpu_vram_mgr *mgr = adev->mman.bdev.man[TTM_PL_VRAM].priv; + struct ttm_mem_reg *mem = &bo->tbo.mem; + struct drm_mm_node *nodes = mem->mm_node; + uint64_t usage = 0, vis_usage = 0; + unsigned pages = mem->num_pages; + + if (!mem->mm_node) + goto out; + + spin_lock(&mgr->lock); + while (pages) { + pages -= nodes->size; + usage += nodes->size << PAGE_SHIFT; + vis_usage += amdgpu_vram_mgr_vis_size(adev, nodes); + ++nodes; } + spin_unlock(&mgr->lock); + + out: + *visible = vis_usage; + *invisible = usage - vis_usage; } /** -- 2.17.1