Index: programs/Xserver/hw/xfree86/os-support/bus/460gxPCI.c
===================================================================
RCS file: /work/eich/freedesktop/cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/bus/460gxPCI.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- programs/Xserver/hw/xfree86/os-support/bus/460gxPCI.c	14 Nov 2003 16:48:56 -0000	1.1
+++ programs/Xserver/hw/xfree86/os-support/bus/460gxPCI.c	15 Sep 2004 09:23:58 -0000	1.2
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/460gxPCI.c,v 1.2 2003/01/10 22:05:45 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/460gxPCI.c,v 1.4 2003/08/29 21:08:06 tsi Exp $ */
 /*
  * Copyright (C) 2002-2003 The XFree86 Project, Inc.  All Rights Reserved.
  *
@@ -122,7 +122,7 @@
  * host bridges.
  */
 static void
-Get460GXBridgeBusses(int bus, int *primary, int *secondary, int *subordinate)
+Get460GXBridgeBuses(int bus, int *primary, int *secondary, int *subordinate)
 {
     pciConfigPtr pPCI = Verify460GXBus(bus);
     int i;
@@ -201,32 +201,46 @@
  * the chipset scan is to be stopped, or FALSE if the scan is to move on to the
  * next chipset.
  */
+
 Bool
-xf86PreScan460GX(void)
+xorgProbe460GX(scanpciWrapperOpt flags)
 {
     pciBusInfo_t *pBusInfo;
     PCITAG tag;
-    CARD32 tmp;
-    int i, devno;
 
     /* Bus zero should already be set up */
     if (!(pBusInfo = pciBusInfo[0])) {
 	cbn_460gx = -1;
 	return FALSE;
     }
-
     /* First look for a 460GX's primary host bridge */
     tag = PCI_MAKE_TAG(0, 0x10, 0);
-    if (pciReadLong(tag, PCI_ID_REG) != DEVID(INTEL, 460GX_SAC)) {
-	cbn_460gx = -1;
-	return FALSE;
+    if (pciReadLong(tag, PCI_ID_REG) == DEVID(VENDOR_INTEL, CHIP_460GX_SAC)) {
+	return TRUE;
     }
 
+    cbn_460gx = -1;
+    
+    return FALSE;
+}
+
+void
+xf86PreScan460GX(void)
+{
+    pciBusInfo_t *pBusInfo;
+    PCITAG tag;
+    CARD32 tmp;
+    int i, devno;
+    
+    if (!(pBusInfo = pciBusInfo[0]))
+	return;
+
     /* Get CBN (Chipset bus number) */
+    tag = PCI_MAKE_TAG(0, 0x10, 0);
     if (!(cbn_460gx = (unsigned int)pciReadByte(tag, CBN))) {
 	/* Sanity check failed */
 	cbn_460gx = -1;
-	return TRUE;
+	return;
     }
 
     if (pciNumBuses <= cbn_460gx)
@@ -239,10 +253,10 @@
     }
 
     tag = PCI_MAKE_TAG(cbn_460gx, 0, 0);
-    if (pciReadLong(tag, PCI_ID_REG) != DEVID(INTEL, 460GX_SAC)) {
+    if (pciReadLong(tag, PCI_ID_REG) != DEVID(VENDOR_INTEL, CHIP_460GX_SAC)) {
 	/* Sanity check failed */
 	cbn_460gx = -1;
-	return TRUE;
+	return;
     }
 
     /*
@@ -253,10 +267,11 @@
 
     for (i = 0, devno = 0x10;  devno <= 0x17;  i++, devno++) {
 	tag = PCI_MAKE_TAG(cbn_460gx, devno, 0);
-	if (pciReadLong(tag, PCI_ID_REG) != DEVID(INTEL, 460GX_SAC)) {
+	if (pciReadLong(tag, PCI_ID_REG) !=
+	    DEVID(VENDOR_INTEL, CHIP_460GX_SAC)) {
 	    /* Sanity check failed */
 	    cbn_460gx = -1;
-	    return TRUE;
+	    return;
 	}
 
 	if (devno == 0x10)
@@ -272,12 +287,12 @@
 	tag = PCI_MAKE_TAG(cbn_460gx, devno, 1);
 	tmp = pciReadLong(tag, PCI_ID_REG);
 	switch (tmp) {
-	case DEVID(INTEL, 460GX_PXB):
-	case DEVID(INTEL, 460GX_WXB):
+	case DEVID(VENDOR_INTEL, CHIP_460GX_PXB):
+	case DEVID(VENDOR_INTEL, CHIP_460GX_WXB):
 	    if (cbdevs_460gx & (1 << devno)) {
 		/* Sanity check failed */
 		cbn_460gx = -1;
-		return TRUE;
+		return;
 	    }
 
 	    /*
@@ -289,11 +304,11 @@
 	    has_err_460gx[i] = 1;
 	    break;
 
-	case DEVID(INTEL, 460GX_GXB_1):
+	case DEVID(VENDOR_INTEL, CHIP_460GX_GXB_1):
 	    if (cbdevs_460gx & (1 << devno)) {
 		/* Sanity check failed */
 		cbn_460gx = -1;
-		return TRUE;
+		return;
 	    }
 
 	    /*
@@ -309,7 +324,7 @@
 		break;
 	    /* Sanity check failed */
 	    cbn_460gx = -1;
-	    return TRUE;
+	    return;
 	}
     }
 
@@ -323,7 +338,7 @@
     }
 
     /*
-     * The 460GX spec says that any access to busses higher than CBN will be
+     * The 460GX spec says that any access to buses higher than CBN will be
      * master-aborted.  It seems possible however that this is not the case in
      * all 460GX implementations.  For now, limit the bus scan to CBN, unless
      * we have already found a higher bus number.
@@ -336,7 +351,7 @@
 	break;
     }
 
-    return TRUE;
+    return;
 }
 
 /* This does some 460GX-related processing after the PCI bus scan */
@@ -353,7 +368,7 @@
     /* Set up our extra bus functions */
     BusFuncs_460gx = *(pciBusInfo[0]->funcs);
     BusFuncs_460gx.pciControlBridge = Control460GXBridge;
-    BusFuncs_460gx.pciGetBridgeBusses = Get460GXBridgeBusses;
+    BusFuncs_460gx.pciGetBridgeBuses = Get460GXBridgeBuses;
     BusFuncs_460gx.pciGetBridgeResources = Get460GXBridgeResources;
 
     /*
Index: programs/Xserver/hw/xfree86/os-support/bus/460gxPCI.h
===================================================================
RCS file: /work/eich/freedesktop/cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/bus/460gxPCI.h,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- programs/Xserver/hw/xfree86/os-support/bus/460gxPCI.h	14 Nov 2003 16:48:56 -0000	1.1
+++ programs/Xserver/hw/xfree86/os-support/bus/460gxPCI.h	15 Sep 2004 09:23:58 -0000	1.2
@@ -29,8 +29,10 @@
 #define PCI_460GX_H 1
 
 #include <X11/Xdefs.h>
+#include <Pci.h>
 
-Bool xf86PreScan460GX(void);
+Bool xorgProbe460GX(scanpciWrapperOpt flags);
+void xf86PreScan460GX(void);
 void xf86PostScan460GX(void);
 
 #endif
Index: programs/Xserver/hw/xfree86/os-support/bus/Imakefile
===================================================================
RCS file: /work/eich/freedesktop/cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/bus/Imakefile,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -r1.4 -r1.5
--- programs/Xserver/hw/xfree86/os-support/bus/Imakefile	11 Aug 2004 21:14:17 -0000	1.4
+++ programs/Xserver/hw/xfree86/os-support/bus/Imakefile	15 Sep 2004 09:23:58 -0000	1.5
@@ -126,8 +126,8 @@
 PCIARCHOBJ = sparcPci.o
 # endif
 #elif defined(ia64Architecture)
-PCIARCHSRC = ia64Pci.c 460gxPCI.c e8870PCI.c zx1PCI.c
-PCIARCHOBJ = ia64Pci.o 460gxPCI.o e8870PCI.o zx1PCI.o
+PCIARCHSRC = 460gxPCI.c e8870PCI.c zx1PCI.c
+PCIARCHOBJ = 460gxPCI.o e8870PCI.o zx1PCI.o
 #endif
 
 SRCS = Pci.c $(PCIDRVRSRC) $(SBUSDRVSRC) $(PCIARCHSRC)
Index: programs/Xserver/hw/xfree86/os-support/bus/e8870PCI.c
===================================================================
RCS file: /work/eich/freedesktop/cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/bus/e8870PCI.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- programs/Xserver/hw/xfree86/os-support/bus/e8870PCI.c	14 Nov 2003 16:48:56 -0000	1.1
+++ programs/Xserver/hw/xfree86/os-support/bus/e8870PCI.c	15 Sep 2004 09:23:58 -0000	1.2
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/e8870PCI.c,v 1.1 2003/02/23 20:26:49 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/e8870PCI.c,v 1.2 2003/07/17 15:08:22 tsi Exp $ */
 /*
  * Copyright (C) 2002-2003 The XFree86 Project, Inc.  All Rights Reserved.
  *
@@ -34,17 +34,23 @@
 #include "Pci.h"
 
 Bool
-xf86PreScanE8870(void)
+xorgProbeE8870(scanpciWrapperOpt flags)
 {
     PCITAG tag;
 
     /* Look for an E8870's Hub interface */
     tag = PCI_MAKE_TAG(0, 0x1E, 0);
-    if (pciReadLong(tag, PCI_ID_REG) != DEVID(INTEL, 82801_P2P))
-	return FALSE;
+    if (pciReadLong(tag, PCI_ID_REG) == DEVID(VENDOR_INTEL, CHIP_82801_P2P))
+	return TRUE;
+
+    return FALSE;
+}
 
+void
+xf86PreScanE8870(void)
+{
     /* XXX Fill me in... */
-    return TRUE;
+    return;
 }
 
 void
Index: programs/Xserver/hw/xfree86/os-support/bus/e8870PCI.h
===================================================================
RCS file: /work/eich/freedesktop/cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/bus/e8870PCI.h,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- programs/Xserver/hw/xfree86/os-support/bus/e8870PCI.h	14 Nov 2003 16:48:56 -0000	1.1
+++ programs/Xserver/hw/xfree86/os-support/bus/e8870PCI.h	15 Sep 2004 09:23:58 -0000	1.2
@@ -29,8 +29,10 @@
 #define PCI_E8870_H 1
 
 #include <X11/Xdefs.h>
+#include <Pci.h>
 
-Bool xf86PreScanE8870(void);
+Bool xorgProbeE8870(scanpciWrapperOpt flags);
+void xf86PreScanE8870(void);
 void xf86PostScanE8870(void);
 
 #endif
Index: programs/Xserver/hw/xfree86/os-support/bus/ia64Pci.c
===================================================================
RCS file: programs/Xserver/hw/xfree86/os-support/bus/ia64Pci.c
diff -N programs/Xserver/hw/xfree86/os-support/bus/ia64Pci.c
--- programs/Xserver/hw/xfree86/os-support/bus/ia64Pci.c	6 Jul 2004 14:49:13 -0000	1.2
+++ /dev/null	1 Jan 1970 00:00:00 -0000
@@ -1,61 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/ia64Pci.c,v 1.3 2003/02/23 20:26:49 tsi Exp $ */
-/*
- * Copyright (C) 2002-2003 The XFree86 Project, Inc.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation the
- * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
- * XFREE86 PROJECT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * Except as contained in this notice, the name of the XFree86 Project shall
- * not be used in advertising or otherwise to promote the sale, use or other
- * dealings in this Software without prior written authorization from the
- * XFree86 Project.
- */
-
-/*
- * This file contains the glue needed to support various IA-64 chipsets.
- */
-
-#include "460gxPCI.h"
-#include "e8870PCI.h"
-#include "zx1PCI.h"
-#include "Pci.h"
-
-void
-ia64ScanPCIWrapper(scanpciWrapperOpt flags)
-{
-
-    if (flags == SCANPCI_INIT) {
-
-	/* PCI configuration space probes should be done first */
-	if (xf86PreScan460GX())
-	    return;
-	if (xf86PreScanE8870())
-	    return;
-#if 0
-	if (xf86PreScanZX1())
-	    return;
-#endif
-    } else /* if (flags == SCANPCI_TERM) */ {
-
-	xf86PostScan460GX();
-	xf86PostScanE8870();
-#if 0
-	xf86PostScanZX1();
-#endif
-    }
-
-}
Index: programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.c
===================================================================
RCS file: /work/eich/freedesktop/cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.c	14 Nov 2003 16:48:56 -0000	1.1
+++ programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.c	15 Sep 2004 09:23:59 -0000	1.2
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.c,v 1.1 2003/02/23 20:26:49 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.c,v 1.8 2004/01/16 15:39:38 tsi Exp $ */
 /*
  * Copyright (C) 2002-2003 The XFree86 Project, Inc.  All Rights Reserved.
  *
@@ -97,7 +97,10 @@
 #define LBA_PORT5_CNTRL		0x1228U
 #define LBA_PORT6_CNTRL		0x1230U
 #define LBA_PORT7_CNTRL		0x1238U
-#define LBA_HARD_FAIL		  0x40UL
+#define LBA_RESET_FUNCTION	  0x0000000001UL
+#define LBA_CLEAR_ERROR		  0x0000000010UL
+#define LBA_HARD_FAIL		  0x0000000040UL
+#define LBA_RESET_COMPLETE	  0x0100000000UL
 
 #define ROPE_PAGE_CONTROL	0x1418U
 
@@ -115,8 +118,11 @@
 #define IOA_SUBORDINATE_BUS	0x0059U
 
 #define IOA_CONTROL		0x0108U
-#define IOA_FORWARD_VGA		  0x08UL
-#define IOA_HARD_FAIL		  0x40UL
+#define IOA_RESET_FUNCTION	  0x0000000001UL
+#define IOA_FORWARD_VGA		  0x0000000008UL
+#define IOA_CLEAR_ERROR		  0x0000000010UL
+#define IOA_HARD_FAIL		  0x0000000040UL
+#define IOA_RESET_COMPLETE	  0x0100000000UL
 
 #define IOA_LMMIO_BASE		0x0200U
 #define IOA_LMMIO_MASK		0x0208U
@@ -132,12 +138,33 @@
 #define IOA_ELMMIO_MASK		0x0258U
 #define IOA_EIOS_BASE		0x0260U
 #define IOA_EIOS_MASK		0x0268U
-
+#define IOA_GLOBAL_MASK		0x0270U
 #define IOA_SLAVE_CONTROL	0x0278U
 #define IOA_VGA_PEER_ENABLE	  0x2000UL
 #define IOA_MSI_BASE		0x0280U
 #define IOA_MSI_MASK		0x0288U
 
+#define IOA_DMA_BASE		0x02B0U
+#define IOA_DMA_MASK		0x02B8U
+
+#define IOA_ERROR_CONFIG	0x0680U
+#define IOA_ERROR_PIOWRITE	  0x0001UL
+#define IOA_ERROR_PIOREAD	  0x0002UL
+#define IOA_ERROR_DMAWRITE	  0x0004UL
+#define IOA_ERROR_DMAREAD	  0x0008UL
+#define IOA_ERROR_CONFIG_MASTER	  0x0010UL
+#define IOA_ERROR_SMART		  0x0020UL
+#define IOA_ERROR_FATAL_SERR	  0x0040UL
+#define IOA_ERROR_ASSERT_SERR	  0x0080UL
+/*	?			  0x0100UL */
+#define IOA_ERROR_LOOPBACK	  0x0200UL
+#define IOA_ERROR_CONFIG_TARGET	  0x0400UL
+#define IOA_ERROR_IO_MASTER	  0x0800UL
+#define IOA_ERROR_IO_TARGET	  0x1000UL
+#define IOA_ERROR_MEM_MASTER	  0x2000UL
+#define IOA_ERROR_MEM_TARGET	  0x4000UL
+#define IOA_ERROR_HF_IO_FATAL	  0x8000UL
+
 #define RANGE_ENABLE		0x01UL		/* In various base registers */
 
 #define IO_MASK			((1UL << 16) - 1UL)
@@ -154,10 +181,15 @@
 static CARD8 *pZX1mio = NULL,
 	     *pZX1ioa = NULL;
 
-static INT8   zx1_ropemap[8];		/* One for each (potential) rope */
-static CARD64 zx1_lbacntl[8];		/*  "   "   "        "       "   */
+/* Per-rope data */
+static INT8   zx1_ropemap[8];
+static CARD32 zx1_pciids[8];
+static CARD64 zx1_lbacntl[8];
 static int    zx1_busno[8], zx1_subno[8];
 
+/* Array of Booleans for non-empty buses */
+static INT8   zx1_busnmpt[MAX_PCI_BUSES];
+
 static pciBusFuncs_t zx1BusFuncs;
 static int           zx1_fakebus = -1;
 static Bool          zx1_hasvga = FALSE;
@@ -290,7 +322,8 @@
 	 * SLAVE_CONTROL register.
 	 */
 	tmp1 = MIO_QUAD(VGA_ROUTE);
-	tmp2 = IOA_QUAD(ropenum, IOA_CONTROL);
+	tmp2 = IOA_QUAD(ropenum, IOA_CONTROL) &
+	    ~(IOA_RESET_FUNCTION | IOA_CLEAR_ERROR);
 	if ((tmp1 & VGA_ENABLE) && ((tmp1 & 0x07UL) == ropenum)) {
 	    current |= PCI_PCI_BRIDGE_VGA_EN;
 	    if ((mask & PCI_PCI_BRIDGE_VGA_EN) &&
@@ -313,8 +346,9 @@
 		    MIO_QUAD(VGA_ROUTE) = 0UL;
 		    tmp3 = IOA_QUAD(tmp1 & 0x07UL, IOA_CONTROL);
 		    if (tmp3 & IOA_FORWARD_VGA)
-			IOA_QUAD(tmp1 & 0x07UL, IOA_CONTROL) =
-			    tmp3 & ~IOA_FORWARD_VGA;
+			IOA_QUAD(tmp1 & 0x07UL, IOA_CONTROL) = tmp3 &
+			    ~(IOA_RESET_FUNCTION | IOA_FORWARD_VGA |
+			      IOA_CLEAR_ERROR);
 		}
 		if (!(tmp2 & IOA_FORWARD_VGA)) {
 		    tmp2 |= IOA_FORWARD_VGA;
@@ -326,7 +360,8 @@
 	}
 
 	/* Move on to master abort failure enablement */
-	tmp1 = MIO_QUAD((ropenum << 3) + LBA_PORT0_CNTRL);
+	tmp1 = MIO_QUAD((ropenum << 3) + LBA_PORT0_CNTRL) &
+	       ~(LBA_RESET_FUNCTION | LBA_CLEAR_ERROR);
 	if ((tmp1 & LBA_HARD_FAIL) || (tmp2 & IOA_HARD_FAIL)) {
 	    current |= PCI_PCI_BRIDGE_MASTER_ABORT_EN;
 	    if ((mask & PCI_PCI_BRIDGE_MASTER_ABORT_EN) &&
@@ -388,14 +423,15 @@
 static CARD32
 zx1FakeReadLong(PCITAG tag, int offset)
 {
-    FatalError("zx1FakeReadLong(0x%X, 0x%X) called\n", tag, offset);
+    FatalError("zx1FakeReadLong(0x%lX, 0x%X) called\n",
+	       (unsigned long)tag, offset);
 }
 
 static void
 zx1FakeWriteLong(PCITAG tag, int offset, CARD32 val)
 {
-    FatalError("zx1FakeWriteLong(0x%X, 0x%X, 0x%08X) called\n",
-	       tag, offset, val);
+    FatalError("zx1FakeWriteLong(0x%lX, 0x%X, 0x%08X) called\n",
+	       (unsigned long)tag, offset, val);
 }
 
 static void
@@ -429,25 +465,19 @@
     NULL,		/* bridge -- dynamically set */
 };
 
-/*
- * This checks for, and validates, the presence of the ZX1 chipset, and sets
- * pZX1mio to a non-NULL pointer accordingly.  This function is called before
- * the server's PCI bus scan and returns TRUE if the chipset scan is to be
- * stopped, or FALSE if the scan is to move on to the next chipset.
- */
-Bool
+void
 xf86PreScanZX1(void)
 {
     resRange range;
     unsigned long mapSize = xf86getpagesize();
     unsigned long tmp, base, ioaaddr;
-    unsigned long flagsd = 0, based = 0, lastd = 0, maskd = 0, routed = 0;
-    unsigned long flags0 = 0, base0 = 0, last0 = 0, mask0 = 0, route0 = 0;
-    unsigned long flags1 = 0, base1 = 0, last1 = 0, mask1 = 0, route1 = 0;
-    unsigned long flags2 = 0, base2 = 0, last2 = 0, mask2 = 0, route2 = 0;
-    unsigned long flags3 = 0, base3 = 0, last3 = 0, mask3 = 0, route3 = 0;
-    unsigned long flagsg = 0, baseg = 0, lastg = 0, maskg = 0, routeg = 0;
-    unsigned long flagsl = 0, basel = 0, lastl = 0;
+    unsigned long flagsd, based, lastd, maskd, routed;
+    unsigned long flags0, base0, last0, mask0, route0;
+    unsigned long flags1, base1, last1, mask1, route1;
+    unsigned long flags2, base2, last2, mask2, route2;
+    unsigned long flags3, base3, last3, mask3, route3;
+    unsigned long flagsg, baseg, lastg, maskg, routeg;
+    unsigned long flagsl, basel, lastl;
     int i, rope;
 
     /* Map mio registers (minimum 8k) */
@@ -455,14 +485,16 @@
 	mapSize = MIO_SIZE;
 
     if (!(pZX1mio = xf86MapVidMem(-1, VIDMEM_MMIO, MIO_BASE, mapSize)))
-	return FALSE;
+	return;
 
-    /* Look for ZX1's SBA and IOC */
-    if ((MIO_LONG(MIO_FUNCTION0 + PCI_ID_REG) != DEVID(HP, ZX1_SBA)) ||
-	(MIO_LONG(MIO_FUNCTION1 + PCI_ID_REG) != DEVID(HP, ZX1_IOC))) {
+    /* Look for ZX1's SBA and IOC */	/* XXX What about Dino? */
+    if ((MIO_LONG(MIO_FUNCTION0 + PCI_ID_REG) !=
+	 DEVID(VENDOR_HP, CHIP_ZX1_SBA)) ||
+	(MIO_LONG(MIO_FUNCTION1 + PCI_ID_REG) !=
+	 DEVID(VENDOR_HP, CHIP_ZX1_IOC))) {
 	xf86UnMapVidMem(-1, pZX1mio, mapSize);
 	pZX1mio = NULL;
-	return FALSE;
+	return;
     }
 
     /* Map rope configuration space */
@@ -472,7 +504,7 @@
 	!(pZX1ioa = xf86MapVidMem(-1, VIDMEM_MMIO, ioaaddr, IOA_SIZE))) {
 	xf86UnMapVidMem(-1, pZX1mio, mapSize);
 	pZX1mio = NULL;
-	return TRUE;
+	return;
     }
 
     for (i = 0;  i < 8;  i++) {
@@ -513,16 +545,19 @@
 	if (zx1_ropemap[i] == i) {
 
 	    /* Prevent hard-fails */
-	    zx1_lbacntl[i] = MIO_QUAD((i << 3) + LBA_PORT0_CNTRL);
+	    zx1_lbacntl[i] = MIO_QUAD((i << 3) + LBA_PORT0_CNTRL) &
+		~(LBA_RESET_FUNCTION | LBA_CLEAR_ERROR);
 	    if (zx1_lbacntl[i] & LBA_HARD_FAIL)
 		MIO_QUAD((i << 3) + LBA_PORT0_CNTRL) =
 		    zx1_lbacntl[i] & ~LBA_HARD_FAIL;
 
 	    /* Poke for an ioa */
-	    tmp = IOA_LONG(i, PCI_ID_REG);
-	    switch ((CARD32)tmp) {
-	    case DEVID(HP, ELROY):	/* Expected vendor/device id's */
-	    case DEVID(HP, ZX1_LBA):
+	    zx1_pciids[i] = IOA_LONG(i, PCI_ID_REG);
+	    switch (zx1_pciids[i]) {
+	    case DEVID(VENDOR_HP, CHIP_ELROY):
+	    case DEVID(VENDOR_HP, CHIP_ZX1_LBA):	/* Mercury */
+	    case DEVID(VENDOR_HP, CHIP_ZX1_AGP8):	/* QuickSilver */
+		/* Expected vendor/device IDs */
 		zx1_busno[i] =
 		    (unsigned int)IOA_BYTE(i, IOA_SECONDARY_BUS);
 		zx1_subno[i] =
@@ -530,10 +565,10 @@
 		break;
 
 	    default:
-		if ((CARD16)(tmp + 1U) > (CARD16)1U)
+		if ((CARD16)(zx1_pciids[i] + 1U) > (CARD16)1U)
 		    xf86MsgVerb(X_NOTICE, 0,
 			"HP ZX1:  Unexpected vendor/device id 0x%08X"
-			" on rope %d\n", (CARD32)tmp, i);
+			" on rope %d\n", zx1_pciids[i], i);
 		/* Nobody home, or not the "right" kind of rope guest */
 
 		/*
@@ -580,6 +615,14 @@
      * ones.
      */
 
+    flagsd = 0; based = 0; lastd = 0; maskd = 0; routed = 0;
+    flags0 = 0; base0 = 0; last0 = 0; mask0 = 0; route0 = 0;
+    flags1 = 0; base1 = 0; last1 = 0; mask1 = 0; route1 = 0;
+    flags2 = 0; base2 = 0; last2 = 0; mask2 = 0; route2 = 0;
+    flags3 = 0; base3 = 0; last3 = 0; mask3 = 0; route3 = 0;
+    flagsg = 0; baseg = 0; lastg = 0; maskg = 0; routeg = 0;
+    flagsl = 0; basel = 0; lastl = 0;
+
     if ((tmp = MIO_QUAD(IOS_DIST_BASE)) & RANGE_ENABLE) {
 	flagsd = RANGE_ENABLE;
 	maskd = MIO_QUAD(IOS_DIST_MASK);
@@ -875,7 +918,7 @@
 
     nRange = 0;
 
-    return TRUE;
+    return;
 }
 
 /* This is called to finalise the results of a PCI bus scan */
@@ -889,6 +932,9 @@
     if (!pZX1mio)
 	return;
 
+    (void)memset(zx1_busnmpt, FALSE, sizeof(zx1_busnmpt));
+    pBusInfo = pciBusInfo[0];
+
     /*
      * Certain 2.4 & 2.5 Linux kernels add fake PCI devices.  Remove them to
      * prevent any possible interference with our PCI validation.
@@ -900,9 +946,11 @@
     ppPCI = ppPCI2 = xf86scanpci(0);	/* Recursion is only apparent */
     while ((pPCI = *ppPCI2++)) {
 	switch (pPCI->pci_device_vendor) {
-	case DEVID(HP, ZX1_SBA):
-	case DEVID(HP, ZX1_IOC):
-	case DEVID(HP, ZX1_LBA):
+	case DEVID(VENDOR_HP, CHIP_ELROY):
+	case DEVID(VENDOR_HP, CHIP_ZX1_SBA):	/* Pluto function 0 */
+	case DEVID(VENDOR_HP, CHIP_ZX1_IOC):	/* Pluto function 1 */
+	case DEVID(VENDOR_HP, CHIP_ZX1_LBA):	/* Mercury */
+	case DEVID(VENDOR_HP, CHIP_ZX1_AGP8):	/* QuickSilver */
 	    xfree(pPCI);		/* Remove it */
 	    continue;
 
@@ -910,6 +958,8 @@
 	    *ppPCI++ = pPCI;
 	    idx++;
 
+	    zx1_busnmpt[pPCI->busnum] = TRUE;
+
 	    if (zx1_hasvga)
 		continue;
 
@@ -934,8 +984,8 @@
     }
 
     /*
-     * Restore hard-fail settings and figure out the actual subordinate bus
-     * numbers.
+     * Restore hard-fail settings and figure out the actual secondary and
+     * subordinate bus numbers.
      */
     for (i = 0;  i < 8;  i++) {
 	if (zx1_ropemap[i] != i)
@@ -949,6 +999,14 @@
 
 	if (zx1_fakebus <= zx1_subno[i])
 	    zx1_fakebus = zx1_subno[i] + 1;
+
+	while (!zx1_busnmpt[zx1_busno[i]]) {
+	    if (zx1_busno[i])	/* Info for bus zero is in static storage */
+		xfree(pciBusInfo[zx1_busno[i]]);
+	    pciBusInfo[zx1_busno[i]++] = NULL;
+	    if (zx1_busno[i] > zx1_subno[i])
+		break;
+	}
     }
 
     if (zx1_fakebus >= pciNumBuses) {
@@ -958,13 +1016,13 @@
     }
 
     /* Set up our extra bus functions */
-    zx1BusFuncs = *(pciBusInfo[0]->funcs);
+    zx1BusFuncs = *(pBusInfo->funcs);
     zx1BusFuncs.pciControlBridge = ControlZX1Bridge;
     zx1BusFuncs.pciGetBridgeResources = GetZX1BridgeResources;
 
     /* Set up our own fake bus to act as the root segment */
-    zx1FakeBus.configMech = pciBusInfo[0]->configMech;
-    zx1FakeBus.numDevices = pciBusInfo[0]->numDevices;
+    zx1FakeBus.configMech = pBusInfo->configMech;
+    zx1FakeBus.numDevices = pBusInfo->numDevices;
     zx1FakeBus.primary_bus = zx1_fakebus;
     pciBusInfo[zx1_fakebus] = &zx1FakeBus;
 
@@ -975,7 +1033,7 @@
     pPCI->tag = PCI_MAKE_TAG(zx1_fakebus, 0, 0);
     pPCI->busnum = zx1_fakebus;
  /* pPCI->devnum = pPCI->funcnum = 0; */
-    pPCI->pci_device_vendor = DEVID(HP, ZX1_SBA);
+    pPCI->pci_device_vendor = DEVID(VENDOR_HP, CHIP_ZX1_SBA);
     pPCI->pci_base_class = PCI_CLASS_BRIDGE;
  /* pPCI->pci_sub_class = PCI_SUBCLASS_BRIDGE_HOST; */
     pPCI->fakeDevice = TRUE;
@@ -999,7 +1057,8 @@
 
     /* Add a fake PCI-to-PCI bridge to represent each active rope */
     for (i = 0;  i < 8;  i++) {
-	if ((zx1_ropemap[i] != i) || !(pBusInfo = pciBusInfo[zx1_busno[i]]))
+	if ((zx1_ropemap[i] != i) || (zx1_busno[i] > zx1_subno[i]) ||
+	    !(pBusInfo = pciBusInfo[zx1_busno[i]]))
 	    continue;
 
 	if (++idx >= MAX_PCI_DEVICES)
@@ -1009,7 +1068,7 @@
 	pPCI->devnum = i | 0x10;
      /* pPCI->funcnum = 0; */
 	pPCI->tag = PCI_MAKE_TAG(zx1_fakebus, pPCI->devnum, 0);
-	pPCI->pci_device_vendor = DEVID(HP, ZX1_LBA);
+	pPCI->pci_device_vendor = zx1_pciids[i];
 	pPCI->pci_base_class = PCI_CLASS_BRIDGE;
 	pPCI->pci_sub_class = PCI_SUBCLASS_BRIDGE_PCI;
 	pPCI->pci_header_type = 1;
@@ -1024,6 +1083,9 @@
 
 	/* Plug in chipset routines */
 	pBusInfo->funcs = &zx1BusFuncs;
+
+	/* Set bridge control register for scanpci utility */
+	pPCI->pci_bridge_control = ControlZX1Bridge(zx1_busno[i], 0, 0);
 
 #ifdef OLD_FORMAT
 	xf86MsgVerb(X_INFO, 2, "PCI: BusID 0x%.2x,0x%02x,0x%1x "
Index: programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.h
===================================================================
RCS file: /work/eich/freedesktop/cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.h,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.h	14 Nov 2003 16:48:56 -0000	1.1
+++ programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.h	15 Sep 2004 09:23:59 -0000	1.2
@@ -30,7 +30,7 @@
 
 #include <X11/Xdefs.h>
 
-Bool xf86PreScanZX1(void);
+void xf86PreScanZX1(void);
 void xf86PostScanZX1(void);
 
 #endif
Index: programs/Xserver/hw/xfree86/os-support/linux/Imakefile
===================================================================
RCS file: /work/eich/freedesktop/cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/linux/Imakefile,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -r1.3 -r1.4
--- programs/Xserver/hw/xfree86/os-support/linux/Imakefile	16 Jun 2004 09:39:15 -0000	1.3
+++ programs/Xserver/hw/xfree86/os-support/linux/Imakefile	15 Sep 2004 09:23:59 -0000	1.4
@@ -38,27 +38,32 @@
 #endif
 
 #if defined(AlphaArchitecture)
-AXP_SRC=lnx_ev56.c xf86Axp.c lnx_axp.c
-AXP_OBJ=lnx_ev56.o xf86Axp.o lnx_axp.o
+PLATFORM_SRC=lnx_ev56.c xf86Axp.c lnx_axp.c
+PLATFORM_OBJ=lnx_ev56.o xf86Axp.o lnx_axp.o
+#endif
+#if defined (ia64Architecture)
+PLATFORM_SRC=ia64Pci.c lnx_ia64.c
+PLATFORM_OBJ=ia64Pci.o lnx_ia64.o
+PLATFORM_DEFINES=-DOS_PROBE_PCI_CHIPSET=lnxProbePciChipset
 #endif
 
 SRCS = lnx_init.c lnx_video.c lnx_io.c libc_wrapper.c bios_mmap.c \
        VTsw_usl.c std_kbdEv.c posix_tty.c $(MOUSESRC) \
        lnx_pci.c vidmem.c lnx_apm.c $(JOYSTICK_SRC) $(DRI_SRC) $(RES_SRCS) \
-       $(AXP_SRC) lnx_kmod.c lnx_agp.c $(KBDSRC) /*wcHelper.c*/
+       $(PLATFORM_SRC) lnx_kmod.c lnx_agp.c $(KBDSRC) /*wcHelper.c*/
 
 OBJS = lnx_init.o lnx_video.o lnx_io.o libc_wrapper.o bios_mmap.o \
        VTsw_usl.o std_kbdEv.o posix_tty.o $(MOUSEOBJ) \
        lnx_pci.o vidmem.o lnx_apm.o $(JOYSTICK_OBJ) $(DRI_OBJ) $(RES_OBJS) \
-       $(AXP_OBJ) lnx_kmod.o lnx_agp.o $(KBDOBJ) /*wcHelper.o*/
+       $(PLATFORM_OBJ) lnx_kmod.o lnx_agp.o $(KBDOBJ) /*wcHelper.o*/
 
 INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \
            -I$(XINCLUDESRC) -I$(EXTINCSRC) -I$(XF86OSSRC)/shared \
-	   -I$(DRMSRCDIR)/shared
+	   -I$(XF86OSSRC)/bus -I$(DRMSRCDIR)/shared
 
 RESDEFINES = -DUSESTDRES
 
-DEFINES = $(MTRRDEFINES) $(RESDEFINES) -DHAVE_SYSV_IPC
+DEFINES = $(MTRRDEFINES) $(RESDEFINES) $(PLATFORM_DEFINES) -DHAVE_SYSV_IPC
 
 #if defined(AlphaArchitecture)
 SpecialObjectRule(lnx_ev56.o, lnx_ev56.c, -mcpu=ev56)
@@ -113,6 +118,9 @@
 #endif
 #if defined(AlphaArchitecture)
 LinkSourceFile(xf86Axp.c,../shared)
+#endif
+#if defined(ia64Architecture)
+LinkSourceFile(ia64Pci.c,../shared)
 #endif
 DependTarget()
 
Index: programs/Xserver/hw/xfree86/os-support/linux/lnx_ia64.c
===================================================================
RCS file: programs/Xserver/hw/xfree86/os-support/linux/lnx_ia64.c
diff -N programs/Xserver/hw/xfree86/os-support/linux/lnx_ia64.c
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ programs/Xserver/hw/xfree86/os-support/linux/lnx_ia64.c	15 Sep 2004 09:23:59 -0000	1.1
@@ -0,0 +1,45 @@
+/*
+ * Copyright 2004, Egbert Eich
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * EGBERT EICH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CON-
+ * NECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Egbert Eich shall not
+ * be used in advertising or otherwise to promote the sale, use or other deal-
+ *ings in this Software without prior written authorization from Egbert Eich.
+ *
+ */
+
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <unistd.h>
+
+#include "ia64Pci.h"
+#include "Pci.h"
+
+#if defined OS_PROBE_PCI_CHIPSET
+IA64Chipset OS_PROBE_PCI_CHIPSET(scanpciWrapperOpt flags)
+{
+    struct stat unused;
+
+    if (!stat("/proc/bus/mckinley/zx1",&unused) 
+	|| !stat("/proc/bus/mckinley/zx2",&unused))
+	return ZX1_CHIPSET;
+
+    return NONE_CHIPSET;
+}
+#endif
Index: programs/Xserver/hw/xfree86/os-support/shared/ia64Pci.c
===================================================================
RCS file: programs/Xserver/hw/xfree86/os-support/shared/ia64Pci.c
diff -N programs/Xserver/hw/xfree86/os-support/shared/ia64Pci.c
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ programs/Xserver/hw/xfree86/os-support/shared/ia64Pci.c	15 Sep 2004 09:23:59 -0000	1.1
@@ -0,0 +1,81 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/ia64Pci.c,v 1.3 2003/02/23 20:26:49 tsi Exp $ */
+/*
+ * Copyright (C) 2002-2003 The XFree86 Project, Inc.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+ * XFREE86 PROJECT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of the XFree86 Project shall
+ * not be used in advertising or otherwise to promote the sale, use or other
+ * dealings in this Software without prior written authorization from the
+ * XFree86 Project.
+ */
+
+/*
+ * This file contains the glue needed to support various IA-64 chipsets.
+ */
+
+#include "460gxPCI.h"
+#include "e8870PCI.h"
+#include "zx1PCI.h"
+#include "Pci.h"
+#include "ia64Pci.h"
+
+void
+ia64ScanPCIWrapper(scanpciWrapperOpt flags)
+{
+    static IA64Chipset chipset = NONE_CHIPSET;
+    
+    if (flags == SCANPCI_INIT) {
+
+	/* PCI configuration space probes should be done first */
+	if (xorgProbe460GX(flags)) {
+	    chipset = I460GX_CHIPSET;
+	    xf86PreScan460GX();	
+	    return;
+	} else if (xorgProbeE8870(flags)) {
+	    chipset = E8870_CHIPSET;
+	    xf86PreScanE8870();
+	    return;
+	}
+#ifdef OS_PROBE_PCI_CHIPSET
+	chipset = OS_PROBE_PCI_CHIPSET(flags);
+	switch (chipset) {
+	    case ZX1_CHIPSET:
+		xf86PreScanZX1();
+		return;
+	    default:
+		return;
+	}
+#endif
+    } else /* if (flags == SCANPCI_TERM) */ {
+
+	switch (chipset) {
+	    case I460GX_CHIPSET:
+		xf86PostScan460GX();
+		return;
+	    case E8870_CHIPSET:
+		xf86PostScanE8870();
+		return;
+	    case ZX1_CHIPSET:
+		xf86PostScanZX1();
+		return;
+	    default:
+		return;
+	}
+    }
+}
Index: programs/Xserver/hw/xfree86/os-support/shared/ia64Pci.h
===================================================================
RCS file: programs/Xserver/hw/xfree86/os-support/shared/ia64Pci.h
diff -N programs/Xserver/hw/xfree86/os-support/shared/ia64Pci.h
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ programs/Xserver/hw/xfree86/os-support/shared/ia64Pci.h	15 Sep 2004 09:23:59 -0000	1.1
@@ -0,0 +1,41 @@
+/*
+ * Copyright 2004, Egbert Eich
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * EGBERT EICH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CON-
+ * NECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Egbert Eich shall not
+ * be used in advertising or otherwise to promote the sale, use or other deal-
+ *ings in this Software without prior written authorization from Egbert Eich.
+ *
+ */
+#ifndef _IA64_PCI_H
+# define _IA64_PCI_H
+
+#include "Pci.h"
+
+typedef enum {
+    NONE_CHIPSET,
+    I460GX_CHIPSET,
+    E8870_CHIPSET,
+    ZX1_CHIPSET
+} IA64Chipset;
+
+# ifdef OS_PROBE_PCI_CHIPSET
+extern IA64Chipset OS_PROBE_PCI_CHIPSET(scanpciWrapperOpt flags);
+# endif
+#endif