From 190408b957a80d8f58655bfffcfdf13a66199ece Mon Sep 17 00:00:00 2001
From: Chris Wilson <chris@chris-wilson.co.uk>
Date: Wed, 4 Jul 2018 08:45:48 +0100
Subject: [PATCH] nudge

---
 drivers/gpu/drm/i915/i915_drv.h      |  6 ++++-
 drivers/gpu/drm/i915/intel_display.c |  3 +++
 drivers/gpu/drm/i915/intel_pm.c      | 37 +++++++++++++++++++++++++---
 3 files changed, 42 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2cefe4c30f88..0e86f0115d45 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -783,7 +783,9 @@ struct intel_rps {
 	u8 down_threshold; /* Current %busy required to downclock */
 
 	int last_adj;
-	enum { LOW_POWER, BETWEEN, HIGH_POWER } power;
+	enum { LOW_POWER, BETWEEN, HIGH_POWER, AUTO_POWER } power;
+	unsigned int power_override;
+	struct mutex power_lock;
 
 	bool enabled;
 	atomic_t num_waiters;
@@ -3441,6 +3443,8 @@ extern void i915_redisable_vga_power_on(struct drm_i915_private *dev_priv);
 extern bool ironlake_set_drps(struct drm_i915_private *dev_priv, u8 val);
 extern void intel_init_pch_refclk(struct drm_i915_private *dev_priv);
 extern int intel_set_rps(struct drm_i915_private *dev_priv, u8 val);
+extern void intel_rps_set_power(struct drm_i915_private *dev_priv,
+				int new_power);
 extern bool intel_set_memory_cxsr(struct drm_i915_private *dev_priv,
 				  bool enable);
 
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 681e0710a467..c6b28cea7e19 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -13101,6 +13101,7 @@ intel_prepare_plane_fb(struct drm_plane *plane,
 	} else {
 		add_rps_boost_after_vblank(new_state->crtc, new_state->fence);
 	}
+	intel_rps_set_power(dev_priv, HIGH_POWER);
 
 	return 0;
 }
@@ -13120,6 +13121,8 @@ intel_cleanup_plane_fb(struct drm_plane *plane,
 {
 	struct drm_i915_private *dev_priv = to_i915(plane->dev);
 
+	intel_rps_set_power(dev_priv, AUTO_POWER);
+
 	/* Should only be called after a successful intel_prepare_plane_fb()! */
 	mutex_lock(&dev_priv->drm.struct_mutex);
 	intel_plane_unpin_fb(to_intel_plane_state(old_state));
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 53aaaa3e6886..afa908d425b9 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6264,15 +6264,16 @@ static u32 intel_rps_limits(struct drm_i915_private *dev_priv, u8 val)
 	return limits;
 }
 
+static void rps_set_power(struct drm_i915_private *dev_priv, int new_power);
+
 static void gen6_set_rps_thresholds(struct drm_i915_private *dev_priv, u8 val)
 {
 	struct intel_rps *rps = &dev_priv->gt_pm.rps;
 	int new_power;
-	u32 threshold_up = 0, threshold_down = 0; /* in % */
-	u32 ei_up = 0, ei_down = 0;
 
 	new_power = rps->power;
 	switch (rps->power) {
+	case AUTO_POWER:
 	case LOW_POWER:
 		if (val > rps->efficient_freq + 1 &&
 		    val > rps->cur_freq)
@@ -6299,6 +6300,22 @@ static void gen6_set_rps_thresholds(struct drm_i915_private *dev_priv, u8 val)
 		new_power = LOW_POWER;
 	if (val >= rps->max_freq_softlimit)
 		new_power = HIGH_POWER;
+
+	mutex_lock(&rps->power_lock);
+	if (!rps->power_override)
+		rps_set_power(dev_priv, new_power);
+	mutex_unlock(&rps->power_lock);
+	rps->last_adj = 0;
+}
+
+static void rps_set_power(struct drm_i915_private *dev_priv, int new_power)
+{
+	struct intel_rps *rps = &dev_priv->gt_pm.rps;
+	u32 threshold_up = 0, threshold_down = 0; /* in % */
+	u32 ei_up = 0, ei_down = 0;
+
+	lockdep_assert_held(&rps->power_lock);
+
 	if (new_power == rps->power)
 		return;
 
@@ -6365,7 +6382,20 @@ static void gen6_set_rps_thresholds(struct drm_i915_private *dev_priv, u8 val)
 	rps->power = new_power;
 	rps->up_threshold = threshold_up;
 	rps->down_threshold = threshold_down;
-	rps->last_adj = 0;
+}
+
+void intel_rps_set_power(struct drm_i915_private *dev_priv, int power)
+{
+	struct intel_rps *rps = &dev_priv->gt_pm.rps;
+
+	mutex_lock(&rps->power_lock);
+	if (power != AUTO_POWER) {
+		rps->power_override++;
+		rps_set_power(dev_priv, power);
+	} else {
+		rps->power_override--;
+	}
+	mutex_unlock(&rps->power_lock);
 }
 
 static u32 gen6_rps_pm_mask(struct drm_i915_private *dev_priv, u8 val)
@@ -9604,6 +9634,7 @@ int intel_freq_opcode(struct drm_i915_private *dev_priv, int val)
 void intel_pm_setup(struct drm_i915_private *dev_priv)
 {
 	mutex_init(&dev_priv->pcu_lock);
+	mutex_init(&dev_priv->gt_pm.rps.power_lock);
 
 	atomic_set(&dev_priv->gt_pm.rps.num_waiters, 0);
 
-- 
2.18.0