Command: ./heaven_x64 -project_name Heaven -data_path ../ -engine_config ../data/heaven_4.0.cfg -system_script heaven/unigine.cpp -sound_app openal -video_app opengl -video_multisample 0 -video_fullscreen 1 -video_mode -1 -video_height 2160 -video_width 3840 -extern_define ,RELEASE,LANGUAGE_EN,QUALITY_LOW,TESSELLATION_DISABLED -extern_plugin ,GPUMonitor Driver vendor: X.Org Device vendor: AMD Device name: Radeon RX 570 Series (POLARIS10, DRM 3.26.0, 4.18.13-300.fc29.x86_64, LLVM 8.0.0) pipe = 0x19bac30 time before (API call) = 146.564123s time after (driver done) = 146.598796s draw_info: {index_size = 2, has_user_indices = 0, mode = triangles, start = 0, count = 1416, start_instance = 0, instance_count = 1, drawid = 0, vertices_per_patch = 3, index_bias = 0, min_index = 0, max_index = 944, primitive_restart = 0, index.resource = 0x506b0f0, count_from_stream_output = NULL, indirect = NULL, } vertex_buffer 0: {stride = 16, is_user_buffer = 0, buffer_offset = 0, buffer.resource = 0x506ac90, } buffer.resource: {target = buffer, format = PIPE_FORMAT_R8_UNORM, width0 = 60416, height0 = 1, depth0 = 1, array_size = 1, last_level = 0, nr_samples = 0, nr_storage_samples = 0, usage = 3, bind = 16, flags = 0, } num vertex elements = 1 vertex_element 0: {src_offset = 0, instance_divisor = 0, vertex_buffer_index = 0, src_format = PIPE_FORMAT_R32G32B32A32_FLOAT, } num stream output targets = 0 begin shader: VERTEX shader_state: {tokens = " VERT PROPERTY NEXT_SHADER FRAG DCL IN[0] DCL OUT[0], POSITION DCL OUT[1], GENERIC[0] DCL OUT[2], GENERIC[1] DCL OUT[3], GENERIC[2] DCL OUT[4], GENERIC[3] DCL OUT[5], GENERIC[4] DCL CONST[0][0..22] DCL TEMP[0..51], LOCAL IMM[0] FLT32 { 1.0000, 0.0100, 0.0000, 0.9000} 0: MUL TEMP[0], CONST[0][1], IN[0].xxxx 1: MAD TEMP[1], CONST[0][2], IN[0].yyyy, TEMP[0] 2: MAD TEMP[2], CONST[0][3], IN[0].zzzz, TEMP[1] 3: ADD TEMP[3], TEMP[2], CONST[0][4] 4: MOV OUT[0], TEMP[3] 5: MUL TEMP[4].xyz, IN[0].xyzz, CONST[0][0].wwww 6: DP3 TEMP[5].x, TEMP[4].xyzz, TEMP[4].xyzz 7: SQRT TEMP[6].x, TEMP[5].xxxx 8: MUL TEMP[7], CONST[0][14], IN[0].xxxx 9: MAD TEMP[8], CONST[0][15], IN[0].yyyy, TEMP[7] 10: MAD TEMP[9], CONST[0][16], IN[0].zzzz, TEMP[8] 11: ADD TEMP[10].xyz, TEMP[9], CONST[0][17] 12: MAD OUT[1].xy, TEMP[10].xyyy, CONST[0][18].xyyy, CONST[0][18].zwww 13: MOV OUT[1].z, TEMP[10].zzzz 14: MUL TEMP[11].xyz, CONST[0][19].xyzz, CONST[0][21].xxxx 15: MOV TEMP[11].w, CONST[0][19].wwww 16: MOV OUT[2], TEMP[11] 17: MUL TEMP[12].xyz, CONST[0][20].xyzz, CONST[0][21].xxxx 18: MOV TEMP[12].w, CONST[0][20].wwww 19: MOV OUT[3], TEMP[12] 20: MOV TEMP[13].x, CONST[0][9].wwww 21: MOV TEMP[14].x, CONST[0][10].wwww 22: DP3 TEMP[15].x, TEMP[4].xyzz, CONST[0][5].xyzz 23: ADD TEMP[16].x, TEMP[15].xxxx, CONST[0][7].zzzz 24: MUL TEMP[17].xy, CONST[0][7].xyyy, TEMP[16].xxxx 25: MOV TEMP[18].x, |TEMP[17].xxxx| 26: FSLT TEMP[19].x, IMM[0].yyyy, TEMP[18].xxxx 27: UIF TEMP[19].xxxx 28: EX2 TEMP[20].x, -TEMP[17].xxxx 29: ADD TEMP[21].x, IMM[0].xxxx, -TEMP[20].xxxx 30: RCP TEMP[22].x, TEMP[17].xxxx 31: MUL TEMP[23].x, TEMP[21].xxxx, TEMP[22].xxxx 32: MUL TEMP[13].x, CONST[0][9].wwww, TEMP[23].xxxx 33: ENDIF 34: MOV TEMP[24].x, |TEMP[17].yyyy| 35: FSLT TEMP[25].x, IMM[0].yyyy, TEMP[24].xxxx 36: UIF TEMP[25].xxxx 37: EX2 TEMP[26].x, -TEMP[17].yyyy 38: ADD TEMP[27].x, IMM[0].xxxx, -TEMP[26].xxxx 39: RCP TEMP[28].x, TEMP[17].yyyy 40: MUL TEMP[29].x, TEMP[27].xxxx, TEMP[28].xxxx 41: MUL TEMP[14].x, CONST[0][10].wwww, TEMP[29].xxxx 42: ENDIF 43: POW TEMP[30].x, TEMP[6].xxxx, CONST[0][13].xxxx 44: MUL TEMP[31].xyz, CONST[0][9].xyzz, TEMP[13].xxxx 45: MAD TEMP[32].xyz, CONST[0][10].xyzz, TEMP[14].xxxx, TEMP[31].xyzz 46: MUL TEMP[33].xyz, -TEMP[32].xyzz, TEMP[30].xxxx 47: EX2 TEMP[34].x, TEMP[33].xxxx 48: EX2 TEMP[34].y, TEMP[33].yyyy 49: EX2 TEMP[34].z, TEMP[33].zzzz 50: DP3 TEMP[35].x, TEMP[4].xyzz, CONST[0][6].xyzz 51: RCP TEMP[36].x, TEMP[6].xxxx 52: MUL TEMP[37].x, TEMP[35].xxxx, TEMP[36].xxxx 53: MOV OUT[4].xyz, TEMP[34].xyzx 54: DP3 TEMP[38].x, TEMP[34].xyzz, CONST[0][22].xxxx 55: MOV_SAT TEMP[39].x, TEMP[38].xxxx 56: MOV OUT[4].w, TEMP[39].xxxx 57: MUL TEMP[40].x, CONST[0][8].zzzz, TEMP[37].xxxx 58: ADD TEMP[41].x, CONST[0][8].yyyy, -TEMP[40].xxxx 59: RSQ TEMP[42].x, TEMP[41].xxxx 60: MUL TEMP[43].x, CONST[0][8].xxxx, TEMP[42].xxxx 61: MUL TEMP[44].x, CONST[0][12].wwww, TEMP[30].xxxx 62: MIN TEMP[45].x, TEMP[43].xxxx, TEMP[44].xxxx 63: MUL TEMP[46].x, TEMP[37].xxxx, TEMP[37].xxxx 64: MAD TEMP[47].x, TEMP[46].xxxx, CONST[0][11].wwww, IMM[0].xxxx 65: MUL TEMP[48].xyz, CONST[0][11].xyzz, TEMP[47].xxxx 66: MAD TEMP[49].xyz, CONST[0][12].xyzz, TEMP[45].xxxx, TEMP[48].xyzz 67: ADD TEMP[50].xyz, IMM[0].xxxx, -TEMP[34].xyzz 68: MUL OUT[5].xyz, TEMP[49].xyzz, TEMP[50].xyzz 69: MOV OUT[5].w, IMM[0].zzzz 70: FSLT TEMP[51].x, IMM[0].wwww, TEMP[6].xxxx 71: UCMP OUT[0].z, TEMP[51].xxxx, TEMP[3].wwww, OUT[0] 72: END ", } constant_buffer 0: {buffer = NULL, buffer_offset = 0, buffer_size = 368, user_buffer = 0x25fa6f0, } end shader: VERTEX viewport_state 0: {scale = {960, 540, 0.5, }, translate = {960, 540, 0.5, }, } rasterizer_state: {flatshade = 0, light_twoside = 0, clamp_vertex_color = 0, clamp_fragment_color = 0, front_ccw = 0, cull_face = 0, fill_front = 0, fill_back = 0, offset_point = 0, offset_line = 0, offset_tri = 0, scissor = 0, poly_smooth = 0, poly_stipple_enable = 0, point_smooth = 0, sprite_coord_enable = 0, sprite_coord_mode = 1, point_quad_rasterization = 1, point_tri_clip = 0, point_size_per_vertex = 0, multisample = 0, line_smooth = 0, line_stipple_enable = 0, line_stipple_factor = 0, line_stipple_pattern = 65535, line_last_pixel = 0, flatshade_first = 0, half_pixel_center = 1, bottom_edge_rule = 0, rasterizer_discard = 0, depth_clip_near = 1, depth_clip_far = 1, clip_halfz = 0, clip_plane_enable = 0, line_width = 1, point_size = 1, offset_units = 0, offset_scale = 0, offset_clamp = 0, } begin shader: FRAGMENT shader_state: {tokens = " FRAG DCL IN[0], GENERIC[0], PERSPECTIVE DCL IN[1], GENERIC[1], PERSPECTIVE DCL IN[2], GENERIC[2], PERSPECTIVE DCL IN[3], GENERIC[3], PERSPECTIVE DCL IN[4], GENERIC[4], PERSPECTIVE DCL OUT[0], COLOR DCL SAMP[0] DCL SVIEW[0], 3D, FLOAT DCL TEMP[0..4], LOCAL 0: MOV TEMP[0].xyz, IN[0].xyzz 1: TEX TEMP[1].xy, TEMP[0], SAMP[0], 3D 2: LRP TEMP[2], TEMP[1].xxxx, IN[1], IN[2] 3: MOV TEMP[3].xyz, TEMP[2].xyzx 4: MUL TEMP[4].x, TEMP[2].wwww, TEMP[1].yyyy 5: MOV TEMP[3].w, TEMP[4].xxxx 6: MAD TEMP[3], TEMP[3], IN[3], IN[4] 7: MOV OUT[0], TEMP[3] 8: END ", } sampler_state 0: {wrap_s = repeat, wrap_t = repeat, wrap_r = clamp_to_edge, min_img_filter = linear, min_mip_filter = none, mag_img_filter = linear, compare_mode = 0, compare_func = never, normalized_coords = 1, max_anisotropy = 0, seamless_cube_map = 0, lod_bias = 0, min_lod = 0, max_lod = 1000, border_color.f = {0, 0, 0, 0, }, } sampler_state 1: {wrap_s = repeat, wrap_t = repeat, wrap_r = repeat, min_img_filter = linear, min_mip_filter = nearest, mag_img_filter = linear, compare_mode = 0, compare_func = never, normalized_coords = 1, max_anisotropy = 0, seamless_cube_map = 0, lod_bias = 0, min_lod = 0, max_lod = 1000, border_color.f = {0, 0, 0, 0, }, } sampler_state 2: {wrap_s = repeat, wrap_t = repeat, wrap_r = repeat, min_img_filter = linear, min_mip_filter = nearest, mag_img_filter = linear, compare_mode = 0, compare_func = never, normalized_coords = 1, max_anisotropy = 0, seamless_cube_map = 0, lod_bias = 0, min_lod = 0, max_lod = 1000, border_color.f = {0, 0, 0, 0, }, } sampler_state 3: {wrap_s = repeat, wrap_t = repeat, wrap_r = repeat, min_img_filter = linear, min_mip_filter = nearest, mag_img_filter = linear, compare_mode = 0, compare_func = never, normalized_coords = 1, max_anisotropy = 0, seamless_cube_map = 0, lod_bias = 0, min_lod = 0, max_lod = 1000, border_color.f = {0, 0, 0, 0, }, } sampler_state 4: {wrap_s = clamp_to_edge, wrap_t = clamp_to_edge, wrap_r = repeat, min_img_filter = nearest, min_mip_filter = none, mag_img_filter = nearest, compare_mode = 0, compare_func = never, normalized_coords = 1, max_anisotropy = 0, seamless_cube_map = 0, lod_bias = 0, min_lod = 0, max_lod = 1000, border_color.f = {0, 0, 0, 0, }, } sampler_state 5: {wrap_s = repeat, wrap_t = repeat, wrap_r = repeat, min_img_filter = linear, min_mip_filter = nearest, mag_img_filter = linear, compare_mode = 0, compare_func = never, normalized_coords = 1, max_anisotropy = 2, seamless_cube_map = 0, lod_bias = 0, min_lod = 0, max_lod = 1000, border_color.f = {0, 0, 0, 0, }, } sampler_state 6: {wrap_s = clamp_to_edge, wrap_t = clamp_to_edge, wrap_r = repeat, min_img_filter = linear, min_mip_filter = none, mag_img_filter = linear, compare_mode = 1, compare_func = less_equal, normalized_coords = 1, max_anisotropy = 0, seamless_cube_map = 0, lod_bias = 0, min_lod = 0, max_lod = 1000, border_color.f = {0, 0, 0, 0, }, } sampler_state 7: {wrap_s = repeat, wrap_t = repeat, wrap_r = repeat, min_img_filter = linear, min_mip_filter = nearest, mag_img_filter = linear, compare_mode = 0, compare_func = never, normalized_coords = 1, max_anisotropy = 0, seamless_cube_map = 0, lod_bias = 0, min_lod = 0, max_lod = 1000, border_color.f = {0, 0, 0, 0, }, } sampler_state 8: {wrap_s = repeat, wrap_t = repeat, wrap_r = repeat, min_img_filter = nearest, min_mip_filter = none, mag_img_filter = nearest, compare_mode = 0, compare_func = never, normalized_coords = 1, max_anisotropy = 0, seamless_cube_map = 0, lod_bias = 0, min_lod = 0, max_lod = 1000, border_color.f = {0, 0, 0, 0, }, } sampler_view 0: {target = 3d, format = PIPE_FORMAT_R8G8_UNORM, texture = 0x7eb8f60, u.tex.first_layer = 0, u.tex.last_layer = 0, u.tex.last_level = 0, u.tex.last_level = 0, swizzle_r = 0, swizzle_g = 1, swizzle_b = 4, swizzle_a = 5, } texture: {target = 3d, format = PIPE_FORMAT_R8G8_UNORM, width0 = 128, height0 = 128, depth0 = 16, array_size = 1, last_level = 0, nr_samples = 0, nr_storage_samples = 0, usage = 0, bind = 10, flags = 4, } end shader: FRAGMENT depth_stencil_alpha_state: {depth = {enabled = 0, }, stencil = {{enabled = 0, }, {enabled = 0, }, }, alpha = {enabled = 0, }, } stencil_ref: {ref_value = {0, 0, }, } blend_state: {dither = 1, alpha_to_coverage = 0, alpha_to_one = 0, logicop_enable = 0, independent_blend_enable = 0, rt = {{blend_enable = 1, rgb_func = add, rgb_src_factor = src_alpha, rgb_dst_factor = inv_src_alpha, alpha_func = add, alpha_src_factor = one, alpha_dst_factor = inv_src_alpha, colormask = 15, }, }, } blend_color: {color = {0, 0, 0, 0, }, } min_samples = 1 sample_mask = 0xffffffff framebuffer_state: {width = 1920, height = 1080, samples = 0, layers = 0, nr_cbufs = 1, cbufs = {0x7065af0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, }, zsbuf = NULL, } cbufs[0]: surface: {format = PIPE_FORMAT_R16G16B16A16_FLOAT, width = 1920, height = 1080, texture = 0x5055bc0, u.tex.level = 0, u.tex.first_layer = 0, u.tex.last_layer = 0, } resource: {target = 2d, format = PIPE_FORMAT_R16G16B16A16_FLOAT, width0 = 1920, height0 = 1080, depth0 = 1, array_size = 1, last_level = 0, nr_samples = 0, nr_storage_samples = 0, usage = 0, bind = 10, flags = 4, } ***************************************************************************** Context Log: ------------------ IB begin ------------------ c0044700 EVENT_WRITE_EOP: 00000528 VGT_EVENT_INITIATOR <- EVENT_TYPE = BOTTOM_OF_PIPE_TS EVENT_INDEX <- 5 TCL1_VOL_ACTION_ENA <- 0 TC_VOL_ACTION_ENA <- 0 TC_WB_ACTION_ENA <- 0 TCL1_ACTION_ENA <- 0 TC_ACTION_ENA <- 0 00001400 ADDRESS_LO <- 5120 (0x00001400) 23000001 ADDRESS_HI <- 0x23000001 DST_SEL <- 0 INT_SEL <- 3 DATA_SEL <- 1 00000000 DATA_LO <- 0 00000000 DATA_HI <- 0 c0044700 EVENT_WRITE_EOP: 00000528 VGT_EVENT_INITIATOR <- EVENT_TYPE = BOTTOM_OF_PIPE_TS EVENT_INDEX <- 5 TCL1_VOL_ACTION_ENA <- 0 TC_VOL_ACTION_ENA <- 0 TC_WB_ACTION_ENA <- 0 TCL1_ACTION_ENA <- 0 TC_ACTION_ENA <- 0 00107d34 ADDRESS_LO <- 0x00107d34 23000001 ADDRESS_HI <- 0x23000001 DST_SEL <- 0 INT_SEL <- 3 DATA_SEL <- 1 80000000 DATA_LO <- -0.0f (0x80000000) 00000000 DATA_HI <- 0 c0044700 EVENT_WRITE_EOP: 00000528 VGT_EVENT_INITIATOR <- EVENT_TYPE = BOTTOM_OF_PIPE_TS EVENT_INDEX <- 5 TCL1_VOL_ACTION_ENA <- 0 TC_VOL_ACTION_ENA <- 0 TC_WB_ACTION_ENA <- 0 TCL1_ACTION_ENA <- 0 TC_ACTION_ENA <- 0 00001400 ADDRESS_LO <- 5120 (0x00001400) 23000001 ADDRESS_HI <- 0x23000001 DST_SEL <- 0 INT_SEL <- 3 DATA_SEL <- 1 00000000 DATA_LO <- 0 00000000 DATA_HI <- 0 c0044700 EVENT_WRITE_EOP: 00000528 VGT_EVENT_INITIATOR <- EVENT_TYPE = BOTTOM_OF_PIPE_TS EVENT_INDEX <- 5 TCL1_VOL_ACTION_ENA <- 0 TC_VOL_ACTION_ENA <- 0 TC_WB_ACTION_ENA <- 0 TCL1_ACTION_ENA <- 0 TC_ACTION_ENA <- 0 00107d38 ADDRESS_LO <- 0x00107d38 23000001 ADDRESS_HI <- 0x23000001 DST_SEL <- 0 INT_SEL <- 3 DATA_SEL <- 1 80000000 DATA_LO <- -0.0f (0x80000000) 00000000 DATA_HI <- 0 c0033700 WRITE_DATA: 40100500 CONTROL <- ENGINE_SEL = PFP WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEM_ASYNC 00107d3c DST_ADDR_LO <- 0x00107d3c 00000001 DST_ADDR_HI <- 1 80000000 c00e6900 SET_CONTEXT_REG: 00000318 011f8060 CB_COLOR0_BASE <- 0x011f8060 0ff000ff CB_COLOR0_PITCH <- TILE_MAX = 255 (0xff) FMASK_TILE_MAX = 255 (0xff) 00008fff CB_COLOR0_SLICE <- TILE_MAX = 0x08fff 00000000 CB_COLOR0_VIEW <- SLICE_START = 0 SLICE_MAX = 0 10060730 CB_COLOR0_INFO <- ENDIAN = ENDIAN_NONE FORMAT = COLOR_16_16_16_16 LINEAR_GENERAL = 0 NUMBER_TYPE = NUMBER_FLOAT COMP_SWAP = SWAP_STD FAST_CLEAR = 0 COMPRESSION = 0 BLEND_CLAMP = 0 BLEND_BYPASS = 0 SIMPLE_FLOAT = 1 ROUND_MODE = 1 CMASK_IS_LINEAR = 0 BLEND_OPT_DONT_RD_DST = FORCE_OPT_AUTO BLEND_OPT_DISCARD_PIXEL = FORCE_OPT_AUTO FMASK_COMPRESSION_DISABLE = 0 FMASK_COMPRESS_1FRAG_ONLY = 0 DCC_ENABLE = 1 CMASK_ADDR_TYPE = 0 000001ce CB_COLOR0_ATTRIB <- TILE_MODE_INDEX = 14 (0xe) FMASK_TILE_MODE_INDEX = 14 (0xe) FMASK_BANK_HEIGHT = 0 NUM_SAMPLES = 0 NUM_FRAGMENTS = 0 FORCE_DST_ALPHA_1 = 0 00000208 CB_COLOR0_DCC_CONTROL <- OVERWRITE_COMBINER_DISABLE = 0 KEY_CLEAR_ENABLE = 0 MAX_UNCOMPRESSED_BLOCK_SIZE = MAX_BLOCK_SIZE_256B MIN_COMPRESSED_BLOCK_SIZE = MIN_BLOCK_SIZE_32B MAX_COMPRESSED_BLOCK_SIZE = 0 COLOR_TRANSFORM = 0 INDEPENDENT_64B_BLOCKS = 1 LOSSY_RGB_PRECISION = 0 LOSSY_ALPHA_PRECISION = 0 011f8000 CB_COLOR0_CMASK <- 0x011f8000 0000009f CB_COLOR0_CMASK_SLICE <- TILE_MAX = 159 (0x09f) 011f8060 CB_COLOR0_FMASK <- 0x011f8060 00008fff CB_COLOR0_FMASK_SLICE <- TILE_MAX = 0x08fff 00000000 CB_COLOR0_CLEAR_WORD0 <- 0 00000000 CB_COLOR0_CLEAR_WORD1 <- 0 0120a060 CB_COLOR0_DCC_BASE <- 0x0120a060 c0026900 SET_CONTEXT_REG: 00000010 00000000 DB_Z_INFO <- FORMAT = Z_INVALID NUM_SAMPLES = 0 TILE_SPLIT = ADDR_SURF_TILE_SPLIT_64B TILE_MODE_INDEX = 0 DECOMPRESS_ON_N_ZPLANES = 0 ALLOW_EXPCLEAR = 0 READ_SIZE = 0 TILE_SURFACE_ENABLE = 0 CLEAR_DISALLOWED = 0 ZRANGE_PRECISION = 0 00000000 DB_STENCIL_INFO <- FORMAT = STENCIL_INVALID TILE_SPLIT = ADDR_SURF_TILE_SPLIT_64B TILE_MODE_INDEX = 0 ALLOW_EXPCLEAR = 0 TILE_STENCIL_DISABLE = 0 CLEAR_DISALLOWED = 0 c0016900 SET_CONTEXT_REG: 00000082 04380780 PA_SC_WINDOW_SCISSOR_BR <- BR_X = 1920 (0x780) BR_Y = 1080 (0x438) c0017600 SET_SH_REG: 0000004e 00127d40 SPI_SHADER_USER_DATA_VS_2 <- 0x00127d40 c0027600 SET_SH_REG: 0000000e 00000000 SPI_SHADER_USER_DATA_PS_2 <- 0 002656c0 SPI_SHADER_USER_DATA_PS_3 <- 0x002656c0 c0017600 SET_SH_REG: 00000054 002658a0 SPI_SHADER_USER_DATA_VS_8 <- 0x002658a0 c0046900 SET_CONTEXT_REG: 000002fa 4172573b PA_CL_GB_VERT_CLIP_ADJ <- 0x4172573b 3f800000 PA_CL_GB_VERT_DISC_ADJ <- 1.0f (0x3f800000) 41088444 PA_CL_GB_HORZ_CLIP_ADJ <- 0x41088444 3f800000 PA_CL_GB_HORZ_DISC_ADJ <- 1.0f (0x3f800000) c0016900 SET_CONTEXT_REG: 0000008d 0021003c PA_SU_HARDWARE_SCREEN_OFFSET <- HW_SCREEN_OFFSET_X = 60 (0x3c) HW_SCREEN_OFFSET_Y = 33 (0x21) c0026900 SET_CONTEXT_REG: 00000094 80000000 PA_SC_VPORT_SCISSOR_0_TL <- TL_X = 0 TL_Y = 0 WINDOW_OFFSET_DISABLE = 1 04380780 PA_SC_VPORT_SCISSOR_0_BR <- BR_X = 1920 (0x780) BR_Y = 1080 (0x438) c0066900 SET_CONTEXT_REG: 0000010f 44700000 PA_CL_VPORT_XSCALE <- 960.0f (0x44700000) 44700000 PA_CL_VPORT_XOFFSET <- 960.0f (0x44700000) 44070000 PA_CL_VPORT_YSCALE <- 540.0f (0x44070000) 44070000 PA_CL_VPORT_YOFFSET <- 540.0f (0x44070000) 3f000000 PA_CL_VPORT_ZSCALE <- 0.5f (0x3f000000) 3f000000 PA_CL_VPORT_ZOFFSET <- 0.5f (0x3f000000) c0026900 SET_CONTEXT_REG: 000000b4 00000000 PA_SC_VPORT_ZMIN_0 <- 0 3f800000 PA_SC_VPORT_ZMAX_0 <- 1.0f (0x3f800000) c0016900 SET_CONTEXT_REG: 000001b5 0000486b SPI_INTERP_CONTROL_0 <- FLAT_SHADE_ENA = 1 PNT_SPRITE_ENA = 1 PNT_SPRITE_OVRD_X = SPI_PNT_SPRITE_SEL_S PNT_SPRITE_OVRD_Y = SPI_PNT_SPRITE_SEL_T PNT_SPRITE_OVRD_Z = SPI_PNT_SPRITE_SEL_0 PNT_SPRITE_OVRD_W = SPI_PNT_SPRITE_SEL_1 PNT_SPRITE_TOP_1 = 1 c0036900 SET_CONTEXT_REG: 00000280 00080008 PA_SU_POINT_SIZE <- HEIGHT = 8 WIDTH = 8 00080008 PA_SU_POINT_MINMAX <- MIN_SIZE = 8 MAX_SIZE = 8 00000008 PA_SU_LINE_CNTL <- WIDTH = 8 c0016900 SET_CONTEXT_REG: 00000292 00000002 PA_SC_MODE_CNTL_0 <- MSAA_ENABLE = 0 VPORT_SCISSOR_ENABLE = 1 LINE_STIPPLE_ENABLE = 0 SEND_UNLIT_STILES_TO_PKR = 0 c0016900 SET_CONTEXT_REG: 000002df 00000000 PA_SU_POLY_OFFSET_CLAMP <- 0 c0016900 SET_CONTEXT_REG: 00000205 00080244 PA_SU_SC_MODE_CNTL <- CULL_FRONT = 0 CULL_BACK = 0 FACE = 1 POLY_MODE = X_DISABLE_POLY_MODE POLYMODE_FRONT_PTYPE = X_DRAW_TRIANGLES POLYMODE_BACK_PTYPE = X_DRAW_TRIANGLES POLY_OFFSET_FRONT_ENABLE = 0 POLY_OFFSET_BACK_ENABLE = 0 POLY_OFFSET_PARA_ENABLE = 0 VTX_WINDOW_OFFSET_ENABLE = 0 PROVOKING_VTX_LAST = 1 PERSP_CORR_DIS = 0 MULTI_PRIM_IB_ENA = 0 c0016900 SET_CONTEXT_REG: 00000200 00000000 DB_DEPTH_CONTROL <- STENCIL_ENABLE = 0 Z_ENABLE = 0 Z_WRITE_ENABLE = 0 DEPTH_BOUNDS_ENABLE = 0 ZFUNC = FRAG_NEVER BACKFACE_ENABLE = 0 STENCILFUNC = REF_NEVER STENCILFUNC_BF = REF_NEVER ENABLE_COLOR_WRITES_ON_DEPTH_FAIL = 0 DISABLE_COLOR_WRITES_ON_DEPTH_PASS = 0 c0047600 SET_SH_REG: 00000048 01077730 SPI_SHADER_PGM_LO_VS <- 0x01077730 00000000 SPI_SHADER_PGM_HI_VS <- MEM_BASE = 0 002c0084 SPI_SHADER_PGM_RSRC1_VS <- VGPRS = 4 SGPRS = 2 PRIORITY = 0 FLOAT_MODE = 192 (0xc0) PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 VGPR_COMP_CNT = 0 CU_GROUP_ENABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 00000012 SPI_SHADER_PGM_RSRC2_VS <- SCRATCH_EN = 0 USER_SGPR = 9 TRAP_PRESENT = 0 OC_LDS_EN = 0 SO_BASE0_EN = 0 SO_BASE1_EN = 0 SO_BASE2_EN = 0 SO_BASE3_EN = 0 SO_EN = 0 EXCP_EN_SI = 0 EXCP_EN = 0 DISPATCH_DRAW_EN = 0 c0047600 SET_SH_REG: 00000008 0100005c SPI_SHADER_PGM_LO_PS <- 0x0100005c 00000000 SPI_SHADER_PGM_HI_PS <- MEM_BASE = 0 002c0045 SPI_SHADER_PGM_RSRC1_PS <- VGPRS = 5 SGPRS = 1 PRIORITY = 0 FLOAT_MODE = FP_64_DENORMS PRIV = 0 DX10_CLAMP = 1 DEBUG_MODE = 0 IEEE_MODE = 0 CU_GROUP_DISABLE = 0 CACHE_CTL = 0 CDBG_USER = 0 0000000a SPI_SHADER_PGM_RSRC2_PS <- SCRATCH_EN = 0 USER_SGPR = 5 TRAP_PRESENT = 0 WAVE_CNT_EN = 0 EXTRA_LDS_SIZE = 0 EXCP_EN_SI = 0 EXCP_EN = 0 c0004600 EVENT_WRITE: 00000407 VGT_EVENT_INITIATOR <- EVENT_TYPE = CS_PARTIAL_FLUSH EVENT_INDEX <- 4 INV_L2 <- 0 c0004200 PFP_SYNC_ME: 00000000 c0034300 SURFACE_SYNC: 00040008 CP_COHER_CNTL <- DEST_BASE_0_ENA = 0 DEST_BASE_1_ENA = 0 TC_SD_ACTION_ENA = 0 TC_NC_ACTION_ENA = 1 CB0_DEST_BASE_ENA = 0 CB1_DEST_BASE_ENA = 0 CB2_DEST_BASE_ENA = 0 CB3_DEST_BASE_ENA = 0 CB4_DEST_BASE_ENA = 0 CB5_DEST_BASE_ENA = 0 CB6_DEST_BASE_ENA = 0 CB7_DEST_BASE_ENA = 0 DB_DEST_BASE_ENA = 0 TCL1_VOL_ACTION_ENA = 0 TC_VOL_ACTION_ENA = 0 TC_WB_ACTION_ENA = 1 DEST_BASE_2_ENA = 0 DEST_BASE_3_ENA = 0 TCL1_ACTION_ENA = 0 TC_ACTION_ENA = 0 CB_ACTION_ENA = 0 DB_ACTION_ENA = 0 SH_KCACHE_ACTION_ENA = 0 SH_KCACHE_VOL_ACTION_ENA = 0 SH_ICACHE_ACTION_ENA = 0 SH_KCACHE_WB_ACTION_ENA = 0 SH_SD_ACTION_ENA = 0 ffffffff CP_COHER_SIZE <- 0xffffffff 00000000 CP_COHER_BASE <- 0 0000000a POLL_INTERVAL <- 10 (0x000a) c0002f00 NUM_INSTANCES: 00000001 VGT_NUM_INSTANCES <- 1 c0042700 DRAW_INDEX_2: 00001620 VGT_DMA_MAX_SIZE <- 5664 (0x00001620) 04e7c000 VGT_DMA_BASE <- 0x04e7c000 00000001 VGT_DMA_BASE_HI <- BASE_ADDR_GFX6 = 1 00000588 VGT_NUM_INDICES <- 1416 (0x00000588) 00000000 VGT_DRAW_INITIATOR <- SOURCE_SELECT = DI_SRC_SEL_DMA MAJOR_MODE = DI_MAJOR_MODE_0 NOT_EOP = 0 USE_OPAQUE = 0 c0055000 DMA_DATA: 60300000 DMA_DATA_WORD0 <- CP_SYNC = 0 SRC_SEL = SRC_ADDR_TC_L2 DST_CACHE_POLICY = 0 DST_SEL = DST_ADDR_TC_L2 SRC_CACHE_POLICY = 0 ENGINE = ME 07773000 SRC_ADDR_LO <- 0x07773000 00000001 SRC_ADDR_HI <- 1 07773000 DST_ADDR_LO <- 0x07773000 00000001 DST_ADDR_HI <- 1 00200400 COMMAND <- BYTE_COUNT_GFX6 = 1024 (0x00400) BYTE_COUNT_GFX9 = 0x200400 DISABLE_WR_CONFIRM_GFX6 = 1 SRC_SWAP = NONE DST_SWAP = NONE SAS = MEMORY DAS = MEMORY SAIC = INCREMENT DAIC = INCREMENT RAW_WAIT = 0 DISABLE_WR_CONFIRM_GFX9 = 0 c0055000 DMA_DATA: 60300000 DMA_DATA_WORD0 <- CP_SYNC = 0 SRC_SEL = SRC_ADDR_TC_L2 DST_CACHE_POLICY = 0 DST_SEL = DST_ADDR_TC_L2 SRC_CACHE_POLICY = 0 ENGINE = ME 002658a0 SRC_ADDR_LO <- 0x002658a0 00000000 SRC_ADDR_HI <- 0 002658a0 DST_ADDR_LO <- 0x002658a0 00000000 DST_ADDR_HI <- 0 00200020 COMMAND <- BYTE_COUNT_GFX6 = 32 (0x00020) BYTE_COUNT_GFX9 = 0x200020 DISABLE_WR_CONFIRM_GFX6 = 1 SRC_SWAP = NONE DST_SWAP = NONE SAS = MEMORY DAS = MEMORY SAIC = INCREMENT DAIC = INCREMENT RAW_WAIT = 0 DISABLE_WR_CONFIRM_GFX9 = 0 c0055000 DMA_DATA: 60300000 DMA_DATA_WORD0 <- CP_SYNC = 0 SRC_SEL = SRC_ADDR_TC_L2 DST_CACHE_POLICY = 0 DST_SEL = DST_ADDR_TC_L2 SRC_CACHE_POLICY = 0 ENGINE = ME 00005c00 SRC_ADDR_LO <- 23552 (0x00005c00) 00000001 SRC_ADDR_HI <- 1 00005c00 DST_ADDR_LO <- 23552 (0x00005c00) 00000001 DST_ADDR_HI <- 1 00200140 COMMAND <- BYTE_COUNT_GFX6 = 320 (0x00140) BYTE_COUNT_GFX9 = 0x200140 DISABLE_WR_CONFIRM_GFX6 = 1 SRC_SWAP = NONE DST_SWAP = NONE SAS = MEMORY DAS = MEMORY SAIC = INCREMENT DAIC = INCREMENT RAW_WAIT = 0 DISABLE_WR_CONFIRM_GFX9 = 0 c0033700 WRITE_DATA: 00100100 CONTROL <- ENGINE_SEL = ME WR_CONFIRM = 1 WR_ONE_ADDR = 0 DST_SEL = MEMORY_SYNC 00073000 DST_ADDR_LO <- 0x00073000 00000001 DST_ADDR_HI <- 1 000000cd c0001000 NOP: Trace point ID: 205 !!!!! This is the last trace point that was reached by the CP !!!!! cafe00cd ------------------- IB end ------------------- Color buffer 0: Info: npix_x=1920, npix_y=1080, npix_z=1, blk_w=1, blk_h=1, array_size=1, last_level=0, bpe=8, nsamples=0, flags=0x2000000, r16g16b16a16_float Layout: size=18874368, alignment=262144, bankw=1, bankh=4, nbanks=16, mtilea=4, tilesplit=1024, pipeconfig=12, scanout=0 DCC: offset=18874368, size=73728, alignment=32768 DCCLevel[0]: enabled=1, offset=0, fast_clear_size=73728 Level[0]: offset=0, slice_size=18874368, npix_x=1920, npix_y=1080, npix_z=1, nblk_x=2048, nblk_y=1152, mode=3, tiling_index = 14 SHADER KEY part.vs.prolog.instance_divisor_is_one = 0 part.vs.prolog.instance_divisor_is_fetched = 0 part.vs.prolog.ls_vgpr_fix = 0 mono.vs.fix_fetch = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} as_es = 0 as_ls = 0 mono.u.vs_export_prim_id = 0 opt.kill_outputs = 0x0 opt.clip_disable = 0 Vertex Shader as VS: Shader prolog disassembly: vs_prolog: BB11_0: v_add_u32_e32 v4, vcc, s5, v0 ; 32080005 Shader main disassembly: main: BB2_0: s_mov_b32 s9, 0 ; BE890080 s_load_dwordx4 s[4:7], s[8:9], 0x0 ; C00A0104 00000000 s_mov_b32 s0, s2 ; BE800002 s_mov_b32 s3, 0x27fac ; BE8300FF 00027FAC s_movk_i32 s2, 0x170 ; B0020170 s_mov_b32 s1, s9 ; BE810009 s_waitcnt lgkmcnt(0) ; BF8C007F buffer_load_format_xyzw v[5:8], v4, s[4:7], 0 idxen ; E00C2000 80010504 s_buffer_load_dword s4, s[0:3], 0x9c ; C0220100 0000009C s_buffer_load_dword s5, s[0:3], 0xc ; C0220140 0000000C s_buffer_load_dwordx2 s[6:7], s[0:3], 0x50 ; C0260180 00000050 s_buffer_load_dword s8, s[0:3], 0x58 ; C0220200 00000058 s_buffer_load_dword s9, s[0:3], 0x70 ; C0220240 00000070 s_buffer_load_dword s10, s[0:3], 0x78 ; C0220280 00000078 s_waitcnt lgkmcnt(0) ; BF8C007F v_mov_b32_e32 v4, s4 ; 7E080204 s_waitcnt vmcnt(0) ; BF8C0F70 v_mul_f32_e32 v2, s5, v5 ; 0A040A05 v_mul_f32_e32 v3, s5, v6 ; 0A060C05 v_mul_f32_e32 v0, s6, v2 ; 0A000406 v_mul_f32_e32 v1, s5, v7 ; 0A020E05 v_mac_f32_e32 v0, s7, v3 ; 2C000607 v_mac_f32_e32 v0, s8, v1 ; 2C000208 v_add_f32_e32 v0, s10, v0 ; 0200000A v_mul_f32_e32 v8, s9, v0 ; 0A100009 s_mov_b32 s5, 0x3c23d70a ; BE8500FF 3C23D70A v_cmp_gt_f32_e64 s[8:9], |v8|, s5 ; D0440108 00000B08 s_and_saveexec_b64 s[6:7], s[8:9] ; BE862008 BB2_1: v_exp_f32_e64 v4, -v8 ; D1600004 20000108 v_rcp_f32_e32 v8, v8 ; 7E104508 v_sub_f32_e32 v4, 1.0, v4 ; 040808F2 v_mul_f32_e32 v4, v4, v8 ; 0A081104 v_mul_f32_e32 v4, s4, v4 ; 0A080804 BB2_2: s_or_b64 exec, exec, s[6:7] ; 87FE067E s_buffer_load_dword s6, s[0:3], 0x74 ; C0220180 00000074 s_buffer_load_dword s4, s[0:3], 0xac ; C0220100 000000AC s_waitcnt lgkmcnt(0) ; BF8C007F v_mul_f32_e32 v8, s6, v0 ; 0A100006 v_mov_b32_e32 v0, s4 ; 7E000204 v_cmp_gt_f32_e64 s[8:9], |v8|, s5 ; D0440108 00000B08 s_and_saveexec_b64 s[6:7], s[8:9] ; BE862008 BB2_3: v_exp_f32_e64 v0, -v8 ; D1600000 20000108 v_rcp_f32_e32 v8, v8 ; 7E104508 v_sub_f32_e32 v0, 1.0, v0 ; 040000F2 v_mul_f32_e32 v0, v0, v8 ; 0A001100 v_mul_f32_e32 v0, s4, v0 ; 0A000004 BB2_4: s_or_b64 exec, exec, s[6:7] ; 87FE067E s_buffer_load_dwordx4 s[4:7], s[0:3], 0x10 ; C02A0100 00000010 s_buffer_load_dwordx4 s[8:11], s[0:3], 0x20 ; C02A0200 00000020 s_buffer_load_dwordx4 s[12:15], s[0:3], 0x30 ; C02A0300 00000030 s_buffer_load_dwordx4 s[16:19], s[0:3], 0x40 ; C02A0400 00000040 v_mul_f32_e32 v8, v2, v2 ; 0A100502 s_waitcnt lgkmcnt(0) ; BF8C007F v_mul_f32_e32 v9, s4, v5 ; 0A120A04 v_mul_f32_e32 v10, s5, v5 ; 0A140A05 v_mac_f32_e32 v9, s8, v6 ; 2C120C08 v_mul_f32_e32 v11, s6, v5 ; 0A160A06 v_mul_f32_e32 v12, s7, v5 ; 0A180A07 s_buffer_load_dwordx2 s[4:5], s[0:3], 0xe0 ; C0260100 000000E0 s_buffer_load_dword s8, s[0:3], 0xe8 ; C0220200 000000E8 s_buffer_load_dwordx2 s[6:7], s[0:3], 0xf0 ; C0260180 000000F0 v_mac_f32_e32 v10, s9, v6 ; 2C140C09 v_mac_f32_e32 v11, s10, v6 ; 2C160C0A s_waitcnt lgkmcnt(0) ; BF8C007F v_mul_f32_e32 v14, s4, v5 ; 0A1C0A04 v_mul_f32_e32 v15, s5, v5 ; 0A1E0A05 v_mul_f32_e32 v5, s8, v5 ; 0A0A0A08 s_buffer_load_dword s8, s[0:3], 0xf8 ; C0220200 000000F8 s_buffer_load_dwordx2 s[4:5], s[0:3], 0x100 ; C0260100 00000100 v_mac_f32_e32 v14, s6, v6 ; 2C1C0C06 v_mac_f32_e32 v15, s7, v6 ; 2C1E0C07 s_buffer_load_dword s9, s[0:3], 0x108 ; C0220240 00000108 s_buffer_load_dwordx2 s[6:7], s[0:3], 0x110 ; C0260180 00000110 v_mac_f32_e32 v12, s11, v6 ; 2C180C0B s_waitcnt lgkmcnt(0) ; BF8C007F v_mac_f32_e32 v5, s8, v6 ; 2C0A0C08 v_mac_f32_e32 v14, s4, v7 ; 2C1C0E04 v_mac_f32_e32 v15, s5, v7 ; 2C1E0E05 v_mac_f32_e32 v9, s12, v7 ; 2C120E0C v_mac_f32_e32 v10, s13, v7 ; 2C140E0D v_mac_f32_e32 v11, s14, v7 ; 2C160E0E v_mac_f32_e32 v12, s15, v7 ; 2C180E0F v_mac_f32_e32 v5, s9, v7 ; 2C0A0E09 v_add_f32_e32 v6, s6, v14 ; 020C1C06 v_add_f32_e32 v7, s7, v15 ; 020E1E07 s_buffer_load_dword s8, s[0:3], 0x118 ; C0220200 00000118 s_buffer_load_dwordx4 s[4:7], s[0:3], 0x120 ; C02A0100 00000120 v_add_f32_e32 v11, s18, v11 ; 02161612 v_mac_f32_e32 v8, v3, v3 ; 2C100703 v_mac_f32_e32 v8, v1, v1 ; 2C100301 s_waitcnt lgkmcnt(0) ; BF8C007F v_add_f32_e32 v5, s8, v5 ; 020A0A08 v_mov_b32_e32 v14, s6 ; 7E1C0206 v_mad_f32 v6, s4, v6, v14 ; D1C10006 043A0C04 v_mov_b32_e32 v14, s7 ; 7E1C0207 v_mac_f32_e32 v14, s5, v7 ; 2C1C0E05 s_buffer_load_dwordx4 s[4:7], s[0:3], 0x130 ; C02A0100 00000130 s_buffer_load_dwordx2 s[12:13], s[0:3], 0x140 ; C0260300 00000140 s_buffer_load_dword s18, s[0:3], 0x148 ; C0220480 00000148 s_buffer_load_dwordx2 s[14:15], s[0:3], 0x14c ; C0260380 0000014C v_add_f32_e32 v9, s16, v9 ; 02121210 v_add_f32_e32 v10, s17, v10 ; 02141411 v_sqrt_f32_e32 v13, v8 ; 7E1A4F08 v_rsq_f32_e32 v8, v8 ; 7E104908 s_waitcnt lgkmcnt(0) ; BF8C007F v_mov_b32_e32 v7, s15 ; 7E0E020F v_mul_f32_e32 v15, s4, v7 ; 0A1E0E04 v_mul_f32_e32 v16, s5, v7 ; 0A200E05 v_mul_f32_e32 v17, s6, v7 ; 0A220E06 s_buffer_load_dwordx2 s[4:5], s[0:3], 0x90 ; C0260100 00000090 s_buffer_load_dword s6, s[0:3], 0x98 ; C0220180 00000098 v_mul_f32_e32 v18, s12, v7 ; 0A240E0C s_buffer_load_dwordx2 s[8:9], s[0:3], 0xa0 ; C0260200 000000A0 s_buffer_load_dwordx2 s[10:11], s[0:3], 0x60 ; C0260280 00000060 s_buffer_load_dword s12, s[0:3], 0x68 ; C0220300 00000068 s_buffer_load_dword s15, s[0:3], 0x80 ; C02203C0 00000080 s_buffer_load_dwordx2 s[16:17], s[0:3], 0x84 ; C0260400 00000084 v_log_f32_e32 v19, v13 ; 7E26430D s_waitcnt lgkmcnt(0) ; BF8C007F v_mul_f32_e32 v2, s10, v2 ; 0A04040A v_mac_f32_e32 v2, s11, v3 ; 2C04060B v_mac_f32_e32 v2, s12, v1 ; 2C04020C v_mul_f32_e32 v2, v2, v8 ; 0A041102 v_mov_b32_e32 v8, s16 ; 7E100210 v_mad_f32 v8, -s17, v2, v8 ; D1C10008 24220411 v_mul_f32_e32 v3, s4, v4 ; 0A060804 v_mul_f32_e32 v1, s5, v4 ; 0A020805 v_mul_f32_e32 v4, s6, v4 ; 0A080806 s_buffer_load_dwordx2 s[4:5], s[0:3], 0xc0 ; C0260100 000000C0 s_buffer_load_dword s6, s[0:3], 0xc8 ; C0220180 000000C8 s_buffer_load_dwordx2 s[16:17], s[0:3], 0xcc ; C0260400 000000CC v_mac_f32_e32 v3, s8, v0 ; 2C060008 v_mac_f32_e32 v1, s9, v0 ; 2C020009 s_buffer_load_dword s12, s[0:3], 0xa8 ; C0220300 000000A8 s_buffer_load_dwordx4 s[8:11], s[0:3], 0xb0 ; C02A0200 000000B0 s_waitcnt lgkmcnt(0) ; BF8C007F v_mul_legacy_f32_e32 v19, s17, v19 ; 08262611 v_exp_f32_e32 v19, v19 ; 7E264113 v_rsq_f32_e32 v8, v8 ; 7E104908 v_mac_f32_e32 v4, s12, v0 ; 2C08000C s_buffer_load_dword s0, s[0:3], 0x160 ; C0220000 00000160 v_mul_f32_e64 v3, v3, -v19 ; D1050003 40022703 v_mul_f32_e64 v1, v1, -v19 ; D1050001 40022701 v_exp_f32_e32 v3, v3 ; 7E064103 v_mul_f32_e64 v4, v4, -v19 ; D1050004 40022704 v_mul_f32_e32 v2, v2, v2 ; 0A040502 v_exp_f32_e32 v1, v1 ; 7E024101 v_mul_f32_e32 v0, s15, v8 ; 0A00100F v_mul_f32_e32 v8, s16, v19 ; 0A102610 v_mad_f32 v2, v2, s11, 1.0 ; D1C10002 03C81702 v_exp_f32_e32 v4, v4 ; 7E084104 v_min_f32_e32 v0, v0, v8 ; 14001100 v_mul_f32_e32 v8, s8, v2 ; 0A100408 v_mul_f32_e32 v19, s9, v2 ; 0A260409 v_mul_f32_e32 v2, s10, v2 ; 0A04040A s_mov_b32 s1, 0x3f666666 ; BE8100FF 3F666666 v_cmp_lt_f32_e32 vcc, s1, v13 ; 7C821A01 v_add_f32_e32 v12, s19, v12 ; 02181813 v_mac_f32_e32 v8, s4, v0 ; 2C100004 v_mac_f32_e32 v19, s5, v0 ; 2C260005 v_mac_f32_e32 v2, s6, v0 ; 2C040006 v_sub_f32_e32 v0, 1.0, v3 ; 040006F2 s_waitcnt lgkmcnt(0) ; BF8C007F v_mul_f32_e32 v13, s0, v3 ; 0A1A0600 v_mul_f32_e32 v0, v8, v0 ; 0A000108 v_sub_f32_e32 v8, 1.0, v1 ; 041002F2 v_cndmask_b32_e32 v11, v11, v12, vcc ; 0016190B v_mac_f32_e32 v13, s0, v1 ; 2C1A0200 exp pos0 v9, v10, v11, v12 done ; C40008CF 0C0B0A09 v_mul_f32_e32 v8, v19, v8 ; 0A101113 v_sub_f32_e32 v19, 1.0, v4 ; 042608F2 exp param0 v6, v14, v5, v0 ; C400020F 00050E06 s_waitcnt expcnt(0) ; BF8C0F0F v_mov_b32_e32 v5, s7 ; 7E0A0207 v_mul_f32_e32 v2, v2, v19 ; 0A042702 v_mul_f32_e32 v19, s13, v7 ; 0A260E0D exp param1 v15, v16, v17, v5 ; C400021F 0511100F v_mul_f32_e32 v7, s18, v7 ; 0A0E0E12 s_waitcnt expcnt(0) ; BF8C0F0F v_mov_b32_e32 v5, s14 ; 7E0A020E v_mac_f32_e64 v13, v4, s0 clamp ; D116800D 00000104 exp param2 v18, v19, v7, v5 ; C400022F 05071312 exp param3 v3, v1, v4, v13 ; C400023F 0D040103 s_waitcnt expcnt(0) ; BF8C0F0F v_mov_b32_e32 v1, 0 ; 7E020280 exp param4 v0, v8, v2, v1 ; C400024F 01020800 s_endpgm ; BF810000 *** SHADER STATS *** SGPRS: 24 VGPRS: 20 Spilled SGPRs: 0 Spilled VGPRs: 0 Private memory VGPRs: 0 Code Size: 1012 bytes LDS: 0 blocks Scratch: 0 bytes per wave Max Waves: 8 ******************** SHADER KEY part.ps.prolog.color_two_side = 0 part.ps.prolog.flatshade_colors = 0 part.ps.prolog.poly_stipple = 0 part.ps.prolog.force_persp_sample_interp = 0 part.ps.prolog.force_linear_sample_interp = 0 part.ps.prolog.force_persp_center_interp = 0 part.ps.prolog.force_linear_center_interp = 0 part.ps.prolog.bc_optimize_for_persp = 0 part.ps.prolog.bc_optimize_for_linear = 0 part.ps.epilog.spi_shader_col_format = 0x4 part.ps.epilog.color_is_int8 = 0x0 part.ps.epilog.color_is_int10 = 0x0 part.ps.epilog.last_cbuf = 0 part.ps.epilog.alpha_func = 7 part.ps.epilog.alpha_to_one = 0 part.ps.epilog.poly_line_smoothing = 0 part.ps.epilog.clamp_color = 0 Pixel Shader: Shader main disassembly: main: BB2_0: s_mov_b64 s[6:7], exec ; BE86017E s_wqm_b64 exec, exec ; BEFE077E s_mov_b32 s0, s3 ; BE800003 s_mov_b32 s1, 0 ; BE810080 s_load_dwordx8 s[8:15], s[0:1], 0x200 ; C00E0200 00000200 s_load_dwordx4 s[0:3], s[0:1], 0x230 ; C00A0000 00000230 s_mov_b32 m0, s5 ; BEFC0005 v_interp_p1_f32_e32 v4, v2, attr0.x ; D4100002 v_interp_p1_f32_e32 v5, v2, attr0.y ; D4140102 v_interp_p1_f32_e32 v6, v2, attr0.z ; D4180202 v_interp_p2_f32_e32 v4, v3, attr0.x ; D4110003 v_interp_p2_f32_e32 v5, v3, attr0.y ; D4150103 v_interp_p2_f32_e32 v6, v3, attr0.z ; D4190203 s_and_b64 exec, exec, s[6:7] ; 86FE067E s_waitcnt lgkmcnt(0) ; BF8C007F image_sample v[6:7], v[4:7], s[8:15], s[0:3] dmask:0x3 ; F0800300 00020604 v_interp_p1_f32_e32 v9, v2, attr2.x ; D4240802 v_interp_p1_f32_e32 v11, v2, attr2.y ; D42C0902 v_interp_p1_f32_e32 v13, v2, attr2.z ; D4340A02 v_interp_p1_f32_e32 v16, v2, attr2.w ; D4400B02 v_interp_p1_f32_e32 v8, v2, attr1.x ; D4200402 v_interp_p1_f32_e32 v10, v2, attr1.y ; D4280502 v_interp_p1_f32_e32 v12, v2, attr1.z ; D4300602 v_interp_p1_f32_e32 v15, v2, attr1.w ; D43C0702 v_interp_p1_f32_e32 v17, v2, attr3.x ; D4440C02 v_interp_p1_f32_e32 v0, v2, attr4.x ; D4001002 v_interp_p1_f32_e32 v18, v2, attr3.y ; D4480D02 v_interp_p1_f32_e32 v1, v2, attr4.y ; D4041102 v_interp_p1_f32_e32 v19, v2, attr3.z ; D44C0E02 v_interp_p1_f32_e32 v4, v2, attr4.z ; D4101202 v_interp_p1_f32_e32 v20, v2, attr3.w ; D4500F02 v_interp_p1_f32_e32 v5, v2, attr4.w ; D4141302 v_interp_p2_f32_e32 v9, v3, attr2.x ; D4250803 v_interp_p2_f32_e32 v11, v3, attr2.y ; D42D0903 v_interp_p2_f32_e32 v13, v3, attr2.z ; D4350A03 v_interp_p2_f32_e32 v16, v3, attr2.w ; D4410B03 v_interp_p2_f32_e32 v8, v3, attr1.x ; D4210403 v_interp_p2_f32_e32 v10, v3, attr1.y ; D4290503 v_interp_p2_f32_e32 v12, v3, attr1.z ; D4310603 v_interp_p2_f32_e32 v15, v3, attr1.w ; D43D0703 v_interp_p2_f32_e32 v17, v3, attr3.x ; D4450C03 v_interp_p2_f32_e32 v0, v3, attr4.x ; D4011003 v_interp_p2_f32_e32 v18, v3, attr3.y ; D4490D03 v_interp_p2_f32_e32 v1, v3, attr4.y ; D4051103 v_interp_p2_f32_e32 v19, v3, attr3.z ; D44D0E03 v_interp_p2_f32_e32 v4, v3, attr4.z ; D4111203 v_interp_p2_f32_e32 v20, v3, attr3.w ; D4510F03 v_interp_p2_f32_e32 v5, v3, attr4.w ; D4151303 s_waitcnt vmcnt(0) ; BF8C0F70 v_sub_f32_e32 v2, 1.0, v6 ; 04040CF2 v_mul_f32_e32 v3, v9, v2 ; 0A060509 v_mul_f32_e32 v9, v11, v2 ; 0A12050B v_mul_f32_e32 v11, v13, v2 ; 0A16050D v_mul_f32_e32 v2, v16, v2 ; 0A040510 v_mac_f32_e32 v2, v15, v6 ; 2C040D0F v_mac_f32_e32 v11, v12, v6 ; 2C160D0C v_mul_f32_e32 v2, v2, v7 ; 0A040F02 v_mac_f32_e32 v3, v8, v6 ; 2C060D08 v_mac_f32_e32 v9, v10, v6 ; 2C120D0A v_mac_f32_e32 v4, v11, v19 ; 2C08270B v_mac_f32_e32 v5, v2, v20 ; 2C0A2902 v_mac_f32_e32 v0, v3, v17 ; 2C002303 v_mac_f32_e32 v1, v9, v18 ; 2C022509 v_mov_b32_e32 v2, v4 ; 7E040304 v_mov_b32_e32 v3, v5 ; 7E060305 Shader epilog disassembly: ps_epilog: BB1_0: v_cvt_pkrtz_f16_f32 v0, v0, v1 ; D2960000 00020300 v_cvt_pkrtz_f16_f32 v1, v2, v3 ; D2960001 00020702 exp mrt0 v0, v0, v1, v1 done compr vm ; C4001C0F 00000100 s_endpgm ; BF810000 *** SHADER CONFIG *** SPI_PS_INPUT_ADDR = 0xf077 SPI_PS_INPUT_ENA = 0x0002 *** SHADER STATS *** SGPRS: 16 VGPRS: 24 Spilled SGPRs: 0 Spilled VGPRs: 0 Private memory VGPRs: 0 Code Size: 320 bytes LDS: 0 blocks Scratch: 0 bytes per wave Max Waves: 8 ******************** RW buffers slot 0 (GPU list): SQ_BUF_RSRC_WORD0 <- 0xffffffff SQ_BUF_RSRC_WORD1 <- BASE_ADDRESS_HI = 0xffff STRIDE = 16383 (0x3fff) CACHE_SWIZZLE = 1 SWIZZLE_ENABLE = 1 SQ_BUF_RSRC_WORD2 <- 0xffffffff SQ_BUF_RSRC_WORD3 <- DST_SEL_X = SQ_SEL_W DST_SEL_Y = SQ_SEL_W DST_SEL_Z = SQ_SEL_W DST_SEL_W = SQ_SEL_W NUM_FORMAT = BUF_NUM_FORMAT_FLOAT DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15 ELEMENT_SIZE = 3 INDEX_STRIDE = 3 ADD_TID_ENABLE = 1 ATC = 1 HASH_ENABLE = 1 HEAP = 1 MTYPE = 7 TYPE = SQ_RSRC_BUF_RSVD_3 !!!!! This slot was corrupted in GPU memory !!!!! RW buffers slot 1 (GPU list): SQ_BUF_RSRC_WORD0 <- 0xffffffff SQ_BUF_RSRC_WORD1 <- BASE_ADDRESS_HI = 0xffff STRIDE = 16383 (0x3fff) CACHE_SWIZZLE = 1 SWIZZLE_ENABLE = 1 SQ_BUF_RSRC_WORD2 <- 0xffffffff SQ_BUF_RSRC_WORD3 <- DST_SEL_X = SQ_SEL_W DST_SEL_Y = SQ_SEL_W DST_SEL_Z = SQ_SEL_W DST_SEL_W = SQ_SEL_W NUM_FORMAT = BUF_NUM_FORMAT_FLOAT DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15 ELEMENT_SIZE = 3 INDEX_STRIDE = 3 ADD_TID_ENABLE = 1 ATC = 1 HASH_ENABLE = 1 HEAP = 1 MTYPE = 7 TYPE = SQ_RSRC_BUF_RSVD_3 !!!!! This slot was corrupted in GPU memory !!!!! RW buffers slot 2 (GPU list): SQ_BUF_RSRC_WORD0 <- 0xffffffff SQ_BUF_RSRC_WORD1 <- BASE_ADDRESS_HI = 0xffff STRIDE = 16383 (0x3fff) CACHE_SWIZZLE = 1 SWIZZLE_ENABLE = 1 SQ_BUF_RSRC_WORD2 <- 0xffffffff SQ_BUF_RSRC_WORD3 <- DST_SEL_X = SQ_SEL_W DST_SEL_Y = SQ_SEL_W DST_SEL_Z = SQ_SEL_W DST_SEL_W = SQ_SEL_W NUM_FORMAT = BUF_NUM_FORMAT_FLOAT DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15 ELEMENT_SIZE = 3 INDEX_STRIDE = 3 ADD_TID_ENABLE = 1 ATC = 1 HASH_ENABLE = 1 HEAP = 1 MTYPE = 7 TYPE = SQ_RSRC_BUF_RSVD_3 !!!!! This slot was corrupted in GPU memory !!!!! RW buffers slot 3 (GPU list): SQ_BUF_RSRC_WORD0 <- 0xffffffff SQ_BUF_RSRC_WORD1 <- BASE_ADDRESS_HI = 0xffff STRIDE = 16383 (0x3fff) CACHE_SWIZZLE = 1 SWIZZLE_ENABLE = 1 SQ_BUF_RSRC_WORD2 <- 0xffffffff SQ_BUF_RSRC_WORD3 <- DST_SEL_X = SQ_SEL_W DST_SEL_Y = SQ_SEL_W DST_SEL_Z = SQ_SEL_W DST_SEL_W = SQ_SEL_W NUM_FORMAT = BUF_NUM_FORMAT_FLOAT DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15 ELEMENT_SIZE = 3 INDEX_STRIDE = 3 ADD_TID_ENABLE = 1 ATC = 1 HASH_ENABLE = 1 HEAP = 1 MTYPE = 7 TYPE = SQ_RSRC_BUF_RSVD_3 !!!!! This slot was corrupted in GPU memory !!!!! RW buffers slot 4 (GPU list): SQ_BUF_RSRC_WORD0 <- 0xffffffff SQ_BUF_RSRC_WORD1 <- BASE_ADDRESS_HI = 0xffff STRIDE = 16383 (0x3fff) CACHE_SWIZZLE = 1 SWIZZLE_ENABLE = 1 SQ_BUF_RSRC_WORD2 <- 0xffffffff SQ_BUF_RSRC_WORD3 <- DST_SEL_X = SQ_SEL_W DST_SEL_Y = SQ_SEL_W DST_SEL_Z = SQ_SEL_W DST_SEL_W = SQ_SEL_W NUM_FORMAT = BUF_NUM_FORMAT_FLOAT DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15 ELEMENT_SIZE = 3 INDEX_STRIDE = 3 ADD_TID_ENABLE = 1 ATC = 1 HASH_ENABLE = 1 HEAP = 1 MTYPE = 7 TYPE = SQ_RSRC_BUF_RSVD_3 !!!!! This slot was corrupted in GPU memory !!!!! RW buffers slot 5 (GPU list): SQ_BUF_RSRC_WORD0 <- 0xffffffff SQ_BUF_RSRC_WORD1 <- BASE_ADDRESS_HI = 0xffff STRIDE = 16383 (0x3fff) CACHE_SWIZZLE = 1 SWIZZLE_ENABLE = 1 SQ_BUF_RSRC_WORD2 <- 0xffffffff SQ_BUF_RSRC_WORD3 <- DST_SEL_X = SQ_SEL_W DST_SEL_Y = SQ_SEL_W DST_SEL_Z = SQ_SEL_W DST_SEL_W = SQ_SEL_W NUM_FORMAT = BUF_NUM_FORMAT_FLOAT DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15 ELEMENT_SIZE = 3 INDEX_STRIDE = 3 ADD_TID_ENABLE = 1 ATC = 1 HASH_ENABLE = 1 HEAP = 1 MTYPE = 7 TYPE = SQ_RSRC_BUF_RSVD_3 !!!!! This slot was corrupted in GPU memory !!!!! RW buffers slot 6 (GPU list): SQ_BUF_RSRC_WORD0 <- 0xffffffff SQ_BUF_RSRC_WORD1 <- BASE_ADDRESS_HI = 0xffff STRIDE = 16383 (0x3fff) CACHE_SWIZZLE = 1 SWIZZLE_ENABLE = 1 SQ_BUF_RSRC_WORD2 <- 0xffffffff SQ_BUF_RSRC_WORD3 <- DST_SEL_X = SQ_SEL_W DST_SEL_Y = SQ_SEL_W DST_SEL_Z = SQ_SEL_W DST_SEL_W = SQ_SEL_W NUM_FORMAT = BUF_NUM_FORMAT_FLOAT DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15 ELEMENT_SIZE = 3 INDEX_STRIDE = 3 ADD_TID_ENABLE = 1 ATC = 1 HASH_ENABLE = 1 HEAP = 1 MTYPE = 7 TYPE = SQ_RSRC_BUF_RSVD_3 !!!!! This slot was corrupted in GPU memory !!!!! RW buffers slot 7 (GPU list): SQ_BUF_RSRC_WORD0 <- 0xffffffff SQ_BUF_RSRC_WORD1 <- BASE_ADDRESS_HI = 0xffff STRIDE = 16383 (0x3fff) CACHE_SWIZZLE = 1 SWIZZLE_ENABLE = 1 SQ_BUF_RSRC_WORD2 <- 0xffffffff SQ_BUF_RSRC_WORD3 <- DST_SEL_X = SQ_SEL_W DST_SEL_Y = SQ_SEL_W DST_SEL_Z = SQ_SEL_W DST_SEL_W = SQ_SEL_W NUM_FORMAT = BUF_NUM_FORMAT_FLOAT DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15 ELEMENT_SIZE = 3 INDEX_STRIDE = 3 ADD_TID_ENABLE = 1 ATC = 1 HASH_ENABLE = 1 HEAP = 1 MTYPE = 7 TYPE = SQ_RSRC_BUF_RSVD_3 !!!!! This slot was corrupted in GPU memory !!!!! RW buffers slot 8 (GPU list): SQ_BUF_RSRC_WORD0 <- 0xffffffff SQ_BUF_RSRC_WORD1 <- BASE_ADDRESS_HI = 0xffff STRIDE = 16383 (0x3fff) CACHE_SWIZZLE = 1 SWIZZLE_ENABLE = 1 SQ_BUF_RSRC_WORD2 <- 0xffffffff SQ_BUF_RSRC_WORD3 <- DST_SEL_X = SQ_SEL_W DST_SEL_Y = SQ_SEL_W DST_SEL_Z = SQ_SEL_W DST_SEL_W = SQ_SEL_W NUM_FORMAT = BUF_NUM_FORMAT_FLOAT DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15 ELEMENT_SIZE = 3 INDEX_STRIDE = 3 ADD_TID_ENABLE = 1 ATC = 1 HASH_ENABLE = 1 HEAP = 1 MTYPE = 7 TYPE = SQ_RSRC_BUF_RSVD_3 !!!!! This slot was corrupted in GPU memory !!!!! RW buffers slot 9 (GPU list): SQ_BUF_RSRC_WORD0 <- 0xffffffff SQ_BUF_RSRC_WORD1 <- BASE_ADDRESS_HI = 0xffff STRIDE = 16383 (0x3fff) CACHE_SWIZZLE = 1 SWIZZLE_ENABLE = 1 SQ_BUF_RSRC_WORD2 <- 0xffffffff SQ_BUF_RSRC_WORD3 <- DST_SEL_X = SQ_SEL_W DST_SEL_Y = SQ_SEL_W DST_SEL_Z = SQ_SEL_W DST_SEL_W = SQ_SEL_W NUM_FORMAT = BUF_NUM_FORMAT_FLOAT DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15 ELEMENT_SIZE = 3 INDEX_STRIDE = 3 ADD_TID_ENABLE = 1 ATC = 1 HASH_ENABLE = 1 HEAP = 1 MTYPE = 7 TYPE = SQ_RSRC_BUF_RSVD_3 !!!!! This slot was corrupted in GPU memory !!!!! RW buffers slot 10 (GPU list): SQ_BUF_RSRC_WORD0 <- 0xffffffff SQ_BUF_RSRC_WORD1 <- BASE_ADDRESS_HI = 0xffff STRIDE = 16383 (0x3fff) CACHE_SWIZZLE = 1 SWIZZLE_ENABLE = 1 SQ_BUF_RSRC_WORD2 <- 0xffffffff SQ_BUF_RSRC_WORD3 <- DST_SEL_X = SQ_SEL_W DST_SEL_Y = SQ_SEL_W DST_SEL_Z = SQ_SEL_W DST_SEL_W = SQ_SEL_W NUM_FORMAT = BUF_NUM_FORMAT_FLOAT DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15 ELEMENT_SIZE = 3 INDEX_STRIDE = 3 ADD_TID_ENABLE = 1 ATC = 1 HASH_ENABLE = 1 HEAP = 1 MTYPE = 7 TYPE = SQ_RSRC_BUF_RSVD_3 !!!!! This slot was corrupted in GPU memory !!!!! RW buffers slot 11 (GPU list): SQ_BUF_RSRC_WORD0 <- 0xffffffff SQ_BUF_RSRC_WORD1 <- BASE_ADDRESS_HI = 0xffff STRIDE = 16383 (0x3fff) CACHE_SWIZZLE = 1 SWIZZLE_ENABLE = 1 SQ_BUF_RSRC_WORD2 <- 0xffffffff SQ_BUF_RSRC_WORD3 <- DST_SEL_X = SQ_SEL_W DST_SEL_Y = SQ_SEL_W DST_SEL_Z = SQ_SEL_W DST_SEL_W = SQ_SEL_W NUM_FORMAT = BUF_NUM_FORMAT_FLOAT DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15 ELEMENT_SIZE = 3 INDEX_STRIDE = 3 ADD_TID_ENABLE = 1 ATC = 1 HASH_ENABLE = 1 HEAP = 1 MTYPE = 7 TYPE = SQ_RSRC_BUF_RSVD_3 !!!!! This slot was corrupted in GPU memory !!!!! RW buffers slot 12 (GPU list): SQ_BUF_RSRC_WORD0 <- 0xffffffff SQ_BUF_RSRC_WORD1 <- BASE_ADDRESS_HI = 0xffff STRIDE = 16383 (0x3fff) CACHE_SWIZZLE = 1 SWIZZLE_ENABLE = 1 SQ_BUF_RSRC_WORD2 <- 0xffffffff SQ_BUF_RSRC_WORD3 <- DST_SEL_X = SQ_SEL_W DST_SEL_Y = SQ_SEL_W DST_SEL_Z = SQ_SEL_W DST_SEL_W = SQ_SEL_W NUM_FORMAT = BUF_NUM_FORMAT_FLOAT DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15 ELEMENT_SIZE = 3 INDEX_STRIDE = 3 ADD_TID_ENABLE = 1 ATC = 1 HASH_ENABLE = 1 HEAP = 1 MTYPE = 7 TYPE = SQ_RSRC_BUF_RSVD_3 !!!!! This slot was corrupted in GPU memory !!!!! RW buffers slot 13 (GPU list): SQ_BUF_RSRC_WORD0 <- 0xffffffff SQ_BUF_RSRC_WORD1 <- BASE_ADDRESS_HI = 0xffff STRIDE = 16383 (0x3fff) CACHE_SWIZZLE = 1 SWIZZLE_ENABLE = 1 SQ_BUF_RSRC_WORD2 <- 0xffffffff SQ_BUF_RSRC_WORD3 <- DST_SEL_X = SQ_SEL_W DST_SEL_Y = SQ_SEL_W DST_SEL_Z = SQ_SEL_W DST_SEL_W = SQ_SEL_W NUM_FORMAT = BUF_NUM_FORMAT_FLOAT DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15 ELEMENT_SIZE = 3 INDEX_STRIDE = 3 ADD_TID_ENABLE = 1 ATC = 1 HASH_ENABLE = 1 HEAP = 1 MTYPE = 7 TYPE = SQ_RSRC_BUF_RSVD_3 !!!!! This slot was corrupted in GPU memory !!!!! RW buffers slot 14 (GPU list): SQ_BUF_RSRC_WORD0 <- 0xffffffff SQ_BUF_RSRC_WORD1 <- BASE_ADDRESS_HI = 0xffff STRIDE = 16383 (0x3fff) CACHE_SWIZZLE = 1 SWIZZLE_ENABLE = 1 SQ_BUF_RSRC_WORD2 <- 0xffffffff SQ_BUF_RSRC_WORD3 <- DST_SEL_X = SQ_SEL_W DST_SEL_Y = SQ_SEL_W DST_SEL_Z = SQ_SEL_W DST_SEL_W = SQ_SEL_W NUM_FORMAT = BUF_NUM_FORMAT_FLOAT DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15 ELEMENT_SIZE = 3 INDEX_STRIDE = 3 ADD_TID_ENABLE = 1 ATC = 1 HASH_ENABLE = 1 HEAP = 1 MTYPE = 7 TYPE = SQ_RSRC_BUF_RSVD_3 !!!!! This slot was corrupted in GPU memory !!!!! RW buffers slot 15 (GPU list): SQ_BUF_RSRC_WORD0 <- 0xffffffff SQ_BUF_RSRC_WORD1 <- BASE_ADDRESS_HI = 0xffff STRIDE = 16383 (0x3fff) CACHE_SWIZZLE = 1 SWIZZLE_ENABLE = 1 SQ_BUF_RSRC_WORD2 <- 0xffffffff SQ_BUF_RSRC_WORD3 <- DST_SEL_X = SQ_SEL_W DST_SEL_Y = SQ_SEL_W DST_SEL_Z = SQ_SEL_W DST_SEL_W = SQ_SEL_W NUM_FORMAT = BUF_NUM_FORMAT_FLOAT DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15 ELEMENT_SIZE = 3 INDEX_STRIDE = 3 ADD_TID_ENABLE = 1 ATC = 1 HASH_ENABLE = 1 HEAP = 1 MTYPE = 7 TYPE = SQ_RSRC_BUF_RSVD_3 !!!!! This slot was corrupted in GPU memory !!!!! VS - Vertex buffer slot 0 (GPU list): SQ_BUF_RSRC_WORD0 <- 0xffffffff SQ_BUF_RSRC_WORD1 <- BASE_ADDRESS_HI = 0xffff STRIDE = 16383 (0x3fff) CACHE_SWIZZLE = 1 SWIZZLE_ENABLE = 1 SQ_BUF_RSRC_WORD2 <- 0xffffffff SQ_BUF_RSRC_WORD3 <- DST_SEL_X = SQ_SEL_W DST_SEL_Y = SQ_SEL_W DST_SEL_Z = SQ_SEL_W DST_SEL_W = SQ_SEL_W NUM_FORMAT = BUF_NUM_FORMAT_FLOAT DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15 ELEMENT_SIZE = 3 INDEX_STRIDE = 3 ADD_TID_ENABLE = 1 ATC = 1 HASH_ENABLE = 1 HEAP = 1 MTYPE = 7 TYPE = SQ_RSRC_BUF_RSVD_3 !!!!! This slot was corrupted in GPU memory !!!!! VS - Constant buffer slot 0 (CPU list): SQ_BUF_RSRC_WORD0 <- 0x00127d40 SQ_BUF_RSRC_WORD1 <- BASE_ADDRESS_HI = 0 STRIDE = 0 CACHE_SWIZZLE = 0 SWIZZLE_ENABLE = 0 SQ_BUF_RSRC_WORD2 <- 368 (0x00000170) SQ_BUF_RSRC_WORD3 <- DST_SEL_X = SQ_SEL_X DST_SEL_Y = SQ_SEL_Y DST_SEL_Z = SQ_SEL_Z DST_SEL_W = SQ_SEL_W NUM_FORMAT = BUF_NUM_FORMAT_FLOAT DATA_FORMAT = BUF_DATA_FORMAT_32 ELEMENT_SIZE = 0 INDEX_STRIDE = 0 ADD_TID_ENABLE = 0 ATC = 0 HASH_ENABLE = 0 HEAP = 0 MTYPE = 0 TYPE = SQ_RSRC_BUF PS - Sampler slot 0 (GPU list): SQ_IMG_RSRC_WORD0 <- 0xffffffff SQ_IMG_RSRC_WORD1 <- BASE_ADDRESS_HI = 255 (0xff) MIN_LOD = 4095 (0xfff) DATA_FORMAT_GFX6 = IMG_DATA_FORMAT_32_AS_32_32_32_32 NUM_FORMAT_GFX6 = IMG_NUM_FORMAT_RESERVED_15 MTYPE = 3 SQ_IMG_RSRC_WORD2 <- WIDTH = 16383 (0x3fff) HEIGHT = 16383 (0x3fff) PERF_MOD = 7 INTERLACED = 1 SQ_IMG_RSRC_WORD3 <- DST_SEL_X = SQ_SEL_W DST_SEL_Y = SQ_SEL_W DST_SEL_Z = SQ_SEL_W DST_SEL_W = SQ_SEL_W BASE_LEVEL = 15 (0xf) LAST_LEVEL = 15 (0xf) TILING_INDEX = 31 (0x1f) POW2_PAD = 1 MTYPE = 1 ATC = 1 TYPE = SQ_RSRC_IMG_2D_MSAA_ARRAY SQ_IMG_RSRC_WORD4 <- DEPTH = 8191 (0x1fff) PITCH_GFX6 = 16383 (0x3fff) SQ_IMG_RSRC_WORD5 <- BASE_ARRAY = 8191 (0x1fff) LAST_ARRAY = 8191 (0x1fff) SQ_IMG_RSRC_WORD6 <- MIN_LOD_WARN = 4095 (0xfff) COUNTER_BANK_ID = 255 (0xff) LOD_HDW_CNT_EN = 1 COMPRESSION_EN = 1 ALPHA_IS_ON_MSB = 1 COLOR_TRANSFORM = 1 LOST_ALPHA_BITS = 15 (0xf) LOST_COLOR_BITS = 15 (0xf) SQ_IMG_RSRC_WORD7 <- 0xffffffff  Buffer: SQ_BUF_RSRC_WORD0 <- 0xffffffff SQ_BUF_RSRC_WORD1 <- BASE_ADDRESS_HI = 0xffff STRIDE = 16383 (0x3fff) CACHE_SWIZZLE = 1 SWIZZLE_ENABLE = 1 SQ_BUF_RSRC_WORD2 <- 0xffffffff SQ_BUF_RSRC_WORD3 <- DST_SEL_X = SQ_SEL_W DST_SEL_Y = SQ_SEL_W DST_SEL_Z = SQ_SEL_W DST_SEL_W = SQ_SEL_W NUM_FORMAT = BUF_NUM_FORMAT_FLOAT DATA_FORMAT = BUF_DATA_FORMAT_RESERVED_15 ELEMENT_SIZE = 3 INDEX_STRIDE = 3 ADD_TID_ENABLE = 1 ATC = 1 HASH_ENABLE = 1 HEAP = 1 MTYPE = 7 TYPE = SQ_RSRC_BUF_RSVD_3  FMASK: SQ_IMG_RSRC_WORD0 <- 0xffffffff SQ_IMG_RSRC_WORD1 <- BASE_ADDRESS_HI = 255 (0xff) MIN_LOD = 4095 (0xfff) DATA_FORMAT_GFX6 = IMG_DATA_FORMAT_32_AS_32_32_32_32 NUM_FORMAT_GFX6 = IMG_NUM_FORMAT_RESERVED_15 MTYPE = 3 SQ_IMG_RSRC_WORD2 <- WIDTH = 16383 (0x3fff) HEIGHT = 16383 (0x3fff) PERF_MOD = 7 INTERLACED = 1 SQ_IMG_RSRC_WORD3 <- DST_SEL_X = SQ_SEL_W DST_SEL_Y = SQ_SEL_W DST_SEL_Z = SQ_SEL_W DST_SEL_W = SQ_SEL_W BASE_LEVEL = 15 (0xf) LAST_LEVEL = 15 (0xf) TILING_INDEX = 31 (0x1f) POW2_PAD = 1 MTYPE = 1 ATC = 1 TYPE = SQ_RSRC_IMG_2D_MSAA_ARRAY SQ_IMG_RSRC_WORD4 <- DEPTH = 8191 (0x1fff) PITCH_GFX6 = 16383 (0x3fff) SQ_IMG_RSRC_WORD5 <- BASE_ARRAY = 8191 (0x1fff) LAST_ARRAY = 8191 (0x1fff) SQ_IMG_RSRC_WORD6 <- MIN_LOD_WARN = 4095 (0xfff) COUNTER_BANK_ID = 255 (0xff) LOD_HDW_CNT_EN = 1 COMPRESSION_EN = 1 ALPHA_IS_ON_MSB = 1 COLOR_TRANSFORM = 1 LOST_ALPHA_BITS = 15 (0xf) LOST_COLOR_BITS = 15 (0xf) SQ_IMG_RSRC_WORD7 <- 0xffffffff  Sampler state: SQ_IMG_SAMP_WORD0 <- CLAMP_X = SQ_TEX_MIRROR_ONCE_BORDER CLAMP_Y = SQ_TEX_MIRROR_ONCE_BORDER CLAMP_Z = SQ_TEX_MIRROR_ONCE_BORDER MAX_ANISO_RATIO = 7 DEPTH_COMPARE_FUNC = SQ_TEX_DEPTH_COMPARE_ALWAYS FORCE_UNNORMALIZED = 1 ANISO_THRESHOLD = 7 MC_COORD_TRUNC = 1 FORCE_DEGAMMA = 1 ANISO_BIAS = 63 (0x3f) TRUNC_COORD = 1 DISABLE_CUBE_WRAP = 1 FILTER_MODE = 3 COMPAT_MODE = 1 SQ_IMG_SAMP_WORD1 <- MIN_LOD = 4095 (0xfff) MAX_LOD = 4095 (0xfff) PERF_MIP = 15 (0xf) PERF_Z = 15 (0xf) SQ_IMG_SAMP_WORD2 <- LOD_BIAS = 16383 (0x3fff) LOD_BIAS_SEC = 63 (0x3f) XY_MAG_FILTER = 3 XY_MIN_FILTER = SQ_TEX_XY_FILTER_ANISO_BILINEAR Z_FILTER = 3 MIP_FILTER = 3 MIP_POINT_PRECLAMP = 1 DISABLE_LSB_CEIL = 1 FILTER_PREC_FIX = 1 ANISO_OVERRIDE = 1 SQ_IMG_SAMP_WORD3 <- BORDER_COLOR_PTR = 4095 (0xfff) UPGRADED_DEPTH = 1 BORDER_COLOR_TYPE = SQ_TEX_BORDER_COLOR_REGISTER !!!!! This slot was corrupted in GPU memory !!!!! ***************************************************************************** Driver-specific state: Memory-mapped registers: GRBM_STATUS <- ME0PIPE0_CMDFIFO_AVAIL = 15 (0xf) SRBM_RQ_PENDING = 1 ME0PIPE0_CF_RQ_PENDING = 1 ME0PIPE0_PF_RQ_PENDING = 1 GDS_DMA_RQ_PENDING = 1 DB_CLEAN = 1 CB_CLEAN = 1 TA_BUSY = 1 GDS_BUSY = 1 WD_BUSY_NO_DMA = 1 VGT_BUSY = 1 IA_BUSY_NO_DMA = 1 IA_BUSY = 1 SX_BUSY = 1 WD_BUSY = 1 SPI_BUSY = 1 BCI_BUSY = 1 SC_BUSY = 1 PA_BUSY = 1 DB_BUSY = 1 CP_COHERENCY_BUSY = 1 CP_BUSY = 1 CB_BUSY = 1 GUI_ACTIVE = 1 GRBM_STATUS2 <- ME0PIPE1_CMDFIFO_AVAIL = 15 (0xf) ME0PIPE1_CF_RQ_PENDING = 1 ME0PIPE1_PF_RQ_PENDING = 1 ME1PIPE0_RQ_PENDING = 1 ME1PIPE1_RQ_PENDING = 1 ME1PIPE2_RQ_PENDING = 1 ME1PIPE3_RQ_PENDING = 1 ME2PIPE0_RQ_PENDING = 1 ME2PIPE1_RQ_PENDING = 1 ME2PIPE2_RQ_PENDING = 1 ME2PIPE3_RQ_PENDING = 1 RLC_RQ_PENDING = 1 RLC_BUSY = 1 TC_BUSY = 1 TCC_CC_RESIDENT = 1 CPF_BUSY = 1 CPC_BUSY = 1 CPG_BUSY = 1 GRBM_STATUS_SE0 <- DB_CLEAN = 1 CB_CLEAN = 1 BCI_BUSY = 1 VGT_BUSY = 1 PA_BUSY = 1 TA_BUSY = 1 SX_BUSY = 1 SPI_BUSY = 1 SC_BUSY = 1 DB_BUSY = 1 CB_BUSY = 1 GRBM_STATUS_SE1 <- DB_CLEAN = 1 CB_CLEAN = 1 BCI_BUSY = 1 VGT_BUSY = 1 PA_BUSY = 1 TA_BUSY = 1 SX_BUSY = 1 SPI_BUSY = 1 SC_BUSY = 1 DB_BUSY = 1 CB_BUSY = 1 GRBM_STATUS_SE2 <- DB_CLEAN = 1 CB_CLEAN = 1 BCI_BUSY = 1 VGT_BUSY = 1 PA_BUSY = 1 TA_BUSY = 1 SX_BUSY = 1 SPI_BUSY = 1 SC_BUSY = 1 DB_BUSY = 1 CB_BUSY = 1 GRBM_STATUS_SE3 <- DB_CLEAN = 1 CB_CLEAN = 1 BCI_BUSY = 1 VGT_BUSY = 1 PA_BUSY = 1 TA_BUSY = 1 SX_BUSY = 1 SPI_BUSY = 1 SC_BUSY = 1 DB_BUSY = 1 CB_BUSY = 1 SDMA0_STATUS_REG <- IDLE = 1 REG_IDLE = 1 RB_EMPTY = 1 RB_FULL = 1 RB_CMD_IDLE = 1 RB_CMD_FULL = 1 IB_CMD_IDLE = 1 IB_CMD_FULL = 1 BLOCK_IDLE = 1 INSIDE_IB = 1 EX_IDLE = 1 EX_IDLE_POLL_TIMER_EXPIRE = 1 PACKET_READY = 1 MC_WR_IDLE = 1 SRBM_IDLE = 1 CONTEXT_EMPTY = 1 DELTA_RPTR_FULL = 1 RB_MC_RREQ_IDLE = 1 IB_MC_RREQ_IDLE = 1 MC_RD_IDLE = 1 DELTA_RPTR_EMPTY = 1 MC_RD_RET_STALL = 1 MC_RD_NO_POLL_IDLE = 1 PREV_CMD_IDLE = 1 SEM_IDLE = 1 SEM_REQ_STALL = 1 SEM_RESP_STATE = 3 INT_IDLE = 1 INT_REQ_STALL = 1 SDMA1_STATUS_REG <- IDLE = 1 REG_IDLE = 1 RB_EMPTY = 1 RB_FULL = 1 RB_CMD_IDLE = 1 RB_CMD_FULL = 1 IB_CMD_IDLE = 1 IB_CMD_FULL = 1 BLOCK_IDLE = 1 INSIDE_IB = 1 EX_IDLE = 1 EX_IDLE_POLL_TIMER_EXPIRE = 1 PACKET_READY = 1 MC_WR_IDLE = 1 SRBM_IDLE = 1 CONTEXT_EMPTY = 1 DELTA_RPTR_FULL = 1 RB_MC_RREQ_IDLE = 1 IB_MC_RREQ_IDLE = 1 MC_RD_IDLE = 1 DELTA_RPTR_EMPTY = 1 MC_RD_RET_STALL = 1 MC_RD_NO_POLL_IDLE = 1 PREV_CMD_IDLE = 1 SEM_IDLE = 1 SEM_REQ_STALL = 1 SEM_RESP_STATE = 3 INT_IDLE = 1 INT_REQ_STALL = 1 SRBM_STATUS <- UVD_RQ_PENDING = 1 SAMMSP_RQ_PENDING = 1 ACP_RQ_PENDING = 1 SMU_RQ_PENDING = 1 GRBM_RQ_PENDING = 1 HI_RQ_PENDING = 1 VMC_BUSY = 1 MCB_BUSY = 1 MCB_NON_DISPLAY_BUSY = 1 MCC_BUSY = 1 MCD_BUSY = 1 VMC1_BUSY = 1 SEM_BUSY = 1 ACP_BUSY = 1 IH_BUSY = 1 UVD_BUSY = 1 SAMMSP_BUSY = 1 GCATCL2_BUSY = 1 OSATCL2_BUSY = 1 BIF_BUSY = 1 SRBM_STATUS2 <- SDMA_RQ_PENDING = 1 TST_RQ_PENDING = 1 SDMA1_RQ_PENDING = 1 VCE0_RQ_PENDING = 1 VP8_BUSY = 1 SDMA_BUSY = 1 SDMA1_BUSY = 1 VCE0_BUSY = 1 XDMA_BUSY = 1 CHUB_BUSY = 1 SDMA2_BUSY = 1 SDMA3_BUSY = 1 SAMSCP_BUSY = 1 ISP_BUSY = 1 VCE1_BUSY = 1 ODE_BUSY = 1 SDMA2_RQ_PENDING = 1 SDMA3_RQ_PENDING = 1 SAMSCP_RQ_PENDING = 1 ISP_RQ_PENDING = 1 VCE1_RQ_PENDING = 1 SRBM_STATUS3 <- MCC0_BUSY = 1 MCC1_BUSY = 1 MCC2_BUSY = 1 MCC3_BUSY = 1 MCC4_BUSY = 1 MCC5_BUSY = 1 MCC6_BUSY = 1 MCC7_BUSY = 1 MCD0_BUSY = 1 MCD1_BUSY = 1 MCD2_BUSY = 1 MCD3_BUSY = 1 MCD4_BUSY = 1 MCD5_BUSY = 1 MCD6_BUSY = 1 MCD7_BUSY = 1 CP_STAT <- ROQ_RING_BUSY = 1 ROQ_INDIRECT1_BUSY = 1 ROQ_INDIRECT2_BUSY = 1 ROQ_STATE_BUSY = 1 DC_BUSY = 1 ATCL2IU_BUSY = 1 PFP_BUSY = 1 MEQ_BUSY = 1 ME_BUSY = 1 QUERY_BUSY = 1 SEMAPHORE_BUSY = 1 INTERRUPT_BUSY = 1 SURFACE_SYNC_BUSY = 1 DMA_BUSY = 1 RCIU_BUSY = 1 SCRATCH_RAM_BUSY = 1 CPC_CPG_BUSY = 1 CE_BUSY = 1 TCIU_BUSY = 1 ROQ_CE_RING_BUSY = 1 ROQ_CE_INDIRECT1_BUSY = 1 ROQ_CE_INDIRECT2_BUSY = 1 CP_BUSY = 1 CP_STALLED_STAT1 <- RBIU_TO_DMA_NOT_RDY_TO_RCV = 1 RBIU_TO_SEM_NOT_RDY_TO_RCV = 1 RBIU_TO_MEMWR_NOT_RDY_TO_RCV = 1 ME_HAS_ACTIVE_CE_BUFFER_FLAG = 1 ME_HAS_ACTIVE_DE_BUFFER_FLAG = 1 ME_STALLED_ON_TC_WR_CONFIRM = 1 ME_STALLED_ON_ATOMIC_RTN_DATA = 1 ME_WAITING_ON_TC_READ_DATA = 1 ME_WAITING_ON_REG_READ_DATA = 1 RCIU_WAITING_ON_GDS_FREE = 1 RCIU_WAITING_ON_GRBM_FREE = 1 RCIU_WAITING_ON_VGT_FREE = 1 RCIU_STALLED_ON_ME_READ = 1 RCIU_STALLED_ON_DMA_READ = 1 RCIU_STALLED_ON_APPEND_READ = 1 RCIU_HALTED_BY_REG_VIOLATION = 1 CP_STALLED_STAT2 <- PFP_TO_CSF_NOT_RDY_TO_RCV = 1 PFP_TO_MEQ_NOT_RDY_TO_RCV = 1 PFP_TO_RCIU_NOT_RDY_TO_RCV = 1 PFP_TO_VGT_WRITES_PENDING = 1 PFP_RCIU_READ_PENDING = 1 PFP_WAITING_ON_BUFFER_DATA = 1 ME_WAIT_ON_CE_COUNTER = 1 ME_WAIT_ON_AVAIL_BUFFER = 1 GFX_CNTX_NOT_AVAIL_TO_ME = 1 ME_RCIU_NOT_RDY_TO_RCV = 1 ME_TO_CONST_NOT_RDY_TO_RCV = 1 ME_WAITING_DATA_FROM_PFP = 1 ME_WAITING_ON_PARTIAL_FLUSH = 1 MEQ_TO_ME_NOT_RDY_TO_RCV = 1 STQ_TO_ME_NOT_RDY_TO_RCV = 1 ME_WAITING_DATA_FROM_STQ = 1 PFP_STALLED_ON_TC_WR_CONFIRM = 1 PFP_STALLED_ON_ATOMIC_RTN_DATA = 1 EOPD_FIFO_NEEDS_SC_EOP_DONE = 1 EOPD_FIFO_NEEDS_WR_CONFIRM = 1 STRMO_WR_OF_PRIM_DATA_PENDING = 1 PIPE_STATS_WR_DATA_PENDING = 1 APPEND_RDY_WAIT_ON_CS_DONE = 1 APPEND_RDY_WAIT_ON_PS_DONE = 1 APPEND_WAIT_ON_WR_CONFIRM = 1 APPEND_ACTIVE_PARTITION = 1 APPEND_WAITING_TO_SEND_MEMWRITE = 1 SURF_SYNC_NEEDS_IDLE_CNTXS = 1 SURF_SYNC_NEEDS_ALL_CLEAN = 1 CP_STALLED_STAT3 <- CE_TO_CSF_NOT_RDY_TO_RCV = 1 CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV = 1 CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER = 1 CE_TO_RAM_INIT_NOT_RDY = 1 CE_TO_RAM_DUMP_NOT_RDY = 1 CE_TO_RAM_WRITE_NOT_RDY = 1 CE_TO_INC_FIFO_NOT_RDY_TO_RCV = 1 CE_TO_WR_FIFO_NOT_RDY_TO_RCV = 1 CE_WAITING_ON_BUFFER_DATA = 1 CE_WAITING_ON_CE_BUFFER_FLAG = 1 CE_WAITING_ON_DE_COUNTER = 1 CE_WAITING_ON_DE_COUNTER_UNDERFLOW = 1 TCIU_WAITING_ON_FREE = 1 TCIU_WAITING_ON_TAGS = 1 CE_STALLED_ON_TC_WR_CONFIRM = 1 CE_STALLED_ON_ATOMIC_RTN_DATA = 1 ATCL2IU_WAITING_ON_FREE = 1 ATCL2IU_WAITING_ON_TAGS = 1 ATCL1_WAITING_ON_TRANS = 1 CP_CPC_STATUS <- MEC1_BUSY = 1 MEC2_BUSY = 1 DC0_BUSY = 1 DC1_BUSY = 1 RCIU1_BUSY = 1 RCIU2_BUSY = 1 ROQ1_BUSY = 1 ROQ2_BUSY = 1 TCIU_BUSY = 1 SCRATCH_RAM_BUSY = 1 QU_BUSY = 1 ATCL2IU_BUSY = 1 CPG_CPC_BUSY = 1 CPF_CPC_BUSY = 1 CPC_BUSY = 1 CP_CPC_BUSY_STAT <- MEC1_LOAD_BUSY = 1 MEC1_SEMAPOHRE_BUSY = 1 MEC1_MUTEX_BUSY = 1 MEC1_MESSAGE_BUSY = 1 MEC1_EOP_QUEUE_BUSY = 1 MEC1_IQ_QUEUE_BUSY = 1 MEC1_IB_QUEUE_BUSY = 1 MEC1_TC_BUSY = 1 MEC1_DMA_BUSY = 1 MEC1_PARTIAL_FLUSH_BUSY = 1 MEC1_PIPE0_BUSY = 1 MEC1_PIPE1_BUSY = 1 MEC1_PIPE2_BUSY = 1 MEC1_PIPE3_BUSY = 1 MEC2_LOAD_BUSY = 1 MEC2_SEMAPOHRE_BUSY = 1 MEC2_MUTEX_BUSY = 1 MEC2_MESSAGE_BUSY = 1 MEC2_EOP_QUEUE_BUSY = 1 MEC2_IQ_QUEUE_BUSY = 1 MEC2_IB_QUEUE_BUSY = 1 MEC2_TC_BUSY = 1 MEC2_DMA_BUSY = 1 MEC2_PARTIAL_FLUSH_BUSY = 1 MEC2_PIPE0_BUSY = 1 MEC2_PIPE1_BUSY = 1 MEC2_PIPE2_BUSY = 1 MEC2_PIPE3_BUSY = 1 CP_CPC_STALLED_STAT1 <- RCIU_TX_FREE_STALL = 1 RCIU_PRIV_VIOLATION = 1 TCIU_TX_FREE_STALL = 1 MEC1_DECODING_PACKET = 1 MEC1_WAIT_ON_RCIU = 1 MEC1_WAIT_ON_RCIU_READ = 1 MEC1_WAIT_ON_ROQ_DATA = 1 MEC2_DECODING_PACKET = 1 MEC2_WAIT_ON_RCIU = 1 MEC2_WAIT_ON_RCIU_READ = 1 MEC2_WAIT_ON_ROQ_DATA = 1 ATCL2IU_WAITING_ON_FREE = 1 ATCL2IU_WAITING_ON_TAGS = 1 ATCL1_WAITING_ON_TRANS = 1 CP_CPF_STATUS <- POST_WPTR_GFX_BUSY = 1 CSF_BUSY = 1 ROQ_ALIGN_BUSY = 1 ROQ_RING_BUSY = 1 ROQ_INDIRECT1_BUSY = 1 ROQ_INDIRECT2_BUSY = 1 ROQ_STATE_BUSY = 1 ROQ_CE_RING_BUSY = 1 ROQ_CE_INDIRECT1_BUSY = 1 ROQ_CE_INDIRECT2_BUSY = 1 SEMAPHORE_BUSY = 1 INTERRUPT_BUSY = 1 TCIU_BUSY = 1 HQD_BUSY = 1 PRT_BUSY = 1 ATCL2IU_BUSY = 1 CPF_GFX_BUSY = 1 CPF_CMP_BUSY = 1 GRBM_CPF_STAT_BUSY = 3 CPC_CPF_BUSY = 1 CPF_BUSY = 1 CP_CPF_BUSY_STAT <- REG_BUS_FIFO_BUSY = 1 CSF_RING_BUSY = 1 CSF_INDIRECT1_BUSY = 1 CSF_INDIRECT2_BUSY = 1 CSF_STATE_BUSY = 1 CSF_CE_INDR1_BUSY = 1 CSF_CE_INDR2_BUSY = 1 CSF_ARBITER_BUSY = 1 CSF_INPUT_BUSY = 1 OUTSTANDING_READ_TAGS = 1 HPD_PROCESSING_EOP_BUSY = 1 HQD_DISPATCH_BUSY = 1 HQD_IQ_TIMER_BUSY = 1 HQD_DMA_OFFLOAD_BUSY = 1 HQD_WAIT_SEMAPHORE_BUSY = 1 HQD_SIGNAL_SEMAPHORE_BUSY = 1 HQD_MESSAGE_BUSY = 1 HQD_PQ_FETCHER_BUSY = 1 HQD_IB_FETCHER_BUSY = 1 HQD_IQ_FETCHER_BUSY = 1 HQD_EOP_FETCHER_BUSY = 1 HQD_CONSUMED_RPTR_BUSY = 1 HQD_FETCHER_ARB_BUSY = 1 HQD_ROQ_ALIGN_BUSY = 1 HQD_ROQ_EOP_BUSY = 1 HQD_ROQ_IQ_BUSY = 1 HQD_ROQ_PQ_BUSY = 1 HQD_ROQ_IB_BUSY = 1 HQD_WPTR_POLL_BUSY = 1 HQD_PQ_BUSY = 1 HQD_IB_BUSY = 1 CP_CPF_STALLED_STAT1 <- RING_FETCHING_DATA = 1 INDR1_FETCHING_DATA = 1 INDR2_FETCHING_DATA = 1 STATE_FETCHING_DATA = 1 TCIU_WAITING_ON_FREE = 1 TCIU_WAITING_ON_TAGS = 1 ATCL2IU_WAITING_ON_FREE = 1 ATCL2IU_WAITING_ON_TAGS = 1 ATCL1_WAITING_ON_TRANS = 1 The number of active waves = 0 Active waves (raw data):  Wave information:  Last 60 lines of dmesg: [ 16.689560] uvcvideo 1-5:1.0: Entity type for entity Processing 2 was not initialized! [ 16.689561] uvcvideo 1-5:1.0: Entity type for entity Camera 1 was not initialized! [ 16.689652] input: Integrated_Webcam_HD: Integrate as /devices/pci0000:00/0000:00:14.0/usb1/1-5/1-5:1.0/input/input28 [ 16.690256] uvcvideo: Unknown video format 00000032-0002-0010-8000-00aa00389b71 [ 16.690259] uvcvideo: Found UVC 1.00 device Integrated_Webcam_HD (0bda:58f4) [ 16.692283] uvcvideo: Unable to create debugfs 1-2 directory. [ 16.692503] uvcvideo 1-5:1.2: Entity type for entity Extension 10 was not initialized! [ 16.692504] uvcvideo 1-5:1.2: Entity type for entity Extension 12 was not initialized! [ 16.692505] uvcvideo 1-5:1.2: Entity type for entity Processing 9 was not initialized! [ 16.692506] uvcvideo 1-5:1.2: Entity type for entity Camera 11 was not initialized! [ 16.692629] input: Integrated_Webcam_HD: Integrate as /devices/pci0000:00/0000:00:14.0/usb1/1-5/1-5:1.2/input/input29 [ 16.692750] usbcore: registered new interface driver uvcvideo [ 16.692751] USB Video Class driver (1.1.1) [ 17.655928] EXT4-fs (nvme0n1p2): mounted filesystem with ordered data mode. Opts: (null) [ 17.758120] RPC: Registered named UNIX socket transport module. [ 17.758121] RPC: Registered udp transport module. [ 17.758122] RPC: Registered tcp transport module. [ 17.758122] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 17.877384] Bluetooth: BNEP (Ethernet Emulation) ver 1.3 [ 17.877385] Bluetooth: BNEP filters: protocol multicast [ 17.877389] Bluetooth: BNEP socket layer initialized [ 18.321762] IPv6: ADDRCONF(NETDEV_UP): wlp2s0: link is not ready [ 18.577232] [drm] dce_get_required_clocks_state: clocks unsupported disp_clk 709776 pix_clk 533250 [ 19.014242] ath10k_pci 0000:02:00.0: Unknown eventid: 118809 [ 19.017162] ath10k_pci 0000:02:00.0: Unknown eventid: 90118 [ 19.072128] IPv6: ADDRCONF(NETDEV_UP): wlp2s0: link is not ready [ 19.832273] ath10k_pci 0000:02:00.0: Unknown eventid: 118809 [ 19.835309] ath10k_pci 0000:02:00.0: Unknown eventid: 90118 [ 19.889831] IPv6: ADDRCONF(NETDEV_UP): wlp2s0: link is not ready [ 19.966195] IPv6: ADDRCONF(NETDEV_UP): wlp2s0: link is not ready [ 20.163971] bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your scripts to load br_netfilter if you need this. [ 20.170885] tun: Universal TUN/TAP device driver, 1.6 [ 20.172877] virbr0: port 1(virbr0-nic) entered blocking state [ 20.172879] virbr0: port 1(virbr0-nic) entered disabled state [ 20.172963] device virbr0-nic entered promiscuous mode [ 20.246435] virbr0: port 1(virbr0-nic) entered blocking state [ 20.246438] virbr0: port 1(virbr0-nic) entered listening state [ 20.283186] virbr0: port 1(virbr0-nic) entered disabled state [ 23.548801] fbcon: Taking over console [ 23.549082] Console: switching to colour frame buffer device 240x67 [ 23.778795] IPv6: ADDRCONF(NETDEV_UP): wlp2s0: link is not ready [ 27.584438] wlp2s0: authenticate with 64:7c:34:3f:c3:b0 [ 27.629401] wlp2s0: send auth to 64:7c:34:3f:c3:b0 (try 1/3) [ 27.631441] wlp2s0: authenticated [ 27.638956] wlp2s0: associate with 64:7c:34:3f:c3:b0 (try 1/3) [ 27.642970] wlp2s0: RX AssocResp from 64:7c:34:3f:c3:b0 (capab=0x411 status=0 aid=1) [ 27.645462] wlp2s0: associated [ 27.645528] ath: EEPROM regdomain: 0x815c [ 27.645528] ath: EEPROM indicates we should expect a country code [ 27.645529] ath: doing EEPROM country->regdmn map search [ 27.645529] ath: country maps to regdmn code: 0x37 [ 27.645530] ath: Country alpha2 being used: HU [ 27.645530] ath: Regpair used: 0x37 [ 27.645531] ath: regdomain 0x815c dynamically updated by country element [ 27.668478] IPv6: ADDRCONF(NETDEV_CHANGE): wlp2s0: link becomes ready [ 30.416614] Bluetooth: RFCOMM TTY layer initialized [ 30.416622] Bluetooth: RFCOMM socket layer initialized [ 30.416700] Bluetooth: RFCOMM ver 1.11 [ 32.774891] fuse init (API version 7.27) [ 34.803496] rfkill: input handler disabled