From 612b449e4e53684260cc73d5c2b36dce629f9038 Mon Sep 17 00:00:00 2001 From: Andrii Simiklit Date: Fri, 25 Jan 2019 15:03:07 +0200 Subject: [PATCH] i965: remit index buffer state on prim_restart.enable_cut_index change. The index buffer (ib) state under SNB and IVB has an flag CutIndexEnable which requires us to re-emit the index buffer state when we use *the same index buffer* for rendering of primitives which are supported and unsupported by hw index restart functionality because this situation leads to 'prim_restart.enable_cut_index' flag change. Without re-emit of ib state the GPU interprets the 0xff or 0xffff as an index of real vertex and could read some trash from memory. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109451 Signed-off-by: Andrii Simiklit --- src/mesa/drivers/dri/i965/brw_context.h | 10 ++++++++++ src/mesa/drivers/dri/i965/brw_draw_upload.c | 13 +++++++++++++ src/mesa/drivers/dri/i965/genX_state_upload.c | 6 +++++- 3 files changed, 28 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 66fe5b3a8a0..8cda2a4a204 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -1006,6 +1006,16 @@ struct brw_context /* High bits of the last seen index buffer address (for workarounds). */ uint16_t last_bo_high_bits; + + /* The index buffer state under SNB and IVB has an flag CutIndexEnable + * which requires us to re-emit the index buffer state when we use + * *the same index buffer* for rendering of primitives which are + * supported and unsupported by hw index restart functionality because + * this situation leads to 'prim_restart.enable_cut_index' flag change. + * Without ib state re-emit the GPU interprets the 0xff or 0xffff + * as an index of real vertex and could read some trash from memory. + */ + bool enable_cut_index; } ib; /* Active vertex program: diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c index dfbc45fe938..850559d851d 100644 --- a/src/mesa/drivers/dri/i965/brw_draw_upload.c +++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c @@ -732,10 +732,15 @@ brw_upload_indices(struct brw_context *brw) struct gl_buffer_object *bufferobj; GLuint offset; GLuint ib_type_size; + struct gen_device_info *devinfo; + bool ivb_or_less; if (index_buffer == NULL) return; + devinfo = &brw->screen->devinfo; + ivb_or_less = (devinfo->gen < 8 && !devinfo->is_haswell); + ib_type_size = index_buffer->index_size; ib_size = index_buffer->count ? ib_type_size * index_buffer->count : index_buffer->obj->Size; @@ -776,6 +781,14 @@ brw_upload_indices(struct brw_context *brw) brw->ib.index_size = index_buffer->index_size; brw->ctx.NewDriverState |= BRW_NEW_INDEX_BUFFER; } + + /* We need to reimit an index buffer state each time + * when cut index flag is changed + */ + if(ivb_or_less && brw->prim_restart.enable_cut_index != brw->ib.enable_cut_index) { + brw->ib.enable_cut_index = brw->prim_restart.enable_cut_index; + brw->ctx.NewDriverState |= BRW_NEW_INDEX_BUFFER; + } } const struct brw_tracked_state brw_indices = { diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c index dcdfb3c9292..3436e420133 100644 --- a/src/mesa/drivers/dri/i965/genX_state_upload.c +++ b/src/mesa/drivers/dri/i965/genX_state_upload.c @@ -996,9 +996,13 @@ genX(emit_index_buffer)(struct brw_context *brw) vf_invalidate_for_ib_48bit_transition(brw); +#if GEN_GEN < 8 && !GEN_IS_HASWELL + assert(brw->ib.enable_cut_index == brw->prim_restart.enable_cut_index); +#endif + brw_batch_emit(brw, GENX(3DSTATE_INDEX_BUFFER), ib) { #if GEN_GEN < 8 && !GEN_IS_HASWELL - ib.CutIndexEnable = brw->prim_restart.enable_cut_index; + ib.CutIndexEnable = brw->ib.enable_cut_index; #endif ib.IndexFormat = brw_get_index_type(index_buffer->index_size); -- 2.17.1