From a21e53d226daebbe91cc6e935a3750d8970b06bc Mon Sep 17 00:00:00 2001 From: Manasi Navare Date: Tue, 26 Mar 2019 15:09:12 -0700 Subject: [PATCH 1/2] drm/edid: Add a EDID edp panel quirk for forcing max lane count Signed-off-by: Manasi Navare --- drivers/gpu/drm/drm_edid.c | 9 +++++++++ include/drm/drm_connector.h | 5 +++++ 2 files changed, 14 insertions(+) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index fa39592ebc0a..4bfbc6e30e5f 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -84,6 +84,8 @@ #define EDID_QUIRK_FORCE_10BPC (1 << 11) /* Non desktop display (i.e. HMD) */ #define EDID_QUIRK_NON_DESKTOP (1 << 12) +/* Force max lane count */ +#define EDID_QUIRK_FORCE_MAX_LANE_COUNT (1 << 13) struct detailed_mode_closure { struct drm_connector *connector; @@ -199,6 +201,9 @@ static const struct edid_quirk { /* OSVR HDK and HDK2 VR Headsets */ { "SVR", 0x1019, EDID_QUIRK_NON_DESKTOP }, + + /* SHP eDP 1.4 panel only works with max lane count */ + { "SHP", 0x149a, EDID_QUIRK_FORCE_MAX_LANE_COUNT }, }; /* @@ -4473,6 +4478,7 @@ drm_reset_display_info(struct drm_connector *connector) memset(&info->hdmi, 0, sizeof(info->hdmi)); info->non_desktop = 0; + info->force_max_lane_count = 0; } u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edid) @@ -4754,6 +4760,9 @@ int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) if (quirks & EDID_QUIRK_FORCE_12BPC) connector->display_info.bpc = 12; + if (quirks & EDID_QUIRK_FORCE_MAX_LANE_COUNT) + connector->display_info.force_max_lane_count = true; + return num_modes; } EXPORT_SYMBOL(drm_add_edid_modes); diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h index bb3bd8e1633a..319d4783d3e3 100644 --- a/include/drm/drm_connector.h +++ b/include/drm/drm_connector.h @@ -467,6 +467,11 @@ struct drm_display_info { * @non_desktop: Non desktop display (HMD). */ bool non_desktop; + + /** + * @force_max_lane_count: Link training requires max lane count to pass + */ + bool force_max_lane_count; }; int drm_display_info_set_bus_formats(struct drm_display_info *info, -- 2.19.1