ATTENTION: default value of option vblank_mode overridden by environment.
GLSL IR for native fragment shader 0:
(
(declare (location=1 shader_in ) vec4 gl_Color)
(declare (location=2 shader_out ) vec4 gl_FragColor)
( function main
  (signature void
    (parameters
    )
    (
      (assign  (xyzw) (var_ref gl_FragColor)  (var_ref gl_Color) ) 
    ))

)

)


NIR (SSA form) for fragment shader:
shader: MESA_SHADER_FRAGMENT
name: GLSL0
inputs: 0
outputs: 0
uniforms: 0
shared: 0
decl_var shader_in INTERP_MODE_SMOOTH vec4 gl_Color (VARYING_SLOT_COL0, 1, 0)
decl_var shader_out INTERP_MODE_NONE vec4 gl_FragColor (FRAG_RESULT_COLOR, 4, 0)
decl_function main (0 params)

impl main {
	block block_0:
	/* preds: */
	vec2 32 ssa_0 = intrinsic load_barycentric_pixel () (1) /* interp_mode=1 */
	vec1 32 ssa_1 = load_const (0x00000000 /* 0.000000 */)
	vec4 32 ssa_2 = intrinsic load_interpolated_input (ssa_0, ssa_1) (1, 0) /* base=1 */ /* component=0 */
	intrinsic store_output (ssa_2, ssa_1) (4, 15, 0) /* base=4 */ /* wrmask=xyzw */ /* component=0 */	/* gl_FragColor */
	/* succs: block_0 */
	block block_0:
}

NIR (final form) for fragment shader:
shader: MESA_SHADER_FRAGMENT
name: GLSL0
inputs: 0
outputs: 0
uniforms: 0
shared: 0
decl_var shader_in INTERP_MODE_SMOOTH vec4 gl_Color (VARYING_SLOT_COL0, 1, 0)
decl_var shader_out INTERP_MODE_NONE vec4 gl_FragColor (FRAG_RESULT_COLOR, 4, 0)
decl_function main (0 params)

impl main {
	block block_0:
	/* preds: */
	vec2 32 ssa_0 = intrinsic load_barycentric_pixel () (1) /* interp_mode=1 */
	vec1 32 ssa_1 = load_const (0x00000000 /* 0.000000 */)
	vec4 32 ssa_2 = intrinsic load_interpolated_input (ssa_0, ssa_1) (1, 0) /* base=1 */ /* component=0 */
	intrinsic store_output (ssa_2, ssa_1) (4, 15, 0) /* base=4 */ /* wrmask=xyzw */ /* component=0 */	/* gl_FragColor */
	/* succs: block_0 */
	block block_0:
}

Native code for unnamed fragment shader GLSL0
SIMD8 shader: 5 instructions. 0 loops. 24 cycles. 0:0 spills:fills. Promoted 0 constants. Compacted 80 to 48 bytes (40%)
   START B0 (24 cycles)
pln(8)          g124<1>F        g4<0,1,0>F      g2<8,8,1>F      { align1 1Q compacted };
pln(8)          g125<1>F        g4.4<0,1,0>F    g2<8,8,1>F      { align1 1Q compacted };
pln(8)          g126<1>F        g5<0,1,0>F      g2<8,8,1>F      { align1 1Q compacted };
pln(8)          g127<1>F        g5.4<0,1,0>F    g2<8,8,1>F      { align1 1Q compacted };
sendc(8)        null<1>UW       g124<0,1,0>F
                            render RT write SIMD8 LastRT Surface = 0 mlen 4 rlen 0 { align1 1Q EOT };
   END B0

Native code for unnamed fragment shader GLSL0
SIMD16 shader: 5 instructions. 0 loops. 34 cycles. 0:0 spills:fills. Promoted 0 constants. Compacted 80 to 48 bytes (40%)
   START B0 (34 cycles)
pln(16)         g120<1>F        g6<0,1,0>F      g2<8,8,1>F      { align1 1H compacted };
pln(16)         g122<1>F        g6.4<0,1,0>F    g2<8,8,1>F      { align1 1H compacted };
pln(16)         g124<1>F        g7<0,1,0>F      g2<8,8,1>F      { align1 1H compacted };
pln(16)         g126<1>F        g7.4<0,1,0>F    g2<8,8,1>F      { align1 1H compacted };
sendc(16)       null<1>UW       g120<0,1,0>F
                            render RT write SIMD16 LastRT Surface = 0 mlen 8 rlen 0 { align1 1H EOT };
   END B0

NIR (SSA form) for fragment shader:
shader: MESA_SHADER_FRAGMENT
name: BLORP-clear
inputs: 0
outputs: 0
uniforms: 0
shared: 0
decl_var shader_in INTERP_MODE_FLAT vec4 clear_color (VARYING_SLOT_VAR0, 31, 0)
decl_var shader_out INTERP_MODE_NONE vec4 gl_FragColor (FRAG_RESULT_COLOR, 4, 0)
decl_function main (0 params)

impl main {
	block block_0:
	/* preds: */
	vec1 32 ssa_0 = load_const (0x00000000 /* 0.000000 */)
	vec4 32 ssa_1 = intrinsic load_input (ssa_0) (31, 0) /* base=31 */ /* component=0 */	/* clear_color */
	intrinsic store_output (ssa_1, ssa_0) (4, 15, 0) /* base=4 */ /* wrmask=xyzw */ /* component=0 */	/* gl_FragColor */
	/* succs: block_0 */
	block block_0:
}

NIR (final form) for fragment shader:
shader: MESA_SHADER_FRAGMENT
name: BLORP-clear
inputs: 0
outputs: 0
uniforms: 0
shared: 0
decl_var shader_in INTERP_MODE_FLAT vec4 clear_color (VARYING_SLOT_VAR0, 31, 0)
decl_var shader_out INTERP_MODE_NONE vec4 gl_FragColor (FRAG_RESULT_COLOR, 4, 0)
decl_function main (0 params)

impl main {
	block block_0:
	/* preds: */
	vec1 32 ssa_0 = load_const (0x00000000 /* 0.000000 */)
	vec4 32 ssa_1 = intrinsic load_input (ssa_0) (31, 0) /* base=31 */ /* component=0 */	/* clear_color */
	intrinsic store_output (ssa_1, ssa_0) (4, 15, 0) /* base=4 */ /* wrmask=xyzw */ /* component=0 */	/* gl_FragColor */
	/* succs: block_0 */
	block block_0:
}

Native code for unnamed fragment shader BLORP-clear
SIMD16 shader: 2 instructions. 0 loops. 0 cycles. 0:0 spills:fills. Promoted 0 constants. Compacted 32 to 32 bytes (0%)
   START B0 (0 cycles)
mov(4)          g114<1>F        g2.3<8,2,4>F                    { align1 WE_all 1N };
sendc(16)       null<1>UW       g114<0,1,0>F
                            render RT write SIMD16/RepData LastRT Surface = 0 mlen 1 rlen 0 { align1 1H EOT };
   END B0

GLSL IR for native fragment shader 1:
(
(declare (location=0 shader_in ) vec4 gl_FragCoord)
(declare (location=31 shader_in flat) uvec4 fastuidraw_uint_varying0)
(declare (location=32 shader_in flat) uvec4 fastuidraw_uint_varying1)
(declare (location=33 shader_in flat) uvec4 fastuidraw_uint_varying2)
(declare (location=34 shader_in ) vec4 fastuidraw_float_smooth_varying0)
(declare (location=35 shader_in ) vec4 fastuidraw_float_smooth_varying1)
(declare (location=36 shader_in ) float fastuidraw_float_smooth_varying2)
(declare (location=37 shader_in flat) vec4 fastuidraw_float_flat_varying0)
(declare (location=38 shader_in flat) vec4 fastuidraw_float_flat_varying1)
(declare (location=39 shader_in flat) vec4 fastuidraw_float_flat_varying2)
(declare (location=40 shader_in flat) vec4 fastuidraw_float_flat_varying3)
(declare (location=41 shader_in flat) vec4 fastuidraw_float_flat_varying4)
(declare (location=42 shader_in flat) vec3 fastuidraw_float_flat_varying5)
(declare (location=0 readonly restrict shader_storage ) (array uvec4 0) fastuidraw_painterStore)
(declare (binding=1 location=0 readonly restrict shader_storage ) (array uint 0) fastuidraw_glyphDataStore_data)
(declare (location=0 uniform ) (array vec4 2) fastuidraw_uniforms)
(declare (location=3 uniform ) sampler1DArray fastuidraw_colorStopAtlas)
(declare (binding=2 location=4 uniform ) sampler2DArray fastuidraw_imageAtlasLinear)
(declare (binding=1 location=5 uniform ) sampler2DArray fastuidraw_imageAtlasNearest)
(declare (binding=3 location=6 uniform ) usampler2DArray fastuidraw_imageIndexAtlas)
(declare (binding=5 location=7 uniform ) (array sampler2D 8) fastuidraw_external_texture)
(declare () ivec2 fastuidraw_deferred_buffer_offset)
(declare (binding=4 location=8 uniform ) sampler2D fastuidraw_deferred_coverage_buffer)
(declare (location=4 shader_out ) vec4 fastuidraw_final_color0)
(declare (location=4 shader_out ) vec4 fastuidraw_final_color1)
( function main
  (signature void
    (parameters
    )
    (
      (declare () uvec2 tmp)
      (declare () vec4 v)
      (assign  (xyzw) (var_ref v)  (constant vec4 (0.000000 0.000000 0.000000 0.000000)) ) 
      (assign  (x) (var_ref tmp)  (expression uint >> (expression uint << (swiz w (var_ref fastuidraw_uint_varying2) )(constant uint (16)) ) (constant uint (16)) ) ) 
      (assign  (y) (var_ref tmp)  (expression uint >> (swiz w (var_ref fastuidraw_uint_varying2) )(constant uint (16)) ) ) 
      (assign  (xy) (var_ref fastuidraw_deferred_buffer_offset)  (expression ivec2 + (expression ivec2 u2i (var_ref tmp) ) (constant ivec2 (-32768 -32768)) ) ) 
      (if (expression bool != (swiz x (var_ref fastuidraw_uint_varying2) )(constant uint (4294967295)) ) (
        (declare () vec4 b)
        (if (expression bool != (expression uint & (swiz y (var_ref fastuidraw_uint_varying2) )(constant uint (2147483648)) ) (constant uint (0)) ) (
          (declare () vec4 return_value)
          (declare () vec2 dpdy)
          (declare () vec2 dpdx)
          (declare () vec2 p)
          (declare (temporary ) vec4 compiler_temp)
          (assign  (x) (var_ref compiler_temp)  (swiz w (var_ref fastuidraw_float_flat_varying4) )) 
          (assign  (y) (var_ref compiler_temp)  (swiz x (var_ref fastuidraw_float_flat_varying5) )) 
          (assign  (z) (var_ref compiler_temp)  (swiz y (var_ref fastuidraw_float_flat_varying5) )) 
          (assign  (w) (var_ref compiler_temp)  (swiz z (var_ref fastuidraw_float_flat_varying5) )) 
          (assign  (xyzw) (var_ref return_value)  (var_ref compiler_temp) ) 
          (declare (temporary ) vec2 compiler_temp@2)
          (assign  (x) (var_ref compiler_temp@2)  (swiz w (var_ref fastuidraw_float_smooth_varying1) )) 
          (assign  (y) (var_ref compiler_temp@2)  (var_ref fastuidraw_float_smooth_varying2) ) 
          (assign  (xy) (var_ref p)  (var_ref compiler_temp@2) ) 
          (assign  (xy) (var_ref dpdx)  (expression vec2 dFdx (var_ref compiler_temp@2) ) ) 
          (assign  (xy) (var_ref dpdy)  (expression vec2 dFdy (var_ref compiler_temp@2) ) ) 
          (if (expression bool != (expression uint & (swiz y (var_ref fastuidraw_uint_varying2) )(constant uint (8192)) ) (constant uint (0)) ) (
            (declare () uint y_spread)
            (declare (temporary ) uint compiler_temp@3)
            (assign  (x) (var_ref compiler_temp@3)  (expression uint >> (expression uint << (swiz y (var_ref fastuidraw_uint_varying2) )(constant uint (16)) ) (constant uint (30)) ) ) 
            (assign  (x) (var_ref y_spread)  (expression uint >> (expression uint << (swiz y (var_ref fastuidraw_uint_varying2) )(constant uint (14)) ) (constant uint (30)) ) ) 
            (assign  (xy) (var_ref p)  (expression vec2 + (var_ref compiler_temp@2) (expression vec2 neg (swiz xy (var_ref fastuidraw_float_flat_varying0) )) ) ) 
            (declare (temporary ) float compiler_temp@4)
            (assign  (x) (var_ref compiler_temp@4)  (swiz x (var_ref p) )) 
            (if (expression bool == (var_ref compiler_temp@3) (constant uint (1)) ) (
              (assign  (x) (var_ref compiler_temp@4)  (expression float min (expression float max (expression float abs (swiz x (var_ref p) )) (constant float (0.000000)) ) (swiz z (var_ref fastuidraw_float_flat_varying0) )) ) 
            )
            (
              (if (expression bool == (var_ref compiler_temp@3) (constant uint (2)) ) (
                (assign  (x) (var_ref compiler_temp@4)  (expression float % (swiz x (var_ref p) )(swiz z (var_ref fastuidraw_float_flat_varying0) )) ) 
              )
              (
                (if (expression bool == (var_ref compiler_temp@3) (constant uint (3)) ) (
                  (assign  (x) (var_ref compiler_temp@4)  (expression float + (swiz z (var_ref fastuidraw_float_flat_varying0) )(expression float neg (expression float abs (expression float + (expression float % (swiz x (var_ref p) )(expression float * (constant float (2.000000)) (swiz z (var_ref fastuidraw_float_flat_varying0) )) ) (expression float neg (swiz z (var_ref fastuidraw_float_flat_varying0) )) ) ) ) ) ) 
                )
                (
                  (assign  (x) (var_ref compiler_temp@4)  (expression float min (expression float max (swiz x (var_ref p) )(constant float (0.000000)) ) (swiz z (var_ref fastuidraw_float_flat_varying0) )) ) 
                ))

              ))

            ))

            (assign  (x) (var_ref p)  (var_ref compiler_temp@4) ) 
            (declare (temporary ) float compiler_temp@5)
            (assign  (x) (var_ref compiler_temp@5)  (swiz y (var_ref p) )) 
            (if (expression bool == (var_ref y_spread) (constant uint (1)) ) (
              (assign  (x) (var_ref compiler_temp@5)  (expression float min (expression float max (expression float abs (swiz y (var_ref p) )) (constant float (0.000000)) ) (swiz w (var_ref fastuidraw_float_flat_varying0) )) ) 
            )
            (
              (if (expression bool == (var_ref y_spread) (constant uint (2)) ) (
                (assign  (x) (var_ref compiler_temp@5)  (expression float % (swiz y (var_ref p) )(swiz w (var_ref fastuidraw_float_flat_varying0) )) ) 
              )
              (
                (if (expression bool == (var_ref y_spread) (constant uint (3)) ) (
                  (assign  (x) (var_ref compiler_temp@5)  (expression float + (swiz w (var_ref fastuidraw_float_flat_varying0) )(expression float neg (expression float abs (expression float + (expression float % (swiz y (var_ref p) )(expression float * (constant float (2.000000)) (swiz w (var_ref fastuidraw_float_flat_varying0) )) ) (expression float neg (swiz w (var_ref fastuidraw_float_flat_varying0) )) ) ) ) ) ) 
                )
                (
                  (assign  (x) (var_ref compiler_temp@5)  (expression float min (expression float max (swiz y (var_ref p) )(constant float (0.000000)) ) (swiz w (var_ref fastuidraw_float_flat_varying0) )) ) 
                ))

              ))

            ))

            (assign  (y) (var_ref p)  (var_ref compiler_temp@5) ) 
            (assign  (xy) (var_ref p)  (expression vec2 + (var_ref p) (swiz xy (var_ref fastuidraw_float_flat_varying0) )) ) 
          )
          ())

          (declare (temporary ) uint compiler_temp@6)
          (assign  (x) (var_ref compiler_temp@6)  (expression uint >> (expression uint << (swiz y (var_ref fastuidraw_uint_varying2) )(constant uint (21)) ) (constant uint (30)) ) ) 
          (if (expression bool != (var_ref compiler_temp@6) (constant uint (0)) ) (
            (declare () float t)
            (declare (temporary ) float compiler_temp@7)
            (declare () float t@8)
            (assign  (x) (var_ref t@8)  (constant float (1.000000)) ) 
            (if (expression bool == (var_ref compiler_temp@6) (constant uint (2)) ) (
              (declare (temporary ) float good)
              (declare () float recip_two_a)
              (declare () float t1)
              (declare () float t0)
              (declare () float desc)
              (declare () float b@9)
              (declare () float a)
              (declare () float delta_r)
              (declare () float t@10)
              (declare () vec2 delta_p)
              (declare () vec2 q)
              (assign  (xy) (var_ref q)  (expression vec2 + (var_ref p) (expression vec2 neg (swiz xy (var_ref fastuidraw_float_flat_varying1) )) ) ) 
              (assign  (xy) (var_ref delta_p)  (expression vec2 + (swiz zw (var_ref fastuidraw_float_flat_varying1) )(expression vec2 neg (swiz xy (var_ref fastuidraw_float_flat_varying1) )) ) ) 
              (assign  (x) (var_ref delta_r)  (expression float + (swiz y (var_ref fastuidraw_float_flat_varying2) )(expression float neg (swiz x (var_ref fastuidraw_float_flat_varying2) )) ) ) 
              (assign  (x) (var_ref b@9)  (expression float * (constant float (2.000000)) (expression float + (expression float dot (var_ref q) (var_ref delta_p) ) (expression float neg (expression float * (swiz x (var_ref fastuidraw_float_flat_varying2) )(var_ref delta_r) ) ) ) ) ) 
              (assign  (x) (var_ref a)  (expression float + (expression float dot (var_ref delta_p) (var_ref delta_p) ) (expression float neg (expression float * (var_ref delta_r) (var_ref delta_r) ) ) ) ) 
              (assign  (x) (var_ref desc)  (expression float + (expression float * (var_ref b@9) (var_ref b@9) ) (expression float neg (expression float * (expression float * (constant float (4.000000)) (var_ref a) ) (expression float + (expression float dot (var_ref q) (var_ref q) ) (expression float neg (expression float * (swiz x (var_ref fastuidraw_float_flat_varying2) )(swiz x (var_ref fastuidraw_float_flat_varying2) )) ) ) ) ) ) ) 
              (if (expression bool < (var_ref desc) (constant float (0.000000)) ) (
                (assign  (x) (var_ref good)  (constant float (0.000000)) ) 
                (assign  (x) (var_ref t@10)  (constant float (0.000000)) ) 
              )
              (
                (declare () vec2 G)
                (assign  (x) (var_ref good)  (constant float (1.000000)) ) 
                (declare (temporary ) float compiler_temp@11)
                (assign  (x) (var_ref compiler_temp@11)  (expression float sqrt (expression float abs (var_ref desc) ) ) ) 
                (assign  (x) (var_ref desc)  (var_ref compiler_temp@11) ) 
                (assign  (x) (var_ref recip_two_a)  (expression float * (constant float (0.500000)) (expression float rcp (var_ref a) ) ) ) 
                (assign  (x) (var_ref t0)  (expression float * (expression float + (expression float neg (var_ref b@9) ) (var_ref compiler_temp@11) ) (var_ref recip_two_a) ) ) 
                (assign  (x) (var_ref t1)  (expression float * (expression float + (expression float neg (var_ref b@9) ) (expression float neg (var_ref compiler_temp@11) ) ) (var_ref recip_two_a) ) ) 
                (declare (temporary ) vec2 compiler_temp@12)
                (assign  (x) (var_ref compiler_temp@12)  (expression float b2f (expression bool >= (var_ref t0) (constant float (0.000000)) ) ) ) 
                (assign  (y) (var_ref compiler_temp@12)  (expression float b2f (expression bool >= (var_ref t1) (constant float (0.000000)) ) ) ) 
                (declare (temporary ) vec2 compiler_temp@13)
                (assign  (x) (var_ref compiler_temp@13)  (expression float b2f (expression bool >= (constant float (1.000000)) (var_ref t0) ) ) ) 
                (assign  (y) (var_ref compiler_temp@13)  (expression float b2f (expression bool >= (constant float (1.000000)) (var_ref t1) ) ) ) 
                (assign  (xy) (var_ref G)  (expression vec2 * (var_ref compiler_temp@12) (var_ref compiler_temp@13) ) ) 
                (if (expression bool == (swiz x (var_ref G) )(swiz y (var_ref G) )) (
                  (assign  (x) (var_ref t@10)  (expression float max (var_ref t0) (var_ref t1) ) ) 
                )
                (
                  (declare (temporary ) vec2 compiler_temp@14)
                  (assign  (x) (var_ref compiler_temp@14)  (var_ref t0) ) 
                  (assign  (y) (var_ref compiler_temp@14)  (var_ref t1) ) 
                  (assign  (x) (var_ref t@10)  (expression float dot (var_ref G) (var_ref compiler_temp@14) ) ) 
                ))

              ))

              (assign  (x) (var_ref compiler_temp@7)  (var_ref good) ) 
              (assign  (x) (var_ref t@8)  (var_ref t@10) ) 
            )
            (
              (if (expression bool == (var_ref compiler_temp@6) (constant uint (1)) ) (
                (assign  (x) (var_ref compiler_temp@7)  (constant float (1.000000)) ) 
                (declare () vec2 v@15)
                (assign  (xy) (var_ref v@15)  (expression vec2 + (swiz zw (var_ref fastuidraw_float_flat_varying1) )(expression vec2 neg (swiz xy (var_ref fastuidraw_float_flat_varying1) )) ) ) 
                (assign  (x) (var_ref t@8)  (expression float * (expression float dot (var_ref v@15) (expression vec2 + (var_ref p) (expression vec2 neg (swiz xy (var_ref fastuidraw_float_flat_varying1) )) ) ) (expression float rcp (expression float dot (var_ref v@15) (var_ref v@15) ) ) ) ) 
              )
              (
                (if (expression bool == (var_ref compiler_temp@6) (constant uint (3)) ) (
                  (assign  (x) (var_ref compiler_temp@7)  (constant float (1.000000)) ) 
                  (declare () float angle)
                  (declare () float t@16)
                  (declare () vec2 d)
                  (assign  (xy) (var_ref d)  (expression vec2 + (var_ref p) (expression vec2 neg (swiz xy (var_ref fastuidraw_float_flat_varying1) )) ) ) 
                  (declare (temporary ) float compiler_temp@17)
                  (declare (temporary ) bool compiler_temp@18)
                  (assign  (x) (var_ref compiler_temp@18)  (expression bool >= (constant float (0.000000)) (swiz x (var_ref d) )) ) 
                  (declare (temporary ) float compiler_temp@19)
                  (assign  (x) (var_ref compiler_temp@19)  (expression float csel (var_ref compiler_temp@18) (expression float abs (swiz x (var_ref d) )) (swiz y (var_ref d) )) ) 
                  (declare (temporary ) float compiler_temp@20)
                  (assign  (x) (var_ref compiler_temp@20)  (expression float csel (var_ref compiler_temp@18) (swiz y (var_ref d) )(expression float abs (swiz x (var_ref d) )) ) ) 
                  (declare (temporary ) float compiler_temp@21)
                  (assign  (x) (var_ref compiler_temp@21)  (expression float csel (expression bool >= (expression float abs (var_ref compiler_temp@20) ) (constant float (1.000000e+18)) ) (constant float (0.250000)) (constant float (1.000000)) ) ) 
                  (declare (temporary ) float compiler_temp@22)
                  (assign  (x) (var_ref compiler_temp@22)  (expression float rcp (expression float * (var_ref compiler_temp@20) (var_ref compiler_temp@21) ) ) ) 
                  (declare (temporary ) float compiler_temp@23)
                  (declare (temporary ) float compiler_temp@24)
                  (assign  (x) (var_ref compiler_temp@24)  (expression float * (expression float min (expression float abs (expression float csel (expression bool == (expression float abs (swiz x (var_ref d) )) (expression float abs (swiz y (var_ref d) )) ) (constant float (1.000000)) (expression float abs (expression float * (expression float * (var_ref compiler_temp@19) (var_ref compiler_temp@21) ) (var_ref compiler_temp@22) ) ) ) ) (constant float (1.000000)) ) (expression float rcp (expression float max (expression float abs (expression float csel (expression bool == (expression float abs (swiz x (var_ref d) )) (expression float abs (swiz y (var_ref d) )) ) (constant float (1.000000)) (expression float abs (expression float * (expression float * (var_ref compiler_temp@19) (var_ref compiler_temp@21) ) (var_ref compiler_temp@22) ) ) ) ) (constant float (1.000000)) ) ) ) ) 
                  (declare (temporary ) float compiler_temp@25)
                  (assign  (x) (var_ref compiler_temp@25)  (expression float * (var_ref compiler_temp@24) (var_ref compiler_temp@24) ) ) 
                  (assign  (x) (var_ref compiler_temp@25)  (expression float * (expression float + (expression float * (expression float + (expression float * (expression float + (expression float * (expression float + (expression float * (expression float + (expression float * (constant float (-0.012132)) (var_ref compiler_temp@25) ) (constant float (0.053681)) ) (var_ref compiler_temp@25) ) (constant float (-0.117350)) ) (var_ref compiler_temp@25) ) (constant float (0.193892)) ) (var_ref compiler_temp@25) ) (constant float (-0.332676)) ) (var_ref compiler_temp@25) ) (constant float (0.999979)) ) (var_ref compiler_temp@24) ) ) 
                  (assign  (x) (var_ref compiler_temp@25)  (expression float + (var_ref compiler_temp@25) (expression float * (expression float b2f (expression bool < (constant float (1.000000)) (expression float abs (expression float csel (expression bool == (expression float abs (swiz x (var_ref d) )) (expression float abs (swiz y (var_ref d) )) ) (constant float (1.000000)) (expression float abs (expression float * (expression float * (var_ref compiler_temp@19) (var_ref compiler_temp@21) ) (var_ref compiler_temp@22) ) ) ) ) ) ) (expression float + (expression float * (var_ref compiler_temp@25) (constant float (-2.000000)) ) (constant float (1.570796)) ) ) ) ) 
                  (assign  (x) (var_ref compiler_temp@23)  (expression float * (var_ref compiler_temp@25) (expression float sign (expression float csel (expression bool == (expression float abs (swiz x (var_ref d) )) (expression float abs (swiz y (var_ref d) )) ) (constant float (1.000000)) (expression float abs (expression float * (expression float * (var_ref compiler_temp@19) (var_ref compiler_temp@21) ) (var_ref compiler_temp@22) ) ) ) ) ) ) 
                  (assign  (x) (var_ref compiler_temp@23)  (expression float + (var_ref compiler_temp@23) (expression float * (expression float b2f (var_ref compiler_temp@18) ) (constant float (1.570796)) ) ) ) 
                  (assign  (x) (var_ref compiler_temp@17)  (expression float csel (expression bool < (expression float min (swiz y (var_ref d) )(var_ref compiler_temp@22) ) (constant float (0.000000)) ) (expression float neg (var_ref compiler_temp@23) ) (var_ref compiler_temp@23) ) ) 
                  (assign  (x) (var_ref angle)  (var_ref compiler_temp@17) ) 
                  (if (expression bool < (var_ref compiler_temp@17) (swiz z (var_ref fastuidraw_float_flat_varying1) )) (
                    (assign  (x) (var_ref angle)  (expression float + (var_ref compiler_temp@17) (constant float (6.283185)) ) ) 
                  )
                  ())

                  (assign  (x) (var_ref t@16)  (expression float * (expression float + (var_ref angle) (expression float neg (swiz z (var_ref fastuidraw_float_flat_varying1) )) ) (constant float (0.159155)) ) ) 
                  (if (expression bool < (swiz w (var_ref fastuidraw_float_flat_varying1) )(constant float (0.000000)) ) (
                    (assign  (x) (var_ref t@16)  (expression float + (constant float (1.000000)) (expression float neg (var_ref t@16) ) ) ) 
                  )
                  ())

                  (assign  (x) (var_ref t@16)  (expression float * (var_ref t@16) (expression float abs (swiz w (var_ref fastuidraw_float_flat_varying1) )) ) ) 
                  (assign  (x) (var_ref t@8)  (var_ref t@16) ) 
                )
                ())

              ))

            ))

            (assign  (x) (var_ref t)  (var_ref t@8) ) 
            (declare (temporary ) uint compiler_temp@26)
            (assign  (x) (var_ref compiler_temp@26)  (expression uint >> (expression uint << (swiz y (var_ref fastuidraw_uint_varying2) )(constant uint (19)) ) (constant uint (30)) ) ) 
            (if (expression bool == (var_ref compiler_temp@26) (constant uint (1)) ) (
              (assign  (x) (var_ref t)  (expression float sat (expression float abs (var_ref t@8) ) ) ) 
            )
            (
              (if (expression bool == (var_ref compiler_temp@26) (constant uint (2)) ) (
                (assign  (x) (var_ref t)  (expression float fract (var_ref t@8) ) ) 
              )
              (
                (if (expression bool == (var_ref compiler_temp@26) (constant uint (3)) ) (
                  (assign  (x) (var_ref t)  (expression float + (constant float (1.000000)) (expression float neg (expression float abs (expression float + (expression float % (var_ref t@8) (constant float (2.000000)) ) (constant float (-1.000000)) ) ) ) ) ) 
                )
                (
                  (assign  (x) (var_ref t)  (expression float sat (var_ref t@8) ) ) 
                ))

              ))

            ))

            (assign  (x) (var_ref t)  (expression float + (swiz x (var_ref fastuidraw_float_flat_varying4) )(expression float * (var_ref t) (swiz z (var_ref fastuidraw_float_flat_varying4) )) ) ) 
            (declare (temporary ) vec2 compiler_temp@27)
            (assign  (x) (var_ref compiler_temp@27)  (var_ref t) ) 
            (assign  (y) (var_ref compiler_temp@27)  (swiz y (var_ref fastuidraw_float_flat_varying4) )) 
            (assign  (xyzw) (var_ref return_value)  (expression vec4 * (var_ref compiler_temp) (expression vec4 * (var_ref compiler_temp@7) (txl vec4 (var_ref fastuidraw_colorStopAtlas)  (var_ref compiler_temp@27)  0 1 () (constant float (0.000000)) )) ) ) 
          )
          ())

          (assign  (xyz) (var_ref return_value)  (expression vec3 * (swiz xyz (var_ref return_value) )(swiz w (var_ref return_value) )) ) 
          (if (expression bool != (expression uint & (swiz y (var_ref fastuidraw_uint_varying2) )(constant uint (3)) ) (constant uint (0)) ) (
            (declare () vec4 image_color)
            (declare () float lod)
            (declare () vec2 q@28)
            (assign  (x) (var_ref q@28)  (expression float min (expression float max (swiz x (var_ref p) )(constant float (0.000000)) ) (expression float + (swiz x (var_ref fastuidraw_float_flat_varying3) )(constant float (-1.000000)) ) ) ) 
            (assign  (y) (var_ref q@28)  (expression float min (expression float max (swiz y (var_ref p) )(constant float (0.000000)) ) (expression float + (swiz y (var_ref fastuidraw_float_flat_varying3) )(constant float (-1.000000)) ) ) ) 
            (declare (temporary ) uint compiler_temp@29)
            (assign  (x) (var_ref compiler_temp@29)  (expression uint >> (expression uint << (swiz y (var_ref fastuidraw_uint_varying2) )(constant uint (10)) ) (constant uint (30)) ) ) 
            (declare (temporary ) uint compiler_temp@30)
            (assign  (x) (var_ref compiler_temp@30)  (expression uint >> (expression uint << (swiz y (var_ref fastuidraw_uint_varying2) )(constant uint (30)) ) (constant uint (30)) ) ) 
            (declare (temporary ) uint compiler_temp@31)
            (assign  (x) (var_ref compiler_temp@31)  (expression uint >> (expression uint << (swiz y (var_ref fastuidraw_uint_varying2) )(constant uint (23)) ) (constant uint (25)) ) ) 
            (if (expression bool < (constant uint (0)) (var_ref compiler_temp@31) ) (
              (assign  (x) (var_ref lod)  (expression float * (constant float (0.500000)) (expression float log2 (expression float max (constant float (1.000000)) (expression float * (expression float + (expression float dot (var_ref dpdx) (var_ref dpdx) ) (expression float dot (var_ref dpdy) (var_ref dpdy) ) ) (constant float (0.500000)) ) ) ) ) ) 
              (assign  (x) (var_ref lod)  (expression float min (expression float u2f (var_ref compiler_temp@31) ) (var_ref lod) ) ) 
            )
            (
              (assign  (x) (var_ref lod)  (constant float (0.000000)) ) 
            ))

            (if (expression bool == (var_ref compiler_temp@29) (constant uint (0)) ) (
              (declare () vec4 image_color@32)
              (declare (temporary ) float compiler_temp@33)
              (assign  (x) (var_ref compiler_temp@33)  (expression float min (var_ref lod) (constant float (4.500000)) ) ) 
              (if (expression bool == (var_ref compiler_temp@30) (constant uint (1)) ) (
                (declare (temporary ) float lod@34)
                (assign  (x) (var_ref lod@34)  (expression float ceil (var_ref compiler_temp@33) ) ) 
                (declare () vec2 return_value@35)
                (assign  (xy) (var_ref return_value@35)  (expression vec2 + (expression vec2 * (expression vec2 min (expression vec2 max (var_ref q@28) (constant vec2 (0.000000 0.000000)) ) (swiz xy (var_ref fastuidraw_float_flat_varying3) )) (swiz z (var_ref fastuidraw_float_flat_varying3) )) (swiz zw (var_ref fastuidraw_float_flat_varying2) )) ) 
                (declare () uint i)
                (declare () vec2 v_master_tile_texel_coord)
                (declare () uint v_index_layer)
                (declare () uvec4 v_tile_id)
                (declare (temporary ) uvec4 compiler_temp@36)
                (declare (temporary ) ivec3 compiler_temp@37)
                (assign  (xy) (var_ref compiler_temp@37)  (expression ivec2 f2i (var_ref return_value@35) ) ) 
                (assign  (z) (var_ref compiler_temp@37)  (expression int u2i (swiz w (var_ref fastuidraw_uint_varying0) )) ) 
                (assign  (xyzw) (var_ref compiler_temp@36)  (txf uvec4 (var_ref fastuidraw_imageIndexAtlas)  (var_ref compiler_temp@37)  0  (constant int (0)) )) 
                (assign  (xy) (var_ref v_master_tile_texel_coord)  (var_ref return_value@35) ) 
                (assign  (x) (var_ref v_index_layer)  (expression uint + (swiz z (var_ref compiler_temp@36) )(expression uint * (constant uint (256)) (swiz w (var_ref compiler_temp@36) )) ) ) 
                (assign  (xyzw) (var_ref v_tile_id)  (var_ref compiler_temp@36) ) 
                (assign  (x) (var_ref i)  (constant uint (1)) ) 
                (loop (
                  (if (expression bool >= (var_ref i) (swiz x (var_ref fastuidraw_uint_varying1) )) (
                    break
                  )
                  ())

                  (declare (temporary ) vec2 compiler_temp@38)
                  (declare (temporary ) uvec4 compiler_temp@39)
                  (declare () vec2 texel_coordinate)
                  (assign  (xy) (var_ref compiler_temp@38)  (expression vec2 + (var_ref v_master_tile_texel_coord) (expression vec2 neg (expression vec2 floor (var_ref v_master_tile_texel_coord) ) ) ) ) 
                  (assign  (xy) (var_ref texel_coordinate)  (expression vec2 + (expression vec2 * (var_ref compiler_temp@38) (constant float (4.000000)) ) (expression vec2 * (expression vec2 u2f (swiz xy (var_ref v_tile_id) )) (constant float (4.000000)) ) ) ) 
                  (declare (temporary ) ivec3 compiler_temp@40)
                  (assign  (xy) (var_ref compiler_temp@40)  (expression ivec2 f2i (var_ref texel_coordinate) ) ) 
                  (assign  (z) (var_ref compiler_temp@40)  (expression int u2i (var_ref v_index_layer) ) ) 
                  (assign  (xyzw) (var_ref compiler_temp@39)  (txf uvec4 (var_ref fastuidraw_imageIndexAtlas)  (var_ref compiler_temp@40)  0  (constant int (0)) )) 
                  (assign  (xy) (var_ref compiler_temp@38)  (var_ref texel_coordinate) ) 
                  (assign  (xy) (var_ref v_master_tile_texel_coord)  (var_ref texel_coordinate) ) 
                  (assign  (x) (var_ref v_index_layer)  (expression uint + (swiz z (var_ref compiler_temp@39) )(expression uint * (constant uint (256)) (swiz w (var_ref compiler_temp@39) )) ) ) 
                  (assign  (xyzw) (var_ref v_tile_id)  (var_ref compiler_temp@39) ) 
                  (assign  (x) (var_ref i)  (expression uint + (var_ref i) (constant uint (1)) ) ) 
                ))

                (declare (temporary ) vec3 compiler_temp@41)
                (assign  (xy) (var_ref compiler_temp@41)  (expression vec2 * (expression vec2 + (expression vec2 * (expression vec2 + (var_ref v_master_tile_texel_coord) (expression vec2 neg (expression vec2 floor (var_ref v_master_tile_texel_coord) ) ) ) (constant float (32.000000)) ) (expression vec2 * (expression vec2 u2f (swiz xy (var_ref v_tile_id) )) (constant float (32.000000)) ) ) (constant vec2 (0.000122 0.000122)) ) ) 
                (assign  (z) (var_ref compiler_temp@41)  (expression float u2f (var_ref v_index_layer) ) ) 
                (assign  (xyzw) (var_ref image_color@32)  (txl vec4 (var_ref fastuidraw_imageAtlasNearest)  (var_ref compiler_temp@41)  0 1 () (var_ref lod@34) )) 
              )
              (
                (if (expression bool || (expression bool == (var_ref compiler_temp@30) (constant uint (2)) ) (expression bool < (constant float (0.500000)) (var_ref compiler_temp@33) ) ) (
                  (declare (temporary ) int lod_i)
                  (assign  (x) (var_ref lod_i)  (expression int f2i (expression float round_even (var_ref compiler_temp@33) ) ) ) 
                  (declare () float lod_factor)
                  (assign  (x) (var_ref lod_factor)  (expression float i2f (expression int << (constant int (1)) (var_ref lod_i) ) ) ) 
                  (declare () vec2 return_value@42)
                  (assign  (xy) (var_ref return_value@42)  (expression vec2 + (expression vec2 * (expression vec2 min (expression vec2 max (var_ref q@28) (swiz xx (expression float * (constant float (0.500000)) (var_ref lod_factor) ) )) (expression vec2 + (swiz xy (var_ref fastuidraw_float_flat_varying3) )(expression vec2 neg (swiz xx (expression float * (constant float (0.500000)) (var_ref lod_factor) ) )) ) ) (swiz z (var_ref fastuidraw_float_flat_varying3) )) (swiz zw (var_ref fastuidraw_float_flat_varying2) )) ) 
                  (declare () float slack_requirement)
                  (declare () vec4 image_color@43)
                  (assign  (x) (var_ref slack_requirement)  (expression float * (constant float (0.500000)) (var_ref lod_factor) ) ) 
                  (declare (temporary ) vec2 compiler_temp@44)
                  (assign  (xy) (var_ref compiler_temp@44)  (expression vec2 * (expression vec2 + (var_ref return_value@42) (expression vec2 neg (expression vec2 * (constant vec2 (4.000000 4.000000)) (expression vec2 floor (expression vec2 * (constant float (0.250000)) (var_ref return_value@42) ) ) ) ) ) (swiz w (var_ref fastuidraw_float_flat_varying3) )) ) 
                  (declare (temporary ) vec2 compiler_temp@45)
                  (declare (temporary ) vec2 compiler_temp@46)
                  (declare () float tile_coord)
                  (assign  (x) (var_ref tile_coord)  (expression float + (swiz x (var_ref compiler_temp@44) )(expression float neg (expression float * (constant float (32.000000)) (expression float floor (expression float * (swiz x (var_ref compiler_temp@44) )(constant float (0.031250)) ) ) ) ) ) ) 
                  (assign  (x) (var_ref compiler_temp@45)  (expression float neg (var_ref tile_coord) ) ) 
                  (assign  (x) (var_ref compiler_temp@46)  (expression float + (constant float (31.000000)) (expression float neg (var_ref tile_coord) ) ) ) 
                  (declare () float tile_coord@47)
                  (assign  (x) (var_ref tile_coord@47)  (expression float + (swiz y (var_ref compiler_temp@44) )(expression float neg (expression float * (constant float (32.000000)) (expression float floor (expression float * (swiz y (var_ref compiler_temp@44) )(constant float (0.031250)) ) ) ) ) ) ) 
                  (assign  (y) (var_ref compiler_temp@45)  (expression float neg (var_ref tile_coord@47) ) ) 
                  (assign  (y) (var_ref compiler_temp@46)  (expression float + (constant float (31.000000)) (expression float neg (var_ref tile_coord@47) ) ) ) 
                  (declare () uint i@48)
                  (declare () vec2 v_master_tile_texel_coord@49)
                  (declare () uint v_index_layer@50)
                  (declare () uvec4 v_tile_id@51)
                  (declare (temporary ) uvec4 compiler_temp@52)
                  (declare (temporary ) ivec3 compiler_temp@53)
                  (assign  (xy) (var_ref compiler_temp@53)  (expression ivec2 f2i (var_ref return_value@42) ) ) 
                  (assign  (z) (var_ref compiler_temp@53)  (expression int u2i (swiz w (var_ref fastuidraw_uint_varying0) )) ) 
                  (assign  (xyzw) (var_ref compiler_temp@52)  (txf uvec4 (var_ref fastuidraw_imageIndexAtlas)  (var_ref compiler_temp@53)  0  (constant int (0)) )) 
                  (assign  (xy) (var_ref v_master_tile_texel_coord@49)  (var_ref return_value@42) ) 
                  (assign  (x) (var_ref v_index_layer@50)  (expression uint + (swiz z (var_ref compiler_temp@52) )(expression uint * (constant uint (256)) (swiz w (var_ref compiler_temp@52) )) ) ) 
                  (assign  (xyzw) (var_ref v_tile_id@51)  (var_ref compiler_temp@52) ) 
                  (assign  (x) (var_ref i@48)  (constant uint (1)) ) 
                  (loop (
                    (if (expression bool >= (var_ref i@48) (swiz x (var_ref fastuidraw_uint_varying1) )) (
                      break
                    )
                    ())

                    (declare (temporary ) vec2 compiler_temp@54)
                    (declare (temporary ) uvec4 compiler_temp@55)
                    (declare () vec2 texel_coordinate@56)
                    (assign  (xy) (var_ref compiler_temp@54)  (expression vec2 + (var_ref v_master_tile_texel_coord@49) (expression vec2 neg (expression vec2 floor (var_ref v_master_tile_texel_coord@49) ) ) ) ) 
                    (assign  (xy) (var_ref texel_coordinate@56)  (expression vec2 + (expression vec2 * (var_ref compiler_temp@54) (constant float (4.000000)) ) (expression vec2 * (expression vec2 u2f (swiz xy (var_ref v_tile_id@51) )) (constant float (4.000000)) ) ) ) 
                    (declare (temporary ) ivec3 compiler_temp@57)
                    (assign  (xy) (var_ref compiler_temp@57)  (expression ivec2 f2i (var_ref texel_coordinate@56) ) ) 
                    (assign  (z) (var_ref compiler_temp@57)  (expression int u2i (var_ref v_index_layer@50) ) ) 
                    (assign  (xyzw) (var_ref compiler_temp@55)  (txf uvec4 (var_ref fastuidraw_imageIndexAtlas)  (var_ref compiler_temp@57)  0  (constant int (0)) )) 
                    (assign  (xy) (var_ref compiler_temp@54)  (var_ref texel_coordinate@56) ) 
                    (assign  (xy) (var_ref v_master_tile_texel_coord@49)  (var_ref texel_coordinate@56) ) 
                    (assign  (x) (var_ref v_index_layer@50)  (expression uint + (swiz z (var_ref compiler_temp@55) )(expression uint * (constant uint (256)) (swiz w (var_ref compiler_temp@55) )) ) ) 
                    (assign  (xyzw) (var_ref v_tile_id@51)  (var_ref compiler_temp@55) ) 
                    (assign  (x) (var_ref i@48)  (expression uint + (var_ref i@48) (constant uint (1)) ) ) 
                  ))

                  (declare (temporary ) vec2 compiler_temp@58)
                  (assign  (xy) (var_ref compiler_temp@58)  (expression vec2 + (expression vec2 * (expression vec2 + (var_ref v_master_tile_texel_coord@49) (expression vec2 neg (expression vec2 floor (var_ref v_master_tile_texel_coord@49) ) ) ) (constant float (32.000000)) ) (expression vec2 * (expression vec2 u2f (swiz xy (var_ref v_tile_id@51) )) (constant float (32.000000)) ) ) ) 
                  (if (expression bool && (expression bool && (expression bool && (expression bool >= (swiz x (var_ref compiler_temp@46) )(var_ref slack_requirement) ) (expression bool >= (swiz y (var_ref compiler_temp@46) )(var_ref slack_requirement) ) ) (expression bool >= (expression float neg (var_ref slack_requirement) ) (swiz x (var_ref compiler_temp@45) )) ) (expression bool >= (expression float neg (var_ref slack_requirement) ) (swiz y (var_ref compiler_temp@45) )) ) (
                    (declare (temporary ) vec3 compiler_temp@59)
                    (assign  (xy) (var_ref compiler_temp@59)  (expression vec2 * (var_ref compiler_temp@58) (constant vec2 (0.000122 0.000122)) ) ) 
                    (assign  (z) (var_ref compiler_temp@59)  (expression float u2f (var_ref v_index_layer@50) ) ) 
                    (assign  (xyzw) (var_ref image_color@43)  (txl vec4 (var_ref fastuidraw_imageAtlasLinear)  (var_ref compiler_temp@59)  0 1 () (expression float i2f (var_ref lod_i) ) )) 
                  )
                  (
                    (declare (temporary ) vec3 compiler_temp@60)
                    (assign  (xy) (var_ref compiler_temp@60)  (expression vec2 * (var_ref compiler_temp@58) (constant vec2 (0.000122 0.000122)) ) ) 
                    (assign  (z) (var_ref compiler_temp@60)  (expression float u2f (var_ref v_index_layer@50) ) ) 
                    (assign  (xyzw) (var_ref image_color@43)  (txl vec4 (var_ref fastuidraw_imageAtlasNearest)  (var_ref compiler_temp@60)  0 1 () (expression float i2f (var_ref lod_i) ) )) 
                  ))

                  (assign  (xyzw) (var_ref image_color@32)  (var_ref image_color@43) ) 
                )
                (
                  (declare () vec4 t11)
                  (declare () vec4 t01)
                  (declare () vec4 t10)
                  (declare () vec4 t00)
                  (declare () vec4 recip_weight_sums)
                  (declare () vec2 linear_weight)
                  (declare () vec2 master_tile_texel_coord)
                  (assign  (xy) (var_ref master_tile_texel_coord)  (expression vec2 + (expression vec2 + (expression vec2 * (expression vec2 min (expression vec2 max (var_ref q@28) (constant vec2 (2.000000 2.000000)) ) (expression vec2 + (swiz xy (var_ref fastuidraw_float_flat_varying3) )(constant vec2 (-2.000000 -2.000000)) ) ) (swiz z (var_ref fastuidraw_float_flat_varying3) )) (swiz zw (var_ref fastuidraw_float_flat_varying2) )) (expression vec2 neg (swiz xx (expression float * (constant float (0.500000)) (swiz z (var_ref fastuidraw_float_flat_varying3) )) )) ) ) 
                  (declare () vec2 return_value@61)
                  (assign  (xy) (var_ref return_value@61)  (expression vec2 * (expression vec2 + (var_ref master_tile_texel_coord) (expression vec2 neg (swiz zw (var_ref fastuidraw_float_flat_varying2) )) ) (swiz w (var_ref fastuidraw_float_flat_varying3) )) ) 
                  (declare (temporary ) vec2 compiler_temp@62)
                  (declare (temporary ) vec2 compiler_temp@63)
                  (declare () float tile_coord@64)
                  (assign  (x) (var_ref tile_coord@64)  (expression float + (swiz x (var_ref return_value@61) )(expression float neg (expression float * (constant float (32.000000)) (expression float floor (expression float * (swiz x (var_ref return_value@61) )(constant float (0.031250)) ) ) ) ) ) ) 
                  (assign  (x) (var_ref compiler_temp@62)  (expression float neg (var_ref tile_coord@64) ) ) 
                  (assign  (x) (var_ref compiler_temp@63)  (expression float + (constant float (31.000000)) (expression float neg (var_ref tile_coord@64) ) ) ) 
                  (declare () float tile_coord@65)
                  (assign  (x) (var_ref tile_coord@65)  (expression float + (swiz y (var_ref return_value@61) )(expression float neg (expression float * (constant float (32.000000)) (expression float floor (expression float * (swiz y (var_ref return_value@61) )(constant float (0.031250)) ) ) ) ) ) ) 
                  (assign  (y) (var_ref compiler_temp@62)  (expression float neg (var_ref tile_coord@65) ) ) 
                  (assign  (y) (var_ref compiler_temp@63)  (expression float + (constant float (31.000000)) (expression float neg (var_ref tile_coord@65) ) ) ) 
                  (declare (temporary ) vec2 compiler_temp@66)
                  (assign  (xy) (var_ref compiler_temp@66)  (expression vec2 fract (var_ref return_value@61) ) ) 
                  (declare (temporary ) vec4 compiler_temp@67)
                  (declare () vec4 w)
                  (declare (temporary ) float compiler_temp@68)
                  (assign  (x) (var_ref compiler_temp@68)  (expression float * (swiz x (var_ref compiler_temp@66) )(swiz x (var_ref compiler_temp@66) )) ) 
                  (declare (temporary ) float compiler_temp@69)
                  (assign  (x) (var_ref compiler_temp@69)  (expression float * (var_ref compiler_temp@68) (swiz x (var_ref compiler_temp@66) )) ) 
                  (declare (temporary ) float compiler_temp@70)
                  (assign  (x) (var_ref compiler_temp@70)  (expression float + (constant float (1.000000)) (expression float neg (swiz x (var_ref compiler_temp@66) )) ) ) 
                  (declare (temporary ) float compiler_temp@71)
                  (assign  (x) (var_ref compiler_temp@71)  (expression float * (var_ref compiler_temp@70) (var_ref compiler_temp@70) ) ) 
                  (declare (temporary ) float compiler_temp@72)
                  (assign  (x) (var_ref compiler_temp@72)  (expression float * (var_ref compiler_temp@71) (var_ref compiler_temp@70) ) ) 
                  (assign  (x) (var_ref w)  (var_ref compiler_temp@72) ) 
                  (assign  (y) (var_ref w)  (expression float + (expression float + (expression float * (constant float (3.000000)) (var_ref compiler_temp@69) ) (expression float neg (expression float * (constant float (6.000000)) (var_ref compiler_temp@68) ) ) ) (constant float (4.000000)) ) ) 
                  (assign  (z) (var_ref w)  (expression float + (expression float + (expression float * (constant float (3.000000)) (var_ref compiler_temp@72) ) (expression float neg (expression float * (constant float (6.000000)) (var_ref compiler_temp@71) ) ) ) (constant float (4.000000)) ) ) 
                  (assign  (w) (var_ref w)  (var_ref compiler_temp@69) ) 
                  (assign  (xyzw) (var_ref compiler_temp@67)  (expression vec4 * (var_ref w) (expression float rcp (constant float (6.000000)) ) ) ) 
                  (declare (temporary ) vec4 compiler_temp@73)
                  (declare () vec4 w@74)
                  (declare (temporary ) float compiler_temp@75)
                  (assign  (x) (var_ref compiler_temp@75)  (expression float * (swiz y (var_ref compiler_temp@66) )(swiz y (var_ref compiler_temp@66) )) ) 
                  (declare (temporary ) float compiler_temp@76)
                  (assign  (x) (var_ref compiler_temp@76)  (expression float * (var_ref compiler_temp@75) (swiz y (var_ref compiler_temp@66) )) ) 
                  (declare (temporary ) float compiler_temp@77)
                  (assign  (x) (var_ref compiler_temp@77)  (expression float + (constant float (1.000000)) (expression float neg (swiz y (var_ref compiler_temp@66) )) ) ) 
                  (declare (temporary ) float compiler_temp@78)
                  (assign  (x) (var_ref compiler_temp@78)  (expression float * (var_ref compiler_temp@77) (var_ref compiler_temp@77) ) ) 
                  (declare (temporary ) float compiler_temp@79)
                  (assign  (x) (var_ref compiler_temp@79)  (expression float * (var_ref compiler_temp@78) (var_ref compiler_temp@77) ) ) 
                  (assign  (x) (var_ref w@74)  (var_ref compiler_temp@79) ) 
                  (assign  (y) (var_ref w@74)  (expression float + (expression float + (expression float * (constant float (3.000000)) (var_ref compiler_temp@76) ) (expression float neg (expression float * (constant float (6.000000)) (var_ref compiler_temp@75) ) ) ) (constant float (4.000000)) ) ) 
                  (assign  (z) (var_ref w@74)  (expression float + (expression float + (expression float * (constant float (3.000000)) (var_ref compiler_temp@79) ) (expression float neg (expression float * (constant float (6.000000)) (var_ref compiler_temp@78) ) ) ) (constant float (4.000000)) ) ) 
                  (assign  (w) (var_ref w@74)  (var_ref compiler_temp@76) ) 
                  (assign  (xyzw) (var_ref compiler_temp@73)  (expression vec4 * (var_ref w@74) (expression float rcp (constant float (6.000000)) ) ) ) 
                  (declare (temporary ) vec4 compiler_temp@80)
                  (assign  (x) (var_ref compiler_temp@80)  (expression float + (swiz x (var_ref compiler_temp@67) )(swiz y (var_ref compiler_temp@67) )) ) 
                  (assign  (y) (var_ref compiler_temp@80)  (expression float + (swiz z (var_ref compiler_temp@67) )(swiz w (var_ref compiler_temp@67) )) ) 
                  (assign  (z) (var_ref compiler_temp@80)  (expression float + (swiz x (var_ref compiler_temp@73) )(swiz y (var_ref compiler_temp@73) )) ) 
                  (assign  (w) (var_ref compiler_temp@80)  (expression float + (swiz z (var_ref compiler_temp@73) )(swiz w (var_ref compiler_temp@73) )) ) 
                  (assign  (xyzw) (var_ref recip_weight_sums)  (expression vec4 rcp (var_ref compiler_temp@80) ) ) 
                  (assign  (x) (var_ref linear_weight)  (expression float * (swiz y (var_ref compiler_temp@80) )(expression float rcp (expression float + (swiz x (var_ref compiler_temp@80) )(swiz y (var_ref compiler_temp@80) )) ) ) ) 
                  (assign  (y) (var_ref linear_weight)  (expression float * (swiz w (var_ref compiler_temp@80) )(expression float rcp (expression float + (swiz z (var_ref compiler_temp@80) )(swiz w (var_ref compiler_temp@80) )) ) ) ) 
                  (if (expression bool && (expression bool && (expression bool && (expression bool >= (constant float (-1.500000)) (swiz x (var_ref compiler_temp@62) )) (expression bool >= (constant float (-1.500000)) (swiz y (var_ref compiler_temp@62) )) ) (expression bool >= (swiz x (var_ref compiler_temp@63) )(constant float (2.500000)) ) ) (expression bool >= (swiz y (var_ref compiler_temp@63) )(constant float (2.500000)) ) ) (
                    (declare () vec4 texture_coords)
                    (declare () vec4 corner_coords)
                    (declare () vec2 texel_coord)
                    (declare () uint i@81)
                    (declare () vec2 v_master_tile_texel_coord@82)
                    (declare () uint v_index_layer@83)
                    (declare () uvec4 v_tile_id@84)
                    (declare (temporary ) uvec4 compiler_temp@85)
                    (declare (temporary ) ivec3 compiler_temp@86)
                    (assign  (xy) (var_ref compiler_temp@86)  (expression ivec2 f2i (var_ref master_tile_texel_coord) ) ) 
                    (assign  (z) (var_ref compiler_temp@86)  (expression int u2i (swiz w (var_ref fastuidraw_uint_varying0) )) ) 
                    (assign  (xyzw) (var_ref compiler_temp@85)  (txf uvec4 (var_ref fastuidraw_imageIndexAtlas)  (var_ref compiler_temp@86)  0  (constant int (0)) )) 
                    (assign  (xy) (var_ref v_master_tile_texel_coord@82)  (var_ref master_tile_texel_coord) ) 
                    (assign  (x) (var_ref v_index_layer@83)  (expression uint + (swiz z (var_ref compiler_temp@85) )(expression uint * (constant uint (256)) (swiz w (var_ref compiler_temp@85) )) ) ) 
                    (assign  (xyzw) (var_ref v_tile_id@84)  (var_ref compiler_temp@85) ) 
                    (assign  (x) (var_ref i@81)  (constant uint (1)) ) 
                    (loop (
                      (if (expression bool >= (var_ref i@81) (swiz x (var_ref fastuidraw_uint_varying1) )) (
                        break
                      )
                      ())

                      (declare (temporary ) vec2 compiler_temp@87)
                      (declare (temporary ) uvec4 compiler_temp@88)
                      (declare () vec2 texel_coordinate@89)
                      (assign  (xy) (var_ref compiler_temp@87)  (expression vec2 + (var_ref v_master_tile_texel_coord@82) (expression vec2 neg (expression vec2 floor (var_ref v_master_tile_texel_coord@82) ) ) ) ) 
                      (assign  (xy) (var_ref texel_coordinate@89)  (expression vec2 + (expression vec2 * (var_ref compiler_temp@87) (constant float (4.000000)) ) (expression vec2 * (expression vec2 u2f (swiz xy (var_ref v_tile_id@84) )) (constant float (4.000000)) ) ) ) 
                      (declare (temporary ) ivec3 compiler_temp@90)
                      (assign  (xy) (var_ref compiler_temp@90)  (expression ivec2 f2i (var_ref texel_coordinate@89) ) ) 
                      (assign  (z) (var_ref compiler_temp@90)  (expression int u2i (var_ref v_index_layer@83) ) ) 
                      (assign  (xyzw) (var_ref compiler_temp@88)  (txf uvec4 (var_ref fastuidraw_imageIndexAtlas)  (var_ref compiler_temp@90)  0  (constant int (0)) )) 
                      (assign  (xy) (var_ref compiler_temp@87)  (var_ref texel_coordinate@89) ) 
                      (assign  (xy) (var_ref v_master_tile_texel_coord@82)  (var_ref texel_coordinate@89) ) 
                      (assign  (x) (var_ref v_index_layer@83)  (expression uint + (swiz z (var_ref compiler_temp@88) )(expression uint * (constant uint (256)) (swiz w (var_ref compiler_temp@88) )) ) ) 
                      (assign  (xyzw) (var_ref v_tile_id@84)  (var_ref compiler_temp@88) ) 
                      (assign  (x) (var_ref i@81)  (expression uint + (var_ref i@81) (constant uint (1)) ) ) 
                    ))

                    (assign  (xy) (var_ref texel_coord)  (expression vec2 + (expression vec2 + (expression vec2 * (expression vec2 + (var_ref v_master_tile_texel_coord@82) (expression vec2 neg (expression vec2 floor (var_ref v_master_tile_texel_coord@82) ) ) ) (constant float (32.000000)) ) (expression vec2 * (expression vec2 u2f (swiz xy (var_ref v_tile_id@84) )) (constant float (32.000000)) ) ) (expression vec2 neg (var_ref compiler_temp@66) ) ) ) 
                    (assign  (xz) (var_ref corner_coords)  (expression vec2 + (var_ref texel_coord) (constant vec2 (-0.500000 -0.500000)) ) ) 
                    (assign  (yw) (var_ref corner_coords)  (expression vec2 + (var_ref texel_coord) (constant vec2 (1.500000 1.500000)) ) ) 
                    (declare (temporary ) vec4 compiler_temp@91)
                    (assign  (x) (var_ref compiler_temp@91)  (swiz y (var_ref compiler_temp@67) )) 
                    (assign  (y) (var_ref compiler_temp@91)  (swiz w (var_ref compiler_temp@67) )) 
                    (assign  (z) (var_ref compiler_temp@91)  (swiz y (var_ref compiler_temp@73) )) 
                    (assign  (w) (var_ref compiler_temp@91)  (swiz w (var_ref compiler_temp@73) )) 
                    (assign  (xyzw) (var_ref texture_coords)  (expression vec4 + (var_ref corner_coords) (expression vec4 * (var_ref compiler_temp@91) (var_ref recip_weight_sums) ) ) ) 
                    (assign  (xyzw) (var_ref texture_coords)  (expression vec4 * (var_ref texture_coords) (constant vec4 (0.000122 0.000122 0.000122 0.000122)) ) ) 
                    (declare (temporary ) vec3 compiler_temp@92)
                    (assign  (xy) (var_ref compiler_temp@92)  (swiz xz (var_ref texture_coords) )) 
                    (assign  (z) (var_ref compiler_temp@92)  (expression float u2f (var_ref v_index_layer@83) ) ) 
                    (assign  (xyzw) (var_ref t00)  (txl vec4 (var_ref fastuidraw_imageAtlasLinear)  (var_ref compiler_temp@92)  0 1 () (constant float (0.000000)) )) 
                    (declare (temporary ) vec3 compiler_temp@93)
                    (assign  (xy) (var_ref compiler_temp@93)  (swiz yz (var_ref texture_coords) )) 
                    (assign  (z) (var_ref compiler_temp@93)  (expression float u2f (var_ref v_index_layer@83) ) ) 
                    (assign  (xyzw) (var_ref t10)  (txl vec4 (var_ref fastuidraw_imageAtlasLinear)  (var_ref compiler_temp@93)  0 1 () (constant float (0.000000)) )) 
                    (declare (temporary ) vec3 compiler_temp@94)
                    (assign  (xy) (var_ref compiler_temp@94)  (swiz xw (var_ref texture_coords) )) 
                    (assign  (z) (var_ref compiler_temp@94)  (expression float u2f (var_ref v_index_layer@83) ) ) 
                    (assign  (xyzw) (var_ref t01)  (txl vec4 (var_ref fastuidraw_imageAtlasLinear)  (var_ref compiler_temp@94)  0 1 () (constant float (0.000000)) )) 
                    (declare (temporary ) vec3 compiler_temp@95)
                    (assign  (xy) (var_ref compiler_temp@95)  (swiz yw (var_ref texture_coords) )) 
                    (assign  (z) (var_ref compiler_temp@95)  (expression float u2f (var_ref v_index_layer@83) ) ) 
                    (assign  (xyzw) (var_ref t11)  (txl vec4 (var_ref fastuidraw_imageAtlasLinear)  (var_ref compiler_temp@95)  0 1 () (constant float (0.000000)) )) 
                  )
                  (
                    (declare () vec4 master_coords)
                    (declare () vec4 offset_coords)
                    (declare () vec4 corner_coords@96)
                    (declare () vec2 master_texel_coord)
                    (assign  (xy) (var_ref master_texel_coord)  (expression vec2 + (var_ref master_tile_texel_coord) (expression vec2 neg (expression vec2 * (var_ref compiler_temp@66) (swiz zz (var_ref fastuidraw_float_flat_varying3) )) ) ) ) 
                    (assign  (xz) (var_ref corner_coords@96)  (expression vec2 + (var_ref master_texel_coord) (expression vec2 neg (swiz xx (expression float * (constant float (0.500000)) (swiz z (var_ref fastuidraw_float_flat_varying3) )) )) ) ) 
                    (assign  (yw) (var_ref corner_coords@96)  (expression vec2 + (var_ref master_texel_coord) (swiz xx (expression float * (constant float (1.500000)) (swiz z (var_ref fastuidraw_float_flat_varying3) )) )) ) 
                    (declare (temporary ) vec4 compiler_temp@97)
                    (assign  (x) (var_ref compiler_temp@97)  (swiz y (var_ref compiler_temp@67) )) 
                    (assign  (y) (var_ref compiler_temp@97)  (swiz w (var_ref compiler_temp@67) )) 
                    (assign  (z) (var_ref compiler_temp@97)  (swiz y (var_ref compiler_temp@73) )) 
                    (assign  (w) (var_ref compiler_temp@97)  (swiz w (var_ref compiler_temp@73) )) 
                    (assign  (xyzw) (var_ref offset_coords)  (expression vec4 * (var_ref compiler_temp@97) (var_ref recip_weight_sums) ) ) 
                    (assign  (xyzw) (var_ref offset_coords)  (expression vec4 * (var_ref offset_coords) (swiz z (var_ref fastuidraw_float_flat_varying3) )) ) 
                    (assign  (xyzw) (var_ref master_coords)  (expression vec4 + (var_ref corner_coords@96) (var_ref offset_coords) ) ) 
                    (declare () vec4 image_color@98)
                    (declare (temporary ) vec2 compiler_temp@99)
                    (assign  (xy) (var_ref compiler_temp@99)  (expression vec2 * (expression vec2 + (swiz xz (var_ref master_coords) )(expression vec2 neg (expression vec2 * (constant vec2 (4.000000 4.000000)) (expression vec2 floor (expression vec2 * (constant float (0.250000)) (swiz xz (var_ref master_coords) )) ) ) ) ) (swiz w (var_ref fastuidraw_float_flat_varying3) )) ) 
                    (declare (temporary ) vec2 compiler_temp@100)
                    (declare (temporary ) vec2 compiler_temp@101)
                    (declare () float tile_coord@102)
                    (assign  (x) (var_ref tile_coord@102)  (expression float + (swiz x (var_ref compiler_temp@99) )(expression float neg (expression float * (constant float (32.000000)) (expression float floor (expression float * (swiz x (var_ref compiler_temp@99) )(constant float (0.031250)) ) ) ) ) ) ) 
                    (assign  (x) (var_ref compiler_temp@100)  (expression float neg (var_ref tile_coord@102) ) ) 
                    (assign  (x) (var_ref compiler_temp@101)  (expression float + (constant float (31.000000)) (expression float neg (var_ref tile_coord@102) ) ) ) 
                    (declare () float tile_coord@103)
                    (assign  (x) (var_ref tile_coord@103)  (expression float + (swiz y (var_ref compiler_temp@99) )(expression float neg (expression float * (constant float (32.000000)) (expression float floor (expression float * (swiz y (var_ref compiler_temp@99) )(constant float (0.031250)) ) ) ) ) ) ) 
                    (assign  (y) (var_ref compiler_temp@100)  (expression float neg (var_ref tile_coord@103) ) ) 
                    (assign  (y) (var_ref compiler_temp@101)  (expression float + (constant float (31.000000)) (expression float neg (var_ref tile_coord@103) ) ) ) 
                    (declare () uint i@104)
                    (declare () vec2 v_master_tile_texel_coord@105)
                    (declare () uint v_index_layer@106)
                    (declare () uvec4 v_tile_id@107)
                    (declare (temporary ) uvec4 compiler_temp@108)
                    (declare (temporary ) ivec3 compiler_temp@109)
                    (assign  (xy) (var_ref compiler_temp@109)  (expression ivec2 f2i (swiz xz (var_ref master_coords) )) ) 
                    (assign  (z) (var_ref compiler_temp@109)  (expression int u2i (swiz w (var_ref fastuidraw_uint_varying0) )) ) 
                    (assign  (xyzw) (var_ref compiler_temp@108)  (txf uvec4 (var_ref fastuidraw_imageIndexAtlas)  (var_ref compiler_temp@109)  0  (constant int (0)) )) 
                    (assign  (xy) (var_ref v_master_tile_texel_coord@105)  (swiz xz (var_ref master_coords) )) 
                    (assign  (x) (var_ref v_index_layer@106)  (expression uint + (swiz z (var_ref compiler_temp@108) )(expression uint * (constant uint (256)) (swiz w (var_ref compiler_temp@108) )) ) ) 
                    (assign  (xyzw) (var_ref v_tile_id@107)  (var_ref compiler_temp@108) ) 
                    (assign  (x) (var_ref i@104)  (constant uint (1)) ) 
                    (loop (
                      (if (expression bool >= (var_ref i@104) (swiz x (var_ref fastuidraw_uint_varying1) )) (
                        break
                      )
                      ())

                      (declare (temporary ) vec2 compiler_temp@110)
                      (declare (temporary ) uvec4 compiler_temp@111)
                      (declare () vec2 texel_coordinate@112)
                      (assign  (xy) (var_ref compiler_temp@110)  (expression vec2 + (var_ref v_master_tile_texel_coord@105) (expression vec2 neg (expression vec2 floor (var_ref v_master_tile_texel_coord@105) ) ) ) ) 
                      (assign  (xy) (var_ref texel_coordinate@112)  (expression vec2 + (expression vec2 * (var_ref compiler_temp@110) (constant float (4.000000)) ) (expression vec2 * (expression vec2 u2f (swiz xy (var_ref v_tile_id@107) )) (constant float (4.000000)) ) ) ) 
                      (declare (temporary ) ivec3 compiler_temp@113)
                      (assign  (xy) (var_ref compiler_temp@113)  (expression ivec2 f2i (var_ref texel_coordinate@112) ) ) 
                      (assign  (z) (var_ref compiler_temp@113)  (expression int u2i (var_ref v_index_layer@106) ) ) 
                      (assign  (xyzw) (var_ref compiler_temp@111)  (txf uvec4 (var_ref fastuidraw_imageIndexAtlas)  (var_ref compiler_temp@113)  0  (constant int (0)) )) 
                      (assign  (xy) (var_ref compiler_temp@110)  (var_ref texel_coordinate@112) ) 
                      (assign  (xy) (var_ref v_master_tile_texel_coord@105)  (var_ref texel_coordinate@112) ) 
                      (assign  (x) (var_ref v_index_layer@106)  (expression uint + (swiz z (var_ref compiler_temp@111) )(expression uint * (constant uint (256)) (swiz w (var_ref compiler_temp@111) )) ) ) 
                      (assign  (xyzw) (var_ref v_tile_id@107)  (var_ref compiler_temp@111) ) 
                      (assign  (x) (var_ref i@104)  (expression uint + (var_ref i@104) (constant uint (1)) ) ) 
                    ))

                    (declare (temporary ) vec2 compiler_temp@114)
                    (assign  (xy) (var_ref compiler_temp@114)  (expression vec2 + (expression vec2 * (expression vec2 + (var_ref v_master_tile_texel_coord@105) (expression vec2 neg (expression vec2 floor (var_ref v_master_tile_texel_coord@105) ) ) ) (constant float (32.000000)) ) (expression vec2 * (expression vec2 u2f (swiz xy (var_ref v_tile_id@107) )) (constant float (32.000000)) ) ) ) 
                    (if (expression bool && (expression bool && (expression bool && (expression bool >= (swiz x (var_ref compiler_temp@101) )(constant float (0.500000)) ) (expression bool >= (swiz y (var_ref compiler_temp@101) )(constant float (0.500000)) ) ) (expression bool >= (constant float (-0.500000)) (swiz x (var_ref compiler_temp@100) )) ) (expression bool >= (constant float (-0.500000)) (swiz y (var_ref compiler_temp@100) )) ) (
                      (declare (temporary ) vec3 compiler_temp@115)
                      (assign  (xy) (var_ref compiler_temp@115)  (expression vec2 * (var_ref compiler_temp@114) (constant vec2 (0.000122 0.000122)) ) ) 
                      (assign  (z) (var_ref compiler_temp@115)  (expression float u2f (var_ref v_index_layer@106) ) ) 
                      (assign  (xyzw) (var_ref image_color@98)  (txl vec4 (var_ref fastuidraw_imageAtlasLinear)  (var_ref compiler_temp@115)  0 1 () (constant float (0.000000)) )) 
                    )
                    (
                      (declare (temporary ) vec3 compiler_temp@116)
                      (assign  (xy) (var_ref compiler_temp@116)  (expression vec2 * (var_ref compiler_temp@114) (constant vec2 (0.000122 0.000122)) ) ) 
                      (assign  (z) (var_ref compiler_temp@116)  (expression float u2f (var_ref v_index_layer@106) ) ) 
                      (assign  (xyzw) (var_ref image_color@98)  (txl vec4 (var_ref fastuidraw_imageAtlasNearest)  (var_ref compiler_temp@116)  0 1 () (constant float (0.000000)) )) 
                    ))

                    (assign  (xyzw) (var_ref t00)  (var_ref image_color@98) ) 
                    (declare () vec4 image_color@117)
                    (declare (temporary ) vec2 compiler_temp@118)
                    (assign  (xy) (var_ref compiler_temp@118)  (expression vec2 * (expression vec2 + (swiz yz (var_ref master_coords) )(expression vec2 neg (expression vec2 * (constant vec2 (4.000000 4.000000)) (expression vec2 floor (expression vec2 * (constant float (0.250000)) (swiz yz (var_ref master_coords) )) ) ) ) ) (swiz w (var_ref fastuidraw_float_flat_varying3) )) ) 
                    (declare (temporary ) vec2 compiler_temp@119)
                    (declare (temporary ) vec2 compiler_temp@120)
                    (declare () float tile_coord@121)
                    (assign  (x) (var_ref tile_coord@121)  (expression float + (swiz x (var_ref compiler_temp@118) )(expression float neg (expression float * (constant float (32.000000)) (expression float floor (expression float * (swiz x (var_ref compiler_temp@118) )(constant float (0.031250)) ) ) ) ) ) ) 
                    (assign  (x) (var_ref compiler_temp@119)  (expression float neg (var_ref tile_coord@121) ) ) 
                    (assign  (x) (var_ref compiler_temp@120)  (expression float + (constant float (31.000000)) (expression float neg (var_ref tile_coord@121) ) ) ) 
                    (declare () float tile_coord@122)
                    (assign  (x) (var_ref tile_coord@122)  (expression float + (swiz y (var_ref compiler_temp@118) )(expression float neg (expression float * (constant float (32.000000)) (expression float floor (expression float * (swiz y (var_ref compiler_temp@118) )(constant float (0.031250)) ) ) ) ) ) ) 
                    (assign  (y) (var_ref compiler_temp@119)  (expression float neg (var_ref tile_coord@122) ) ) 
                    (assign  (y) (var_ref compiler_temp@120)  (expression float + (constant float (31.000000)) (expression float neg (var_ref tile_coord@122) ) ) ) 
                    (declare () uint i@123)
                    (declare () vec2 v_master_tile_texel_coord@124)
                    (declare () uint v_index_layer@125)
                    (declare () uvec4 v_tile_id@126)
                    (declare (temporary ) uvec4 compiler_temp@127)
                    (declare (temporary ) ivec3 compiler_temp@128)
                    (assign  (xy) (var_ref compiler_temp@128)  (expression ivec2 f2i (swiz yz (var_ref master_coords) )) ) 
                    (assign  (z) (var_ref compiler_temp@128)  (expression int u2i (swiz w (var_ref fastuidraw_uint_varying0) )) ) 
                    (assign  (xyzw) (var_ref compiler_temp@127)  (txf uvec4 (var_ref fastuidraw_imageIndexAtlas)  (var_ref compiler_temp@128)  0  (constant int (0)) )) 
                    (assign  (xy) (var_ref v_master_tile_texel_coord@124)  (swiz yz (var_ref master_coords) )) 
                    (assign  (x) (var_ref v_index_layer@125)  (expression uint + (swiz z (var_ref compiler_temp@127) )(expression uint * (constant uint (256)) (swiz w (var_ref compiler_temp@127) )) ) ) 
                    (assign  (xyzw) (var_ref v_tile_id@126)  (var_ref compiler_temp@127) ) 
                    (assign  (x) (var_ref i@123)  (constant uint (1)) ) 
                    (loop (
                      (if (expression bool >= (var_ref i@123) (swiz x (var_ref fastuidraw_uint_varying1) )) (
                        break
                      )
                      ())

                      (declare (temporary ) vec2 compiler_temp@129)
                      (declare (temporary ) uvec4 compiler_temp@130)
                      (declare () vec2 texel_coordinate@131)
                      (assign  (xy) (var_ref compiler_temp@129)  (expression vec2 + (var_ref v_master_tile_texel_coord@124) (expression vec2 neg (expression vec2 floor (var_ref v_master_tile_texel_coord@124) ) ) ) ) 
                      (assign  (xy) (var_ref texel_coordinate@131)  (expression vec2 + (expression vec2 * (var_ref compiler_temp@129) (constant float (4.000000)) ) (expression vec2 * (expression vec2 u2f (swiz xy (var_ref v_tile_id@126) )) (constant float (4.000000)) ) ) ) 
                      (declare (temporary ) ivec3 compiler_temp@132)
                      (assign  (xy) (var_ref compiler_temp@132)  (expression ivec2 f2i (var_ref texel_coordinate@131) ) ) 
                      (assign  (z) (var_ref compiler_temp@132)  (expression int u2i (var_ref v_index_layer@125) ) ) 
                      (assign  (xyzw) (var_ref compiler_temp@130)  (txf uvec4 (var_ref fastuidraw_imageIndexAtlas)  (var_ref compiler_temp@132)  0  (constant int (0)) )) 
                      (assign  (xy) (var_ref compiler_temp@129)  (var_ref texel_coordinate@131) ) 
                      (assign  (xy) (var_ref v_master_tile_texel_coord@124)  (var_ref texel_coordinate@131) ) 
                      (assign  (x) (var_ref v_index_layer@125)  (expression uint + (swiz z (var_ref compiler_temp@130) )(expression uint * (constant uint (256)) (swiz w (var_ref compiler_temp@130) )) ) ) 
                      (assign  (xyzw) (var_ref v_tile_id@126)  (var_ref compiler_temp@130) ) 
                      (assign  (x) (var_ref i@123)  (expression uint + (var_ref i@123) (constant uint (1)) ) ) 
                    ))

                    (declare (temporary ) vec2 compiler_temp@133)
                    (assign  (xy) (var_ref compiler_temp@133)  (expression vec2 + (expression vec2 * (expression vec2 + (var_ref v_master_tile_texel_coord@124) (expression vec2 neg (expression vec2 floor (var_ref v_master_tile_texel_coord@124) ) ) ) (constant float (32.000000)) ) (expression vec2 * (expression vec2 u2f (swiz xy (var_ref v_tile_id@126) )) (constant float (32.000000)) ) ) ) 
                    (if (expression bool && (expression bool && (expression bool && (expression bool >= (swiz x (var_ref compiler_temp@120) )(constant float (0.500000)) ) (expression bool >= (swiz y (var_ref compiler_temp@120) )(constant float (0.500000)) ) ) (expression bool >= (constant float (-0.500000)) (swiz x (var_ref compiler_temp@119) )) ) (expression bool >= (constant float (-0.500000)) (swiz y (var_ref compiler_temp@119) )) ) (
                      (declare (temporary ) vec3 compiler_temp@134)
                      (assign  (xy) (var_ref compiler_temp@134)  (expression vec2 * (var_ref compiler_temp@133) (constant vec2 (0.000122 0.000122)) ) ) 
                      (assign  (z) (var_ref compiler_temp@134)  (expression float u2f (var_ref v_index_layer@125) ) ) 
                      (assign  (xyzw) (var_ref image_color@117)  (txl vec4 (var_ref fastuidraw_imageAtlasLinear)  (var_ref compiler_temp@134)  0 1 () (constant float (0.000000)) )) 
                    )
                    (
                      (declare (temporary ) vec3 compiler_temp@135)
                      (assign  (xy) (var_ref compiler_temp@135)  (expression vec2 * (var_ref compiler_temp@133) (constant vec2 (0.000122 0.000122)) ) ) 
                      (assign  (z) (var_ref compiler_temp@135)  (expression float u2f (var_ref v_index_layer@125) ) ) 
                      (assign  (xyzw) (var_ref image_color@117)  (txl vec4 (var_ref fastuidraw_imageAtlasNearest)  (var_ref compiler_temp@135)  0 1 () (constant float (0.000000)) )) 
                    ))

                    (assign  (xyzw) (var_ref t10)  (var_ref image_color@117) ) 
                    (declare () vec4 image_color@136)
                    (declare (temporary ) vec2 compiler_temp@137)
                    (assign  (xy) (var_ref compiler_temp@137)  (expression vec2 * (expression vec2 + (swiz xw (var_ref master_coords) )(expression vec2 neg (expression vec2 * (constant vec2 (4.000000 4.000000)) (expression vec2 floor (expression vec2 * (constant float (0.250000)) (swiz xw (var_ref master_coords) )) ) ) ) ) (swiz w (var_ref fastuidraw_float_flat_varying3) )) ) 
                    (declare (temporary ) vec2 compiler_temp@138)
                    (declare (temporary ) vec2 compiler_temp@139)
                    (declare () float tile_coord@140)
                    (assign  (x) (var_ref tile_coord@140)  (expression float + (swiz x (var_ref compiler_temp@137) )(expression float neg (expression float * (constant float (32.000000)) (expression float floor (expression float * (swiz x (var_ref compiler_temp@137) )(constant float (0.031250)) ) ) ) ) ) ) 
                    (assign  (x) (var_ref compiler_temp@138)  (expression float neg (var_ref tile_coord@140) ) ) 
                    (assign  (x) (var_ref compiler_temp@139)  (expression float + (constant float (31.000000)) (expression float neg (var_ref tile_coord@140) ) ) ) 
                    (declare () float tile_coord@141)
                    (assign  (x) (var_ref tile_coord@141)  (expression float + (swiz y (var_ref compiler_temp@137) )(expression float neg (expression float * (constant float (32.000000)) (expression float floor (expression float * (swiz y (var_ref compiler_temp@137) )(constant float (0.031250)) ) ) ) ) ) ) 
                    (assign  (y) (var_ref compiler_temp@138)  (expression float neg (var_ref tile_coord@141) ) ) 
                    (assign  (y) (var_ref compiler_temp@139)  (expression float + (constant float (31.000000)) (expression float neg (var_ref tile_coord@141) ) ) ) 
                    (declare () uint i@142)
                    (declare () vec2 v_master_tile_texel_coord@143)
                    (declare () uint v_index_layer@144)
                    (declare () uvec4 v_tile_id@145)
                    (declare (temporary ) uvec4 compiler_temp@146)
                    (declare (temporary ) ivec3 compiler_temp@147)
                    (assign  (xy) (var_ref compiler_temp@147)  (expression ivec2 f2i (swiz xw (var_ref master_coords) )) ) 
                    (assign  (z) (var_ref compiler_temp@147)  (expression int u2i (swiz w (var_ref fastuidraw_uint_varying0) )) ) 
                    (assign  (xyzw) (var_ref compiler_temp@146)  (txf uvec4 (var_ref fastuidraw_imageIndexAtlas)  (var_ref compiler_temp@147)  0  (constant int (0)) )) 
                    (assign  (xy) (var_ref v_master_tile_texel_coord@143)  (swiz xw (var_ref master_coords) )) 
                    (assign  (x) (var_ref v_index_layer@144)  (expression uint + (swiz z (var_ref compiler_temp@146) )(expression uint * (constant uint (256)) (swiz w (var_ref compiler_temp@146) )) ) ) 
                    (assign  (xyzw) (var_ref v_tile_id@145)  (var_ref compiler_temp@146) ) 
                    (assign  (x) (var_ref i@142)  (constant uint (1)) ) 
                    (loop (
                      (if (expression bool >= (var_ref i@142) (swiz x (var_ref fastuidraw_uint_varying1) )) (
                        break
                      )
                      ())

                      (declare (temporary ) vec2 compiler_temp@148)
                      (declare (temporary ) uvec4 compiler_temp@149)
                      (declare () vec2 texel_coordinate@150)
                      (assign  (xy) (var_ref compiler_temp@148)  (expression vec2 + (var_ref v_master_tile_texel_coord@143) (expression vec2 neg (expression vec2 floor (var_ref v_master_tile_texel_coord@143) ) ) ) ) 
                      (assign  (xy) (var_ref texel_coordinate@150)  (expression vec2 + (expression vec2 * (var_ref compiler_temp@148) (constant float (4.000000)) ) (expression vec2 * (expression vec2 u2f (swiz xy (var_ref v_tile_id@145) )) (constant float (4.000000)) ) ) ) 
                      (declare (temporary ) ivec3 compiler_temp@151)
                      (assign  (xy) (var_ref compiler_temp@151)  (expression ivec2 f2i (var_ref texel_coordinate@150) ) ) 
                      (assign  (z) (var_ref compiler_temp@151)  (expression int u2i (var_ref v_index_layer@144) ) ) 
                      (assign  (xyzw) (var_ref compiler_temp@149)  (txf uvec4 (var_ref fastuidraw_imageIndexAtlas)  (var_ref compiler_temp@151)  0  (constant int (0)) )) 
                      (assign  (xy) (var_ref compiler_temp@148)  (var_ref texel_coordinate@150) ) 
                      (assign  (xy) (var_ref v_master_tile_texel_coord@143)  (var_ref texel_coordinate@150) ) 
                      (assign  (x) (var_ref v_index_layer@144)  (expression uint + (swiz z (var_ref compiler_temp@149) )(expression uint * (constant uint (256)) (swiz w (var_ref compiler_temp@149) )) ) ) 
                      (assign  (xyzw) (var_ref v_tile_id@145)  (var_ref compiler_temp@149) ) 
                      (assign  (x) (var_ref i@142)  (expression uint + (var_ref i@142) (constant uint (1)) ) ) 
                    ))

                    (declare (temporary ) vec2 compiler_temp@152)
                    (assign  (xy) (var_ref compiler_temp@152)  (expression vec2 + (expression vec2 * (expression vec2 + (var_ref v_master_tile_texel_coord@143) (expression vec2 neg (expression vec2 floor (var_ref v_master_tile_texel_coord@143) ) ) ) (constant float (32.000000)) ) (expression vec2 * (expression vec2 u2f (swiz xy (var_ref v_tile_id@145) )) (constant float (32.000000)) ) ) ) 
                    (if (expression bool && (expression bool && (expression bool && (expression bool >= (swiz x (var_ref compiler_temp@139) )(constant float (0.500000)) ) (expression bool >= (swiz y (var_ref compiler_temp@139) )(constant float (0.500000)) ) ) (expression bool >= (constant float (-0.500000)) (swiz x (var_ref compiler_temp@138) )) ) (expression bool >= (constant float (-0.500000)) (swiz y (var_ref compiler_temp@138) )) ) (
                      (declare (temporary ) vec3 compiler_temp@153)
                      (assign  (xy) (var_ref compiler_temp@153)  (expression vec2 * (var_ref compiler_temp@152) (constant vec2 (0.000122 0.000122)) ) ) 
                      (assign  (z) (var_ref compiler_temp@153)  (expression float u2f (var_ref v_index_layer@144) ) ) 
                      (assign  (xyzw) (var_ref image_color@136)  (txl vec4 (var_ref fastuidraw_imageAtlasLinear)  (var_ref compiler_temp@153)  0 1 () (constant float (0.000000)) )) 
                    )
                    (
                      (declare (temporary ) vec3 compiler_temp@154)
                      (assign  (xy) (var_ref compiler_temp@154)  (expression vec2 * (var_ref compiler_temp@152) (constant vec2 (0.000122 0.000122)) ) ) 
                      (assign  (z) (var_ref compiler_temp@154)  (expression float u2f (var_ref v_index_layer@144) ) ) 
                      (assign  (xyzw) (var_ref image_color@136)  (txl vec4 (var_ref fastuidraw_imageAtlasNearest)  (var_ref compiler_temp@154)  0 1 () (constant float (0.000000)) )) 
                    ))

                    (assign  (xyzw) (var_ref t01)  (var_ref image_color@136) ) 
                    (declare () vec4 image_color@155)
                    (declare (temporary ) vec2 compiler_temp@156)
                    (assign  (xy) (var_ref compiler_temp@156)  (expression vec2 * (expression vec2 + (swiz yw (var_ref master_coords) )(expression vec2 neg (expression vec2 * (constant vec2 (4.000000 4.000000)) (expression vec2 floor (expression vec2 * (constant float (0.250000)) (swiz yw (var_ref master_coords) )) ) ) ) ) (swiz w (var_ref fastuidraw_float_flat_varying3) )) ) 
                    (declare (temporary ) vec2 compiler_temp@157)
                    (declare (temporary ) vec2 compiler_temp@158)
                    (declare () float tile_coord@159)
                    (assign  (x) (var_ref tile_coord@159)  (expression float + (swiz x (var_ref compiler_temp@156) )(expression float neg (expression float * (constant float (32.000000)) (expression float floor (expression float * (swiz x (var_ref compiler_temp@156) )(constant float (0.031250)) ) ) ) ) ) ) 
                    (assign  (x) (var_ref compiler_temp@157)  (expression float neg (var_ref tile_coord@159) ) ) 
                    (assign  (x) (var_ref compiler_temp@158)  (expression float + (constant float (31.000000)) (expression float neg (var_ref tile_coord@159) ) ) ) 
                    (declare () float tile_coord@160)
                    (assign  (x) (var_ref tile_coord@160)  (expression float + (swiz y (var_ref compiler_temp@156) )(expression float neg (expression float * (constant float (32.000000)) (expression float floor (expression float * (swiz y (var_ref compiler_temp@156) )(constant float (0.031250)) ) ) ) ) ) ) 
                    (assign  (y) (var_ref compiler_temp@157)  (expression float neg (var_ref tile_coord@160) ) ) 
                    (assign  (y) (var_ref compiler_temp@158)  (expression float + (constant float (31.000000)) (expression float neg (var_ref tile_coord@160) ) ) ) 
                    (declare () uint i@161)
                    (declare () vec2 v_master_tile_texel_coord@162)
                    (declare () uint v_index_layer@163)
                    (declare () uvec4 v_tile_id@164)
                    (declare (temporary ) uvec4 compiler_temp@165)
                    (declare (temporary ) ivec3 compiler_temp@166)
                    (assign  (xy) (var_ref compiler_temp@166)  (expression ivec2 f2i (swiz yw (var_ref master_coords) )) ) 
                    (assign  (z) (var_ref compiler_temp@166)  (expression int u2i (swiz w (var_ref fastuidraw_uint_varying0) )) ) 
                    (assign  (xyzw) (var_ref compiler_temp@165)  (txf uvec4 (var_ref fastuidraw_imageIndexAtlas)  (var_ref compiler_temp@166)  0  (constant int (0)) )) 
                    (assign  (xy) (var_ref v_master_tile_texel_coord@162)  (swiz yw (var_ref master_coords) )) 
                    (assign  (x) (var_ref v_index_layer@163)  (expression uint + (swiz z (var_ref compiler_temp@165) )(expression uint * (constant uint (256)) (swiz w (var_ref compiler_temp@165) )) ) ) 
                    (assign  (xyzw) (var_ref v_tile_id@164)  (var_ref compiler_temp@165) ) 
                    (assign  (x) (var_ref i@161)  (constant uint (1)) ) 
                    (loop (
                      (if (expression bool >= (var_ref i@161) (swiz x (var_ref fastuidraw_uint_varying1) )) (
                        break
                      )
                      ())

                      (declare (temporary ) vec2 compiler_temp@167)
                      (declare (temporary ) uvec4 compiler_temp@168)
                      (declare () vec2 texel_coordinate@169)
                      (assign  (xy) (var_ref compiler_temp@167)  (expression vec2 + (var_ref v_master_tile_texel_coord@162) (expression vec2 neg (expression vec2 floor (var_ref v_master_tile_texel_coord@162) ) ) ) ) 
                      (assign  (xy) (var_ref texel_coordinate@169)  (expression vec2 + (expression vec2 * (var_ref compiler_temp@167) (constant float (4.000000)) ) (expression vec2 * (expression vec2 u2f (swiz xy (var_ref v_tile_id@164) )) (constant float (4.000000)) ) ) ) 
                      (declare (temporary ) ivec3 compiler_temp@170)
                      (assign  (xy) (var_ref compiler_temp@170)  (expression ivec2 f2i (var_ref texel_coordinate@169) ) ) 
                      (assign  (z) (var_ref compiler_temp@170)  (expression int u2i (var_ref v_index_layer@163) ) ) 
                      (assign  (xyzw) (var_ref compiler_temp@168)  (txf uvec4 (var_ref fastuidraw_imageIndexAtlas)  (var_ref compiler_temp@170)  0  (constant int (0)) )) 
                      (assign  (xy) (var_ref compiler_temp@167)  (var_ref texel_coordinate@169) ) 
                      (assign  (xy) (var_ref v_master_tile_texel_coord@162)  (var_ref texel_coordinate@169) ) 
                      (assign  (x) (var_ref v_index_layer@163)  (expression uint + (swiz z (var_ref compiler_temp@168) )(expression uint * (constant uint (256)) (swiz w (var_ref compiler_temp@168) )) ) ) 
                      (assign  (xyzw) (var_ref v_tile_id@164)  (var_ref compiler_temp@168) ) 
                      (assign  (x) (var_ref i@161)  (expression uint + (var_ref i@161) (constant uint (1)) ) ) 
                    ))

                    (declare (temporary ) vec2 compiler_temp@171)
                    (assign  (xy) (var_ref compiler_temp@171)  (expression vec2 + (expression vec2 * (expression vec2 + (var_ref v_master_tile_texel_coord@162) (expression vec2 neg (expression vec2 floor (var_ref v_master_tile_texel_coord@162) ) ) ) (constant float (32.000000)) ) (expression vec2 * (expression vec2 u2f (swiz xy (var_ref v_tile_id@164) )) (constant float (32.000000)) ) ) ) 
                    (if (expression bool && (expression bool && (expression bool && (expression bool >= (swiz x (var_ref compiler_temp@158) )(constant float (0.500000)) ) (expression bool >= (swiz y (var_ref compiler_temp@158) )(constant float (0.500000)) ) ) (expression bool >= (constant float (-0.500000)) (swiz x (var_ref compiler_temp@157) )) ) (expression bool >= (constant float (-0.500000)) (swiz y (var_ref compiler_temp@157) )) ) (
                      (declare (temporary ) vec3 compiler_temp@172)
                      (assign  (xy) (var_ref compiler_temp@172)  (expression vec2 * (var_ref compiler_temp@171) (constant vec2 (0.000122 0.000122)) ) ) 
                      (assign  (z) (var_ref compiler_temp@172)  (expression float u2f (var_ref v_index_layer@163) ) ) 
                      (assign  (xyzw) (var_ref image_color@155)  (txl vec4 (var_ref fastuidraw_imageAtlasLinear)  (var_ref compiler_temp@172)  0 1 () (constant float (0.000000)) )) 
                    )
                    (
                      (declare (temporary ) vec3 compiler_temp@173)
                      (assign  (xy) (var_ref compiler_temp@173)  (expression vec2 * (var_ref compiler_temp@171) (constant vec2 (0.000122 0.000122)) ) ) 
                      (assign  (z) (var_ref compiler_temp@173)  (expression float u2f (var_ref v_index_layer@163) ) ) 
                      (assign  (xyzw) (var_ref image_color@155)  (txl vec4 (var_ref fastuidraw_imageAtlasNearest)  (var_ref compiler_temp@173)  0 1 () (constant float (0.000000)) )) 
                    ))

                    (assign  (xyzw) (var_ref t11)  (var_ref image_color@155) ) 
                  ))

                  (assign  (xyzw) (var_ref image_color@32)  (expression vec4 lrp (expression vec4 lrp (var_ref t00) (var_ref t10) (swiz x (var_ref linear_weight) )) (expression vec4 lrp (var_ref t01) (var_ref t11) (swiz x (var_ref linear_weight) )) (swiz y (var_ref linear_weight) )) ) 
                ))

              ))

              (assign  (xyzw) (var_ref image_color)  (var_ref image_color@32) ) 
            )
            (
              (if (expression bool == (var_ref compiler_temp@29) (constant uint (1)) ) (
                (assign  (xyzw) (var_ref image_color)  (constant vec4 (1.000000 1.000000 1.000000 1.000000)) ) 
              )
              (
                (declare (temporary ) vec2 texel_coord@174)
                (declare () vec4 image_color@175)
                (assign  (xy) (var_ref texel_coord@174)  (expression vec2 + (var_ref q@28) (swiz zw (var_ref fastuidraw_float_flat_varying2) )) ) 
                (if (expression bool == (var_ref compiler_temp@30) (constant uint (1)) ) (
                  (declare () int L)
                  (assign  (x) (var_ref L)  (expression int f2i (expression float ceil (var_ref lod) ) ) ) 
                  (assign  (xyzw) (var_ref image_color@175)  (txf vec4 (array_ref (var_ref fastuidraw_external_texture) (constant int (0)) )  (expression ivec2 f2i (expression vec2 * (var_ref texel_coord@174) (expression float rcp (expression float i2f (expression int << (constant int (1)) (var_ref L) ) ) ) ) )  0  (var_ref L) )) 
                )
                (
                  (if (expression bool || (expression bool == (var_ref compiler_temp@30) (constant uint (2)) ) (expression bool < (constant float (0.500000)) (var_ref lod) ) ) (
                    (assign  (xyzw) (var_ref image_color@175)  (txl vec4 (array_ref (var_ref fastuidraw_external_texture) (constant int (0)) )  (expression vec2 * (var_ref texel_coord@174) (expression vec2 rcp (expression vec2 i2f (txs ivec2 (array_ref (var_ref fastuidraw_external_texture) (constant int (0)) )   (constant int (0)) )) ) )  0 1 () (var_ref lod) )) 
                  )
                  (
                    (declare (temporary ) vec2 compiler_temp@176)
                    (declare () vec4 texture_coords@177)
                    (declare () vec4 corner_coords@178)
                    (declare () vec2 linear_weight@179)
                    (assign  (xy) (var_ref compiler_temp@176)  (expression vec2 + (var_ref texel_coord@174) (constant vec2 (-0.500000 -0.500000)) ) ) 
                    (declare (temporary ) vec2 compiler_temp@180)
                    (assign  (xy) (var_ref compiler_temp@180)  (expression vec2 fract (var_ref compiler_temp@176) ) ) 
                    (assign  (xy) (var_ref compiler_temp@176)  (expression vec2 + (var_ref compiler_temp@176) (expression vec2 neg (var_ref compiler_temp@180) ) ) ) 
                    (declare (temporary ) vec4 compiler_temp@181)
                    (declare () vec4 w@182)
                    (declare (temporary ) float compiler_temp@183)
                    (assign  (x) (var_ref compiler_temp@183)  (expression float * (swiz x (var_ref compiler_temp@180) )(swiz x (var_ref compiler_temp@180) )) ) 
                    (declare (temporary ) float compiler_temp@184)
                    (assign  (x) (var_ref compiler_temp@184)  (expression float * (var_ref compiler_temp@183) (swiz x (var_ref compiler_temp@180) )) ) 
                    (declare (temporary ) float compiler_temp@185)
                    (assign  (x) (var_ref compiler_temp@185)  (expression float + (constant float (1.000000)) (expression float neg (swiz x (var_ref compiler_temp@180) )) ) ) 
                    (declare (temporary ) float compiler_temp@186)
                    (assign  (x) (var_ref compiler_temp@186)  (expression float * (var_ref compiler_temp@185) (var_ref compiler_temp@185) ) ) 
                    (declare (temporary ) float compiler_temp@187)
                    (assign  (x) (var_ref compiler_temp@187)  (expression float * (var_ref compiler_temp@186) (var_ref compiler_temp@185) ) ) 
                    (assign  (x) (var_ref w@182)  (var_ref compiler_temp@187) ) 
                    (assign  (y) (var_ref w@182)  (expression float + (expression float + (expression float * (constant float (3.000000)) (var_ref compiler_temp@184) ) (expression float neg (expression float * (constant float (6.000000)) (var_ref compiler_temp@183) ) ) ) (constant float (4.000000)) ) ) 
                    (assign  (z) (var_ref w@182)  (expression float + (expression float + (expression float * (constant float (3.000000)) (var_ref compiler_temp@187) ) (expression float neg (expression float * (constant float (6.000000)) (var_ref compiler_temp@186) ) ) ) (constant float (4.000000)) ) ) 
                    (assign  (w) (var_ref w@182)  (var_ref compiler_temp@184) ) 
                    (assign  (xyzw) (var_ref compiler_temp@181)  (expression vec4 * (var_ref w@182) (expression float rcp (constant float (6.000000)) ) ) ) 
                    (declare (temporary ) vec4 compiler_temp@188)
                    (declare () vec4 w@189)
                    (declare (temporary ) float compiler_temp@190)
                    (assign  (x) (var_ref compiler_temp@190)  (expression float * (swiz y (var_ref compiler_temp@180) )(swiz y (var_ref compiler_temp@180) )) ) 
                    (declare (temporary ) float compiler_temp@191)
                    (assign  (x) (var_ref compiler_temp@191)  (expression float * (var_ref compiler_temp@190) (swiz y (var_ref compiler_temp@180) )) ) 
                    (declare (temporary ) float compiler_temp@192)
                    (assign  (x) (var_ref compiler_temp@192)  (expression float + (constant float (1.000000)) (expression float neg (swiz y (var_ref compiler_temp@180) )) ) ) 
                    (declare (temporary ) float compiler_temp@193)
                    (assign  (x) (var_ref compiler_temp@193)  (expression float * (var_ref compiler_temp@192) (var_ref compiler_temp@192) ) ) 
                    (declare (temporary ) float compiler_temp@194)
                    (assign  (x) (var_ref compiler_temp@194)  (expression float * (var_ref compiler_temp@193) (var_ref compiler_temp@192) ) ) 
                    (assign  (x) (var_ref w@189)  (var_ref compiler_temp@194) ) 
                    (assign  (y) (var_ref w@189)  (expression float + (expression float + (expression float * (constant float (3.000000)) (var_ref compiler_temp@191) ) (expression float neg (expression float * (constant float (6.000000)) (var_ref compiler_temp@190) ) ) ) (constant float (4.000000)) ) ) 
                    (assign  (z) (var_ref w@189)  (expression float + (expression float + (expression float * (constant float (3.000000)) (var_ref compiler_temp@194) ) (expression float neg (expression float * (constant float (6.000000)) (var_ref compiler_temp@193) ) ) ) (constant float (4.000000)) ) ) 
                    (assign  (w) (var_ref w@189)  (var_ref compiler_temp@191) ) 
                    (assign  (xyzw) (var_ref compiler_temp@188)  (expression vec4 * (var_ref w@189) (expression float rcp (constant float (6.000000)) ) ) ) 
                    (assign  (xz) (var_ref corner_coords@178)  (expression vec2 + (var_ref compiler_temp@176) (constant vec2 (-0.500000 -0.500000)) ) ) 
                    (assign  (yw) (var_ref corner_coords@178)  (expression vec2 + (var_ref compiler_temp@176) (constant vec2 (1.500000 1.500000)) ) ) 
                    (declare (temporary ) vec4 compiler_temp@195)
                    (assign  (x) (var_ref compiler_temp@195)  (expression float + (swiz x (var_ref compiler_temp@181) )(swiz y (var_ref compiler_temp@181) )) ) 
                    (assign  (y) (var_ref compiler_temp@195)  (expression float + (swiz z (var_ref compiler_temp@181) )(swiz w (var_ref compiler_temp@181) )) ) 
                    (assign  (z) (var_ref compiler_temp@195)  (expression float + (swiz x (var_ref compiler_temp@188) )(swiz y (var_ref compiler_temp@188) )) ) 
                    (assign  (w) (var_ref compiler_temp@195)  (expression float + (swiz z (var_ref compiler_temp@188) )(swiz w (var_ref compiler_temp@188) )) ) 
                    (declare (temporary ) vec4 compiler_temp@196)
                    (assign  (xy) (var_ref compiler_temp@196)  (swiz yw (var_ref compiler_temp@181) )) 
                    (assign  (zw) (var_ref compiler_temp@196)  (swiz yw (var_ref compiler_temp@188) )) 
                    (assign  (xyzw) (var_ref texture_coords@177)  (expression vec4 + (var_ref corner_coords@178) (expression vec4 * (var_ref compiler_temp@196) (expression vec4 rcp (var_ref compiler_temp@195) ) ) ) ) 
                    (assign  (xyzw) (var_ref texture_coords@177)  (expression vec4 * (var_ref texture_coords@177) (swiz xyxy (expression vec2 rcp (expression vec2 i2f (txs ivec2 (array_ref (var_ref fastuidraw_external_texture) (constant int (0)) )   (constant int (0)) )) ) )) ) 
                    (assign  (x) (var_ref linear_weight@179)  (expression float * (swiz y (var_ref compiler_temp@195) )(expression float rcp (expression float + (swiz x (var_ref compiler_temp@195) )(swiz y (var_ref compiler_temp@195) )) ) ) ) 
                    (assign  (y) (var_ref linear_weight@179)  (expression float * (swiz w (var_ref compiler_temp@195) )(expression float rcp (expression float + (swiz z (var_ref compiler_temp@195) )(swiz w (var_ref compiler_temp@195) )) ) ) ) 
                    (assign  (xyzw) (var_ref image_color@175)  (expression vec4 lrp (expression vec4 lrp (txl vec4 (array_ref (var_ref fastuidraw_external_texture) (constant int (0)) )  (swiz xz (var_ref texture_coords@177) ) 0 1 () (constant float (0.000000)) )(txl vec4 (array_ref (var_ref fastuidraw_external_texture) (constant int (0)) )  (swiz yz (var_ref texture_coords@177) ) 0 1 () (constant float (0.000000)) )(swiz x (var_ref linear_weight@179) )) (expression vec4 lrp (txl vec4 (array_ref (var_ref fastuidraw_external_texture) (constant int (0)) )  (swiz xw (var_ref texture_coords@177) ) 0 1 () (constant float (0.000000)) )(txl vec4 (array_ref (var_ref fastuidraw_external_texture) (constant int (0)) )  (swiz yw (var_ref texture_coords@177) ) 0 1 () (constant float (0.000000)) )(swiz x (var_ref linear_weight@179) )) (swiz y (var_ref linear_weight@179) )) ) 
                  ))

                ))

                (assign  (xyzw) (var_ref image_color)  (var_ref image_color@175) ) 
              ))

            ))

            (if (expression bool == (expression uint & (swiz y (var_ref fastuidraw_uint_varying2) )(constant uint (16777216)) ) (constant uint (0)) ) (
              (assign  (xyz) (var_ref image_color)  (expression vec3 * (swiz xyz (var_ref image_color) )(swiz w (var_ref image_color) )) ) 
            )
            ())

            (assign  (xyzw) (var_ref return_value)  (expression vec4 * (var_ref return_value) (var_ref image_color) ) ) 
          )
          ())

          (assign  (xyzw) (var_ref b)  (var_ref return_value) ) 
        )
        (
          (declare () vec4 p@197)
          (assign  (xyzw) (var_ref b)  (var_ref p@197) ) 
        ))

        (declare () vec4 p@198)
        (if (expression bool && (expression bool >= (swiz y (var_ref fastuidraw_uint_varying1) )(constant uint (2)) ) (expression bool < (swiz y (var_ref fastuidraw_uint_varying1) )(constant uint (6)) ) ) (
          (assign  (xyzw) (var_ref p@198)  (swiz xxxx (txf vec4 (var_ref fastuidraw_deferred_coverage_buffer)  (expression ivec2 + (expression ivec2 f2i (swiz xy (var_ref gl_FragCoord) )) (var_ref fastuidraw_deferred_buffer_offset) )  0  (constant int (0)) ))) 
        )
        (
          (if (expression bool && (expression bool >= (swiz y (var_ref fastuidraw_uint_varying1) )(constant uint (10)) ) (expression bool < (swiz y (var_ref fastuidraw_uint_varying1) )(constant uint (14)) ) ) (
            (assign  (xyzw) (var_ref p@198)  (swiz xxxx (txf vec4 (var_ref fastuidraw_deferred_coverage_buffer)  (expression ivec2 + (expression ivec2 f2i (swiz xy (var_ref gl_FragCoord) )) (var_ref fastuidraw_deferred_buffer_offset) )  0  (constant int (0)) ))) 
          )
          (
            (if (expression bool == (swiz y (var_ref fastuidraw_uint_varying1) )(constant uint (1)) ) (
              (assign  (xyzw) (var_ref p@198)  (constant vec4 (1.000000 1.000000 1.000000 1.000000)) ) 
            )
            (
              (if (expression bool == (swiz y (var_ref fastuidraw_uint_varying1) )(constant uint (18)) ) (
                (assign  (xyzw) (var_ref p@198)  (constant vec4 (1.000000 1.000000 1.000000 1.000000)) ) 
              )
              (
                (if (expression bool == (swiz y (var_ref fastuidraw_uint_varying1) )(constant uint (19)) ) (
                  (assign  (xyzw) (var_ref p@198)  (swiz xxxx (txf vec4 (var_ref fastuidraw_deferred_coverage_buffer)  (expression ivec2 + (expression ivec2 f2i (swiz xy (var_ref gl_FragCoord) )) (var_ref fastuidraw_deferred_buffer_offset) )  0  (constant int (0)) ))) 
                )
                (
                  (if (expression bool == (swiz y (var_ref fastuidraw_uint_varying1) )(constant uint (20)) ) (
                    (declare () vec2 mixer)
                    (declare () ivec2 coord11)
                    (declare () ivec2 coord10)
                    (declare () ivec2 coord01)
                    (declare () ivec2 coord00)
                    (declare (temporary ) uvec2 compiler_temp@199)
                    (assign  (x) (var_ref compiler_temp@199)  (expression uint f2u (swiz w (var_ref fastuidraw_float_smooth_varying0) )) ) 
                    (assign  (y) (var_ref compiler_temp@199)  (expression uint f2u (swiz z (var_ref fastuidraw_float_smooth_varying0) )) ) 
                    (declare (temporary ) vec2 compiler_temp@200)
                    (assign  (xy) (var_ref compiler_temp@200)  (expression vec2 + (swiz xy (var_ref fastuidraw_float_smooth_varying0) )(constant vec2 (0.500000 0.500000)) ) ) 
                    (assign  (xy) (var_ref coord00)  (expression ivec2 + (expression ivec2 f2i (var_ref compiler_temp@200) ) (constant ivec2 (-1 -1)) ) ) 
                    (assign  (xy) (var_ref coord10)  (expression ivec2 + (var_ref coord00) (constant ivec2 (1 0)) ) ) 
                    (assign  (xy) (var_ref coord01)  (expression ivec2 + (var_ref coord00) (constant ivec2 (0 1)) ) ) 
                    (assign  (xy) (var_ref coord11)  (expression ivec2 + (var_ref coord00) (constant ivec2 (1 1)) ) ) 
                    (assign  (xy) (var_ref mixer)  (expression vec2 + (var_ref compiler_temp@200) (expression vec2 neg (expression vec2 i2f (expression ivec2 f2i (var_ref compiler_temp@200) ) ) ) ) ) 
                    (declare (temporary ) uint compiler_temp@201)
                    (declare () uint block)
                    (declare () uint y)
                    (declare () uint x)
                    (if (expression bool || (expression bool < (swiz x (var_ref coord00) )(constant int (0)) ) (expression bool < (swiz y (var_ref coord00) )(constant int (0)) ) ) (
                      (assign  (x) (var_ref compiler_temp@201)  (constant uint (0)) ) 
                    )
                    (
                      (assign  (x) (var_ref x)  (expression uint i2u (swiz x (var_ref coord00) )) ) 
                      (assign  (x) (var_ref y)  (expression uint i2u (swiz y (var_ref coord00) )) ) 
                      (if (expression bool || (expression bool >= (var_ref x) (swiz x (var_ref compiler_temp@199) )) (expression bool >= (var_ref y) (swiz y (var_ref compiler_temp@199) )) ) (
                        (assign  (x) (var_ref compiler_temp@201)  (constant uint (0)) ) 
                      )
                      (
                        (declare (temporary ) uint compiler_temp@202)
                        (declare (temporary ) uint compiler_temp@203)
                        (assign  (x) (var_ref compiler_temp@203)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (expression uint + (expression uint + (swiz x (var_ref fastuidraw_uint_varying0) )(expression uint >> (var_ref x) (constant uint (1)) ) ) (expression uint * (expression uint >> (var_ref y) (constant uint (1)) ) (expression uint >> (expression uint + (swiz x (var_ref compiler_temp@199) )(constant uint (1)) ) (constant uint (1)) ) ) ) ) ) (constant uint (4)) ) ) ) 
                        (declare (temporary ) uint compiler_temp@204)
                        (call __intrinsic_load_ssbo (var_ref compiler_temp@204)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@203) (constant uint (0)) ) (constant uint (2)) ))

                        (assign  (x) (var_ref compiler_temp@202)  (var_ref compiler_temp@204) ) 
                        (assign  (x) (var_ref block)  (var_ref compiler_temp@202) ) 
                        (declare (temporary ) uint compiler_temp@205)
                        (if (expression bool != (expression uint & (var_ref x) (constant uint (1)) ) (constant uint (0)) ) (
                          (assign  (x) (var_ref compiler_temp@205)  (constant uint (8)) ) 
                        )
                        (
                          (assign  (x) (var_ref compiler_temp@205)  (constant uint (0)) ) 
                        ))

                        (declare (temporary ) uint compiler_temp@206)
                        (if (expression bool != (expression uint & (var_ref y) (constant uint (1)) ) (constant uint (0)) ) (
                          (assign  (x) (var_ref compiler_temp@206)  (constant uint (16)) ) 
                        )
                        (
                          (assign  (x) (var_ref compiler_temp@206)  (constant uint (0)) ) 
                        ))

                        (assign  (x) (var_ref compiler_temp@201)  (expression uint >> (expression uint << (var_ref block) (expression uint + (constant uint (24)) (expression uint neg (expression uint + (var_ref compiler_temp@205) (var_ref compiler_temp@206) ) ) ) ) (constant uint (24)) ) ) 
                      ))

                    ))

                    (declare (temporary ) uint compiler_temp@207)
                    (declare () uint block@208)
                    (declare () uint y@209)
                    (declare () uint x@210)
                    (if (expression bool || (expression bool < (swiz x (var_ref coord01) )(constant int (0)) ) (expression bool < (swiz y (var_ref coord01) )(constant int (0)) ) ) (
                      (assign  (x) (var_ref compiler_temp@207)  (constant uint (0)) ) 
                    )
                    (
                      (assign  (x) (var_ref x@210)  (expression uint i2u (swiz x (var_ref coord01) )) ) 
                      (assign  (x) (var_ref y@209)  (expression uint i2u (swiz y (var_ref coord01) )) ) 
                      (if (expression bool || (expression bool >= (var_ref x@210) (swiz x (var_ref compiler_temp@199) )) (expression bool >= (var_ref y@209) (swiz y (var_ref compiler_temp@199) )) ) (
                        (assign  (x) (var_ref compiler_temp@207)  (constant uint (0)) ) 
                      )
                      (
                        (declare (temporary ) uint compiler_temp@211)
                        (declare (temporary ) uint compiler_temp@212)
                        (assign  (x) (var_ref compiler_temp@212)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (expression uint + (expression uint + (swiz x (var_ref fastuidraw_uint_varying0) )(expression uint >> (var_ref x@210) (constant uint (1)) ) ) (expression uint * (expression uint >> (var_ref y@209) (constant uint (1)) ) (expression uint >> (expression uint + (swiz x (var_ref compiler_temp@199) )(constant uint (1)) ) (constant uint (1)) ) ) ) ) ) (constant uint (4)) ) ) ) 
                        (declare (temporary ) uint compiler_temp@213)
                        (call __intrinsic_load_ssbo (var_ref compiler_temp@213)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@212) (constant uint (0)) ) (constant uint (2)) ))

                        (assign  (x) (var_ref compiler_temp@211)  (var_ref compiler_temp@213) ) 
                        (assign  (x) (var_ref block@208)  (var_ref compiler_temp@211) ) 
                        (declare (temporary ) uint compiler_temp@214)
                        (if (expression bool != (expression uint & (var_ref x@210) (constant uint (1)) ) (constant uint (0)) ) (
                          (assign  (x) (var_ref compiler_temp@214)  (constant uint (8)) ) 
                        )
                        (
                          (assign  (x) (var_ref compiler_temp@214)  (constant uint (0)) ) 
                        ))

                        (declare (temporary ) uint compiler_temp@215)
                        (if (expression bool != (expression uint & (var_ref y@209) (constant uint (1)) ) (constant uint (0)) ) (
                          (assign  (x) (var_ref compiler_temp@215)  (constant uint (16)) ) 
                        )
                        (
                          (assign  (x) (var_ref compiler_temp@215)  (constant uint (0)) ) 
                        ))

                        (assign  (x) (var_ref compiler_temp@207)  (expression uint >> (expression uint << (var_ref block@208) (expression uint + (constant uint (24)) (expression uint neg (expression uint + (var_ref compiler_temp@214) (var_ref compiler_temp@215) ) ) ) ) (constant uint (24)) ) ) 
                      ))

                    ))

                    (declare (temporary ) uint compiler_temp@216)
                    (declare () uint block@217)
                    (declare () uint y@218)
                    (declare () uint x@219)
                    (if (expression bool || (expression bool < (swiz x (var_ref coord10) )(constant int (0)) ) (expression bool < (swiz y (var_ref coord10) )(constant int (0)) ) ) (
                      (assign  (x) (var_ref compiler_temp@216)  (constant uint (0)) ) 
                    )
                    (
                      (assign  (x) (var_ref x@219)  (expression uint i2u (swiz x (var_ref coord10) )) ) 
                      (assign  (x) (var_ref y@218)  (expression uint i2u (swiz y (var_ref coord10) )) ) 
                      (if (expression bool || (expression bool >= (var_ref x@219) (swiz x (var_ref compiler_temp@199) )) (expression bool >= (var_ref y@218) (swiz y (var_ref compiler_temp@199) )) ) (
                        (assign  (x) (var_ref compiler_temp@216)  (constant uint (0)) ) 
                      )
                      (
                        (declare (temporary ) uint compiler_temp@220)
                        (declare (temporary ) uint compiler_temp@221)
                        (assign  (x) (var_ref compiler_temp@221)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (expression uint + (expression uint + (swiz x (var_ref fastuidraw_uint_varying0) )(expression uint >> (var_ref x@219) (constant uint (1)) ) ) (expression uint * (expression uint >> (var_ref y@218) (constant uint (1)) ) (expression uint >> (expression uint + (swiz x (var_ref compiler_temp@199) )(constant uint (1)) ) (constant uint (1)) ) ) ) ) ) (constant uint (4)) ) ) ) 
                        (declare (temporary ) uint compiler_temp@222)
                        (call __intrinsic_load_ssbo (var_ref compiler_temp@222)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@221) (constant uint (0)) ) (constant uint (2)) ))

                        (assign  (x) (var_ref compiler_temp@220)  (var_ref compiler_temp@222) ) 
                        (assign  (x) (var_ref block@217)  (var_ref compiler_temp@220) ) 
                        (declare (temporary ) uint compiler_temp@223)
                        (if (expression bool != (expression uint & (var_ref x@219) (constant uint (1)) ) (constant uint (0)) ) (
                          (assign  (x) (var_ref compiler_temp@223)  (constant uint (8)) ) 
                        )
                        (
                          (assign  (x) (var_ref compiler_temp@223)  (constant uint (0)) ) 
                        ))

                        (declare (temporary ) uint compiler_temp@224)
                        (if (expression bool != (expression uint & (var_ref y@218) (constant uint (1)) ) (constant uint (0)) ) (
                          (assign  (x) (var_ref compiler_temp@224)  (constant uint (16)) ) 
                        )
                        (
                          (assign  (x) (var_ref compiler_temp@224)  (constant uint (0)) ) 
                        ))

                        (assign  (x) (var_ref compiler_temp@216)  (expression uint >> (expression uint << (var_ref block@217) (expression uint + (constant uint (24)) (expression uint neg (expression uint + (var_ref compiler_temp@223) (var_ref compiler_temp@224) ) ) ) ) (constant uint (24)) ) ) 
                      ))

                    ))

                    (declare (temporary ) uint compiler_temp@225)
                    (declare () uint block@226)
                    (declare () uint y@227)
                    (declare () uint x@228)
                    (if (expression bool || (expression bool < (swiz x (var_ref coord11) )(constant int (0)) ) (expression bool < (swiz y (var_ref coord11) )(constant int (0)) ) ) (
                      (assign  (x) (var_ref compiler_temp@225)  (constant uint (0)) ) 
                    )
                    (
                      (assign  (x) (var_ref x@228)  (expression uint i2u (swiz x (var_ref coord11) )) ) 
                      (assign  (x) (var_ref y@227)  (expression uint i2u (swiz y (var_ref coord11) )) ) 
                      (if (expression bool || (expression bool >= (var_ref x@228) (swiz x (var_ref compiler_temp@199) )) (expression bool >= (var_ref y@227) (swiz y (var_ref compiler_temp@199) )) ) (
                        (assign  (x) (var_ref compiler_temp@225)  (constant uint (0)) ) 
                      )
                      (
                        (declare (temporary ) uint compiler_temp@229)
                        (declare (temporary ) uint compiler_temp@230)
                        (assign  (x) (var_ref compiler_temp@230)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (expression uint + (expression uint + (swiz x (var_ref fastuidraw_uint_varying0) )(expression uint >> (var_ref x@228) (constant uint (1)) ) ) (expression uint * (expression uint >> (var_ref y@227) (constant uint (1)) ) (expression uint >> (expression uint + (swiz x (var_ref compiler_temp@199) )(constant uint (1)) ) (constant uint (1)) ) ) ) ) ) (constant uint (4)) ) ) ) 
                        (declare (temporary ) uint compiler_temp@231)
                        (call __intrinsic_load_ssbo (var_ref compiler_temp@231)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@230) (constant uint (0)) ) (constant uint (2)) ))

                        (assign  (x) (var_ref compiler_temp@229)  (var_ref compiler_temp@231) ) 
                        (assign  (x) (var_ref block@226)  (var_ref compiler_temp@229) ) 
                        (declare (temporary ) uint compiler_temp@232)
                        (if (expression bool != (expression uint & (var_ref x@228) (constant uint (1)) ) (constant uint (0)) ) (
                          (assign  (x) (var_ref compiler_temp@232)  (constant uint (8)) ) 
                        )
                        (
                          (assign  (x) (var_ref compiler_temp@232)  (constant uint (0)) ) 
                        ))

                        (declare (temporary ) uint compiler_temp@233)
                        (if (expression bool != (expression uint & (var_ref y@227) (constant uint (1)) ) (constant uint (0)) ) (
                          (assign  (x) (var_ref compiler_temp@233)  (constant uint (16)) ) 
                        )
                        (
                          (assign  (x) (var_ref compiler_temp@233)  (constant uint (0)) ) 
                        ))

                        (assign  (x) (var_ref compiler_temp@225)  (expression uint >> (expression uint << (var_ref block@226) (expression uint + (constant uint (24)) (expression uint neg (expression uint + (var_ref compiler_temp@232) (var_ref compiler_temp@233) ) ) ) ) (constant uint (24)) ) ) 
                      ))

                    ))

                    (assign  (xyzw) (var_ref p@198)  (swiz xxxx (expression float * (expression float lrp (expression float lrp (expression float u2f (var_ref compiler_temp@201) ) (expression float u2f (var_ref compiler_temp@207) ) (swiz y (var_ref mixer) )) (expression float lrp (expression float u2f (var_ref compiler_temp@216) ) (expression float u2f (var_ref compiler_temp@225) ) (swiz y (var_ref mixer) )) (swiz x (var_ref mixer) )) (expression float rcp (constant float (255.000000)) ) ) )) 
                  )
                  (
                    (if (expression bool == (swiz y (var_ref fastuidraw_uint_varying1) )(constant uint (21)) ) (
                      (declare () vec2 mixer@234)
                      (declare () ivec2 coord11@235)
                      (declare () ivec2 coord10@236)
                      (declare () ivec2 coord01@237)
                      (declare () ivec2 coord00@238)
                      (declare () float dist)
                      (declare (temporary ) uvec2 compiler_temp@239)
                      (assign  (x) (var_ref compiler_temp@239)  (expression uint f2u (swiz w (var_ref fastuidraw_float_smooth_varying0) )) ) 
                      (assign  (y) (var_ref compiler_temp@239)  (expression uint f2u (swiz z (var_ref fastuidraw_float_smooth_varying0) )) ) 
                      (declare (temporary ) vec2 compiler_temp@240)
                      (assign  (xy) (var_ref compiler_temp@240)  (expression vec2 + (swiz xy (var_ref fastuidraw_float_smooth_varying0) )(constant vec2 (0.500000 0.500000)) ) ) 
                      (assign  (xy) (var_ref coord00@238)  (expression ivec2 + (expression ivec2 f2i (var_ref compiler_temp@240) ) (constant ivec2 (-1 -1)) ) ) 
                      (assign  (xy) (var_ref coord10@236)  (expression ivec2 + (var_ref coord00@238) (constant ivec2 (1 0)) ) ) 
                      (assign  (xy) (var_ref coord01@237)  (expression ivec2 + (var_ref coord00@238) (constant ivec2 (0 1)) ) ) 
                      (assign  (xy) (var_ref coord11@235)  (expression ivec2 + (var_ref coord00@238) (constant ivec2 (1 1)) ) ) 
                      (assign  (xy) (var_ref mixer@234)  (expression vec2 + (var_ref compiler_temp@240) (expression vec2 neg (expression vec2 i2f (expression ivec2 f2i (var_ref compiler_temp@240) ) ) ) ) ) 
                      (declare (temporary ) uint compiler_temp@241)
                      (declare () uint block@242)
                      (declare () uint y@243)
                      (declare () uint x@244)
                      (if (expression bool || (expression bool < (swiz x (var_ref coord00@238) )(constant int (0)) ) (expression bool < (swiz y (var_ref coord00@238) )(constant int (0)) ) ) (
                        (assign  (x) (var_ref compiler_temp@241)  (constant uint (0)) ) 
                      )
                      (
                        (assign  (x) (var_ref x@244)  (expression uint i2u (swiz x (var_ref coord00@238) )) ) 
                        (assign  (x) (var_ref y@243)  (expression uint i2u (swiz y (var_ref coord00@238) )) ) 
                        (if (expression bool || (expression bool >= (var_ref x@244) (swiz x (var_ref compiler_temp@239) )) (expression bool >= (var_ref y@243) (swiz y (var_ref compiler_temp@239) )) ) (
                          (assign  (x) (var_ref compiler_temp@241)  (constant uint (0)) ) 
                        )
                        (
                          (declare (temporary ) uint compiler_temp@245)
                          (declare (temporary ) uint compiler_temp@246)
                          (assign  (x) (var_ref compiler_temp@246)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (expression uint + (expression uint + (swiz x (var_ref fastuidraw_uint_varying0) )(expression uint >> (var_ref x@244) (constant uint (1)) ) ) (expression uint * (expression uint >> (var_ref y@243) (constant uint (1)) ) (expression uint >> (expression uint + (swiz x (var_ref compiler_temp@239) )(constant uint (1)) ) (constant uint (1)) ) ) ) ) ) (constant uint (4)) ) ) ) 
                          (declare (temporary ) uint compiler_temp@247)
                          (call __intrinsic_load_ssbo (var_ref compiler_temp@247)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@246) (constant uint (0)) ) (constant uint (2)) ))

                          (assign  (x) (var_ref compiler_temp@245)  (var_ref compiler_temp@247) ) 
                          (assign  (x) (var_ref block@242)  (var_ref compiler_temp@245) ) 
                          (declare (temporary ) uint compiler_temp@248)
                          (if (expression bool != (expression uint & (var_ref x@244) (constant uint (1)) ) (constant uint (0)) ) (
                            (assign  (x) (var_ref compiler_temp@248)  (constant uint (8)) ) 
                          )
                          (
                            (assign  (x) (var_ref compiler_temp@248)  (constant uint (0)) ) 
                          ))

                          (declare (temporary ) uint compiler_temp@249)
                          (if (expression bool != (expression uint & (var_ref y@243) (constant uint (1)) ) (constant uint (0)) ) (
                            (assign  (x) (var_ref compiler_temp@249)  (constant uint (16)) ) 
                          )
                          (
                            (assign  (x) (var_ref compiler_temp@249)  (constant uint (0)) ) 
                          ))

                          (assign  (x) (var_ref compiler_temp@241)  (expression uint >> (expression uint << (var_ref block@242) (expression uint + (constant uint (24)) (expression uint neg (expression uint + (var_ref compiler_temp@248) (var_ref compiler_temp@249) ) ) ) ) (constant uint (24)) ) ) 
                        ))

                      ))

                      (declare (temporary ) uint compiler_temp@250)
                      (declare () uint block@251)
                      (declare () uint y@252)
                      (declare () uint x@253)
                      (if (expression bool || (expression bool < (swiz x (var_ref coord01@237) )(constant int (0)) ) (expression bool < (swiz y (var_ref coord01@237) )(constant int (0)) ) ) (
                        (assign  (x) (var_ref compiler_temp@250)  (constant uint (0)) ) 
                      )
                      (
                        (assign  (x) (var_ref x@253)  (expression uint i2u (swiz x (var_ref coord01@237) )) ) 
                        (assign  (x) (var_ref y@252)  (expression uint i2u (swiz y (var_ref coord01@237) )) ) 
                        (if (expression bool || (expression bool >= (var_ref x@253) (swiz x (var_ref compiler_temp@239) )) (expression bool >= (var_ref y@252) (swiz y (var_ref compiler_temp@239) )) ) (
                          (assign  (x) (var_ref compiler_temp@250)  (constant uint (0)) ) 
                        )
                        (
                          (declare (temporary ) uint compiler_temp@254)
                          (declare (temporary ) uint compiler_temp@255)
                          (assign  (x) (var_ref compiler_temp@255)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (expression uint + (expression uint + (swiz x (var_ref fastuidraw_uint_varying0) )(expression uint >> (var_ref x@253) (constant uint (1)) ) ) (expression uint * (expression uint >> (var_ref y@252) (constant uint (1)) ) (expression uint >> (expression uint + (swiz x (var_ref compiler_temp@239) )(constant uint (1)) ) (constant uint (1)) ) ) ) ) ) (constant uint (4)) ) ) ) 
                          (declare (temporary ) uint compiler_temp@256)
                          (call __intrinsic_load_ssbo (var_ref compiler_temp@256)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@255) (constant uint (0)) ) (constant uint (2)) ))

                          (assign  (x) (var_ref compiler_temp@254)  (var_ref compiler_temp@256) ) 
                          (assign  (x) (var_ref block@251)  (var_ref compiler_temp@254) ) 
                          (declare (temporary ) uint compiler_temp@257)
                          (if (expression bool != (expression uint & (var_ref x@253) (constant uint (1)) ) (constant uint (0)) ) (
                            (assign  (x) (var_ref compiler_temp@257)  (constant uint (8)) ) 
                          )
                          (
                            (assign  (x) (var_ref compiler_temp@257)  (constant uint (0)) ) 
                          ))

                          (declare (temporary ) uint compiler_temp@258)
                          (if (expression bool != (expression uint & (var_ref y@252) (constant uint (1)) ) (constant uint (0)) ) (
                            (assign  (x) (var_ref compiler_temp@258)  (constant uint (16)) ) 
                          )
                          (
                            (assign  (x) (var_ref compiler_temp@258)  (constant uint (0)) ) 
                          ))

                          (assign  (x) (var_ref compiler_temp@250)  (expression uint >> (expression uint << (var_ref block@251) (expression uint + (constant uint (24)) (expression uint neg (expression uint + (var_ref compiler_temp@257) (var_ref compiler_temp@258) ) ) ) ) (constant uint (24)) ) ) 
                        ))

                      ))

                      (declare (temporary ) uint compiler_temp@259)
                      (declare () uint block@260)
                      (declare () uint y@261)
                      (declare () uint x@262)
                      (if (expression bool || (expression bool < (swiz x (var_ref coord10@236) )(constant int (0)) ) (expression bool < (swiz y (var_ref coord10@236) )(constant int (0)) ) ) (
                        (assign  (x) (var_ref compiler_temp@259)  (constant uint (0)) ) 
                      )
                      (
                        (assign  (x) (var_ref x@262)  (expression uint i2u (swiz x (var_ref coord10@236) )) ) 
                        (assign  (x) (var_ref y@261)  (expression uint i2u (swiz y (var_ref coord10@236) )) ) 
                        (if (expression bool || (expression bool >= (var_ref x@262) (swiz x (var_ref compiler_temp@239) )) (expression bool >= (var_ref y@261) (swiz y (var_ref compiler_temp@239) )) ) (
                          (assign  (x) (var_ref compiler_temp@259)  (constant uint (0)) ) 
                        )
                        (
                          (declare (temporary ) uint compiler_temp@263)
                          (declare (temporary ) uint compiler_temp@264)
                          (assign  (x) (var_ref compiler_temp@264)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (expression uint + (expression uint + (swiz x (var_ref fastuidraw_uint_varying0) )(expression uint >> (var_ref x@262) (constant uint (1)) ) ) (expression uint * (expression uint >> (var_ref y@261) (constant uint (1)) ) (expression uint >> (expression uint + (swiz x (var_ref compiler_temp@239) )(constant uint (1)) ) (constant uint (1)) ) ) ) ) ) (constant uint (4)) ) ) ) 
                          (declare (temporary ) uint compiler_temp@265)
                          (call __intrinsic_load_ssbo (var_ref compiler_temp@265)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@264) (constant uint (0)) ) (constant uint (2)) ))

                          (assign  (x) (var_ref compiler_temp@263)  (var_ref compiler_temp@265) ) 
                          (assign  (x) (var_ref block@260)  (var_ref compiler_temp@263) ) 
                          (declare (temporary ) uint compiler_temp@266)
                          (if (expression bool != (expression uint & (var_ref x@262) (constant uint (1)) ) (constant uint (0)) ) (
                            (assign  (x) (var_ref compiler_temp@266)  (constant uint (8)) ) 
                          )
                          (
                            (assign  (x) (var_ref compiler_temp@266)  (constant uint (0)) ) 
                          ))

                          (declare (temporary ) uint compiler_temp@267)
                          (if (expression bool != (expression uint & (var_ref y@261) (constant uint (1)) ) (constant uint (0)) ) (
                            (assign  (x) (var_ref compiler_temp@267)  (constant uint (16)) ) 
                          )
                          (
                            (assign  (x) (var_ref compiler_temp@267)  (constant uint (0)) ) 
                          ))

                          (assign  (x) (var_ref compiler_temp@259)  (expression uint >> (expression uint << (var_ref block@260) (expression uint + (constant uint (24)) (expression uint neg (expression uint + (var_ref compiler_temp@266) (var_ref compiler_temp@267) ) ) ) ) (constant uint (24)) ) ) 
                        ))

                      ))

                      (declare (temporary ) uint compiler_temp@268)
                      (declare () uint block@269)
                      (declare () uint y@270)
                      (declare () uint x@271)
                      (if (expression bool || (expression bool < (swiz x (var_ref coord11@235) )(constant int (0)) ) (expression bool < (swiz y (var_ref coord11@235) )(constant int (0)) ) ) (
                        (assign  (x) (var_ref compiler_temp@268)  (constant uint (0)) ) 
                      )
                      (
                        (assign  (x) (var_ref x@271)  (expression uint i2u (swiz x (var_ref coord11@235) )) ) 
                        (assign  (x) (var_ref y@270)  (expression uint i2u (swiz y (var_ref coord11@235) )) ) 
                        (if (expression bool || (expression bool >= (var_ref x@271) (swiz x (var_ref compiler_temp@239) )) (expression bool >= (var_ref y@270) (swiz y (var_ref compiler_temp@239) )) ) (
                          (assign  (x) (var_ref compiler_temp@268)  (constant uint (0)) ) 
                        )
                        (
                          (declare (temporary ) uint compiler_temp@272)
                          (declare (temporary ) uint compiler_temp@273)
                          (assign  (x) (var_ref compiler_temp@273)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (expression uint + (expression uint + (swiz x (var_ref fastuidraw_uint_varying0) )(expression uint >> (var_ref x@271) (constant uint (1)) ) ) (expression uint * (expression uint >> (var_ref y@270) (constant uint (1)) ) (expression uint >> (expression uint + (swiz x (var_ref compiler_temp@239) )(constant uint (1)) ) (constant uint (1)) ) ) ) ) ) (constant uint (4)) ) ) ) 
                          (declare (temporary ) uint compiler_temp@274)
                          (call __intrinsic_load_ssbo (var_ref compiler_temp@274)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@273) (constant uint (0)) ) (constant uint (2)) ))

                          (assign  (x) (var_ref compiler_temp@272)  (var_ref compiler_temp@274) ) 
                          (assign  (x) (var_ref block@269)  (var_ref compiler_temp@272) ) 
                          (declare (temporary ) uint compiler_temp@275)
                          (if (expression bool != (expression uint & (var_ref x@271) (constant uint (1)) ) (constant uint (0)) ) (
                            (assign  (x) (var_ref compiler_temp@275)  (constant uint (8)) ) 
                          )
                          (
                            (assign  (x) (var_ref compiler_temp@275)  (constant uint (0)) ) 
                          ))

                          (declare (temporary ) uint compiler_temp@276)
                          (if (expression bool != (expression uint & (var_ref y@270) (constant uint (1)) ) (constant uint (0)) ) (
                            (assign  (x) (var_ref compiler_temp@276)  (constant uint (16)) ) 
                          )
                          (
                            (assign  (x) (var_ref compiler_temp@276)  (constant uint (0)) ) 
                          ))

                          (assign  (x) (var_ref compiler_temp@268)  (expression uint >> (expression uint << (var_ref block@269) (expression uint + (constant uint (24)) (expression uint neg (expression uint + (var_ref compiler_temp@275) (var_ref compiler_temp@276) ) ) ) ) (constant uint (24)) ) ) 
                        ))

                      ))

                      (assign  (x) (var_ref dist)  (expression float + (expression float * (constant float (2.000000)) (expression float * (expression float lrp (expression float lrp (expression float u2f (var_ref compiler_temp@241) ) (expression float u2f (var_ref compiler_temp@250) ) (swiz y (var_ref mixer@234) )) (expression float lrp (expression float u2f (var_ref compiler_temp@259) ) (expression float u2f (var_ref compiler_temp@268) ) (swiz y (var_ref mixer@234) )) (swiz x (var_ref mixer@234) )) (expression float rcp (constant float (255.000000)) ) ) ) (constant float (-1.000000)) ) ) 
                      (declare (temporary ) float dx)
                      (assign  (x) (var_ref dx)  (expression float dFdx (var_ref dist) ) ) 
                      (declare (temporary ) float dy)
                      (assign  (x) (var_ref dy)  (expression float dFdy (var_ref dist) ) ) 
                      (assign  (xyzw) (var_ref p@198)  (swiz xxxx (expression float sat (expression float + (constant float (0.500000)) (expression float * (var_ref dist) (expression float rsq (expression float + (expression float * (var_ref dx) (var_ref dx) ) (expression float * (var_ref dy) (var_ref dy) ) ) ) ) ) ) )) 
                    )
                    (
                      (if (expression bool == (swiz y (var_ref fastuidraw_uint_varying1) )(constant uint (22)) ) (
                        (declare () float cvg)
                        (declare (temporary ) uint glyph_data_location)
                        (assign  (x) (var_ref glyph_data_location)  (expression uint & (swiz x (var_ref fastuidraw_uint_varying0) )(constant uint (1073741823)) ) ) 
                        (declare (temporary ) vec2 glyph_coord_dx)
                        (assign  (xy) (var_ref glyph_coord_dx)  (expression vec2 dFdx (swiz xy (var_ref fastuidraw_float_smooth_varying0) )) ) 
                        (declare (temporary ) vec2 glyph_coord_dy)
                        (assign  (xy) (var_ref glyph_coord_dy)  (expression vec2 dFdy (swiz xy (var_ref fastuidraw_float_smooth_varying0) )) ) 
                        (declare (temporary ) bool use_odd_even_rule)
                        (assign  (x) (var_ref use_odd_even_rule)  (expression bool != (expression uint & (swiz x (var_ref fastuidraw_uint_varying0) )(constant uint (2147483648)) ) (constant uint (0)) ) ) 
                        (declare () float distance)
                        (declare () float nv_distance_increment)
                        (declare () float nv_distance_decrement)
                        (declare () int winding_number)
                        (declare () uint c)
                        (declare () uint src)
                        (declare (temporary ) vec2 compiler_temp@277)
                        (declare (temporary ) vec2 compiler_temp@278)
                        (declare () uint offset)
                        (declare () uint v@279)
                        (assign  (xy) (var_ref compiler_temp@277)  (constant vec2 (-2048.000000 -2048.000000)) ) 
                        (assign  (xy) (var_ref compiler_temp@278)  (constant vec2 (2048.000000 2048.000000)) ) 
                        (assign  (x) (var_ref offset)  (var_ref glyph_data_location) ) 
                        (declare (temporary ) uint compiler_temp@280)
                        (declare (temporary ) uint compiler_temp@281)
                        (assign  (x) (var_ref compiler_temp@281)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (var_ref glyph_data_location) ) ) (constant uint (4)) ) ) ) 
                        (declare (temporary ) uint compiler_temp@282)
                        (call __intrinsic_load_ssbo (var_ref compiler_temp@282)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@281) (constant uint (0)) ) (constant uint (2)) ))

                        (assign  (x) (var_ref compiler_temp@280)  (var_ref compiler_temp@282) ) 
                        (assign  (x) (var_ref v@279)  (var_ref compiler_temp@280) ) 
                        (loop (
                          (declare () bool take_max_choice)
                          (declare () float split_pt)
                          (if (expression bool == (expression uint & (var_ref v@279) (constant uint (1)) ) (constant uint (0)) ) (
                            break
                          )
                          ())

                          (declare (temporary ) uint compiler_temp@283)
                          (assign  (x) (var_ref compiler_temp@283)  (expression uint >> (expression uint << (var_ref v@279) (constant uint (30)) ) (constant uint (31)) ) ) 
                          (if (expression bool == (var_ref compiler_temp@283) (constant uint (0)) ) (
                            (assign  (x) (var_ref split_pt)  (expression float * (constant float (0.500000)) (expression float + (swiz x (var_ref compiler_temp@277) )(swiz x (var_ref compiler_temp@278) )) ) ) 
                            (assign  (x) (var_ref take_max_choice)  (expression bool < (var_ref split_pt) (swiz x (var_ref fastuidraw_float_smooth_varying0) )) ) 
                            (declare (temporary ) float compiler_temp@284)
                            (if (var_ref take_max_choice) (
                              (assign  (x) (var_ref compiler_temp@284)  (var_ref split_pt) ) 
                            )
                            (
                              (assign  (x) (var_ref compiler_temp@284)  (swiz x (var_ref compiler_temp@277) )) 
                            ))

                            (assign  (x) (var_ref compiler_temp@277)  (var_ref compiler_temp@284) ) 
                            (declare (temporary ) float compiler_temp@285)
                            (if (var_ref take_max_choice) (
                              (assign  (x) (var_ref compiler_temp@285)  (swiz x (var_ref compiler_temp@278) )) 
                            )
                            (
                              (assign  (x) (var_ref compiler_temp@285)  (var_ref split_pt) ) 
                            ))

                            (assign  (x) (var_ref compiler_temp@278)  (var_ref compiler_temp@285) ) 
                          )
                          (
                            (assign  (x) (var_ref split_pt)  (expression float * (constant float (0.500000)) (expression float + (swiz y (var_ref compiler_temp@277) )(swiz y (var_ref compiler_temp@278) )) ) ) 
                            (assign  (x) (var_ref take_max_choice)  (expression bool < (var_ref split_pt) (swiz y (var_ref fastuidraw_float_smooth_varying0) )) ) 
                            (declare (temporary ) float compiler_temp@286)
                            (if (var_ref take_max_choice) (
                              (assign  (x) (var_ref compiler_temp@286)  (var_ref split_pt) ) 
                            )
                            (
                              (assign  (x) (var_ref compiler_temp@286)  (swiz y (var_ref compiler_temp@277) )) 
                            ))

                            (assign  (y) (var_ref compiler_temp@277)  (var_ref compiler_temp@286) ) 
                            (declare (temporary ) float compiler_temp@287)
                            (if (var_ref take_max_choice) (
                              (assign  (x) (var_ref compiler_temp@287)  (swiz y (var_ref compiler_temp@278) )) 
                            )
                            (
                              (assign  (x) (var_ref compiler_temp@287)  (var_ref split_pt) ) 
                            ))

                            (assign  (y) (var_ref compiler_temp@278)  (var_ref compiler_temp@287) ) 
                          ))

                          (declare (temporary ) uint compiler_temp@288)
                          (if (var_ref take_max_choice) (
                            (assign  (x) (var_ref compiler_temp@288)  (constant uint (17)) ) 
                          )
                          (
                            (assign  (x) (var_ref compiler_temp@288)  (constant uint (2)) ) 
                          ))

                          (assign  (x) (var_ref offset)  (expression uint + (expression uint >> (expression uint << (var_ref v@279) (expression uint + (constant uint (17)) (expression uint neg (var_ref compiler_temp@288) ) ) ) (constant uint (17)) ) (var_ref glyph_data_location) ) ) 
                          (declare (temporary ) uint compiler_temp@289)
                          (declare (temporary ) uint compiler_temp@290)
                          (assign  (x) (var_ref compiler_temp@290)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (var_ref offset) ) ) (constant uint (4)) ) ) ) 
                          (declare (temporary ) uint compiler_temp@291)
                          (call __intrinsic_load_ssbo (var_ref compiler_temp@291)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@290) (constant uint (0)) ) (constant uint (2)) ))

                          (assign  (x) (var_ref compiler_temp@289)  (var_ref compiler_temp@291) ) 
                          (assign  (x) (var_ref v@279)  (var_ref compiler_temp@289) ) 
                        ))

                        (declare (temporary ) uint compiler_temp@292)
                        (assign  (x) (var_ref compiler_temp@292)  (expression uint >> (expression uint << (var_ref v@279) (constant uint (15)) ) (constant uint (16)) ) ) 
                        (declare (temporary ) uint compiler_temp@293)
                        (assign  (x) (var_ref compiler_temp@293)  (expression uint >> (var_ref v@279) (constant uint (17)) ) ) 
                        (assign  (x) (var_ref nv_distance_increment)  (constant float (120.000000)) ) 
                        (assign  (x) (var_ref nv_distance_decrement)  (constant float (120.000000)) ) 
                        (declare (temporary ) int compiler_temp@294)
                        (declare () vec2 delta)
                        (declare () uvec2 uint_delta)
                        (declare () uint texel)
                        (declare (temporary ) uint compiler_temp@295)
                        (declare (temporary ) uint compiler_temp@296)
                        (assign  (x) (var_ref compiler_temp@296)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (expression uint + (var_ref offset) (constant uint (1)) ) ) ) (constant uint (4)) ) ) ) 
                        (declare (temporary ) uint compiler_temp@297)
                        (call __intrinsic_load_ssbo (var_ref compiler_temp@297)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@296) (constant uint (0)) ) (constant uint (2)) ))

                        (assign  (x) (var_ref compiler_temp@295)  (var_ref compiler_temp@297) ) 
                        (assign  (x) (var_ref texel)  (var_ref compiler_temp@295) ) 
                        (assign  (x) (var_ref uint_delta)  (expression uint >> (expression uint << (var_ref texel) (constant uint (8)) ) (constant uint (24)) ) ) 
                        (assign  (y) (var_ref uint_delta)  (expression uint >> (var_ref texel) (constant uint (24)) ) ) 
                        (assign  (xy) (var_ref delta)  (expression vec2 * (expression vec2 u2f (var_ref uint_delta) ) (expression vec2 + (var_ref compiler_temp@278) (expression vec2 neg (var_ref compiler_temp@277) ) ) ) ) 
                        (assign  (xy) (var_ref delta)  (expression vec2 * (var_ref delta) (expression float rcp (constant float (256.000000)) ) ) ) 
                        (assign  (x) (var_ref compiler_temp@294)  (expression int + (expression int u2i (expression uint >> (expression uint << (var_ref texel) (constant uint (16)) ) (constant uint (16)) ) ) (constant int (-32768)) ) ) 
                        (declare (temporary ) vec2 compiler_temp@298)
                        (declare (temporary ) vec2 compiler_temp@299)
                        (declare (temporary ) float compiler_temp@300)
                        (declare () float det)
                        (declare () vec2 em)
                        (declare () vec2 bottom_row)
                        (declare () vec2 top_row)
                        (declare () vec2 q@301)
                        (assign  (xy) (var_ref q@301)  (expression vec2 + (expression vec2 + (var_ref compiler_temp@277) (var_ref delta) ) (expression vec2 neg (swiz xy (var_ref fastuidraw_float_smooth_varying0) )) ) ) 
                        (assign  (x) (var_ref compiler_temp@299)  (expression float neg (swiz y (var_ref q@301) )) ) 
                        (assign  (y) (var_ref compiler_temp@299)  (swiz x (var_ref q@301) )) 
                        (assign  (x) (var_ref top_row)  (expression float neg (expression float + (expression float * (swiz y (var_ref glyph_coord_dx) )(swiz y (var_ref glyph_coord_dx) )) (expression float * (swiz y (var_ref glyph_coord_dy) )(swiz y (var_ref glyph_coord_dy) )) ) ) ) 
                        (declare (temporary ) float compiler_temp@302)
                        (assign  (x) (var_ref compiler_temp@302)  (expression float + (expression float * (swiz x (var_ref glyph_coord_dx) )(swiz y (var_ref glyph_coord_dx) )) (expression float * (swiz x (var_ref glyph_coord_dy) )(swiz y (var_ref glyph_coord_dy) )) ) ) 
                        (assign  (x) (var_ref bottom_row)  (var_ref compiler_temp@302) ) 
                        (assign  (y) (var_ref top_row)  (var_ref compiler_temp@302) ) 
                        (assign  (y) (var_ref bottom_row)  (expression float neg (expression float + (expression float * (swiz x (var_ref glyph_coord_dx) )(swiz x (var_ref glyph_coord_dx) )) (expression float * (swiz x (var_ref glyph_coord_dy) )(swiz x (var_ref glyph_coord_dy) )) ) ) ) 
                        (assign  (x) (var_ref compiler_temp@298)  (expression float dot (var_ref top_row) (var_ref q@301) ) ) 
                        (assign  (y) (var_ref compiler_temp@298)  (expression float dot (var_ref bottom_row) (var_ref q@301) ) ) 
                        (assign  (x) (var_ref em)  (expression float + (expression float abs (expression float dot (var_ref compiler_temp@298) (var_ref glyph_coord_dx) ) ) (expression float abs (expression float dot (var_ref compiler_temp@298) (var_ref glyph_coord_dy) ) ) ) ) 
                        (assign  (y) (var_ref em)  (expression float + (expression float abs (expression float dot (var_ref compiler_temp@299) (var_ref glyph_coord_dx) ) ) (expression float abs (expression float dot (var_ref compiler_temp@299) (var_ref glyph_coord_dy) ) ) ) ) 
                        (assign  (x) (var_ref em)  (expression float max (swiz x (var_ref em) )(constant float (0x1.ad7f2ap-24)) ) ) 
                        (assign  (y) (var_ref em)  (expression float max (swiz y (var_ref em) )(constant float (0x1.ad7f2ap-24)) ) ) 
                        (assign  (xy) (var_ref compiler_temp@298)  (expression vec2 * (var_ref compiler_temp@298) (expression float rcp (swiz x (var_ref em) )) ) ) 
                        (assign  (xy) (var_ref compiler_temp@299)  (expression vec2 * (var_ref compiler_temp@299) (expression float rcp (swiz y (var_ref em) )) ) ) 
                        (assign  (x) (var_ref compiler_temp@300)  (expression float dot (var_ref compiler_temp@298) (var_ref q@301) ) ) 
                        (if (expression bool < (var_ref compiler_temp@300) (constant float (0.000000)) ) (
                          (assign  (xy) (var_ref compiler_temp@298)  (expression vec2 neg (var_ref compiler_temp@298) ) ) 
                          (assign  (x) (var_ref compiler_temp@300)  (expression float neg (var_ref compiler_temp@300) ) ) 
                        )
                        ())

                        (assign  (x) (var_ref det)  (expression float + (expression float * (swiz x (var_ref compiler_temp@298) )(swiz y (var_ref compiler_temp@299) )) (expression float neg (expression float * (swiz y (var_ref compiler_temp@298) )(swiz x (var_ref compiler_temp@299) )) ) ) ) 
                        (if (expression bool < (var_ref det) (constant float (0.000000)) ) (
                          (assign  (xy) (var_ref compiler_temp@299)  (expression vec2 neg (var_ref compiler_temp@299) ) ) 
                        )
                        ())

                        (assign  (x) (var_ref winding_number)  (var_ref compiler_temp@294) ) 
                        (assign  (x) (var_ref src)  (expression uint + (var_ref compiler_temp@292) (var_ref glyph_data_location) ) ) 
                        (assign  (x) (var_ref c)  (constant uint (0)) ) 
                        (loop (
                          (declare () uint curve_pair)
                          (if (expression bool >= (var_ref c) (var_ref compiler_temp@293) ) (
                            break
                          )
                          ())

                          (declare (temporary ) uint compiler_temp@303)
                          (declare (temporary ) uint compiler_temp@304)
                          (assign  (x) (var_ref compiler_temp@304)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (var_ref src) ) ) (constant uint (4)) ) ) ) 
                          (declare (temporary ) uint compiler_temp@305)
                          (call __intrinsic_load_ssbo (var_ref compiler_temp@305)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@304) (constant uint (0)) ) (constant uint (2)) ))

                          (assign  (x) (var_ref compiler_temp@303)  (var_ref compiler_temp@305) ) 
                          (assign  (x) (var_ref curve_pair)  (var_ref compiler_temp@303) ) 
                          (assign  (x) (var_ref src)  (expression uint + (var_ref src) (constant uint (1)) ) ) 
                          (declare (temporary ) uint compiler_temp@306)
                          (assign  (x) (var_ref compiler_temp@306)  (expression uint >> (expression uint << (var_ref curve_pair) (constant uint (16)) ) (constant uint (16)) ) ) 
                          (declare (temporary ) vec2 compiler_temp@307)
                          (declare (temporary ) vec2 compiler_temp@308)
                          (declare (temporary ) bool compiler_temp@309)
                          (declare () uint curve_src)
                          (assign  (x) (var_ref curve_src)  (expression uint + (var_ref glyph_data_location) (expression uint >> (expression uint << (var_ref compiler_temp@306) (constant uint (17)) ) (constant uint (17)) ) ) ) 
                          (assign  (x) (var_ref compiler_temp@309)  (expression bool != (expression uint & (var_ref compiler_temp@306) (constant uint (32768)) ) (constant uint (0)) ) ) 
                          (declare (temporary ) vec2 compiler_temp@310)
                          (declare (temporary ) uint compiler_temp@311)
                          (declare (temporary ) uint compiler_temp@312)
                          (assign  (x) (var_ref compiler_temp@312)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (var_ref curve_src) ) ) (constant uint (4)) ) ) ) 
                          (declare (temporary ) uint compiler_temp@313)
                          (call __intrinsic_load_ssbo (var_ref compiler_temp@313)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@312) (constant uint (0)) ) (constant uint (2)) ))

                          (assign  (x) (var_ref compiler_temp@311)  (var_ref compiler_temp@313) ) 
                          (assign  (xy) (var_ref compiler_temp@310)  (expression vec2 unpackHalf2x16 (var_ref compiler_temp@311) ) ) 
                          (declare (temporary ) vec2 compiler_temp@314)
                          (declare (temporary ) uint compiler_temp@315)
                          (declare (temporary ) uint compiler_temp@316)
                          (assign  (x) (var_ref compiler_temp@316)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (expression uint + (var_ref curve_src) (constant uint (1)) ) ) ) (constant uint (4)) ) ) ) 
                          (declare (temporary ) uint compiler_temp@317)
                          (call __intrinsic_load_ssbo (var_ref compiler_temp@317)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@316) (constant uint (0)) ) (constant uint (2)) ))

                          (assign  (x) (var_ref compiler_temp@315)  (var_ref compiler_temp@317) ) 
                          (assign  (xy) (var_ref compiler_temp@314)  (expression vec2 unpackHalf2x16 (var_ref compiler_temp@315) ) ) 
                          (assign  (xy) (var_ref compiler_temp@307)  (var_ref compiler_temp@314) ) 
                          (if (var_ref compiler_temp@309) (
                            (declare (temporary ) uint compiler_temp@318)
                            (declare (temporary ) uint compiler_temp@319)
                            (assign  (x) (var_ref compiler_temp@319)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (expression uint + (var_ref curve_src) (constant uint (2)) ) ) ) (constant uint (4)) ) ) ) 
                            (declare (temporary ) uint compiler_temp@320)
                            (call __intrinsic_load_ssbo (var_ref compiler_temp@320)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@319) (constant uint (0)) ) (constant uint (2)) ))

                            (assign  (x) (var_ref compiler_temp@318)  (var_ref compiler_temp@320) ) 
                            (assign  (xy) (var_ref compiler_temp@308)  (expression vec2 unpackHalf2x16 (var_ref compiler_temp@318) ) ) 
                          )
                          (
                            (assign  (xy) (var_ref compiler_temp@308)  (var_ref compiler_temp@314) ) 
                            (assign  (xy) (var_ref compiler_temp@307)  (expression vec2 * (constant float (0.500000)) (expression vec2 + (var_ref compiler_temp@310) (var_ref compiler_temp@314) ) ) ) 
                          ))

                          (declare (temporary ) float compiler_temp@321)
                          (declare (temporary ) float compiler_temp@322)
                          (assign  (x) (var_ref compiler_temp@321)  (var_ref nv_distance_increment) ) 
                          (assign  (x) (var_ref compiler_temp@322)  (var_ref nv_distance_decrement) ) 
                          (declare () uvec2 code)
                          (declare () int R)
                          (declare () vec2 B)
                          (declare () vec2 A)
                          (assign  (x) (var_ref R)  (constant int (0)) ) 
                          (declare (temporary ) vec2 compiler_temp@323)
                          (assign  (xy) (var_ref compiler_temp@323)  (expression vec2 + (var_ref compiler_temp@310) (expression vec2 neg (swiz xy (var_ref fastuidraw_float_smooth_varying0) )) ) ) 
                          (declare (temporary ) vec2 compiler_temp@324)
                          (assign  (x) (var_ref compiler_temp@324)  (expression float dot (var_ref compiler_temp@298) (var_ref compiler_temp@323) ) ) 
                          (assign  (y) (var_ref compiler_temp@324)  (expression float dot (var_ref compiler_temp@299) (var_ref compiler_temp@323) ) ) 
                          (declare (temporary ) vec2 compiler_temp@325)
                          (assign  (xy) (var_ref compiler_temp@325)  (expression vec2 + (var_ref compiler_temp@307) (expression vec2 neg (swiz xy (var_ref fastuidraw_float_smooth_varying0) )) ) ) 
                          (declare (temporary ) vec2 compiler_temp@326)
                          (assign  (x) (var_ref compiler_temp@326)  (expression float dot (var_ref compiler_temp@298) (var_ref compiler_temp@325) ) ) 
                          (assign  (y) (var_ref compiler_temp@326)  (expression float dot (var_ref compiler_temp@299) (var_ref compiler_temp@325) ) ) 
                          (declare (temporary ) vec2 compiler_temp@327)
                          (assign  (xy) (var_ref compiler_temp@327)  (expression vec2 + (var_ref compiler_temp@308) (expression vec2 neg (swiz xy (var_ref fastuidraw_float_smooth_varying0) )) ) ) 
                          (declare (temporary ) vec2 compiler_temp@328)
                          (assign  (x) (var_ref compiler_temp@328)  (expression float dot (var_ref compiler_temp@298) (var_ref compiler_temp@327) ) ) 
                          (assign  (y) (var_ref compiler_temp@328)  (expression float dot (var_ref compiler_temp@299) (var_ref compiler_temp@327) ) ) 
                          (assign  (xy) (var_ref A)  (expression vec2 + (expression vec2 + (var_ref compiler_temp@324) (expression vec2 neg (expression vec2 * (constant float (2.000000)) (var_ref compiler_temp@326) ) ) ) (var_ref compiler_temp@328) ) ) 
                          (assign  (xy) (var_ref B)  (expression vec2 + (var_ref compiler_temp@324) (expression vec2 neg (var_ref compiler_temp@326) ) ) ) 
                          (declare (temporary ) uint compiler_temp@329)
                          (declare (temporary ) uint compiler_temp@330)
                          (if (expression bool < (constant float (0.000000)) (swiz x (var_ref compiler_temp@324) )) (
                            (assign  (x) (var_ref compiler_temp@330)  (constant uint (2)) ) 
                          )
                          (
                            (assign  (x) (var_ref compiler_temp@330)  (constant uint (0)) ) 
                          ))

                          (declare (temporary ) uint compiler_temp@331)
                          (if (expression bool < (constant float (0.000000)) (swiz x (var_ref compiler_temp@326) )) (
                            (assign  (x) (var_ref compiler_temp@331)  (constant uint (4)) ) 
                          )
                          (
                            (assign  (x) (var_ref compiler_temp@331)  (constant uint (0)) ) 
                          ))

                          (declare (temporary ) uint compiler_temp@332)
                          (if (expression bool < (constant float (0.000000)) (swiz x (var_ref compiler_temp@328) )) (
                            (assign  (x) (var_ref compiler_temp@332)  (constant uint (8)) ) 
                          )
                          (
                            (assign  (x) (var_ref compiler_temp@332)  (constant uint (0)) ) 
                          ))

                          (assign  (x) (var_ref compiler_temp@329)  (expression uint & (expression uint >> (constant uint (11892)) (expression uint + (expression uint + (var_ref compiler_temp@330) (var_ref compiler_temp@331) ) (var_ref compiler_temp@332) ) ) (constant uint (3)) ) ) 
                          (assign  (x) (var_ref code)  (var_ref compiler_temp@329) ) 
                          (declare (temporary ) uint compiler_temp@333)
                          (declare (temporary ) uint compiler_temp@334)
                          (if (expression bool < (constant float (0.000000)) (swiz y (var_ref compiler_temp@324) )) (
                            (assign  (x) (var_ref compiler_temp@334)  (constant uint (2)) ) 
                          )
                          (
                            (assign  (x) (var_ref compiler_temp@334)  (constant uint (0)) ) 
                          ))

                          (declare (temporary ) uint compiler_temp@335)
                          (if (expression bool < (constant float (0.000000)) (swiz y (var_ref compiler_temp@326) )) (
                            (assign  (x) (var_ref compiler_temp@335)  (constant uint (4)) ) 
                          )
                          (
                            (assign  (x) (var_ref compiler_temp@335)  (constant uint (0)) ) 
                          ))

                          (declare (temporary ) uint compiler_temp@336)
                          (if (expression bool < (constant float (0.000000)) (swiz y (var_ref compiler_temp@328) )) (
                            (assign  (x) (var_ref compiler_temp@336)  (constant uint (8)) ) 
                          )
                          (
                            (assign  (x) (var_ref compiler_temp@336)  (constant uint (0)) ) 
                          ))

                          (assign  (x) (var_ref compiler_temp@333)  (expression uint & (expression uint >> (constant uint (11892)) (expression uint + (expression uint + (var_ref compiler_temp@334) (var_ref compiler_temp@335) ) (var_ref compiler_temp@336) ) ) (constant uint (3)) ) ) 
                          (assign  (y) (var_ref code)  (var_ref compiler_temp@333) ) 
                          (if (expression bool != (var_ref compiler_temp@333) (constant uint (0)) ) (
                            (declare () float x2)
                            (declare () float x1)
                            (declare () float t2)
                            (declare () float t1@337)
                            (declare (temporary ) bool compiler_temp@338)
                            (if (var_ref compiler_temp@309) (
                              (assign  (x) (var_ref compiler_temp@338)  (expression bool < (constant float (0.000100)) (expression float abs (swiz y (var_ref A) )) ) ) 
                            )
                            (
                              (assign  (x) (var_ref compiler_temp@338)  (constant bool (0)) ) 
                            ))

                            (if (var_ref compiler_temp@338) (
                              (declare () float D)
                              (declare (temporary ) float compiler_temp@339)
                              (assign  (x) (var_ref compiler_temp@339)  (expression float rcp (swiz y (var_ref A) )) ) 
                              (assign  (x) (var_ref D)  (expression float + (expression float * (swiz y (var_ref B) )(swiz y (var_ref B) )) (expression float neg (expression float * (swiz y (var_ref A) )(swiz y (var_ref compiler_temp@324) )) ) ) ) 
                              (if (expression bool < (var_ref D) (constant float (0.000000)) ) (
                                (assign  (y) (var_ref code)  (constant uint (0)) ) 
                                (assign  (x) (var_ref D)  (constant float (0.000000)) ) 
                              )
                              ())

                              (declare (temporary ) float compiler_temp@340)
                              (assign  (x) (var_ref compiler_temp@340)  (expression float sqrt (var_ref D) ) ) 
                              (assign  (x) (var_ref D)  (var_ref compiler_temp@340) ) 
                              (assign  (x) (var_ref t1@337)  (expression float * (expression float + (swiz y (var_ref B) )(expression float neg (var_ref compiler_temp@340) ) ) (var_ref compiler_temp@339) ) ) 
                              (assign  (x) (var_ref t2)  (expression float * (expression float + (swiz y (var_ref B) )(var_ref compiler_temp@340) ) (var_ref compiler_temp@339) ) ) 
                            )
                            (
                              (declare (temporary ) float compiler_temp@341)
                              (assign  (x) (var_ref compiler_temp@341)  (expression float * (expression float * (constant float (0.500000)) (swiz y (var_ref compiler_temp@324) )) (expression float rcp (swiz y (var_ref B) )) ) ) 
                              (assign  (x) (var_ref t2)  (var_ref compiler_temp@341) ) 
                              (assign  (x) (var_ref t1@337)  (var_ref compiler_temp@341) ) 
                            ))

                            (assign  (x) (var_ref x1)  (expression float + (expression float * (expression float + (expression float * (swiz x (var_ref A) )(var_ref t1@337) ) (expression float neg (expression float * (swiz x (var_ref B) )(constant float (2.000000)) ) ) ) (var_ref t1@337) ) (swiz x (var_ref compiler_temp@324) )) ) 
                            (assign  (x) (var_ref x2)  (expression float + (expression float * (expression float + (expression float * (swiz x (var_ref A) )(var_ref t2) ) (expression float neg (expression float * (swiz x (var_ref B) )(constant float (2.000000)) ) ) ) (var_ref t2) ) (swiz x (var_ref compiler_temp@324) )) ) 
                            (if (expression bool != (expression uint & (swiz y (var_ref code) )(constant uint (1)) ) (constant uint (0)) ) (
                              (if (expression bool && (expression bool >= (var_ref compiler_temp@300) (var_ref x1) ) (expression bool >= (var_ref x1) (constant float (0.000000)) ) ) (
                                (assign  (x) (var_ref R)  (constant int (1)) ) 
                              )
                              ())

                              (declare (temporary ) float compiler_temp@342)
                              (assign  (x) (var_ref compiler_temp@342)  (expression float abs (var_ref x1) ) ) 
                              (declare (temporary ) float compiler_temp@343)
                              (declare (temporary ) float compiler_temp@344)
                              (assign  (x) (var_ref compiler_temp@343)  (var_ref nv_distance_increment) ) 
                              (assign  (x) (var_ref compiler_temp@344)  (var_ref nv_distance_decrement) ) 
                              (if (expression bool < (var_ref x1) (constant float (0.000000)) ) (
                                (assign  (x) (var_ref compiler_temp@343)  (expression float min (var_ref nv_distance_increment) (var_ref compiler_temp@342) ) ) 
                              )
                              (
                                (assign  (x) (var_ref compiler_temp@344)  (expression float min (var_ref nv_distance_decrement) (var_ref compiler_temp@342) ) ) 
                              ))

                              (assign  (x) (var_ref compiler_temp@321)  (var_ref compiler_temp@343) ) 
                              (assign  (x) (var_ref compiler_temp@322)  (var_ref compiler_temp@344) ) 
                            )
                            ())

                            (if (expression bool < (constant uint (1)) (swiz y (var_ref code) )) (
                              (if (expression bool && (expression bool >= (var_ref compiler_temp@300) (var_ref x2) ) (expression bool >= (var_ref x2) (constant float (0.000000)) ) ) (
                                (assign  (x) (var_ref R)  (expression int + (var_ref R) (constant int (-1)) ) ) 
                              )
                              ())

                              (declare (temporary ) float compiler_temp@345)
                              (assign  (x) (var_ref compiler_temp@345)  (expression float abs (var_ref x2) ) ) 
                              (declare (temporary ) float compiler_temp@346)
                              (declare (temporary ) float compiler_temp@347)
                              (assign  (x) (var_ref compiler_temp@346)  (var_ref compiler_temp@321) ) 
                              (assign  (x) (var_ref compiler_temp@347)  (var_ref compiler_temp@322) ) 
                              (if (expression bool < (constant float (0.000000)) (var_ref x2) ) (
                                (assign  (x) (var_ref compiler_temp@346)  (expression float min (var_ref compiler_temp@321) (var_ref compiler_temp@345) ) ) 
                              )
                              (
                                (assign  (x) (var_ref compiler_temp@347)  (expression float min (var_ref compiler_temp@322) (var_ref compiler_temp@345) ) ) 
                              ))

                              (assign  (x) (var_ref compiler_temp@321)  (var_ref compiler_temp@346) ) 
                              (assign  (x) (var_ref compiler_temp@322)  (var_ref compiler_temp@347) ) 
                            )
                            ())

                          )
                          ())

                          (if (expression bool != (var_ref compiler_temp@329) (constant uint (0)) ) (
                            (declare () float y2)
                            (declare () float y1)
                            (declare () float t2@348)
                            (declare () float t1@349)
                            (declare (temporary ) bool compiler_temp@350)
                            (if (var_ref compiler_temp@309) (
                              (assign  (x) (var_ref compiler_temp@350)  (expression bool < (constant float (0.000100)) (expression float abs (swiz x (var_ref A) )) ) ) 
                            )
                            (
                              (assign  (x) (var_ref compiler_temp@350)  (constant bool (0)) ) 
                            ))

                            (if (var_ref compiler_temp@350) (
                              (declare () float D@351)
                              (declare (temporary ) float compiler_temp@352)
                              (assign  (x) (var_ref compiler_temp@352)  (expression float rcp (swiz x (var_ref A) )) ) 
                              (assign  (x) (var_ref D@351)  (expression float + (expression float * (swiz x (var_ref B) )(swiz x (var_ref B) )) (expression float neg (expression float * (swiz x (var_ref A) )(swiz x (var_ref compiler_temp@324) )) ) ) ) 
                              (if (expression bool < (var_ref D@351) (constant float (0.000000)) ) (
                                (assign  (x) (var_ref code)  (constant uint (0)) ) 
                                (assign  (x) (var_ref D@351)  (constant float (0.000000)) ) 
                              )
                              ())

                              (declare (temporary ) float compiler_temp@353)
                              (assign  (x) (var_ref compiler_temp@353)  (expression float sqrt (var_ref D@351) ) ) 
                              (assign  (x) (var_ref D@351)  (var_ref compiler_temp@353) ) 
                              (assign  (x) (var_ref t1@349)  (expression float * (expression float + (swiz x (var_ref B) )(expression float neg (var_ref compiler_temp@353) ) ) (var_ref compiler_temp@352) ) ) 
                              (assign  (x) (var_ref t2@348)  (expression float * (expression float + (swiz x (var_ref B) )(var_ref compiler_temp@353) ) (var_ref compiler_temp@352) ) ) 
                            )
                            (
                              (declare (temporary ) float compiler_temp@354)
                              (assign  (x) (var_ref compiler_temp@354)  (expression float * (expression float * (constant float (0.500000)) (swiz x (var_ref compiler_temp@324) )) (expression float rcp (swiz x (var_ref B) )) ) ) 
                              (assign  (x) (var_ref t2@348)  (var_ref compiler_temp@354) ) 
                              (assign  (x) (var_ref t1@349)  (var_ref compiler_temp@354) ) 
                            ))

                            (assign  (x) (var_ref y1)  (expression float + (expression float * (expression float + (expression float * (swiz y (var_ref A) )(var_ref t1@349) ) (expression float neg (expression float * (swiz y (var_ref B) )(constant float (2.000000)) ) ) ) (var_ref t1@349) ) (swiz y (var_ref compiler_temp@324) )) ) 
                            (assign  (x) (var_ref y2)  (expression float + (expression float * (expression float + (expression float * (swiz y (var_ref A) )(var_ref t2@348) ) (expression float neg (expression float * (swiz y (var_ref B) )(constant float (2.000000)) ) ) ) (var_ref t2@348) ) (swiz y (var_ref compiler_temp@324) )) ) 
                            (if (expression bool != (expression uint & (swiz x (var_ref code) )(constant uint (1)) ) (constant uint (0)) ) (
                              (declare (temporary ) float compiler_temp@355)
                              (assign  (x) (var_ref compiler_temp@355)  (expression float abs (var_ref y1) ) ) 
                              (declare (temporary ) float compiler_temp@356)
                              (declare (temporary ) float compiler_temp@357)
                              (assign  (x) (var_ref compiler_temp@356)  (var_ref compiler_temp@321) ) 
                              (assign  (x) (var_ref compiler_temp@357)  (var_ref compiler_temp@322) ) 
                              (if (expression bool < (constant float (0.000000)) (var_ref y1) ) (
                                (assign  (x) (var_ref compiler_temp@356)  (expression float min (var_ref compiler_temp@321) (var_ref compiler_temp@355) ) ) 
                              )
                              (
                                (assign  (x) (var_ref compiler_temp@357)  (expression float min (var_ref compiler_temp@322) (var_ref compiler_temp@355) ) ) 
                              ))

                              (assign  (x) (var_ref compiler_temp@321)  (var_ref compiler_temp@356) ) 
                              (assign  (x) (var_ref compiler_temp@322)  (var_ref compiler_temp@357) ) 
                            )
                            ())

                            (if (expression bool < (constant uint (1)) (swiz x (var_ref code) )) (
                              (declare (temporary ) float compiler_temp@358)
                              (assign  (x) (var_ref compiler_temp@358)  (expression float abs (var_ref y2) ) ) 
                              (declare (temporary ) float compiler_temp@359)
                              (declare (temporary ) float compiler_temp@360)
                              (assign  (x) (var_ref compiler_temp@359)  (var_ref compiler_temp@321) ) 
                              (assign  (x) (var_ref compiler_temp@360)  (var_ref compiler_temp@322) ) 
                              (if (expression bool < (var_ref y2) (constant float (0.000000)) ) (
                                (assign  (x) (var_ref compiler_temp@359)  (expression float min (var_ref compiler_temp@321) (var_ref compiler_temp@358) ) ) 
                              )
                              (
                                (assign  (x) (var_ref compiler_temp@360)  (expression float min (var_ref compiler_temp@322) (var_ref compiler_temp@358) ) ) 
                              ))

                              (assign  (x) (var_ref compiler_temp@321)  (var_ref compiler_temp@359) ) 
                              (assign  (x) (var_ref compiler_temp@322)  (var_ref compiler_temp@360) ) 
                            )
                            ())

                          )
                          ())

                          (assign  (x) (var_ref nv_distance_increment)  (var_ref compiler_temp@321) ) 
                          (assign  (x) (var_ref nv_distance_decrement)  (var_ref compiler_temp@322) ) 
                          (assign  (x) (var_ref winding_number)  (expression int + (var_ref winding_number) (var_ref R) ) ) 
                          (if (expression bool < (expression uint + (var_ref c) (constant uint (1)) ) (var_ref compiler_temp@293) ) (
                            (declare (temporary ) uint compiler_temp@361)
                            (assign  (x) (var_ref compiler_temp@361)  (expression uint >> (var_ref curve_pair) (constant uint (16)) ) ) 
                            (declare (temporary ) vec2 compiler_temp@362)
                            (declare (temporary ) vec2 compiler_temp@363)
                            (declare (temporary ) bool compiler_temp@364)
                            (declare () uint curve_src@365)
                            (assign  (x) (var_ref curve_src@365)  (expression uint + (var_ref glyph_data_location) (expression uint >> (expression uint << (var_ref compiler_temp@361) (constant uint (17)) ) (constant uint (17)) ) ) ) 
                            (assign  (x) (var_ref compiler_temp@364)  (expression bool != (expression uint & (var_ref compiler_temp@361) (constant uint (32768)) ) (constant uint (0)) ) ) 
                            (declare (temporary ) vec2 compiler_temp@366)
                            (declare (temporary ) uint compiler_temp@367)
                            (declare (temporary ) uint compiler_temp@368)
                            (assign  (x) (var_ref compiler_temp@368)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (var_ref curve_src@365) ) ) (constant uint (4)) ) ) ) 
                            (declare (temporary ) uint compiler_temp@369)
                            (call __intrinsic_load_ssbo (var_ref compiler_temp@369)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@368) (constant uint (0)) ) (constant uint (2)) ))

                            (assign  (x) (var_ref compiler_temp@367)  (var_ref compiler_temp@369) ) 
                            (assign  (xy) (var_ref compiler_temp@366)  (expression vec2 unpackHalf2x16 (var_ref compiler_temp@367) ) ) 
                            (declare (temporary ) vec2 compiler_temp@370)
                            (declare (temporary ) uint compiler_temp@371)
                            (declare (temporary ) uint compiler_temp@372)
                            (assign  (x) (var_ref compiler_temp@372)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (expression uint + (var_ref curve_src@365) (constant uint (1)) ) ) ) (constant uint (4)) ) ) ) 
                            (declare (temporary ) uint compiler_temp@373)
                            (call __intrinsic_load_ssbo (var_ref compiler_temp@373)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@372) (constant uint (0)) ) (constant uint (2)) ))

                            (assign  (x) (var_ref compiler_temp@371)  (var_ref compiler_temp@373) ) 
                            (assign  (xy) (var_ref compiler_temp@370)  (expression vec2 unpackHalf2x16 (var_ref compiler_temp@371) ) ) 
                            (assign  (xy) (var_ref compiler_temp@362)  (var_ref compiler_temp@370) ) 
                            (if (var_ref compiler_temp@364) (
                              (declare (temporary ) uint compiler_temp@374)
                              (declare (temporary ) uint compiler_temp@375)
                              (assign  (x) (var_ref compiler_temp@375)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (expression uint + (var_ref curve_src@365) (constant uint (2)) ) ) ) (constant uint (4)) ) ) ) 
                              (declare (temporary ) uint compiler_temp@376)
                              (call __intrinsic_load_ssbo (var_ref compiler_temp@376)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@375) (constant uint (0)) ) (constant uint (2)) ))

                              (assign  (x) (var_ref compiler_temp@374)  (var_ref compiler_temp@376) ) 
                              (assign  (xy) (var_ref compiler_temp@363)  (expression vec2 unpackHalf2x16 (var_ref compiler_temp@374) ) ) 
                            )
                            (
                              (assign  (xy) (var_ref compiler_temp@363)  (var_ref compiler_temp@370) ) 
                              (assign  (xy) (var_ref compiler_temp@362)  (expression vec2 * (constant float (0.500000)) (expression vec2 + (var_ref compiler_temp@366) (var_ref compiler_temp@370) ) ) ) 
                            ))

                            (declare (temporary ) float compiler_temp@377)
                            (declare (temporary ) float compiler_temp@378)
                            (assign  (x) (var_ref compiler_temp@377)  (var_ref compiler_temp@321) ) 
                            (assign  (x) (var_ref compiler_temp@378)  (var_ref compiler_temp@322) ) 
                            (declare () uvec2 code@379)
                            (declare () int R@380)
                            (declare () vec2 B@381)
                            (declare () vec2 A@382)
                            (assign  (x) (var_ref R@380)  (constant int (0)) ) 
                            (declare (temporary ) vec2 compiler_temp@383)
                            (assign  (xy) (var_ref compiler_temp@383)  (expression vec2 + (var_ref compiler_temp@366) (expression vec2 neg (swiz xy (var_ref fastuidraw_float_smooth_varying0) )) ) ) 
                            (declare (temporary ) vec2 compiler_temp@384)
                            (assign  (x) (var_ref compiler_temp@384)  (expression float dot (var_ref compiler_temp@298) (var_ref compiler_temp@383) ) ) 
                            (assign  (y) (var_ref compiler_temp@384)  (expression float dot (var_ref compiler_temp@299) (var_ref compiler_temp@383) ) ) 
                            (declare (temporary ) vec2 compiler_temp@385)
                            (assign  (xy) (var_ref compiler_temp@385)  (expression vec2 + (var_ref compiler_temp@362) (expression vec2 neg (swiz xy (var_ref fastuidraw_float_smooth_varying0) )) ) ) 
                            (declare (temporary ) vec2 compiler_temp@386)
                            (assign  (x) (var_ref compiler_temp@386)  (expression float dot (var_ref compiler_temp@298) (var_ref compiler_temp@385) ) ) 
                            (assign  (y) (var_ref compiler_temp@386)  (expression float dot (var_ref compiler_temp@299) (var_ref compiler_temp@385) ) ) 
                            (declare (temporary ) vec2 compiler_temp@387)
                            (assign  (xy) (var_ref compiler_temp@387)  (expression vec2 + (var_ref compiler_temp@363) (expression vec2 neg (swiz xy (var_ref fastuidraw_float_smooth_varying0) )) ) ) 
                            (declare (temporary ) vec2 compiler_temp@388)
                            (assign  (x) (var_ref compiler_temp@388)  (expression float dot (var_ref compiler_temp@298) (var_ref compiler_temp@387) ) ) 
                            (assign  (y) (var_ref compiler_temp@388)  (expression float dot (var_ref compiler_temp@299) (var_ref compiler_temp@387) ) ) 
                            (assign  (xy) (var_ref A@382)  (expression vec2 + (expression vec2 + (var_ref compiler_temp@384) (expression vec2 neg (expression vec2 * (constant float (2.000000)) (var_ref compiler_temp@386) ) ) ) (var_ref compiler_temp@388) ) ) 
                            (assign  (xy) (var_ref B@381)  (expression vec2 + (var_ref compiler_temp@384) (expression vec2 neg (var_ref compiler_temp@386) ) ) ) 
                            (declare (temporary ) uint compiler_temp@389)
                            (declare (temporary ) uint compiler_temp@390)
                            (if (expression bool < (constant float (0.000000)) (swiz x (var_ref compiler_temp@384) )) (
                              (assign  (x) (var_ref compiler_temp@390)  (constant uint (2)) ) 
                            )
                            (
                              (assign  (x) (var_ref compiler_temp@390)  (constant uint (0)) ) 
                            ))

                            (declare (temporary ) uint compiler_temp@391)
                            (if (expression bool < (constant float (0.000000)) (swiz x (var_ref compiler_temp@386) )) (
                              (assign  (x) (var_ref compiler_temp@391)  (constant uint (4)) ) 
                            )
                            (
                              (assign  (x) (var_ref compiler_temp@391)  (constant uint (0)) ) 
                            ))

                            (declare (temporary ) uint compiler_temp@392)
                            (if (expression bool < (constant float (0.000000)) (swiz x (var_ref compiler_temp@388) )) (
                              (assign  (x) (var_ref compiler_temp@392)  (constant uint (8)) ) 
                            )
                            (
                              (assign  (x) (var_ref compiler_temp@392)  (constant uint (0)) ) 
                            ))

                            (assign  (x) (var_ref compiler_temp@389)  (expression uint & (expression uint >> (constant uint (11892)) (expression uint + (expression uint + (var_ref compiler_temp@390) (var_ref compiler_temp@391) ) (var_ref compiler_temp@392) ) ) (constant uint (3)) ) ) 
                            (assign  (x) (var_ref code@379)  (var_ref compiler_temp@389) ) 
                            (declare (temporary ) uint compiler_temp@393)
                            (declare (temporary ) uint compiler_temp@394)
                            (if (expression bool < (constant float (0.000000)) (swiz y (var_ref compiler_temp@384) )) (
                              (assign  (x) (var_ref compiler_temp@394)  (constant uint (2)) ) 
                            )
                            (
                              (assign  (x) (var_ref compiler_temp@394)  (constant uint (0)) ) 
                            ))

                            (declare (temporary ) uint compiler_temp@395)
                            (if (expression bool < (constant float (0.000000)) (swiz y (var_ref compiler_temp@386) )) (
                              (assign  (x) (var_ref compiler_temp@395)  (constant uint (4)) ) 
                            )
                            (
                              (assign  (x) (var_ref compiler_temp@395)  (constant uint (0)) ) 
                            ))

                            (declare (temporary ) uint compiler_temp@396)
                            (if (expression bool < (constant float (0.000000)) (swiz y (var_ref compiler_temp@388) )) (
                              (assign  (x) (var_ref compiler_temp@396)  (constant uint (8)) ) 
                            )
                            (
                              (assign  (x) (var_ref compiler_temp@396)  (constant uint (0)) ) 
                            ))

                            (assign  (x) (var_ref compiler_temp@393)  (expression uint & (expression uint >> (constant uint (11892)) (expression uint + (expression uint + (var_ref compiler_temp@394) (var_ref compiler_temp@395) ) (var_ref compiler_temp@396) ) ) (constant uint (3)) ) ) 
                            (assign  (y) (var_ref code@379)  (var_ref compiler_temp@393) ) 
                            (if (expression bool != (var_ref compiler_temp@393) (constant uint (0)) ) (
                              (declare () float x2@397)
                              (declare () float x1@398)
                              (declare () float t2@399)
                              (declare () float t1@400)
                              (declare (temporary ) bool compiler_temp@401)
                              (if (var_ref compiler_temp@364) (
                                (assign  (x) (var_ref compiler_temp@401)  (expression bool < (constant float (0.000100)) (expression float abs (swiz y (var_ref A@382) )) ) ) 
                              )
                              (
                                (assign  (x) (var_ref compiler_temp@401)  (constant bool (0)) ) 
                              ))

                              (if (var_ref compiler_temp@401) (
                                (declare () float D@402)
                                (declare (temporary ) float compiler_temp@403)
                                (assign  (x) (var_ref compiler_temp@403)  (expression float rcp (swiz y (var_ref A@382) )) ) 
                                (assign  (x) (var_ref D@402)  (expression float + (expression float * (swiz y (var_ref B@381) )(swiz y (var_ref B@381) )) (expression float neg (expression float * (swiz y (var_ref A@382) )(swiz y (var_ref compiler_temp@384) )) ) ) ) 
                                (if (expression bool < (var_ref D@402) (constant float (0.000000)) ) (
                                  (assign  (y) (var_ref code@379)  (constant uint (0)) ) 
                                  (assign  (x) (var_ref D@402)  (constant float (0.000000)) ) 
                                )
                                ())

                                (declare (temporary ) float compiler_temp@404)
                                (assign  (x) (var_ref compiler_temp@404)  (expression float sqrt (var_ref D@402) ) ) 
                                (assign  (x) (var_ref D@402)  (var_ref compiler_temp@404) ) 
                                (assign  (x) (var_ref t1@400)  (expression float * (expression float + (swiz y (var_ref B@381) )(expression float neg (var_ref compiler_temp@404) ) ) (var_ref compiler_temp@403) ) ) 
                                (assign  (x) (var_ref t2@399)  (expression float * (expression float + (swiz y (var_ref B@381) )(var_ref compiler_temp@404) ) (var_ref compiler_temp@403) ) ) 
                              )
                              (
                                (declare (temporary ) float compiler_temp@405)
                                (assign  (x) (var_ref compiler_temp@405)  (expression float * (expression float * (constant float (0.500000)) (swiz y (var_ref compiler_temp@384) )) (expression float rcp (swiz y (var_ref B@381) )) ) ) 
                                (assign  (x) (var_ref t2@399)  (var_ref compiler_temp@405) ) 
                                (assign  (x) (var_ref t1@400)  (var_ref compiler_temp@405) ) 
                              ))

                              (assign  (x) (var_ref x1@398)  (expression float + (expression float * (expression float + (expression float * (swiz x (var_ref A@382) )(var_ref t1@400) ) (expression float neg (expression float * (swiz x (var_ref B@381) )(constant float (2.000000)) ) ) ) (var_ref t1@400) ) (swiz x (var_ref compiler_temp@384) )) ) 
                              (assign  (x) (var_ref x2@397)  (expression float + (expression float * (expression float + (expression float * (swiz x (var_ref A@382) )(var_ref t2@399) ) (expression float neg (expression float * (swiz x (var_ref B@381) )(constant float (2.000000)) ) ) ) (var_ref t2@399) ) (swiz x (var_ref compiler_temp@384) )) ) 
                              (if (expression bool != (expression uint & (swiz y (var_ref code@379) )(constant uint (1)) ) (constant uint (0)) ) (
                                (if (expression bool && (expression bool >= (var_ref compiler_temp@300) (var_ref x1@398) ) (expression bool >= (var_ref x1@398) (constant float (0.000000)) ) ) (
                                  (assign  (x) (var_ref R@380)  (constant int (1)) ) 
                                )
                                ())

                                (declare (temporary ) float compiler_temp@406)
                                (assign  (x) (var_ref compiler_temp@406)  (expression float abs (var_ref x1@398) ) ) 
                                (declare (temporary ) float compiler_temp@407)
                                (declare (temporary ) float compiler_temp@408)
                                (assign  (x) (var_ref compiler_temp@407)  (var_ref compiler_temp@321) ) 
                                (assign  (x) (var_ref compiler_temp@408)  (var_ref compiler_temp@322) ) 
                                (if (expression bool < (var_ref x1@398) (constant float (0.000000)) ) (
                                  (assign  (x) (var_ref compiler_temp@407)  (expression float min (var_ref compiler_temp@321) (var_ref compiler_temp@406) ) ) 
                                )
                                (
                                  (assign  (x) (var_ref compiler_temp@408)  (expression float min (var_ref compiler_temp@322) (var_ref compiler_temp@406) ) ) 
                                ))

                                (assign  (x) (var_ref compiler_temp@377)  (var_ref compiler_temp@407) ) 
                                (assign  (x) (var_ref compiler_temp@378)  (var_ref compiler_temp@408) ) 
                              )
                              ())

                              (if (expression bool < (constant uint (1)) (swiz y (var_ref code@379) )) (
                                (if (expression bool && (expression bool >= (var_ref compiler_temp@300) (var_ref x2@397) ) (expression bool >= (var_ref x2@397) (constant float (0.000000)) ) ) (
                                  (assign  (x) (var_ref R@380)  (expression int + (var_ref R@380) (constant int (-1)) ) ) 
                                )
                                ())

                                (declare (temporary ) float compiler_temp@409)
                                (assign  (x) (var_ref compiler_temp@409)  (expression float abs (var_ref x2@397) ) ) 
                                (declare (temporary ) float compiler_temp@410)
                                (declare (temporary ) float compiler_temp@411)
                                (assign  (x) (var_ref compiler_temp@410)  (var_ref compiler_temp@377) ) 
                                (assign  (x) (var_ref compiler_temp@411)  (var_ref compiler_temp@378) ) 
                                (if (expression bool < (constant float (0.000000)) (var_ref x2@397) ) (
                                  (assign  (x) (var_ref compiler_temp@410)  (expression float min (var_ref compiler_temp@377) (var_ref compiler_temp@409) ) ) 
                                )
                                (
                                  (assign  (x) (var_ref compiler_temp@411)  (expression float min (var_ref compiler_temp@378) (var_ref compiler_temp@409) ) ) 
                                ))

                                (assign  (x) (var_ref compiler_temp@377)  (var_ref compiler_temp@410) ) 
                                (assign  (x) (var_ref compiler_temp@378)  (var_ref compiler_temp@411) ) 
                              )
                              ())

                            )
                            ())

                            (if (expression bool != (var_ref compiler_temp@389) (constant uint (0)) ) (
                              (declare () float y2@412)
                              (declare () float y1@413)
                              (declare () float t2@414)
                              (declare () float t1@415)
                              (declare (temporary ) bool compiler_temp@416)
                              (if (var_ref compiler_temp@364) (
                                (assign  (x) (var_ref compiler_temp@416)  (expression bool < (constant float (0.000100)) (expression float abs (swiz x (var_ref A@382) )) ) ) 
                              )
                              (
                                (assign  (x) (var_ref compiler_temp@416)  (constant bool (0)) ) 
                              ))

                              (if (var_ref compiler_temp@416) (
                                (declare () float D@417)
                                (declare (temporary ) float compiler_temp@418)
                                (assign  (x) (var_ref compiler_temp@418)  (expression float rcp (swiz x (var_ref A@382) )) ) 
                                (assign  (x) (var_ref D@417)  (expression float + (expression float * (swiz x (var_ref B@381) )(swiz x (var_ref B@381) )) (expression float neg (expression float * (swiz x (var_ref A@382) )(swiz x (var_ref compiler_temp@384) )) ) ) ) 
                                (if (expression bool < (var_ref D@417) (constant float (0.000000)) ) (
                                  (assign  (x) (var_ref code@379)  (constant uint (0)) ) 
                                  (assign  (x) (var_ref D@417)  (constant float (0.000000)) ) 
                                )
                                ())

                                (declare (temporary ) float compiler_temp@419)
                                (assign  (x) (var_ref compiler_temp@419)  (expression float sqrt (var_ref D@417) ) ) 
                                (assign  (x) (var_ref D@417)  (var_ref compiler_temp@419) ) 
                                (assign  (x) (var_ref t1@415)  (expression float * (expression float + (swiz x (var_ref B@381) )(expression float neg (var_ref compiler_temp@419) ) ) (var_ref compiler_temp@418) ) ) 
                                (assign  (x) (var_ref t2@414)  (expression float * (expression float + (swiz x (var_ref B@381) )(var_ref compiler_temp@419) ) (var_ref compiler_temp@418) ) ) 
                              )
                              (
                                (declare (temporary ) float compiler_temp@420)
                                (assign  (x) (var_ref compiler_temp@420)  (expression float * (expression float * (constant float (0.500000)) (swiz x (var_ref compiler_temp@384) )) (expression float rcp (swiz x (var_ref B@381) )) ) ) 
                                (assign  (x) (var_ref t2@414)  (var_ref compiler_temp@420) ) 
                                (assign  (x) (var_ref t1@415)  (var_ref compiler_temp@420) ) 
                              ))

                              (assign  (x) (var_ref y1@413)  (expression float + (expression float * (expression float + (expression float * (swiz y (var_ref A@382) )(var_ref t1@415) ) (expression float neg (expression float * (swiz y (var_ref B@381) )(constant float (2.000000)) ) ) ) (var_ref t1@415) ) (swiz y (var_ref compiler_temp@384) )) ) 
                              (assign  (x) (var_ref y2@412)  (expression float + (expression float * (expression float + (expression float * (swiz y (var_ref A@382) )(var_ref t2@414) ) (expression float neg (expression float * (swiz y (var_ref B@381) )(constant float (2.000000)) ) ) ) (var_ref t2@414) ) (swiz y (var_ref compiler_temp@384) )) ) 
                              (if (expression bool != (expression uint & (swiz x (var_ref code@379) )(constant uint (1)) ) (constant uint (0)) ) (
                                (declare (temporary ) float compiler_temp@421)
                                (assign  (x) (var_ref compiler_temp@421)  (expression float abs (var_ref y1@413) ) ) 
                                (declare (temporary ) float compiler_temp@422)
                                (declare (temporary ) float compiler_temp@423)
                                (assign  (x) (var_ref compiler_temp@422)  (var_ref compiler_temp@377) ) 
                                (assign  (x) (var_ref compiler_temp@423)  (var_ref compiler_temp@378) ) 
                                (if (expression bool < (constant float (0.000000)) (var_ref y1@413) ) (
                                  (assign  (x) (var_ref compiler_temp@422)  (expression float min (var_ref compiler_temp@377) (var_ref compiler_temp@421) ) ) 
                                )
                                (
                                  (assign  (x) (var_ref compiler_temp@423)  (expression float min (var_ref compiler_temp@378) (var_ref compiler_temp@421) ) ) 
                                ))

                                (assign  (x) (var_ref compiler_temp@377)  (var_ref compiler_temp@422) ) 
                                (assign  (x) (var_ref compiler_temp@378)  (var_ref compiler_temp@423) ) 
                              )
                              ())

                              (if (expression bool < (constant uint (1)) (swiz x (var_ref code@379) )) (
                                (declare (temporary ) float compiler_temp@424)
                                (assign  (x) (var_ref compiler_temp@424)  (expression float abs (var_ref y2@412) ) ) 
                                (declare (temporary ) float compiler_temp@425)
                                (declare (temporary ) float compiler_temp@426)
                                (assign  (x) (var_ref compiler_temp@425)  (var_ref compiler_temp@377) ) 
                                (assign  (x) (var_ref compiler_temp@426)  (var_ref compiler_temp@378) ) 
                                (if (expression bool < (var_ref y2@412) (constant float (0.000000)) ) (
                                  (assign  (x) (var_ref compiler_temp@425)  (expression float min (var_ref compiler_temp@377) (var_ref compiler_temp@424) ) ) 
                                )
                                (
                                  (assign  (x) (var_ref compiler_temp@426)  (expression float min (var_ref compiler_temp@378) (var_ref compiler_temp@424) ) ) 
                                ))

                                (assign  (x) (var_ref compiler_temp@377)  (var_ref compiler_temp@425) ) 
                                (assign  (x) (var_ref compiler_temp@378)  (var_ref compiler_temp@426) ) 
                              )
                              ())

                            )
                            ())

                            (assign  (x) (var_ref nv_distance_increment)  (var_ref compiler_temp@377) ) 
                            (assign  (x) (var_ref nv_distance_decrement)  (var_ref compiler_temp@378) ) 
                            (assign  (x) (var_ref winding_number)  (expression int + (var_ref winding_number) (var_ref R@380) ) ) 
                          )
                          ())

                          (assign  (x) (var_ref c)  (expression uint + (var_ref c) (constant uint (2)) ) ) 
                        ))

                        (if (expression bool || (expression bool == (var_ref winding_number) (constant int (0)) ) (var_ref use_odd_even_rule) ) (
                          (assign  (x) (var_ref distance)  (expression float min (var_ref nv_distance_increment) (var_ref nv_distance_decrement) ) ) 
                        )
                        (
                          (if (expression bool == (var_ref winding_number) (constant int (-1)) ) (
                            (assign  (x) (var_ref distance)  (var_ref nv_distance_increment) ) 
                          )
                          (
                            (if (expression bool == (var_ref winding_number) (constant int (1)) ) (
                              (assign  (x) (var_ref distance)  (var_ref nv_distance_decrement) ) 
                            )
                            (
                              (assign  (x) (var_ref distance)  (constant float (0.500000)) ) 
                            ))

                          ))

                        ))

                        (declare (temporary ) float compiler_temp@427)
                        (assign  (x) (var_ref compiler_temp@427)  (expression float min (var_ref distance) (constant float (0.500000)) ) ) 
                        (assign  (x) (var_ref distance)  (var_ref compiler_temp@427) ) 
                        (declare (temporary ) int compiler_temp@428)
                        (if (expression bool && (var_ref use_odd_even_rule) (expression bool == (expression int & (var_ref winding_number) (constant int (1)) ) (constant int (0)) ) ) (
                          (assign  (x) (var_ref compiler_temp@428)  (constant int (0)) ) 
                        )
                        (
                          (assign  (x) (var_ref compiler_temp@428)  (var_ref winding_number) ) 
                        ))

                        (assign  (x) (var_ref winding_number)  (var_ref compiler_temp@428) ) 
                        (declare (temporary ) float compiler_temp@429)
                        (if (expression bool != (var_ref compiler_temp@428) (constant int (0)) ) (
                          (assign  (x) (var_ref compiler_temp@429)  (expression float + (constant float (0.500000)) (var_ref compiler_temp@427) ) ) 
                        )
                        (
                          (assign  (x) (var_ref compiler_temp@429)  (expression float + (constant float (0.500000)) (expression float neg (var_ref compiler_temp@427) ) ) ) 
                        ))

                        (assign  (x) (var_ref cvg)  (var_ref compiler_temp@429) ) 
                        (if (expression bool != (expression uint & (swiz x (var_ref fastuidraw_uint_varying0) )(constant uint (1073741824)) ) (constant uint (0)) ) (
                          (assign  (x) (var_ref cvg)  (expression float + (constant float (1.000000)) (expression float neg (var_ref compiler_temp@429) ) ) ) 
                        )
                        ())

                        (assign  (xyzw) (var_ref p@198)  (swiz xxxx (var_ref cvg) )) 
                      )
                      (
                        (if (expression bool == (swiz y (var_ref fastuidraw_uint_varying1) )(constant uint (23)) ) (
                          (declare () float cvg@430)
                          (declare (temporary ) vec2 compiler_temp@431)
                          (assign  (x) (var_ref compiler_temp@431)  (expression float + (expression float abs (expression float dFdx (swiz x (var_ref fastuidraw_float_smooth_varying0) )) ) (expression float abs (expression float dFdy (swiz x (var_ref fastuidraw_float_smooth_varying0) )) ) ) ) 
                          (assign  (y) (var_ref compiler_temp@431)  (expression float + (expression float abs (expression float dFdx (swiz y (var_ref fastuidraw_float_smooth_varying0) )) ) (expression float abs (expression float dFdy (swiz y (var_ref fastuidraw_float_smooth_varying0) )) ) ) ) 
                          (declare (temporary ) uint glyph_data_location@432)
                          (assign  (x) (var_ref glyph_data_location@432)  (expression uint & (swiz x (var_ref fastuidraw_uint_varying0) )(constant uint (1073741823)) ) ) 
                          (declare (temporary ) bool use_odd_even_rule@433)
                          (assign  (x) (var_ref use_odd_even_rule@433)  (expression bool != (expression uint & (swiz x (var_ref fastuidraw_uint_varying0) )(constant uint (2147483648)) ) (constant uint (0)) ) ) 
                          (declare () vec2 weight)
                          (declare () float weight_sum)
                          (declare () float sy)
                          (declare () float sx)
                          (declare () vec2 nearest_curve_distance)
                          (declare () vec2 coverage)
                          (declare () vec2 band_factor)
                          (declare () vec2 em@434)
                          (declare () uint vert_band_offset)
                          (declare () uint horiz_band_offset)
                          (assign  (xy) (var_ref em@434)  (expression vec2 rcp (var_ref compiler_temp@431) ) ) 
                          (declare (temporary ) vec2 compiler_temp@435)
                          (assign  (x) (var_ref compiler_temp@435)  (expression float u2f (swiz z (var_ref fastuidraw_uint_varying0) )) ) 
                          (assign  (y) (var_ref compiler_temp@435)  (expression float u2f (swiz y (var_ref fastuidraw_uint_varying0) )) ) 
                          (assign  (xy) (var_ref band_factor)  (expression vec2 * (constant float (0.015625)) (var_ref compiler_temp@435) ) ) 
                          (declare (temporary ) uint compiler_temp@436)
                          (assign  (x) (var_ref compiler_temp@436)  (expression uint min (expression uint + (swiz z (var_ref fastuidraw_uint_varying0) )(constant uint (4294967295)) ) (expression uint f2u (expression float * (swiz x (var_ref band_factor) )(expression float + (swiz x (var_ref fastuidraw_float_smooth_varying0) )(constant float (32.000000)) ) ) ) ) ) 
                          (declare (temporary ) uint compiler_temp@437)
                          (assign  (x) (var_ref compiler_temp@437)  (expression uint min (expression uint + (swiz y (var_ref fastuidraw_uint_varying0) )(constant uint (4294967295)) ) (expression uint f2u (expression float * (swiz y (var_ref band_factor) )(expression float + (swiz y (var_ref fastuidraw_float_smooth_varying0) )(constant float (32.000000)) ) ) ) ) ) 
                          (assign  (x) (var_ref horiz_band_offset)  (var_ref compiler_temp@437) ) 
                          (if (expression bool < (swiz x (var_ref fastuidraw_float_smooth_varying0) )(constant float (0.000000)) ) (
                            (assign  (x) (var_ref horiz_band_offset)  (expression uint + (var_ref compiler_temp@437) (swiz y (var_ref fastuidraw_uint_varying0) )) ) 
                            (assign  (x) (var_ref sx)  (constant float (-1.000000)) ) 
                          )
                          (
                            (assign  (x) (var_ref sx)  (constant float (1.000000)) ) 
                          ))

                          (assign  (x) (var_ref vert_band_offset)  (expression uint + (var_ref compiler_temp@436) (expression uint * (constant uint (2)) (swiz y (var_ref fastuidraw_uint_varying0) )) ) ) 
                          (if (expression bool < (swiz y (var_ref fastuidraw_float_smooth_varying0) )(constant float (0.000000)) ) (
                            (assign  (x) (var_ref vert_band_offset)  (expression uint + (var_ref vert_band_offset) (swiz z (var_ref fastuidraw_uint_varying0) )) ) 
                            (assign  (x) (var_ref sy)  (constant float (-1.000000)) ) 
                          )
                          (
                            (assign  (x) (var_ref sy)  (constant float (1.000000)) ) 
                          ))

                          (declare () uint raw)
                          (declare (temporary ) uint compiler_temp@438)
                          (declare (temporary ) uint compiler_temp@439)
                          (assign  (x) (var_ref compiler_temp@439)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (expression uint + (var_ref glyph_data_location@432) (var_ref horiz_band_offset) ) ) ) (constant uint (4)) ) ) ) 
                          (declare (temporary ) uint compiler_temp@440)
                          (call __intrinsic_load_ssbo (var_ref compiler_temp@440)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@439) (constant uint (0)) ) (constant uint (2)) ))

                          (assign  (x) (var_ref compiler_temp@438)  (var_ref compiler_temp@440) ) 
                          (assign  (x) (var_ref raw)  (var_ref compiler_temp@438) ) 
                          (declare (temporary ) uint compiler_temp@441)
                          (assign  (x) (var_ref compiler_temp@441)  (expression uint >> (expression uint << (var_ref raw) (constant uint (24)) ) (constant uint (24)) ) ) 
                          (declare () uint raw@442)
                          (declare (temporary ) uint compiler_temp@443)
                          (declare (temporary ) uint compiler_temp@444)
                          (assign  (x) (var_ref compiler_temp@444)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (expression uint + (var_ref glyph_data_location@432) (var_ref vert_band_offset) ) ) ) (constant uint (4)) ) ) ) 
                          (declare (temporary ) uint compiler_temp@445)
                          (call __intrinsic_load_ssbo (var_ref compiler_temp@445)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@444) (constant uint (0)) ) (constant uint (2)) ))

                          (assign  (x) (var_ref compiler_temp@443)  (var_ref compiler_temp@445) ) 
                          (assign  (x) (var_ref raw@442)  (var_ref compiler_temp@443) ) 
                          (declare (temporary ) uint compiler_temp@446)
                          (assign  (x) (var_ref compiler_temp@446)  (expression uint >> (expression uint << (var_ref raw@442) (constant uint (24)) ) (constant uint (24)) ) ) 
                          (declare (temporary ) uint compiler_temp@447)
                          (assign  (x) (var_ref compiler_temp@447)  (expression uint >> (var_ref raw@442) (constant uint (8)) ) ) 
                          (declare (temporary ) float compiler_temp@448)
                          (declare (temporary ) float compiler_temp@449)
                          (declare () uint curve_src@450)
                          (declare () uint c@451)
                          (assign  (x) (var_ref compiler_temp@448)  (constant float (0.000000)) ) 
                          (assign  (x) (var_ref compiler_temp@449)  (constant float (0.500000)) ) 
                          (assign  (x) (var_ref c@451)  (constant uint (0)) ) 
                          (assign  (x) (var_ref curve_src@450)  (expression uint + (expression uint >> (var_ref raw) (constant uint (8)) ) (var_ref glyph_data_location@432) ) ) 
                          (loop (
                            (declare () vec2 curve_p0)
                            (declare () vec2 curve_p1)
                            (declare () vec2 curve_p2)
                            (if (expression bool >= (var_ref c@451) (var_ref compiler_temp@441) ) (
                              break
                            )
                            ())

                            (declare (temporary ) uint compiler_temp@452)
                            (declare (temporary ) uint compiler_temp@453)
                            (assign  (x) (var_ref compiler_temp@453)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (var_ref curve_src@450) ) ) (constant uint (4)) ) ) ) 
                            (declare (temporary ) uint compiler_temp@454)
                            (call __intrinsic_load_ssbo (var_ref compiler_temp@454)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@453) (constant uint (0)) ) (constant uint (2)) ))

                            (assign  (x) (var_ref compiler_temp@452)  (var_ref compiler_temp@454) ) 
                            (assign  (xy) (var_ref curve_p0)  (expression vec2 + (expression vec2 unpackHalf2x16 (var_ref compiler_temp@452) ) (expression vec2 neg (swiz xy (var_ref fastuidraw_float_smooth_varying0) )) ) ) 
                            (declare (temporary ) uint compiler_temp@455)
                            (declare (temporary ) uint compiler_temp@456)
                            (assign  (x) (var_ref compiler_temp@456)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (expression uint + (var_ref curve_src@450) (constant uint (1)) ) ) ) (constant uint (4)) ) ) ) 
                            (declare (temporary ) uint compiler_temp@457)
                            (call __intrinsic_load_ssbo (var_ref compiler_temp@457)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@456) (constant uint (0)) ) (constant uint (2)) ))

                            (assign  (x) (var_ref compiler_temp@455)  (var_ref compiler_temp@457) ) 
                            (assign  (xy) (var_ref curve_p1)  (expression vec2 + (expression vec2 unpackHalf2x16 (var_ref compiler_temp@455) ) (expression vec2 neg (swiz xy (var_ref fastuidraw_float_smooth_varying0) )) ) ) 
                            (declare (temporary ) uint compiler_temp@458)
                            (declare (temporary ) uint compiler_temp@459)
                            (assign  (x) (var_ref compiler_temp@459)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (expression uint + (var_ref curve_src@450) (constant uint (2)) ) ) ) (constant uint (4)) ) ) ) 
                            (declare (temporary ) uint compiler_temp@460)
                            (call __intrinsic_load_ssbo (var_ref compiler_temp@460)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@459) (constant uint (0)) ) (constant uint (2)) ))

                            (assign  (x) (var_ref compiler_temp@458)  (var_ref compiler_temp@460) ) 
                            (assign  (xy) (var_ref curve_p2)  (expression vec2 + (expression vec2 unpackHalf2x16 (var_ref compiler_temp@458) ) (expression vec2 neg (swiz xy (var_ref fastuidraw_float_smooth_varying0) )) ) ) 
                            (declare (temporary ) bool compiler_temp@461)
                            (if (expression bool < (constant float (0.000000)) (var_ref sx) ) (
                              (assign  (x) (var_ref compiler_temp@461)  (expression bool < (expression float * (expression float max (swiz x (var_ref curve_p0) )(expression float max (swiz x (var_ref curve_p1) )(swiz x (var_ref curve_p2) )) ) (swiz x (var_ref em@434) )) (constant float (-0.500000)) ) ) 
                            )
                            (
                              (assign  (x) (var_ref compiler_temp@461)  (constant bool (0)) ) 
                            ))

                            (if (var_ref compiler_temp@461) (
                              break
                            )
                            ())

                            (declare (temporary ) bool compiler_temp@462)
                            (if (expression bool < (var_ref sx) (constant float (0.000000)) ) (
                              (assign  (x) (var_ref compiler_temp@462)  (expression bool < (constant float (0.500000)) (expression float * (expression float min (swiz x (var_ref curve_p0) )(expression float min (swiz x (var_ref curve_p1) )(swiz x (var_ref curve_p2) )) ) (swiz x (var_ref em@434) )) ) ) 
                            )
                            (
                              (assign  (x) (var_ref compiler_temp@462)  (constant bool (0)) ) 
                            ))

                            (if (var_ref compiler_temp@462) (
                              break
                            )
                            ())

                            (declare () uint code@463)
                            (declare (temporary ) uint compiler_temp@464)
                            (if (expression bool < (constant float (0.000000)) (swiz y (var_ref curve_p0) )) (
                              (assign  (x) (var_ref compiler_temp@464)  (constant uint (2)) ) 
                            )
                            (
                              (assign  (x) (var_ref compiler_temp@464)  (constant uint (0)) ) 
                            ))

                            (declare (temporary ) uint compiler_temp@465)
                            (if (expression bool < (constant float (0.000000)) (swiz y (var_ref curve_p1) )) (
                              (assign  (x) (var_ref compiler_temp@465)  (constant uint (4)) ) 
                            )
                            (
                              (assign  (x) (var_ref compiler_temp@465)  (constant uint (0)) ) 
                            ))

                            (declare (temporary ) uint compiler_temp@466)
                            (if (expression bool < (constant float (0.000000)) (swiz y (var_ref curve_p2) )) (
                              (assign  (x) (var_ref compiler_temp@466)  (constant uint (8)) ) 
                            )
                            (
                              (assign  (x) (var_ref compiler_temp@466)  (constant uint (0)) ) 
                            ))

                            (assign  (x) (var_ref code@463)  (expression uint | (expression uint | (var_ref compiler_temp@464) (var_ref compiler_temp@465) ) (var_ref compiler_temp@466) ) ) 
                            (assign  (x) (var_ref code@463)  (expression uint & (expression uint >> (constant uint (11892)) (var_ref code@463) ) (constant uint (3)) ) ) 
                            (if (expression bool != (var_ref code@463) (constant uint (0)) ) (
                              (declare () vec2 x1x2)
                              (declare () vec2 B@467)
                              (declare () vec2 A@468)
                              (declare () float t2@469)
                              (declare () float t1@470)
                              (declare () float rA)
                              (assign  (xy) (var_ref A@468)  (expression vec2 + (expression vec2 + (var_ref curve_p0) (expression vec2 neg (expression vec2 * (constant float (2.000000)) (var_ref curve_p1) ) ) ) (var_ref curve_p2) ) ) 
                              (assign  (xy) (var_ref B@467)  (expression vec2 + (var_ref curve_p0) (expression vec2 neg (var_ref curve_p1) ) ) ) 
                              (assign  (x) (var_ref rA)  (expression float rcp (swiz y (var_ref A@468) )) ) 
                              (declare (temporary ) float compiler_temp@471)
                              (assign  (x) (var_ref compiler_temp@471)  (expression float sqrt (expression float max (expression float + (expression float * (swiz y (var_ref B@467) )(swiz y (var_ref B@467) )) (expression float neg (expression float * (swiz y (var_ref A@468) )(swiz y (var_ref curve_p0) )) ) ) (constant float (0.000000)) ) ) ) 
                              (assign  (x) (var_ref t1@470)  (expression float * (expression float + (swiz y (var_ref B@467) )(expression float neg (var_ref compiler_temp@471) ) ) (var_ref rA) ) ) 
                              (assign  (x) (var_ref t2@469)  (expression float * (expression float + (swiz y (var_ref B@467) )(var_ref compiler_temp@471) ) (var_ref rA) ) ) 
                              (declare (temporary ) float compiler_temp@472)
                              (assign  (x) (var_ref compiler_temp@472)  (expression float abs (swiz y (var_ref A@468) )) ) 
                              (if (expression bool < (var_ref compiler_temp@472) (constant float (0.000100)) ) (
                                (declare (temporary ) float compiler_temp@473)
                                (assign  (x) (var_ref compiler_temp@473)  (expression float * (expression float * (constant float (0.500000)) (swiz y (var_ref curve_p0) )) (expression float rcp (swiz y (var_ref B@467) )) ) ) 
                                (assign  (x) (var_ref t2@469)  (var_ref compiler_temp@473) ) 
                                (assign  (x) (var_ref t1@470)  (var_ref compiler_temp@473) ) 
                              )
                              ())

                              (declare (temporary ) vec2 compiler_temp@474)
                              (assign  (x) (var_ref compiler_temp@474)  (expression float + (expression float * (expression float + (expression float * (swiz x (var_ref A@468) )(var_ref t1@470) ) (expression float neg (expression float * (swiz x (var_ref B@467) )(constant float (2.000000)) ) ) ) (var_ref t1@470) ) (swiz x (var_ref curve_p0) )) ) 
                              (assign  (y) (var_ref compiler_temp@474)  (expression float + (expression float * (expression float + (expression float * (swiz x (var_ref A@468) )(var_ref t2@469) ) (expression float neg (expression float * (swiz x (var_ref B@467) )(constant float (2.000000)) ) ) ) (var_ref t2@469) ) (swiz x (var_ref curve_p0) )) ) 
                              (assign  (xy) (var_ref x1x2)  (expression vec2 * (swiz x (var_ref em@434) )(var_ref compiler_temp@474) ) ) 
                              (if (expression bool != (expression uint & (var_ref code@463) (constant uint (1)) ) (constant uint (0)) ) (
                                (assign  (x) (var_ref compiler_temp@448)  (expression float + (var_ref compiler_temp@448) (expression float sat (expression float + (constant float (0.500000)) (expression float * (swiz x (var_ref x1x2) )(var_ref sx) ) ) ) ) ) 
                                (assign  (x) (var_ref compiler_temp@449)  (expression float min (var_ref compiler_temp@449) (expression float abs (swiz x (var_ref x1x2) )) ) ) 
                              )
                              ())

                              (if (expression bool < (constant uint (1)) (var_ref code@463) ) (
                                (assign  (x) (var_ref compiler_temp@448)  (expression float + (var_ref compiler_temp@448) (expression float neg (expression float sat (expression float + (constant float (0.500000)) (expression float * (swiz y (var_ref x1x2) )(var_ref sx) ) ) ) ) ) ) 
                                (assign  (x) (var_ref compiler_temp@449)  (expression float min (var_ref compiler_temp@449) (expression float abs (swiz y (var_ref x1x2) )) ) ) 
                              )
                              ())

                            )
                            ())

                            (assign  (x) (var_ref curve_src@450)  (expression uint + (var_ref curve_src@450) (constant uint (3)) ) ) 
                            (assign  (x) (var_ref c@451)  (expression uint + (var_ref c@451) (constant uint (1)) ) ) 
                          ))

                          (assign  (x) (var_ref compiler_temp@448)  (expression float abs (var_ref compiler_temp@448) ) ) 
                          (assign  (x) (var_ref coverage)  (var_ref compiler_temp@448) ) 
                          (assign  (x) (var_ref nearest_curve_distance)  (var_ref compiler_temp@449) ) 
                          (declare (temporary ) float compiler_temp@475)
                          (declare (temporary ) float compiler_temp@476)
                          (declare () uint curve_src@477)
                          (declare () uint c@478)
                          (assign  (x) (var_ref compiler_temp@475)  (constant float (0.000000)) ) 
                          (assign  (x) (var_ref compiler_temp@476)  (constant float (0.500000)) ) 
                          (assign  (x) (var_ref c@478)  (constant uint (0)) ) 
                          (assign  (x) (var_ref curve_src@477)  (expression uint + (var_ref compiler_temp@447) (var_ref glyph_data_location@432) ) ) 
                          (loop (
                            (declare () vec2 curve_p0@479)
                            (declare () vec2 curve_p1@480)
                            (declare () vec2 curve_p2@481)
                            (if (expression bool >= (var_ref c@478) (var_ref compiler_temp@446) ) (
                              break
                            )
                            ())

                            (declare (temporary ) uint compiler_temp@482)
                            (declare (temporary ) uint compiler_temp@483)
                            (assign  (x) (var_ref compiler_temp@483)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (var_ref curve_src@477) ) ) (constant uint (4)) ) ) ) 
                            (declare (temporary ) uint compiler_temp@484)
                            (call __intrinsic_load_ssbo (var_ref compiler_temp@484)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@483) (constant uint (0)) ) (constant uint (2)) ))

                            (assign  (x) (var_ref compiler_temp@482)  (var_ref compiler_temp@484) ) 
                            (assign  (xy) (var_ref curve_p0@479)  (expression vec2 + (expression vec2 unpackHalf2x16 (var_ref compiler_temp@482) ) (expression vec2 neg (swiz yx (var_ref fastuidraw_float_smooth_varying0) )) ) ) 
                            (declare (temporary ) uint compiler_temp@485)
                            (declare (temporary ) uint compiler_temp@486)
                            (assign  (x) (var_ref compiler_temp@486)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (expression uint + (var_ref curve_src@477) (constant uint (1)) ) ) ) (constant uint (4)) ) ) ) 
                            (declare (temporary ) uint compiler_temp@487)
                            (call __intrinsic_load_ssbo (var_ref compiler_temp@487)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@486) (constant uint (0)) ) (constant uint (2)) ))

                            (assign  (x) (var_ref compiler_temp@485)  (var_ref compiler_temp@487) ) 
                            (assign  (xy) (var_ref curve_p1@480)  (expression vec2 + (expression vec2 unpackHalf2x16 (var_ref compiler_temp@485) ) (expression vec2 neg (swiz yx (var_ref fastuidraw_float_smooth_varying0) )) ) ) 
                            (declare (temporary ) uint compiler_temp@488)
                            (declare (temporary ) uint compiler_temp@489)
                            (assign  (x) (var_ref compiler_temp@489)  (expression uint + (constant uint (0)) (expression uint * (expression uint i2u (expression int u2i (expression uint + (var_ref curve_src@477) (constant uint (2)) ) ) ) (constant uint (4)) ) ) ) 
                            (declare (temporary ) uint compiler_temp@490)
                            (call __intrinsic_load_ssbo (var_ref compiler_temp@490)  ((constant uint (1)) (expression uint + (var_ref compiler_temp@489) (constant uint (0)) ) (constant uint (2)) ))

                            (assign  (x) (var_ref compiler_temp@488)  (var_ref compiler_temp@490) ) 
                            (assign  (xy) (var_ref curve_p2@481)  (expression vec2 + (expression vec2 unpackHalf2x16 (var_ref compiler_temp@488) ) (expression vec2 neg (swiz yx (var_ref fastuidraw_float_smooth_varying0) )) ) ) 
                            (declare (temporary ) bool compiler_temp@491)
                            (if (expression bool < (constant float (0.000000)) (var_ref sy) ) (
                              (assign  (x) (var_ref compiler_temp@491)  (expression bool < (expression float * (expression float max (swiz x (var_ref curve_p0@479) )(expression float max (swiz x (var_ref curve_p1@480) )(swiz x (var_ref curve_p2@481) )) ) (swiz y (var_ref em@434) )) (constant float (-0.500000)) ) ) 
                            )
                            (
                              (assign  (x) (var_ref compiler_temp@491)  (constant bool (0)) ) 
                            ))

                            (if (var_ref compiler_temp@491) (
                              break
                            )
                            ())

                            (declare (temporary ) bool compiler_temp@492)
                            (if (expression bool < (var_ref sy) (constant float (0.000000)) ) (
                              (assign  (x) (var_ref compiler_temp@492)  (expression bool < (constant float (0.500000)) (expression float * (expression float min (swiz x (var_ref curve_p0@479) )(expression float min (swiz x (var_ref curve_p1@480) )(swiz x (var_ref curve_p2@481) )) ) (swiz y (var_ref em@434) )) ) ) 
                            )
                            (
                              (assign  (x) (var_ref compiler_temp@492)  (constant bool (0)) ) 
                            ))

                            (if (var_ref compiler_temp@492) (
                              break
                            )
                            ())

                            (declare () uint code@493)
                            (declare (temporary ) uint compiler_temp@494)
                            (if (expression bool < (constant float (0.000000)) (swiz y (var_ref curve_p0@479) )) (
                              (assign  (x) (var_ref compiler_temp@494)  (constant uint (2)) ) 
                            )
                            (
                              (assign  (x) (var_ref compiler_temp@494)  (constant uint (0)) ) 
                            ))

                            (declare (temporary ) uint compiler_temp@495)
                            (if (expression bool < (constant float (0.000000)) (swiz y (var_ref curve_p1@480) )) (
                              (assign  (x) (var_ref compiler_temp@495)  (constant uint (4)) ) 
                            )
                            (
                              (assign  (x) (var_ref compiler_temp@495)  (constant uint (0)) ) 
                            ))

                            (declare (temporary ) uint compiler_temp@496)
                            (if (expression bool < (constant float (0.000000)) (swiz y (var_ref curve_p2@481) )) (
                              (assign  (x) (var_ref compiler_temp@496)  (constant uint (8)) ) 
                            )
                            (
                              (assign  (x) (var_ref compiler_temp@496)  (constant uint (0)) ) 
                            ))

                            (assign  (x) (var_ref code@493)  (expression uint | (expression uint | (var_ref compiler_temp@494) (var_ref compiler_temp@495) ) (var_ref compiler_temp@496) ) ) 
                            (assign  (x) (var_ref code@493)  (expression uint & (expression uint >> (constant uint (11892)) (var_ref code@493) ) (constant uint (3)) ) ) 
                            (if (expression bool != (var_ref code@493) (constant uint (0)) ) (
                              (declare () vec2 x1x2@497)
                              (declare () vec2 B@498)
                              (declare () vec2 A@499)
                              (declare () float t2@500)
                              (declare () float t1@501)
                              (declare () float rA@502)
                              (assign  (xy) (var_ref A@499)  (expression vec2 + (expression vec2 + (var_ref curve_p0@479) (expression vec2 neg (expression vec2 * (constant float (2.000000)) (var_ref curve_p1@480) ) ) ) (var_ref curve_p2@481) ) ) 
                              (assign  (xy) (var_ref B@498)  (expression vec2 + (var_ref curve_p0@479) (expression vec2 neg (var_ref curve_p1@480) ) ) ) 
                              (assign  (x) (var_ref rA@502)  (expression float rcp (swiz y (var_ref A@499) )) ) 
                              (declare (temporary ) float compiler_temp@503)
                              (assign  (x) (var_ref compiler_temp@503)  (expression float sqrt (expression float max (expression float + (expression float * (swiz y (var_ref B@498) )(swiz y (var_ref B@498) )) (expression float neg (expression float * (swiz y (var_ref A@499) )(swiz y (var_ref curve_p0@479) )) ) ) (constant float (0.000000)) ) ) ) 
                              (assign  (x) (var_ref t1@501)  (expression float * (expression float + (swiz y (var_ref B@498) )(expression float neg (var_ref compiler_temp@503) ) ) (var_ref rA@502) ) ) 
                              (assign  (x) (var_ref t2@500)  (expression float * (expression float + (swiz y (var_ref B@498) )(var_ref compiler_temp@503) ) (var_ref rA@502) ) ) 
                              (declare (temporary ) float compiler_temp@504)
                              (assign  (x) (var_ref compiler_temp@504)  (expression float abs (swiz y (var_ref A@499) )) ) 
                              (if (expression bool < (var_ref compiler_temp@504) (constant float (0.000100)) ) (
                                (declare (temporary ) float compiler_temp@505)
                                (assign  (x) (var_ref compiler_temp@505)  (expression float * (expression float * (constant float (0.500000)) (swiz y (var_ref curve_p0@479) )) (expression float rcp (swiz y (var_ref B@498) )) ) ) 
                                (assign  (x) (var_ref t2@500)  (var_ref compiler_temp@505) ) 
                                (assign  (x) (var_ref t1@501)  (var_ref compiler_temp@505) ) 
                              )
                              ())

                              (declare (temporary ) vec2 compiler_temp@506)
                              (assign  (x) (var_ref compiler_temp@506)  (expression float + (expression float * (expression float + (expression float * (swiz x (var_ref A@499) )(var_ref t1@501) ) (expression float neg (expression float * (swiz x (var_ref B@498) )(constant float (2.000000)) ) ) ) (var_ref t1@501) ) (swiz x (var_ref curve_p0@479) )) ) 
                              (assign  (y) (var_ref compiler_temp@506)  (expression float + (expression float * (expression float + (expression float * (swiz x (var_ref A@499) )(var_ref t2@500) ) (expression float neg (expression float * (swiz x (var_ref B@498) )(constant float (2.000000)) ) ) ) (var_ref t2@500) ) (swiz x (var_ref curve_p0@479) )) ) 
                              (assign  (xy) (var_ref x1x2@497)  (expression vec2 * (swiz y (var_ref em@434) )(var_ref compiler_temp@506) ) ) 
                              (if (expression bool != (expression uint & (var_ref code@493) (constant uint (1)) ) (constant uint (0)) ) (
                                (assign  (x) (var_ref compiler_temp@475)  (expression float + (var_ref compiler_temp@475) (expression float sat (expression float + (constant float (0.500000)) (expression float * (swiz x (var_ref x1x2@497) )(var_ref sy) ) ) ) ) ) 
                                (assign  (x) (var_ref compiler_temp@476)  (expression float min (var_ref compiler_temp@476) (expression float abs (swiz x (var_ref x1x2@497) )) ) ) 
                              )
                              ())

                              (if (expression bool < (constant uint (1)) (var_ref code@493) ) (
                                (assign  (x) (var_ref compiler_temp@475)  (expression float + (var_ref compiler_temp@475) (expression float neg (expression float sat (expression float + (constant float (0.500000)) (expression float * (swiz y (var_ref x1x2@497) )(var_ref sy) ) ) ) ) ) ) 
                                (assign  (x) (var_ref compiler_temp@476)  (expression float min (var_ref compiler_temp@476) (expression float abs (swiz y (var_ref x1x2@497) )) ) ) 
                              )
                              ())

                            )
                            ())

                            (assign  (x) (var_ref curve_src@477)  (expression uint + (var_ref curve_src@477) (constant uint (3)) ) ) 
                            (assign  (x) (var_ref c@478)  (expression uint + (var_ref c@478) (constant uint (1)) ) ) 
                          ))

                          (assign  (x) (var_ref compiler_temp@475)  (expression float abs (var_ref compiler_temp@475) ) ) 
                          (assign  (y) (var_ref coverage)  (var_ref compiler_temp@475) ) 
                          (assign  (y) (var_ref nearest_curve_distance)  (var_ref compiler_temp@476) ) 
                          (if (var_ref use_odd_even_rule@433) (
                            (assign  (xy) (var_ref coverage)  (expression vec2 * (constant float (2.000000)) (expression vec2 fract (expression vec2 * (constant float (0.500000)) (var_ref coverage) ) ) ) ) 
                          )
                          ())

                          (assign  (xy) (var_ref weight)  (expression vec2 + (constant vec2 (1.000000 1.000000)) (expression vec2 neg (expression vec2 * (constant float (2.000000)) (expression vec2 sat (expression vec2 min (expression vec2 abs (var_ref nearest_curve_distance) ) (constant float (0.500000)) ) ) ) ) ) ) 
                          (assign  (x) (var_ref weight_sum)  (expression float + (swiz x (var_ref weight) )(swiz y (var_ref weight) )) ) 
                          (declare (temporary ) float compiler_temp@507)
                          (if (expression bool < (constant float (0.001000)) (var_ref weight_sum) ) (
                            (assign  (x) (var_ref compiler_temp@507)  (expression float * (expression float dot (var_ref coverage) (var_ref weight) ) (expression float rcp (var_ref weight_sum) ) ) ) 
                          )
                          (
                            (assign  (x) (var_ref compiler_temp@507)  (expression float * (constant float (0.500000)) (expression float + (swiz x (var_ref coverage) )(swiz y (var_ref coverage) )) ) ) 
                          ))

                          (assign  (x) (var_ref cvg@430)  (var_ref compiler_temp@507) ) 
                          (if (expression bool != (expression uint & (swiz x (var_ref fastuidraw_uint_varying0) )(constant uint (1073741824)) ) (constant uint (0)) ) (
                            (assign  (x) (var_ref cvg@430)  (expression float + (constant float (1.000000)) (expression float neg (var_ref compiler_temp@507) ) ) ) 
                          )
                          ())

                          (assign  (xyzw) (var_ref p@198)  (swiz xxxx (var_ref cvg@430) )) 
                        )
                        ())

                      ))

                    ))

                  ))

                ))

              ))

            ))

          ))

        ))

        (assign  (xyzw) (var_ref v)  (expression vec4 * (var_ref b) (var_ref p@198) ) ) 
      )
      (
        (assign  (xyzw) (var_ref v)  (constant vec4 (0.000000 0.000000 0.000000 0.000000)) ) 
      ))

      (declare (temporary ) vec4 src0)
      (declare (temporary ) vec4 src1)
      (if (expression bool == (swiz w (var_ref fastuidraw_uint_varying1) )(constant uint (1)) ) (
        (assign  (xyzw) (var_ref src0)  (constant vec4 (0.000000 0.000000 0.000000 0.000000)) ) 
        (assign  (xyzw) (var_ref src1)  (constant vec4 (0.000000 0.000000 0.000000 0.000000)) ) 
      )
      (
        (if (expression bool == (swiz w (var_ref fastuidraw_uint_varying1) )(constant uint (2)) ) (
          (assign  (xyzw) (var_ref src0)  (var_ref v) ) 
          (assign  (xyzw) (var_ref src1)  (constant vec4 (0.000000 0.000000 0.000000 0.000000)) ) 
        )
        (
          (if (expression bool == (swiz w (var_ref fastuidraw_uint_varying1) )(constant uint (3)) ) (
            (assign  (xyzw) (var_ref src0)  (constant vec4 (0.000000 0.000000 0.000000 0.000000)) ) 
            (assign  (xyzw) (var_ref src1)  (constant vec4 (1.000000 1.000000 1.000000 1.000000)) ) 
          )
          (
            (if (expression bool == (swiz w (var_ref fastuidraw_uint_varying1) )(constant uint (4)) ) (
              (assign  (xyzw) (var_ref src0)  (var_ref v) ) 
              (assign  (xyzw) (var_ref src1)  (swiz xxxx (expression float + (constant float (1.000000)) (expression float neg (swiz w (var_ref v) )) ) )) 
            )
            (
              (if (expression bool == (swiz w (var_ref fastuidraw_uint_varying1) )(constant uint (5)) ) (
                (assign  (xyzw) (var_ref src0)  (var_ref v) ) 
                (assign  (xyzw) (var_ref src1)  (constant vec4 (1.000000 1.000000 1.000000 1.000000)) ) 
              )
              (
                (if (expression bool == (swiz w (var_ref fastuidraw_uint_varying1) )(constant uint (6)) ) (
                  (assign  (xyzw) (var_ref src0)  (var_ref v) ) 
                  (assign  (xyzw) (var_ref src1)  (constant vec4 (0.000000 0.000000 0.000000 0.000000)) ) 
                )
                (
                  (if (expression bool == (swiz w (var_ref fastuidraw_uint_varying1) )(constant uint (7)) ) (
                    (assign  (xyzw) (var_ref src0)  (constant vec4 (0.000000 0.000000 0.000000 0.000000)) ) 
                    (assign  (xyzw) (var_ref src1)  (swiz wwww (var_ref v) )) 
                  )
                  (
                    (if (expression bool == (swiz w (var_ref fastuidraw_uint_varying1) )(constant uint (8)) ) (
                      (assign  (xyzw) (var_ref src0)  (var_ref v) ) 
                      (assign  (xyzw) (var_ref src1)  (constant vec4 (0.000000 0.000000 0.000000 0.000000)) ) 
                    )
                    (
                      (if (expression bool == (swiz w (var_ref fastuidraw_uint_varying1) )(constant uint (9)) ) (
                        (assign  (xyzw) (var_ref src0)  (constant vec4 (0.000000 0.000000 0.000000 0.000000)) ) 
                        (assign  (xyzw) (var_ref src1)  (swiz xxxx (expression float + (constant float (1.000000)) (expression float neg (swiz w (var_ref v) )) ) )) 
                      )
                      (
                        (if (expression bool == (swiz w (var_ref fastuidraw_uint_varying1) )(constant uint (10)) ) (
                          (assign  (xyzw) (var_ref src0)  (var_ref v) ) 
                          (assign  (xyzw) (var_ref src1)  (swiz xxxx (expression float + (constant float (1.000000)) (expression float neg (swiz w (var_ref v) )) ) )) 
                        )
                        (
                          (if (expression bool == (swiz w (var_ref fastuidraw_uint_varying1) )(constant uint (11)) ) (
                            (assign  (xyzw) (var_ref src0)  (var_ref v) ) 
                            (assign  (xyzw) (var_ref src1)  (swiz wwww (var_ref v) )) 
                          )
                          (
                            (if (expression bool == (swiz w (var_ref fastuidraw_uint_varying1) )(constant uint (12)) ) (
                              (assign  (xyzw) (var_ref src0)  (var_ref v) ) 
                              (assign  (xyzw) (var_ref src1)  (swiz xxxx (expression float + (constant float (1.000000)) (expression float neg (swiz w (var_ref v) )) ) )) 
                            )
                            (
                              (if (expression bool == (swiz w (var_ref fastuidraw_uint_varying1) )(constant uint (13)) ) (
                                (assign  (xyzw) (var_ref src0)  (var_ref v) ) 
                                (assign  (xyzw) (var_ref src1)  (constant vec4 (1.000000 1.000000 1.000000 1.000000)) ) 
                              )
                              (
                                (if (expression bool == (swiz w (var_ref fastuidraw_uint_varying1) )(constant uint (14)) ) (
                                  (assign  (xyzw) (var_ref src0)  (constant vec4 (0.000000 0.000000 0.000000 0.000000)) ) 
                                  (assign  (xyzw) (var_ref src1)  (var_ref v) ) 
                                )
                                (
                                  (if (expression bool == (swiz w (var_ref fastuidraw_uint_varying1) )(constant uint (15)) ) (
                                    (assign  (xyzw) (var_ref src0)  (var_ref v) ) 
                                    (assign  (xyzw) (var_ref src1)  (expression vec4 + (constant vec4 (1.000000 1.000000 1.000000 1.000000)) (expression vec4 neg (var_ref v) ) ) ) 
                                  )
                                  ())

                                ))

                              ))

                            ))

                          ))

                        ))

                      ))

                    ))

                  ))

                ))

              ))

            ))

          ))

        ))

      ))

      (assign  (xyzw) (var_ref fastuidraw_final_color0)  (var_ref src0) ) 
      (assign  (xyzw) (var_ref fastuidraw_final_color1)  (var_ref src1) ) 
    ))

)

)


NIR (SSA form) for fragment shader:
shader: MESA_SHADER_FRAGMENT
name: GLSL1
inputs: 0
outputs: 0
uniforms: 16
shared: 0
decl_var shader_storage INTERP_MODE_NONE restrict readonly uvec4[] fastuidraw_painterStore (0, 0, 0)
decl_var shader_storage INTERP_MODE_NONE restrict readonly uint[] fastuidraw_glyphDataStore_data (0, 0, 1)
decl_var uniform INTERP_MODE_NONE vec4[2] fastuidraw_uniforms (0, 0, 0)
decl_var uniform INTERP_MODE_NONE sampler1DArray fastuidraw_colorStopAtlas (3, 0, 0)
decl_var uniform INTERP_MODE_NONE sampler2DArray fastuidraw_imageAtlasLinear (4, 0, 2)
decl_var uniform INTERP_MODE_NONE sampler2DArray fastuidraw_imageAtlasNearest (5, 0, 1)
decl_var uniform INTERP_MODE_NONE usampler2DArray fastuidraw_imageIndexAtlas (6, 0, 3)
decl_var uniform INTERP_MODE_NONE sampler2D[8] fastuidraw_external_texture (7, 0, 5)
decl_var uniform INTERP_MODE_NONE sampler2D fastuidraw_deferred_coverage_buffer (8, 0, 4)
decl_var uniform INTERP_MODE_NONE vec4 gl_FbWposYTransform (0, 0, 0)
decl_var shader_in INTERP_MODE_SMOOTH vec4 gl_FragCoord (VARYING_SLOT_POS, 0, 0)
decl_var shader_in INTERP_MODE_FLAT uvec4 fastuidraw_uint_varying0 (VARYING_SLOT_VAR0, 31, 0)
decl_var shader_in INTERP_MODE_FLAT uvec4 fastuidraw_uint_varying1 (VARYING_SLOT_VAR1, 32, 0)
decl_var shader_in INTERP_MODE_FLAT uvec4 fastuidraw_uint_varying2 (VARYING_SLOT_VAR2, 33, 0)
decl_var shader_in INTERP_MODE_SMOOTH vec4 fastuidraw_float_smooth_varying0 (VARYING_SLOT_VAR3, 34, 0)
decl_var shader_in INTERP_MODE_SMOOTH vec4 fastuidraw_float_smooth_varying1 (VARYING_SLOT_VAR4, 35, 0)
decl_var shader_in INTERP_MODE_SMOOTH float fastuidraw_float_smooth_varying2 (VARYING_SLOT_VAR5.x, 36, 0)
decl_var shader_in INTERP_MODE_FLAT vec4 fastuidraw_float_flat_varying0 (VARYING_SLOT_VAR6, 37, 0)
decl_var shader_in INTERP_MODE_FLAT vec4 fastuidraw_float_flat_varying1 (VARYING_SLOT_VAR7, 38, 0)
decl_var shader_in INTERP_MODE_FLAT vec4 fastuidraw_float_flat_varying2 (VARYING_SLOT_VAR8, 39, 0)
decl_var shader_in INTERP_MODE_FLAT vec4 fastuidraw_float_flat_varying3 (VARYING_SLOT_VAR9, 40, 0)
decl_var shader_in INTERP_MODE_FLAT vec4 fastuidraw_float_flat_varying4 (VARYING_SLOT_VAR10, 41, 0)
decl_var shader_in INTERP_MODE_FLAT vec3 fastuidraw_float_flat_varying5 (VARYING_SLOT_VAR11.xyz, 42, 0)
decl_var shader_out INTERP_MODE_NONE vec4 fastuidraw_final_color0 (FRAG_RESULT_DATA0, 8, 0)
decl_var shader_out INTERP_MODE_NONE vec4 fastuidraw_final_color1 (FRAG_RESULT_DATA0, 9, 0)
decl_function main (0 params)

impl main {
	block block_0:
	/* preds: */
	vec2 32 ssa_0 = intrinsic load_barycentric_pixel () (1) /* interp_mode=1 */
	vec1 32 ssa_1 = load_const (0x00000000 /* 0.000000 */)
	vec4 32 ssa_2 = intrinsic load_interpolated_input (ssa_0, ssa_1) (35, 0) /* base=35 */ /* component=0 */
	vec1 32 ssa_3 = intrinsic load_interpolated_input (ssa_0, ssa_1) (36, 0) /* base=36 */ /* component=0 */
	vec4 32 ssa_4 = intrinsic load_interpolated_input (ssa_0, ssa_1) (0, 0) /* base=0 */ /* component=0 */
	vec4 32 ssa_5 = intrinsic load_interpolated_input (ssa_0, ssa_1) (34, 0) /* base=34 */ /* component=0 */
	vec1 32 ssa_6 = undefined
	vec1 32 ssa_7 = undefined
	vec1 32 ssa_8 = undefined
	vec1 32 ssa_9 = undefined
	vec1 32 ssa_10 = undefined
	vec1 32 ssa_11 = undefined
	vec1 32 ssa_12 = undefined
	vec1 32 ssa_13 = undefined
	vec1 32 ssa_14 = undefined
	vec1 32 ssa_15 = undefined
	vec1 32 ssa_16 = undefined
	vec1 32 ssa_17 = undefined
	vec1 32 ssa_18 = undefined
	vec1 32 ssa_19 = undefined
	vec1 32 ssa_20 = undefined
	vec1 32 ssa_21 = undefined
	vec1 32 ssa_22 = undefined
	vec1 32 ssa_23 = load_const (0x00000010 /* 0.000000 */)
	vec1 32 ssa_24 = load_const (0xffff8000 /* -nan */)
	vec1 32 ssa_25 = load_const (0xffffffff /* -nan */)
	vec1 32 ssa_26 = load_const (0x80000000 /* -0.000000 */)
	vec1 32 ssa_27 = load_const (0x00002000 /* 0.000000 */)
	vec1 32 ssa_28 = load_const (0x0000001e /* 0.000000 */)
	vec1 32 ssa_29 = load_const (0x0000000e /* 0.000000 */)
	vec1 32 ssa_30 = load_const (0x00000001 /* 0.000000 */)
	vec1 32 ssa_31 = load_const (0x00000002 /* 0.000000 */)
	vec1 32 ssa_32 = load_const (0x00000003 /* 0.000000 */)
	vec1 32 ssa_33 = load_const (0x40000000 /* 2.000000 */)
	vec1 32 ssa_34 = load_const (0x00000015 /* 0.000000 */)
	vec1 32 ssa_35 = load_const (0x3f800000 /* 1.000000 */)
	vec1 32 ssa_36 = load_const (0x40800000 /* 4.000000 */)
	vec1 32 ssa_37 = load_const (0x3f000000 /* 0.500000 */)
	vec1 32 ssa_38 = load_const (0x5d5e0b6b /* 999999984306749440.000000 */)
	vec1 32 ssa_39 = load_const (0x3e800000 /* 0.250000 */)
	vec1 32 ssa_40 = load_const (0xbc46c6a5 /* -0.012132 */)
	vec1 32 ssa_41 = load_const (0x3d5be101 /* 0.053681 */)
	vec1 32 ssa_42 = load_const (0xbdf0555d /* -0.117350 */)
	vec1 32 ssa_43 = load_const (0x3e468bc1 /* 0.193892 */)
	vec1 32 ssa_44 = load_const (0xbeaa5476 /* -0.332676 */)
	vec1 32 ssa_45 = load_const (0x3f7ffea5 /* 0.999979 */)
	vec1 32 ssa_46 = load_const (0xc0000000 /* -2.000000 */)
	vec1 32 ssa_47 = load_const (0x3fc90fdb /* 1.570796 */)
	vec1 32 ssa_48 = load_const (0x40c90fdb /* 6.283185 */)
	vec1 32 ssa_49 = load_const (0x3e22f983 /* 0.159155 */)
	vec1 32 ssa_50 = load_const (0x00000013 /* 0.000000 */)
	vec1 32 ssa_51 = load_const (0xbf800000 /* -1.000000 */)
	vec1 32 ssa_52 = load_const (0x0000000a /* 0.000000 */)
	vec1 32 ssa_53 = load_const (0x00000017 /* 0.000000 */)
	vec1 32 ssa_54 = load_const (0x00000019 /* 0.000000 */)
	vec1 32 ssa_55 = load_const (0x40900000 /* 4.500000 */)
	vec1 32 ssa_56 = load_const (0x42000000 /* 32.000000 */)
	vec1 32 ssa_57 = load_const (0x39000000 /* 0.000122 */)
	vec1 32 ssa_58 = load_const (0x3d000000 /* 0.031250 */)
	vec1 32 ssa_59 = load_const (0x41f80000 /* 31.000000 */)
	vec1 32 ssa_60 = load_const (0x40400000 /* 3.000000 */)
	vec1 32 ssa_61 = load_const (0x40c00000 /* 6.000000 */)
	vec1 32 ssa_62 = load_const (0xbfc00000 /* -1.500000 */)
	vec1 32 ssa_63 = load_const (0x40200000 /* 2.500000 */)
	vec1 32 ssa_64 = load_const (0xbf000000 /* -0.500000 */)
	vec1 32 ssa_65 = load_const (0x3fc00000 /* 1.500000 */)
	vec4 32 ssa_66 = load_const (0x3f800000 /* 1.000000 */, 0x3f800000 /* 1.000000 */, 0x3f800000 /* 1.000000 */, 0x3f800000 /* 1.000000 */)
	vec1 32 ssa_67 = load_const (0x01000000 /* 0.000000 */)
	vec1 32 ssa_68 = load_const (0x00000006 /* 0.000000 */)
	vec1 32 ssa_69 = load_const (0x00000012 /* 0.000000 */)
	vec1 32 ssa_70 = load_const (0x00000014 /* 0.000000 */)
	vec1 32 ssa_71 = load_const (0x00000004 /* 0.000000 */)
	vec1 32 ssa_72 = load_const (0x00000008 /* 0.000000 */)
	vec1 32 ssa_73 = load_const (0x00000018 /* 0.000000 */)
	vec1 32 ssa_74 = load_const (0x00000016 /* 0.000000 */)
	vec1 32 ssa_75 = load_const (0x3fffffff /* 2.000000 */)
	vec1 32 ssa_76 = load_const (0x0000001f /* 0.000000 */)
	vec1 32 ssa_77 = load_const (0x00000011 /* 0.000000 */)
	vec1 32 ssa_78 = load_const (0x0000000f /* 0.000000 */)
	vec1 32 ssa_79 = load_const (0x42f00000 /* 120.000000 */)
	vec1 32 ssa_80 = load_const (0x33d6bf95 /* 0.000000 */)
	vec1 32 ssa_81 = load_const (0x00008000 /* 0.000000 */)
	vec1 32 ssa_82 = load_const (0x00002e74 /* 0.000000 */)
	vec1 32 ssa_83 = load_const (0x38d1b717 /* 0.000100 */)
	vec1 32 ssa_84 = load_const (0x3c800000 /* 0.015625 */)
	vec1 32 ssa_85 = load_const (0x3a83126f /* 0.001000 */)
	vec1 32 ssa_86 = load_const (0x00000005 /* 0.000000 */)
	vec1 32 ssa_87 = load_const (0x00000007 /* 0.000000 */)
	vec1 32 ssa_88 = load_const (0x00000009 /* 0.000000 */)
	vec1 32 ssa_89 = load_const (0x0000000b /* 0.000000 */)
	vec1 32 ssa_90 = load_const (0x0000000c /* 0.000000 */)
	vec1 32 ssa_91 = load_const (0x0000000d /* 0.000000 */)
	vec4 32 ssa_92 = intrinsic load_input (ssa_1) (33, 0) /* base=33 */ /* component=0 */	/* fastuidraw_uint_varying2 */
	vec1 32 ssa_93 = ishl ssa_92.w, ssa_23
	vec1 32 ssa_94 = extract_u16 ssa_93, ssa_30
	vec1 32 ssa_95 = extract_u16 ssa_92.w, ssa_30
	vec1 32 ssa_96 = iadd ssa_94, ssa_24
	vec1 32 ssa_97 = iadd ssa_95, ssa_24
	vec1 32 ssa_98 = ine ssa_92.x, ssa_25
	/* succs: block_1 block_411 */
	if ssa_98 {
		block block_1:
		/* preds: block_0 */
		vec1 32 ssa_99 = iand ssa_92.y, ssa_26
		vec1 32 ssa_100 = ine ssa_99, ssa_1
		/* succs: block_2 block_137 */
		if ssa_100 {
			block block_2:
			/* preds: block_1 */
			vec4 32 ssa_101 = intrinsic load_input (ssa_1) (41, 0) /* base=41 */ /* component=0 */	/* fastuidraw_float_flat_varying4 */
			vec3 32 ssa_102 = intrinsic load_input (ssa_1) (42, 0) /* base=42 */ /* component=0 */	/* fastuidraw_float_flat_varying5 */
			vec1 32 ssa_103 = fddx ssa_2.w
			vec1 32 ssa_104 = fddx ssa_3
			vec4 32 ssa_105 = intrinsic load_uniform (ssa_1) (0, 16) /* base=0 */ /* range=16 */	/* fastuidraw_painterStore */
			vec1 32 ssa_106 = fmul ssa_2.w, ssa_105.x
			vec1 32 ssa_107 = fddy ssa_106
			vec1 32 ssa_108 = fmul ssa_3, ssa_105.x
			vec1 32 ssa_109 = fddy ssa_108
			vec1 32 ssa_110 = iand ssa_92.y, ssa_27
			vec1 32 ssa_111 = ine ssa_110, ssa_1
			/* succs: block_3 block_22 */
			if ssa_111 {
				block block_3:
				/* preds: block_2 */
				vec1 32 ssa_112 = ishl ssa_92.y, ssa_23
				vec1 32 ssa_113 = ushr ssa_112, ssa_28
				vec1 32 ssa_114 = ishl ssa_92.y, ssa_29
				vec1 32 ssa_115 = ushr ssa_114, ssa_28
				vec4 32 ssa_116 = intrinsic load_input (ssa_1) (37, 0) /* base=37 */ /* component=0 */	/* fastuidraw_float_flat_varying0 */
				vec1 32 ssa_117 = fadd ssa_2.w, -ssa_116.x
				vec1 32 ssa_118 = fadd ssa_3, -ssa_116.y
				vec1 32 ssa_119 = ieq ssa_113, ssa_30
				/* succs: block_4 block_5 */
				if ssa_119 {
					block block_4:
					/* preds: block_3 */
					vec1 32 ssa_120 = fmax abs(ssa_117), ssa_1
					vec1 32 ssa_121 = fmin ssa_120, ssa_116.z
					/* succs: block_12 */
				} else {
					block block_5:
					/* preds: block_3 */
					vec1 32 ssa_122 = ieq ssa_113, ssa_31
					/* succs: block_6 block_7 */
					if ssa_122 {
						block block_6:
						/* preds: block_5 */
						vec1 32 ssa_123 = frcp ssa_116.z
						vec1 32 ssa_124 = fmul ssa_117, ssa_123
						vec1 32 ssa_125 = ffloor ssa_124
						vec1 32 ssa_126 = ffma -ssa_116.z, ssa_125, ssa_117
						/* succs: block_11 */
					} else {
						block block_7:
						/* preds: block_5 */
						vec1 32 ssa_127 = ieq ssa_113, ssa_32
						/* succs: block_8 block_9 */
						if ssa_127 {
							block block_8:
							/* preds: block_7 */
							vec1 32 ssa_128 = fmul ssa_33, ssa_116.z
							vec1 32 ssa_129 = frcp ssa_128
							vec1 32 ssa_130 = fmul ssa_117, ssa_129
							vec1 32 ssa_131 = ffloor ssa_130
							vec1 32 ssa_132 = ffma -ssa_128, ssa_131, ssa_117
							vec1 32 ssa_133 = fadd ssa_132, -ssa_116.z
							vec1 32 ssa_134 = fadd ssa_116.z, -abs(ssa_133)
							/* succs: block_10 */
						} else {
							block block_9:
							/* preds: block_7 */
							vec1 32 ssa_135 = fmax ssa_117, ssa_1
							vec1 32 ssa_136 = fmin ssa_135, ssa_116.z
							/* succs: block_10 */
						}
						block block_10:
						/* preds: block_8 block_9 */
						vec1 32 ssa_137 = phi block_8: ssa_134, block_9: ssa_136
						/* succs: block_11 */
					}
					block block_11:
					/* preds: block_6 block_10 */
					vec1 32 ssa_138 = phi block_6: ssa_126, block_10: ssa_137
					/* succs: block_12 */
				}
				block block_12:
				/* preds: block_4 block_11 */
				vec1 32 ssa_139 = phi block_4: ssa_121, block_11: ssa_138
				vec1 32 ssa_140 = ieq ssa_115, ssa_30
				/* succs: block_13 block_14 */
				if ssa_140 {
					block block_13:
					/* preds: block_12 */
					vec1 32 ssa_141 = fmax abs(ssa_118), ssa_1
					vec1 32 ssa_142 = fmin ssa_141, ssa_116.w
					/* succs: block_21 */
				} else {
					block block_14:
					/* preds: block_12 */
					vec1 32 ssa_143 = ieq ssa_115, ssa_31
					/* succs: block_15 block_16 */
					if ssa_143 {
						block block_15:
						/* preds: block_14 */
						vec1 32 ssa_144 = frcp ssa_116.w
						vec1 32 ssa_145 = fmul ssa_118, ssa_144
						vec1 32 ssa_146 = ffloor ssa_145
						vec1 32 ssa_147 = ffma -ssa_116.w, ssa_146, ssa_118
						/* succs: block_20 */
					} else {
						block block_16:
						/* preds: block_14 */
						vec1 32 ssa_148 = ieq ssa_115, ssa_32
						/* succs: block_17 block_18 */
						if ssa_148 {
							block block_17:
							/* preds: block_16 */
							vec1 32 ssa_149 = fmul ssa_33, ssa_116.w
							vec1 32 ssa_150 = frcp ssa_149
							vec1 32 ssa_151 = fmul ssa_118, ssa_150
							vec1 32 ssa_152 = ffloor ssa_151
							vec1 32 ssa_153 = ffma -ssa_149, ssa_152, ssa_118
							vec1 32 ssa_154 = fadd ssa_153, -ssa_116.w
							vec1 32 ssa_155 = fadd ssa_116.w, -abs(ssa_154)
							/* succs: block_19 */
						} else {
							block block_18:
							/* preds: block_16 */
							vec1 32 ssa_156 = fmax ssa_118, ssa_1
							vec1 32 ssa_157 = fmin ssa_156, ssa_116.w
							/* succs: block_19 */
						}
						block block_19:
						/* preds: block_17 block_18 */
						vec1 32 ssa_158 = phi block_17: ssa_155, block_18: ssa_157
						/* succs: block_20 */
					}
					block block_20:
					/* preds: block_15 block_19 */
					vec1 32 ssa_159 = phi block_15: ssa_147, block_19: ssa_158
					/* succs: block_21 */
				}
				block block_21:
				/* preds: block_13 block_20 */
				vec1 32 ssa_160 = phi block_13: ssa_142, block_20: ssa_159
				vec1 32 ssa_161 = fadd ssa_139, ssa_116.x
				vec1 32 ssa_162 = fadd ssa_160, ssa_116.y
				/* succs: block_23 */
			} else {
				block block_22:
				/* preds: block_2 */
				vec1 32 ssa_163 = imov ssa_2.w
				/* succs: block_23 */
			}
			block block_23:
			/* preds: block_21 block_22 */
			vec1 32 ssa_164 = phi block_21: ssa_161, block_22: ssa_163
			vec1 32 ssa_165 = phi block_21: ssa_162, block_22: ssa_3
			vec1 32 ssa_166 = ishl ssa_92.y, ssa_34
			vec1 32 ssa_167 = ushr ssa_166, ssa_28
			vec1 32 ssa_168 = ine ssa_167, ssa_1
			/* succs: block_24 block_55 */
			if ssa_168 {
				block block_24:
				/* preds: block_23 */
				vec1 32 ssa_169 = ieq ssa_167, ssa_31
				/* succs: block_25 block_32 */
				if ssa_169 {
					block block_25:
					/* preds: block_24 */
					vec4 32 ssa_170 = intrinsic load_input (ssa_1) (38, 0) /* base=38 */ /* component=0 */	/* fastuidraw_float_flat_varying1 */
					vec1 32 ssa_171 = fadd ssa_164, -ssa_170.x
					vec1 32 ssa_172 = fadd ssa_165, -ssa_170.y
					vec1 32 ssa_173 = fadd ssa_170.z, -ssa_170.x
					vec1 32 ssa_174 = fadd ssa_170.w, -ssa_170.y
					vec4 32 ssa_175 = intrinsic load_input (ssa_1) (39, 0) /* base=39 */ /* component=0 */	/* fastuidraw_float_flat_varying2 */
					vec1 32 ssa_176 = fadd ssa_175.y, -ssa_175.x
					vec1 32 ssa_177 = fmul ssa_172, ssa_174
					vec1 32 ssa_178 = ffma ssa_171, ssa_173, ssa_177
					vec1 32 ssa_179 = ffma -ssa_175.x, ssa_176, ssa_178
					vec1 32 ssa_180 = fmul ssa_33, ssa_179
					vec1 32 ssa_181 = fmul ssa_174, ssa_174
					vec1 32 ssa_182 = ffma ssa_173, ssa_173, ssa_181
					vec1 32 ssa_183 = ffma -ssa_176, ssa_176, ssa_182
					vec1 32 ssa_184 = fmul ssa_172, ssa_172
					vec1 32 ssa_185 = ffma ssa_171, ssa_171, ssa_184
					vec1 32 ssa_186 = ffma -ssa_175.x, ssa_175.x, ssa_185
					vec1 32 ssa_187 = fmul ssa_183, ssa_36
					vec1 32 ssa_188 = fmul ssa_187, ssa_186
					vec1 32 ssa_189 = ffma ssa_180, ssa_180, -ssa_188
					vec1 32 ssa_190 = fge ssa_189, ssa_1
					/* succs: block_26 block_30 */
					if ssa_190 {
						block block_26:
						/* preds: block_25 */
						vec1 32 ssa_191 = fsqrt abs(ssa_189)
						vec1 32 ssa_192 = frcp ssa_183
						vec1 32 ssa_193 = fmul ssa_37, ssa_192
						vec1 32 ssa_194 = fadd -ssa_180, ssa_191
						vec1 32 ssa_195 = fmul ssa_194, ssa_193
						vec1 32 ssa_196 = fadd -ssa_180, -ssa_191
						vec1 32 ssa_197 = fmul ssa_196, ssa_193
						vec1 32 ssa_198 = fge ssa_35, ssa_195
						vec1 32 ssa_199 = fge ssa_195, ssa_1
						vec1 32 ssa_200 = iand ssa_199, ssa_198
						vec1 32 ssa_201 = b2f ssa_200
						vec1 32 ssa_202 = fge ssa_35, ssa_197
						vec1 32 ssa_203 = fge ssa_197, ssa_1
						vec1 32 ssa_204 = iand ssa_203, ssa_202
						vec1 32 ssa_205 = b2f ssa_204
						vec1 32 ssa_206 = feq ssa_201, ssa_205
						/* succs: block_27 block_28 */
						if ssa_206 {
							block block_27:
							/* preds: block_26 */
							vec1 32 ssa_207 = fmax ssa_195, ssa_197
							/* succs: block_29 */
						} else {
							block block_28:
							/* preds: block_26 */
							vec1 32 ssa_208 = fmul ssa_205, ssa_197
							vec1 32 ssa_209 = ffma ssa_201, ssa_195, ssa_208
							/* succs: block_29 */
						}
						block block_29:
						/* preds: block_27 block_28 */
						vec1 32 ssa_210 = phi block_27: ssa_207, block_28: ssa_209
						/* succs: block_31 */
					} else {
						block block_30:
						/* preds: block_25 */
						/* succs: block_31 */
					}
					block block_31:
					/* preds: block_29 block_30 */
					vec1 32 ssa_211 = phi block_30: ssa_1, block_29: ssa_210
					vec1 32 ssa_212 = phi block_30: ssa_1, block_29: ssa_35
					/* succs: block_45 */
				} else {
					block block_32:
					/* preds: block_24 */
					vec1 32 ssa_213 = ieq ssa_167, ssa_30
					/* succs: block_33 block_34 */
					if ssa_213 {
						block block_33:
						/* preds: block_32 */
						vec4 32 ssa_214 = intrinsic load_input (ssa_1) (38, 0) /* base=38 */ /* component=0 */	/* fastuidraw_float_flat_varying1 */
						vec1 32 ssa_215 = fadd ssa_214.z, -ssa_214.x
						vec1 32 ssa_216 = fadd ssa_214.w, -ssa_214.y
						vec1 32 ssa_217 = fadd ssa_164, -ssa_214.x
						vec1 32 ssa_218 = fadd ssa_165, -ssa_214.y
						vec1 32 ssa_219 = fmul ssa_216, ssa_218
						vec1 32 ssa_220 = ffma ssa_215, ssa_217, ssa_219
						vec1 32 ssa_221 = fmul ssa_216, ssa_216
						vec1 32 ssa_222 = ffma ssa_215, ssa_215, ssa_221
						vec1 32 ssa_223 = frcp ssa_222
						vec1 32 ssa_224 = fmul ssa_220, ssa_223
						/* succs: block_44 */
					} else {
						block block_34:
						/* preds: block_32 */
						vec1 32 ssa_225 = ieq ssa_167, ssa_32
						/* succs: block_35 block_42 */
						if ssa_225 {
							block block_35:
							/* preds: block_34 */
							vec4 32 ssa_226 = intrinsic load_input (ssa_1) (38, 0) /* base=38 */ /* component=0 */	/* fastuidraw_float_flat_varying1 */
							vec1 32 ssa_227 = fadd ssa_164, -ssa_226.x
							vec1 32 ssa_228 = fadd ssa_165, -ssa_226.y
							vec1 32 ssa_229 = fmov abs(ssa_227)
							vec1 32 ssa_230 = fge ssa_1, ssa_227
							vec1 32 ssa_231 = bcsel ssa_230, ssa_229, ssa_228
							vec1 32 ssa_232 = bcsel ssa_230, ssa_228, ssa_229
							vec1 32 ssa_233 = fge abs(ssa_232), ssa_38
							vec1 32 ssa_234 = bcsel ssa_233, ssa_39, ssa_35
							vec1 32 ssa_235 = fmul ssa_232, ssa_234
							vec1 32 ssa_236 = frcp ssa_235
							vec1 32 ssa_237 = fmul ssa_231, ssa_234
							vec1 32 ssa_238 = fmul ssa_237, ssa_236
							vec1 32 ssa_239 = fmov abs(ssa_238)
							vec1 32 ssa_240 = feq abs(ssa_227), abs(ssa_228)
							vec1 32 ssa_241 = bcsel ssa_240, ssa_35, ssa_239
							vec1 32 ssa_242 = fmin abs(ssa_241), ssa_35
							vec1 32 ssa_243 = fmax abs(ssa_241), ssa_35
							vec1 32 ssa_244 = frcp ssa_243
							vec1 32 ssa_245 = fmul ssa_242, ssa_244
							vec1 32 ssa_246 = fmul ssa_245, ssa_245
							vec1 32 ssa_247 = fmul ssa_40, ssa_246
							vec1 32 ssa_248 = fadd ssa_247, ssa_41
							vec1 32 ssa_249 = ffma ssa_248, ssa_246, ssa_42
							vec1 32 ssa_250 = ffma ssa_249, ssa_246, ssa_43
							vec1 32 ssa_251 = ffma ssa_250, ssa_246, ssa_44
							vec1 32 ssa_252 = ffma ssa_251, ssa_246, ssa_45
							vec1 32 ssa_253 = fmul ssa_252, ssa_245
							vec1 32 ssa_254 = flt ssa_35, abs(ssa_241)
							vec1 32 ssa_255 = b2f ssa_254
							vec1 32 ssa_256 = ffma ssa_253, ssa_46, ssa_47
							vec1 32 ssa_257 = ffma ssa_255, ssa_256, ssa_253
							vec1 32 ssa_258 = fsign ssa_241
							vec1 32 ssa_259 = b2f ssa_230
							vec1 32 ssa_260 = fmul ssa_259, ssa_47
							vec1 32 ssa_261 = ffma ssa_257, ssa_258, ssa_260
							vec1 32 ssa_262 = fmin ssa_228, ssa_236
							vec1 32 ssa_263 = fmov -ssa_261
							vec1 32 ssa_264 = flt ssa_262, ssa_1
							vec1 32 ssa_265 = bcsel ssa_264, ssa_263, ssa_261
							vec1 32 ssa_266 = flt ssa_265, ssa_226.z
							/* succs: block_36 block_37 */
							if ssa_266 {
								block block_36:
								/* preds: block_35 */
								vec1 32 ssa_267 = fadd ssa_265, ssa_48
								/* succs: block_38 */
							} else {
								block block_37:
								/* preds: block_35 */
								/* succs: block_38 */
							}
							block block_38:
							/* preds: block_36 block_37 */
							vec1 32 ssa_268 = phi block_36: ssa_267, block_37: ssa_265
							vec1 32 ssa_269 = fadd ssa_268, -ssa_226.z
							vec1 32 ssa_270 = fmul ssa_269, ssa_49
							vec1 32 ssa_271 = flt ssa_226.w, ssa_1
							/* succs: block_39 block_40 */
							if ssa_271 {
								block block_39:
								/* preds: block_38 */
								vec1 32 ssa_272 = fadd ssa_35, -ssa_270
								/* succs: block_41 */
							} else {
								block block_40:
								/* preds: block_38 */
								/* succs: block_41 */
							}
							block block_41:
							/* preds: block_39 block_40 */
							vec1 32 ssa_273 = phi block_39: ssa_272, block_40: ssa_270
							vec1 32 ssa_274 = fmul ssa_273, abs(ssa_226.w)
							/* succs: block_43 */
						} else {
							block block_42:
							/* preds: block_34 */
							/* succs: block_43 */
						}
						block block_43:
						/* preds: block_41 block_42 */
						vec1 32 ssa_275 = phi block_41: ssa_35, block_42: ssa_22
						vec1 32 ssa_276 = phi block_41: ssa_274, block_42: ssa_35
						/* succs: block_44 */
					}
					block block_44:
					/* preds: block_33 block_43 */
					vec1 32 ssa_277 = phi block_33: ssa_35, block_43: ssa_275
					vec1 32 ssa_278 = phi block_33: ssa_224, block_43: ssa_276
					/* succs: block_45 */
				}
				block block_45:
				/* preds: block_31 block_44 */
				vec1 32 ssa_279 = phi block_31: ssa_212, block_44: ssa_277
				vec1 32 ssa_280 = phi block_31: ssa_211, block_44: ssa_278
				vec1 32 ssa_281 = ishl ssa_92.y, ssa_50
				vec1 32 ssa_282 = ushr ssa_281, ssa_28
				vec1 32 ssa_283 = ieq ssa_282, ssa_30
				/* succs: block_46 block_47 */
				if ssa_283 {
					block block_46:
					/* preds: block_45 */
					vec1 32 ssa_284 = fmov.sat abs(ssa_280)
					/* succs: block_54 */
				} else {
					block block_47:
					/* preds: block_45 */
					vec1 32 ssa_285 = ieq ssa_282, ssa_31
					/* succs: block_48 block_49 */
					if ssa_285 {
						block block_48:
						/* preds: block_47 */
						vec1 32 ssa_286 = ffract ssa_280
						/* succs: block_53 */
					} else {
						block block_49:
						/* preds: block_47 */
						vec1 32 ssa_287 = ieq ssa_282, ssa_32
						/* succs: block_50 block_51 */
						if ssa_287 {
							block block_50:
							/* preds: block_49 */
							vec1 32 ssa_288 = fmul ssa_280, ssa_37
							vec1 32 ssa_289 = ffloor ssa_288
							vec1 32 ssa_290 = fadd ssa_280, ssa_51
							vec1 32 ssa_291 = ffma -ssa_33, ssa_289, ssa_290
							vec1 32 ssa_292 = fadd ssa_35, -abs(ssa_291)
							/* succs: block_52 */
						} else {
							block block_51:
							/* preds: block_49 */
							vec1 32 ssa_293 = fmov.sat ssa_280
							/* succs: block_52 */
						}
						block block_52:
						/* preds: block_50 block_51 */
						vec1 32 ssa_294 = phi block_50: ssa_292, block_51: ssa_293
						/* succs: block_53 */
					}
					block block_53:
					/* preds: block_48 block_52 */
					vec1 32 ssa_295 = phi block_48: ssa_286, block_52: ssa_294
					/* succs: block_54 */
				}
				block block_54:
				/* preds: block_46 block_53 */
				vec1 32 ssa_296 = phi block_46: ssa_284, block_53: ssa_295
				vec1 32 ssa_297 = ffma ssa_296, ssa_101.z, ssa_101.x
				vec2 32 ssa_298 = vec2 ssa_297, ssa_101.y
				vec4 32 ssa_299 = txl ssa_298 (coord), ssa_1 (lod), 0 (texture), 0 (sampler), 
				vec1 32 ssa_300 = fmul ssa_279, ssa_299.x
				vec1 32 ssa_301 = fmul ssa_279, ssa_299.y
				vec1 32 ssa_302 = fmul ssa_279, ssa_299.z
				vec1 32 ssa_303 = fmul ssa_279, ssa_299.w
				vec1 32 ssa_304 = fmul ssa_101.w, ssa_300
				vec1 32 ssa_305 = fmul ssa_102.x, ssa_301
				vec1 32 ssa_306 = fmul ssa_102.y, ssa_302
				vec1 32 ssa_307 = fmul ssa_102.z, ssa_303
				/* succs: block_56 */
			} else {
				block block_55:
				/* preds: block_23 */
				vec1 32 ssa_308 = imov ssa_101.w
				vec1 32 ssa_309 = imov ssa_102.x
				vec1 32 ssa_310 = imov ssa_102.y
				vec1 32 ssa_311 = imov ssa_102.z
				/* succs: block_56 */
			}
			block block_56:
			/* preds: block_54 block_55 */
			vec1 32 ssa_312 = phi block_54: ssa_304, block_55: ssa_308
			vec1 32 ssa_313 = phi block_54: ssa_305, block_55: ssa_309
			vec1 32 ssa_314 = phi block_54: ssa_306, block_55: ssa_310
			vec1 32 ssa_315 = phi block_54: ssa_307, block_55: ssa_311
			vec1 32 ssa_316 = fmul ssa_312, ssa_315
			vec1 32 ssa_317 = fmul ssa_313, ssa_315
			vec1 32 ssa_318 = fmul ssa_314, ssa_315
			vec1 32 ssa_319 = iand ssa_92.y, ssa_32
			vec1 32 ssa_320 = ine ssa_319, ssa_1
			/* succs: block_57 block_135 */
			if ssa_320 {
				block block_57:
				/* preds: block_56 */
				vec1 32 ssa_321 = fmax ssa_164, ssa_1
				vec4 32 ssa_322 = intrinsic load_input (ssa_1) (40, 0) /* base=40 */ /* component=0 */	/* fastuidraw_float_flat_varying3 */
				vec1 32 ssa_323 = fadd ssa_322.x, ssa_51
				vec1 32 ssa_324 = fmin ssa_321, ssa_323
				vec1 32 ssa_325 = fmax ssa_165, ssa_1
				vec1 32 ssa_326 = fadd ssa_322.y, ssa_51
				vec1 32 ssa_327 = fmin ssa_325, ssa_326
				vec1 32 ssa_328 = ishl ssa_92.y, ssa_52
				vec1 32 ssa_329 = ushr ssa_328, ssa_28
				vec1 32 ssa_330 = ishl ssa_92.y, ssa_28
				vec1 32 ssa_331 = ushr ssa_330, ssa_28
				vec1 32 ssa_332 = ishl ssa_92.y, ssa_53
				vec1 32 ssa_333 = ushr ssa_332, ssa_54
				vec1 32 ssa_334 = ult ssa_1, ssa_333
				/* succs: block_58 block_59 */
				if ssa_334 {
					block block_58:
					/* preds: block_57 */
					vec1 32 ssa_335 = fmul ssa_104, ssa_104
					vec1 32 ssa_336 = ffma ssa_103, ssa_103, ssa_335
					vec1 32 ssa_337 = fmul ssa_109, ssa_109
					vec1 32 ssa_338 = ffma ssa_107, ssa_107, ssa_337
					vec1 32 ssa_339 = fadd ssa_336, ssa_338
					vec1 32 ssa_340 = fmul ssa_339, ssa_37
					vec1 32 ssa_341 = fmax ssa_35, ssa_340
					vec1 32 ssa_342 = flog2 ssa_341
					vec1 32 ssa_343 = fmul ssa_37, ssa_342
					vec1 32 ssa_344 = u2f32 ssa_333
					vec1 32 ssa_345 = fmin ssa_344, ssa_343
					/* succs: block_60 */
				} else {
					block block_59:
					/* preds: block_57 */
					/* succs: block_60 */
				}
				block block_60:
				/* preds: block_58 block_59 */
				vec1 32 ssa_346 = phi block_58: ssa_345, block_59: ssa_1
				vec1 32 ssa_347 = ieq ssa_329, ssa_1
				/* succs: block_61 block_121 */
				if ssa_347 {
					block block_61:
					/* preds: block_60 */
					vec1 32 ssa_348 = fmin ssa_346, ssa_55
					vec1 32 ssa_349 = ieq ssa_331, ssa_30
					/* succs: block_62 block_68 */
					if ssa_349 {
						block block_62:
						/* preds: block_61 */
						vec1 32 ssa_350 = fceil ssa_348
						vec1 32 ssa_351 = fmax ssa_324, ssa_1
						vec1 32 ssa_352 = fmax ssa_327, ssa_1
						vec1 32 ssa_353 = fmin ssa_351, ssa_322.x
						vec1 32 ssa_354 = fmin ssa_352, ssa_322.y
						vec4 32 ssa_355 = intrinsic load_input (ssa_1) (39, 0) /* base=39 */ /* component=0 */	/* fastuidraw_float_flat_varying2 */
						vec1 32 ssa_356 = ffma ssa_353, ssa_322.z, ssa_355.z
						vec1 32 ssa_357 = ffma ssa_354, ssa_322.z, ssa_355.w
						vec1 32 ssa_358 = f2i32 ssa_356
						vec1 32 ssa_359 = f2i32 ssa_357
						vec4 32 ssa_360 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
						vec3 32 ssa_361 = vec3 ssa_358, ssa_359, ssa_360.w
						vec4 32 ssa_362 = txf ssa_361 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
						vec1 32 ssa_363 = ishl ssa_362.w, ssa_72
						vec1 32 ssa_364 = iadd ssa_362.z, ssa_363
						/* succs: block_63 */
						loop {
							block block_63:
							/* preds: block_62 block_66 */
							vec4 32 ssa_365 = phi block_62: ssa_362, block_66: ssa_385
							vec1 32 ssa_366 = phi block_62: ssa_364, block_66: ssa_387
							vec1 32 ssa_367 = phi block_62: ssa_356, block_66: ssa_380
							vec1 32 ssa_368 = phi block_62: ssa_357, block_66: ssa_381
							vec1 32 ssa_369 = phi block_62: ssa_30, block_66: ssa_388
							vec4 32 ssa_370 = intrinsic load_input (ssa_1) (32, 0) /* base=32 */ /* component=0 */	/* fastuidraw_uint_varying1 */
							vec1 32 ssa_371 = uge ssa_369, ssa_370.x
							/* succs: block_64 block_65 */
							if ssa_371 {
								block block_64:
								/* preds: block_63 */
								break
								/* succs: block_67 */
							} else {
								block block_65:
								/* preds: block_63 */
								/* succs: block_66 */
							}
							block block_66:
							/* preds: block_65 */
							vec1 32 ssa_372 = ffloor ssa_367
							vec1 32 ssa_373 = ffloor ssa_368
							vec1 32 ssa_374 = fadd ssa_367, -ssa_372
							vec1 32 ssa_375 = fadd ssa_368, -ssa_373
							vec1 32 ssa_376 = u2f32 ssa_365.x
							vec1 32 ssa_377 = u2f32 ssa_365.y
							vec1 32 ssa_378 = fmul ssa_376, ssa_36
							vec1 32 ssa_379 = fmul ssa_377, ssa_36
							vec1 32 ssa_380 = ffma ssa_374, ssa_36, ssa_378
							vec1 32 ssa_381 = ffma ssa_375, ssa_36, ssa_379
							vec1 32 ssa_382 = f2i32 ssa_380
							vec1 32 ssa_383 = f2i32 ssa_381
							vec3 32 ssa_384 = vec3 ssa_382, ssa_383, ssa_366
							vec4 32 ssa_385 = txf ssa_384 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
							vec1 32 ssa_386 = ishl ssa_385.w, ssa_72
							vec1 32 ssa_387 = iadd ssa_385.z, ssa_386
							vec1 32 ssa_388 = iadd ssa_369, ssa_30
							/* succs: block_63 */
						}
						block block_67:
						/* preds: block_64 */
						vec1 32 ssa_389 = ffloor ssa_367
						vec1 32 ssa_390 = ffloor ssa_368
						vec1 32 ssa_391 = fadd ssa_367, -ssa_389
						vec1 32 ssa_392 = fadd ssa_368, -ssa_390
						vec1 32 ssa_393 = u2f32 ssa_365.x
						vec1 32 ssa_394 = u2f32 ssa_365.y
						vec1 32 ssa_395 = fmul ssa_393, ssa_56
						vec1 32 ssa_396 = fmul ssa_394, ssa_56
						vec1 32 ssa_397 = ffma ssa_391, ssa_56, ssa_395
						vec1 32 ssa_398 = ffma ssa_392, ssa_56, ssa_396
						vec1 32 ssa_399 = fmul ssa_397, ssa_57
						vec1 32 ssa_400 = fmul ssa_398, ssa_57
						vec1 32 ssa_401 = u2f32 ssa_366
						vec3 32 ssa_402 = vec3 ssa_399, ssa_400, ssa_401
						vec4 32 ssa_403 = txl ssa_402 (coord), ssa_350 (lod), 2 (texture), 2 (sampler), 
						/* succs: block_120 */
					} else {
						block block_68:
						/* preds: block_61 */
						vec1 32 ssa_404 = flt ssa_37, ssa_348
						vec1 32 ssa_405 = ieq ssa_331, ssa_31
						vec1 32 ssa_406 = ior ssa_405, ssa_404
						/* succs: block_69 block_78 */
						if ssa_406 {
							block block_69:
							/* preds: block_68 */
							vec1 32 ssa_407 = fround_even ssa_348
							vec1 32 ssa_408 = f2i32 ssa_407
							vec1 32 ssa_409 = ishl ssa_30, ssa_408
							vec1 32 ssa_410 = i2f32 ssa_409
							vec1 32 ssa_411 = fmul ssa_37, ssa_410
							vec1 32 ssa_412 = fmax ssa_324, ssa_411
							vec1 32 ssa_413 = fmax ssa_327, ssa_411
							vec1 32 ssa_414 = fadd ssa_322.x, -ssa_411
							vec1 32 ssa_415 = fadd ssa_322.y, -ssa_411
							vec1 32 ssa_416 = fmin ssa_412, ssa_414
							vec1 32 ssa_417 = fmin ssa_413, ssa_415
							vec4 32 ssa_418 = intrinsic load_input (ssa_1) (39, 0) /* base=39 */ /* component=0 */	/* fastuidraw_float_flat_varying2 */
							vec1 32 ssa_419 = ffma ssa_416, ssa_322.z, ssa_418.z
							vec1 32 ssa_420 = ffma ssa_417, ssa_322.z, ssa_418.w
							vec1 32 ssa_421 = fmul ssa_39, ssa_419
							vec1 32 ssa_422 = fmul ssa_39, ssa_420
							vec1 32 ssa_423 = ffloor ssa_421
							vec1 32 ssa_424 = ffloor ssa_422
							vec1 32 ssa_425 = ffma -ssa_36, ssa_423, ssa_419
							vec1 32 ssa_426 = ffma -ssa_36, ssa_424, ssa_420
							vec1 32 ssa_427 = fmul ssa_425, ssa_322.w
							vec1 32 ssa_428 = fmul ssa_426, ssa_322.w
							vec1 32 ssa_429 = fmul ssa_427, ssa_58
							vec1 32 ssa_430 = ffloor ssa_429
							vec1 32 ssa_431 = ffma -ssa_56, ssa_430, ssa_427
							vec1 32 ssa_432 = fmul ssa_428, ssa_58
							vec1 32 ssa_433 = ffloor ssa_432
							vec1 32 ssa_434 = ffma -ssa_56, ssa_433, ssa_428
							vec1 32 ssa_435 = f2i32 ssa_419
							vec1 32 ssa_436 = f2i32 ssa_420
							vec4 32 ssa_437 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
							vec3 32 ssa_438 = vec3 ssa_435, ssa_436, ssa_437.w
							vec4 32 ssa_439 = txf ssa_438 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
							vec1 32 ssa_440 = ishl ssa_439.w, ssa_72
							vec1 32 ssa_441 = iadd ssa_439.z, ssa_440
							/* succs: block_70 */
							loop {
								block block_70:
								/* preds: block_69 block_73 */
								vec4 32 ssa_442 = phi block_69: ssa_439, block_73: ssa_462
								vec1 32 ssa_443 = phi block_69: ssa_441, block_73: ssa_464
								vec1 32 ssa_444 = phi block_69: ssa_419, block_73: ssa_457
								vec1 32 ssa_445 = phi block_69: ssa_420, block_73: ssa_458
								vec1 32 ssa_446 = phi block_69: ssa_30, block_73: ssa_465
								vec4 32 ssa_447 = intrinsic load_input (ssa_1) (32, 0) /* base=32 */ /* component=0 */	/* fastuidraw_uint_varying1 */
								vec1 32 ssa_448 = uge ssa_446, ssa_447.x
								/* succs: block_71 block_72 */
								if ssa_448 {
									block block_71:
									/* preds: block_70 */
									break
									/* succs: block_74 */
								} else {
									block block_72:
									/* preds: block_70 */
									/* succs: block_73 */
								}
								block block_73:
								/* preds: block_72 */
								vec1 32 ssa_449 = ffloor ssa_444
								vec1 32 ssa_450 = ffloor ssa_445
								vec1 32 ssa_451 = fadd ssa_444, -ssa_449
								vec1 32 ssa_452 = fadd ssa_445, -ssa_450
								vec1 32 ssa_453 = u2f32 ssa_442.x
								vec1 32 ssa_454 = u2f32 ssa_442.y
								vec1 32 ssa_455 = fmul ssa_453, ssa_36
								vec1 32 ssa_456 = fmul ssa_454, ssa_36
								vec1 32 ssa_457 = ffma ssa_451, ssa_36, ssa_455
								vec1 32 ssa_458 = ffma ssa_452, ssa_36, ssa_456
								vec1 32 ssa_459 = f2i32 ssa_457
								vec1 32 ssa_460 = f2i32 ssa_458
								vec3 32 ssa_461 = vec3 ssa_459, ssa_460, ssa_443
								vec4 32 ssa_462 = txf ssa_461 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
								vec1 32 ssa_463 = ishl ssa_462.w, ssa_72
								vec1 32 ssa_464 = iadd ssa_462.z, ssa_463
								vec1 32 ssa_465 = iadd ssa_446, ssa_30
								/* succs: block_70 */
							}
							block block_74:
							/* preds: block_71 */
							vec1 32 ssa_466 = ffloor ssa_444
							vec1 32 ssa_467 = ffloor ssa_445
							vec1 32 ssa_468 = fadd ssa_444, -ssa_466
							vec1 32 ssa_469 = fadd ssa_445, -ssa_467
							vec1 32 ssa_470 = u2f32 ssa_442.x
							vec1 32 ssa_471 = u2f32 ssa_442.y
							vec1 32 ssa_472 = fmul ssa_470, ssa_56
							vec1 32 ssa_473 = fmul ssa_471, ssa_56
							vec1 32 ssa_474 = ffma ssa_468, ssa_56, ssa_472
							vec1 32 ssa_475 = ffma ssa_469, ssa_56, ssa_473
							vec1 32 ssa_476 = fmin -ssa_431, -ssa_434
							vec1 32 ssa_477 = fadd ssa_59, ssa_476
							vec1 32 ssa_478 = fge -ssa_411, -ssa_431
							vec1 32 ssa_479 = fge ssa_477, ssa_411
							vec1 32 ssa_480 = iand ssa_479, ssa_478
							vec1 32 ssa_481 = fge -ssa_411, -ssa_434
							vec1 32 ssa_482 = iand ssa_480, ssa_481
							/* succs: block_75 block_76 */
							if ssa_482 {
								block block_75:
								/* preds: block_74 */
								vec1 32 ssa_483 = fmul ssa_474, ssa_57
								vec1 32 ssa_484 = fmul ssa_475, ssa_57
								vec1 32 ssa_485 = u2f32 ssa_443
								vec3 32 ssa_486 = vec3 ssa_483, ssa_484, ssa_485
								vec1 32 ssa_487 = i2f32 ssa_408
								vec4 32 ssa_488 = txl ssa_486 (coord), ssa_487 (lod), 1 (texture), 1 (sampler), 
								/* succs: block_77 */
							} else {
								block block_76:
								/* preds: block_74 */
								vec1 32 ssa_489 = fmul ssa_474, ssa_57
								vec1 32 ssa_490 = fmul ssa_475, ssa_57
								vec1 32 ssa_491 = u2f32 ssa_443
								vec3 32 ssa_492 = vec3 ssa_489, ssa_490, ssa_491
								vec1 32 ssa_493 = i2f32 ssa_408
								vec4 32 ssa_494 = txl ssa_492 (coord), ssa_493 (lod), 2 (texture), 2 (sampler), 
								/* succs: block_77 */
							}
							block block_77:
							/* preds: block_75 block_76 */
							vec4 32 ssa_495 = phi block_75: ssa_488, block_76: ssa_494
							/* succs: block_119 */
						} else {
							block block_78:
							/* preds: block_68 */
							vec1 32 ssa_496 = fmax ssa_324, ssa_33
							vec1 32 ssa_497 = fmax ssa_327, ssa_33
							vec1 32 ssa_498 = fadd ssa_322.x, ssa_46
							vec1 32 ssa_499 = fadd ssa_322.y, ssa_46
							vec1 32 ssa_500 = fmin ssa_496, ssa_498
							vec1 32 ssa_501 = fmin ssa_497, ssa_499
							vec4 32 ssa_502 = intrinsic load_input (ssa_1) (39, 0) /* base=39 */ /* component=0 */	/* fastuidraw_float_flat_varying2 */
							vec1 32 ssa_503 = ffma ssa_500, ssa_322.z, ssa_502.z
							vec1 32 ssa_504 = ffma ssa_501, ssa_322.z, ssa_502.w
							vec1 32 ssa_505 = ffma -ssa_37, ssa_322.z, ssa_503
							vec1 32 ssa_506 = ffma -ssa_37, ssa_322.z, ssa_504
							vec1 32 ssa_507 = fadd ssa_505, -ssa_502.z
							vec1 32 ssa_508 = fadd ssa_506, -ssa_502.w
							vec1 32 ssa_509 = fmul ssa_507, ssa_322.w
							vec1 32 ssa_510 = fmul ssa_508, ssa_322.w
							vec1 32 ssa_511 = fmul ssa_509, ssa_58
							vec1 32 ssa_512 = ffloor ssa_511
							vec1 32 ssa_513 = ffma -ssa_56, ssa_512, ssa_509
							vec1 32 ssa_514 = fadd ssa_59, -ssa_513
							vec1 32 ssa_515 = fmul ssa_510, ssa_58
							vec1 32 ssa_516 = ffloor ssa_515
							vec1 32 ssa_517 = ffma -ssa_56, ssa_516, ssa_510
							vec1 32 ssa_518 = fadd ssa_59, -ssa_517
							vec1 32 ssa_519 = ffract ssa_509
							vec1 32 ssa_520 = ffract ssa_510
							vec1 32 ssa_521 = fmul ssa_519, ssa_519
							vec1 32 ssa_522 = fmul ssa_521, ssa_519
							vec1 32 ssa_523 = fadd ssa_35, -ssa_519
							vec1 32 ssa_524 = fmul ssa_523, ssa_523
							vec1 32 ssa_525 = fmul ssa_524, ssa_523
							vec1 32 ssa_526 = ffma ssa_60, ssa_522, ssa_36
							vec1 32 ssa_527 = ffma -ssa_61, ssa_521, ssa_526
							vec1 32 ssa_528 = ffma ssa_60, ssa_525, ssa_36
							vec1 32 ssa_529 = ffma -ssa_61, ssa_524, ssa_528
							vec1 32 ssa_530 = load_const (0x3e2aaaab /* 0.166667 */)
							vec1 32 ssa_531 = fmul ssa_527, ssa_530
							vec1 32 ssa_532 = fmul ssa_522, ssa_530
							vec1 32 ssa_533 = fmul ssa_520, ssa_520
							vec1 32 ssa_534 = fmul ssa_533, ssa_520
							vec1 32 ssa_535 = fadd ssa_35, -ssa_520
							vec1 32 ssa_536 = fmul ssa_535, ssa_535
							vec1 32 ssa_537 = fmul ssa_536, ssa_535
							vec1 32 ssa_538 = ffma ssa_60, ssa_534, ssa_36
							vec1 32 ssa_539 = ffma -ssa_61, ssa_533, ssa_538
							vec1 32 ssa_540 = ffma ssa_60, ssa_537, ssa_36
							vec1 32 ssa_541 = ffma -ssa_61, ssa_536, ssa_540
							vec1 32 ssa_542 = fmul ssa_539, ssa_530
							vec1 32 ssa_543 = fmul ssa_534, ssa_530
							vec1 32 ssa_544 = ffma ssa_525, ssa_530, ssa_531
							vec1 32 ssa_545 = ffma ssa_529, ssa_530, ssa_532
							vec1 32 ssa_546 = ffma ssa_537, ssa_530, ssa_542
							vec1 32 ssa_547 = ffma ssa_541, ssa_530, ssa_543
							vec1 32 ssa_548 = frcp ssa_544
							vec1 32 ssa_549 = frcp ssa_545
							vec1 32 ssa_550 = frcp ssa_546
							vec1 32 ssa_551 = frcp ssa_547
							vec1 32 ssa_552 = fadd ssa_544, ssa_545
							vec1 32 ssa_553 = frcp ssa_552
							vec1 32 ssa_554 = fmul ssa_545, ssa_553
							vec1 32 ssa_555 = fadd ssa_546, ssa_547
							vec1 32 ssa_556 = frcp ssa_555
							vec1 32 ssa_557 = fmul ssa_547, ssa_556
							vec1 32 ssa_558 = fmax -ssa_513, -ssa_517
							vec1 32 ssa_559 = fge ssa_514, ssa_63
							vec1 32 ssa_560 = fge ssa_62, ssa_558
							vec1 32 ssa_561 = iand ssa_560, ssa_559
							vec1 32 ssa_562 = fge ssa_518, ssa_63
							vec1 32 ssa_563 = iand ssa_561, ssa_562
							/* succs: block_79 block_85 */
							if ssa_563 {
								block block_79:
								/* preds: block_78 */
								vec1 32 ssa_564 = f2i32 ssa_505
								vec1 32 ssa_565 = f2i32 ssa_506
								vec4 32 ssa_566 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
								vec3 32 ssa_567 = vec3 ssa_564, ssa_565, ssa_566.w
								vec4 32 ssa_568 = txf ssa_567 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
								vec1 32 ssa_569 = ishl ssa_568.w, ssa_72
								vec1 32 ssa_570 = iadd ssa_568.z, ssa_569
								/* succs: block_80 */
								loop {
									block block_80:
									/* preds: block_79 block_83 */
									vec4 32 ssa_571 = phi block_79: ssa_568, block_83: ssa_591
									vec1 32 ssa_572 = phi block_79: ssa_570, block_83: ssa_593
									vec1 32 ssa_573 = phi block_79: ssa_505, block_83: ssa_586
									vec1 32 ssa_574 = phi block_79: ssa_506, block_83: ssa_587
									vec1 32 ssa_575 = phi block_79: ssa_30, block_83: ssa_594
									vec4 32 ssa_576 = intrinsic load_input (ssa_1) (32, 0) /* base=32 */ /* component=0 */	/* fastuidraw_uint_varying1 */
									vec1 32 ssa_577 = uge ssa_575, ssa_576.x
									/* succs: block_81 block_82 */
									if ssa_577 {
										block block_81:
										/* preds: block_80 */
										break
										/* succs: block_84 */
									} else {
										block block_82:
										/* preds: block_80 */
										/* succs: block_83 */
									}
									block block_83:
									/* preds: block_82 */
									vec1 32 ssa_578 = ffloor ssa_573
									vec1 32 ssa_579 = ffloor ssa_574
									vec1 32 ssa_580 = fadd ssa_573, -ssa_578
									vec1 32 ssa_581 = fadd ssa_574, -ssa_579
									vec1 32 ssa_582 = u2f32 ssa_571.x
									vec1 32 ssa_583 = u2f32 ssa_571.y
									vec1 32 ssa_584 = fmul ssa_582, ssa_36
									vec1 32 ssa_585 = fmul ssa_583, ssa_36
									vec1 32 ssa_586 = ffma ssa_580, ssa_36, ssa_584
									vec1 32 ssa_587 = ffma ssa_581, ssa_36, ssa_585
									vec1 32 ssa_588 = f2i32 ssa_586
									vec1 32 ssa_589 = f2i32 ssa_587
									vec3 32 ssa_590 = vec3 ssa_588, ssa_589, ssa_572
									vec4 32 ssa_591 = txf ssa_590 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
									vec1 32 ssa_592 = ishl ssa_591.w, ssa_72
									vec1 32 ssa_593 = iadd ssa_591.z, ssa_592
									vec1 32 ssa_594 = iadd ssa_575, ssa_30
									/* succs: block_80 */
								}
								block block_84:
								/* preds: block_81 */
								vec1 32 ssa_595 = ffloor ssa_573
								vec1 32 ssa_596 = ffloor ssa_574
								vec1 32 ssa_597 = fadd ssa_573, -ssa_595
								vec1 32 ssa_598 = fadd ssa_574, -ssa_596
								vec1 32 ssa_599 = u2f32 ssa_571.x
								vec1 32 ssa_600 = u2f32 ssa_571.y
								vec1 32 ssa_601 = fmul ssa_599, ssa_56
								vec1 32 ssa_602 = fmul ssa_600, ssa_56
								vec1 32 ssa_603 = ffma ssa_597, ssa_56, ssa_601
								vec1 32 ssa_604 = ffma ssa_598, ssa_56, ssa_602
								vec1 32 ssa_605 = fadd ssa_603, -ssa_519
								vec1 32 ssa_606 = fadd ssa_604, -ssa_520
								vec1 32 ssa_607 = fadd ssa_605, ssa_64
								vec1 32 ssa_608 = ffma ssa_531, ssa_548, ssa_607
								vec1 32 ssa_609 = fadd ssa_605, ssa_65
								vec1 32 ssa_610 = ffma ssa_532, ssa_549, ssa_609
								vec1 32 ssa_611 = fadd ssa_606, ssa_64
								vec1 32 ssa_612 = ffma ssa_542, ssa_550, ssa_611
								vec1 32 ssa_613 = fadd ssa_606, ssa_65
								vec1 32 ssa_614 = ffma ssa_543, ssa_551, ssa_613
								vec1 32 ssa_615 = fmul ssa_608, ssa_57
								vec1 32 ssa_616 = fmul ssa_610, ssa_57
								vec1 32 ssa_617 = fmul ssa_612, ssa_57
								vec1 32 ssa_618 = fmul ssa_614, ssa_57
								vec1 32 ssa_619 = u2f32 ssa_572
								vec3 32 ssa_620 = vec3 ssa_615, ssa_617, ssa_619
								vec4 32 ssa_621 = txl ssa_620 (coord), ssa_1 (lod), 1 (texture), 1 (sampler), 
								vec3 32 ssa_622 = vec3 ssa_616, ssa_617, ssa_619
								vec4 32 ssa_623 = txl ssa_622 (coord), ssa_1 (lod), 1 (texture), 1 (sampler), 
								vec3 32 ssa_624 = vec3 ssa_615, ssa_618, ssa_619
								vec4 32 ssa_625 = txl ssa_624 (coord), ssa_1 (lod), 1 (texture), 1 (sampler), 
								vec3 32 ssa_626 = vec3 ssa_616, ssa_618, ssa_619
								vec4 32 ssa_627 = txl ssa_626 (coord), ssa_1 (lod), 1 (texture), 1 (sampler), 
								/* succs: block_118 */
							} else {
								block block_85:
								/* preds: block_78 */
								vec1 32 ssa_628 = ffma -ssa_519, ssa_322.z, ssa_505
								vec1 32 ssa_629 = ffma -ssa_520, ssa_322.z, ssa_506
								vec1 32 ssa_630 = ffma -ssa_37, ssa_322.z, ssa_628
								vec1 32 ssa_631 = ffma -ssa_37, ssa_322.z, ssa_629
								vec1 32 ssa_632 = ffma ssa_65, ssa_322.z, ssa_628
								vec1 32 ssa_633 = ffma ssa_65, ssa_322.z, ssa_629
								vec1 32 ssa_634 = fmul ssa_531, ssa_548
								vec1 32 ssa_635 = fmul ssa_532, ssa_549
								vec1 32 ssa_636 = fmul ssa_542, ssa_550
								vec1 32 ssa_637 = fmul ssa_543, ssa_551
								vec1 32 ssa_638 = ffma ssa_634, ssa_322.z, ssa_630
								vec1 32 ssa_639 = ffma ssa_635, ssa_322.z, ssa_632
								vec1 32 ssa_640 = ffma ssa_636, ssa_322.z, ssa_631
								vec1 32 ssa_641 = ffma ssa_637, ssa_322.z, ssa_633
								vec1 32 ssa_642 = fmul ssa_39, ssa_638
								vec1 32 ssa_643 = fmul ssa_39, ssa_640
								vec1 32 ssa_644 = ffloor ssa_642
								vec1 32 ssa_645 = ffloor ssa_643
								vec1 32 ssa_646 = ffma -ssa_36, ssa_644, ssa_638
								vec1 32 ssa_647 = ffma -ssa_36, ssa_645, ssa_640
								vec1 32 ssa_648 = fmul ssa_646, ssa_322.w
								vec1 32 ssa_649 = fmul ssa_647, ssa_322.w
								vec1 32 ssa_650 = fmul ssa_648, ssa_58
								vec1 32 ssa_651 = ffloor ssa_650
								vec1 32 ssa_652 = ffma -ssa_56, ssa_651, ssa_648
								vec1 32 ssa_653 = fadd ssa_59, -ssa_652
								vec1 32 ssa_654 = fmul ssa_649, ssa_58
								vec1 32 ssa_655 = ffloor ssa_654
								vec1 32 ssa_656 = ffma -ssa_56, ssa_655, ssa_649
								vec1 32 ssa_657 = fadd ssa_59, -ssa_656
								vec1 32 ssa_658 = f2i32 ssa_638
								vec1 32 ssa_659 = f2i32 ssa_640
								vec4 32 ssa_660 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
								vec3 32 ssa_661 = vec3 ssa_658, ssa_659, ssa_660.w
								vec4 32 ssa_662 = txf ssa_661 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
								vec1 32 ssa_663 = ishl ssa_662.w, ssa_72
								vec1 32 ssa_664 = iadd ssa_662.z, ssa_663
								/* succs: block_86 */
								loop {
									block block_86:
									/* preds: block_85 block_89 */
									vec4 32 ssa_665 = phi block_85: ssa_662, block_89: ssa_685
									vec1 32 ssa_666 = phi block_85: ssa_664, block_89: ssa_687
									vec1 32 ssa_667 = phi block_85: ssa_638, block_89: ssa_680
									vec1 32 ssa_668 = phi block_85: ssa_640, block_89: ssa_681
									vec1 32 ssa_669 = phi block_85: ssa_30, block_89: ssa_688
									vec4 32 ssa_670 = intrinsic load_input (ssa_1) (32, 0) /* base=32 */ /* component=0 */	/* fastuidraw_uint_varying1 */
									vec1 32 ssa_671 = uge ssa_669, ssa_670.x
									/* succs: block_87 block_88 */
									if ssa_671 {
										block block_87:
										/* preds: block_86 */
										break
										/* succs: block_90 */
									} else {
										block block_88:
										/* preds: block_86 */
										/* succs: block_89 */
									}
									block block_89:
									/* preds: block_88 */
									vec1 32 ssa_672 = ffloor ssa_667
									vec1 32 ssa_673 = ffloor ssa_668
									vec1 32 ssa_674 = fadd ssa_667, -ssa_672
									vec1 32 ssa_675 = fadd ssa_668, -ssa_673
									vec1 32 ssa_676 = u2f32 ssa_665.x
									vec1 32 ssa_677 = u2f32 ssa_665.y
									vec1 32 ssa_678 = fmul ssa_676, ssa_36
									vec1 32 ssa_679 = fmul ssa_677, ssa_36
									vec1 32 ssa_680 = ffma ssa_674, ssa_36, ssa_678
									vec1 32 ssa_681 = ffma ssa_675, ssa_36, ssa_679
									vec1 32 ssa_682 = f2i32 ssa_680
									vec1 32 ssa_683 = f2i32 ssa_681
									vec3 32 ssa_684 = vec3 ssa_682, ssa_683, ssa_666
									vec4 32 ssa_685 = txf ssa_684 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
									vec1 32 ssa_686 = ishl ssa_685.w, ssa_72
									vec1 32 ssa_687 = iadd ssa_685.z, ssa_686
									vec1 32 ssa_688 = iadd ssa_669, ssa_30
									/* succs: block_86 */
								}
								block block_90:
								/* preds: block_87 */
								vec1 32 ssa_689 = ffloor ssa_667
								vec1 32 ssa_690 = ffloor ssa_668
								vec1 32 ssa_691 = fadd ssa_667, -ssa_689
								vec1 32 ssa_692 = fadd ssa_668, -ssa_690
								vec1 32 ssa_693 = u2f32 ssa_665.x
								vec1 32 ssa_694 = u2f32 ssa_665.y
								vec1 32 ssa_695 = fmul ssa_693, ssa_56
								vec1 32 ssa_696 = fmul ssa_694, ssa_56
								vec1 32 ssa_697 = ffma ssa_691, ssa_56, ssa_695
								vec1 32 ssa_698 = ffma ssa_692, ssa_56, ssa_696
								vec1 32 ssa_699 = fmin ssa_653, ssa_657
								vec1 32 ssa_700 = fge ssa_64, -ssa_652
								vec1 32 ssa_701 = fge ssa_699, ssa_37
								vec1 32 ssa_702 = iand ssa_701, ssa_700
								vec1 32 ssa_703 = fge ssa_64, -ssa_656
								vec1 32 ssa_704 = iand ssa_702, ssa_703
								/* succs: block_91 block_92 */
								if ssa_704 {
									block block_91:
									/* preds: block_90 */
									vec1 32 ssa_705 = fmul ssa_697, ssa_57
									vec1 32 ssa_706 = fmul ssa_698, ssa_57
									vec1 32 ssa_707 = u2f32 ssa_666
									vec3 32 ssa_708 = vec3 ssa_705, ssa_706, ssa_707
									vec4 32 ssa_709 = txl ssa_708 (coord), ssa_1 (lod), 1 (texture), 1 (sampler), 
									/* succs: block_93 */
								} else {
									block block_92:
									/* preds: block_90 */
									vec1 32 ssa_710 = fmul ssa_697, ssa_57
									vec1 32 ssa_711 = fmul ssa_698, ssa_57
									vec1 32 ssa_712 = u2f32 ssa_666
									vec3 32 ssa_713 = vec3 ssa_710, ssa_711, ssa_712
									vec4 32 ssa_714 = txl ssa_713 (coord), ssa_1 (lod), 2 (texture), 2 (sampler), 
									/* succs: block_93 */
								}
								block block_93:
								/* preds: block_91 block_92 */
								vec4 32 ssa_715 = phi block_91: ssa_709, block_92: ssa_714
								vec1 32 ssa_716 = fmul ssa_39, ssa_639
								vec1 32 ssa_717 = ffloor ssa_716
								vec1 32 ssa_718 = ffma -ssa_36, ssa_717, ssa_639
								vec1 32 ssa_719 = fmul ssa_718, ssa_322.w
								vec1 32 ssa_720 = fmul ssa_719, ssa_58
								vec1 32 ssa_721 = ffloor ssa_720
								vec1 32 ssa_722 = ffma -ssa_56, ssa_721, ssa_719
								vec1 32 ssa_723 = fadd ssa_59, -ssa_722
								vec1 32 ssa_724 = f2i32 ssa_639
								vec3 32 ssa_725 = vec3 ssa_724, ssa_659, ssa_660.w
								vec4 32 ssa_726 = txf ssa_725 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
								vec1 32 ssa_727 = ishl ssa_726.w, ssa_72
								vec1 32 ssa_728 = iadd ssa_726.z, ssa_727
								/* succs: block_94 */
								loop {
									block block_94:
									/* preds: block_93 block_97 */
									vec4 32 ssa_729 = phi block_93: ssa_726, block_97: ssa_748
									vec1 32 ssa_730 = phi block_93: ssa_728, block_97: ssa_750
									vec1 32 ssa_731 = phi block_93: ssa_639, block_97: ssa_743
									vec1 32 ssa_732 = phi block_93: ssa_640, block_97: ssa_744
									vec1 32 ssa_733 = phi block_93: ssa_30, block_97: ssa_751
									vec1 32 ssa_734 = uge ssa_733, ssa_670.x
									/* succs: block_95 block_96 */
									if ssa_734 {
										block block_95:
										/* preds: block_94 */
										break
										/* succs: block_98 */
									} else {
										block block_96:
										/* preds: block_94 */
										/* succs: block_97 */
									}
									block block_97:
									/* preds: block_96 */
									vec1 32 ssa_735 = ffloor ssa_731
									vec1 32 ssa_736 = ffloor ssa_732
									vec1 32 ssa_737 = fadd ssa_731, -ssa_735
									vec1 32 ssa_738 = fadd ssa_732, -ssa_736
									vec1 32 ssa_739 = u2f32 ssa_729.x
									vec1 32 ssa_740 = u2f32 ssa_729.y
									vec1 32 ssa_741 = fmul ssa_739, ssa_36
									vec1 32 ssa_742 = fmul ssa_740, ssa_36
									vec1 32 ssa_743 = ffma ssa_737, ssa_36, ssa_741
									vec1 32 ssa_744 = ffma ssa_738, ssa_36, ssa_742
									vec1 32 ssa_745 = f2i32 ssa_743
									vec1 32 ssa_746 = f2i32 ssa_744
									vec3 32 ssa_747 = vec3 ssa_745, ssa_746, ssa_730
									vec4 32 ssa_748 = txf ssa_747 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
									vec1 32 ssa_749 = ishl ssa_748.w, ssa_72
									vec1 32 ssa_750 = iadd ssa_748.z, ssa_749
									vec1 32 ssa_751 = iadd ssa_733, ssa_30
									/* succs: block_94 */
								}
								block block_98:
								/* preds: block_95 */
								vec1 32 ssa_752 = ffloor ssa_731
								vec1 32 ssa_753 = ffloor ssa_732
								vec1 32 ssa_754 = fadd ssa_731, -ssa_752
								vec1 32 ssa_755 = fadd ssa_732, -ssa_753
								vec1 32 ssa_756 = u2f32 ssa_729.x
								vec1 32 ssa_757 = u2f32 ssa_729.y
								vec1 32 ssa_758 = fmul ssa_756, ssa_56
								vec1 32 ssa_759 = fmul ssa_757, ssa_56
								vec1 32 ssa_760 = ffma ssa_754, ssa_56, ssa_758
								vec1 32 ssa_761 = ffma ssa_755, ssa_56, ssa_759
								vec1 32 ssa_762 = fmin ssa_723, ssa_657
								vec1 32 ssa_763 = fge ssa_64, -ssa_722
								vec1 32 ssa_764 = fge ssa_762, ssa_37
								vec1 32 ssa_765 = iand ssa_764, ssa_763
								vec1 32 ssa_766 = iand ssa_765, ssa_703
								/* succs: block_99 block_100 */
								if ssa_766 {
									block block_99:
									/* preds: block_98 */
									vec1 32 ssa_767 = fmul ssa_760, ssa_57
									vec1 32 ssa_768 = fmul ssa_761, ssa_57
									vec1 32 ssa_769 = u2f32 ssa_730
									vec3 32 ssa_770 = vec3 ssa_767, ssa_768, ssa_769
									vec4 32 ssa_771 = txl ssa_770 (coord), ssa_1 (lod), 1 (texture), 1 (sampler), 
									/* succs: block_101 */
								} else {
									block block_100:
									/* preds: block_98 */
									vec1 32 ssa_772 = fmul ssa_760, ssa_57
									vec1 32 ssa_773 = fmul ssa_761, ssa_57
									vec1 32 ssa_774 = u2f32 ssa_730
									vec3 32 ssa_775 = vec3 ssa_772, ssa_773, ssa_774
									vec4 32 ssa_776 = txl ssa_775 (coord), ssa_1 (lod), 2 (texture), 2 (sampler), 
									/* succs: block_101 */
								}
								block block_101:
								/* preds: block_99 block_100 */
								vec4 32 ssa_777 = phi block_99: ssa_771, block_100: ssa_776
								vec1 32 ssa_778 = fmul ssa_39, ssa_641
								vec1 32 ssa_779 = ffloor ssa_778
								vec1 32 ssa_780 = ffma -ssa_36, ssa_779, ssa_641
								vec1 32 ssa_781 = fmul ssa_780, ssa_322.w
								vec1 32 ssa_782 = fmul ssa_781, ssa_58
								vec1 32 ssa_783 = ffloor ssa_782
								vec1 32 ssa_784 = ffma -ssa_56, ssa_783, ssa_781
								vec1 32 ssa_785 = fadd ssa_59, -ssa_784
								vec1 32 ssa_786 = f2i32 ssa_641
								vec3 32 ssa_787 = vec3 ssa_658, ssa_786, ssa_660.w
								vec4 32 ssa_788 = txf ssa_787 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
								vec1 32 ssa_789 = ishl ssa_788.w, ssa_72
								vec1 32 ssa_790 = iadd ssa_788.z, ssa_789
								/* succs: block_102 */
								loop {
									block block_102:
									/* preds: block_101 block_105 */
									vec4 32 ssa_791 = phi block_101: ssa_788, block_105: ssa_810
									vec1 32 ssa_792 = phi block_101: ssa_790, block_105: ssa_812
									vec1 32 ssa_793 = phi block_101: ssa_638, block_105: ssa_805
									vec1 32 ssa_794 = phi block_101: ssa_641, block_105: ssa_806
									vec1 32 ssa_795 = phi block_101: ssa_30, block_105: ssa_813
									vec1 32 ssa_796 = uge ssa_795, ssa_670.x
									/* succs: block_103 block_104 */
									if ssa_796 {
										block block_103:
										/* preds: block_102 */
										break
										/* succs: block_106 */
									} else {
										block block_104:
										/* preds: block_102 */
										/* succs: block_105 */
									}
									block block_105:
									/* preds: block_104 */
									vec1 32 ssa_797 = ffloor ssa_793
									vec1 32 ssa_798 = ffloor ssa_794
									vec1 32 ssa_799 = fadd ssa_793, -ssa_797
									vec1 32 ssa_800 = fadd ssa_794, -ssa_798
									vec1 32 ssa_801 = u2f32 ssa_791.x
									vec1 32 ssa_802 = u2f32 ssa_791.y
									vec1 32 ssa_803 = fmul ssa_801, ssa_36
									vec1 32 ssa_804 = fmul ssa_802, ssa_36
									vec1 32 ssa_805 = ffma ssa_799, ssa_36, ssa_803
									vec1 32 ssa_806 = ffma ssa_800, ssa_36, ssa_804
									vec1 32 ssa_807 = f2i32 ssa_805
									vec1 32 ssa_808 = f2i32 ssa_806
									vec3 32 ssa_809 = vec3 ssa_807, ssa_808, ssa_792
									vec4 32 ssa_810 = txf ssa_809 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
									vec1 32 ssa_811 = ishl ssa_810.w, ssa_72
									vec1 32 ssa_812 = iadd ssa_810.z, ssa_811
									vec1 32 ssa_813 = iadd ssa_795, ssa_30
									/* succs: block_102 */
								}
								block block_106:
								/* preds: block_103 */
								vec1 32 ssa_814 = ffloor ssa_793
								vec1 32 ssa_815 = ffloor ssa_794
								vec1 32 ssa_816 = fadd ssa_793, -ssa_814
								vec1 32 ssa_817 = fadd ssa_794, -ssa_815
								vec1 32 ssa_818 = u2f32 ssa_791.x
								vec1 32 ssa_819 = u2f32 ssa_791.y
								vec1 32 ssa_820 = fmul ssa_818, ssa_56
								vec1 32 ssa_821 = fmul ssa_819, ssa_56
								vec1 32 ssa_822 = ffma ssa_816, ssa_56, ssa_820
								vec1 32 ssa_823 = ffma ssa_817, ssa_56, ssa_821
								vec1 32 ssa_824 = fmin ssa_653, ssa_785
								vec1 32 ssa_825 = fge ssa_824, ssa_37
								vec1 32 ssa_826 = iand ssa_825, ssa_700
								vec1 32 ssa_827 = fge ssa_64, -ssa_784
								vec1 32 ssa_828 = iand ssa_826, ssa_827
								/* succs: block_107 block_108 */
								if ssa_828 {
									block block_107:
									/* preds: block_106 */
									vec1 32 ssa_829 = fmul ssa_822, ssa_57
									vec1 32 ssa_830 = fmul ssa_823, ssa_57
									vec1 32 ssa_831 = u2f32 ssa_792
									vec3 32 ssa_832 = vec3 ssa_829, ssa_830, ssa_831
									vec4 32 ssa_833 = txl ssa_832 (coord), ssa_1 (lod), 1 (texture), 1 (sampler), 
									/* succs: block_109 */
								} else {
									block block_108:
									/* preds: block_106 */
									vec1 32 ssa_834 = fmul ssa_822, ssa_57
									vec1 32 ssa_835 = fmul ssa_823, ssa_57
									vec1 32 ssa_836 = u2f32 ssa_792
									vec3 32 ssa_837 = vec3 ssa_834, ssa_835, ssa_836
									vec4 32 ssa_838 = txl ssa_837 (coord), ssa_1 (lod), 2 (texture), 2 (sampler), 
									/* succs: block_109 */
								}
								block block_109:
								/* preds: block_107 block_108 */
								vec4 32 ssa_839 = phi block_107: ssa_833, block_108: ssa_838
								vec3 32 ssa_840 = vec3 ssa_724, ssa_786, ssa_660.w
								vec4 32 ssa_841 = txf ssa_840 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
								vec1 32 ssa_842 = ishl ssa_841.w, ssa_72
								vec1 32 ssa_843 = iadd ssa_841.z, ssa_842
								/* succs: block_110 */
								loop {
									block block_110:
									/* preds: block_109 block_113 */
									vec4 32 ssa_844 = phi block_109: ssa_841, block_113: ssa_863
									vec1 32 ssa_845 = phi block_109: ssa_843, block_113: ssa_865
									vec1 32 ssa_846 = phi block_109: ssa_639, block_113: ssa_858
									vec1 32 ssa_847 = phi block_109: ssa_641, block_113: ssa_859
									vec1 32 ssa_848 = phi block_109: ssa_30, block_113: ssa_866
									vec1 32 ssa_849 = uge ssa_848, ssa_670.x
									/* succs: block_111 block_112 */
									if ssa_849 {
										block block_111:
										/* preds: block_110 */
										break
										/* succs: block_114 */
									} else {
										block block_112:
										/* preds: block_110 */
										/* succs: block_113 */
									}
									block block_113:
									/* preds: block_112 */
									vec1 32 ssa_850 = ffloor ssa_846
									vec1 32 ssa_851 = ffloor ssa_847
									vec1 32 ssa_852 = fadd ssa_846, -ssa_850
									vec1 32 ssa_853 = fadd ssa_847, -ssa_851
									vec1 32 ssa_854 = u2f32 ssa_844.x
									vec1 32 ssa_855 = u2f32 ssa_844.y
									vec1 32 ssa_856 = fmul ssa_854, ssa_36
									vec1 32 ssa_857 = fmul ssa_855, ssa_36
									vec1 32 ssa_858 = ffma ssa_852, ssa_36, ssa_856
									vec1 32 ssa_859 = ffma ssa_853, ssa_36, ssa_857
									vec1 32 ssa_860 = f2i32 ssa_858
									vec1 32 ssa_861 = f2i32 ssa_859
									vec3 32 ssa_862 = vec3 ssa_860, ssa_861, ssa_845
									vec4 32 ssa_863 = txf ssa_862 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
									vec1 32 ssa_864 = ishl ssa_863.w, ssa_72
									vec1 32 ssa_865 = iadd ssa_863.z, ssa_864
									vec1 32 ssa_866 = iadd ssa_848, ssa_30
									/* succs: block_110 */
								}
								block block_114:
								/* preds: block_111 */
								vec1 32 ssa_867 = ffloor ssa_846
								vec1 32 ssa_868 = ffloor ssa_847
								vec1 32 ssa_869 = fadd ssa_846, -ssa_867
								vec1 32 ssa_870 = fadd ssa_847, -ssa_868
								vec1 32 ssa_871 = u2f32 ssa_844.x
								vec1 32 ssa_872 = u2f32 ssa_844.y
								vec1 32 ssa_873 = fmul ssa_871, ssa_56
								vec1 32 ssa_874 = fmul ssa_872, ssa_56
								vec1 32 ssa_875 = ffma ssa_869, ssa_56, ssa_873
								vec1 32 ssa_876 = ffma ssa_870, ssa_56, ssa_874
								vec1 32 ssa_877 = fmin ssa_723, ssa_785
								vec1 32 ssa_878 = fge ssa_877, ssa_37
								vec1 32 ssa_879 = iand ssa_878, ssa_763
								vec1 32 ssa_880 = iand ssa_879, ssa_827
								/* succs: block_115 block_116 */
								if ssa_880 {
									block block_115:
									/* preds: block_114 */
									vec1 32 ssa_881 = fmul ssa_875, ssa_57
									vec1 32 ssa_882 = fmul ssa_876, ssa_57
									vec1 32 ssa_883 = u2f32 ssa_845
									vec3 32 ssa_884 = vec3 ssa_881, ssa_882, ssa_883
									vec4 32 ssa_885 = txl ssa_884 (coord), ssa_1 (lod), 1 (texture), 1 (sampler), 
									/* succs: block_117 */
								} else {
									block block_116:
									/* preds: block_114 */
									vec1 32 ssa_886 = fmul ssa_875, ssa_57
									vec1 32 ssa_887 = fmul ssa_876, ssa_57
									vec1 32 ssa_888 = u2f32 ssa_845
									vec3 32 ssa_889 = vec3 ssa_886, ssa_887, ssa_888
									vec4 32 ssa_890 = txl ssa_889 (coord), ssa_1 (lod), 2 (texture), 2 (sampler), 
									/* succs: block_117 */
								}
								block block_117:
								/* preds: block_115 block_116 */
								vec4 32 ssa_891 = phi block_115: ssa_885, block_116: ssa_890
								/* succs: block_118 */
							}
							block block_118:
							/* preds: block_84 block_117 */
							vec4 32 ssa_892 = phi block_84: ssa_627, block_117: ssa_891
							vec4 32 ssa_893 = phi block_84: ssa_625, block_117: ssa_839
							vec4 32 ssa_894 = phi block_84: ssa_623, block_117: ssa_777
							vec4 32 ssa_895 = phi block_84: ssa_621, block_117: ssa_715
							vec1 32 ssa_896 = flrp ssa_895.x, ssa_894.x, ssa_554
							vec1 32 ssa_897 = flrp ssa_895.y, ssa_894.y, ssa_554
							vec1 32 ssa_898 = flrp ssa_895.z, ssa_894.z, ssa_554
							vec1 32 ssa_899 = flrp ssa_895.w, ssa_894.w, ssa_554
							vec1 32 ssa_900 = flrp ssa_893.x, ssa_892.x, ssa_554
							vec1 32 ssa_901 = flrp ssa_893.y, ssa_892.y, ssa_554
							vec1 32 ssa_902 = flrp ssa_893.z, ssa_892.z, ssa_554
							vec1 32 ssa_903 = flrp ssa_893.w, ssa_892.w, ssa_554
							vec1 32 ssa_904 = flrp ssa_896, ssa_900, ssa_557
							vec1 32 ssa_905 = flrp ssa_897, ssa_901, ssa_557
							vec1 32 ssa_906 = flrp ssa_898, ssa_902, ssa_557
							vec1 32 ssa_907 = flrp ssa_899, ssa_903, ssa_557
							vec4 32 ssa_908 = vec4 ssa_904, ssa_905, ssa_906, ssa_907
							/* succs: block_119 */
						}
						block block_119:
						/* preds: block_77 block_118 */
						vec4 32 ssa_909 = phi block_77: ssa_495, block_118: ssa_908
						/* succs: block_120 */
					}
					block block_120:
					/* preds: block_67 block_119 */
					vec4 32 ssa_910 = phi block_67: ssa_403, block_119: ssa_909
					/* succs: block_131 */
				} else {
					block block_121:
					/* preds: block_60 */
					vec1 32 ssa_911 = ine ssa_329, ssa_30
					/* succs: block_122 block_129 */
					if ssa_911 {
						block block_122:
						/* preds: block_121 */
						vec4 32 ssa_912 = intrinsic load_input (ssa_1) (39, 0) /* base=39 */ /* component=0 */	/* fastuidraw_float_flat_varying2 */
						vec1 32 ssa_913 = fadd ssa_324, ssa_912.z
						vec1 32 ssa_914 = fadd ssa_327, ssa_912.w
						vec1 32 ssa_915 = ieq ssa_331, ssa_30
						/* succs: block_123 block_124 */
						if ssa_915 {
							block block_123:
							/* preds: block_122 */
							vec1 32 ssa_916 = fceil ssa_346
							vec1 32 ssa_917 = f2i32 ssa_916
							vec1 32 ssa_918 = ishl ssa_30, ssa_917
							vec1 32 ssa_919 = i2f32 ssa_918
							vec1 32 ssa_920 = frcp ssa_919
							vec1 32 ssa_921 = fmul ssa_913, ssa_920
							vec1 32 ssa_922 = fmul ssa_914, ssa_920
							vec1 32 ssa_923 = f2i32 ssa_921
							vec1 32 ssa_924 = f2i32 ssa_922
							vec2 32 ssa_925 = vec2 ssa_923, ssa_924
							vec4 32 ssa_926 = txf ssa_925 (coord), ssa_917 (lod), 4 (texture), 4 (sampler), 
							/* succs: block_128 */
						} else {
							block block_124:
							/* preds: block_122 */
							vec1 32 ssa_927 = flt ssa_37, ssa_346
							vec1 32 ssa_928 = ieq ssa_331, ssa_31
							vec1 32 ssa_929 = ior ssa_928, ssa_927
							/* succs: block_125 block_126 */
							if ssa_929 {
								block block_125:
								/* preds: block_124 */
								vec2 32 ssa_930 = txs ssa_1 (lod), 4 (texture), 4 (sampler), 
								vec1 32 ssa_931 = i2f32 ssa_930.x
								vec1 32 ssa_932 = i2f32 ssa_930.y
								vec1 32 ssa_933 = frcp ssa_931
								vec1 32 ssa_934 = frcp ssa_932
								vec1 32 ssa_935 = fmul ssa_913, ssa_933
								vec1 32 ssa_936 = fmul ssa_914, ssa_934
								vec2 32 ssa_937 = vec2 ssa_935, ssa_936
								vec4 32 ssa_938 = txl ssa_937 (coord), ssa_346 (lod), 4 (texture), 4 (sampler), 
								/* succs: block_127 */
							} else {
								block block_126:
								/* preds: block_124 */
								vec1 32 ssa_939 = fadd ssa_913, ssa_64
								vec1 32 ssa_940 = fadd ssa_914, ssa_64
								vec1 32 ssa_941 = ffract ssa_939
								vec1 32 ssa_942 = ffract ssa_940
								vec1 32 ssa_943 = fadd ssa_939, -ssa_941
								vec1 32 ssa_944 = fadd ssa_940, -ssa_942
								vec1 32 ssa_945 = fmul ssa_941, ssa_941
								vec1 32 ssa_946 = fmul ssa_945, ssa_941
								vec1 32 ssa_947 = fadd ssa_35, -ssa_941
								vec1 32 ssa_948 = fmul ssa_947, ssa_947
								vec1 32 ssa_949 = fmul ssa_948, ssa_947
								vec1 32 ssa_950 = ffma ssa_60, ssa_946, ssa_36
								vec1 32 ssa_951 = ffma -ssa_61, ssa_945, ssa_950
								vec1 32 ssa_952 = ffma ssa_60, ssa_949, ssa_36
								vec1 32 ssa_953 = ffma -ssa_61, ssa_948, ssa_952
								vec1 32 ssa_954 = load_const (0x3e2aaaab /* 0.166667 */)
								vec1 32 ssa_955 = fmul ssa_951, ssa_954
								vec1 32 ssa_956 = fmul ssa_946, ssa_954
								vec1 32 ssa_957 = fmul ssa_942, ssa_942
								vec1 32 ssa_958 = fmul ssa_957, ssa_942
								vec1 32 ssa_959 = fadd ssa_35, -ssa_942
								vec1 32 ssa_960 = fmul ssa_959, ssa_959
								vec1 32 ssa_961 = fmul ssa_960, ssa_959
								vec1 32 ssa_962 = ffma ssa_60, ssa_958, ssa_36
								vec1 32 ssa_963 = ffma -ssa_61, ssa_957, ssa_962
								vec1 32 ssa_964 = ffma ssa_60, ssa_961, ssa_36
								vec1 32 ssa_965 = ffma -ssa_61, ssa_960, ssa_964
								vec1 32 ssa_966 = fmul ssa_963, ssa_954
								vec1 32 ssa_967 = fmul ssa_958, ssa_954
								vec1 32 ssa_968 = ffma ssa_949, ssa_954, ssa_955
								vec1 32 ssa_969 = ffma ssa_953, ssa_954, ssa_956
								vec1 32 ssa_970 = ffma ssa_961, ssa_954, ssa_966
								vec1 32 ssa_971 = ffma ssa_965, ssa_954, ssa_967
								vec1 32 ssa_972 = frcp ssa_968
								vec1 32 ssa_973 = frcp ssa_969
								vec1 32 ssa_974 = frcp ssa_970
								vec1 32 ssa_975 = frcp ssa_971
								vec1 32 ssa_976 = fadd ssa_943, ssa_64
								vec1 32 ssa_977 = ffma ssa_955, ssa_972, ssa_976
								vec1 32 ssa_978 = fadd ssa_943, ssa_65
								vec1 32 ssa_979 = ffma ssa_956, ssa_973, ssa_978
								vec1 32 ssa_980 = fadd ssa_944, ssa_64
								vec1 32 ssa_981 = ffma ssa_966, ssa_974, ssa_980
								vec1 32 ssa_982 = fadd ssa_944, ssa_65
								vec1 32 ssa_983 = ffma ssa_967, ssa_975, ssa_982
								vec2 32 ssa_984 = txs ssa_1 (lod), 4 (texture), 4 (sampler), 
								vec1 32 ssa_985 = i2f32 ssa_984.x
								vec1 32 ssa_986 = i2f32 ssa_984.y
								vec1 32 ssa_987 = frcp ssa_985
								vec1 32 ssa_988 = frcp ssa_986
								vec1 32 ssa_989 = fmul ssa_977, ssa_987
								vec1 32 ssa_990 = fmul ssa_979, ssa_988
								vec1 32 ssa_991 = fmul ssa_981, ssa_987
								vec1 32 ssa_992 = fmul ssa_983, ssa_988
								vec1 32 ssa_993 = fadd ssa_968, ssa_969
								vec1 32 ssa_994 = frcp ssa_993
								vec1 32 ssa_995 = fmul ssa_969, ssa_994
								vec1 32 ssa_996 = fadd ssa_970, ssa_971
								vec1 32 ssa_997 = frcp ssa_996
								vec1 32 ssa_998 = fmul ssa_971, ssa_997
								vec2 32 ssa_999 = vec2 ssa_989, ssa_991
								vec4 32 ssa_1000 = txl ssa_999 (coord), ssa_1 (lod), 4 (texture), 4 (sampler), 
								vec2 32 ssa_1001 = vec2 ssa_990, ssa_991
								vec4 32 ssa_1002 = txl ssa_1001 (coord), ssa_1 (lod), 4 (texture), 4 (sampler), 
								vec1 32 ssa_1003 = flrp ssa_1000.x, ssa_1002.x, ssa_995
								vec1 32 ssa_1004 = flrp ssa_1000.y, ssa_1002.y, ssa_995
								vec1 32 ssa_1005 = flrp ssa_1000.z, ssa_1002.z, ssa_995
								vec1 32 ssa_1006 = flrp ssa_1000.w, ssa_1002.w, ssa_995
								vec2 32 ssa_1007 = vec2 ssa_989, ssa_992
								vec4 32 ssa_1008 = txl ssa_1007 (coord), ssa_1 (lod), 4 (texture), 4 (sampler), 
								vec2 32 ssa_1009 = vec2 ssa_990, ssa_992
								vec4 32 ssa_1010 = txl ssa_1009 (coord), ssa_1 (lod), 4 (texture), 4 (sampler), 
								vec1 32 ssa_1011 = flrp ssa_1008.x, ssa_1010.x, ssa_995
								vec1 32 ssa_1012 = flrp ssa_1008.y, ssa_1010.y, ssa_995
								vec1 32 ssa_1013 = flrp ssa_1008.z, ssa_1010.z, ssa_995
								vec1 32 ssa_1014 = flrp ssa_1008.w, ssa_1010.w, ssa_995
								vec1 32 ssa_1015 = flrp ssa_1003, ssa_1011, ssa_998
								vec1 32 ssa_1016 = flrp ssa_1004, ssa_1012, ssa_998
								vec1 32 ssa_1017 = flrp ssa_1005, ssa_1013, ssa_998
								vec1 32 ssa_1018 = flrp ssa_1006, ssa_1014, ssa_998
								vec4 32 ssa_1019 = vec4 ssa_1015, ssa_1016, ssa_1017, ssa_1018
								/* succs: block_127 */
							}
							block block_127:
							/* preds: block_125 block_126 */
							vec4 32 ssa_1020 = phi block_125: ssa_938, block_126: ssa_1019
							/* succs: block_128 */
						}
						block block_128:
						/* preds: block_123 block_127 */
						vec4 32 ssa_1021 = phi block_123: ssa_926, block_127: ssa_1020
						/* succs: block_130 */
					} else {
						block block_129:
						/* preds: block_121 */
						/* succs: block_130 */
					}
					block block_130:
					/* preds: block_128 block_129 */
					vec4 32 ssa_1022 = phi block_129: ssa_66, block_128: ssa_1021
					/* succs: block_131 */
				}
				block block_131:
				/* preds: block_120 block_130 */
				vec4 32 ssa_1023 = phi block_120: ssa_910, block_130: ssa_1022
				vec1 32 ssa_1024 = iand ssa_92.y, ssa_67
				vec1 32 ssa_1025 = ieq ssa_1024, ssa_1
				/* succs: block_132 block_133 */
				if ssa_1025 {
					block block_132:
					/* preds: block_131 */
					vec1 32 ssa_1026 = fmul ssa_1023.x, ssa_1023.w
					vec1 32 ssa_1027 = fmul ssa_1023.y, ssa_1023.w
					vec1 32 ssa_1028 = fmul ssa_1023.z, ssa_1023.w
					vec4 32 ssa_1029 = vec4 ssa_1026, ssa_1027, ssa_1028, ssa_1023.w
					/* succs: block_134 */
				} else {
					block block_133:
					/* preds: block_131 */
					/* succs: block_134 */
				}
				block block_134:
				/* preds: block_132 block_133 */
				vec4 32 ssa_1030 = phi block_132: ssa_1029, block_133: ssa_1023
				vec1 32 ssa_1031 = fmul ssa_316, ssa_1030.x
				vec1 32 ssa_1032 = fmul ssa_317, ssa_1030.y
				vec1 32 ssa_1033 = fmul ssa_318, ssa_1030.z
				vec1 32 ssa_1034 = fmul ssa_315, ssa_1030.w
				/* succs: block_136 */
			} else {
				block block_135:
				/* preds: block_56 */
				/* succs: block_136 */
			}
			block block_136:
			/* preds: block_134 block_135 */
			vec1 32 ssa_1035 = phi block_134: ssa_1031, block_135: ssa_316
			vec1 32 ssa_1036 = phi block_134: ssa_1032, block_135: ssa_317
			vec1 32 ssa_1037 = phi block_134: ssa_1033, block_135: ssa_318
			vec1 32 ssa_1038 = phi block_134: ssa_1034, block_135: ssa_315
			/* succs: block_138 */
		} else {
			block block_137:
			/* preds: block_1 */
			/* succs: block_138 */
		}
		block block_138:
		/* preds: block_136 block_137 */
		vec1 32 ssa_1039 = phi block_136: ssa_1035, block_137: ssa_21
		vec1 32 ssa_1040 = phi block_136: ssa_1036, block_137: ssa_20
		vec1 32 ssa_1041 = phi block_136: ssa_1037, block_137: ssa_19
		vec1 32 ssa_1042 = phi block_136: ssa_1038, block_137: ssa_18
		vec4 32 ssa_1043 = intrinsic load_input (ssa_1) (32, 0) /* base=32 */ /* component=0 */	/* fastuidraw_uint_varying1 */
		vec1 32 ssa_1044 = ult ssa_1043.y, ssa_68
		vec1 32 ssa_1045 = uge ssa_1043.y, ssa_31
		vec1 32 ssa_1046 = iand ssa_1045, ssa_1044
		/* succs: block_139 block_140 */
		if ssa_1046 {
			block block_139:
			/* preds: block_138 */
			vec4 32 ssa_1047 = intrinsic load_uniform (ssa_1) (0, 16) /* base=0 */ /* range=16 */	/* fastuidraw_painterStore */
			vec4 32 ssa_1048 = load_const (0x3f000000 /* 0.500000 */, 0x3f000000 /* 0.500000 */, 0x00000000 /* 0.000000 */, 0x00000000 /* 0.000000 */)
			vec1 32 ssa_1049 = fadd ssa_4.x, ssa_1048.x
			vec1 32 ssa_1050 = fadd ssa_4.y, ssa_1048.y
			vec1 32 ssa_1051 = ffma ssa_1050, ssa_1047.x, ssa_1047.y
			vec1 32 ssa_1052 = f2i32 ssa_1049
			vec1 32 ssa_1053 = f2i32 ssa_1051
			vec1 32 ssa_1054 = iadd ssa_1052, ssa_96
			vec1 32 ssa_1055 = iadd ssa_1053, ssa_97
			vec2 32 ssa_1056 = vec2 ssa_1054, ssa_1055
			vec4 32 ssa_1057 = txf ssa_1056 (coord), ssa_1 (lod), 12 (texture), 12 (sampler), 
			vec1 32 ssa_1058 = imov ssa_1057.x
			/* succs: block_410 */
		} else {
			block block_140:
			/* preds: block_138 */
			vec1 32 ssa_1059 = ult ssa_1043.y, ssa_29
			vec1 32 ssa_1060 = uge ssa_1043.y, ssa_52
			vec1 32 ssa_1061 = iand ssa_1060, ssa_1059
			/* succs: block_141 block_142 */
			if ssa_1061 {
				block block_141:
				/* preds: block_140 */
				vec4 32 ssa_1062 = intrinsic load_uniform (ssa_1) (0, 16) /* base=0 */ /* range=16 */	/* fastuidraw_painterStore */
				vec4 32 ssa_1063 = load_const (0x3f000000 /* 0.500000 */, 0x3f000000 /* 0.500000 */, 0x00000000 /* 0.000000 */, 0x00000000 /* 0.000000 */)
				vec1 32 ssa_1064 = fadd ssa_4.x, ssa_1063.x
				vec1 32 ssa_1065 = fadd ssa_4.y, ssa_1063.y
				vec1 32 ssa_1066 = ffma ssa_1065, ssa_1062.x, ssa_1062.y
				vec1 32 ssa_1067 = f2i32 ssa_1064
				vec1 32 ssa_1068 = f2i32 ssa_1066
				vec1 32 ssa_1069 = iadd ssa_1067, ssa_96
				vec1 32 ssa_1070 = iadd ssa_1068, ssa_97
				vec2 32 ssa_1071 = vec2 ssa_1069, ssa_1070
				vec4 32 ssa_1072 = txf ssa_1071 (coord), ssa_1 (lod), 12 (texture), 12 (sampler), 
				vec1 32 ssa_1073 = imov ssa_1072.x
				/* succs: block_409 */
			} else {
				block block_142:
				/* preds: block_140 */
				vec1 32 ssa_1074 = ine ssa_1043.y, ssa_30
				/* succs: block_143 block_407 */
				if ssa_1074 {
					block block_143:
					/* preds: block_142 */
					vec1 32 ssa_1075 = ine ssa_1043.y, ssa_69
					/* succs: block_144 block_405 */
					if ssa_1075 {
						block block_144:
						/* preds: block_143 */
						vec1 32 ssa_1076 = ieq ssa_1043.y, ssa_50
						/* succs: block_145 block_146 */
						if ssa_1076 {
							block block_145:
							/* preds: block_144 */
							vec4 32 ssa_1077 = intrinsic load_uniform (ssa_1) (0, 16) /* base=0 */ /* range=16 */	/* fastuidraw_painterStore */
							vec4 32 ssa_1078 = load_const (0x3f000000 /* 0.500000 */, 0x3f000000 /* 0.500000 */, 0x00000000 /* 0.000000 */, 0x00000000 /* 0.000000 */)
							vec1 32 ssa_1079 = fadd ssa_4.x, ssa_1078.x
							vec1 32 ssa_1080 = fadd ssa_4.y, ssa_1078.y
							vec1 32 ssa_1081 = ffma ssa_1080, ssa_1077.x, ssa_1077.y
							vec1 32 ssa_1082 = f2i32 ssa_1079
							vec1 32 ssa_1083 = f2i32 ssa_1081
							vec1 32 ssa_1084 = iadd ssa_1082, ssa_96
							vec1 32 ssa_1085 = iadd ssa_1083, ssa_97
							vec2 32 ssa_1086 = vec2 ssa_1084, ssa_1085
							vec4 32 ssa_1087 = txf ssa_1086 (coord), ssa_1 (lod), 12 (texture), 12 (sampler), 
							vec1 32 ssa_1088 = imov ssa_1087.x
							/* succs: block_404 */
						} else {
							block block_146:
							/* preds: block_144 */
							vec1 32 ssa_1089 = ieq ssa_1043.y, ssa_70
							/* succs: block_147 block_172 */
							if ssa_1089 {
								block block_147:
								/* preds: block_146 */
								vec1 32 ssa_1090 = f2u32 ssa_5.w
								vec1 32 ssa_1091 = f2u32 ssa_5.z
								vec1 32 ssa_1092 = fadd ssa_5.x, ssa_37
								vec1 32 ssa_1093 = fadd ssa_5.y, ssa_37
								vec1 32 ssa_1094 = f2i32 ssa_1092
								vec1 32 ssa_1095 = f2i32 ssa_1093
								vec1 32 ssa_1096 = iadd ssa_1094, ssa_25
								vec1 32 ssa_1097 = iadd ssa_1095, ssa_25
								vec1 32 ssa_1098 = i2f32 ssa_1094
								vec1 32 ssa_1099 = i2f32 ssa_1095
								vec1 32 ssa_1100 = fadd ssa_1092, -ssa_1098
								vec1 32 ssa_1101 = fadd ssa_1093, -ssa_1099
								vec1 32 ssa_1102 = imin ssa_1096, ssa_1097
								vec1 32 ssa_1103 = ige ssa_1102, ssa_1
								/* succs: block_148 block_152 */
								if ssa_1103 {
									block block_148:
									/* preds: block_147 */
									vec1 32 ssa_1104 = uge ssa_1097, ssa_1091
									vec1 32 ssa_1105 = uge ssa_1096, ssa_1090
									vec1 32 ssa_1106 = ior ssa_1105, ssa_1104
									/* succs: block_149 block_150 */
									if ssa_1106 {
										block block_149:
										/* preds: block_148 */
										/* succs: block_151 */
									} else {
										block block_150:
										/* preds: block_148 */
										vec4 32 ssa_1107 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
										vec1 32 ssa_1108 = ushr ssa_1096, ssa_30
										vec1 32 ssa_1109 = iadd ssa_1107.x, ssa_1108
										vec1 32 ssa_1110 = ushr ssa_1097, ssa_30
										vec1 32 ssa_1111 = iadd ssa_1090, ssa_30
										vec1 32 ssa_1112 = ushr ssa_1111, ssa_30
										vec1 32 ssa_1113 = imul ssa_1110, ssa_1112
										vec1 32 ssa_1114 = iadd ssa_1109, ssa_1113
										vec1 32 ssa_1115 = ishl ssa_1114, ssa_31
										vec1 32 ssa_1116 = intrinsic load_ssbo (ssa_30, ssa_1115) ()
										vec1 32 ssa_1117 = iand ssa_1096, ssa_30
										vec1 32 ssa_1118 = ine ssa_1117, ssa_1
										vec1 32 ssa_1119 = bcsel ssa_1118, ssa_72, ssa_1
										vec1 32 ssa_1120 = iand ssa_1097, ssa_30
										vec1 32 ssa_1121 = ine ssa_1120, ssa_1
										vec1 32 ssa_1122 = bcsel ssa_1121, ssa_23, ssa_1
										vec1 32 ssa_1123 = iadd ssa_1119, ssa_1122
										vec1 32 ssa_1124 = iadd ssa_73, -ssa_1123
										vec1 32 ssa_1125 = ishl ssa_1116, ssa_1124
										vec1 32 ssa_1126 = extract_u8 ssa_1125, ssa_32
										/* succs: block_151 */
									}
									block block_151:
									/* preds: block_149 block_150 */
									vec1 32 ssa_1127 = phi block_149: ssa_1, block_150: ssa_1126
									/* succs: block_153 */
								} else {
									block block_152:
									/* preds: block_147 */
									/* succs: block_153 */
								}
								block block_153:
								/* preds: block_151 block_152 */
								vec1 32 ssa_1128 = phi block_152: ssa_1, block_151: ssa_1127
								vec1 32 ssa_1129 = imin ssa_1096, ssa_1095
								vec1 32 ssa_1130 = ige ssa_1129, ssa_1
								/* succs: block_154 block_158 */
								if ssa_1130 {
									block block_154:
									/* preds: block_153 */
									vec1 32 ssa_1131 = uge ssa_1095, ssa_1091
									vec1 32 ssa_1132 = uge ssa_1096, ssa_1090
									vec1 32 ssa_1133 = ior ssa_1132, ssa_1131
									/* succs: block_155 block_156 */
									if ssa_1133 {
										block block_155:
										/* preds: block_154 */
										/* succs: block_157 */
									} else {
										block block_156:
										/* preds: block_154 */
										vec4 32 ssa_1134 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
										vec1 32 ssa_1135 = ushr ssa_1096, ssa_30
										vec1 32 ssa_1136 = iadd ssa_1134.x, ssa_1135
										vec1 32 ssa_1137 = ushr ssa_1095, ssa_30
										vec1 32 ssa_1138 = iadd ssa_1090, ssa_30
										vec1 32 ssa_1139 = ushr ssa_1138, ssa_30
										vec1 32 ssa_1140 = imul ssa_1137, ssa_1139
										vec1 32 ssa_1141 = iadd ssa_1136, ssa_1140
										vec1 32 ssa_1142 = ishl ssa_1141, ssa_31
										vec1 32 ssa_1143 = intrinsic load_ssbo (ssa_30, ssa_1142) ()
										vec1 32 ssa_1144 = iand ssa_1096, ssa_30
										vec1 32 ssa_1145 = ine ssa_1144, ssa_1
										vec1 32 ssa_1146 = bcsel ssa_1145, ssa_72, ssa_1
										vec1 32 ssa_1147 = iand ssa_1095, ssa_30
										vec1 32 ssa_1148 = ine ssa_1147, ssa_1
										vec1 32 ssa_1149 = bcsel ssa_1148, ssa_23, ssa_1
										vec1 32 ssa_1150 = iadd ssa_1146, ssa_1149
										vec1 32 ssa_1151 = iadd ssa_73, -ssa_1150
										vec1 32 ssa_1152 = ishl ssa_1143, ssa_1151
										vec1 32 ssa_1153 = extract_u8 ssa_1152, ssa_32
										/* succs: block_157 */
									}
									block block_157:
									/* preds: block_155 block_156 */
									vec1 32 ssa_1154 = phi block_155: ssa_1, block_156: ssa_1153
									/* succs: block_159 */
								} else {
									block block_158:
									/* preds: block_153 */
									/* succs: block_159 */
								}
								block block_159:
								/* preds: block_157 block_158 */
								vec1 32 ssa_1155 = phi block_158: ssa_1, block_157: ssa_1154
								vec1 32 ssa_1156 = imin ssa_1094, ssa_1097
								vec1 32 ssa_1157 = ige ssa_1156, ssa_1
								/* succs: block_160 block_164 */
								if ssa_1157 {
									block block_160:
									/* preds: block_159 */
									vec1 32 ssa_1158 = uge ssa_1097, ssa_1091
									vec1 32 ssa_1159 = uge ssa_1094, ssa_1090
									vec1 32 ssa_1160 = ior ssa_1159, ssa_1158
									/* succs: block_161 block_162 */
									if ssa_1160 {
										block block_161:
										/* preds: block_160 */
										/* succs: block_163 */
									} else {
										block block_162:
										/* preds: block_160 */
										vec4 32 ssa_1161 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
										vec1 32 ssa_1162 = ushr ssa_1094, ssa_30
										vec1 32 ssa_1163 = iadd ssa_1161.x, ssa_1162
										vec1 32 ssa_1164 = ushr ssa_1097, ssa_30
										vec1 32 ssa_1165 = iadd ssa_1090, ssa_30
										vec1 32 ssa_1166 = ushr ssa_1165, ssa_30
										vec1 32 ssa_1167 = imul ssa_1164, ssa_1166
										vec1 32 ssa_1168 = iadd ssa_1163, ssa_1167
										vec1 32 ssa_1169 = ishl ssa_1168, ssa_31
										vec1 32 ssa_1170 = intrinsic load_ssbo (ssa_30, ssa_1169) ()
										vec1 32 ssa_1171 = iand ssa_1094, ssa_30
										vec1 32 ssa_1172 = ine ssa_1171, ssa_1
										vec1 32 ssa_1173 = bcsel ssa_1172, ssa_72, ssa_1
										vec1 32 ssa_1174 = iand ssa_1097, ssa_30
										vec1 32 ssa_1175 = ine ssa_1174, ssa_1
										vec1 32 ssa_1176 = bcsel ssa_1175, ssa_23, ssa_1
										vec1 32 ssa_1177 = iadd ssa_1173, ssa_1176
										vec1 32 ssa_1178 = iadd ssa_73, -ssa_1177
										vec1 32 ssa_1179 = ishl ssa_1170, ssa_1178
										vec1 32 ssa_1180 = extract_u8 ssa_1179, ssa_32
										/* succs: block_163 */
									}
									block block_163:
									/* preds: block_161 block_162 */
									vec1 32 ssa_1181 = phi block_161: ssa_1, block_162: ssa_1180
									/* succs: block_165 */
								} else {
									block block_164:
									/* preds: block_159 */
									/* succs: block_165 */
								}
								block block_165:
								/* preds: block_163 block_164 */
								vec1 32 ssa_1182 = phi block_164: ssa_1, block_163: ssa_1181
								vec1 32 ssa_1183 = imin ssa_1094, ssa_1095
								vec1 32 ssa_1184 = ige ssa_1183, ssa_1
								/* succs: block_166 block_170 */
								if ssa_1184 {
									block block_166:
									/* preds: block_165 */
									vec1 32 ssa_1185 = uge ssa_1095, ssa_1091
									vec1 32 ssa_1186 = uge ssa_1094, ssa_1090
									vec1 32 ssa_1187 = ior ssa_1186, ssa_1185
									/* succs: block_167 block_168 */
									if ssa_1187 {
										block block_167:
										/* preds: block_166 */
										/* succs: block_169 */
									} else {
										block block_168:
										/* preds: block_166 */
										vec4 32 ssa_1188 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
										vec1 32 ssa_1189 = ushr ssa_1094, ssa_30
										vec1 32 ssa_1190 = iadd ssa_1188.x, ssa_1189
										vec1 32 ssa_1191 = ushr ssa_1095, ssa_30
										vec1 32 ssa_1192 = iadd ssa_1090, ssa_30
										vec1 32 ssa_1193 = ushr ssa_1192, ssa_30
										vec1 32 ssa_1194 = imul ssa_1191, ssa_1193
										vec1 32 ssa_1195 = iadd ssa_1190, ssa_1194
										vec1 32 ssa_1196 = ishl ssa_1195, ssa_31
										vec1 32 ssa_1197 = intrinsic load_ssbo (ssa_30, ssa_1196) ()
										vec1 32 ssa_1198 = iand ssa_1094, ssa_30
										vec1 32 ssa_1199 = ine ssa_1198, ssa_1
										vec1 32 ssa_1200 = bcsel ssa_1199, ssa_72, ssa_1
										vec1 32 ssa_1201 = iand ssa_1095, ssa_30
										vec1 32 ssa_1202 = ine ssa_1201, ssa_1
										vec1 32 ssa_1203 = bcsel ssa_1202, ssa_23, ssa_1
										vec1 32 ssa_1204 = iadd ssa_1200, ssa_1203
										vec1 32 ssa_1205 = iadd ssa_73, -ssa_1204
										vec1 32 ssa_1206 = ishl ssa_1197, ssa_1205
										vec1 32 ssa_1207 = extract_u8 ssa_1206, ssa_32
										/* succs: block_169 */
									}
									block block_169:
									/* preds: block_167 block_168 */
									vec1 32 ssa_1208 = phi block_167: ssa_1, block_168: ssa_1207
									/* succs: block_171 */
								} else {
									block block_170:
									/* preds: block_165 */
									/* succs: block_171 */
								}
								block block_171:
								/* preds: block_169 block_170 */
								vec1 32 ssa_1209 = phi block_170: ssa_1, block_169: ssa_1208
								vec1 32 ssa_1210 = u2f32 ssa_1128
								vec1 32 ssa_1211 = u2f32 ssa_1155
								vec1 32 ssa_1212 = flrp ssa_1210, ssa_1211, ssa_1101
								vec1 32 ssa_1213 = u2f32 ssa_1182
								vec1 32 ssa_1214 = u2f32 ssa_1209
								vec1 32 ssa_1215 = flrp ssa_1213, ssa_1214, ssa_1101
								vec1 32 ssa_1216 = flrp ssa_1212, ssa_1215, ssa_1100
								vec1 32 ssa_1217 = load_const (0x3b808081 /* 0.003922 */)
								vec1 32 ssa_1218 = fmul ssa_1216, ssa_1217
								/* succs: block_403 */
							} else {
								block block_172:
								/* preds: block_146 */
								vec1 32 ssa_1219 = ieq ssa_1043.y, ssa_34
								/* succs: block_173 block_198 */
								if ssa_1219 {
									block block_173:
									/* preds: block_172 */
									vec1 32 ssa_1220 = f2u32 ssa_5.w
									vec1 32 ssa_1221 = f2u32 ssa_5.z
									vec1 32 ssa_1222 = fadd ssa_5.x, ssa_37
									vec1 32 ssa_1223 = fadd ssa_5.y, ssa_37
									vec1 32 ssa_1224 = f2i32 ssa_1222
									vec1 32 ssa_1225 = f2i32 ssa_1223
									vec1 32 ssa_1226 = iadd ssa_1224, ssa_25
									vec1 32 ssa_1227 = iadd ssa_1225, ssa_25
									vec1 32 ssa_1228 = i2f32 ssa_1224
									vec1 32 ssa_1229 = i2f32 ssa_1225
									vec1 32 ssa_1230 = fadd ssa_1222, -ssa_1228
									vec1 32 ssa_1231 = fadd ssa_1223, -ssa_1229
									vec1 32 ssa_1232 = imin ssa_1226, ssa_1227
									vec1 32 ssa_1233 = ige ssa_1232, ssa_1
									/* succs: block_174 block_178 */
									if ssa_1233 {
										block block_174:
										/* preds: block_173 */
										vec1 32 ssa_1234 = uge ssa_1227, ssa_1221
										vec1 32 ssa_1235 = uge ssa_1226, ssa_1220
										vec1 32 ssa_1236 = ior ssa_1235, ssa_1234
										/* succs: block_175 block_176 */
										if ssa_1236 {
											block block_175:
											/* preds: block_174 */
											/* succs: block_177 */
										} else {
											block block_176:
											/* preds: block_174 */
											vec4 32 ssa_1237 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
											vec1 32 ssa_1238 = ushr ssa_1226, ssa_30
											vec1 32 ssa_1239 = iadd ssa_1237.x, ssa_1238
											vec1 32 ssa_1240 = ushr ssa_1227, ssa_30
											vec1 32 ssa_1241 = iadd ssa_1220, ssa_30
											vec1 32 ssa_1242 = ushr ssa_1241, ssa_30
											vec1 32 ssa_1243 = imul ssa_1240, ssa_1242
											vec1 32 ssa_1244 = iadd ssa_1239, ssa_1243
											vec1 32 ssa_1245 = ishl ssa_1244, ssa_31
											vec1 32 ssa_1246 = intrinsic load_ssbo (ssa_30, ssa_1245) ()
											vec1 32 ssa_1247 = iand ssa_1226, ssa_30
											vec1 32 ssa_1248 = ine ssa_1247, ssa_1
											vec1 32 ssa_1249 = bcsel ssa_1248, ssa_72, ssa_1
											vec1 32 ssa_1250 = iand ssa_1227, ssa_30
											vec1 32 ssa_1251 = ine ssa_1250, ssa_1
											vec1 32 ssa_1252 = bcsel ssa_1251, ssa_23, ssa_1
											vec1 32 ssa_1253 = iadd ssa_1249, ssa_1252
											vec1 32 ssa_1254 = iadd ssa_73, -ssa_1253
											vec1 32 ssa_1255 = ishl ssa_1246, ssa_1254
											vec1 32 ssa_1256 = extract_u8 ssa_1255, ssa_32
											/* succs: block_177 */
										}
										block block_177:
										/* preds: block_175 block_176 */
										vec1 32 ssa_1257 = phi block_175: ssa_1, block_176: ssa_1256
										/* succs: block_179 */
									} else {
										block block_178:
										/* preds: block_173 */
										/* succs: block_179 */
									}
									block block_179:
									/* preds: block_177 block_178 */
									vec1 32 ssa_1258 = phi block_178: ssa_1, block_177: ssa_1257
									vec1 32 ssa_1259 = imin ssa_1226, ssa_1225
									vec1 32 ssa_1260 = ige ssa_1259, ssa_1
									/* succs: block_180 block_184 */
									if ssa_1260 {
										block block_180:
										/* preds: block_179 */
										vec1 32 ssa_1261 = uge ssa_1225, ssa_1221
										vec1 32 ssa_1262 = uge ssa_1226, ssa_1220
										vec1 32 ssa_1263 = ior ssa_1262, ssa_1261
										/* succs: block_181 block_182 */
										if ssa_1263 {
											block block_181:
											/* preds: block_180 */
											/* succs: block_183 */
										} else {
											block block_182:
											/* preds: block_180 */
											vec4 32 ssa_1264 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
											vec1 32 ssa_1265 = ushr ssa_1226, ssa_30
											vec1 32 ssa_1266 = iadd ssa_1264.x, ssa_1265
											vec1 32 ssa_1267 = ushr ssa_1225, ssa_30
											vec1 32 ssa_1268 = iadd ssa_1220, ssa_30
											vec1 32 ssa_1269 = ushr ssa_1268, ssa_30
											vec1 32 ssa_1270 = imul ssa_1267, ssa_1269
											vec1 32 ssa_1271 = iadd ssa_1266, ssa_1270
											vec1 32 ssa_1272 = ishl ssa_1271, ssa_31
											vec1 32 ssa_1273 = intrinsic load_ssbo (ssa_30, ssa_1272) ()
											vec1 32 ssa_1274 = iand ssa_1226, ssa_30
											vec1 32 ssa_1275 = ine ssa_1274, ssa_1
											vec1 32 ssa_1276 = bcsel ssa_1275, ssa_72, ssa_1
											vec1 32 ssa_1277 = iand ssa_1225, ssa_30
											vec1 32 ssa_1278 = ine ssa_1277, ssa_1
											vec1 32 ssa_1279 = bcsel ssa_1278, ssa_23, ssa_1
											vec1 32 ssa_1280 = iadd ssa_1276, ssa_1279
											vec1 32 ssa_1281 = iadd ssa_73, -ssa_1280
											vec1 32 ssa_1282 = ishl ssa_1273, ssa_1281
											vec1 32 ssa_1283 = extract_u8 ssa_1282, ssa_32
											/* succs: block_183 */
										}
										block block_183:
										/* preds: block_181 block_182 */
										vec1 32 ssa_1284 = phi block_181: ssa_1, block_182: ssa_1283
										/* succs: block_185 */
									} else {
										block block_184:
										/* preds: block_179 */
										/* succs: block_185 */
									}
									block block_185:
									/* preds: block_183 block_184 */
									vec1 32 ssa_1285 = phi block_184: ssa_1, block_183: ssa_1284
									vec1 32 ssa_1286 = imin ssa_1224, ssa_1227
									vec1 32 ssa_1287 = ige ssa_1286, ssa_1
									/* succs: block_186 block_190 */
									if ssa_1287 {
										block block_186:
										/* preds: block_185 */
										vec1 32 ssa_1288 = uge ssa_1227, ssa_1221
										vec1 32 ssa_1289 = uge ssa_1224, ssa_1220
										vec1 32 ssa_1290 = ior ssa_1289, ssa_1288
										/* succs: block_187 block_188 */
										if ssa_1290 {
											block block_187:
											/* preds: block_186 */
											/* succs: block_189 */
										} else {
											block block_188:
											/* preds: block_186 */
											vec4 32 ssa_1291 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
											vec1 32 ssa_1292 = ushr ssa_1224, ssa_30
											vec1 32 ssa_1293 = iadd ssa_1291.x, ssa_1292
											vec1 32 ssa_1294 = ushr ssa_1227, ssa_30
											vec1 32 ssa_1295 = iadd ssa_1220, ssa_30
											vec1 32 ssa_1296 = ushr ssa_1295, ssa_30
											vec1 32 ssa_1297 = imul ssa_1294, ssa_1296
											vec1 32 ssa_1298 = iadd ssa_1293, ssa_1297
											vec1 32 ssa_1299 = ishl ssa_1298, ssa_31
											vec1 32 ssa_1300 = intrinsic load_ssbo (ssa_30, ssa_1299) ()
											vec1 32 ssa_1301 = iand ssa_1224, ssa_30
											vec1 32 ssa_1302 = ine ssa_1301, ssa_1
											vec1 32 ssa_1303 = bcsel ssa_1302, ssa_72, ssa_1
											vec1 32 ssa_1304 = iand ssa_1227, ssa_30
											vec1 32 ssa_1305 = ine ssa_1304, ssa_1
											vec1 32 ssa_1306 = bcsel ssa_1305, ssa_23, ssa_1
											vec1 32 ssa_1307 = iadd ssa_1303, ssa_1306
											vec1 32 ssa_1308 = iadd ssa_73, -ssa_1307
											vec1 32 ssa_1309 = ishl ssa_1300, ssa_1308
											vec1 32 ssa_1310 = extract_u8 ssa_1309, ssa_32
											/* succs: block_189 */
										}
										block block_189:
										/* preds: block_187 block_188 */
										vec1 32 ssa_1311 = phi block_187: ssa_1, block_188: ssa_1310
										/* succs: block_191 */
									} else {
										block block_190:
										/* preds: block_185 */
										/* succs: block_191 */
									}
									block block_191:
									/* preds: block_189 block_190 */
									vec1 32 ssa_1312 = phi block_190: ssa_1, block_189: ssa_1311
									vec1 32 ssa_1313 = imin ssa_1224, ssa_1225
									vec1 32 ssa_1314 = ige ssa_1313, ssa_1
									/* succs: block_192 block_196 */
									if ssa_1314 {
										block block_192:
										/* preds: block_191 */
										vec1 32 ssa_1315 = uge ssa_1225, ssa_1221
										vec1 32 ssa_1316 = uge ssa_1224, ssa_1220
										vec1 32 ssa_1317 = ior ssa_1316, ssa_1315
										/* succs: block_193 block_194 */
										if ssa_1317 {
											block block_193:
											/* preds: block_192 */
											/* succs: block_195 */
										} else {
											block block_194:
											/* preds: block_192 */
											vec4 32 ssa_1318 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
											vec1 32 ssa_1319 = ushr ssa_1224, ssa_30
											vec1 32 ssa_1320 = iadd ssa_1318.x, ssa_1319
											vec1 32 ssa_1321 = ushr ssa_1225, ssa_30
											vec1 32 ssa_1322 = iadd ssa_1220, ssa_30
											vec1 32 ssa_1323 = ushr ssa_1322, ssa_30
											vec1 32 ssa_1324 = imul ssa_1321, ssa_1323
											vec1 32 ssa_1325 = iadd ssa_1320, ssa_1324
											vec1 32 ssa_1326 = ishl ssa_1325, ssa_31
											vec1 32 ssa_1327 = intrinsic load_ssbo (ssa_30, ssa_1326) ()
											vec1 32 ssa_1328 = iand ssa_1224, ssa_30
											vec1 32 ssa_1329 = ine ssa_1328, ssa_1
											vec1 32 ssa_1330 = bcsel ssa_1329, ssa_72, ssa_1
											vec1 32 ssa_1331 = iand ssa_1225, ssa_30
											vec1 32 ssa_1332 = ine ssa_1331, ssa_1
											vec1 32 ssa_1333 = bcsel ssa_1332, ssa_23, ssa_1
											vec1 32 ssa_1334 = iadd ssa_1330, ssa_1333
											vec1 32 ssa_1335 = iadd ssa_73, -ssa_1334
											vec1 32 ssa_1336 = ishl ssa_1327, ssa_1335
											vec1 32 ssa_1337 = extract_u8 ssa_1336, ssa_32
											/* succs: block_195 */
										}
										block block_195:
										/* preds: block_193 block_194 */
										vec1 32 ssa_1338 = phi block_193: ssa_1, block_194: ssa_1337
										/* succs: block_197 */
									} else {
										block block_196:
										/* preds: block_191 */
										/* succs: block_197 */
									}
									block block_197:
									/* preds: block_195 block_196 */
									vec1 32 ssa_1339 = phi block_196: ssa_1, block_195: ssa_1338
									vec1 32 ssa_1340 = u2f32 ssa_1258
									vec1 32 ssa_1341 = u2f32 ssa_1285
									vec1 32 ssa_1342 = flrp ssa_1340, ssa_1341, ssa_1231
									vec1 32 ssa_1343 = u2f32 ssa_1312
									vec1 32 ssa_1344 = u2f32 ssa_1339
									vec1 32 ssa_1345 = flrp ssa_1343, ssa_1344, ssa_1231
									vec1 32 ssa_1346 = flrp ssa_1342, ssa_1345, ssa_1230
									vec1 32 ssa_1347 = load_const (0x3c008081 /* 0.007843 */)
									vec1 32 ssa_1348 = ffma ssa_1347, ssa_1346, ssa_51
									vec1 32 ssa_1349 = fddx ssa_1348
									vec4 32 ssa_1350 = intrinsic load_uniform (ssa_1) (0, 16) /* base=0 */ /* range=16 */	/* fastuidraw_painterStore */
									vec1 32 ssa_1351 = fmul ssa_1348, ssa_1350.x
									vec1 32 ssa_1352 = fddy ssa_1351
									vec1 32 ssa_1353 = fmul ssa_1352, ssa_1352
									vec1 32 ssa_1354 = ffma ssa_1349, ssa_1349, ssa_1353
									vec1 32 ssa_1355 = frsq ssa_1354
									vec1 32 ssa_1356 = ffma.sat ssa_1348, ssa_1355, ssa_37
									/* succs: block_402 */
								} else {
									block block_198:
									/* preds: block_172 */
									vec1 32 ssa_1357 = ieq ssa_1043.y, ssa_74
									/* succs: block_199 block_324 */
									if ssa_1357 {
										block block_199:
										/* preds: block_198 */
										vec4 32 ssa_1358 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
										vec1 32 ssa_1359 = iand ssa_1358.x, ssa_75
										vec1 32 ssa_1360 = fddx ssa_5.x
										vec1 32 ssa_1361 = fddx ssa_5.y
										vec4 32 ssa_1362 = intrinsic load_uniform (ssa_1) (0, 16) /* base=0 */ /* range=16 */	/* fastuidraw_painterStore */
										vec1 32 ssa_1363 = fmul ssa_5.x, ssa_1362.x
										vec1 32 ssa_1364 = fddy ssa_1363
										vec1 32 ssa_1365 = fmul ssa_5.y, ssa_1362.x
										vec1 32 ssa_1366 = fddy ssa_1365
										vec1 32 ssa_1367 = iand ssa_1358.x, ssa_26
										vec1 32 ssa_1368 = ine ssa_1367, ssa_1
										vec1 32 ssa_1369 = ishl ssa_1359, ssa_31
										vec1 32 ssa_1370 = intrinsic load_ssbo (ssa_30, ssa_1369) ()
										vec1 32 ssa_1371 = load_const (0x45000000 /* 2048.000000 */)
										vec1 32 ssa_1372 = load_const (0xc5000000 /* -2048.000000 */)
										/* succs: block_200 */
										loop {
											block block_200:
											/* preds: block_199 block_206 */
											vec1 32 ssa_1373 = phi block_199: ssa_1370, block_206: ssa_1405
											vec1 32 ssa_1374 = phi block_199: ssa_1359, block_206: ssa_1403
											vec1 32 ssa_1375 = phi block_199: ssa_1371, block_206: ssa_1395
											vec1 32 ssa_1376 = phi block_199: ssa_1371, block_206: ssa_1396
											vec1 32 ssa_1377 = phi block_199: ssa_1372, block_206: ssa_1397
											vec1 32 ssa_1378 = phi block_199: ssa_1372, block_206: ssa_1398
											vec1 32 ssa_1379 = iand ssa_1373, ssa_30
											vec1 32 ssa_1380 = ieq ssa_1379, ssa_1
											/* succs: block_201 block_202 */
											if ssa_1380 {
												block block_201:
												/* preds: block_200 */
												break
												/* succs: block_207 */
											} else {
												block block_202:
												/* preds: block_200 */
												/* succs: block_203 */
											}
											block block_203:
											/* preds: block_202 */
											vec1 32 ssa_1381 = ishl ssa_1373, ssa_28
											vec1 32 ssa_1382 = ushr ssa_1381, ssa_76
											vec1 32 ssa_1383 = ieq ssa_1382, ssa_1
											/* succs: block_204 block_205 */
											if ssa_1383 {
												block block_204:
												/* preds: block_203 */
												vec1 32 ssa_1384 = fadd ssa_1377, ssa_1375
												vec1 32 ssa_1385 = fmul ssa_37, ssa_1384
												vec1 32 ssa_1386 = flt ssa_1385, ssa_5.x
												vec1 32 ssa_1387 = bcsel ssa_1386, ssa_1385, ssa_1377
												vec1 32 ssa_1388 = bcsel ssa_1386, ssa_1375, ssa_1385
												/* succs: block_206 */
											} else {
												block block_205:
												/* preds: block_203 */
												vec1 32 ssa_1389 = fadd ssa_1378, ssa_1376
												vec1 32 ssa_1390 = fmul ssa_37, ssa_1389
												vec1 32 ssa_1391 = flt ssa_1390, ssa_5.y
												vec1 32 ssa_1392 = bcsel ssa_1391, ssa_1390, ssa_1378
												vec1 32 ssa_1393 = bcsel ssa_1391, ssa_1376, ssa_1390
												/* succs: block_206 */
											}
											block block_206:
											/* preds: block_204 block_205 */
											vec1 32 ssa_1394 = phi block_204: ssa_1386, block_205: ssa_1391
											vec1 32 ssa_1395 = phi block_204: ssa_1388, block_205: ssa_1375
											vec1 32 ssa_1396 = phi block_204: ssa_1376, block_205: ssa_1393
											vec1 32 ssa_1397 = phi block_204: ssa_1387, block_205: ssa_1377
											vec1 32 ssa_1398 = phi block_204: ssa_1378, block_205: ssa_1392
											vec1 32 ssa_1399 = bcsel ssa_1394, ssa_77, ssa_31
											vec1 32 ssa_1400 = iadd ssa_77, -ssa_1399
											vec1 32 ssa_1401 = ishl ssa_1373, ssa_1400
											vec1 32 ssa_1402 = ushr ssa_1401, ssa_77
											vec1 32 ssa_1403 = iadd ssa_1402, ssa_1359
											vec1 32 ssa_1404 = ishl ssa_1403, ssa_31
											vec1 32 ssa_1405 = intrinsic load_ssbo (ssa_30, ssa_1404) ()
											/* succs: block_200 */
										}
										block block_207:
										/* preds: block_201 */
										vec1 32 ssa_1406 = ishl ssa_1373, ssa_78
										vec1 32 ssa_1407 = extract_u16 ssa_1406, ssa_30
										vec1 32 ssa_1408 = ushr ssa_1373, ssa_77
										vec1 32 ssa_1409 = iadd ssa_1374, ssa_30
										vec1 32 ssa_1410 = ishl ssa_1409, ssa_31
										vec1 32 ssa_1411 = intrinsic load_ssbo (ssa_30, ssa_1410) ()
										vec1 32 ssa_1412 = ishl ssa_1411, ssa_72
										vec1 32 ssa_1413 = extract_u8 ssa_1412, ssa_32
										vec1 32 ssa_1414 = extract_u8 ssa_1411, ssa_32
										vec1 32 ssa_1415 = u2f32 ssa_1413
										vec1 32 ssa_1416 = u2f32 ssa_1414
										vec1 32 ssa_1417 = load_const (0x3b800000 /* 0.003906 */)
										vec1 32 ssa_1418 = fmul ssa_1415, ssa_1417
										vec1 32 ssa_1419 = fmul ssa_1416, ssa_1417
										vec1 32 ssa_1420 = ishl ssa_1411, ssa_23
										vec1 32 ssa_1421 = extract_u16 ssa_1420, ssa_30
										vec1 32 ssa_1422 = iadd ssa_1421, ssa_24
										vec1 32 ssa_1423 = flrp ssa_1377, ssa_1375, ssa_1418
										vec1 32 ssa_1424 = flrp ssa_1378, ssa_1376, ssa_1419
										vec1 32 ssa_1425 = fadd ssa_1423, -ssa_5.x
										vec1 32 ssa_1426 = fadd ssa_1424, -ssa_5.y
										vec1 32 ssa_1427 = fmul ssa_1366, ssa_1366
										vec1 32 ssa_1428 = ffma ssa_1361, ssa_1361, ssa_1427
										vec1 32 ssa_1429 = fmul ssa_1364, ssa_1366
										vec1 32 ssa_1430 = ffma ssa_1360, ssa_1361, ssa_1429
										vec1 32 ssa_1431 = fmul ssa_1364, ssa_1364
										vec1 32 ssa_1432 = ffma ssa_1360, ssa_1360, ssa_1431
										vec1 32 ssa_1433 = fmul ssa_1430, ssa_1426
										vec1 32 ssa_1434 = ffma -ssa_1428, ssa_1425, ssa_1433
										vec1 32 ssa_1435 = fmul ssa_1432, ssa_1426
										vec1 32 ssa_1436 = ffma ssa_1430, ssa_1425, -ssa_1435
										vec1 32 ssa_1437 = fmul ssa_1436, ssa_1361
										vec1 32 ssa_1438 = ffma ssa_1434, ssa_1360, ssa_1437
										vec1 32 ssa_1439 = fmul ssa_1436, ssa_1366
										vec1 32 ssa_1440 = ffma ssa_1434, ssa_1364, ssa_1439
										vec1 32 ssa_1441 = fadd abs(ssa_1438), abs(ssa_1440)
										vec1 32 ssa_1442 = fmul ssa_1425, ssa_1361
										vec1 32 ssa_1443 = ffma -ssa_1426, ssa_1360, ssa_1442
										vec1 32 ssa_1444 = fmul ssa_1425, ssa_1366
										vec1 32 ssa_1445 = ffma -ssa_1426, ssa_1364, ssa_1444
										vec1 32 ssa_1446 = fadd abs(ssa_1443), abs(ssa_1445)
										vec1 32 ssa_1447 = fmax ssa_1441, ssa_80
										vec1 32 ssa_1448 = fmax ssa_1446, ssa_80
										vec1 32 ssa_1449 = frcp ssa_1447
										vec1 32 ssa_1450 = fmul ssa_1434, ssa_1449
										vec1 32 ssa_1451 = fmul ssa_1436, ssa_1449
										vec1 32 ssa_1452 = frcp ssa_1448
										vec1 32 ssa_1453 = fmul ssa_1426, ssa_1452
										vec1 32 ssa_1454 = fmov -ssa_1453
										vec1 32 ssa_1455 = fmul ssa_1425, ssa_1452
										vec1 32 ssa_1456 = fmul ssa_1451, ssa_1426
										vec1 32 ssa_1457 = ffma ssa_1450, ssa_1425, ssa_1456
										vec1 32 ssa_1458 = fmov -ssa_1450
										vec1 32 ssa_1459 = fmov -ssa_1451
										vec1 32 ssa_1460 = fmov -ssa_1457
										vec1 32 ssa_1461 = flt ssa_1457, ssa_1
										vec1 32 ssa_1462 = bcsel ssa_1461, ssa_1460, ssa_1457
										vec1 32 ssa_1463 = bcsel ssa_1461, ssa_1458, ssa_1450
										vec1 32 ssa_1464 = bcsel ssa_1461, ssa_1459, ssa_1451
										vec1 32 ssa_1465 = fmul ssa_1463, ssa_1455
										vec1 32 ssa_1466 = fmul ssa_1453, ssa_1464
										vec1 32 ssa_1467 = fmov -ssa_1455
										vec1 32 ssa_1468 = flt ssa_1465, -ssa_1466
										vec1 32 ssa_1469 = bcsel ssa_1468, ssa_1453, ssa_1454
										vec1 32 ssa_1470 = bcsel ssa_1468, ssa_1467, ssa_1455
										vec1 32 ssa_1471 = iadd ssa_1407, ssa_1359
										/* succs: block_208 */
										loop {
											block block_208:
											/* preds: block_207 block_310 */
											vec1 32 ssa_1472 = phi block_207: ssa_1, block_310: ssa_1833
											vec1 32 ssa_1473 = phi block_207: ssa_1471, block_310: ssa_1480
											vec1 32 ssa_1474 = phi block_207: ssa_1422, block_310: ssa_1830
											vec1 32 ssa_1475 = phi block_207: ssa_79, block_310: ssa_1831
											vec1 32 ssa_1476 = phi block_207: ssa_79, block_310: ssa_1832
											vec1 32 ssa_1477 = uge ssa_1472, ssa_1408
											/* succs: block_209 block_210 */
											if ssa_1477 {
												block block_209:
												/* preds: block_208 */
												break
												/* succs: block_311 */
											} else {
												block block_210:
												/* preds: block_208 */
												/* succs: block_211 */
											}
											block block_211:
											/* preds: block_210 */
											vec1 32 ssa_1478 = ishl ssa_1473, ssa_31
											vec1 32 ssa_1479 = intrinsic load_ssbo (ssa_30, ssa_1478) ()
											vec1 32 ssa_1480 = iadd ssa_1473, ssa_30
											vec1 32 ssa_1481 = ishl ssa_1479, ssa_23
											vec1 32 ssa_1482 = extract_u16 ssa_1481, ssa_30
											vec1 32 ssa_1483 = ishl ssa_1482, ssa_77
											vec1 32 ssa_1484 = ushr ssa_1483, ssa_77
											vec1 32 ssa_1485 = iadd ssa_1359, ssa_1484
											vec1 32 ssa_1486 = iand ssa_1482, ssa_81
											vec1 32 ssa_1487 = ishl ssa_1485, ssa_31
											vec1 32 ssa_1488 = intrinsic load_ssbo (ssa_30, ssa_1487) ()
											vec1 32 ssa_1489 = unpack_half_2x16_split_x ssa_1488
											vec1 32 ssa_1490 = unpack_half_2x16_split_y ssa_1488
											vec1 32 ssa_1491 = iadd ssa_1485, ssa_30
											vec1 32 ssa_1492 = ishl ssa_1491, ssa_31
											vec1 32 ssa_1493 = intrinsic load_ssbo (ssa_30, ssa_1492) ()
											vec1 32 ssa_1494 = unpack_half_2x16_split_x ssa_1493
											vec1 32 ssa_1495 = unpack_half_2x16_split_y ssa_1493
											vec1 32 ssa_1496 = ine ssa_1486, ssa_1
											/* succs: block_212 block_213 */
											if ssa_1496 {
												block block_212:
												/* preds: block_211 */
												vec1 32 ssa_1497 = iadd ssa_1485, ssa_31
												vec1 32 ssa_1498 = ishl ssa_1497, ssa_31
												vec1 32 ssa_1499 = intrinsic load_ssbo (ssa_30, ssa_1498) ()
												vec1 32 ssa_1500 = unpack_half_2x16_split_x ssa_1499
												vec1 32 ssa_1501 = unpack_half_2x16_split_y ssa_1499
												/* succs: block_214 */
											} else {
												block block_213:
												/* preds: block_211 */
												vec1 32 ssa_1502 = fadd ssa_1489, ssa_1494
												vec1 32 ssa_1503 = fadd ssa_1490, ssa_1495
												vec1 32 ssa_1504 = fmul ssa_37, ssa_1502
												vec1 32 ssa_1505 = fmul ssa_37, ssa_1503
												/* succs: block_214 */
											}
											block block_214:
											/* preds: block_212 block_213 */
											vec1 32 ssa_1506 = phi block_212: ssa_1500, block_213: ssa_1494
											vec1 32 ssa_1507 = phi block_212: ssa_1501, block_213: ssa_1495
											vec1 32 ssa_1508 = phi block_212: ssa_1494, block_213: ssa_1504
											vec1 32 ssa_1509 = phi block_212: ssa_1495, block_213: ssa_1505
											vec1 32 ssa_1510 = fadd ssa_1489, -ssa_5.x
											vec1 32 ssa_1511 = fadd ssa_1490, -ssa_5.y
											vec1 32 ssa_1512 = fmul ssa_1464, ssa_1511
											vec1 32 ssa_1513 = ffma ssa_1463, ssa_1510, ssa_1512
											vec1 32 ssa_1514 = fmul ssa_1470, ssa_1511
											vec1 32 ssa_1515 = ffma ssa_1469, ssa_1510, ssa_1514
											vec1 32 ssa_1516 = fadd ssa_1508, -ssa_5.x
											vec1 32 ssa_1517 = fadd ssa_1509, -ssa_5.y
											vec1 32 ssa_1518 = fmul ssa_1464, ssa_1517
											vec1 32 ssa_1519 = ffma ssa_1463, ssa_1516, ssa_1518
											vec1 32 ssa_1520 = fmul ssa_1470, ssa_1517
											vec1 32 ssa_1521 = ffma ssa_1469, ssa_1516, ssa_1520
											vec1 32 ssa_1522 = fadd ssa_1506, -ssa_5.x
											vec1 32 ssa_1523 = fadd ssa_1507, -ssa_5.y
											vec1 32 ssa_1524 = fmul ssa_1464, ssa_1523
											vec1 32 ssa_1525 = ffma ssa_1463, ssa_1522, ssa_1524
											vec1 32 ssa_1526 = fmul ssa_1470, ssa_1523
											vec1 32 ssa_1527 = ffma ssa_1469, ssa_1522, ssa_1526
											vec1 32 ssa_1528 = ffma -ssa_33, ssa_1519, ssa_1513
											vec1 32 ssa_1529 = ffma -ssa_33, ssa_1521, ssa_1515
											vec1 32 ssa_1530 = fadd ssa_1528, ssa_1525
											vec1 32 ssa_1531 = fadd ssa_1529, ssa_1527
											vec1 32 ssa_1532 = fadd ssa_1513, -ssa_1519
											vec1 32 ssa_1533 = fadd ssa_1515, -ssa_1521
											vec1 32 ssa_1534 = flt ssa_1, ssa_1513
											vec1 32 ssa_1535 = bcsel ssa_1534, ssa_31, ssa_1
											vec1 32 ssa_1536 = flt ssa_1, ssa_1519
											vec1 32 ssa_1537 = bcsel ssa_1536, ssa_71, ssa_1
											vec1 32 ssa_1538 = flt ssa_1, ssa_1525
											vec1 32 ssa_1539 = bcsel ssa_1538, ssa_72, ssa_1
											vec1 32 ssa_1540 = iadd ssa_1535, ssa_1537
											vec1 32 ssa_1541 = iadd ssa_1540, ssa_1539
											vec1 32 ssa_1542 = ushr ssa_82, ssa_1541
											vec1 32 ssa_1543 = iand ssa_1542, ssa_32
											vec1 32 ssa_1544 = flt ssa_1, ssa_1515
											vec1 32 ssa_1545 = bcsel ssa_1544, ssa_31, ssa_1
											vec1 32 ssa_1546 = flt ssa_1, ssa_1521
											vec1 32 ssa_1547 = bcsel ssa_1546, ssa_71, ssa_1
											vec1 32 ssa_1548 = flt ssa_1, ssa_1527
											vec1 32 ssa_1549 = bcsel ssa_1548, ssa_72, ssa_1
											vec1 32 ssa_1550 = iadd ssa_1545, ssa_1547
											vec1 32 ssa_1551 = iadd ssa_1550, ssa_1549
											vec1 32 ssa_1552 = ushr ssa_82, ssa_1551
											vec1 32 ssa_1553 = iand ssa_1552, ssa_32
											vec1 32 ssa_1554 = ine ssa_1553, ssa_1
											/* succs: block_215 block_237 */
											if ssa_1554 {
												block block_215:
												/* preds: block_214 */
												/* succs: block_216 block_217 */
												if ssa_1496 {
													block block_216:
													/* preds: block_215 */
													vec1 32 ssa_1555 = flt ssa_83, abs(ssa_1531)
													/* succs: block_218 */
												} else {
													block block_217:
													/* preds: block_215 */
													/* succs: block_218 */
												}
												block block_218:
												/* preds: block_216 block_217 */
												vec1 32 ssa_1556 = phi block_216: ssa_1555, block_217: ssa_1
												/* succs: block_219 block_220 */
												if ssa_1556 {
													block block_219:
													/* preds: block_218 */
													vec1 32 ssa_1557 = frcp ssa_1531
													vec1 32 ssa_1558 = fmul ssa_1531, ssa_1515
													vec1 32 ssa_1559 = ffma ssa_1533, ssa_1533, -ssa_1558
													vec1 32 ssa_1560 = fmax ssa_1559, ssa_1
													vec1 32 ssa_1561 = flt ssa_1559, ssa_1
													vec1 32 ssa_1562 = bcsel ssa_1561, ssa_1, ssa_1553
													vec1 32 ssa_1563 = fsqrt ssa_1560
													vec1 32 ssa_1564 = fadd ssa_1533, -ssa_1563
													vec1 32 ssa_1565 = fmul ssa_1564, ssa_1557
													vec1 32 ssa_1566 = fadd ssa_1533, ssa_1563
													vec1 32 ssa_1567 = fmul ssa_1566, ssa_1557
													/* succs: block_221 */
												} else {
													block block_220:
													/* preds: block_218 */
													vec1 32 ssa_1568 = fmul ssa_37, ssa_1515
													vec1 32 ssa_1569 = frcp ssa_1533
													vec1 32 ssa_1570 = fmul ssa_1568, ssa_1569
													/* succs: block_221 */
												}
												block block_221:
												/* preds: block_219 block_220 */
												vec1 32 ssa_1571 = phi block_219: ssa_1567, block_220: ssa_1570
												vec1 32 ssa_1572 = phi block_219: ssa_1565, block_220: ssa_1570
												vec1 32 ssa_1573 = phi block_219: ssa_1562, block_220: ssa_1553
												vec1 32 ssa_1574 = fmul ssa_1532, ssa_33
												vec1 32 ssa_1575 = ffma ssa_1530, ssa_1572, -ssa_1574
												vec1 32 ssa_1576 = ffma ssa_1575, ssa_1572, ssa_1513
												vec1 32 ssa_1577 = ffma ssa_1530, ssa_1571, -ssa_1574
												vec1 32 ssa_1578 = ffma ssa_1577, ssa_1571, ssa_1513
												vec1 32 ssa_1579 = iand ssa_1573, ssa_30
												vec1 32 ssa_1580 = ine ssa_1579, ssa_1
												/* succs: block_222 block_226 */
												if ssa_1580 {
													block block_222:
													/* preds: block_221 */
													vec1 32 ssa_1581 = fge ssa_1576, ssa_1
													vec1 32 ssa_1582 = fge ssa_1462, ssa_1576
													vec1 32 ssa_1583 = iand ssa_1582, ssa_1581
													vec1 32 ssa_1584 = bcsel ssa_1583, ssa_30, ssa_1
													vec1 32 ssa_1585 = flt ssa_1576, ssa_1
													/* succs: block_223 block_224 */
													if ssa_1585 {
														block block_223:
														/* preds: block_222 */
														vec1 32 ssa_1586 = fmin ssa_1476, abs(ssa_1576)
														/* succs: block_225 */
													} else {
														block block_224:
														/* preds: block_222 */
														vec1 32 ssa_1587 = fmin ssa_1475, abs(ssa_1576)
														/* succs: block_225 */
													}
													block block_225:
													/* preds: block_223 block_224 */
													vec1 32 ssa_1588 = phi block_223: ssa_1475, block_224: ssa_1587
													vec1 32 ssa_1589 = phi block_223: ssa_1586, block_224: ssa_1476
													/* succs: block_227 */
												} else {
													block block_226:
													/* preds: block_221 */
													/* succs: block_227 */
												}
												block block_227:
												/* preds: block_225 block_226 */
												vec1 32 ssa_1590 = phi block_225: ssa_1588, block_226: ssa_1475
												vec1 32 ssa_1591 = phi block_225: ssa_1589, block_226: ssa_1476
												vec1 32 ssa_1592 = phi block_225: ssa_1584, block_226: ssa_1
												vec1 32 ssa_1593 = ult ssa_30, ssa_1573
												/* succs: block_228 block_235 */
												if ssa_1593 {
													block block_228:
													/* preds: block_227 */
													vec1 32 ssa_1594 = fge ssa_1578, ssa_1
													vec1 32 ssa_1595 = fge ssa_1462, ssa_1578
													vec1 32 ssa_1596 = iand ssa_1595, ssa_1594
													/* succs: block_229 block_230 */
													if ssa_1596 {
														block block_229:
														/* preds: block_228 */
														vec1 32 ssa_1597 = iadd ssa_1592, ssa_25
														/* succs: block_231 */
													} else {
														block block_230:
														/* preds: block_228 */
														/* succs: block_231 */
													}
													block block_231:
													/* preds: block_229 block_230 */
													vec1 32 ssa_1598 = phi block_229: ssa_1597, block_230: ssa_1592
													vec1 32 ssa_1599 = flt ssa_1, ssa_1578
													/* succs: block_232 block_233 */
													if ssa_1599 {
														block block_232:
														/* preds: block_231 */
														vec1 32 ssa_1600 = fmin ssa_1591, abs(ssa_1578)
														/* succs: block_234 */
													} else {
														block block_233:
														/* preds: block_231 */
														vec1 32 ssa_1601 = fmin ssa_1590, abs(ssa_1578)
														/* succs: block_234 */
													}
													block block_234:
													/* preds: block_232 block_233 */
													vec1 32 ssa_1602 = phi block_232: ssa_1590, block_233: ssa_1601
													vec1 32 ssa_1603 = phi block_232: ssa_1600, block_233: ssa_1591
													/* succs: block_236 */
												} else {
													block block_235:
													/* preds: block_227 */
													/* succs: block_236 */
												}
												block block_236:
												/* preds: block_234 block_235 */
												vec1 32 ssa_1604 = phi block_234: ssa_1602, block_235: ssa_1590
												vec1 32 ssa_1605 = phi block_234: ssa_1603, block_235: ssa_1591
												vec1 32 ssa_1606 = phi block_234: ssa_1598, block_235: ssa_1592
												/* succs: block_238 */
											} else {
												block block_237:
												/* preds: block_214 */
												/* succs: block_238 */
											}
											block block_238:
											/* preds: block_236 block_237 */
											vec1 32 ssa_1607 = phi block_236: ssa_1604, block_237: ssa_1475
											vec1 32 ssa_1608 = phi block_236: ssa_1605, block_237: ssa_1476
											vec1 32 ssa_1609 = phi block_236: ssa_1606, block_237: ssa_1
											vec1 32 ssa_1610 = ine ssa_1543, ssa_1
											/* succs: block_239 block_258 */
											if ssa_1610 {
												block block_239:
												/* preds: block_238 */
												/* succs: block_240 block_241 */
												if ssa_1496 {
													block block_240:
													/* preds: block_239 */
													vec1 32 ssa_1611 = flt ssa_83, abs(ssa_1530)
													/* succs: block_242 */
												} else {
													block block_241:
													/* preds: block_239 */
													/* succs: block_242 */
												}
												block block_242:
												/* preds: block_240 block_241 */
												vec1 32 ssa_1612 = phi block_240: ssa_1611, block_241: ssa_1
												/* succs: block_243 block_244 */
												if ssa_1612 {
													block block_243:
													/* preds: block_242 */
													vec1 32 ssa_1613 = frcp ssa_1530
													vec1 32 ssa_1614 = fmul ssa_1530, ssa_1513
													vec1 32 ssa_1615 = ffma ssa_1532, ssa_1532, -ssa_1614
													vec1 32 ssa_1616 = fmax ssa_1615, ssa_1
													vec1 32 ssa_1617 = flt ssa_1615, ssa_1
													vec1 32 ssa_1618 = bcsel ssa_1617, ssa_1, ssa_1543
													vec1 32 ssa_1619 = fsqrt ssa_1616
													vec1 32 ssa_1620 = fadd ssa_1532, -ssa_1619
													vec1 32 ssa_1621 = fmul ssa_1620, ssa_1613
													vec1 32 ssa_1622 = fadd ssa_1532, ssa_1619
													vec1 32 ssa_1623 = fmul ssa_1622, ssa_1613
													/* succs: block_245 */
												} else {
													block block_244:
													/* preds: block_242 */
													vec1 32 ssa_1624 = fmul ssa_37, ssa_1513
													vec1 32 ssa_1625 = frcp ssa_1532
													vec1 32 ssa_1626 = fmul ssa_1624, ssa_1625
													/* succs: block_245 */
												}
												block block_245:
												/* preds: block_243 block_244 */
												vec1 32 ssa_1627 = phi block_243: ssa_1623, block_244: ssa_1626
												vec1 32 ssa_1628 = phi block_243: ssa_1621, block_244: ssa_1626
												vec1 32 ssa_1629 = phi block_243: ssa_1618, block_244: ssa_1543
												vec1 32 ssa_1630 = fmul ssa_1533, ssa_33
												vec1 32 ssa_1631 = ffma ssa_1531, ssa_1628, -ssa_1630
												vec1 32 ssa_1632 = ffma ssa_1631, ssa_1628, ssa_1515
												vec1 32 ssa_1633 = ffma ssa_1531, ssa_1627, -ssa_1630
												vec1 32 ssa_1634 = ffma ssa_1633, ssa_1627, ssa_1515
												vec1 32 ssa_1635 = iand ssa_1629, ssa_30
												vec1 32 ssa_1636 = ine ssa_1635, ssa_1
												/* succs: block_246 block_250 */
												if ssa_1636 {
													block block_246:
													/* preds: block_245 */
													vec1 32 ssa_1637 = flt ssa_1, ssa_1632
													/* succs: block_247 block_248 */
													if ssa_1637 {
														block block_247:
														/* preds: block_246 */
														vec1 32 ssa_1638 = fmin ssa_1608, abs(ssa_1632)
														/* succs: block_249 */
													} else {
														block block_248:
														/* preds: block_246 */
														vec1 32 ssa_1639 = fmin ssa_1607, abs(ssa_1632)
														/* succs: block_249 */
													}
													block block_249:
													/* preds: block_247 block_248 */
													vec1 32 ssa_1640 = phi block_247: ssa_1607, block_248: ssa_1639
													vec1 32 ssa_1641 = phi block_247: ssa_1638, block_248: ssa_1608
													/* succs: block_251 */
												} else {
													block block_250:
													/* preds: block_245 */
													/* succs: block_251 */
												}
												block block_251:
												/* preds: block_249 block_250 */
												vec1 32 ssa_1642 = phi block_249: ssa_1640, block_250: ssa_1607
												vec1 32 ssa_1643 = phi block_249: ssa_1641, block_250: ssa_1608
												vec1 32 ssa_1644 = ult ssa_30, ssa_1629
												/* succs: block_252 block_256 */
												if ssa_1644 {
													block block_252:
													/* preds: block_251 */
													vec1 32 ssa_1645 = flt ssa_1634, ssa_1
													/* succs: block_253 block_254 */
													if ssa_1645 {
														block block_253:
														/* preds: block_252 */
														vec1 32 ssa_1646 = fmin ssa_1643, abs(ssa_1634)
														/* succs: block_255 */
													} else {
														block block_254:
														/* preds: block_252 */
														vec1 32 ssa_1647 = fmin ssa_1642, abs(ssa_1634)
														/* succs: block_255 */
													}
													block block_255:
													/* preds: block_253 block_254 */
													vec1 32 ssa_1648 = phi block_253: ssa_1642, block_254: ssa_1647
													vec1 32 ssa_1649 = phi block_253: ssa_1646, block_254: ssa_1643
													/* succs: block_257 */
												} else {
													block block_256:
													/* preds: block_251 */
													/* succs: block_257 */
												}
												block block_257:
												/* preds: block_255 block_256 */
												vec1 32 ssa_1650 = phi block_255: ssa_1648, block_256: ssa_1642
												vec1 32 ssa_1651 = phi block_255: ssa_1649, block_256: ssa_1643
												/* succs: block_259 */
											} else {
												block block_258:
												/* preds: block_238 */
												/* succs: block_259 */
											}
											block block_259:
											/* preds: block_257 block_258 */
											vec1 32 ssa_1652 = phi block_257: ssa_1650, block_258: ssa_1607
											vec1 32 ssa_1653 = phi block_257: ssa_1651, block_258: ssa_1608
											vec1 32 ssa_1654 = iadd ssa_1474, ssa_1609
											vec1 32 ssa_1655 = iadd ssa_1472, ssa_30
											vec1 32 ssa_1656 = ult ssa_1655, ssa_1408
											/* succs: block_260 block_309 */
											if ssa_1656 {
												block block_260:
												/* preds: block_259 */
												vec1 32 ssa_1657 = extract_u16 ssa_1479, ssa_30
												vec1 32 ssa_1658 = ishl ssa_1657, ssa_77
												vec1 32 ssa_1659 = ushr ssa_1658, ssa_77
												vec1 32 ssa_1660 = iadd ssa_1359, ssa_1659
												vec1 32 ssa_1661 = iand ssa_1657, ssa_81
												vec1 32 ssa_1662 = ishl ssa_1660, ssa_31
												vec1 32 ssa_1663 = intrinsic load_ssbo (ssa_30, ssa_1662) ()
												vec1 32 ssa_1664 = unpack_half_2x16_split_x ssa_1663
												vec1 32 ssa_1665 = unpack_half_2x16_split_y ssa_1663
												vec1 32 ssa_1666 = iadd ssa_1660, ssa_30
												vec1 32 ssa_1667 = ishl ssa_1666, ssa_31
												vec1 32 ssa_1668 = intrinsic load_ssbo (ssa_30, ssa_1667) ()
												vec1 32 ssa_1669 = unpack_half_2x16_split_x ssa_1668
												vec1 32 ssa_1670 = unpack_half_2x16_split_y ssa_1668
												vec1 32 ssa_1671 = ine ssa_1661, ssa_1
												/* succs: block_261 block_262 */
												if ssa_1671 {
													block block_261:
													/* preds: block_260 */
													vec1 32 ssa_1672 = iadd ssa_1660, ssa_31
													vec1 32 ssa_1673 = ishl ssa_1672, ssa_31
													vec1 32 ssa_1674 = intrinsic load_ssbo (ssa_30, ssa_1673) ()
													vec1 32 ssa_1675 = unpack_half_2x16_split_x ssa_1674
													vec1 32 ssa_1676 = unpack_half_2x16_split_y ssa_1674
													/* succs: block_263 */
												} else {
													block block_262:
													/* preds: block_260 */
													vec1 32 ssa_1677 = fadd ssa_1664, ssa_1669
													vec1 32 ssa_1678 = fadd ssa_1665, ssa_1670
													vec1 32 ssa_1679 = fmul ssa_37, ssa_1677
													vec1 32 ssa_1680 = fmul ssa_37, ssa_1678
													/* succs: block_263 */
												}
												block block_263:
												/* preds: block_261 block_262 */
												vec1 32 ssa_1681 = phi block_261: ssa_1675, block_262: ssa_1669
												vec1 32 ssa_1682 = phi block_261: ssa_1676, block_262: ssa_1670
												vec1 32 ssa_1683 = phi block_261: ssa_1669, block_262: ssa_1679
												vec1 32 ssa_1684 = phi block_261: ssa_1670, block_262: ssa_1680
												vec1 32 ssa_1685 = fadd ssa_1664, -ssa_5.x
												vec1 32 ssa_1686 = fadd ssa_1665, -ssa_5.y
												vec1 32 ssa_1687 = fmul ssa_1464, ssa_1686
												vec1 32 ssa_1688 = ffma ssa_1463, ssa_1685, ssa_1687
												vec1 32 ssa_1689 = fmul ssa_1470, ssa_1686
												vec1 32 ssa_1690 = ffma ssa_1469, ssa_1685, ssa_1689
												vec1 32 ssa_1691 = fadd ssa_1683, -ssa_5.x
												vec1 32 ssa_1692 = fadd ssa_1684, -ssa_5.y
												vec1 32 ssa_1693 = fmul ssa_1464, ssa_1692
												vec1 32 ssa_1694 = ffma ssa_1463, ssa_1691, ssa_1693
												vec1 32 ssa_1695 = fmul ssa_1470, ssa_1692
												vec1 32 ssa_1696 = ffma ssa_1469, ssa_1691, ssa_1695
												vec1 32 ssa_1697 = fadd ssa_1681, -ssa_5.x
												vec1 32 ssa_1698 = fadd ssa_1682, -ssa_5.y
												vec1 32 ssa_1699 = fmul ssa_1464, ssa_1698
												vec1 32 ssa_1700 = ffma ssa_1463, ssa_1697, ssa_1699
												vec1 32 ssa_1701 = fmul ssa_1470, ssa_1698
												vec1 32 ssa_1702 = ffma ssa_1469, ssa_1697, ssa_1701
												vec1 32 ssa_1703 = ffma -ssa_33, ssa_1694, ssa_1688
												vec1 32 ssa_1704 = ffma -ssa_33, ssa_1696, ssa_1690
												vec1 32 ssa_1705 = fadd ssa_1703, ssa_1700
												vec1 32 ssa_1706 = fadd ssa_1704, ssa_1702
												vec1 32 ssa_1707 = fadd ssa_1688, -ssa_1694
												vec1 32 ssa_1708 = fadd ssa_1690, -ssa_1696
												vec1 32 ssa_1709 = flt ssa_1, ssa_1688
												vec1 32 ssa_1710 = bcsel ssa_1709, ssa_31, ssa_1
												vec1 32 ssa_1711 = flt ssa_1, ssa_1694
												vec1 32 ssa_1712 = bcsel ssa_1711, ssa_71, ssa_1
												vec1 32 ssa_1713 = flt ssa_1, ssa_1700
												vec1 32 ssa_1714 = bcsel ssa_1713, ssa_72, ssa_1
												vec1 32 ssa_1715 = iadd ssa_1710, ssa_1712
												vec1 32 ssa_1716 = iadd ssa_1715, ssa_1714
												vec1 32 ssa_1717 = ushr ssa_82, ssa_1716
												vec1 32 ssa_1718 = iand ssa_1717, ssa_32
												vec1 32 ssa_1719 = flt ssa_1, ssa_1690
												vec1 32 ssa_1720 = bcsel ssa_1719, ssa_31, ssa_1
												vec1 32 ssa_1721 = flt ssa_1, ssa_1696
												vec1 32 ssa_1722 = bcsel ssa_1721, ssa_71, ssa_1
												vec1 32 ssa_1723 = flt ssa_1, ssa_1702
												vec1 32 ssa_1724 = bcsel ssa_1723, ssa_72, ssa_1
												vec1 32 ssa_1725 = iadd ssa_1720, ssa_1722
												vec1 32 ssa_1726 = iadd ssa_1725, ssa_1724
												vec1 32 ssa_1727 = ushr ssa_82, ssa_1726
												vec1 32 ssa_1728 = iand ssa_1727, ssa_32
												vec1 32 ssa_1729 = ine ssa_1728, ssa_1
												/* succs: block_264 block_286 */
												if ssa_1729 {
													block block_264:
													/* preds: block_263 */
													/* succs: block_265 block_266 */
													if ssa_1671 {
														block block_265:
														/* preds: block_264 */
														vec1 32 ssa_1730 = flt ssa_83, abs(ssa_1706)
														/* succs: block_267 */
													} else {
														block block_266:
														/* preds: block_264 */
														/* succs: block_267 */
													}
													block block_267:
													/* preds: block_265 block_266 */
													vec1 32 ssa_1731 = phi block_265: ssa_1730, block_266: ssa_1
													/* succs: block_268 block_269 */
													if ssa_1731 {
														block block_268:
														/* preds: block_267 */
														vec1 32 ssa_1732 = frcp ssa_1706
														vec1 32 ssa_1733 = fmul ssa_1706, ssa_1690
														vec1 32 ssa_1734 = ffma ssa_1708, ssa_1708, -ssa_1733
														vec1 32 ssa_1735 = fmax ssa_1734, ssa_1
														vec1 32 ssa_1736 = flt ssa_1734, ssa_1
														vec1 32 ssa_1737 = bcsel ssa_1736, ssa_1, ssa_1728
														vec1 32 ssa_1738 = fsqrt ssa_1735
														vec1 32 ssa_1739 = fadd ssa_1708, -ssa_1738
														vec1 32 ssa_1740 = fmul ssa_1739, ssa_1732
														vec1 32 ssa_1741 = fadd ssa_1708, ssa_1738
														vec1 32 ssa_1742 = fmul ssa_1741, ssa_1732
														/* succs: block_270 */
													} else {
														block block_269:
														/* preds: block_267 */
														vec1 32 ssa_1743 = fmul ssa_37, ssa_1690
														vec1 32 ssa_1744 = frcp ssa_1708
														vec1 32 ssa_1745 = fmul ssa_1743, ssa_1744
														/* succs: block_270 */
													}
													block block_270:
													/* preds: block_268 block_269 */
													vec1 32 ssa_1746 = phi block_268: ssa_1742, block_269: ssa_1745
													vec1 32 ssa_1747 = phi block_268: ssa_1740, block_269: ssa_1745
													vec1 32 ssa_1748 = phi block_268: ssa_1737, block_269: ssa_1728
													vec1 32 ssa_1749 = fmul ssa_1707, ssa_33
													vec1 32 ssa_1750 = ffma ssa_1705, ssa_1747, -ssa_1749
													vec1 32 ssa_1751 = ffma ssa_1750, ssa_1747, ssa_1688
													vec1 32 ssa_1752 = ffma ssa_1705, ssa_1746, -ssa_1749
													vec1 32 ssa_1753 = ffma ssa_1752, ssa_1746, ssa_1688
													vec1 32 ssa_1754 = iand ssa_1748, ssa_30
													vec1 32 ssa_1755 = ine ssa_1754, ssa_1
													/* succs: block_271 block_275 */
													if ssa_1755 {
														block block_271:
														/* preds: block_270 */
														vec1 32 ssa_1756 = fge ssa_1751, ssa_1
														vec1 32 ssa_1757 = fge ssa_1462, ssa_1751
														vec1 32 ssa_1758 = iand ssa_1757, ssa_1756
														vec1 32 ssa_1759 = bcsel ssa_1758, ssa_30, ssa_1
														vec1 32 ssa_1760 = flt ssa_1751, ssa_1
														/* succs: block_272 block_273 */
														if ssa_1760 {
															block block_272:
															/* preds: block_271 */
															vec1 32 ssa_1761 = fmin ssa_1653, abs(ssa_1751)
															/* succs: block_274 */
														} else {
															block block_273:
															/* preds: block_271 */
															vec1 32 ssa_1762 = fmin ssa_1652, abs(ssa_1751)
															/* succs: block_274 */
														}
														block block_274:
														/* preds: block_272 block_273 */
														vec1 32 ssa_1763 = phi block_272: ssa_1652, block_273: ssa_1762
														vec1 32 ssa_1764 = phi block_272: ssa_1761, block_273: ssa_1653
														/* succs: block_276 */
													} else {
														block block_275:
														/* preds: block_270 */
														/* succs: block_276 */
													}
													block block_276:
													/* preds: block_274 block_275 */
													vec1 32 ssa_1765 = phi block_274: ssa_1763, block_275: ssa_1652
													vec1 32 ssa_1766 = phi block_274: ssa_1764, block_275: ssa_1653
													vec1 32 ssa_1767 = phi block_274: ssa_1759, block_275: ssa_1
													vec1 32 ssa_1768 = ult ssa_30, ssa_1748
													/* succs: block_277 block_284 */
													if ssa_1768 {
														block block_277:
														/* preds: block_276 */
														vec1 32 ssa_1769 = fge ssa_1753, ssa_1
														vec1 32 ssa_1770 = fge ssa_1462, ssa_1753
														vec1 32 ssa_1771 = iand ssa_1770, ssa_1769
														/* succs: block_278 block_279 */
														if ssa_1771 {
															block block_278:
															/* preds: block_277 */
															vec1 32 ssa_1772 = iadd ssa_1767, ssa_25
															/* succs: block_280 */
														} else {
															block block_279:
															/* preds: block_277 */
															/* succs: block_280 */
														}
														block block_280:
														/* preds: block_278 block_279 */
														vec1 32 ssa_1773 = phi block_278: ssa_1772, block_279: ssa_1767
														vec1 32 ssa_1774 = flt ssa_1, ssa_1753
														/* succs: block_281 block_282 */
														if ssa_1774 {
															block block_281:
															/* preds: block_280 */
															vec1 32 ssa_1775 = fmin ssa_1766, abs(ssa_1753)
															/* succs: block_283 */
														} else {
															block block_282:
															/* preds: block_280 */
															vec1 32 ssa_1776 = fmin ssa_1765, abs(ssa_1753)
															/* succs: block_283 */
														}
														block block_283:
														/* preds: block_281 block_282 */
														vec1 32 ssa_1777 = phi block_281: ssa_1765, block_282: ssa_1776
														vec1 32 ssa_1778 = phi block_281: ssa_1775, block_282: ssa_1766
														/* succs: block_285 */
													} else {
														block block_284:
														/* preds: block_276 */
														/* succs: block_285 */
													}
													block block_285:
													/* preds: block_283 block_284 */
													vec1 32 ssa_1779 = phi block_283: ssa_1777, block_284: ssa_1765
													vec1 32 ssa_1780 = phi block_283: ssa_1778, block_284: ssa_1766
													vec1 32 ssa_1781 = phi block_283: ssa_1773, block_284: ssa_1767
													/* succs: block_287 */
												} else {
													block block_286:
													/* preds: block_263 */
													/* succs: block_287 */
												}
												block block_287:
												/* preds: block_285 block_286 */
												vec1 32 ssa_1782 = phi block_285: ssa_1779, block_286: ssa_1652
												vec1 32 ssa_1783 = phi block_285: ssa_1780, block_286: ssa_1653
												vec1 32 ssa_1784 = phi block_285: ssa_1781, block_286: ssa_1
												vec1 32 ssa_1785 = ine ssa_1718, ssa_1
												/* succs: block_288 block_307 */
												if ssa_1785 {
													block block_288:
													/* preds: block_287 */
													/* succs: block_289 block_290 */
													if ssa_1671 {
														block block_289:
														/* preds: block_288 */
														vec1 32 ssa_1786 = flt ssa_83, abs(ssa_1705)
														/* succs: block_291 */
													} else {
														block block_290:
														/* preds: block_288 */
														/* succs: block_291 */
													}
													block block_291:
													/* preds: block_289 block_290 */
													vec1 32 ssa_1787 = phi block_289: ssa_1786, block_290: ssa_1
													/* succs: block_292 block_293 */
													if ssa_1787 {
														block block_292:
														/* preds: block_291 */
														vec1 32 ssa_1788 = frcp ssa_1705
														vec1 32 ssa_1789 = fmul ssa_1705, ssa_1688
														vec1 32 ssa_1790 = ffma ssa_1707, ssa_1707, -ssa_1789
														vec1 32 ssa_1791 = fmax ssa_1790, ssa_1
														vec1 32 ssa_1792 = flt ssa_1790, ssa_1
														vec1 32 ssa_1793 = bcsel ssa_1792, ssa_1, ssa_1718
														vec1 32 ssa_1794 = fsqrt ssa_1791
														vec1 32 ssa_1795 = fadd ssa_1707, -ssa_1794
														vec1 32 ssa_1796 = fmul ssa_1795, ssa_1788
														vec1 32 ssa_1797 = fadd ssa_1707, ssa_1794
														vec1 32 ssa_1798 = fmul ssa_1797, ssa_1788
														/* succs: block_294 */
													} else {
														block block_293:
														/* preds: block_291 */
														vec1 32 ssa_1799 = fmul ssa_37, ssa_1688
														vec1 32 ssa_1800 = frcp ssa_1707
														vec1 32 ssa_1801 = fmul ssa_1799, ssa_1800
														/* succs: block_294 */
													}
													block block_294:
													/* preds: block_292 block_293 */
													vec1 32 ssa_1802 = phi block_292: ssa_1798, block_293: ssa_1801
													vec1 32 ssa_1803 = phi block_292: ssa_1796, block_293: ssa_1801
													vec1 32 ssa_1804 = phi block_292: ssa_1793, block_293: ssa_1718
													vec1 32 ssa_1805 = fmul ssa_1708, ssa_33
													vec1 32 ssa_1806 = ffma ssa_1706, ssa_1803, -ssa_1805
													vec1 32 ssa_1807 = ffma ssa_1806, ssa_1803, ssa_1690
													vec1 32 ssa_1808 = ffma ssa_1706, ssa_1802, -ssa_1805
													vec1 32 ssa_1809 = ffma ssa_1808, ssa_1802, ssa_1690
													vec1 32 ssa_1810 = iand ssa_1804, ssa_30
													vec1 32 ssa_1811 = ine ssa_1810, ssa_1
													/* succs: block_295 block_299 */
													if ssa_1811 {
														block block_295:
														/* preds: block_294 */
														vec1 32 ssa_1812 = flt ssa_1, ssa_1807
														/* succs: block_296 block_297 */
														if ssa_1812 {
															block block_296:
															/* preds: block_295 */
															vec1 32 ssa_1813 = fmin ssa_1783, abs(ssa_1807)
															/* succs: block_298 */
														} else {
															block block_297:
															/* preds: block_295 */
															vec1 32 ssa_1814 = fmin ssa_1782, abs(ssa_1807)
															/* succs: block_298 */
														}
														block block_298:
														/* preds: block_296 block_297 */
														vec1 32 ssa_1815 = phi block_296: ssa_1782, block_297: ssa_1814
														vec1 32 ssa_1816 = phi block_296: ssa_1813, block_297: ssa_1783
														/* succs: block_300 */
													} else {
														block block_299:
														/* preds: block_294 */
														/* succs: block_300 */
													}
													block block_300:
													/* preds: block_298 block_299 */
													vec1 32 ssa_1817 = phi block_298: ssa_1815, block_299: ssa_1782
													vec1 32 ssa_1818 = phi block_298: ssa_1816, block_299: ssa_1783
													vec1 32 ssa_1819 = ult ssa_30, ssa_1804
													/* succs: block_301 block_305 */
													if ssa_1819 {
														block block_301:
														/* preds: block_300 */
														vec1 32 ssa_1820 = flt ssa_1809, ssa_1
														/* succs: block_302 block_303 */
														if ssa_1820 {
															block block_302:
															/* preds: block_301 */
															vec1 32 ssa_1821 = fmin ssa_1818, abs(ssa_1809)
															/* succs: block_304 */
														} else {
															block block_303:
															/* preds: block_301 */
															vec1 32 ssa_1822 = fmin ssa_1817, abs(ssa_1809)
															/* succs: block_304 */
														}
														block block_304:
														/* preds: block_302 block_303 */
														vec1 32 ssa_1823 = phi block_302: ssa_1817, block_303: ssa_1822
														vec1 32 ssa_1824 = phi block_302: ssa_1821, block_303: ssa_1818
														/* succs: block_306 */
													} else {
														block block_305:
														/* preds: block_300 */
														/* succs: block_306 */
													}
													block block_306:
													/* preds: block_304 block_305 */
													vec1 32 ssa_1825 = phi block_304: ssa_1823, block_305: ssa_1817
													vec1 32 ssa_1826 = phi block_304: ssa_1824, block_305: ssa_1818
													/* succs: block_308 */
												} else {
													block block_307:
													/* preds: block_287 */
													/* succs: block_308 */
												}
												block block_308:
												/* preds: block_306 block_307 */
												vec1 32 ssa_1827 = phi block_306: ssa_1825, block_307: ssa_1782
												vec1 32 ssa_1828 = phi block_306: ssa_1826, block_307: ssa_1783
												vec1 32 ssa_1829 = iadd ssa_1654, ssa_1784
												/* succs: block_310 */
											} else {
												block block_309:
												/* preds: block_259 */
												/* succs: block_310 */
											}
											block block_310:
											/* preds: block_308 block_309 */
											vec1 32 ssa_1830 = phi block_308: ssa_1829, block_309: ssa_1654
											vec1 32 ssa_1831 = phi block_308: ssa_1827, block_309: ssa_1652
											vec1 32 ssa_1832 = phi block_308: ssa_1828, block_309: ssa_1653
											vec1 32 ssa_1833 = iadd ssa_1472, ssa_31
											/* succs: block_208 */
										}
										block block_311:
										/* preds: block_209 */
										vec1 32 ssa_1834 = ieq ssa_1474, ssa_1
										vec1 32 ssa_1835 = ior ssa_1834, ssa_1368
										/* succs: block_312 block_313 */
										if ssa_1835 {
											block block_312:
											/* preds: block_311 */
											vec1 32 ssa_1836 = fmin ssa_1476, ssa_1475
											/* succs: block_317 */
										} else {
											block block_313:
											/* preds: block_311 */
											vec1 32 ssa_1837 = ine ssa_1474, ssa_25
											/* succs: block_314 block_315 */
											if ssa_1837 {
												block block_314:
												/* preds: block_313 */
												vec1 32 ssa_1838 = ieq ssa_1474, ssa_30
												vec1 32 ssa_1839 = bcsel ssa_1838, ssa_1475, ssa_37
												/* succs: block_316 */
											} else {
												block block_315:
												/* preds: block_313 */
												/* succs: block_316 */
											}
											block block_316:
											/* preds: block_314 block_315 */
											vec1 32 ssa_1840 = phi block_315: ssa_1476, block_314: ssa_1839
											/* succs: block_317 */
										}
										block block_317:
										/* preds: block_312 block_316 */
										vec1 32 ssa_1841 = phi block_312: ssa_1836, block_316: ssa_1840
										vec1 32 ssa_1842 = fmin ssa_1841, ssa_37
										vec1 32 ssa_1843 = iand ssa_1474, ssa_30
										vec1 32 ssa_1844 = ieq ssa_1843, ssa_1
										vec1 32 ssa_1845 = iand ssa_1368, ssa_1844
										vec1 32 ssa_1846 = bcsel ssa_1845, ssa_1, ssa_1474
										vec1 32 ssa_1847 = ine ssa_1846, ssa_1
										/* succs: block_318 block_319 */
										if ssa_1847 {
											block block_318:
											/* preds: block_317 */
											vec1 32 ssa_1848 = fadd ssa_37, ssa_1842
											/* succs: block_320 */
										} else {
											block block_319:
											/* preds: block_317 */
											vec1 32 ssa_1849 = fadd ssa_37, -ssa_1842
											/* succs: block_320 */
										}
										block block_320:
										/* preds: block_318 block_319 */
										vec1 32 ssa_1850 = phi block_318: ssa_1848, block_319: ssa_1849
										vec1 32 ssa_1851 = iand ssa_1358.x, ssa_33
										vec1 32 ssa_1852 = ine ssa_1851, ssa_1
										/* succs: block_321 block_322 */
										if ssa_1852 {
											block block_321:
											/* preds: block_320 */
											vec1 32 ssa_1853 = fadd ssa_35, -ssa_1850
											/* succs: block_323 */
										} else {
											block block_322:
											/* preds: block_320 */
											/* succs: block_323 */
										}
										block block_323:
										/* preds: block_321 block_322 */
										vec1 32 ssa_1854 = phi block_321: ssa_1853, block_322: ssa_1850
										/* succs: block_401 */
									} else {
										block block_324:
										/* preds: block_198 */
										vec1 32 ssa_1855 = ieq ssa_1043.y, ssa_53
										/* succs: block_325 block_399 */
										if ssa_1855 {
											block block_325:
											/* preds: block_324 */
											vec1 32 ssa_1856 = fddx ssa_5.x
											vec4 32 ssa_1857 = intrinsic load_uniform (ssa_1) (0, 16) /* base=0 */ /* range=16 */	/* fastuidraw_painterStore */
											vec1 32 ssa_1858 = fmul ssa_5.x, ssa_1857.x
											vec1 32 ssa_1859 = fddy ssa_1858
											vec1 32 ssa_1860 = fadd abs(ssa_1856), abs(ssa_1859)
											vec1 32 ssa_1861 = fddx ssa_5.y
											vec1 32 ssa_1862 = fmul ssa_5.y, ssa_1857.x
											vec1 32 ssa_1863 = fddy ssa_1862
											vec1 32 ssa_1864 = fadd abs(ssa_1861), abs(ssa_1863)
											vec4 32 ssa_1865 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
											vec1 32 ssa_1866 = iand ssa_1865.x, ssa_75
											vec1 32 ssa_1867 = iand ssa_1865.x, ssa_26
											vec1 32 ssa_1868 = ine ssa_1867, ssa_1
											vec1 32 ssa_1869 = frcp ssa_1860
											vec1 32 ssa_1870 = frcp ssa_1864
											vec1 32 ssa_1871 = u2f32 ssa_1865.z
											vec1 32 ssa_1872 = u2f32 ssa_1865.y
											vec1 32 ssa_1873 = iadd ssa_1865.z, ssa_25
											vec1 32 ssa_1874 = fadd ssa_5.x, ssa_56
											vec1 32 ssa_1875 = fmul ssa_1871, ssa_84
											vec1 32 ssa_1876 = fmul ssa_1875, ssa_1874
											vec1 32 ssa_1877 = f2u32 ssa_1876
											vec1 32 ssa_1878 = umin ssa_1873, ssa_1877
											vec1 32 ssa_1879 = iadd ssa_1865.y, ssa_25
											vec1 32 ssa_1880 = fadd ssa_5.y, ssa_56
											vec1 32 ssa_1881 = fmul ssa_1872, ssa_84
											vec1 32 ssa_1882 = fmul ssa_1881, ssa_1880
											vec1 32 ssa_1883 = f2u32 ssa_1882
											vec1 32 ssa_1884 = umin ssa_1879, ssa_1883
											vec1 32 ssa_1885 = flt ssa_5.x, ssa_1
											/* succs: block_326 block_327 */
											if ssa_1885 {
												block block_326:
												/* preds: block_325 */
												vec1 32 ssa_1886 = iadd ssa_1884, ssa_1865.y
												/* succs: block_328 */
											} else {
												block block_327:
												/* preds: block_325 */
												/* succs: block_328 */
											}
											block block_328:
											/* preds: block_326 block_327 */
											vec1 32 ssa_1887 = phi block_326: ssa_51, block_327: ssa_35
											vec1 32 ssa_1888 = phi block_326: ssa_1886, block_327: ssa_1884
											vec1 32 ssa_1889 = ishl ssa_1865.y, ssa_30
											vec1 32 ssa_1890 = iadd ssa_1878, ssa_1889
											vec1 32 ssa_1891 = flt ssa_5.y, ssa_1
											/* succs: block_329 block_330 */
											if ssa_1891 {
												block block_329:
												/* preds: block_328 */
												vec1 32 ssa_1892 = iadd ssa_1890, ssa_1865.z
												/* succs: block_331 */
											} else {
												block block_330:
												/* preds: block_328 */
												/* succs: block_331 */
											}
											block block_331:
											/* preds: block_329 block_330 */
											vec1 32 ssa_1893 = phi block_329: ssa_51, block_330: ssa_35
											vec1 32 ssa_1894 = phi block_329: ssa_1892, block_330: ssa_1890
											vec1 32 ssa_1895 = iadd ssa_1866, ssa_1888
											vec1 32 ssa_1896 = ishl ssa_1895, ssa_31
											vec1 32 ssa_1897 = intrinsic load_ssbo (ssa_30, ssa_1896) ()
											vec1 32 ssa_1898 = ishl ssa_1897, ssa_73
											vec1 32 ssa_1899 = extract_u8 ssa_1898, ssa_32
											vec1 32 ssa_1900 = iadd ssa_1866, ssa_1894
											vec1 32 ssa_1901 = ishl ssa_1900, ssa_31
											vec1 32 ssa_1902 = intrinsic load_ssbo (ssa_30, ssa_1901) ()
											vec1 32 ssa_1903 = ishl ssa_1902, ssa_73
											vec1 32 ssa_1904 = extract_u8 ssa_1903, ssa_32
											vec1 32 ssa_1905 = ushr ssa_1902, ssa_72
											vec1 32 ssa_1906 = ushr ssa_1897, ssa_72
											vec1 32 ssa_1907 = iadd ssa_1906, ssa_1866
											/* succs: block_332 */
											loop {
												block block_332:
												/* preds: block_331 block_359 */
												vec1 32 ssa_1908 = phi block_331: ssa_1907, block_359: ssa_1999
												vec1 32 ssa_1909 = phi block_331: ssa_37, block_359: ssa_1997
												vec1 32 ssa_1910 = phi block_331: ssa_1, block_359: ssa_1998
												vec1 32 ssa_1911 = phi block_331: ssa_1, block_359: ssa_2000
												vec1 32 ssa_1912 = uge ssa_1911, ssa_1899
												/* succs: block_333 block_334 */
												if ssa_1912 {
													block block_333:
													/* preds: block_332 */
													break
													/* succs: block_360 */
												} else {
													block block_334:
													/* preds: block_332 */
													/* succs: block_335 */
												}
												block block_335:
												/* preds: block_334 */
												vec1 32 ssa_1913 = ishl ssa_1908, ssa_31
												vec1 32 ssa_1914 = intrinsic load_ssbo (ssa_30, ssa_1913) ()
												vec1 32 ssa_1915 = unpack_half_2x16_split_x ssa_1914
												vec1 32 ssa_1916 = unpack_half_2x16_split_y ssa_1914
												vec1 32 ssa_1917 = fadd ssa_1915, -ssa_5.x
												vec1 32 ssa_1918 = fadd ssa_1916, -ssa_5.y
												vec1 32 ssa_1919 = iadd ssa_1908, ssa_30
												vec1 32 ssa_1920 = ishl ssa_1919, ssa_31
												vec1 32 ssa_1921 = intrinsic load_ssbo (ssa_30, ssa_1920) ()
												vec1 32 ssa_1922 = unpack_half_2x16_split_x ssa_1921
												vec1 32 ssa_1923 = unpack_half_2x16_split_y ssa_1921
												vec1 32 ssa_1924 = fadd ssa_1922, -ssa_5.x
												vec1 32 ssa_1925 = fadd ssa_1923, -ssa_5.y
												vec1 32 ssa_1926 = iadd ssa_1908, ssa_31
												vec1 32 ssa_1927 = ishl ssa_1926, ssa_31
												vec1 32 ssa_1928 = intrinsic load_ssbo (ssa_30, ssa_1927) ()
												vec1 32 ssa_1929 = unpack_half_2x16_split_x ssa_1928
												vec1 32 ssa_1930 = unpack_half_2x16_split_y ssa_1928
												vec1 32 ssa_1931 = fadd ssa_1929, -ssa_5.x
												vec1 32 ssa_1932 = fadd ssa_1930, -ssa_5.y
												vec1 32 ssa_1933 = flt ssa_1, ssa_1887
												/* succs: block_336 block_337 */
												if ssa_1933 {
													block block_336:
													/* preds: block_335 */
													vec1 32 ssa_1934 = fmax ssa_1924, ssa_1931
													vec1 32 ssa_1935 = fmax ssa_1917, ssa_1934
													vec1 32 ssa_1936 = fmul ssa_1935, ssa_1869
													vec1 32 ssa_1937 = flt ssa_1936, ssa_64
													/* succs: block_338 */
												} else {
													block block_337:
													/* preds: block_335 */
													/* succs: block_338 */
												}
												block block_338:
												/* preds: block_336 block_337 */
												vec1 32 ssa_1938 = phi block_336: ssa_1937, block_337: ssa_1
												/* succs: block_339 block_340 */
												if ssa_1938 {
													block block_339:
													/* preds: block_338 */
													break
													/* succs: block_360 */
												} else {
													block block_340:
													/* preds: block_338 */
													/* succs: block_341 */
												}
												block block_341:
												/* preds: block_340 */
												vec1 32 ssa_1939 = flt ssa_1887, ssa_1
												/* succs: block_342 block_343 */
												if ssa_1939 {
													block block_342:
													/* preds: block_341 */
													vec1 32 ssa_1940 = fmin ssa_1924, ssa_1931
													vec1 32 ssa_1941 = fmin ssa_1917, ssa_1940
													vec1 32 ssa_1942 = fmul ssa_1941, ssa_1869
													vec1 32 ssa_1943 = flt ssa_37, ssa_1942
													/* succs: block_344 */
												} else {
													block block_343:
													/* preds: block_341 */
													/* succs: block_344 */
												}
												block block_344:
												/* preds: block_342 block_343 */
												vec1 32 ssa_1944 = phi block_342: ssa_1943, block_343: ssa_1
												/* succs: block_345 block_346 */
												if ssa_1944 {
													block block_345:
													/* preds: block_344 */
													break
													/* succs: block_360 */
												} else {
													block block_346:
													/* preds: block_344 */
													/* succs: block_347 */
												}
												block block_347:
												/* preds: block_346 */
												vec1 32 ssa_1945 = flt ssa_1, ssa_1918
												vec1 32 ssa_1946 = bcsel ssa_1945, ssa_31, ssa_1
												vec1 32 ssa_1947 = flt ssa_1, ssa_1925
												vec1 32 ssa_1948 = bcsel ssa_1947, ssa_71, ssa_1
												vec1 32 ssa_1949 = flt ssa_1, ssa_1932
												vec1 32 ssa_1950 = bcsel ssa_1949, ssa_72, ssa_1
												vec1 32 ssa_1951 = ior ssa_1946, ssa_1948
												vec1 32 ssa_1952 = ior ssa_1951, ssa_1950
												vec1 32 ssa_1953 = ushr ssa_82, ssa_1952
												vec1 32 ssa_1954 = iand ssa_1953, ssa_32
												vec1 32 ssa_1955 = ine ssa_1954, ssa_1
												/* succs: block_348 block_358 */
												if ssa_1955 {
													block block_348:
													/* preds: block_347 */
													vec1 32 ssa_1956 = ffma -ssa_33, ssa_1924, ssa_1917
													vec1 32 ssa_1957 = ffma -ssa_33, ssa_1925, ssa_1918
													vec1 32 ssa_1958 = fadd ssa_1956, ssa_1931
													vec1 32 ssa_1959 = fadd ssa_1957, ssa_1932
													vec1 32 ssa_1960 = fadd ssa_1917, -ssa_1924
													vec1 32 ssa_1961 = fadd ssa_1918, -ssa_1925
													vec1 32 ssa_1962 = frcp ssa_1959
													vec1 32 ssa_1963 = fmul ssa_1959, ssa_1918
													vec1 32 ssa_1964 = ffma ssa_1961, ssa_1961, -ssa_1963
													vec1 32 ssa_1965 = fmax ssa_1964, ssa_1
													vec1 32 ssa_1966 = fsqrt ssa_1965
													vec1 32 ssa_1967 = fadd ssa_1961, -ssa_1966
													vec1 32 ssa_1968 = fmul ssa_1967, ssa_1962
													vec1 32 ssa_1969 = fadd ssa_1961, ssa_1966
													vec1 32 ssa_1970 = fmul ssa_1969, ssa_1962
													vec1 32 ssa_1971 = flt abs(ssa_1959), ssa_83
													/* succs: block_349 block_350 */
													if ssa_1971 {
														block block_349:
														/* preds: block_348 */
														vec1 32 ssa_1972 = fmul ssa_37, ssa_1918
														vec1 32 ssa_1973 = frcp ssa_1961
														vec1 32 ssa_1974 = fmul ssa_1972, ssa_1973
														/* succs: block_351 */
													} else {
														block block_350:
														/* preds: block_348 */
														/* succs: block_351 */
													}
													block block_351:
													/* preds: block_349 block_350 */
													vec1 32 ssa_1975 = phi block_349: ssa_1974, block_350: ssa_1970
													vec1 32 ssa_1976 = phi block_349: ssa_1974, block_350: ssa_1968
													vec1 32 ssa_1977 = fmul ssa_1960, ssa_33
													vec1 32 ssa_1978 = ffma ssa_1958, ssa_1976, -ssa_1977
													vec1 32 ssa_1979 = ffma ssa_1978, ssa_1976, ssa_1917
													vec1 32 ssa_1980 = ffma ssa_1958, ssa_1975, -ssa_1977
													vec1 32 ssa_1981 = ffma ssa_1980, ssa_1975, ssa_1917
													vec1 32 ssa_1982 = fmul ssa_1869, ssa_1979
													vec1 32 ssa_1983 = fmul ssa_1869, ssa_1981
													vec1 32 ssa_1984 = iand ssa_1954, ssa_30
													vec1 32 ssa_1985 = ine ssa_1984, ssa_1
													/* succs: block_352 block_353 */
													if ssa_1985 {
														block block_352:
														/* preds: block_351 */
														vec1 32 ssa_1986 = ffma.sat ssa_1982, ssa_1887, ssa_37
														vec1 32 ssa_1987 = fadd ssa_1910, ssa_1986
														vec1 32 ssa_1988 = fmin ssa_1909, abs(ssa_1982)
														/* succs: block_354 */
													} else {
														block block_353:
														/* preds: block_351 */
														/* succs: block_354 */
													}
													block block_354:
													/* preds: block_352 block_353 */
													vec1 32 ssa_1989 = phi block_352: ssa_1988, block_353: ssa_1909
													vec1 32 ssa_1990 = phi block_352: ssa_1987, block_353: ssa_1910
													vec1 32 ssa_1991 = ult ssa_30, ssa_1954
													/* succs: block_355 block_356 */
													if ssa_1991 {
														block block_355:
														/* preds: block_354 */
														vec1 32 ssa_1992 = ffma.sat ssa_1983, ssa_1887, ssa_37
														vec1 32 ssa_1993 = fadd ssa_1990, -ssa_1992
														vec1 32 ssa_1994 = fmin ssa_1989, abs(ssa_1983)
														/* succs: block_357 */
													} else {
														block block_356:
														/* preds: block_354 */
														/* succs: block_357 */
													}
													block block_357:
													/* preds: block_355 block_356 */
													vec1 32 ssa_1995 = phi block_355: ssa_1994, block_356: ssa_1989
													vec1 32 ssa_1996 = phi block_355: ssa_1993, block_356: ssa_1990
													/* succs: block_359 */
												} else {
													block block_358:
													/* preds: block_347 */
													/* succs: block_359 */
												}
												block block_359:
												/* preds: block_357 block_358 */
												vec1 32 ssa_1997 = phi block_357: ssa_1995, block_358: ssa_1909
												vec1 32 ssa_1998 = phi block_357: ssa_1996, block_358: ssa_1910
												vec1 32 ssa_1999 = iadd ssa_1908, ssa_32
												vec1 32 ssa_2000 = iadd ssa_1911, ssa_30
												/* succs: block_332 */
											}
											block block_360:
											/* preds: block_333 block_339 block_345 */
											vec1 32 ssa_2001 = fmov abs(ssa_1910)
											vec1 32 ssa_2002 = iadd ssa_1905, ssa_1866
											/* succs: block_361 */
											loop {
												block block_361:
												/* preds: block_360 block_388 */
												vec1 32 ssa_2003 = phi block_360: ssa_2002, block_388: ssa_2094
												vec1 32 ssa_2004 = phi block_360: ssa_37, block_388: ssa_2092
												vec1 32 ssa_2005 = phi block_360: ssa_1, block_388: ssa_2093
												vec1 32 ssa_2006 = phi block_360: ssa_1, block_388: ssa_2095
												vec1 32 ssa_2007 = uge ssa_2006, ssa_1904
												/* succs: block_362 block_363 */
												if ssa_2007 {
													block block_362:
													/* preds: block_361 */
													break
													/* succs: block_389 */
												} else {
													block block_363:
													/* preds: block_361 */
													/* succs: block_364 */
												}
												block block_364:
												/* preds: block_363 */
												vec1 32 ssa_2008 = ishl ssa_2003, ssa_31
												vec1 32 ssa_2009 = intrinsic load_ssbo (ssa_30, ssa_2008) ()
												vec1 32 ssa_2010 = unpack_half_2x16_split_x ssa_2009
												vec1 32 ssa_2011 = unpack_half_2x16_split_y ssa_2009
												vec1 32 ssa_2012 = fadd ssa_2010, -ssa_5.y
												vec1 32 ssa_2013 = fadd ssa_2011, -ssa_5.x
												vec1 32 ssa_2014 = iadd ssa_2003, ssa_30
												vec1 32 ssa_2015 = ishl ssa_2014, ssa_31
												vec1 32 ssa_2016 = intrinsic load_ssbo (ssa_30, ssa_2015) ()
												vec1 32 ssa_2017 = unpack_half_2x16_split_x ssa_2016
												vec1 32 ssa_2018 = unpack_half_2x16_split_y ssa_2016
												vec1 32 ssa_2019 = fadd ssa_2017, -ssa_5.y
												vec1 32 ssa_2020 = fadd ssa_2018, -ssa_5.x
												vec1 32 ssa_2021 = iadd ssa_2003, ssa_31
												vec1 32 ssa_2022 = ishl ssa_2021, ssa_31
												vec1 32 ssa_2023 = intrinsic load_ssbo (ssa_30, ssa_2022) ()
												vec1 32 ssa_2024 = unpack_half_2x16_split_x ssa_2023
												vec1 32 ssa_2025 = unpack_half_2x16_split_y ssa_2023
												vec1 32 ssa_2026 = fadd ssa_2024, -ssa_5.y
												vec1 32 ssa_2027 = fadd ssa_2025, -ssa_5.x
												vec1 32 ssa_2028 = flt ssa_1, ssa_1893
												/* succs: block_365 block_366 */
												if ssa_2028 {
													block block_365:
													/* preds: block_364 */
													vec1 32 ssa_2029 = fmax ssa_2019, ssa_2026
													vec1 32 ssa_2030 = fmax ssa_2012, ssa_2029
													vec1 32 ssa_2031 = fmul ssa_2030, ssa_1870
													vec1 32 ssa_2032 = flt ssa_2031, ssa_64
													/* succs: block_367 */
												} else {
													block block_366:
													/* preds: block_364 */
													/* succs: block_367 */
												}
												block block_367:
												/* preds: block_365 block_366 */
												vec1 32 ssa_2033 = phi block_365: ssa_2032, block_366: ssa_1
												/* succs: block_368 block_369 */
												if ssa_2033 {
													block block_368:
													/* preds: block_367 */
													break
													/* succs: block_389 */
												} else {
													block block_369:
													/* preds: block_367 */
													/* succs: block_370 */
												}
												block block_370:
												/* preds: block_369 */
												vec1 32 ssa_2034 = flt ssa_1893, ssa_1
												/* succs: block_371 block_372 */
												if ssa_2034 {
													block block_371:
													/* preds: block_370 */
													vec1 32 ssa_2035 = fmin ssa_2019, ssa_2026
													vec1 32 ssa_2036 = fmin ssa_2012, ssa_2035
													vec1 32 ssa_2037 = fmul ssa_2036, ssa_1870
													vec1 32 ssa_2038 = flt ssa_37, ssa_2037
													/* succs: block_373 */
												} else {
													block block_372:
													/* preds: block_370 */
													/* succs: block_373 */
												}
												block block_373:
												/* preds: block_371 block_372 */
												vec1 32 ssa_2039 = phi block_371: ssa_2038, block_372: ssa_1
												/* succs: block_374 block_375 */
												if ssa_2039 {
													block block_374:
													/* preds: block_373 */
													break
													/* succs: block_389 */
												} else {
													block block_375:
													/* preds: block_373 */
													/* succs: block_376 */
												}
												block block_376:
												/* preds: block_375 */
												vec1 32 ssa_2040 = flt ssa_1, ssa_2013
												vec1 32 ssa_2041 = bcsel ssa_2040, ssa_31, ssa_1
												vec1 32 ssa_2042 = flt ssa_1, ssa_2020
												vec1 32 ssa_2043 = bcsel ssa_2042, ssa_71, ssa_1
												vec1 32 ssa_2044 = flt ssa_1, ssa_2027
												vec1 32 ssa_2045 = bcsel ssa_2044, ssa_72, ssa_1
												vec1 32 ssa_2046 = ior ssa_2041, ssa_2043
												vec1 32 ssa_2047 = ior ssa_2046, ssa_2045
												vec1 32 ssa_2048 = ushr ssa_82, ssa_2047
												vec1 32 ssa_2049 = iand ssa_2048, ssa_32
												vec1 32 ssa_2050 = ine ssa_2049, ssa_1
												/* succs: block_377 block_387 */
												if ssa_2050 {
													block block_377:
													/* preds: block_376 */
													vec1 32 ssa_2051 = ffma -ssa_33, ssa_2019, ssa_2012
													vec1 32 ssa_2052 = ffma -ssa_33, ssa_2020, ssa_2013
													vec1 32 ssa_2053 = fadd ssa_2051, ssa_2026
													vec1 32 ssa_2054 = fadd ssa_2052, ssa_2027
													vec1 32 ssa_2055 = fadd ssa_2012, -ssa_2019
													vec1 32 ssa_2056 = fadd ssa_2013, -ssa_2020
													vec1 32 ssa_2057 = frcp ssa_2054
													vec1 32 ssa_2058 = fmul ssa_2054, ssa_2013
													vec1 32 ssa_2059 = ffma ssa_2056, ssa_2056, -ssa_2058
													vec1 32 ssa_2060 = fmax ssa_2059, ssa_1
													vec1 32 ssa_2061 = fsqrt ssa_2060
													vec1 32 ssa_2062 = fadd ssa_2056, -ssa_2061
													vec1 32 ssa_2063 = fmul ssa_2062, ssa_2057
													vec1 32 ssa_2064 = fadd ssa_2056, ssa_2061
													vec1 32 ssa_2065 = fmul ssa_2064, ssa_2057
													vec1 32 ssa_2066 = flt abs(ssa_2054), ssa_83
													/* succs: block_378 block_379 */
													if ssa_2066 {
														block block_378:
														/* preds: block_377 */
														vec1 32 ssa_2067 = fmul ssa_37, ssa_2013
														vec1 32 ssa_2068 = frcp ssa_2056
														vec1 32 ssa_2069 = fmul ssa_2067, ssa_2068
														/* succs: block_380 */
													} else {
														block block_379:
														/* preds: block_377 */
														/* succs: block_380 */
													}
													block block_380:
													/* preds: block_378 block_379 */
													vec1 32 ssa_2070 = phi block_378: ssa_2069, block_379: ssa_2065
													vec1 32 ssa_2071 = phi block_378: ssa_2069, block_379: ssa_2063
													vec1 32 ssa_2072 = fmul ssa_2055, ssa_33
													vec1 32 ssa_2073 = ffma ssa_2053, ssa_2071, -ssa_2072
													vec1 32 ssa_2074 = ffma ssa_2073, ssa_2071, ssa_2012
													vec1 32 ssa_2075 = ffma ssa_2053, ssa_2070, -ssa_2072
													vec1 32 ssa_2076 = ffma ssa_2075, ssa_2070, ssa_2012
													vec1 32 ssa_2077 = fmul ssa_1870, ssa_2074
													vec1 32 ssa_2078 = fmul ssa_1870, ssa_2076
													vec1 32 ssa_2079 = iand ssa_2049, ssa_30
													vec1 32 ssa_2080 = ine ssa_2079, ssa_1
													/* succs: block_381 block_382 */
													if ssa_2080 {
														block block_381:
														/* preds: block_380 */
														vec1 32 ssa_2081 = ffma.sat ssa_2077, ssa_1893, ssa_37
														vec1 32 ssa_2082 = fadd ssa_2005, ssa_2081
														vec1 32 ssa_2083 = fmin ssa_2004, abs(ssa_2077)
														/* succs: block_383 */
													} else {
														block block_382:
														/* preds: block_380 */
														/* succs: block_383 */
													}
													block block_383:
													/* preds: block_381 block_382 */
													vec1 32 ssa_2084 = phi block_381: ssa_2083, block_382: ssa_2004
													vec1 32 ssa_2085 = phi block_381: ssa_2082, block_382: ssa_2005
													vec1 32 ssa_2086 = ult ssa_30, ssa_2049
													/* succs: block_384 block_385 */
													if ssa_2086 {
														block block_384:
														/* preds: block_383 */
														vec1 32 ssa_2087 = ffma.sat ssa_2078, ssa_1893, ssa_37
														vec1 32 ssa_2088 = fadd ssa_2085, -ssa_2087
														vec1 32 ssa_2089 = fmin ssa_2084, abs(ssa_2078)
														/* succs: block_386 */
													} else {
														block block_385:
														/* preds: block_383 */
														/* succs: block_386 */
													}
													block block_386:
													/* preds: block_384 block_385 */
													vec1 32 ssa_2090 = phi block_384: ssa_2089, block_385: ssa_2084
													vec1 32 ssa_2091 = phi block_384: ssa_2088, block_385: ssa_2085
													/* succs: block_388 */
												} else {
													block block_387:
													/* preds: block_376 */
													/* succs: block_388 */
												}
												block block_388:
												/* preds: block_386 block_387 */
												vec1 32 ssa_2092 = phi block_386: ssa_2090, block_387: ssa_2004
												vec1 32 ssa_2093 = phi block_386: ssa_2091, block_387: ssa_2005
												vec1 32 ssa_2094 = iadd ssa_2003, ssa_32
												vec1 32 ssa_2095 = iadd ssa_2006, ssa_30
												/* succs: block_361 */
											}
											block block_389:
											/* preds: block_362 block_368 block_374 */
											vec1 32 ssa_2096 = fmov abs(ssa_2005)
											/* succs: block_390 block_391 */
											if ssa_1868 {
												block block_390:
												/* preds: block_389 */
												vec1 32 ssa_2097 = fmul ssa_37, abs(ssa_1910)
												vec1 32 ssa_2098 = fmul ssa_37, abs(ssa_2005)
												vec1 32 ssa_2099 = ffract ssa_2097
												vec1 32 ssa_2100 = ffract ssa_2098
												vec1 32 ssa_2101 = fmul ssa_33, ssa_2099
												vec1 32 ssa_2102 = fmul ssa_33, ssa_2100
												/* succs: block_392 */
											} else {
												block block_391:
												/* preds: block_389 */
												/* succs: block_392 */
											}
											block block_392:
											/* preds: block_390 block_391 */
											vec1 32 ssa_2103 = phi block_390: ssa_2101, block_391: ssa_2001
											vec1 32 ssa_2104 = phi block_390: ssa_2102, block_391: ssa_2096
											vec1 32 ssa_2105 = fmin.sat abs(ssa_1909), ssa_37
											vec1 32 ssa_2106 = fmin.sat abs(ssa_2004), ssa_37
											vec1 32 ssa_2107 = ffma -ssa_33, ssa_2105, ssa_35
											vec1 32 ssa_2108 = ffma -ssa_33, ssa_2106, ssa_35
											vec1 32 ssa_2109 = fadd ssa_2107, ssa_2108
											vec1 32 ssa_2110 = flt ssa_85, ssa_2109
											/* succs: block_393 block_394 */
											if ssa_2110 {
												block block_393:
												/* preds: block_392 */
												vec1 32 ssa_2111 = fmul ssa_2104, ssa_2108
												vec1 32 ssa_2112 = ffma ssa_2103, ssa_2107, ssa_2111
												vec1 32 ssa_2113 = frcp ssa_2109
												vec1 32 ssa_2114 = fmul ssa_2112, ssa_2113
												/* succs: block_395 */
											} else {
												block block_394:
												/* preds: block_392 */
												vec1 32 ssa_2115 = fadd ssa_2103, ssa_2104
												vec1 32 ssa_2116 = fmul ssa_37, ssa_2115
												/* succs: block_395 */
											}
											block block_395:
											/* preds: block_393 block_394 */
											vec1 32 ssa_2117 = phi block_393: ssa_2114, block_394: ssa_2116
											vec1 32 ssa_2118 = iand ssa_1865.x, ssa_33
											vec1 32 ssa_2119 = ine ssa_2118, ssa_1
											/* succs: block_396 block_397 */
											if ssa_2119 {
												block block_396:
												/* preds: block_395 */
												vec1 32 ssa_2120 = fadd ssa_35, -ssa_2117
												/* succs: block_398 */
											} else {
												block block_397:
												/* preds: block_395 */
												/* succs: block_398 */
											}
											block block_398:
											/* preds: block_396 block_397 */
											vec1 32 ssa_2121 = phi block_396: ssa_2120, block_397: ssa_2117
											/* succs: block_400 */
										} else {
											block block_399:
											/* preds: block_324 */
											/* succs: block_400 */
										}
										block block_400:
										/* preds: block_398 block_399 */
										vec1 32 ssa_2122 = phi block_398: ssa_2121, block_399: ssa_17
										vec1 32 ssa_2123 = phi block_398: ssa_2121, block_399: ssa_16
										vec1 32 ssa_2124 = phi block_398: ssa_2121, block_399: ssa_15
										vec1 32 ssa_2125 = phi block_398: ssa_2121, block_399: ssa_14
										/* succs: block_401 */
									}
									block block_401:
									/* preds: block_323 block_400 */
									vec1 32 ssa_2126 = phi block_323: ssa_1854, block_400: ssa_2122
									vec1 32 ssa_2127 = phi block_323: ssa_1854, block_400: ssa_2123
									vec1 32 ssa_2128 = phi block_323: ssa_1854, block_400: ssa_2124
									vec1 32 ssa_2129 = phi block_323: ssa_1854, block_400: ssa_2125
									/* succs: block_402 */
								}
								block block_402:
								/* preds: block_197 block_401 */
								vec1 32 ssa_2130 = phi block_197: ssa_1356, block_401: ssa_2126
								vec1 32 ssa_2131 = phi block_197: ssa_1356, block_401: ssa_2127
								vec1 32 ssa_2132 = phi block_197: ssa_1356, block_401: ssa_2128
								vec1 32 ssa_2133 = phi block_197: ssa_1356, block_401: ssa_2129
								/* succs: block_403 */
							}
							block block_403:
							/* preds: block_171 block_402 */
							vec1 32 ssa_2134 = phi block_171: ssa_1218, block_402: ssa_2130
							vec1 32 ssa_2135 = phi block_171: ssa_1218, block_402: ssa_2131
							vec1 32 ssa_2136 = phi block_171: ssa_1218, block_402: ssa_2132
							vec1 32 ssa_2137 = phi block_171: ssa_1218, block_402: ssa_2133
							/* succs: block_404 */
						}
						block block_404:
						/* preds: block_145 block_403 */
						vec1 32 ssa_2138 = phi block_145: ssa_1088, block_403: ssa_2134
						vec1 32 ssa_2139 = phi block_145: ssa_1088, block_403: ssa_2135
						vec1 32 ssa_2140 = phi block_145: ssa_1088, block_403: ssa_2136
						vec1 32 ssa_2141 = phi block_145: ssa_1088, block_403: ssa_2137
						/* succs: block_406 */
					} else {
						block block_405:
						/* preds: block_143 */
						/* succs: block_406 */
					}
					block block_406:
					/* preds: block_404 block_405 */
					vec1 32 ssa_2142 = phi block_405: ssa_35, block_404: ssa_2138
					vec1 32 ssa_2143 = phi block_405: ssa_35, block_404: ssa_2139
					vec1 32 ssa_2144 = phi block_405: ssa_35, block_404: ssa_2140
					vec1 32 ssa_2145 = phi block_405: ssa_35, block_404: ssa_2141
					/* succs: block_408 */
				} else {
					block block_407:
					/* preds: block_142 */
					/* succs: block_408 */
				}
				block block_408:
				/* preds: block_406 block_407 */
				vec1 32 ssa_2146 = phi block_407: ssa_35, block_406: ssa_2142
				vec1 32 ssa_2147 = phi block_407: ssa_35, block_406: ssa_2143
				vec1 32 ssa_2148 = phi block_407: ssa_35, block_406: ssa_2144
				vec1 32 ssa_2149 = phi block_407: ssa_35, block_406: ssa_2145
				/* succs: block_409 */
			}
			block block_409:
			/* preds: block_141 block_408 */
			vec1 32 ssa_2150 = phi block_141: ssa_1073, block_408: ssa_2146
			vec1 32 ssa_2151 = phi block_141: ssa_1073, block_408: ssa_2147
			vec1 32 ssa_2152 = phi block_141: ssa_1073, block_408: ssa_2148
			vec1 32 ssa_2153 = phi block_141: ssa_1073, block_408: ssa_2149
			/* succs: block_410 */
		}
		block block_410:
		/* preds: block_139 block_409 */
		vec1 32 ssa_2154 = phi block_139: ssa_1058, block_409: ssa_2150
		vec1 32 ssa_2155 = phi block_139: ssa_1058, block_409: ssa_2151
		vec1 32 ssa_2156 = phi block_139: ssa_1058, block_409: ssa_2152
		vec1 32 ssa_2157 = phi block_139: ssa_1058, block_409: ssa_2153
		vec1 32 ssa_2158 = fmul ssa_1039, ssa_2154
		vec1 32 ssa_2159 = fmul ssa_1040, ssa_2155
		vec1 32 ssa_2160 = fmul ssa_1041, ssa_2156
		vec1 32 ssa_2161 = fmul ssa_1042, ssa_2157
		/* succs: block_412 */
	} else {
		block block_411:
		/* preds: block_0 */
		/* succs: block_412 */
	}
	block block_412:
	/* preds: block_410 block_411 */
	vec1 32 ssa_2162 = phi block_410: ssa_2158, block_411: ssa_1
	vec1 32 ssa_2163 = phi block_410: ssa_2159, block_411: ssa_1
	vec1 32 ssa_2164 = phi block_410: ssa_2160, block_411: ssa_1
	vec1 32 ssa_2165 = phi block_410: ssa_2161, block_411: ssa_1
	vec4 32 ssa_2166 = intrinsic load_input (ssa_1) (32, 0) /* base=32 */ /* component=0 */	/* fastuidraw_uint_varying1 */
	vec1 32 ssa_2167 = ine ssa_2166.w, ssa_30
	/* succs: block_413 block_456 */
	if ssa_2167 {
		block block_413:
		/* preds: block_412 */
		vec1 32 ssa_2168 = ine ssa_2166.w, ssa_31
		/* succs: block_414 block_454 */
		if ssa_2168 {
			block block_414:
			/* preds: block_413 */
			vec1 32 ssa_2169 = ine ssa_2166.w, ssa_32
			/* succs: block_415 block_452 */
			if ssa_2169 {
				block block_415:
				/* preds: block_414 */
				vec1 32 ssa_2170 = ieq ssa_2166.w, ssa_71
				/* succs: block_416 block_417 */
				if ssa_2170 {
					block block_416:
					/* preds: block_415 */
					vec1 32 ssa_2171 = fadd ssa_35, -ssa_2165
					/* succs: block_451 */
				} else {
					block block_417:
					/* preds: block_415 */
					vec1 32 ssa_2172 = ine ssa_2166.w, ssa_86
					/* succs: block_418 block_449 */
					if ssa_2172 {
						block block_418:
						/* preds: block_417 */
						vec1 32 ssa_2173 = ine ssa_2166.w, ssa_68
						/* succs: block_419 block_447 */
						if ssa_2173 {
							block block_419:
							/* preds: block_418 */
							vec1 32 ssa_2174 = ine ssa_2166.w, ssa_87
							/* succs: block_420 block_445 */
							if ssa_2174 {
								block block_420:
								/* preds: block_419 */
								vec1 32 ssa_2175 = ine ssa_2166.w, ssa_72
								/* succs: block_421 block_443 */
								if ssa_2175 {
									block block_421:
									/* preds: block_420 */
									vec1 32 ssa_2176 = ieq ssa_2166.w, ssa_88
									/* succs: block_422 block_423 */
									if ssa_2176 {
										block block_422:
										/* preds: block_421 */
										vec1 32 ssa_2177 = fadd ssa_35, -ssa_2165
										/* succs: block_442 */
									} else {
										block block_423:
										/* preds: block_421 */
										vec1 32 ssa_2178 = ieq ssa_2166.w, ssa_52
										/* succs: block_424 block_425 */
										if ssa_2178 {
											block block_424:
											/* preds: block_423 */
											vec1 32 ssa_2179 = fadd ssa_35, -ssa_2165
											/* succs: block_441 */
										} else {
											block block_425:
											/* preds: block_423 */
											vec1 32 ssa_2180 = ine ssa_2166.w, ssa_89
											/* succs: block_426 block_439 */
											if ssa_2180 {
												block block_426:
												/* preds: block_425 */
												vec1 32 ssa_2181 = ieq ssa_2166.w, ssa_90
												/* succs: block_427 block_428 */
												if ssa_2181 {
													block block_427:
													/* preds: block_426 */
													vec1 32 ssa_2182 = fadd ssa_35, -ssa_2165
													/* succs: block_438 */
												} else {
													block block_428:
													/* preds: block_426 */
													vec1 32 ssa_2183 = ine ssa_2166.w, ssa_91
													/* succs: block_429 block_436 */
													if ssa_2183 {
														block block_429:
														/* preds: block_428 */
														vec1 32 ssa_2184 = ine ssa_2166.w, ssa_29
														/* succs: block_430 block_434 */
														if ssa_2184 {
															block block_430:
															/* preds: block_429 */
															vec1 32 ssa_2185 = ieq ssa_2166.w, ssa_78
															/* succs: block_431 block_432 */
															if ssa_2185 {
																block block_431:
																/* preds: block_430 */
																vec1 32 ssa_2186 = fadd ssa_35, -ssa_2162
																vec1 32 ssa_2187 = fadd ssa_35, -ssa_2163
																vec1 32 ssa_2188 = fadd ssa_35, -ssa_2164
																vec1 32 ssa_2189 = fadd ssa_35, -ssa_2165
																/* succs: block_433 */
															} else {
																block block_432:
																/* preds: block_430 */
																/* succs: block_433 */
															}
															block block_433:
															/* preds: block_431 block_432 */
															vec1 32 ssa_2190 = phi block_431: ssa_2186, block_432: ssa_13
															vec1 32 ssa_2191 = phi block_431: ssa_2187, block_432: ssa_12
															vec1 32 ssa_2192 = phi block_431: ssa_2188, block_432: ssa_11
															vec1 32 ssa_2193 = phi block_431: ssa_2189, block_432: ssa_10
															vec1 32 ssa_2194 = phi block_431: ssa_2162, block_432: ssa_9
															vec1 32 ssa_2195 = phi block_431: ssa_2163, block_432: ssa_8
															vec1 32 ssa_2196 = phi block_431: ssa_2164, block_432: ssa_7
															vec1 32 ssa_2197 = phi block_431: ssa_2165, block_432: ssa_6
															/* succs: block_435 */
														} else {
															block block_434:
															/* preds: block_429 */
															/* succs: block_435 */
														}
														block block_435:
														/* preds: block_433 block_434 */
														vec1 32 ssa_2198 = phi block_434: ssa_2162, block_433: ssa_2190
														vec1 32 ssa_2199 = phi block_434: ssa_2163, block_433: ssa_2191
														vec1 32 ssa_2200 = phi block_434: ssa_2164, block_433: ssa_2192
														vec1 32 ssa_2201 = phi block_434: ssa_2165, block_433: ssa_2193
														vec1 32 ssa_2202 = phi block_434: ssa_1, block_433: ssa_2194
														vec1 32 ssa_2203 = phi block_434: ssa_1, block_433: ssa_2195
														vec1 32 ssa_2204 = phi block_434: ssa_1, block_433: ssa_2196
														vec1 32 ssa_2205 = phi block_434: ssa_1, block_433: ssa_2197
														/* succs: block_437 */
													} else {
														block block_436:
														/* preds: block_428 */
														/* succs: block_437 */
													}
													block block_437:
													/* preds: block_435 block_436 */
													vec1 32 ssa_2206 = phi block_436: ssa_35, block_435: ssa_2198
													vec1 32 ssa_2207 = phi block_436: ssa_35, block_435: ssa_2199
													vec1 32 ssa_2208 = phi block_436: ssa_35, block_435: ssa_2200
													vec1 32 ssa_2209 = phi block_436: ssa_35, block_435: ssa_2201
													vec1 32 ssa_2210 = phi block_436: ssa_2162, block_435: ssa_2202
													vec1 32 ssa_2211 = phi block_436: ssa_2163, block_435: ssa_2203
													vec1 32 ssa_2212 = phi block_436: ssa_2164, block_435: ssa_2204
													vec1 32 ssa_2213 = phi block_436: ssa_2165, block_435: ssa_2205
													/* succs: block_438 */
												}
												block block_438:
												/* preds: block_427 block_437 */
												vec1 32 ssa_2214 = phi block_427: ssa_2182, block_437: ssa_2206
												vec1 32 ssa_2215 = phi block_427: ssa_2182, block_437: ssa_2207
												vec1 32 ssa_2216 = phi block_427: ssa_2182, block_437: ssa_2208
												vec1 32 ssa_2217 = phi block_427: ssa_2182, block_437: ssa_2209
												vec1 32 ssa_2218 = phi block_427: ssa_2162, block_437: ssa_2210
												vec1 32 ssa_2219 = phi block_427: ssa_2163, block_437: ssa_2211
												vec1 32 ssa_2220 = phi block_427: ssa_2164, block_437: ssa_2212
												vec1 32 ssa_2221 = phi block_427: ssa_2165, block_437: ssa_2213
												/* succs: block_440 */
											} else {
												block block_439:
												/* preds: block_425 */
												/* succs: block_440 */
											}
											block block_440:
											/* preds: block_438 block_439 */
											vec1 32 ssa_2222 = phi block_439: ssa_2165, block_438: ssa_2214
											vec1 32 ssa_2223 = phi block_439: ssa_2165, block_438: ssa_2215
											vec1 32 ssa_2224 = phi block_439: ssa_2165, block_438: ssa_2216
											vec1 32 ssa_2225 = phi block_439: ssa_2165, block_438: ssa_2217
											vec1 32 ssa_2226 = phi block_439: ssa_2162, block_438: ssa_2218
											vec1 32 ssa_2227 = phi block_439: ssa_2163, block_438: ssa_2219
											vec1 32 ssa_2228 = phi block_439: ssa_2164, block_438: ssa_2220
											vec1 32 ssa_2229 = phi block_439: ssa_2165, block_438: ssa_2221
											/* succs: block_441 */
										}
										block block_441:
										/* preds: block_424 block_440 */
										vec1 32 ssa_2230 = phi block_424: ssa_2179, block_440: ssa_2222
										vec1 32 ssa_2231 = phi block_424: ssa_2179, block_440: ssa_2223
										vec1 32 ssa_2232 = phi block_424: ssa_2179, block_440: ssa_2224
										vec1 32 ssa_2233 = phi block_424: ssa_2179, block_440: ssa_2225
										vec1 32 ssa_2234 = phi block_424: ssa_2162, block_440: ssa_2226
										vec1 32 ssa_2235 = phi block_424: ssa_2163, block_440: ssa_2227
										vec1 32 ssa_2236 = phi block_424: ssa_2164, block_440: ssa_2228
										vec1 32 ssa_2237 = phi block_424: ssa_2165, block_440: ssa_2229
										/* succs: block_442 */
									}
									block block_442:
									/* preds: block_422 block_441 */
									vec1 32 ssa_2238 = phi block_422: ssa_2177, block_441: ssa_2230
									vec1 32 ssa_2239 = phi block_422: ssa_2177, block_441: ssa_2231
									vec1 32 ssa_2240 = phi block_422: ssa_2177, block_441: ssa_2232
									vec1 32 ssa_2241 = phi block_422: ssa_2177, block_441: ssa_2233
									vec1 32 ssa_2242 = phi block_422: ssa_1, block_441: ssa_2234
									vec1 32 ssa_2243 = phi block_422: ssa_1, block_441: ssa_2235
									vec1 32 ssa_2244 = phi block_422: ssa_1, block_441: ssa_2236
									vec1 32 ssa_2245 = phi block_422: ssa_1, block_441: ssa_2237
									/* succs: block_444 */
								} else {
									block block_443:
									/* preds: block_420 */
									/* succs: block_444 */
								}
								block block_444:
								/* preds: block_442 block_443 */
								vec1 32 ssa_2246 = phi block_443: ssa_1, block_442: ssa_2238
								vec1 32 ssa_2247 = phi block_443: ssa_1, block_442: ssa_2239
								vec1 32 ssa_2248 = phi block_443: ssa_1, block_442: ssa_2240
								vec1 32 ssa_2249 = phi block_443: ssa_1, block_442: ssa_2241
								vec1 32 ssa_2250 = phi block_443: ssa_2162, block_442: ssa_2242
								vec1 32 ssa_2251 = phi block_443: ssa_2163, block_442: ssa_2243
								vec1 32 ssa_2252 = phi block_443: ssa_2164, block_442: ssa_2244
								vec1 32 ssa_2253 = phi block_443: ssa_2165, block_442: ssa_2245
								/* succs: block_446 */
							} else {
								block block_445:
								/* preds: block_419 */
								/* succs: block_446 */
							}
							block block_446:
							/* preds: block_444 block_445 */
							vec1 32 ssa_2254 = phi block_445: ssa_2165, block_444: ssa_2246
							vec1 32 ssa_2255 = phi block_445: ssa_2165, block_444: ssa_2247
							vec1 32 ssa_2256 = phi block_445: ssa_2165, block_444: ssa_2248
							vec1 32 ssa_2257 = phi block_445: ssa_2165, block_444: ssa_2249
							vec1 32 ssa_2258 = phi block_445: ssa_1, block_444: ssa_2250
							vec1 32 ssa_2259 = phi block_445: ssa_1, block_444: ssa_2251
							vec1 32 ssa_2260 = phi block_445: ssa_1, block_444: ssa_2252
							vec1 32 ssa_2261 = phi block_445: ssa_1, block_444: ssa_2253
							/* succs: block_448 */
						} else {
							block block_447:
							/* preds: block_418 */
							/* succs: block_448 */
						}
						block block_448:
						/* preds: block_446 block_447 */
						vec1 32 ssa_2262 = phi block_447: ssa_1, block_446: ssa_2254
						vec1 32 ssa_2263 = phi block_447: ssa_1, block_446: ssa_2255
						vec1 32 ssa_2264 = phi block_447: ssa_1, block_446: ssa_2256
						vec1 32 ssa_2265 = phi block_447: ssa_1, block_446: ssa_2257
						vec1 32 ssa_2266 = phi block_447: ssa_2162, block_446: ssa_2258
						vec1 32 ssa_2267 = phi block_447: ssa_2163, block_446: ssa_2259
						vec1 32 ssa_2268 = phi block_447: ssa_2164, block_446: ssa_2260
						vec1 32 ssa_2269 = phi block_447: ssa_2165, block_446: ssa_2261
						/* succs: block_450 */
					} else {
						block block_449:
						/* preds: block_417 */
						/* succs: block_450 */
					}
					block block_450:
					/* preds: block_448 block_449 */
					vec1 32 ssa_2270 = phi block_449: ssa_35, block_448: ssa_2262
					vec1 32 ssa_2271 = phi block_449: ssa_35, block_448: ssa_2263
					vec1 32 ssa_2272 = phi block_449: ssa_35, block_448: ssa_2264
					vec1 32 ssa_2273 = phi block_449: ssa_35, block_448: ssa_2265
					vec1 32 ssa_2274 = phi block_449: ssa_2162, block_448: ssa_2266
					vec1 32 ssa_2275 = phi block_449: ssa_2163, block_448: ssa_2267
					vec1 32 ssa_2276 = phi block_449: ssa_2164, block_448: ssa_2268
					vec1 32 ssa_2277 = phi block_449: ssa_2165, block_448: ssa_2269
					/* succs: block_451 */
				}
				block block_451:
				/* preds: block_416 block_450 */
				vec1 32 ssa_2278 = phi block_416: ssa_2171, block_450: ssa_2270
				vec1 32 ssa_2279 = phi block_416: ssa_2171, block_450: ssa_2271
				vec1 32 ssa_2280 = phi block_416: ssa_2171, block_450: ssa_2272
				vec1 32 ssa_2281 = phi block_416: ssa_2171, block_450: ssa_2273
				vec1 32 ssa_2282 = phi block_416: ssa_2162, block_450: ssa_2274
				vec1 32 ssa_2283 = phi block_416: ssa_2163, block_450: ssa_2275
				vec1 32 ssa_2284 = phi block_416: ssa_2164, block_450: ssa_2276
				vec1 32 ssa_2285 = phi block_416: ssa_2165, block_450: ssa_2277
				/* succs: block_453 */
			} else {
				block block_452:
				/* preds: block_414 */
				/* succs: block_453 */
			}
			block block_453:
			/* preds: block_451 block_452 */
			vec1 32 ssa_2286 = phi block_452: ssa_35, block_451: ssa_2278
			vec1 32 ssa_2287 = phi block_452: ssa_35, block_451: ssa_2279
			vec1 32 ssa_2288 = phi block_452: ssa_35, block_451: ssa_2280
			vec1 32 ssa_2289 = phi block_452: ssa_35, block_451: ssa_2281
			vec1 32 ssa_2290 = phi block_452: ssa_1, block_451: ssa_2282
			vec1 32 ssa_2291 = phi block_452: ssa_1, block_451: ssa_2283
			vec1 32 ssa_2292 = phi block_452: ssa_1, block_451: ssa_2284
			vec1 32 ssa_2293 = phi block_452: ssa_1, block_451: ssa_2285
			/* succs: block_455 */
		} else {
			block block_454:
			/* preds: block_413 */
			/* succs: block_455 */
		}
		block block_455:
		/* preds: block_453 block_454 */
		vec1 32 ssa_2294 = phi block_454: ssa_1, block_453: ssa_2286
		vec1 32 ssa_2295 = phi block_454: ssa_1, block_453: ssa_2287
		vec1 32 ssa_2296 = phi block_454: ssa_1, block_453: ssa_2288
		vec1 32 ssa_2297 = phi block_454: ssa_1, block_453: ssa_2289
		vec1 32 ssa_2298 = phi block_454: ssa_2162, block_453: ssa_2290
		vec1 32 ssa_2299 = phi block_454: ssa_2163, block_453: ssa_2291
		vec1 32 ssa_2300 = phi block_454: ssa_2164, block_453: ssa_2292
		vec1 32 ssa_2301 = phi block_454: ssa_2165, block_453: ssa_2293
		/* succs: block_457 */
	} else {
		block block_456:
		/* preds: block_412 */
		/* succs: block_457 */
	}
	block block_457:
	/* preds: block_455 block_456 */
	vec1 32 ssa_2302 = phi block_456: ssa_1, block_455: ssa_2294
	vec1 32 ssa_2303 = phi block_456: ssa_1, block_455: ssa_2295
	vec1 32 ssa_2304 = phi block_456: ssa_1, block_455: ssa_2296
	vec1 32 ssa_2305 = phi block_456: ssa_1, block_455: ssa_2297
	vec1 32 ssa_2306 = phi block_456: ssa_1, block_455: ssa_2298
	vec1 32 ssa_2307 = phi block_456: ssa_1, block_455: ssa_2299
	vec1 32 ssa_2308 = phi block_456: ssa_1, block_455: ssa_2300
	vec1 32 ssa_2309 = phi block_456: ssa_1, block_455: ssa_2301
	vec4 32 ssa_2310 = vec4 ssa_2306, ssa_2307, ssa_2308, ssa_2309
	vec4 32 ssa_2311 = vec4 ssa_2302, ssa_2303, ssa_2304, ssa_2305
	intrinsic store_output (ssa_2310, ssa_1) (8, 15, 0) /* base=8 */ /* wrmask=xyzw */ /* component=0 */	/* fastuidraw_final_color0 */
	intrinsic store_output (ssa_2311, ssa_1) (9, 15, 0) /* base=9 */ /* wrmask=xyzw */ /* component=0 */	/* fastuidraw_final_color1 */
	/* succs: block_0 */
	block block_0:
}

NIR (final form) for fragment shader:
shader: MESA_SHADER_FRAGMENT
name: GLSL1
inputs: 0
outputs: 0
uniforms: 16
shared: 0
decl_var shader_storage INTERP_MODE_NONE restrict readonly uvec4[] fastuidraw_painterStore (0, 0, 0)
decl_var shader_storage INTERP_MODE_NONE restrict readonly uint[] fastuidraw_glyphDataStore_data (0, 0, 1)
decl_var uniform INTERP_MODE_NONE vec4[2] fastuidraw_uniforms (0, 0, 0)
decl_var uniform INTERP_MODE_NONE sampler1DArray fastuidraw_colorStopAtlas (3, 0, 0)
decl_var uniform INTERP_MODE_NONE sampler2DArray fastuidraw_imageAtlasLinear (4, 0, 2)
decl_var uniform INTERP_MODE_NONE sampler2DArray fastuidraw_imageAtlasNearest (5, 0, 1)
decl_var uniform INTERP_MODE_NONE usampler2DArray fastuidraw_imageIndexAtlas (6, 0, 3)
decl_var uniform INTERP_MODE_NONE sampler2D[8] fastuidraw_external_texture (7, 0, 5)
decl_var uniform INTERP_MODE_NONE sampler2D fastuidraw_deferred_coverage_buffer (8, 0, 4)
decl_var uniform INTERP_MODE_NONE vec4 gl_FbWposYTransform (0, 0, 0)
decl_var shader_in INTERP_MODE_SMOOTH vec4 gl_FragCoord (VARYING_SLOT_POS, 0, 0)
decl_var shader_in INTERP_MODE_FLAT uvec4 fastuidraw_uint_varying0 (VARYING_SLOT_VAR0, 31, 0)
decl_var shader_in INTERP_MODE_FLAT uvec4 fastuidraw_uint_varying1 (VARYING_SLOT_VAR1, 32, 0)
decl_var shader_in INTERP_MODE_FLAT uvec4 fastuidraw_uint_varying2 (VARYING_SLOT_VAR2, 33, 0)
decl_var shader_in INTERP_MODE_SMOOTH vec4 fastuidraw_float_smooth_varying0 (VARYING_SLOT_VAR3, 34, 0)
decl_var shader_in INTERP_MODE_SMOOTH vec4 fastuidraw_float_smooth_varying1 (VARYING_SLOT_VAR4, 35, 0)
decl_var shader_in INTERP_MODE_SMOOTH float fastuidraw_float_smooth_varying2 (VARYING_SLOT_VAR5.x, 36, 0)
decl_var shader_in INTERP_MODE_FLAT vec4 fastuidraw_float_flat_varying0 (VARYING_SLOT_VAR6, 37, 0)
decl_var shader_in INTERP_MODE_FLAT vec4 fastuidraw_float_flat_varying1 (VARYING_SLOT_VAR7, 38, 0)
decl_var shader_in INTERP_MODE_FLAT vec4 fastuidraw_float_flat_varying2 (VARYING_SLOT_VAR8, 39, 0)
decl_var shader_in INTERP_MODE_FLAT vec4 fastuidraw_float_flat_varying3 (VARYING_SLOT_VAR9, 40, 0)
decl_var shader_in INTERP_MODE_FLAT vec4 fastuidraw_float_flat_varying4 (VARYING_SLOT_VAR10, 41, 0)
decl_var shader_in INTERP_MODE_FLAT vec3 fastuidraw_float_flat_varying5 (VARYING_SLOT_VAR11.xyz, 42, 0)
decl_var shader_out INTERP_MODE_NONE vec4 fastuidraw_final_color0 (FRAG_RESULT_DATA0, 8, 0)
decl_var shader_out INTERP_MODE_NONE vec4 fastuidraw_final_color1 (FRAG_RESULT_DATA0, 9, 0)
decl_function main (0 params)

impl main {
	decl_reg vec1 32 r0
	decl_reg vec1 32 r1
	decl_reg vec1 32 r2
	decl_reg vec1 32 r3
	decl_reg vec1 32 r4
	decl_reg vec1 32 r5
	decl_reg vec1 32 r6
	decl_reg vec1 32 r7
	decl_reg vec1 32 r8
	decl_reg vec1 32 r9
	decl_reg vec1 32 r10
	decl_reg vec1 32 r11
	decl_reg vec1 32 r12
	decl_reg vec1 32 r13
	decl_reg vec1 32 r14
	decl_reg vec1 32 r15
	decl_reg vec1 32 r16
	decl_reg vec1 32 r17
	decl_reg vec1 32 r18
	decl_reg vec1 32 r19
	decl_reg vec1 32 r20
	decl_reg vec1 32 r21
	decl_reg vec1 32 r22
	decl_reg vec1 32 r23
	decl_reg vec1 32 r24
	decl_reg vec1 32 r25
	decl_reg vec1 32 r26
	decl_reg vec1 32 r27
	decl_reg vec1 32 r28
	decl_reg vec1 32 r29
	decl_reg vec1 32 r30
	decl_reg vec4 32 r31
	decl_reg vec1 32 r32
	decl_reg vec1 32 r33
	decl_reg vec4 32 r34
	decl_reg vec1 32 r35
	decl_reg vec1 32 r36
	decl_reg vec4 32 r37
	decl_reg vec1 32 r38
	decl_reg vec1 32 r39
	decl_reg vec1 32 r40
	decl_reg vec1 32 r41
	decl_reg vec4 32 r42
	decl_reg vec1 32 r43
	decl_reg vec1 32 r44
	decl_reg vec4 32 r45
	decl_reg vec4 32 r46
	decl_reg vec4 32 r47
	decl_reg vec4 32 r48
	decl_reg vec1 32 r49
	decl_reg vec1 32 r50
	decl_reg vec1 32 r51
	decl_reg vec1 32 r52
	decl_reg vec4 32 r53
	decl_reg vec1 32 r54
	decl_reg vec1 32 r55
	decl_reg vec1 32 r56
	decl_reg vec1 32 r57
	decl_reg vec4 32 r58
	decl_reg vec1 32 r59
	decl_reg vec1 32 r60
	decl_reg vec1 32 r61
	decl_reg vec4 32 r62
	decl_reg vec1 32 r63
	decl_reg vec1 32 r64
	decl_reg vec1 32 r65
	decl_reg vec4 32 r66
	decl_reg vec1 32 r67
	decl_reg vec1 32 r68
	decl_reg vec1 32 r69
	decl_reg vec1 32 r70
	decl_reg vec1 32 r71
	decl_reg vec1 32 r72
	decl_reg vec1 32 r73
	decl_reg vec1 32 r74
	decl_reg vec1 32 r75
	decl_reg vec1 32 r76
	decl_reg vec1 32 r77
	decl_reg vec1 32 r78
	decl_reg vec1 32 r79
	decl_reg vec1 32 r80
	decl_reg vec1 32 r81
	decl_reg vec1 32 r82
	decl_reg vec1 32 r83
	decl_reg vec1 32 r84
	decl_reg vec1 32 r85
	decl_reg vec1 32 r86
	decl_reg vec1 32 r87
	decl_reg vec1 32 r88
	decl_reg vec1 32 r89
	decl_reg vec1 32 r90
	decl_reg vec1 32 r91
	decl_reg vec1 32 r92
	decl_reg vec1 32 r93
	decl_reg vec1 32 r94
	decl_reg vec1 32 r95
	decl_reg vec1 32 r96
	decl_reg vec1 32 r97
	decl_reg vec1 32 r98
	decl_reg vec1 32 r99
	decl_reg vec1 32 r100
	decl_reg vec1 32 r101
	decl_reg vec1 32 r102
	decl_reg vec1 32 r103
	decl_reg vec1 32 r104
	decl_reg vec1 32 r105
	decl_reg vec1 32 r106
	decl_reg vec1 32 r107
	decl_reg vec1 32 r108
	decl_reg vec1 32 r109
	decl_reg vec1 32 r110
	decl_reg vec1 32 r111
	decl_reg vec1 32 r112
	decl_reg vec1 32 r113
	decl_reg vec1 32 r114
	decl_reg vec1 32 r115
	decl_reg vec1 32 r116
	decl_reg vec1 32 r117
	decl_reg vec1 32 r118
	decl_reg vec1 32 r119
	decl_reg vec1 32 r120
	decl_reg vec1 32 r121
	decl_reg vec1 32 r122
	decl_reg vec1 32 r123
	decl_reg vec1 32 r124
	decl_reg vec1 32 r125
	decl_reg vec1 32 r126
	decl_reg vec1 32 r127
	decl_reg vec1 32 r128
	decl_reg vec1 32 r129
	decl_reg vec1 32 r130
	decl_reg vec1 32 r131
	decl_reg vec1 32 r132
	decl_reg vec1 32 r133
	decl_reg vec1 32 r134
	decl_reg vec1 32 r135
	decl_reg vec1 32 r136
	decl_reg vec1 32 r137
	decl_reg vec1 32 r138
	decl_reg vec1 32 r139
	decl_reg vec1 32 r140
	decl_reg vec1 32 r141
	block block_0:
	/* preds: */
	vec2 32 ssa_0 = intrinsic load_barycentric_pixel () (1) /* interp_mode=1 */
	vec1 32 ssa_1 = load_const (0x00000000 /* 0.000000 */)
	vec4 32 ssa_2 = intrinsic load_interpolated_input (ssa_0, ssa_1) (35, 0) /* base=35 */ /* component=0 */
	r0 = intrinsic load_interpolated_input (ssa_0, ssa_1) (36, 0) /* base=36 */ /* component=0 */
	vec4 32 ssa_4 = intrinsic load_interpolated_input (ssa_0, ssa_1) (0, 0) /* base=0 */ /* component=0 */
	vec4 32 ssa_5 = intrinsic load_interpolated_input (ssa_0, ssa_1) (34, 0) /* base=34 */ /* component=0 */
	vec1 32 ssa_23 = load_const (0x00000010 /* 0.000000 */)
	vec1 32 ssa_24 = load_const (0xffff8000 /* -nan */)
	vec1 32 ssa_25 = load_const (0xffffffff /* -nan */)
	vec1 32 ssa_26 = load_const (0x80000000 /* -0.000000 */)
	vec1 32 ssa_27 = load_const (0x00002000 /* 0.000000 */)
	vec1 32 ssa_28 = load_const (0x0000001e /* 0.000000 */)
	vec1 32 ssa_29 = load_const (0x0000000e /* 0.000000 */)
	vec1 32 ssa_30 = load_const (0x00000001 /* 0.000000 */)
	vec1 32 ssa_31 = load_const (0x00000002 /* 0.000000 */)
	vec1 32 ssa_32 = load_const (0x00000003 /* 0.000000 */)
	vec1 32 ssa_33 = load_const (0x40000000 /* 2.000000 */)
	vec1 32 ssa_34 = load_const (0x00000015 /* 0.000000 */)
	vec1 32 ssa_35 = load_const (0x3f800000 /* 1.000000 */)
	vec1 32 ssa_36 = load_const (0x40800000 /* 4.000000 */)
	vec1 32 ssa_37 = load_const (0x3f000000 /* 0.500000 */)
	vec1 32 ssa_38 = load_const (0x5d5e0b6b /* 999999984306749440.000000 */)
	vec1 32 ssa_39 = load_const (0x3e800000 /* 0.250000 */)
	vec1 32 ssa_40 = load_const (0xbc46c6a5 /* -0.012132 */)
	vec1 32 ssa_41 = load_const (0x3d5be101 /* 0.053681 */)
	vec1 32 ssa_42 = load_const (0xbdf0555d /* -0.117350 */)
	vec1 32 ssa_43 = load_const (0x3e468bc1 /* 0.193892 */)
	vec1 32 ssa_44 = load_const (0xbeaa5476 /* -0.332676 */)
	vec1 32 ssa_45 = load_const (0x3f7ffea5 /* 0.999979 */)
	vec1 32 ssa_46 = load_const (0xc0000000 /* -2.000000 */)
	vec1 32 ssa_47 = load_const (0x3fc90fdb /* 1.570796 */)
	vec1 32 ssa_48 = load_const (0x40c90fdb /* 6.283185 */)
	vec1 32 ssa_49 = load_const (0x3e22f983 /* 0.159155 */)
	vec1 32 ssa_50 = load_const (0x00000013 /* 0.000000 */)
	vec1 32 ssa_51 = load_const (0xbf800000 /* -1.000000 */)
	vec1 32 ssa_52 = load_const (0x0000000a /* 0.000000 */)
	vec1 32 ssa_53 = load_const (0x00000017 /* 0.000000 */)
	vec1 32 ssa_54 = load_const (0x00000019 /* 0.000000 */)
	vec1 32 ssa_55 = load_const (0x40900000 /* 4.500000 */)
	vec1 32 ssa_56 = load_const (0x42000000 /* 32.000000 */)
	vec1 32 ssa_57 = load_const (0x39000000 /* 0.000122 */)
	vec1 32 ssa_58 = load_const (0x3d000000 /* 0.031250 */)
	vec1 32 ssa_59 = load_const (0x41f80000 /* 31.000000 */)
	vec1 32 ssa_60 = load_const (0x40400000 /* 3.000000 */)
	vec1 32 ssa_61 = load_const (0x40c00000 /* 6.000000 */)
	vec1 32 ssa_62 = load_const (0xbfc00000 /* -1.500000 */)
	vec1 32 ssa_63 = load_const (0x40200000 /* 2.500000 */)
	vec1 32 ssa_64 = load_const (0xbf000000 /* -0.500000 */)
	vec1 32 ssa_65 = load_const (0x3fc00000 /* 1.500000 */)
	vec4 32 ssa_66 = load_const (0x3f800000 /* 1.000000 */, 0x3f800000 /* 1.000000 */, 0x3f800000 /* 1.000000 */, 0x3f800000 /* 1.000000 */)
	vec1 32 ssa_67 = load_const (0x01000000 /* 0.000000 */)
	vec1 32 ssa_68 = load_const (0x00000006 /* 0.000000 */)
	vec1 32 ssa_69 = load_const (0x00000012 /* 0.000000 */)
	vec1 32 ssa_70 = load_const (0x00000014 /* 0.000000 */)
	vec1 32 ssa_71 = load_const (0x00000004 /* 0.000000 */)
	vec1 32 ssa_72 = load_const (0x00000008 /* 0.000000 */)
	vec1 32 ssa_73 = load_const (0x00000018 /* 0.000000 */)
	vec1 32 ssa_74 = load_const (0x00000016 /* 0.000000 */)
	vec1 32 ssa_75 = load_const (0x3fffffff /* 2.000000 */)
	vec1 32 ssa_76 = load_const (0x0000001f /* 0.000000 */)
	vec1 32 ssa_77 = load_const (0x00000011 /* 0.000000 */)
	vec1 32 ssa_78 = load_const (0x0000000f /* 0.000000 */)
	vec1 32 ssa_79 = load_const (0x42f00000 /* 120.000000 */)
	vec1 32 ssa_80 = load_const (0x33d6bf95 /* 0.000000 */)
	vec1 32 ssa_81 = load_const (0x00008000 /* 0.000000 */)
	vec1 32 ssa_82 = load_const (0x00002e74 /* 0.000000 */)
	vec1 32 ssa_83 = load_const (0x38d1b717 /* 0.000100 */)
	vec1 32 ssa_84 = load_const (0x3c800000 /* 0.015625 */)
	vec1 32 ssa_85 = load_const (0x3a83126f /* 0.001000 */)
	vec1 32 ssa_86 = load_const (0x00000005 /* 0.000000 */)
	vec1 32 ssa_87 = load_const (0x00000007 /* 0.000000 */)
	vec1 32 ssa_88 = load_const (0x00000009 /* 0.000000 */)
	vec1 32 ssa_89 = load_const (0x0000000b /* 0.000000 */)
	vec1 32 ssa_90 = load_const (0x0000000c /* 0.000000 */)
	vec1 32 ssa_91 = load_const (0x0000000d /* 0.000000 */)
	vec4 32 ssa_92 = intrinsic load_input (ssa_1) (33, 0) /* base=33 */ /* component=0 */	/* fastuidraw_uint_varying2 */
	vec1 32 ssa_93 = ishl ssa_92.w, ssa_23
	vec1 32 ssa_94 = extract_u16 ssa_93, ssa_30
	vec1 32 ssa_95 = extract_u16 ssa_92.w, ssa_30
	vec1 32 ssa_96 = iadd ssa_94, ssa_24
	vec1 32 ssa_97 = iadd ssa_95, ssa_24
	vec1 32 ssa_98 = ine ssa_92.x, ssa_25
	/* succs: block_1 block_411 */
	if ssa_98 {
		block block_1:
		/* preds: block_0 */
		vec1 32 ssa_99 = iand ssa_92.y, ssa_26
		vec1 32 ssa_100 = ine ssa_99, ssa_1
		/* succs: block_2 block_137 */
		if ssa_100 {
			block block_2:
			/* preds: block_1 */
			vec4 32 ssa_101 = intrinsic load_input (ssa_1) (41, 0) /* base=41 */ /* component=0 */	/* fastuidraw_float_flat_varying4 */
			vec3 32 ssa_102 = intrinsic load_input (ssa_1) (42, 0) /* base=42 */ /* component=0 */	/* fastuidraw_float_flat_varying5 */
			vec1 32 ssa_103 = fddx ssa_2.w
			vec1 32 ssa_104 = fddx r0
			vec4 32 ssa_105 = intrinsic load_uniform (ssa_1) (0, 16) /* base=0 */ /* range=16 */	/* fastuidraw_painterStore */
			vec1 32 ssa_106 = fmul ssa_2.w, ssa_105.x
			vec1 32 ssa_107 = fddy ssa_106
			vec1 32 ssa_108 = fmul r0, ssa_105.x
			vec1 32 ssa_109 = fddy ssa_108
			vec1 32 ssa_110 = iand ssa_92.y, ssa_27
			vec1 32 ssa_111 = ine ssa_110, ssa_1
			/* succs: block_3 block_22 */
			if ssa_111 {
				block block_3:
				/* preds: block_2 */
				vec1 32 ssa_112 = ishl ssa_92.y, ssa_23
				vec1 32 ssa_113 = ushr ssa_112, ssa_28
				vec1 32 ssa_114 = ishl ssa_92.y, ssa_29
				vec1 32 ssa_115 = ushr ssa_114, ssa_28
				vec4 32 ssa_116 = intrinsic load_input (ssa_1) (37, 0) /* base=37 */ /* component=0 */	/* fastuidraw_float_flat_varying0 */
				vec1 32 ssa_117 = fadd ssa_2.w, -ssa_116.x
				vec1 32 ssa_118 = fadd r0, -ssa_116.y
				vec1 32 ssa_119 = ieq ssa_113, ssa_30
				/* succs: block_4 block_5 */
				if ssa_119 {
					block block_4:
					/* preds: block_3 */
					vec1 32 ssa_120 = fmax abs(ssa_117), ssa_1
					r18 = fmin ssa_120, ssa_116.z
					/* succs: block_12 */
				} else {
					block block_5:
					/* preds: block_3 */
					vec1 32 ssa_122 = ieq ssa_113, ssa_31
					/* succs: block_6 block_7 */
					if ssa_122 {
						block block_6:
						/* preds: block_5 */
						vec1 32 ssa_123 = frcp ssa_116.z
						vec1 32 ssa_124 = fmul ssa_117, ssa_123
						vec1 32 ssa_125 = ffloor ssa_124
						r18 = ffma -ssa_116.z, ssa_125, ssa_117
						/* succs: block_11 */
					} else {
						block block_7:
						/* preds: block_5 */
						vec1 32 ssa_127 = ieq ssa_113, ssa_32
						/* succs: block_8 block_9 */
						if ssa_127 {
							block block_8:
							/* preds: block_7 */
							vec1 32 ssa_128 = fmul ssa_33, ssa_116.z
							vec1 32 ssa_129 = frcp ssa_128
							vec1 32 ssa_130 = fmul ssa_117, ssa_129
							vec1 32 ssa_131 = ffloor ssa_130
							vec1 32 ssa_132 = ffma -ssa_128, ssa_131, ssa_117
							vec1 32 ssa_133 = fadd ssa_132, -ssa_116.z
							r18 = fadd ssa_116.z, -abs(ssa_133)
							/* succs: block_10 */
						} else {
							block block_9:
							/* preds: block_7 */
							vec1 32 ssa_135 = fmax ssa_117, ssa_1
							r18 = fmin ssa_135, ssa_116.z
							/* succs: block_10 */
						}
						block block_10:
						/* preds: block_8 block_9 */
						/* succs: block_11 */
					}
					block block_11:
					/* preds: block_6 block_10 */
					/* succs: block_12 */
				}
				block block_12:
				/* preds: block_4 block_11 */
				vec1 32 ssa_140 = ieq ssa_115, ssa_30
				/* succs: block_13 block_14 */
				if ssa_140 {
					block block_13:
					/* preds: block_12 */
					vec1 32 ssa_141 = fmax abs(ssa_118), ssa_1
					r19 = fmin ssa_141, ssa_116.w
					/* succs: block_21 */
				} else {
					block block_14:
					/* preds: block_12 */
					vec1 32 ssa_143 = ieq ssa_115, ssa_31
					/* succs: block_15 block_16 */
					if ssa_143 {
						block block_15:
						/* preds: block_14 */
						vec1 32 ssa_144 = frcp ssa_116.w
						vec1 32 ssa_145 = fmul ssa_118, ssa_144
						vec1 32 ssa_146 = ffloor ssa_145
						r19 = ffma -ssa_116.w, ssa_146, ssa_118
						/* succs: block_20 */
					} else {
						block block_16:
						/* preds: block_14 */
						vec1 32 ssa_148 = ieq ssa_115, ssa_32
						/* succs: block_17 block_18 */
						if ssa_148 {
							block block_17:
							/* preds: block_16 */
							vec1 32 ssa_149 = fmul ssa_33, ssa_116.w
							vec1 32 ssa_150 = frcp ssa_149
							vec1 32 ssa_151 = fmul ssa_118, ssa_150
							vec1 32 ssa_152 = ffloor ssa_151
							vec1 32 ssa_153 = ffma -ssa_149, ssa_152, ssa_118
							vec1 32 ssa_154 = fadd ssa_153, -ssa_116.w
							r19 = fadd ssa_116.w, -abs(ssa_154)
							/* succs: block_19 */
						} else {
							block block_18:
							/* preds: block_16 */
							vec1 32 ssa_156 = fmax ssa_118, ssa_1
							r19 = fmin ssa_156, ssa_116.w
							/* succs: block_19 */
						}
						block block_19:
						/* preds: block_17 block_18 */
						/* succs: block_20 */
					}
					block block_20:
					/* preds: block_15 block_19 */
					/* succs: block_21 */
				}
				block block_21:
				/* preds: block_13 block_20 */
				r20 = fadd r18, ssa_116.x
				r0 = fadd r19, ssa_116.y
				/* succs: block_23 */
			} else {
				block block_22:
				/* preds: block_2 */
				r20 = imov ssa_2.w
				/* succs: block_23 */
			}
			block block_23:
			/* preds: block_21 block_22 */
			vec1 32 ssa_166 = ishl ssa_92.y, ssa_34
			vec1 32 ssa_167 = ushr ssa_166, ssa_28
			vec1 32 ssa_168 = ine ssa_167, ssa_1
			/* succs: block_24 block_55 */
			if ssa_168 {
				block block_24:
				/* preds: block_23 */
				vec1 32 ssa_169 = ieq ssa_167, ssa_31
				/* succs: block_25 block_32 */
				if ssa_169 {
					block block_25:
					/* preds: block_24 */
					vec4 32 ssa_170 = intrinsic load_input (ssa_1) (38, 0) /* base=38 */ /* component=0 */	/* fastuidraw_float_flat_varying1 */
					vec1 32 ssa_171 = fadd r20, -ssa_170.x
					vec1 32 ssa_172 = fadd r0, -ssa_170.y
					vec1 32 ssa_173 = fadd ssa_170.z, -ssa_170.x
					vec1 32 ssa_174 = fadd ssa_170.w, -ssa_170.y
					vec4 32 ssa_175 = intrinsic load_input (ssa_1) (39, 0) /* base=39 */ /* component=0 */	/* fastuidraw_float_flat_varying2 */
					vec1 32 ssa_176 = fadd ssa_175.y, -ssa_175.x
					vec1 32 ssa_177 = fmul ssa_172, ssa_174
					vec1 32 ssa_178 = ffma ssa_171, ssa_173, ssa_177
					vec1 32 ssa_179 = ffma -ssa_175.x, ssa_176, ssa_178
					vec1 32 ssa_180 = fmul ssa_33, ssa_179
					vec1 32 ssa_181 = fmul ssa_174, ssa_174
					vec1 32 ssa_182 = ffma ssa_173, ssa_173, ssa_181
					vec1 32 ssa_183 = ffma -ssa_176, ssa_176, ssa_182
					vec1 32 ssa_184 = fmul ssa_172, ssa_172
					vec1 32 ssa_185 = ffma ssa_171, ssa_171, ssa_184
					vec1 32 ssa_186 = ffma -ssa_175.x, ssa_175.x, ssa_185
					vec1 32 ssa_187 = fmul ssa_183, ssa_36
					vec1 32 ssa_188 = fmul ssa_187, ssa_186
					vec1 32 ssa_189 = ffma ssa_180, ssa_180, -ssa_188
					vec1 32 ssa_190 = fge ssa_189, ssa_1
					/* succs: block_26 block_30 */
					if ssa_190 {
						block block_26:
						/* preds: block_25 */
						vec1 32 ssa_191 = fsqrt abs(ssa_189)
						vec1 32 ssa_192 = frcp ssa_183
						vec1 32 ssa_193 = fmul ssa_37, ssa_192
						vec1 32 ssa_194 = fadd -ssa_180, ssa_191
						vec1 32 ssa_195 = fmul ssa_194, ssa_193
						vec1 32 ssa_196 = fadd -ssa_180, -ssa_191
						vec1 32 ssa_197 = fmul ssa_196, ssa_193
						vec1 32 ssa_198 = fge ssa_35, ssa_195
						vec1 32 ssa_199 = fge ssa_195, ssa_1
						vec1 32 ssa_200 = iand ssa_199, ssa_198
						vec1 32 ssa_201 = b2f ssa_200
						vec1 32 ssa_202 = fge ssa_35, ssa_197
						vec1 32 ssa_203 = fge ssa_197, ssa_1
						vec1 32 ssa_204 = iand ssa_203, ssa_202
						vec1 32 ssa_205 = b2f ssa_204
						vec1 32 ssa_206 = feq ssa_201, ssa_205
						/* succs: block_27 block_28 */
						if ssa_206 {
							block block_27:
							/* preds: block_26 */
							r21 = fmax ssa_195, ssa_197
							/* succs: block_29 */
						} else {
							block block_28:
							/* preds: block_26 */
							vec1 32 ssa_208 = fmul ssa_205, ssa_197
							r21 = ffma ssa_201, ssa_195, ssa_208
							/* succs: block_29 */
						}
						block block_29:
						/* preds: block_27 block_28 */
						r17 = imov ssa_35
						/* succs: block_31 */
					} else {
						block block_30:
						/* preds: block_25 */
						r17 = imov ssa_1
						r21 = imov r17
						/* succs: block_31 */
					}
					block block_31:
					/* preds: block_29 block_30 */
					/* succs: block_45 */
				} else {
					block block_32:
					/* preds: block_24 */
					vec1 32 ssa_213 = ieq ssa_167, ssa_30
					/* succs: block_33 block_34 */
					if ssa_213 {
						block block_33:
						/* preds: block_32 */
						vec4 32 ssa_214 = intrinsic load_input (ssa_1) (38, 0) /* base=38 */ /* component=0 */	/* fastuidraw_float_flat_varying1 */
						vec1 32 ssa_215 = fadd ssa_214.z, -ssa_214.x
						vec1 32 ssa_216 = fadd ssa_214.w, -ssa_214.y
						vec1 32 ssa_217 = fadd r20, -ssa_214.x
						vec1 32 ssa_218 = fadd r0, -ssa_214.y
						vec1 32 ssa_219 = fmul ssa_216, ssa_218
						vec1 32 ssa_220 = ffma ssa_215, ssa_217, ssa_219
						vec1 32 ssa_221 = fmul ssa_216, ssa_216
						vec1 32 ssa_222 = ffma ssa_215, ssa_215, ssa_221
						vec1 32 ssa_223 = frcp ssa_222
						r21 = fmul ssa_220, ssa_223
						r17 = imov ssa_35
						/* succs: block_44 */
					} else {
						block block_34:
						/* preds: block_32 */
						vec1 32 ssa_225 = ieq ssa_167, ssa_32
						/* succs: block_35 block_42 */
						if ssa_225 {
							block block_35:
							/* preds: block_34 */
							vec4 32 ssa_226 = intrinsic load_input (ssa_1) (38, 0) /* base=38 */ /* component=0 */	/* fastuidraw_float_flat_varying1 */
							vec1 32 ssa_227 = fadd r20, -ssa_226.x
							vec1 32 ssa_228 = fadd r0, -ssa_226.y
							vec1 32 ssa_229 = fmov abs(ssa_227)
							vec1 32 ssa_230 = fge ssa_1, ssa_227
							vec1 32 ssa_231 = bcsel ssa_230, ssa_229, ssa_228
							vec1 32 ssa_232 = bcsel ssa_230, ssa_228, ssa_229
							vec1 32 ssa_233 = fge abs(ssa_232), ssa_38
							vec1 32 ssa_234 = bcsel ssa_233, ssa_39, ssa_35
							vec1 32 ssa_235 = fmul ssa_232, ssa_234
							vec1 32 ssa_236 = frcp ssa_235
							vec1 32 ssa_237 = fmul ssa_231, ssa_234
							vec1 32 ssa_238 = fmul ssa_237, ssa_236
							vec1 32 ssa_239 = fmov abs(ssa_238)
							vec1 32 ssa_240 = feq abs(ssa_227), abs(ssa_228)
							vec1 32 ssa_241 = bcsel ssa_240, ssa_35, ssa_239
							vec1 32 ssa_242 = fmin abs(ssa_241), ssa_35
							vec1 32 ssa_243 = fmax abs(ssa_241), ssa_35
							vec1 32 ssa_244 = frcp ssa_243
							vec1 32 ssa_245 = fmul ssa_242, ssa_244
							vec1 32 ssa_246 = fmul ssa_245, ssa_245
							vec1 32 ssa_247 = fmul ssa_40, ssa_246
							vec1 32 ssa_248 = fadd ssa_247, ssa_41
							vec1 32 ssa_249 = ffma ssa_248, ssa_246, ssa_42
							vec1 32 ssa_250 = ffma ssa_249, ssa_246, ssa_43
							vec1 32 ssa_251 = ffma ssa_250, ssa_246, ssa_44
							vec1 32 ssa_252 = ffma ssa_251, ssa_246, ssa_45
							vec1 32 ssa_253 = fmul ssa_252, ssa_245
							vec1 32 ssa_254 = flt ssa_35, abs(ssa_241)
							vec1 32 ssa_255 = b2f ssa_254
							vec1 32 ssa_256 = ffma ssa_253, ssa_46, ssa_47
							vec1 32 ssa_257 = ffma ssa_255, ssa_256, ssa_253
							vec1 32 ssa_258 = fsign ssa_241
							vec1 32 ssa_259 = b2f ssa_230
							vec1 32 ssa_260 = fmul ssa_259, ssa_47
							vec1 32 ssa_261 = ffma ssa_257, ssa_258, ssa_260
							vec1 32 ssa_262 = fmin ssa_228, ssa_236
							vec1 32 ssa_263 = fmov -ssa_261
							vec1 32 ssa_264 = flt ssa_262, ssa_1
							r22 = bcsel ssa_264, ssa_263, ssa_261
							vec1 32 ssa_266 = flt r22, ssa_226.z
							/* succs: block_36 block_37 */
							if ssa_266 {
								block block_36:
								/* preds: block_35 */
								r22 = fadd r22, ssa_48
								/* succs: block_38 */
							} else {
								block block_37:
								/* preds: block_35 */
								/* succs: block_38 */
							}
							block block_38:
							/* preds: block_36 block_37 */
							vec1 32 ssa_269 = fadd r22, -ssa_226.z
							r23 = fmul ssa_269, ssa_49
							vec1 32 ssa_271 = flt ssa_226.w, ssa_1
							/* succs: block_39 block_40 */
							if ssa_271 {
								block block_39:
								/* preds: block_38 */
								r23 = fadd ssa_35, -r23
								/* succs: block_41 */
							} else {
								block block_40:
								/* preds: block_38 */
								/* succs: block_41 */
							}
							block block_41:
							/* preds: block_39 block_40 */
							r21 = fmul r23, abs(ssa_226.w)
							r17 = imov ssa_35
							/* succs: block_43 */
						} else {
							block block_42:
							/* preds: block_34 */
							r21 = imov ssa_35
							/* succs: block_43 */
						}
						block block_43:
						/* preds: block_41 block_42 */
						/* succs: block_44 */
					}
					block block_44:
					/* preds: block_33 block_43 */
					/* succs: block_45 */
				}
				block block_45:
				/* preds: block_31 block_44 */
				vec1 32 ssa_281 = ishl ssa_92.y, ssa_50
				vec1 32 ssa_282 = ushr ssa_281, ssa_28
				vec1 32 ssa_283 = ieq ssa_282, ssa_30
				/* succs: block_46 block_47 */
				if ssa_283 {
					block block_46:
					/* preds: block_45 */
					r24 = fmov.sat abs(r21)
					/* succs: block_54 */
				} else {
					block block_47:
					/* preds: block_45 */
					vec1 32 ssa_285 = ieq ssa_282, ssa_31
					/* succs: block_48 block_49 */
					if ssa_285 {
						block block_48:
						/* preds: block_47 */
						r24 = ffract r21
						/* succs: block_53 */
					} else {
						block block_49:
						/* preds: block_47 */
						vec1 32 ssa_287 = ieq ssa_282, ssa_32
						/* succs: block_50 block_51 */
						if ssa_287 {
							block block_50:
							/* preds: block_49 */
							vec1 32 ssa_288 = fmul r21, ssa_37
							vec1 32 ssa_289 = ffloor ssa_288
							vec1 32 ssa_290 = fadd r21, ssa_51
							vec1 32 ssa_291 = ffma -ssa_33, ssa_289, ssa_290
							r24 = fadd ssa_35, -abs(ssa_291)
							/* succs: block_52 */
						} else {
							block block_51:
							/* preds: block_49 */
							r24 = fmov.sat r21
							/* succs: block_52 */
						}
						block block_52:
						/* preds: block_50 block_51 */
						/* succs: block_53 */
					}
					block block_53:
					/* preds: block_48 block_52 */
					/* succs: block_54 */
				}
				block block_54:
				/* preds: block_46 block_53 */
				vec1 32 ssa_297 = ffma r24, ssa_101.z, ssa_101.x
				vec2 32 ssa_298 = vec2 ssa_297, ssa_101.y
				vec4 32 ssa_299 = txl ssa_298 (coord), ssa_1 (lod), 0 (texture), 0 (sampler), 
				vec1 32 ssa_300 = fmul r17, ssa_299.x
				vec1 32 ssa_301 = fmul r17, ssa_299.y
				vec1 32 ssa_302 = fmul r17, ssa_299.z
				vec1 32 ssa_303 = fmul r17, ssa_299.w
				r25 = fmul ssa_101.w, ssa_300
				r26 = fmul ssa_102.x, ssa_301
				r27 = fmul ssa_102.y, ssa_302
				r13 = fmul ssa_102.z, ssa_303
				/* succs: block_56 */
			} else {
				block block_55:
				/* preds: block_23 */
				r25 = imov ssa_101.w
				r26 = imov ssa_102.x
				r27 = imov ssa_102.y
				r13 = imov ssa_102.z
				/* succs: block_56 */
			}
			block block_56:
			/* preds: block_54 block_55 */
			r16 = fmul r25, r13
			r15 = fmul r26, r13
			r14 = fmul r27, r13
			vec1 32 ssa_319 = iand ssa_92.y, ssa_32
			vec1 32 ssa_320 = ine ssa_319, ssa_1
			/* succs: block_57 block_135 */
			if ssa_320 {
				block block_57:
				/* preds: block_56 */
				vec1 32 ssa_321 = fmax r20, ssa_1
				vec4 32 ssa_322 = intrinsic load_input (ssa_1) (40, 0) /* base=40 */ /* component=0 */	/* fastuidraw_float_flat_varying3 */
				vec1 32 ssa_323 = fadd ssa_322.x, ssa_51
				vec1 32 ssa_324 = fmin ssa_321, ssa_323
				vec1 32 ssa_325 = fmax r0, ssa_1
				vec1 32 ssa_326 = fadd ssa_322.y, ssa_51
				vec1 32 ssa_327 = fmin ssa_325, ssa_326
				vec1 32 ssa_328 = ishl ssa_92.y, ssa_52
				vec1 32 ssa_329 = ushr ssa_328, ssa_28
				vec1 32 ssa_330 = ishl ssa_92.y, ssa_28
				vec1 32 ssa_331 = ushr ssa_330, ssa_28
				vec1 32 ssa_332 = ishl ssa_92.y, ssa_53
				vec1 32 ssa_333 = ushr ssa_332, ssa_54
				vec1 32 ssa_334 = ult ssa_1, ssa_333
				/* succs: block_58 block_59 */
				if ssa_334 {
					block block_58:
					/* preds: block_57 */
					vec1 32 ssa_335 = fmul ssa_104, ssa_104
					vec1 32 ssa_336 = ffma ssa_103, ssa_103, ssa_335
					vec1 32 ssa_337 = fmul ssa_109, ssa_109
					vec1 32 ssa_338 = ffma ssa_107, ssa_107, ssa_337
					vec1 32 ssa_339 = fadd ssa_336, ssa_338
					vec1 32 ssa_340 = fmul ssa_339, ssa_37
					vec1 32 ssa_341 = fmax ssa_35, ssa_340
					vec1 32 ssa_342 = flog2 ssa_341
					vec1 32 ssa_343 = fmul ssa_37, ssa_342
					vec1 32 ssa_344 = u2f32 ssa_333
					r28 = fmin ssa_344, ssa_343
					/* succs: block_60 */
				} else {
					block block_59:
					/* preds: block_57 */
					r28 = imov ssa_1
					/* succs: block_60 */
				}
				block block_60:
				/* preds: block_58 block_59 */
				vec1 32 ssa_347 = ieq ssa_329, ssa_1
				/* succs: block_61 block_121 */
				if ssa_347 {
					block block_61:
					/* preds: block_60 */
					vec1 32 ssa_348 = fmin r28, ssa_55
					vec1 32 ssa_349 = ieq ssa_331, ssa_30
					/* succs: block_62 block_68 */
					if ssa_349 {
						block block_62:
						/* preds: block_61 */
						vec1 32 ssa_350 = fceil ssa_348
						vec1 32 ssa_351 = fmax ssa_324, ssa_1
						vec1 32 ssa_352 = fmax ssa_327, ssa_1
						vec1 32 ssa_353 = fmin ssa_351, ssa_322.x
						vec1 32 ssa_354 = fmin ssa_352, ssa_322.y
						vec4 32 ssa_355 = intrinsic load_input (ssa_1) (39, 0) /* base=39 */ /* component=0 */	/* fastuidraw_float_flat_varying2 */
						r29 = ffma ssa_353, ssa_322.z, ssa_355.z
						r30 = ffma ssa_354, ssa_322.z, ssa_355.w
						vec1 32 ssa_358 = f2i32 r29
						vec1 32 ssa_359 = f2i32 r30
						vec4 32 ssa_360 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
						vec3 32 ssa_361 = vec3 ssa_358, ssa_359, ssa_360.w
						r31 = txf ssa_361 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
						vec1 32 ssa_363 = ishl r31.w, ssa_72
						r32 = iadd r31.z, ssa_363
						r33 = imov ssa_30
						/* succs: block_63 */
						loop {
							block block_63:
							/* preds: block_62 block_66 */
							vec4 32 ssa_370 = intrinsic load_input (ssa_1) (32, 0) /* base=32 */ /* component=0 */	/* fastuidraw_uint_varying1 */
							vec1 32 ssa_371 = uge r33, ssa_370.x
							/* succs: block_64 block_65 */
							if ssa_371 {
								block block_64:
								/* preds: block_63 */
								break
								/* succs: block_67 */
							} else {
								block block_65:
								/* preds: block_63 */
								/* succs: block_66 */
							}
							block block_66:
							/* preds: block_65 */
							vec1 32 ssa_372 = ffloor r29
							vec1 32 ssa_373 = ffloor r30
							vec1 32 ssa_374 = fadd r29, -ssa_372
							vec1 32 ssa_375 = fadd r30, -ssa_373
							vec1 32 ssa_376 = u2f32 r31.x
							vec1 32 ssa_377 = u2f32 r31.y
							vec1 32 ssa_378 = fmul ssa_376, ssa_36
							vec1 32 ssa_379 = fmul ssa_377, ssa_36
							r29 = ffma ssa_374, ssa_36, ssa_378
							r30 = ffma ssa_375, ssa_36, ssa_379
							vec1 32 ssa_382 = f2i32 r29
							vec1 32 ssa_383 = f2i32 r30
							vec3 32 ssa_384 = vec3 ssa_382, ssa_383, r32
							r31 = txf ssa_384 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
							vec1 32 ssa_386 = ishl r31.w, ssa_72
							r32 = iadd r31.z, ssa_386
							r33 = iadd r33, ssa_30
							/* succs: block_63 */
						}
						block block_67:
						/* preds: block_64 */
						vec1 32 ssa_389 = ffloor r29
						vec1 32 ssa_390 = ffloor r30
						vec1 32 ssa_391 = fadd r29, -ssa_389
						vec1 32 ssa_392 = fadd r30, -ssa_390
						vec1 32 ssa_393 = u2f32 r31.x
						vec1 32 ssa_394 = u2f32 r31.y
						vec1 32 ssa_395 = fmul ssa_393, ssa_56
						vec1 32 ssa_396 = fmul ssa_394, ssa_56
						vec1 32 ssa_397 = ffma ssa_391, ssa_56, ssa_395
						vec1 32 ssa_398 = ffma ssa_392, ssa_56, ssa_396
						vec1 32 ssa_399 = fmul ssa_397, ssa_57
						vec1 32 ssa_400 = fmul ssa_398, ssa_57
						vec1 32 ssa_401 = u2f32 r32
						vec3 32 ssa_402 = vec3 ssa_399, ssa_400, ssa_401
						r34 = txl ssa_402 (coord), ssa_350 (lod), 2 (texture), 2 (sampler), 
						/* succs: block_120 */
					} else {
						block block_68:
						/* preds: block_61 */
						vec1 32 ssa_404 = flt ssa_37, ssa_348
						vec1 32 ssa_405 = ieq ssa_331, ssa_31
						vec1 32 ssa_406 = ior ssa_405, ssa_404
						/* succs: block_69 block_78 */
						if ssa_406 {
							block block_69:
							/* preds: block_68 */
							vec1 32 ssa_407 = fround_even ssa_348
							vec1 32 ssa_408 = f2i32 ssa_407
							vec1 32 ssa_409 = ishl ssa_30, ssa_408
							vec1 32 ssa_410 = i2f32 ssa_409
							vec1 32 ssa_411 = fmul ssa_37, ssa_410
							vec1 32 ssa_412 = fmax ssa_324, ssa_411
							vec1 32 ssa_413 = fmax ssa_327, ssa_411
							vec1 32 ssa_414 = fadd ssa_322.x, -ssa_411
							vec1 32 ssa_415 = fadd ssa_322.y, -ssa_411
							vec1 32 ssa_416 = fmin ssa_412, ssa_414
							vec1 32 ssa_417 = fmin ssa_413, ssa_415
							vec4 32 ssa_418 = intrinsic load_input (ssa_1) (39, 0) /* base=39 */ /* component=0 */	/* fastuidraw_float_flat_varying2 */
							r35 = ffma ssa_416, ssa_322.z, ssa_418.z
							r36 = ffma ssa_417, ssa_322.z, ssa_418.w
							vec1 32 ssa_421 = fmul ssa_39, r35
							vec1 32 ssa_422 = fmul ssa_39, r36
							vec1 32 ssa_423 = ffloor ssa_421
							vec1 32 ssa_424 = ffloor ssa_422
							vec1 32 ssa_425 = ffma -ssa_36, ssa_423, r35
							vec1 32 ssa_426 = ffma -ssa_36, ssa_424, r36
							vec1 32 ssa_427 = fmul ssa_425, ssa_322.w
							vec1 32 ssa_428 = fmul ssa_426, ssa_322.w
							vec1 32 ssa_429 = fmul ssa_427, ssa_58
							vec1 32 ssa_430 = ffloor ssa_429
							vec1 32 ssa_431 = ffma -ssa_56, ssa_430, ssa_427
							vec1 32 ssa_432 = fmul ssa_428, ssa_58
							vec1 32 ssa_433 = ffloor ssa_432
							vec1 32 ssa_434 = ffma -ssa_56, ssa_433, ssa_428
							vec1 32 ssa_435 = f2i32 r35
							vec1 32 ssa_436 = f2i32 r36
							vec4 32 ssa_437 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
							vec3 32 ssa_438 = vec3 ssa_435, ssa_436, ssa_437.w
							r37 = txf ssa_438 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
							vec1 32 ssa_440 = ishl r37.w, ssa_72
							r38 = iadd r37.z, ssa_440
							r39 = imov ssa_30
							/* succs: block_70 */
							loop {
								block block_70:
								/* preds: block_69 block_73 */
								vec4 32 ssa_447 = intrinsic load_input (ssa_1) (32, 0) /* base=32 */ /* component=0 */	/* fastuidraw_uint_varying1 */
								vec1 32 ssa_448 = uge r39, ssa_447.x
								/* succs: block_71 block_72 */
								if ssa_448 {
									block block_71:
									/* preds: block_70 */
									break
									/* succs: block_74 */
								} else {
									block block_72:
									/* preds: block_70 */
									/* succs: block_73 */
								}
								block block_73:
								/* preds: block_72 */
								vec1 32 ssa_449 = ffloor r35
								vec1 32 ssa_450 = ffloor r36
								vec1 32 ssa_451 = fadd r35, -ssa_449
								vec1 32 ssa_452 = fadd r36, -ssa_450
								vec1 32 ssa_453 = u2f32 r37.x
								vec1 32 ssa_454 = u2f32 r37.y
								vec1 32 ssa_455 = fmul ssa_453, ssa_36
								vec1 32 ssa_456 = fmul ssa_454, ssa_36
								r35 = ffma ssa_451, ssa_36, ssa_455
								r36 = ffma ssa_452, ssa_36, ssa_456
								vec1 32 ssa_459 = f2i32 r35
								vec1 32 ssa_460 = f2i32 r36
								vec3 32 ssa_461 = vec3 ssa_459, ssa_460, r38
								r37 = txf ssa_461 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
								vec1 32 ssa_463 = ishl r37.w, ssa_72
								r38 = iadd r37.z, ssa_463
								r39 = iadd r39, ssa_30
								/* succs: block_70 */
							}
							block block_74:
							/* preds: block_71 */
							vec1 32 ssa_466 = ffloor r35
							vec1 32 ssa_467 = ffloor r36
							vec1 32 ssa_468 = fadd r35, -ssa_466
							vec1 32 ssa_469 = fadd r36, -ssa_467
							vec1 32 ssa_470 = u2f32 r37.x
							vec1 32 ssa_471 = u2f32 r37.y
							vec1 32 ssa_472 = fmul ssa_470, ssa_56
							vec1 32 ssa_473 = fmul ssa_471, ssa_56
							vec1 32 ssa_474 = ffma ssa_468, ssa_56, ssa_472
							vec1 32 ssa_475 = ffma ssa_469, ssa_56, ssa_473
							vec1 32 ssa_476 = fmin -ssa_431, -ssa_434
							vec1 32 ssa_477 = fadd ssa_59, ssa_476
							vec1 32 ssa_478 = fge -ssa_411, -ssa_431
							vec1 32 ssa_479 = fge ssa_477, ssa_411
							vec1 32 ssa_480 = iand ssa_479, ssa_478
							vec1 32 ssa_481 = fge -ssa_411, -ssa_434
							vec1 32 ssa_482 = iand ssa_480, ssa_481
							/* succs: block_75 block_76 */
							if ssa_482 {
								block block_75:
								/* preds: block_74 */
								vec1 32 ssa_483 = fmul ssa_474, ssa_57
								vec1 32 ssa_484 = fmul ssa_475, ssa_57
								vec1 32 ssa_485 = u2f32 r38
								vec3 32 ssa_486 = vec3 ssa_483, ssa_484, ssa_485
								vec1 32 ssa_487 = i2f32 ssa_408
								r34 = txl ssa_486 (coord), ssa_487 (lod), 1 (texture), 1 (sampler), 
								/* succs: block_77 */
							} else {
								block block_76:
								/* preds: block_74 */
								vec1 32 ssa_489 = fmul ssa_474, ssa_57
								vec1 32 ssa_490 = fmul ssa_475, ssa_57
								vec1 32 ssa_491 = u2f32 r38
								vec3 32 ssa_492 = vec3 ssa_489, ssa_490, ssa_491
								vec1 32 ssa_493 = i2f32 ssa_408
								r34 = txl ssa_492 (coord), ssa_493 (lod), 2 (texture), 2 (sampler), 
								/* succs: block_77 */
							}
							block block_77:
							/* preds: block_75 block_76 */
							/* succs: block_119 */
						} else {
							block block_78:
							/* preds: block_68 */
							vec1 32 ssa_496 = fmax ssa_324, ssa_33
							vec1 32 ssa_497 = fmax ssa_327, ssa_33
							vec1 32 ssa_498 = fadd ssa_322.x, ssa_46
							vec1 32 ssa_499 = fadd ssa_322.y, ssa_46
							vec1 32 ssa_500 = fmin ssa_496, ssa_498
							vec1 32 ssa_501 = fmin ssa_497, ssa_499
							vec4 32 ssa_502 = intrinsic load_input (ssa_1) (39, 0) /* base=39 */ /* component=0 */	/* fastuidraw_float_flat_varying2 */
							vec1 32 ssa_503 = ffma ssa_500, ssa_322.z, ssa_502.z
							vec1 32 ssa_504 = ffma ssa_501, ssa_322.z, ssa_502.w
							r40 = ffma -ssa_37, ssa_322.z, ssa_503
							r41 = ffma -ssa_37, ssa_322.z, ssa_504
							vec1 32 ssa_507 = fadd r40, -ssa_502.z
							vec1 32 ssa_508 = fadd r41, -ssa_502.w
							vec1 32 ssa_509 = fmul ssa_507, ssa_322.w
							vec1 32 ssa_510 = fmul ssa_508, ssa_322.w
							vec1 32 ssa_511 = fmul ssa_509, ssa_58
							vec1 32 ssa_512 = ffloor ssa_511
							vec1 32 ssa_513 = ffma -ssa_56, ssa_512, ssa_509
							vec1 32 ssa_514 = fadd ssa_59, -ssa_513
							vec1 32 ssa_515 = fmul ssa_510, ssa_58
							vec1 32 ssa_516 = ffloor ssa_515
							vec1 32 ssa_517 = ffma -ssa_56, ssa_516, ssa_510
							vec1 32 ssa_518 = fadd ssa_59, -ssa_517
							vec1 32 ssa_519 = ffract ssa_509
							vec1 32 ssa_520 = ffract ssa_510
							vec1 32 ssa_521 = fmul ssa_519, ssa_519
							vec1 32 ssa_522 = fmul ssa_521, ssa_519
							vec1 32 ssa_523 = fadd ssa_35, -ssa_519
							vec1 32 ssa_524 = fmul ssa_523, ssa_523
							vec1 32 ssa_525 = fmul ssa_524, ssa_523
							vec1 32 ssa_526 = ffma ssa_60, ssa_522, ssa_36
							vec1 32 ssa_527 = ffma -ssa_61, ssa_521, ssa_526
							vec1 32 ssa_528 = ffma ssa_60, ssa_525, ssa_36
							vec1 32 ssa_529 = ffma -ssa_61, ssa_524, ssa_528
							vec1 32 ssa_530 = load_const (0x3e2aaaab /* 0.166667 */)
							vec1 32 ssa_531 = fmul ssa_527, ssa_530
							vec1 32 ssa_532 = fmul ssa_522, ssa_530
							vec1 32 ssa_533 = fmul ssa_520, ssa_520
							vec1 32 ssa_534 = fmul ssa_533, ssa_520
							vec1 32 ssa_535 = fadd ssa_35, -ssa_520
							vec1 32 ssa_536 = fmul ssa_535, ssa_535
							vec1 32 ssa_537 = fmul ssa_536, ssa_535
							vec1 32 ssa_538 = ffma ssa_60, ssa_534, ssa_36
							vec1 32 ssa_539 = ffma -ssa_61, ssa_533, ssa_538
							vec1 32 ssa_540 = ffma ssa_60, ssa_537, ssa_36
							vec1 32 ssa_541 = ffma -ssa_61, ssa_536, ssa_540
							vec1 32 ssa_542 = fmul ssa_539, ssa_530
							vec1 32 ssa_543 = fmul ssa_534, ssa_530
							vec1 32 ssa_544 = ffma ssa_525, ssa_530, ssa_531
							vec1 32 ssa_545 = ffma ssa_529, ssa_530, ssa_532
							vec1 32 ssa_546 = ffma ssa_537, ssa_530, ssa_542
							vec1 32 ssa_547 = ffma ssa_541, ssa_530, ssa_543
							vec1 32 ssa_548 = frcp ssa_544
							vec1 32 ssa_549 = frcp ssa_545
							vec1 32 ssa_550 = frcp ssa_546
							vec1 32 ssa_551 = frcp ssa_547
							vec1 32 ssa_552 = fadd ssa_544, ssa_545
							vec1 32 ssa_553 = frcp ssa_552
							vec1 32 ssa_554 = fmul ssa_545, ssa_553
							vec1 32 ssa_555 = fadd ssa_546, ssa_547
							vec1 32 ssa_556 = frcp ssa_555
							vec1 32 ssa_557 = fmul ssa_547, ssa_556
							vec1 32 ssa_558 = fmax -ssa_513, -ssa_517
							vec1 32 ssa_559 = fge ssa_514, ssa_63
							vec1 32 ssa_560 = fge ssa_62, ssa_558
							vec1 32 ssa_561 = iand ssa_560, ssa_559
							vec1 32 ssa_562 = fge ssa_518, ssa_63
							vec1 32 ssa_563 = iand ssa_561, ssa_562
							/* succs: block_79 block_85 */
							if ssa_563 {
								block block_79:
								/* preds: block_78 */
								vec1 32 ssa_564 = f2i32 r40
								vec1 32 ssa_565 = f2i32 r41
								vec4 32 ssa_566 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
								vec3 32 ssa_567 = vec3 ssa_564, ssa_565, ssa_566.w
								r42 = txf ssa_567 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
								vec1 32 ssa_569 = ishl r42.w, ssa_72
								r43 = iadd r42.z, ssa_569
								r44 = imov ssa_30
								/* succs: block_80 */
								loop {
									block block_80:
									/* preds: block_79 block_83 */
									vec4 32 ssa_576 = intrinsic load_input (ssa_1) (32, 0) /* base=32 */ /* component=0 */	/* fastuidraw_uint_varying1 */
									vec1 32 ssa_577 = uge r44, ssa_576.x
									/* succs: block_81 block_82 */
									if ssa_577 {
										block block_81:
										/* preds: block_80 */
										break
										/* succs: block_84 */
									} else {
										block block_82:
										/* preds: block_80 */
										/* succs: block_83 */
									}
									block block_83:
									/* preds: block_82 */
									vec1 32 ssa_578 = ffloor r40
									vec1 32 ssa_579 = ffloor r41
									vec1 32 ssa_580 = fadd r40, -ssa_578
									vec1 32 ssa_581 = fadd r41, -ssa_579
									vec1 32 ssa_582 = u2f32 r42.x
									vec1 32 ssa_583 = u2f32 r42.y
									vec1 32 ssa_584 = fmul ssa_582, ssa_36
									vec1 32 ssa_585 = fmul ssa_583, ssa_36
									r40 = ffma ssa_580, ssa_36, ssa_584
									r41 = ffma ssa_581, ssa_36, ssa_585
									vec1 32 ssa_588 = f2i32 r40
									vec1 32 ssa_589 = f2i32 r41
									vec3 32 ssa_590 = vec3 ssa_588, ssa_589, r43
									r42 = txf ssa_590 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
									vec1 32 ssa_592 = ishl r42.w, ssa_72
									r43 = iadd r42.z, ssa_592
									r44 = iadd r44, ssa_30
									/* succs: block_80 */
								}
								block block_84:
								/* preds: block_81 */
								vec1 32 ssa_595 = ffloor r40
								vec1 32 ssa_596 = ffloor r41
								vec1 32 ssa_597 = fadd r40, -ssa_595
								vec1 32 ssa_598 = fadd r41, -ssa_596
								vec1 32 ssa_599 = u2f32 r42.x
								vec1 32 ssa_600 = u2f32 r42.y
								vec1 32 ssa_601 = fmul ssa_599, ssa_56
								vec1 32 ssa_602 = fmul ssa_600, ssa_56
								vec1 32 ssa_603 = ffma ssa_597, ssa_56, ssa_601
								vec1 32 ssa_604 = ffma ssa_598, ssa_56, ssa_602
								vec1 32 ssa_605 = fadd ssa_603, -ssa_519
								vec1 32 ssa_606 = fadd ssa_604, -ssa_520
								vec1 32 ssa_607 = fadd ssa_605, ssa_64
								vec1 32 ssa_608 = ffma ssa_531, ssa_548, ssa_607
								vec1 32 ssa_609 = fadd ssa_605, ssa_65
								vec1 32 ssa_610 = ffma ssa_532, ssa_549, ssa_609
								vec1 32 ssa_611 = fadd ssa_606, ssa_64
								vec1 32 ssa_612 = ffma ssa_542, ssa_550, ssa_611
								vec1 32 ssa_613 = fadd ssa_606, ssa_65
								vec1 32 ssa_614 = ffma ssa_543, ssa_551, ssa_613
								vec1 32 ssa_615 = fmul ssa_608, ssa_57
								vec1 32 ssa_616 = fmul ssa_610, ssa_57
								vec1 32 ssa_617 = fmul ssa_612, ssa_57
								vec1 32 ssa_618 = fmul ssa_614, ssa_57
								vec1 32 ssa_619 = u2f32 r43
								vec3 32 ssa_620 = vec3 ssa_615, ssa_617, ssa_619
								r45 = txl ssa_620 (coord), ssa_1 (lod), 1 (texture), 1 (sampler), 
								vec3 32 ssa_622 = vec3 ssa_616, ssa_617, ssa_619
								r46 = txl ssa_622 (coord), ssa_1 (lod), 1 (texture), 1 (sampler), 
								vec3 32 ssa_624 = vec3 ssa_615, ssa_618, ssa_619
								r47 = txl ssa_624 (coord), ssa_1 (lod), 1 (texture), 1 (sampler), 
								vec3 32 ssa_626 = vec3 ssa_616, ssa_618, ssa_619
								r48 = txl ssa_626 (coord), ssa_1 (lod), 1 (texture), 1 (sampler), 
								/* succs: block_118 */
							} else {
								block block_85:
								/* preds: block_78 */
								vec1 32 ssa_628 = ffma -ssa_519, ssa_322.z, r40
								vec1 32 ssa_629 = ffma -ssa_520, ssa_322.z, r41
								vec1 32 ssa_630 = ffma -ssa_37, ssa_322.z, ssa_628
								vec1 32 ssa_631 = ffma -ssa_37, ssa_322.z, ssa_629
								vec1 32 ssa_632 = ffma ssa_65, ssa_322.z, ssa_628
								vec1 32 ssa_633 = ffma ssa_65, ssa_322.z, ssa_629
								vec1 32 ssa_634 = fmul ssa_531, ssa_548
								vec1 32 ssa_635 = fmul ssa_532, ssa_549
								vec1 32 ssa_636 = fmul ssa_542, ssa_550
								vec1 32 ssa_637 = fmul ssa_543, ssa_551
								r49 = ffma ssa_634, ssa_322.z, ssa_630
								r50 = ffma ssa_635, ssa_322.z, ssa_632
								r51 = ffma ssa_636, ssa_322.z, ssa_631
								r52 = ffma ssa_637, ssa_322.z, ssa_633
								vec1 32 ssa_642 = fmul ssa_39, r49
								vec1 32 ssa_643 = fmul ssa_39, r51
								vec1 32 ssa_644 = ffloor ssa_642
								vec1 32 ssa_645 = ffloor ssa_643
								vec1 32 ssa_646 = ffma -ssa_36, ssa_644, r49
								vec1 32 ssa_647 = ffma -ssa_36, ssa_645, r51
								vec1 32 ssa_648 = fmul ssa_646, ssa_322.w
								vec1 32 ssa_649 = fmul ssa_647, ssa_322.w
								vec1 32 ssa_650 = fmul ssa_648, ssa_58
								vec1 32 ssa_651 = ffloor ssa_650
								vec1 32 ssa_652 = ffma -ssa_56, ssa_651, ssa_648
								vec1 32 ssa_653 = fadd ssa_59, -ssa_652
								vec1 32 ssa_654 = fmul ssa_649, ssa_58
								vec1 32 ssa_655 = ffloor ssa_654
								vec1 32 ssa_656 = ffma -ssa_56, ssa_655, ssa_649
								vec1 32 ssa_657 = fadd ssa_59, -ssa_656
								vec1 32 ssa_658 = f2i32 r49
								vec1 32 ssa_659 = f2i32 r51
								vec4 32 ssa_660 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
								vec3 32 ssa_661 = vec3 ssa_658, ssa_659, ssa_660.w
								r53 = txf ssa_661 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
								vec1 32 ssa_663 = ishl r53.w, ssa_72
								r54 = iadd r53.z, ssa_663
								r57 = imov ssa_30
								r56 = imov r51
								r55 = imov r49
								/* succs: block_86 */
								loop {
									block block_86:
									/* preds: block_85 block_89 */
									vec4 32 ssa_670 = intrinsic load_input (ssa_1) (32, 0) /* base=32 */ /* component=0 */	/* fastuidraw_uint_varying1 */
									vec1 32 ssa_671 = uge r57, ssa_670.x
									/* succs: block_87 block_88 */
									if ssa_671 {
										block block_87:
										/* preds: block_86 */
										break
										/* succs: block_90 */
									} else {
										block block_88:
										/* preds: block_86 */
										/* succs: block_89 */
									}
									block block_89:
									/* preds: block_88 */
									vec1 32 ssa_672 = ffloor r55
									vec1 32 ssa_673 = ffloor r56
									vec1 32 ssa_674 = fadd r55, -ssa_672
									vec1 32 ssa_675 = fadd r56, -ssa_673
									vec1 32 ssa_676 = u2f32 r53.x
									vec1 32 ssa_677 = u2f32 r53.y
									vec1 32 ssa_678 = fmul ssa_676, ssa_36
									vec1 32 ssa_679 = fmul ssa_677, ssa_36
									r55 = ffma ssa_674, ssa_36, ssa_678
									r56 = ffma ssa_675, ssa_36, ssa_679
									vec1 32 ssa_682 = f2i32 r55
									vec1 32 ssa_683 = f2i32 r56
									vec3 32 ssa_684 = vec3 ssa_682, ssa_683, r54
									r53 = txf ssa_684 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
									vec1 32 ssa_686 = ishl r53.w, ssa_72
									r54 = iadd r53.z, ssa_686
									r57 = iadd r57, ssa_30
									/* succs: block_86 */
								}
								block block_90:
								/* preds: block_87 */
								vec1 32 ssa_689 = ffloor r55
								vec1 32 ssa_690 = ffloor r56
								vec1 32 ssa_691 = fadd r55, -ssa_689
								vec1 32 ssa_692 = fadd r56, -ssa_690
								vec1 32 ssa_693 = u2f32 r53.x
								vec1 32 ssa_694 = u2f32 r53.y
								vec1 32 ssa_695 = fmul ssa_693, ssa_56
								vec1 32 ssa_696 = fmul ssa_694, ssa_56
								vec1 32 ssa_697 = ffma ssa_691, ssa_56, ssa_695
								vec1 32 ssa_698 = ffma ssa_692, ssa_56, ssa_696
								vec1 32 ssa_699 = fmin ssa_653, ssa_657
								vec1 32 ssa_700 = fge ssa_64, -ssa_652
								vec1 32 ssa_701 = fge ssa_699, ssa_37
								vec1 32 ssa_702 = iand ssa_701, ssa_700
								vec1 32 ssa_703 = fge ssa_64, -ssa_656
								vec1 32 ssa_704 = iand ssa_702, ssa_703
								/* succs: block_91 block_92 */
								if ssa_704 {
									block block_91:
									/* preds: block_90 */
									vec1 32 ssa_705 = fmul ssa_697, ssa_57
									vec1 32 ssa_706 = fmul ssa_698, ssa_57
									vec1 32 ssa_707 = u2f32 r54
									vec3 32 ssa_708 = vec3 ssa_705, ssa_706, ssa_707
									r45 = txl ssa_708 (coord), ssa_1 (lod), 1 (texture), 1 (sampler), 
									/* succs: block_93 */
								} else {
									block block_92:
									/* preds: block_90 */
									vec1 32 ssa_710 = fmul ssa_697, ssa_57
									vec1 32 ssa_711 = fmul ssa_698, ssa_57
									vec1 32 ssa_712 = u2f32 r54
									vec3 32 ssa_713 = vec3 ssa_710, ssa_711, ssa_712
									r45 = txl ssa_713 (coord), ssa_1 (lod), 2 (texture), 2 (sampler), 
									/* succs: block_93 */
								}
								block block_93:
								/* preds: block_91 block_92 */
								vec1 32 ssa_716 = fmul ssa_39, r50
								vec1 32 ssa_717 = ffloor ssa_716
								vec1 32 ssa_718 = ffma -ssa_36, ssa_717, r50
								vec1 32 ssa_719 = fmul ssa_718, ssa_322.w
								vec1 32 ssa_720 = fmul ssa_719, ssa_58
								vec1 32 ssa_721 = ffloor ssa_720
								vec1 32 ssa_722 = ffma -ssa_56, ssa_721, ssa_719
								vec1 32 ssa_723 = fadd ssa_59, -ssa_722
								vec1 32 ssa_724 = f2i32 r50
								vec3 32 ssa_725 = vec3 ssa_724, ssa_659, ssa_660.w
								r58 = txf ssa_725 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
								vec1 32 ssa_727 = ishl r58.w, ssa_72
								r59 = iadd r58.z, ssa_727
								r61 = imov ssa_30
								r60 = imov r50
								/* succs: block_94 */
								loop {
									block block_94:
									/* preds: block_93 block_97 */
									vec1 32 ssa_734 = uge r61, ssa_670.x
									/* succs: block_95 block_96 */
									if ssa_734 {
										block block_95:
										/* preds: block_94 */
										break
										/* succs: block_98 */
									} else {
										block block_96:
										/* preds: block_94 */
										/* succs: block_97 */
									}
									block block_97:
									/* preds: block_96 */
									vec1 32 ssa_735 = ffloor r60
									vec1 32 ssa_736 = ffloor r51
									vec1 32 ssa_737 = fadd r60, -ssa_735
									vec1 32 ssa_738 = fadd r51, -ssa_736
									vec1 32 ssa_739 = u2f32 r58.x
									vec1 32 ssa_740 = u2f32 r58.y
									vec1 32 ssa_741 = fmul ssa_739, ssa_36
									vec1 32 ssa_742 = fmul ssa_740, ssa_36
									r60 = ffma ssa_737, ssa_36, ssa_741
									r51 = ffma ssa_738, ssa_36, ssa_742
									vec1 32 ssa_745 = f2i32 r60
									vec1 32 ssa_746 = f2i32 r51
									vec3 32 ssa_747 = vec3 ssa_745, ssa_746, r59
									r58 = txf ssa_747 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
									vec1 32 ssa_749 = ishl r58.w, ssa_72
									r59 = iadd r58.z, ssa_749
									r61 = iadd r61, ssa_30
									/* succs: block_94 */
								}
								block block_98:
								/* preds: block_95 */
								vec1 32 ssa_752 = ffloor r60
								vec1 32 ssa_753 = ffloor r51
								vec1 32 ssa_754 = fadd r60, -ssa_752
								vec1 32 ssa_755 = fadd r51, -ssa_753
								vec1 32 ssa_756 = u2f32 r58.x
								vec1 32 ssa_757 = u2f32 r58.y
								vec1 32 ssa_758 = fmul ssa_756, ssa_56
								vec1 32 ssa_759 = fmul ssa_757, ssa_56
								vec1 32 ssa_760 = ffma ssa_754, ssa_56, ssa_758
								vec1 32 ssa_761 = ffma ssa_755, ssa_56, ssa_759
								vec1 32 ssa_762 = fmin ssa_723, ssa_657
								vec1 32 ssa_763 = fge ssa_64, -ssa_722
								vec1 32 ssa_764 = fge ssa_762, ssa_37
								vec1 32 ssa_765 = iand ssa_764, ssa_763
								vec1 32 ssa_766 = iand ssa_765, ssa_703
								/* succs: block_99 block_100 */
								if ssa_766 {
									block block_99:
									/* preds: block_98 */
									vec1 32 ssa_767 = fmul ssa_760, ssa_57
									vec1 32 ssa_768 = fmul ssa_761, ssa_57
									vec1 32 ssa_769 = u2f32 r59
									vec3 32 ssa_770 = vec3 ssa_767, ssa_768, ssa_769
									r46 = txl ssa_770 (coord), ssa_1 (lod), 1 (texture), 1 (sampler), 
									/* succs: block_101 */
								} else {
									block block_100:
									/* preds: block_98 */
									vec1 32 ssa_772 = fmul ssa_760, ssa_57
									vec1 32 ssa_773 = fmul ssa_761, ssa_57
									vec1 32 ssa_774 = u2f32 r59
									vec3 32 ssa_775 = vec3 ssa_772, ssa_773, ssa_774
									r46 = txl ssa_775 (coord), ssa_1 (lod), 2 (texture), 2 (sampler), 
									/* succs: block_101 */
								}
								block block_101:
								/* preds: block_99 block_100 */
								vec1 32 ssa_778 = fmul ssa_39, r52
								vec1 32 ssa_779 = ffloor ssa_778
								vec1 32 ssa_780 = ffma -ssa_36, ssa_779, r52
								vec1 32 ssa_781 = fmul ssa_780, ssa_322.w
								vec1 32 ssa_782 = fmul ssa_781, ssa_58
								vec1 32 ssa_783 = ffloor ssa_782
								vec1 32 ssa_784 = ffma -ssa_56, ssa_783, ssa_781
								vec1 32 ssa_785 = fadd ssa_59, -ssa_784
								vec1 32 ssa_786 = f2i32 r52
								vec3 32 ssa_787 = vec3 ssa_658, ssa_786, ssa_660.w
								r62 = txf ssa_787 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
								vec1 32 ssa_789 = ishl r62.w, ssa_72
								r63 = iadd r62.z, ssa_789
								r65 = imov ssa_30
								r64 = imov r52
								/* succs: block_102 */
								loop {
									block block_102:
									/* preds: block_101 block_105 */
									vec1 32 ssa_796 = uge r65, ssa_670.x
									/* succs: block_103 block_104 */
									if ssa_796 {
										block block_103:
										/* preds: block_102 */
										break
										/* succs: block_106 */
									} else {
										block block_104:
										/* preds: block_102 */
										/* succs: block_105 */
									}
									block block_105:
									/* preds: block_104 */
									vec1 32 ssa_797 = ffloor r49
									vec1 32 ssa_798 = ffloor r64
									vec1 32 ssa_799 = fadd r49, -ssa_797
									vec1 32 ssa_800 = fadd r64, -ssa_798
									vec1 32 ssa_801 = u2f32 r62.x
									vec1 32 ssa_802 = u2f32 r62.y
									vec1 32 ssa_803 = fmul ssa_801, ssa_36
									vec1 32 ssa_804 = fmul ssa_802, ssa_36
									r49 = ffma ssa_799, ssa_36, ssa_803
									r64 = ffma ssa_800, ssa_36, ssa_804
									vec1 32 ssa_807 = f2i32 r49
									vec1 32 ssa_808 = f2i32 r64
									vec3 32 ssa_809 = vec3 ssa_807, ssa_808, r63
									r62 = txf ssa_809 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
									vec1 32 ssa_811 = ishl r62.w, ssa_72
									r63 = iadd r62.z, ssa_811
									r65 = iadd r65, ssa_30
									/* succs: block_102 */
								}
								block block_106:
								/* preds: block_103 */
								vec1 32 ssa_814 = ffloor r49
								vec1 32 ssa_815 = ffloor r64
								vec1 32 ssa_816 = fadd r49, -ssa_814
								vec1 32 ssa_817 = fadd r64, -ssa_815
								vec1 32 ssa_818 = u2f32 r62.x
								vec1 32 ssa_819 = u2f32 r62.y
								vec1 32 ssa_820 = fmul ssa_818, ssa_56
								vec1 32 ssa_821 = fmul ssa_819, ssa_56
								vec1 32 ssa_822 = ffma ssa_816, ssa_56, ssa_820
								vec1 32 ssa_823 = ffma ssa_817, ssa_56, ssa_821
								vec1 32 ssa_824 = fmin ssa_653, ssa_785
								vec1 32 ssa_825 = fge ssa_824, ssa_37
								vec1 32 ssa_826 = iand ssa_825, ssa_700
								vec1 32 ssa_827 = fge ssa_64, -ssa_784
								vec1 32 ssa_828 = iand ssa_826, ssa_827
								/* succs: block_107 block_108 */
								if ssa_828 {
									block block_107:
									/* preds: block_106 */
									vec1 32 ssa_829 = fmul ssa_822, ssa_57
									vec1 32 ssa_830 = fmul ssa_823, ssa_57
									vec1 32 ssa_831 = u2f32 r63
									vec3 32 ssa_832 = vec3 ssa_829, ssa_830, ssa_831
									r47 = txl ssa_832 (coord), ssa_1 (lod), 1 (texture), 1 (sampler), 
									/* succs: block_109 */
								} else {
									block block_108:
									/* preds: block_106 */
									vec1 32 ssa_834 = fmul ssa_822, ssa_57
									vec1 32 ssa_835 = fmul ssa_823, ssa_57
									vec1 32 ssa_836 = u2f32 r63
									vec3 32 ssa_837 = vec3 ssa_834, ssa_835, ssa_836
									r47 = txl ssa_837 (coord), ssa_1 (lod), 2 (texture), 2 (sampler), 
									/* succs: block_109 */
								}
								block block_109:
								/* preds: block_107 block_108 */
								vec3 32 ssa_840 = vec3 ssa_724, ssa_786, ssa_660.w
								r66 = txf ssa_840 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
								vec1 32 ssa_842 = ishl r66.w, ssa_72
								r67 = iadd r66.z, ssa_842
								r68 = imov ssa_30
								/* succs: block_110 */
								loop {
									block block_110:
									/* preds: block_109 block_113 */
									vec1 32 ssa_849 = uge r68, ssa_670.x
									/* succs: block_111 block_112 */
									if ssa_849 {
										block block_111:
										/* preds: block_110 */
										break
										/* succs: block_114 */
									} else {
										block block_112:
										/* preds: block_110 */
										/* succs: block_113 */
									}
									block block_113:
									/* preds: block_112 */
									vec1 32 ssa_850 = ffloor r50
									vec1 32 ssa_851 = ffloor r52
									vec1 32 ssa_852 = fadd r50, -ssa_850
									vec1 32 ssa_853 = fadd r52, -ssa_851
									vec1 32 ssa_854 = u2f32 r66.x
									vec1 32 ssa_855 = u2f32 r66.y
									vec1 32 ssa_856 = fmul ssa_854, ssa_36
									vec1 32 ssa_857 = fmul ssa_855, ssa_36
									r50 = ffma ssa_852, ssa_36, ssa_856
									r52 = ffma ssa_853, ssa_36, ssa_857
									vec1 32 ssa_860 = f2i32 r50
									vec1 32 ssa_861 = f2i32 r52
									vec3 32 ssa_862 = vec3 ssa_860, ssa_861, r67
									r66 = txf ssa_862 (coord), ssa_1 (lod), 3 (texture), 3 (sampler), 
									vec1 32 ssa_864 = ishl r66.w, ssa_72
									r67 = iadd r66.z, ssa_864
									r68 = iadd r68, ssa_30
									/* succs: block_110 */
								}
								block block_114:
								/* preds: block_111 */
								vec1 32 ssa_867 = ffloor r50
								vec1 32 ssa_868 = ffloor r52
								vec1 32 ssa_869 = fadd r50, -ssa_867
								vec1 32 ssa_870 = fadd r52, -ssa_868
								vec1 32 ssa_871 = u2f32 r66.x
								vec1 32 ssa_872 = u2f32 r66.y
								vec1 32 ssa_873 = fmul ssa_871, ssa_56
								vec1 32 ssa_874 = fmul ssa_872, ssa_56
								vec1 32 ssa_875 = ffma ssa_869, ssa_56, ssa_873
								vec1 32 ssa_876 = ffma ssa_870, ssa_56, ssa_874
								vec1 32 ssa_877 = fmin ssa_723, ssa_785
								vec1 32 ssa_878 = fge ssa_877, ssa_37
								vec1 32 ssa_879 = iand ssa_878, ssa_763
								vec1 32 ssa_880 = iand ssa_879, ssa_827
								/* succs: block_115 block_116 */
								if ssa_880 {
									block block_115:
									/* preds: block_114 */
									vec1 32 ssa_881 = fmul ssa_875, ssa_57
									vec1 32 ssa_882 = fmul ssa_876, ssa_57
									vec1 32 ssa_883 = u2f32 r67
									vec3 32 ssa_884 = vec3 ssa_881, ssa_882, ssa_883
									r48 = txl ssa_884 (coord), ssa_1 (lod), 1 (texture), 1 (sampler), 
									/* succs: block_117 */
								} else {
									block block_116:
									/* preds: block_114 */
									vec1 32 ssa_886 = fmul ssa_875, ssa_57
									vec1 32 ssa_887 = fmul ssa_876, ssa_57
									vec1 32 ssa_888 = u2f32 r67
									vec3 32 ssa_889 = vec3 ssa_886, ssa_887, ssa_888
									r48 = txl ssa_889 (coord), ssa_1 (lod), 2 (texture), 2 (sampler), 
									/* succs: block_117 */
								}
								block block_117:
								/* preds: block_115 block_116 */
								/* succs: block_118 */
							}
							block block_118:
							/* preds: block_84 block_117 */
							vec1 32 ssa_896 = flrp r45.x, r46.x, ssa_554
							vec1 32 ssa_897 = flrp r45.y, r46.y, ssa_554
							vec1 32 ssa_898 = flrp r45.z, r46.z, ssa_554
							vec1 32 ssa_899 = flrp r45.w, r46.w, ssa_554
							vec1 32 ssa_900 = flrp r47.x, r48.x, ssa_554
							vec1 32 ssa_901 = flrp r47.y, r48.y, ssa_554
							vec1 32 ssa_902 = flrp r47.z, r48.z, ssa_554
							vec1 32 ssa_903 = flrp r47.w, r48.w, ssa_554
							vec1 32 ssa_904 = flrp ssa_896, ssa_900, ssa_557
							vec1 32 ssa_905 = flrp ssa_897, ssa_901, ssa_557
							vec1 32 ssa_906 = flrp ssa_898, ssa_902, ssa_557
							vec1 32 ssa_907 = flrp ssa_899, ssa_903, ssa_557
							r34 = vec4 ssa_904, ssa_905, ssa_906, ssa_907
							/* succs: block_119 */
						}
						block block_119:
						/* preds: block_77 block_118 */
						/* succs: block_120 */
					}
					block block_120:
					/* preds: block_67 block_119 */
					/* succs: block_131 */
				} else {
					block block_121:
					/* preds: block_60 */
					vec1 32 ssa_911 = ine ssa_329, ssa_30
					/* succs: block_122 block_129 */
					if ssa_911 {
						block block_122:
						/* preds: block_121 */
						vec4 32 ssa_912 = intrinsic load_input (ssa_1) (39, 0) /* base=39 */ /* component=0 */	/* fastuidraw_float_flat_varying2 */
						vec1 32 ssa_913 = fadd ssa_324, ssa_912.z
						vec1 32 ssa_914 = fadd ssa_327, ssa_912.w
						vec1 32 ssa_915 = ieq ssa_331, ssa_30
						/* succs: block_123 block_124 */
						if ssa_915 {
							block block_123:
							/* preds: block_122 */
							vec1 32 ssa_916 = fceil r28
							vec1 32 ssa_917 = f2i32 ssa_916
							vec1 32 ssa_918 = ishl ssa_30, ssa_917
							vec1 32 ssa_919 = i2f32 ssa_918
							vec1 32 ssa_920 = frcp ssa_919
							vec1 32 ssa_921 = fmul ssa_913, ssa_920
							vec1 32 ssa_922 = fmul ssa_914, ssa_920
							vec1 32 ssa_923 = f2i32 ssa_921
							vec1 32 ssa_924 = f2i32 ssa_922
							vec2 32 ssa_925 = vec2 ssa_923, ssa_924
							r34 = txf ssa_925 (coord), ssa_917 (lod), 4 (texture), 4 (sampler), 
							/* succs: block_128 */
						} else {
							block block_124:
							/* preds: block_122 */
							vec1 32 ssa_927 = flt ssa_37, r28
							vec1 32 ssa_928 = ieq ssa_331, ssa_31
							vec1 32 ssa_929 = ior ssa_928, ssa_927
							/* succs: block_125 block_126 */
							if ssa_929 {
								block block_125:
								/* preds: block_124 */
								vec2 32 ssa_930 = txs ssa_1 (lod), 4 (texture), 4 (sampler), 
								vec1 32 ssa_931 = i2f32 ssa_930.x
								vec1 32 ssa_932 = i2f32 ssa_930.y
								vec1 32 ssa_933 = frcp ssa_931
								vec1 32 ssa_934 = frcp ssa_932
								vec1 32 ssa_935 = fmul ssa_913, ssa_933
								vec1 32 ssa_936 = fmul ssa_914, ssa_934
								vec2 32 ssa_937 = vec2 ssa_935, ssa_936
								r34 = txl ssa_937 (coord), r28 (lod), 4 (texture), 4 (sampler), 
								/* succs: block_127 */
							} else {
								block block_126:
								/* preds: block_124 */
								vec1 32 ssa_939 = fadd ssa_913, ssa_64
								vec1 32 ssa_940 = fadd ssa_914, ssa_64
								vec1 32 ssa_941 = ffract ssa_939
								vec1 32 ssa_942 = ffract ssa_940
								vec1 32 ssa_943 = fadd ssa_939, -ssa_941
								vec1 32 ssa_944 = fadd ssa_940, -ssa_942
								vec1 32 ssa_945 = fmul ssa_941, ssa_941
								vec1 32 ssa_946 = fmul ssa_945, ssa_941
								vec1 32 ssa_947 = fadd ssa_35, -ssa_941
								vec1 32 ssa_948 = fmul ssa_947, ssa_947
								vec1 32 ssa_949 = fmul ssa_948, ssa_947
								vec1 32 ssa_950 = ffma ssa_60, ssa_946, ssa_36
								vec1 32 ssa_951 = ffma -ssa_61, ssa_945, ssa_950
								vec1 32 ssa_952 = ffma ssa_60, ssa_949, ssa_36
								vec1 32 ssa_953 = ffma -ssa_61, ssa_948, ssa_952
								vec1 32 ssa_954 = load_const (0x3e2aaaab /* 0.166667 */)
								vec1 32 ssa_955 = fmul ssa_951, ssa_954
								vec1 32 ssa_956 = fmul ssa_946, ssa_954
								vec1 32 ssa_957 = fmul ssa_942, ssa_942
								vec1 32 ssa_958 = fmul ssa_957, ssa_942
								vec1 32 ssa_959 = fadd ssa_35, -ssa_942
								vec1 32 ssa_960 = fmul ssa_959, ssa_959
								vec1 32 ssa_961 = fmul ssa_960, ssa_959
								vec1 32 ssa_962 = ffma ssa_60, ssa_958, ssa_36
								vec1 32 ssa_963 = ffma -ssa_61, ssa_957, ssa_962
								vec1 32 ssa_964 = ffma ssa_60, ssa_961, ssa_36
								vec1 32 ssa_965 = ffma -ssa_61, ssa_960, ssa_964
								vec1 32 ssa_966 = fmul ssa_963, ssa_954
								vec1 32 ssa_967 = fmul ssa_958, ssa_954
								vec1 32 ssa_968 = ffma ssa_949, ssa_954, ssa_955
								vec1 32 ssa_969 = ffma ssa_953, ssa_954, ssa_956
								vec1 32 ssa_970 = ffma ssa_961, ssa_954, ssa_966
								vec1 32 ssa_971 = ffma ssa_965, ssa_954, ssa_967
								vec1 32 ssa_972 = frcp ssa_968
								vec1 32 ssa_973 = frcp ssa_969
								vec1 32 ssa_974 = frcp ssa_970
								vec1 32 ssa_975 = frcp ssa_971
								vec1 32 ssa_976 = fadd ssa_943, ssa_64
								vec1 32 ssa_977 = ffma ssa_955, ssa_972, ssa_976
								vec1 32 ssa_978 = fadd ssa_943, ssa_65
								vec1 32 ssa_979 = ffma ssa_956, ssa_973, ssa_978
								vec1 32 ssa_980 = fadd ssa_944, ssa_64
								vec1 32 ssa_981 = ffma ssa_966, ssa_974, ssa_980
								vec1 32 ssa_982 = fadd ssa_944, ssa_65
								vec1 32 ssa_983 = ffma ssa_967, ssa_975, ssa_982
								vec2 32 ssa_984 = txs ssa_1 (lod), 4 (texture), 4 (sampler), 
								vec1 32 ssa_985 = i2f32 ssa_984.x
								vec1 32 ssa_986 = i2f32 ssa_984.y
								vec1 32 ssa_987 = frcp ssa_985
								vec1 32 ssa_988 = frcp ssa_986
								vec1 32 ssa_989 = fmul ssa_977, ssa_987
								vec1 32 ssa_990 = fmul ssa_979, ssa_988
								vec1 32 ssa_991 = fmul ssa_981, ssa_987
								vec1 32 ssa_992 = fmul ssa_983, ssa_988
								vec1 32 ssa_993 = fadd ssa_968, ssa_969
								vec1 32 ssa_994 = frcp ssa_993
								vec1 32 ssa_995 = fmul ssa_969, ssa_994
								vec1 32 ssa_996 = fadd ssa_970, ssa_971
								vec1 32 ssa_997 = frcp ssa_996
								vec1 32 ssa_998 = fmul ssa_971, ssa_997
								vec2 32 ssa_999 = vec2 ssa_989, ssa_991
								vec4 32 ssa_1000 = txl ssa_999 (coord), ssa_1 (lod), 4 (texture), 4 (sampler), 
								vec2 32 ssa_1001 = vec2 ssa_990, ssa_991
								vec4 32 ssa_1002 = txl ssa_1001 (coord), ssa_1 (lod), 4 (texture), 4 (sampler), 
								vec1 32 ssa_1003 = flrp ssa_1000.x, ssa_1002.x, ssa_995
								vec1 32 ssa_1004 = flrp ssa_1000.y, ssa_1002.y, ssa_995
								vec1 32 ssa_1005 = flrp ssa_1000.z, ssa_1002.z, ssa_995
								vec1 32 ssa_1006 = flrp ssa_1000.w, ssa_1002.w, ssa_995
								vec2 32 ssa_1007 = vec2 ssa_989, ssa_992
								vec4 32 ssa_1008 = txl ssa_1007 (coord), ssa_1 (lod), 4 (texture), 4 (sampler), 
								vec2 32 ssa_1009 = vec2 ssa_990, ssa_992
								vec4 32 ssa_1010 = txl ssa_1009 (coord), ssa_1 (lod), 4 (texture), 4 (sampler), 
								vec1 32 ssa_1011 = flrp ssa_1008.x, ssa_1010.x, ssa_995
								vec1 32 ssa_1012 = flrp ssa_1008.y, ssa_1010.y, ssa_995
								vec1 32 ssa_1013 = flrp ssa_1008.z, ssa_1010.z, ssa_995
								vec1 32 ssa_1014 = flrp ssa_1008.w, ssa_1010.w, ssa_995
								vec1 32 ssa_1015 = flrp ssa_1003, ssa_1011, ssa_998
								vec1 32 ssa_1016 = flrp ssa_1004, ssa_1012, ssa_998
								vec1 32 ssa_1017 = flrp ssa_1005, ssa_1013, ssa_998
								vec1 32 ssa_1018 = flrp ssa_1006, ssa_1014, ssa_998
								r34 = vec4 ssa_1015, ssa_1016, ssa_1017, ssa_1018
								/* succs: block_127 */
							}
							block block_127:
							/* preds: block_125 block_126 */
							/* succs: block_128 */
						}
						block block_128:
						/* preds: block_123 block_127 */
						/* succs: block_130 */
					} else {
						block block_129:
						/* preds: block_121 */
						r34 = imov ssa_66
						/* succs: block_130 */
					}
					block block_130:
					/* preds: block_128 block_129 */
					/* succs: block_131 */
				}
				block block_131:
				/* preds: block_120 block_130 */
				vec1 32 ssa_1024 = iand ssa_92.y, ssa_67
				vec1 32 ssa_1025 = ieq ssa_1024, ssa_1
				/* succs: block_132 block_133 */
				if ssa_1025 {
					block block_132:
					/* preds: block_131 */
					vec1 32 ssa_1026 = fmul r34.x, r34.w
					vec1 32 ssa_1027 = fmul r34.y, r34.w
					vec1 32 ssa_1028 = fmul r34.z, r34.w
					r34 = vec4 ssa_1026, ssa_1027, ssa_1028, r34.w
					/* succs: block_134 */
				} else {
					block block_133:
					/* preds: block_131 */
					/* succs: block_134 */
				}
				block block_134:
				/* preds: block_132 block_133 */
				r16 = fmul r16, r34.x
				r15 = fmul r15, r34.y
				r14 = fmul r14, r34.z
				r13 = fmul r13, r34.w
				/* succs: block_136 */
			} else {
				block block_135:
				/* preds: block_56 */
				/* succs: block_136 */
			}
			block block_136:
			/* preds: block_134 block_135 */
			/* succs: block_138 */
		} else {
			block block_137:
			/* preds: block_1 */
			/* succs: block_138 */
		}
		block block_138:
		/* preds: block_136 block_137 */
		vec4 32 ssa_1043 = intrinsic load_input (ssa_1) (32, 0) /* base=32 */ /* component=0 */	/* fastuidraw_uint_varying1 */
		vec1 32 ssa_1044 = ult ssa_1043.y, ssa_68
		vec1 32 ssa_1045 = uge ssa_1043.y, ssa_31
		vec1 32 ssa_1046 = iand ssa_1045, ssa_1044
		/* succs: block_139 block_140 */
		if ssa_1046 {
			block block_139:
			/* preds: block_138 */
			vec4 32 ssa_1047 = intrinsic load_uniform (ssa_1) (0, 16) /* base=0 */ /* range=16 */	/* fastuidraw_painterStore */
			vec4 32 ssa_1048 = load_const (0x3f000000 /* 0.500000 */, 0x3f000000 /* 0.500000 */, 0x00000000 /* 0.000000 */, 0x00000000 /* 0.000000 */)
			vec1 32 ssa_1049 = fadd ssa_4.x, ssa_1048.x
			vec1 32 ssa_1050 = fadd ssa_4.y, ssa_1048.y
			vec1 32 ssa_1051 = ffma ssa_1050, ssa_1047.x, ssa_1047.y
			vec1 32 ssa_1052 = f2i32 ssa_1049
			vec1 32 ssa_1053 = f2i32 ssa_1051
			vec1 32 ssa_1054 = iadd ssa_1052, ssa_96
			vec1 32 ssa_1055 = iadd ssa_1053, ssa_97
			vec2 32 ssa_1056 = vec2 ssa_1054, ssa_1055
			vec4 32 ssa_1057 = txf ssa_1056 (coord), ssa_1 (lod), 12 (texture), 12 (sampler), 
			r12 = imov ssa_1057.x
			r9 = imov r12
			r10 = imov r9
			r11 = imov r10
			/* succs: block_410 */
		} else {
			block block_140:
			/* preds: block_138 */
			vec1 32 ssa_1059 = ult ssa_1043.y, ssa_29
			vec1 32 ssa_1060 = uge ssa_1043.y, ssa_52
			vec1 32 ssa_1061 = iand ssa_1060, ssa_1059
			/* succs: block_141 block_142 */
			if ssa_1061 {
				block block_141:
				/* preds: block_140 */
				vec4 32 ssa_1062 = intrinsic load_uniform (ssa_1) (0, 16) /* base=0 */ /* range=16 */	/* fastuidraw_painterStore */
				vec4 32 ssa_1063 = load_const (0x3f000000 /* 0.500000 */, 0x3f000000 /* 0.500000 */, 0x00000000 /* 0.000000 */, 0x00000000 /* 0.000000 */)
				vec1 32 ssa_1064 = fadd ssa_4.x, ssa_1063.x
				vec1 32 ssa_1065 = fadd ssa_4.y, ssa_1063.y
				vec1 32 ssa_1066 = ffma ssa_1065, ssa_1062.x, ssa_1062.y
				vec1 32 ssa_1067 = f2i32 ssa_1064
				vec1 32 ssa_1068 = f2i32 ssa_1066
				vec1 32 ssa_1069 = iadd ssa_1067, ssa_96
				vec1 32 ssa_1070 = iadd ssa_1068, ssa_97
				vec2 32 ssa_1071 = vec2 ssa_1069, ssa_1070
				vec4 32 ssa_1072 = txf ssa_1071 (coord), ssa_1 (lod), 12 (texture), 12 (sampler), 
				r12 = imov ssa_1072.x
				r9 = imov r12
				r10 = imov r9
				r11 = imov r10
				/* succs: block_409 */
			} else {
				block block_142:
				/* preds: block_140 */
				vec1 32 ssa_1074 = ine ssa_1043.y, ssa_30
				/* succs: block_143 block_407 */
				if ssa_1074 {
					block block_143:
					/* preds: block_142 */
					vec1 32 ssa_1075 = ine ssa_1043.y, ssa_69
					/* succs: block_144 block_405 */
					if ssa_1075 {
						block block_144:
						/* preds: block_143 */
						vec1 32 ssa_1076 = ieq ssa_1043.y, ssa_50
						/* succs: block_145 block_146 */
						if ssa_1076 {
							block block_145:
							/* preds: block_144 */
							vec4 32 ssa_1077 = intrinsic load_uniform (ssa_1) (0, 16) /* base=0 */ /* range=16 */	/* fastuidraw_painterStore */
							vec4 32 ssa_1078 = load_const (0x3f000000 /* 0.500000 */, 0x3f000000 /* 0.500000 */, 0x00000000 /* 0.000000 */, 0x00000000 /* 0.000000 */)
							vec1 32 ssa_1079 = fadd ssa_4.x, ssa_1078.x
							vec1 32 ssa_1080 = fadd ssa_4.y, ssa_1078.y
							vec1 32 ssa_1081 = ffma ssa_1080, ssa_1077.x, ssa_1077.y
							vec1 32 ssa_1082 = f2i32 ssa_1079
							vec1 32 ssa_1083 = f2i32 ssa_1081
							vec1 32 ssa_1084 = iadd ssa_1082, ssa_96
							vec1 32 ssa_1085 = iadd ssa_1083, ssa_97
							vec2 32 ssa_1086 = vec2 ssa_1084, ssa_1085
							vec4 32 ssa_1087 = txf ssa_1086 (coord), ssa_1 (lod), 12 (texture), 12 (sampler), 
							r12 = imov ssa_1087.x
							r9 = imov r12
							r10 = imov r9
							r11 = imov r10
							/* succs: block_404 */
						} else {
							block block_146:
							/* preds: block_144 */
							vec1 32 ssa_1089 = ieq ssa_1043.y, ssa_70
							/* succs: block_147 block_172 */
							if ssa_1089 {
								block block_147:
								/* preds: block_146 */
								vec1 32 ssa_1090 = f2u32 ssa_5.w
								vec1 32 ssa_1091 = f2u32 ssa_5.z
								vec1 32 ssa_1092 = fadd ssa_5.x, ssa_37
								vec1 32 ssa_1093 = fadd ssa_5.y, ssa_37
								vec1 32 ssa_1094 = f2i32 ssa_1092
								vec1 32 ssa_1095 = f2i32 ssa_1093
								vec1 32 ssa_1096 = iadd ssa_1094, ssa_25
								vec1 32 ssa_1097 = iadd ssa_1095, ssa_25
								vec1 32 ssa_1098 = i2f32 ssa_1094
								vec1 32 ssa_1099 = i2f32 ssa_1095
								vec1 32 ssa_1100 = fadd ssa_1092, -ssa_1098
								vec1 32 ssa_1101 = fadd ssa_1093, -ssa_1099
								vec1 32 ssa_1102 = imin ssa_1096, ssa_1097
								vec1 32 ssa_1103 = ige ssa_1102, ssa_1
								/* succs: block_148 block_152 */
								if ssa_1103 {
									block block_148:
									/* preds: block_147 */
									vec1 32 ssa_1104 = uge ssa_1097, ssa_1091
									vec1 32 ssa_1105 = uge ssa_1096, ssa_1090
									vec1 32 ssa_1106 = ior ssa_1105, ssa_1104
									/* succs: block_149 block_150 */
									if ssa_1106 {
										block block_149:
										/* preds: block_148 */
										r69 = imov ssa_1
										/* succs: block_151 */
									} else {
										block block_150:
										/* preds: block_148 */
										vec4 32 ssa_1107 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
										vec1 32 ssa_1108 = ushr ssa_1096, ssa_30
										vec1 32 ssa_1109 = iadd ssa_1107.x, ssa_1108
										vec1 32 ssa_1110 = ushr ssa_1097, ssa_30
										vec1 32 ssa_1111 = iadd ssa_1090, ssa_30
										vec1 32 ssa_1112 = ushr ssa_1111, ssa_30
										vec1 32 ssa_1113 = imul ssa_1110, ssa_1112
										vec1 32 ssa_1114 = iadd ssa_1109, ssa_1113
										vec1 32 ssa_1115 = ishl ssa_1114, ssa_31
										vec1 32 ssa_1116 = intrinsic load_ssbo (ssa_30, ssa_1115) ()
										vec1 32 ssa_1117 = iand ssa_1096, ssa_30
										vec1 32 ssa_1118 = ine ssa_1117, ssa_1
										vec1 32 ssa_1119 = bcsel ssa_1118, ssa_72, ssa_1
										vec1 32 ssa_1120 = iand ssa_1097, ssa_30
										vec1 32 ssa_1121 = ine ssa_1120, ssa_1
										vec1 32 ssa_1122 = bcsel ssa_1121, ssa_23, ssa_1
										vec1 32 ssa_1123 = iadd ssa_1119, ssa_1122
										vec1 32 ssa_1124 = iadd ssa_73, -ssa_1123
										vec1 32 ssa_1125 = ishl ssa_1116, ssa_1124
										r69 = extract_u8 ssa_1125, ssa_32
										/* succs: block_151 */
									}
									block block_151:
									/* preds: block_149 block_150 */
									/* succs: block_153 */
								} else {
									block block_152:
									/* preds: block_147 */
									r69 = imov ssa_1
									/* succs: block_153 */
								}
								block block_153:
								/* preds: block_151 block_152 */
								vec1 32 ssa_1129 = imin ssa_1096, ssa_1095
								vec1 32 ssa_1130 = ige ssa_1129, ssa_1
								/* succs: block_154 block_158 */
								if ssa_1130 {
									block block_154:
									/* preds: block_153 */
									vec1 32 ssa_1131 = uge ssa_1095, ssa_1091
									vec1 32 ssa_1132 = uge ssa_1096, ssa_1090
									vec1 32 ssa_1133 = ior ssa_1132, ssa_1131
									/* succs: block_155 block_156 */
									if ssa_1133 {
										block block_155:
										/* preds: block_154 */
										r70 = imov ssa_1
										/* succs: block_157 */
									} else {
										block block_156:
										/* preds: block_154 */
										vec4 32 ssa_1134 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
										vec1 32 ssa_1135 = ushr ssa_1096, ssa_30
										vec1 32 ssa_1136 = iadd ssa_1134.x, ssa_1135
										vec1 32 ssa_1137 = ushr ssa_1095, ssa_30
										vec1 32 ssa_1138 = iadd ssa_1090, ssa_30
										vec1 32 ssa_1139 = ushr ssa_1138, ssa_30
										vec1 32 ssa_1140 = imul ssa_1137, ssa_1139
										vec1 32 ssa_1141 = iadd ssa_1136, ssa_1140
										vec1 32 ssa_1142 = ishl ssa_1141, ssa_31
										vec1 32 ssa_1143 = intrinsic load_ssbo (ssa_30, ssa_1142) ()
										vec1 32 ssa_1144 = iand ssa_1096, ssa_30
										vec1 32 ssa_1145 = ine ssa_1144, ssa_1
										vec1 32 ssa_1146 = bcsel ssa_1145, ssa_72, ssa_1
										vec1 32 ssa_1147 = iand ssa_1095, ssa_30
										vec1 32 ssa_1148 = ine ssa_1147, ssa_1
										vec1 32 ssa_1149 = bcsel ssa_1148, ssa_23, ssa_1
										vec1 32 ssa_1150 = iadd ssa_1146, ssa_1149
										vec1 32 ssa_1151 = iadd ssa_73, -ssa_1150
										vec1 32 ssa_1152 = ishl ssa_1143, ssa_1151
										r70 = extract_u8 ssa_1152, ssa_32
										/* succs: block_157 */
									}
									block block_157:
									/* preds: block_155 block_156 */
									/* succs: block_159 */
								} else {
									block block_158:
									/* preds: block_153 */
									r70 = imov ssa_1
									/* succs: block_159 */
								}
								block block_159:
								/* preds: block_157 block_158 */
								vec1 32 ssa_1156 = imin ssa_1094, ssa_1097
								vec1 32 ssa_1157 = ige ssa_1156, ssa_1
								/* succs: block_160 block_164 */
								if ssa_1157 {
									block block_160:
									/* preds: block_159 */
									vec1 32 ssa_1158 = uge ssa_1097, ssa_1091
									vec1 32 ssa_1159 = uge ssa_1094, ssa_1090
									vec1 32 ssa_1160 = ior ssa_1159, ssa_1158
									/* succs: block_161 block_162 */
									if ssa_1160 {
										block block_161:
										/* preds: block_160 */
										r71 = imov ssa_1
										/* succs: block_163 */
									} else {
										block block_162:
										/* preds: block_160 */
										vec4 32 ssa_1161 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
										vec1 32 ssa_1162 = ushr ssa_1094, ssa_30
										vec1 32 ssa_1163 = iadd ssa_1161.x, ssa_1162
										vec1 32 ssa_1164 = ushr ssa_1097, ssa_30
										vec1 32 ssa_1165 = iadd ssa_1090, ssa_30
										vec1 32 ssa_1166 = ushr ssa_1165, ssa_30
										vec1 32 ssa_1167 = imul ssa_1164, ssa_1166
										vec1 32 ssa_1168 = iadd ssa_1163, ssa_1167
										vec1 32 ssa_1169 = ishl ssa_1168, ssa_31
										vec1 32 ssa_1170 = intrinsic load_ssbo (ssa_30, ssa_1169) ()
										vec1 32 ssa_1171 = iand ssa_1094, ssa_30
										vec1 32 ssa_1172 = ine ssa_1171, ssa_1
										vec1 32 ssa_1173 = bcsel ssa_1172, ssa_72, ssa_1
										vec1 32 ssa_1174 = iand ssa_1097, ssa_30
										vec1 32 ssa_1175 = ine ssa_1174, ssa_1
										vec1 32 ssa_1176 = bcsel ssa_1175, ssa_23, ssa_1
										vec1 32 ssa_1177 = iadd ssa_1173, ssa_1176
										vec1 32 ssa_1178 = iadd ssa_73, -ssa_1177
										vec1 32 ssa_1179 = ishl ssa_1170, ssa_1178
										r71 = extract_u8 ssa_1179, ssa_32
										/* succs: block_163 */
									}
									block block_163:
									/* preds: block_161 block_162 */
									/* succs: block_165 */
								} else {
									block block_164:
									/* preds: block_159 */
									r71 = imov ssa_1
									/* succs: block_165 */
								}
								block block_165:
								/* preds: block_163 block_164 */
								vec1 32 ssa_1183 = imin ssa_1094, ssa_1095
								vec1 32 ssa_1184 = ige ssa_1183, ssa_1
								/* succs: block_166 block_170 */
								if ssa_1184 {
									block block_166:
									/* preds: block_165 */
									vec1 32 ssa_1185 = uge ssa_1095, ssa_1091
									vec1 32 ssa_1186 = uge ssa_1094, ssa_1090
									vec1 32 ssa_1187 = ior ssa_1186, ssa_1185
									/* succs: block_167 block_168 */
									if ssa_1187 {
										block block_167:
										/* preds: block_166 */
										r72 = imov ssa_1
										/* succs: block_169 */
									} else {
										block block_168:
										/* preds: block_166 */
										vec4 32 ssa_1188 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
										vec1 32 ssa_1189 = ushr ssa_1094, ssa_30
										vec1 32 ssa_1190 = iadd ssa_1188.x, ssa_1189
										vec1 32 ssa_1191 = ushr ssa_1095, ssa_30
										vec1 32 ssa_1192 = iadd ssa_1090, ssa_30
										vec1 32 ssa_1193 = ushr ssa_1192, ssa_30
										vec1 32 ssa_1194 = imul ssa_1191, ssa_1193
										vec1 32 ssa_1195 = iadd ssa_1190, ssa_1194
										vec1 32 ssa_1196 = ishl ssa_1195, ssa_31
										vec1 32 ssa_1197 = intrinsic load_ssbo (ssa_30, ssa_1196) ()
										vec1 32 ssa_1198 = iand ssa_1094, ssa_30
										vec1 32 ssa_1199 = ine ssa_1198, ssa_1
										vec1 32 ssa_1200 = bcsel ssa_1199, ssa_72, ssa_1
										vec1 32 ssa_1201 = iand ssa_1095, ssa_30
										vec1 32 ssa_1202 = ine ssa_1201, ssa_1
										vec1 32 ssa_1203 = bcsel ssa_1202, ssa_23, ssa_1
										vec1 32 ssa_1204 = iadd ssa_1200, ssa_1203
										vec1 32 ssa_1205 = iadd ssa_73, -ssa_1204
										vec1 32 ssa_1206 = ishl ssa_1197, ssa_1205
										r72 = extract_u8 ssa_1206, ssa_32
										/* succs: block_169 */
									}
									block block_169:
									/* preds: block_167 block_168 */
									/* succs: block_171 */
								} else {
									block block_170:
									/* preds: block_165 */
									r72 = imov ssa_1
									/* succs: block_171 */
								}
								block block_171:
								/* preds: block_169 block_170 */
								vec1 32 ssa_1210 = u2f32 r69
								vec1 32 ssa_1211 = u2f32 r70
								vec1 32 ssa_1212 = flrp ssa_1210, ssa_1211, ssa_1101
								vec1 32 ssa_1213 = u2f32 r71
								vec1 32 ssa_1214 = u2f32 r72
								vec1 32 ssa_1215 = flrp ssa_1213, ssa_1214, ssa_1101
								vec1 32 ssa_1216 = flrp ssa_1212, ssa_1215, ssa_1100
								vec1 32 ssa_1217 = load_const (0x3b808081 /* 0.003922 */)
								r12 = fmul ssa_1216, ssa_1217
								r9 = imov r12
								r10 = imov r9
								r11 = imov r10
								/* succs: block_403 */
							} else {
								block block_172:
								/* preds: block_146 */
								vec1 32 ssa_1219 = ieq ssa_1043.y, ssa_34
								/* succs: block_173 block_198 */
								if ssa_1219 {
									block block_173:
									/* preds: block_172 */
									vec1 32 ssa_1220 = f2u32 ssa_5.w
									vec1 32 ssa_1221 = f2u32 ssa_5.z
									vec1 32 ssa_1222 = fadd ssa_5.x, ssa_37
									vec1 32 ssa_1223 = fadd ssa_5.y, ssa_37
									vec1 32 ssa_1224 = f2i32 ssa_1222
									vec1 32 ssa_1225 = f2i32 ssa_1223
									vec1 32 ssa_1226 = iadd ssa_1224, ssa_25
									vec1 32 ssa_1227 = iadd ssa_1225, ssa_25
									vec1 32 ssa_1228 = i2f32 ssa_1224
									vec1 32 ssa_1229 = i2f32 ssa_1225
									vec1 32 ssa_1230 = fadd ssa_1222, -ssa_1228
									vec1 32 ssa_1231 = fadd ssa_1223, -ssa_1229
									vec1 32 ssa_1232 = imin ssa_1226, ssa_1227
									vec1 32 ssa_1233 = ige ssa_1232, ssa_1
									/* succs: block_174 block_178 */
									if ssa_1233 {
										block block_174:
										/* preds: block_173 */
										vec1 32 ssa_1234 = uge ssa_1227, ssa_1221
										vec1 32 ssa_1235 = uge ssa_1226, ssa_1220
										vec1 32 ssa_1236 = ior ssa_1235, ssa_1234
										/* succs: block_175 block_176 */
										if ssa_1236 {
											block block_175:
											/* preds: block_174 */
											r73 = imov ssa_1
											/* succs: block_177 */
										} else {
											block block_176:
											/* preds: block_174 */
											vec4 32 ssa_1237 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
											vec1 32 ssa_1238 = ushr ssa_1226, ssa_30
											vec1 32 ssa_1239 = iadd ssa_1237.x, ssa_1238
											vec1 32 ssa_1240 = ushr ssa_1227, ssa_30
											vec1 32 ssa_1241 = iadd ssa_1220, ssa_30
											vec1 32 ssa_1242 = ushr ssa_1241, ssa_30
											vec1 32 ssa_1243 = imul ssa_1240, ssa_1242
											vec1 32 ssa_1244 = iadd ssa_1239, ssa_1243
											vec1 32 ssa_1245 = ishl ssa_1244, ssa_31
											vec1 32 ssa_1246 = intrinsic load_ssbo (ssa_30, ssa_1245) ()
											vec1 32 ssa_1247 = iand ssa_1226, ssa_30
											vec1 32 ssa_1248 = ine ssa_1247, ssa_1
											vec1 32 ssa_1249 = bcsel ssa_1248, ssa_72, ssa_1
											vec1 32 ssa_1250 = iand ssa_1227, ssa_30
											vec1 32 ssa_1251 = ine ssa_1250, ssa_1
											vec1 32 ssa_1252 = bcsel ssa_1251, ssa_23, ssa_1
											vec1 32 ssa_1253 = iadd ssa_1249, ssa_1252
											vec1 32 ssa_1254 = iadd ssa_73, -ssa_1253
											vec1 32 ssa_1255 = ishl ssa_1246, ssa_1254
											r73 = extract_u8 ssa_1255, ssa_32
											/* succs: block_177 */
										}
										block block_177:
										/* preds: block_175 block_176 */
										/* succs: block_179 */
									} else {
										block block_178:
										/* preds: block_173 */
										r73 = imov ssa_1
										/* succs: block_179 */
									}
									block block_179:
									/* preds: block_177 block_178 */
									vec1 32 ssa_1259 = imin ssa_1226, ssa_1225
									vec1 32 ssa_1260 = ige ssa_1259, ssa_1
									/* succs: block_180 block_184 */
									if ssa_1260 {
										block block_180:
										/* preds: block_179 */
										vec1 32 ssa_1261 = uge ssa_1225, ssa_1221
										vec1 32 ssa_1262 = uge ssa_1226, ssa_1220
										vec1 32 ssa_1263 = ior ssa_1262, ssa_1261
										/* succs: block_181 block_182 */
										if ssa_1263 {
											block block_181:
											/* preds: block_180 */
											r74 = imov ssa_1
											/* succs: block_183 */
										} else {
											block block_182:
											/* preds: block_180 */
											vec4 32 ssa_1264 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
											vec1 32 ssa_1265 = ushr ssa_1226, ssa_30
											vec1 32 ssa_1266 = iadd ssa_1264.x, ssa_1265
											vec1 32 ssa_1267 = ushr ssa_1225, ssa_30
											vec1 32 ssa_1268 = iadd ssa_1220, ssa_30
											vec1 32 ssa_1269 = ushr ssa_1268, ssa_30
											vec1 32 ssa_1270 = imul ssa_1267, ssa_1269
											vec1 32 ssa_1271 = iadd ssa_1266, ssa_1270
											vec1 32 ssa_1272 = ishl ssa_1271, ssa_31
											vec1 32 ssa_1273 = intrinsic load_ssbo (ssa_30, ssa_1272) ()
											vec1 32 ssa_1274 = iand ssa_1226, ssa_30
											vec1 32 ssa_1275 = ine ssa_1274, ssa_1
											vec1 32 ssa_1276 = bcsel ssa_1275, ssa_72, ssa_1
											vec1 32 ssa_1277 = iand ssa_1225, ssa_30
											vec1 32 ssa_1278 = ine ssa_1277, ssa_1
											vec1 32 ssa_1279 = bcsel ssa_1278, ssa_23, ssa_1
											vec1 32 ssa_1280 = iadd ssa_1276, ssa_1279
											vec1 32 ssa_1281 = iadd ssa_73, -ssa_1280
											vec1 32 ssa_1282 = ishl ssa_1273, ssa_1281
											r74 = extract_u8 ssa_1282, ssa_32
											/* succs: block_183 */
										}
										block block_183:
										/* preds: block_181 block_182 */
										/* succs: block_185 */
									} else {
										block block_184:
										/* preds: block_179 */
										r74 = imov ssa_1
										/* succs: block_185 */
									}
									block block_185:
									/* preds: block_183 block_184 */
									vec1 32 ssa_1286 = imin ssa_1224, ssa_1227
									vec1 32 ssa_1287 = ige ssa_1286, ssa_1
									/* succs: block_186 block_190 */
									if ssa_1287 {
										block block_186:
										/* preds: block_185 */
										vec1 32 ssa_1288 = uge ssa_1227, ssa_1221
										vec1 32 ssa_1289 = uge ssa_1224, ssa_1220
										vec1 32 ssa_1290 = ior ssa_1289, ssa_1288
										/* succs: block_187 block_188 */
										if ssa_1290 {
											block block_187:
											/* preds: block_186 */
											r75 = imov ssa_1
											/* succs: block_189 */
										} else {
											block block_188:
											/* preds: block_186 */
											vec4 32 ssa_1291 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
											vec1 32 ssa_1292 = ushr ssa_1224, ssa_30
											vec1 32 ssa_1293 = iadd ssa_1291.x, ssa_1292
											vec1 32 ssa_1294 = ushr ssa_1227, ssa_30
											vec1 32 ssa_1295 = iadd ssa_1220, ssa_30
											vec1 32 ssa_1296 = ushr ssa_1295, ssa_30
											vec1 32 ssa_1297 = imul ssa_1294, ssa_1296
											vec1 32 ssa_1298 = iadd ssa_1293, ssa_1297
											vec1 32 ssa_1299 = ishl ssa_1298, ssa_31
											vec1 32 ssa_1300 = intrinsic load_ssbo (ssa_30, ssa_1299) ()
											vec1 32 ssa_1301 = iand ssa_1224, ssa_30
											vec1 32 ssa_1302 = ine ssa_1301, ssa_1
											vec1 32 ssa_1303 = bcsel ssa_1302, ssa_72, ssa_1
											vec1 32 ssa_1304 = iand ssa_1227, ssa_30
											vec1 32 ssa_1305 = ine ssa_1304, ssa_1
											vec1 32 ssa_1306 = bcsel ssa_1305, ssa_23, ssa_1
											vec1 32 ssa_1307 = iadd ssa_1303, ssa_1306
											vec1 32 ssa_1308 = iadd ssa_73, -ssa_1307
											vec1 32 ssa_1309 = ishl ssa_1300, ssa_1308
											r75 = extract_u8 ssa_1309, ssa_32
											/* succs: block_189 */
										}
										block block_189:
										/* preds: block_187 block_188 */
										/* succs: block_191 */
									} else {
										block block_190:
										/* preds: block_185 */
										r75 = imov ssa_1
										/* succs: block_191 */
									}
									block block_191:
									/* preds: block_189 block_190 */
									vec1 32 ssa_1313 = imin ssa_1224, ssa_1225
									vec1 32 ssa_1314 = ige ssa_1313, ssa_1
									/* succs: block_192 block_196 */
									if ssa_1314 {
										block block_192:
										/* preds: block_191 */
										vec1 32 ssa_1315 = uge ssa_1225, ssa_1221
										vec1 32 ssa_1316 = uge ssa_1224, ssa_1220
										vec1 32 ssa_1317 = ior ssa_1316, ssa_1315
										/* succs: block_193 block_194 */
										if ssa_1317 {
											block block_193:
											/* preds: block_192 */
											r76 = imov ssa_1
											/* succs: block_195 */
										} else {
											block block_194:
											/* preds: block_192 */
											vec4 32 ssa_1318 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
											vec1 32 ssa_1319 = ushr ssa_1224, ssa_30
											vec1 32 ssa_1320 = iadd ssa_1318.x, ssa_1319
											vec1 32 ssa_1321 = ushr ssa_1225, ssa_30
											vec1 32 ssa_1322 = iadd ssa_1220, ssa_30
											vec1 32 ssa_1323 = ushr ssa_1322, ssa_30
											vec1 32 ssa_1324 = imul ssa_1321, ssa_1323
											vec1 32 ssa_1325 = iadd ssa_1320, ssa_1324
											vec1 32 ssa_1326 = ishl ssa_1325, ssa_31
											vec1 32 ssa_1327 = intrinsic load_ssbo (ssa_30, ssa_1326) ()
											vec1 32 ssa_1328 = iand ssa_1224, ssa_30
											vec1 32 ssa_1329 = ine ssa_1328, ssa_1
											vec1 32 ssa_1330 = bcsel ssa_1329, ssa_72, ssa_1
											vec1 32 ssa_1331 = iand ssa_1225, ssa_30
											vec1 32 ssa_1332 = ine ssa_1331, ssa_1
											vec1 32 ssa_1333 = bcsel ssa_1332, ssa_23, ssa_1
											vec1 32 ssa_1334 = iadd ssa_1330, ssa_1333
											vec1 32 ssa_1335 = iadd ssa_73, -ssa_1334
											vec1 32 ssa_1336 = ishl ssa_1327, ssa_1335
											r76 = extract_u8 ssa_1336, ssa_32
											/* succs: block_195 */
										}
										block block_195:
										/* preds: block_193 block_194 */
										/* succs: block_197 */
									} else {
										block block_196:
										/* preds: block_191 */
										r76 = imov ssa_1
										/* succs: block_197 */
									}
									block block_197:
									/* preds: block_195 block_196 */
									vec1 32 ssa_1340 = u2f32 r73
									vec1 32 ssa_1341 = u2f32 r74
									vec1 32 ssa_1342 = flrp ssa_1340, ssa_1341, ssa_1231
									vec1 32 ssa_1343 = u2f32 r75
									vec1 32 ssa_1344 = u2f32 r76
									vec1 32 ssa_1345 = flrp ssa_1343, ssa_1344, ssa_1231
									vec1 32 ssa_1346 = flrp ssa_1342, ssa_1345, ssa_1230
									vec1 32 ssa_1347 = load_const (0x3c008081 /* 0.007843 */)
									vec1 32 ssa_1348 = ffma ssa_1347, ssa_1346, ssa_51
									vec1 32 ssa_1349 = fddx ssa_1348
									vec4 32 ssa_1350 = intrinsic load_uniform (ssa_1) (0, 16) /* base=0 */ /* range=16 */	/* fastuidraw_painterStore */
									vec1 32 ssa_1351 = fmul ssa_1348, ssa_1350.x
									vec1 32 ssa_1352 = fddy ssa_1351
									vec1 32 ssa_1353 = fmul ssa_1352, ssa_1352
									vec1 32 ssa_1354 = ffma ssa_1349, ssa_1349, ssa_1353
									vec1 32 ssa_1355 = frsq ssa_1354
									r12 = ffma.sat ssa_1348, ssa_1355, ssa_37
									r9 = imov r12
									r10 = imov r9
									r11 = imov r10
									/* succs: block_402 */
								} else {
									block block_198:
									/* preds: block_172 */
									vec1 32 ssa_1357 = ieq ssa_1043.y, ssa_74
									/* succs: block_199 block_324 */
									if ssa_1357 {
										block block_199:
										/* preds: block_198 */
										vec4 32 ssa_1358 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
										r77 = iand ssa_1358.x, ssa_75
										vec1 32 ssa_1360 = fddx ssa_5.x
										vec1 32 ssa_1361 = fddx ssa_5.y
										vec4 32 ssa_1362 = intrinsic load_uniform (ssa_1) (0, 16) /* base=0 */ /* range=16 */	/* fastuidraw_painterStore */
										vec1 32 ssa_1363 = fmul ssa_5.x, ssa_1362.x
										vec1 32 ssa_1364 = fddy ssa_1363
										vec1 32 ssa_1365 = fmul ssa_5.y, ssa_1362.x
										vec1 32 ssa_1366 = fddy ssa_1365
										vec1 32 ssa_1367 = iand ssa_1358.x, ssa_26
										vec1 32 ssa_1368 = ine ssa_1367, ssa_1
										vec1 32 ssa_1369 = ishl r77, ssa_31
										r78 = intrinsic load_ssbo (ssa_30, ssa_1369) ()
										vec1 32 ssa_1371 = load_const (0x45000000 /* 2048.000000 */)
										vec1 32 ssa_1372 = load_const (0xc5000000 /* -2048.000000 */)
										r83 = imov ssa_1372
										r82 = imov r83
										r81 = imov ssa_1371
										r80 = imov r81
										r79 = imov r77
										/* succs: block_200 */
										loop {
											block block_200:
											/* preds: block_199 block_206 */
											vec1 32 ssa_1379 = iand r78, ssa_30
											vec1 32 ssa_1380 = ieq ssa_1379, ssa_1
											/* succs: block_201 block_202 */
											if ssa_1380 {
												block block_201:
												/* preds: block_200 */
												break
												/* succs: block_207 */
											} else {
												block block_202:
												/* preds: block_200 */
												/* succs: block_203 */
											}
											block block_203:
											/* preds: block_202 */
											vec1 32 ssa_1381 = ishl r78, ssa_28
											vec1 32 ssa_1382 = ushr ssa_1381, ssa_76
											vec1 32 ssa_1383 = ieq ssa_1382, ssa_1
											/* succs: block_204 block_205 */
											if ssa_1383 {
												block block_204:
												/* preds: block_203 */
												vec1 32 ssa_1384 = fadd r82, r80
												vec1 32 ssa_1385 = fmul ssa_37, ssa_1384
												r84 = flt ssa_1385, ssa_5.x
												r82 = bcsel r84, ssa_1385, r82
												r80 = bcsel r84, r80, ssa_1385
												/* succs: block_206 */
											} else {
												block block_205:
												/* preds: block_203 */
												vec1 32 ssa_1389 = fadd r83, r81
												vec1 32 ssa_1390 = fmul ssa_37, ssa_1389
												r84 = flt ssa_1390, ssa_5.y
												r83 = bcsel r84, ssa_1390, r83
												r81 = bcsel r84, r81, ssa_1390
												/* succs: block_206 */
											}
											block block_206:
											/* preds: block_204 block_205 */
											vec1 32 ssa_1399 = bcsel r84, ssa_77, ssa_31
											vec1 32 ssa_1400 = iadd ssa_77, -ssa_1399
											vec1 32 ssa_1401 = ishl r78, ssa_1400
											vec1 32 ssa_1402 = ushr ssa_1401, ssa_77
											r79 = iadd ssa_1402, r77
											vec1 32 ssa_1404 = ishl r79, ssa_31
											r78 = intrinsic load_ssbo (ssa_30, ssa_1404) ()
											/* succs: block_200 */
										}
										block block_207:
										/* preds: block_201 */
										vec1 32 ssa_1406 = ishl r78, ssa_78
										vec1 32 ssa_1407 = extract_u16 ssa_1406, ssa_30
										vec1 32 ssa_1408 = ushr r78, ssa_77
										vec1 32 ssa_1409 = iadd r79, ssa_30
										vec1 32 ssa_1410 = ishl ssa_1409, ssa_31
										vec1 32 ssa_1411 = intrinsic load_ssbo (ssa_30, ssa_1410) ()
										vec1 32 ssa_1412 = ishl ssa_1411, ssa_72
										vec1 32 ssa_1413 = extract_u8 ssa_1412, ssa_32
										vec1 32 ssa_1414 = extract_u8 ssa_1411, ssa_32
										vec1 32 ssa_1415 = u2f32 ssa_1413
										vec1 32 ssa_1416 = u2f32 ssa_1414
										vec1 32 ssa_1417 = load_const (0x3b800000 /* 0.003906 */)
										vec1 32 ssa_1418 = fmul ssa_1415, ssa_1417
										vec1 32 ssa_1419 = fmul ssa_1416, ssa_1417
										vec1 32 ssa_1420 = ishl ssa_1411, ssa_23
										vec1 32 ssa_1421 = extract_u16 ssa_1420, ssa_30
										r85 = iadd ssa_1421, ssa_24
										vec1 32 ssa_1423 = flrp r82, r80, ssa_1418
										vec1 32 ssa_1424 = flrp r83, r81, ssa_1419
										vec1 32 ssa_1425 = fadd ssa_1423, -ssa_5.x
										vec1 32 ssa_1426 = fadd ssa_1424, -ssa_5.y
										vec1 32 ssa_1427 = fmul ssa_1366, ssa_1366
										vec1 32 ssa_1428 = ffma ssa_1361, ssa_1361, ssa_1427
										vec1 32 ssa_1429 = fmul ssa_1364, ssa_1366
										vec1 32 ssa_1430 = ffma ssa_1360, ssa_1361, ssa_1429
										vec1 32 ssa_1431 = fmul ssa_1364, ssa_1364
										vec1 32 ssa_1432 = ffma ssa_1360, ssa_1360, ssa_1431
										vec1 32 ssa_1433 = fmul ssa_1430, ssa_1426
										vec1 32 ssa_1434 = ffma -ssa_1428, ssa_1425, ssa_1433
										vec1 32 ssa_1435 = fmul ssa_1432, ssa_1426
										vec1 32 ssa_1436 = ffma ssa_1430, ssa_1425, -ssa_1435
										vec1 32 ssa_1437 = fmul ssa_1436, ssa_1361
										vec1 32 ssa_1438 = ffma ssa_1434, ssa_1360, ssa_1437
										vec1 32 ssa_1439 = fmul ssa_1436, ssa_1366
										vec1 32 ssa_1440 = ffma ssa_1434, ssa_1364, ssa_1439
										vec1 32 ssa_1441 = fadd abs(ssa_1438), abs(ssa_1440)
										vec1 32 ssa_1442 = fmul ssa_1425, ssa_1361
										vec1 32 ssa_1443 = ffma -ssa_1426, ssa_1360, ssa_1442
										vec1 32 ssa_1444 = fmul ssa_1425, ssa_1366
										vec1 32 ssa_1445 = ffma -ssa_1426, ssa_1364, ssa_1444
										vec1 32 ssa_1446 = fadd abs(ssa_1443), abs(ssa_1445)
										vec1 32 ssa_1447 = fmax ssa_1441, ssa_80
										vec1 32 ssa_1448 = fmax ssa_1446, ssa_80
										vec1 32 ssa_1449 = frcp ssa_1447
										vec1 32 ssa_1450 = fmul ssa_1434, ssa_1449
										vec1 32 ssa_1451 = fmul ssa_1436, ssa_1449
										vec1 32 ssa_1452 = frcp ssa_1448
										vec1 32 ssa_1453 = fmul ssa_1426, ssa_1452
										vec1 32 ssa_1454 = fmov -ssa_1453
										vec1 32 ssa_1455 = fmul ssa_1425, ssa_1452
										vec1 32 ssa_1456 = fmul ssa_1451, ssa_1426
										vec1 32 ssa_1457 = ffma ssa_1450, ssa_1425, ssa_1456
										vec1 32 ssa_1458 = fmov -ssa_1450
										vec1 32 ssa_1459 = fmov -ssa_1451
										vec1 32 ssa_1460 = fmov -ssa_1457
										vec1 32 ssa_1461 = flt ssa_1457, ssa_1
										vec1 32 ssa_1462 = bcsel ssa_1461, ssa_1460, ssa_1457
										vec1 32 ssa_1463 = bcsel ssa_1461, ssa_1458, ssa_1450
										vec1 32 ssa_1464 = bcsel ssa_1461, ssa_1459, ssa_1451
										vec1 32 ssa_1465 = fmul ssa_1463, ssa_1455
										vec1 32 ssa_1466 = fmul ssa_1453, ssa_1464
										vec1 32 ssa_1467 = fmov -ssa_1455
										vec1 32 ssa_1468 = flt ssa_1465, -ssa_1466
										vec1 32 ssa_1469 = bcsel ssa_1468, ssa_1453, ssa_1454
										vec1 32 ssa_1470 = bcsel ssa_1468, ssa_1467, ssa_1455
										r86 = iadd ssa_1407, r77
										r89 = imov ssa_79
										r88 = imov r89
										r87 = imov ssa_1
										/* succs: block_208 */
										loop {
											block block_208:
											/* preds: block_207 block_310 */
											vec1 32 ssa_1477 = uge r87, ssa_1408
											/* succs: block_209 block_210 */
											if ssa_1477 {
												block block_209:
												/* preds: block_208 */
												break
												/* succs: block_311 */
											} else {
												block block_210:
												/* preds: block_208 */
												/* succs: block_211 */
											}
											block block_211:
											/* preds: block_210 */
											vec1 32 ssa_1478 = ishl r86, ssa_31
											vec1 32 ssa_1479 = intrinsic load_ssbo (ssa_30, ssa_1478) ()
											r86 = iadd r86, ssa_30
											vec1 32 ssa_1481 = ishl ssa_1479, ssa_23
											vec1 32 ssa_1482 = extract_u16 ssa_1481, ssa_30
											vec1 32 ssa_1483 = ishl ssa_1482, ssa_77
											vec1 32 ssa_1484 = ushr ssa_1483, ssa_77
											vec1 32 ssa_1485 = iadd r77, ssa_1484
											vec1 32 ssa_1486 = iand ssa_1482, ssa_81
											vec1 32 ssa_1487 = ishl ssa_1485, ssa_31
											vec1 32 ssa_1488 = intrinsic load_ssbo (ssa_30, ssa_1487) ()
											vec1 32 ssa_1489 = unpack_half_2x16_split_x ssa_1488
											vec1 32 ssa_1490 = unpack_half_2x16_split_y ssa_1488
											vec1 32 ssa_1491 = iadd ssa_1485, ssa_30
											vec1 32 ssa_1492 = ishl ssa_1491, ssa_31
											vec1 32 ssa_1493 = intrinsic load_ssbo (ssa_30, ssa_1492) ()
											r90 = unpack_half_2x16_split_x ssa_1493
											r91 = unpack_half_2x16_split_y ssa_1493
											vec1 32 ssa_1496 = ine ssa_1486, ssa_1
											/* succs: block_212 block_213 */
											if ssa_1496 {
												block block_212:
												/* preds: block_211 */
												vec1 32 ssa_1497 = iadd ssa_1485, ssa_31
												vec1 32 ssa_1498 = ishl ssa_1497, ssa_31
												vec1 32 ssa_1499 = intrinsic load_ssbo (ssa_30, ssa_1498) ()
												r92 = unpack_half_2x16_split_x ssa_1499
												r93 = unpack_half_2x16_split_y ssa_1499
												/* succs: block_214 */
											} else {
												block block_213:
												/* preds: block_211 */
												vec1 32 ssa_1502 = fadd ssa_1489, r90
												vec1 32 ssa_1503 = fadd ssa_1490, r91
												r94 = fmul ssa_37, ssa_1502
												r95 = fmul ssa_37, ssa_1503
												r93 = imov r91
												r91 = imov r95
												r92 = imov r90
												r90 = imov r94
												/* succs: block_214 */
											}
											block block_214:
											/* preds: block_212 block_213 */
											vec1 32 ssa_1510 = fadd ssa_1489, -ssa_5.x
											vec1 32 ssa_1511 = fadd ssa_1490, -ssa_5.y
											vec1 32 ssa_1512 = fmul ssa_1464, ssa_1511
											vec1 32 ssa_1513 = ffma ssa_1463, ssa_1510, ssa_1512
											vec1 32 ssa_1514 = fmul ssa_1470, ssa_1511
											vec1 32 ssa_1515 = ffma ssa_1469, ssa_1510, ssa_1514
											vec1 32 ssa_1516 = fadd r90, -ssa_5.x
											vec1 32 ssa_1517 = fadd r91, -ssa_5.y
											vec1 32 ssa_1518 = fmul ssa_1464, ssa_1517
											vec1 32 ssa_1519 = ffma ssa_1463, ssa_1516, ssa_1518
											vec1 32 ssa_1520 = fmul ssa_1470, ssa_1517
											vec1 32 ssa_1521 = ffma ssa_1469, ssa_1516, ssa_1520
											vec1 32 ssa_1522 = fadd r92, -ssa_5.x
											vec1 32 ssa_1523 = fadd r93, -ssa_5.y
											vec1 32 ssa_1524 = fmul ssa_1464, ssa_1523
											vec1 32 ssa_1525 = ffma ssa_1463, ssa_1522, ssa_1524
											vec1 32 ssa_1526 = fmul ssa_1470, ssa_1523
											vec1 32 ssa_1527 = ffma ssa_1469, ssa_1522, ssa_1526
											vec1 32 ssa_1528 = ffma -ssa_33, ssa_1519, ssa_1513
											vec1 32 ssa_1529 = ffma -ssa_33, ssa_1521, ssa_1515
											vec1 32 ssa_1530 = fadd ssa_1528, ssa_1525
											vec1 32 ssa_1531 = fadd ssa_1529, ssa_1527
											vec1 32 ssa_1532 = fadd ssa_1513, -ssa_1519
											vec1 32 ssa_1533 = fadd ssa_1515, -ssa_1521
											vec1 32 ssa_1534 = flt ssa_1, ssa_1513
											vec1 32 ssa_1535 = bcsel ssa_1534, ssa_31, ssa_1
											vec1 32 ssa_1536 = flt ssa_1, ssa_1519
											vec1 32 ssa_1537 = bcsel ssa_1536, ssa_71, ssa_1
											vec1 32 ssa_1538 = flt ssa_1, ssa_1525
											vec1 32 ssa_1539 = bcsel ssa_1538, ssa_72, ssa_1
											vec1 32 ssa_1540 = iadd ssa_1535, ssa_1537
											vec1 32 ssa_1541 = iadd ssa_1540, ssa_1539
											vec1 32 ssa_1542 = ushr ssa_82, ssa_1541
											r96 = iand ssa_1542, ssa_32
											vec1 32 ssa_1544 = flt ssa_1, ssa_1515
											vec1 32 ssa_1545 = bcsel ssa_1544, ssa_31, ssa_1
											vec1 32 ssa_1546 = flt ssa_1, ssa_1521
											vec1 32 ssa_1547 = bcsel ssa_1546, ssa_71, ssa_1
											vec1 32 ssa_1548 = flt ssa_1, ssa_1527
											vec1 32 ssa_1549 = bcsel ssa_1548, ssa_72, ssa_1
											vec1 32 ssa_1550 = iadd ssa_1545, ssa_1547
											vec1 32 ssa_1551 = iadd ssa_1550, ssa_1549
											vec1 32 ssa_1552 = ushr ssa_82, ssa_1551
											r97 = iand ssa_1552, ssa_32
											vec1 32 ssa_1554 = ine r97, ssa_1
											/* succs: block_215 block_237 */
											if ssa_1554 {
												block block_215:
												/* preds: block_214 */
												/* succs: block_216 block_217 */
												if ssa_1496 {
													block block_216:
													/* preds: block_215 */
													r98 = flt ssa_83, abs(ssa_1531)
													/* succs: block_218 */
												} else {
													block block_217:
													/* preds: block_215 */
													r98 = imov ssa_1
													/* succs: block_218 */
												}
												block block_218:
												/* preds: block_216 block_217 */
												/* succs: block_219 block_220 */
												if r98 {
													block block_219:
													/* preds: block_218 */
													vec1 32 ssa_1557 = frcp ssa_1531
													vec1 32 ssa_1558 = fmul ssa_1531, ssa_1515
													vec1 32 ssa_1559 = ffma ssa_1533, ssa_1533, -ssa_1558
													vec1 32 ssa_1560 = fmax ssa_1559, ssa_1
													vec1 32 ssa_1561 = flt ssa_1559, ssa_1
													r97 = bcsel ssa_1561, ssa_1, r97
													vec1 32 ssa_1563 = fsqrt ssa_1560
													vec1 32 ssa_1564 = fadd ssa_1533, -ssa_1563
													r99 = fmul ssa_1564, ssa_1557
													vec1 32 ssa_1566 = fadd ssa_1533, ssa_1563
													r100 = fmul ssa_1566, ssa_1557
													/* succs: block_221 */
												} else {
													block block_220:
													/* preds: block_218 */
													vec1 32 ssa_1568 = fmul ssa_37, ssa_1515
													vec1 32 ssa_1569 = frcp ssa_1533
													r100 = fmul ssa_1568, ssa_1569
													r99 = imov r100
													/* succs: block_221 */
												}
												block block_221:
												/* preds: block_219 block_220 */
												vec1 32 ssa_1574 = fmul ssa_1532, ssa_33
												vec1 32 ssa_1575 = ffma ssa_1530, r99, -ssa_1574
												vec1 32 ssa_1576 = ffma ssa_1575, r99, ssa_1513
												vec1 32 ssa_1577 = ffma ssa_1530, r100, -ssa_1574
												vec1 32 ssa_1578 = ffma ssa_1577, r100, ssa_1513
												vec1 32 ssa_1579 = iand r97, ssa_30
												vec1 32 ssa_1580 = ine ssa_1579, ssa_1
												/* succs: block_222 block_226 */
												if ssa_1580 {
													block block_222:
													/* preds: block_221 */
													vec1 32 ssa_1581 = fge ssa_1576, ssa_1
													vec1 32 ssa_1582 = fge ssa_1462, ssa_1576
													vec1 32 ssa_1583 = iand ssa_1582, ssa_1581
													r101 = bcsel ssa_1583, ssa_30, ssa_1
													vec1 32 ssa_1585 = flt ssa_1576, ssa_1
													/* succs: block_223 block_224 */
													if ssa_1585 {
														block block_223:
														/* preds: block_222 */
														r89 = fmin r89, abs(ssa_1576)
														/* succs: block_225 */
													} else {
														block block_224:
														/* preds: block_222 */
														r88 = fmin r88, abs(ssa_1576)
														/* succs: block_225 */
													}
													block block_225:
													/* preds: block_223 block_224 */
													/* succs: block_227 */
												} else {
													block block_226:
													/* preds: block_221 */
													r101 = imov ssa_1
													/* succs: block_227 */
												}
												block block_227:
												/* preds: block_225 block_226 */
												vec1 32 ssa_1593 = ult ssa_30, r97
												/* succs: block_228 block_235 */
												if ssa_1593 {
													block block_228:
													/* preds: block_227 */
													vec1 32 ssa_1594 = fge ssa_1578, ssa_1
													vec1 32 ssa_1595 = fge ssa_1462, ssa_1578
													vec1 32 ssa_1596 = iand ssa_1595, ssa_1594
													/* succs: block_229 block_230 */
													if ssa_1596 {
														block block_229:
														/* preds: block_228 */
														r101 = iadd r101, ssa_25
														/* succs: block_231 */
													} else {
														block block_230:
														/* preds: block_228 */
														/* succs: block_231 */
													}
													block block_231:
													/* preds: block_229 block_230 */
													vec1 32 ssa_1599 = flt ssa_1, ssa_1578
													/* succs: block_232 block_233 */
													if ssa_1599 {
														block block_232:
														/* preds: block_231 */
														r89 = fmin r89, abs(ssa_1578)
														/* succs: block_234 */
													} else {
														block block_233:
														/* preds: block_231 */
														r88 = fmin r88, abs(ssa_1578)
														/* succs: block_234 */
													}
													block block_234:
													/* preds: block_232 block_233 */
													/* succs: block_236 */
												} else {
													block block_235:
													/* preds: block_227 */
													/* succs: block_236 */
												}
												block block_236:
												/* preds: block_234 block_235 */
												/* succs: block_238 */
											} else {
												block block_237:
												/* preds: block_214 */
												r101 = imov ssa_1
												/* succs: block_238 */
											}
											block block_238:
											/* preds: block_236 block_237 */
											vec1 32 ssa_1610 = ine r96, ssa_1
											/* succs: block_239 block_258 */
											if ssa_1610 {
												block block_239:
												/* preds: block_238 */
												/* succs: block_240 block_241 */
												if ssa_1496 {
													block block_240:
													/* preds: block_239 */
													r102 = flt ssa_83, abs(ssa_1530)
													/* succs: block_242 */
												} else {
													block block_241:
													/* preds: block_239 */
													r102 = imov ssa_1
													/* succs: block_242 */
												}
												block block_242:
												/* preds: block_240 block_241 */
												/* succs: block_243 block_244 */
												if r102 {
													block block_243:
													/* preds: block_242 */
													vec1 32 ssa_1613 = frcp ssa_1530
													vec1 32 ssa_1614 = fmul ssa_1530, ssa_1513
													vec1 32 ssa_1615 = ffma ssa_1532, ssa_1532, -ssa_1614
													vec1 32 ssa_1616 = fmax ssa_1615, ssa_1
													vec1 32 ssa_1617 = flt ssa_1615, ssa_1
													r96 = bcsel ssa_1617, ssa_1, r96
													vec1 32 ssa_1619 = fsqrt ssa_1616
													vec1 32 ssa_1620 = fadd ssa_1532, -ssa_1619
													r103 = fmul ssa_1620, ssa_1613
													vec1 32 ssa_1622 = fadd ssa_1532, ssa_1619
													r104 = fmul ssa_1622, ssa_1613
													/* succs: block_245 */
												} else {
													block block_244:
													/* preds: block_242 */
													vec1 32 ssa_1624 = fmul ssa_37, ssa_1513
													vec1 32 ssa_1625 = frcp ssa_1532
													r104 = fmul ssa_1624, ssa_1625
													r103 = imov r104
													/* succs: block_245 */
												}
												block block_245:
												/* preds: block_243 block_244 */
												vec1 32 ssa_1630 = fmul ssa_1533, ssa_33
												vec1 32 ssa_1631 = ffma ssa_1531, r103, -ssa_1630
												vec1 32 ssa_1632 = ffma ssa_1631, r103, ssa_1515
												vec1 32 ssa_1633 = ffma ssa_1531, r104, -ssa_1630
												vec1 32 ssa_1634 = ffma ssa_1633, r104, ssa_1515
												vec1 32 ssa_1635 = iand r96, ssa_30
												vec1 32 ssa_1636 = ine ssa_1635, ssa_1
												/* succs: block_246 block_250 */
												if ssa_1636 {
													block block_246:
													/* preds: block_245 */
													vec1 32 ssa_1637 = flt ssa_1, ssa_1632
													/* succs: block_247 block_248 */
													if ssa_1637 {
														block block_247:
														/* preds: block_246 */
														r89 = fmin r89, abs(ssa_1632)
														/* succs: block_249 */
													} else {
														block block_248:
														/* preds: block_246 */
														r88 = fmin r88, abs(ssa_1632)
														/* succs: block_249 */
													}
													block block_249:
													/* preds: block_247 block_248 */
													/* succs: block_251 */
												} else {
													block block_250:
													/* preds: block_245 */
													/* succs: block_251 */
												}
												block block_251:
												/* preds: block_249 block_250 */
												vec1 32 ssa_1644 = ult ssa_30, r96
												/* succs: block_252 block_256 */
												if ssa_1644 {
													block block_252:
													/* preds: block_251 */
													vec1 32 ssa_1645 = flt ssa_1634, ssa_1
													/* succs: block_253 block_254 */
													if ssa_1645 {
														block block_253:
														/* preds: block_252 */
														r89 = fmin r89, abs(ssa_1634)
														/* succs: block_255 */
													} else {
														block block_254:
														/* preds: block_252 */
														r88 = fmin r88, abs(ssa_1634)
														/* succs: block_255 */
													}
													block block_255:
													/* preds: block_253 block_254 */
													/* succs: block_257 */
												} else {
													block block_256:
													/* preds: block_251 */
													/* succs: block_257 */
												}
												block block_257:
												/* preds: block_255 block_256 */
												/* succs: block_259 */
											} else {
												block block_258:
												/* preds: block_238 */
												/* succs: block_259 */
											}
											block block_259:
											/* preds: block_257 block_258 */
											r85 = iadd r85, r101
											vec1 32 ssa_1655 = iadd r87, ssa_30
											vec1 32 ssa_1656 = ult ssa_1655, ssa_1408
											/* succs: block_260 block_309 */
											if ssa_1656 {
												block block_260:
												/* preds: block_259 */
												vec1 32 ssa_1657 = extract_u16 ssa_1479, ssa_30
												vec1 32 ssa_1658 = ishl ssa_1657, ssa_77
												vec1 32 ssa_1659 = ushr ssa_1658, ssa_77
												vec1 32 ssa_1660 = iadd r77, ssa_1659
												vec1 32 ssa_1661 = iand ssa_1657, ssa_81
												vec1 32 ssa_1662 = ishl ssa_1660, ssa_31
												vec1 32 ssa_1663 = intrinsic load_ssbo (ssa_30, ssa_1662) ()
												vec1 32 ssa_1664 = unpack_half_2x16_split_x ssa_1663
												vec1 32 ssa_1665 = unpack_half_2x16_split_y ssa_1663
												vec1 32 ssa_1666 = iadd ssa_1660, ssa_30
												vec1 32 ssa_1667 = ishl ssa_1666, ssa_31
												vec1 32 ssa_1668 = intrinsic load_ssbo (ssa_30, ssa_1667) ()
												r105 = unpack_half_2x16_split_x ssa_1668
												r106 = unpack_half_2x16_split_y ssa_1668
												vec1 32 ssa_1671 = ine ssa_1661, ssa_1
												/* succs: block_261 block_262 */
												if ssa_1671 {
													block block_261:
													/* preds: block_260 */
													vec1 32 ssa_1672 = iadd ssa_1660, ssa_31
													vec1 32 ssa_1673 = ishl ssa_1672, ssa_31
													vec1 32 ssa_1674 = intrinsic load_ssbo (ssa_30, ssa_1673) ()
													r107 = unpack_half_2x16_split_x ssa_1674
													r108 = unpack_half_2x16_split_y ssa_1674
													/* succs: block_263 */
												} else {
													block block_262:
													/* preds: block_260 */
													vec1 32 ssa_1677 = fadd ssa_1664, r105
													vec1 32 ssa_1678 = fadd ssa_1665, r106
													r109 = fmul ssa_37, ssa_1677
													r110 = fmul ssa_37, ssa_1678
													r108 = imov r106
													r106 = imov r110
													r107 = imov r105
													r105 = imov r109
													/* succs: block_263 */
												}
												block block_263:
												/* preds: block_261 block_262 */
												vec1 32 ssa_1685 = fadd ssa_1664, -ssa_5.x
												vec1 32 ssa_1686 = fadd ssa_1665, -ssa_5.y
												vec1 32 ssa_1687 = fmul ssa_1464, ssa_1686
												vec1 32 ssa_1688 = ffma ssa_1463, ssa_1685, ssa_1687
												vec1 32 ssa_1689 = fmul ssa_1470, ssa_1686
												vec1 32 ssa_1690 = ffma ssa_1469, ssa_1685, ssa_1689
												vec1 32 ssa_1691 = fadd r105, -ssa_5.x
												vec1 32 ssa_1692 = fadd r106, -ssa_5.y
												vec1 32 ssa_1693 = fmul ssa_1464, ssa_1692
												vec1 32 ssa_1694 = ffma ssa_1463, ssa_1691, ssa_1693
												vec1 32 ssa_1695 = fmul ssa_1470, ssa_1692
												vec1 32 ssa_1696 = ffma ssa_1469, ssa_1691, ssa_1695
												vec1 32 ssa_1697 = fadd r107, -ssa_5.x
												vec1 32 ssa_1698 = fadd r108, -ssa_5.y
												vec1 32 ssa_1699 = fmul ssa_1464, ssa_1698
												vec1 32 ssa_1700 = ffma ssa_1463, ssa_1697, ssa_1699
												vec1 32 ssa_1701 = fmul ssa_1470, ssa_1698
												vec1 32 ssa_1702 = ffma ssa_1469, ssa_1697, ssa_1701
												vec1 32 ssa_1703 = ffma -ssa_33, ssa_1694, ssa_1688
												vec1 32 ssa_1704 = ffma -ssa_33, ssa_1696, ssa_1690
												vec1 32 ssa_1705 = fadd ssa_1703, ssa_1700
												vec1 32 ssa_1706 = fadd ssa_1704, ssa_1702
												vec1 32 ssa_1707 = fadd ssa_1688, -ssa_1694
												vec1 32 ssa_1708 = fadd ssa_1690, -ssa_1696
												vec1 32 ssa_1709 = flt ssa_1, ssa_1688
												vec1 32 ssa_1710 = bcsel ssa_1709, ssa_31, ssa_1
												vec1 32 ssa_1711 = flt ssa_1, ssa_1694
												vec1 32 ssa_1712 = bcsel ssa_1711, ssa_71, ssa_1
												vec1 32 ssa_1713 = flt ssa_1, ssa_1700
												vec1 32 ssa_1714 = bcsel ssa_1713, ssa_72, ssa_1
												vec1 32 ssa_1715 = iadd ssa_1710, ssa_1712
												vec1 32 ssa_1716 = iadd ssa_1715, ssa_1714
												vec1 32 ssa_1717 = ushr ssa_82, ssa_1716
												r111 = iand ssa_1717, ssa_32
												vec1 32 ssa_1719 = flt ssa_1, ssa_1690
												vec1 32 ssa_1720 = bcsel ssa_1719, ssa_31, ssa_1
												vec1 32 ssa_1721 = flt ssa_1, ssa_1696
												vec1 32 ssa_1722 = bcsel ssa_1721, ssa_71, ssa_1
												vec1 32 ssa_1723 = flt ssa_1, ssa_1702
												vec1 32 ssa_1724 = bcsel ssa_1723, ssa_72, ssa_1
												vec1 32 ssa_1725 = iadd ssa_1720, ssa_1722
												vec1 32 ssa_1726 = iadd ssa_1725, ssa_1724
												vec1 32 ssa_1727 = ushr ssa_82, ssa_1726
												r112 = iand ssa_1727, ssa_32
												vec1 32 ssa_1729 = ine r112, ssa_1
												/* succs: block_264 block_286 */
												if ssa_1729 {
													block block_264:
													/* preds: block_263 */
													/* succs: block_265 block_266 */
													if ssa_1671 {
														block block_265:
														/* preds: block_264 */
														r113 = flt ssa_83, abs(ssa_1706)
														/* succs: block_267 */
													} else {
														block block_266:
														/* preds: block_264 */
														r113 = imov ssa_1
														/* succs: block_267 */
													}
													block block_267:
													/* preds: block_265 block_266 */
													/* succs: block_268 block_269 */
													if r113 {
														block block_268:
														/* preds: block_267 */
														vec1 32 ssa_1732 = frcp ssa_1706
														vec1 32 ssa_1733 = fmul ssa_1706, ssa_1690
														vec1 32 ssa_1734 = ffma ssa_1708, ssa_1708, -ssa_1733
														vec1 32 ssa_1735 = fmax ssa_1734, ssa_1
														vec1 32 ssa_1736 = flt ssa_1734, ssa_1
														r112 = bcsel ssa_1736, ssa_1, r112
														vec1 32 ssa_1738 = fsqrt ssa_1735
														vec1 32 ssa_1739 = fadd ssa_1708, -ssa_1738
														r114 = fmul ssa_1739, ssa_1732
														vec1 32 ssa_1741 = fadd ssa_1708, ssa_1738
														r115 = fmul ssa_1741, ssa_1732
														/* succs: block_270 */
													} else {
														block block_269:
														/* preds: block_267 */
														vec1 32 ssa_1743 = fmul ssa_37, ssa_1690
														vec1 32 ssa_1744 = frcp ssa_1708
														r115 = fmul ssa_1743, ssa_1744
														r114 = imov r115
														/* succs: block_270 */
													}
													block block_270:
													/* preds: block_268 block_269 */
													vec1 32 ssa_1749 = fmul ssa_1707, ssa_33
													vec1 32 ssa_1750 = ffma ssa_1705, r114, -ssa_1749
													vec1 32 ssa_1751 = ffma ssa_1750, r114, ssa_1688
													vec1 32 ssa_1752 = ffma ssa_1705, r115, -ssa_1749
													vec1 32 ssa_1753 = ffma ssa_1752, r115, ssa_1688
													vec1 32 ssa_1754 = iand r112, ssa_30
													vec1 32 ssa_1755 = ine ssa_1754, ssa_1
													/* succs: block_271 block_275 */
													if ssa_1755 {
														block block_271:
														/* preds: block_270 */
														vec1 32 ssa_1756 = fge ssa_1751, ssa_1
														vec1 32 ssa_1757 = fge ssa_1462, ssa_1751
														vec1 32 ssa_1758 = iand ssa_1757, ssa_1756
														r116 = bcsel ssa_1758, ssa_30, ssa_1
														vec1 32 ssa_1760 = flt ssa_1751, ssa_1
														/* succs: block_272 block_273 */
														if ssa_1760 {
															block block_272:
															/* preds: block_271 */
															r89 = fmin r89, abs(ssa_1751)
															/* succs: block_274 */
														} else {
															block block_273:
															/* preds: block_271 */
															r88 = fmin r88, abs(ssa_1751)
															/* succs: block_274 */
														}
														block block_274:
														/* preds: block_272 block_273 */
														/* succs: block_276 */
													} else {
														block block_275:
														/* preds: block_270 */
														r116 = imov ssa_1
														/* succs: block_276 */
													}
													block block_276:
													/* preds: block_274 block_275 */
													vec1 32 ssa_1768 = ult ssa_30, r112
													/* succs: block_277 block_284 */
													if ssa_1768 {
														block block_277:
														/* preds: block_276 */
														vec1 32 ssa_1769 = fge ssa_1753, ssa_1
														vec1 32 ssa_1770 = fge ssa_1462, ssa_1753
														vec1 32 ssa_1771 = iand ssa_1770, ssa_1769
														/* succs: block_278 block_279 */
														if ssa_1771 {
															block block_278:
															/* preds: block_277 */
															r116 = iadd r116, ssa_25
															/* succs: block_280 */
														} else {
															block block_279:
															/* preds: block_277 */
															/* succs: block_280 */
														}
														block block_280:
														/* preds: block_278 block_279 */
														vec1 32 ssa_1774 = flt ssa_1, ssa_1753
														/* succs: block_281 block_282 */
														if ssa_1774 {
															block block_281:
															/* preds: block_280 */
															r89 = fmin r89, abs(ssa_1753)
															/* succs: block_283 */
														} else {
															block block_282:
															/* preds: block_280 */
															r88 = fmin r88, abs(ssa_1753)
															/* succs: block_283 */
														}
														block block_283:
														/* preds: block_281 block_282 */
														/* succs: block_285 */
													} else {
														block block_284:
														/* preds: block_276 */
														/* succs: block_285 */
													}
													block block_285:
													/* preds: block_283 block_284 */
													/* succs: block_287 */
												} else {
													block block_286:
													/* preds: block_263 */
													r116 = imov ssa_1
													/* succs: block_287 */
												}
												block block_287:
												/* preds: block_285 block_286 */
												vec1 32 ssa_1785 = ine r111, ssa_1
												/* succs: block_288 block_307 */
												if ssa_1785 {
													block block_288:
													/* preds: block_287 */
													/* succs: block_289 block_290 */
													if ssa_1671 {
														block block_289:
														/* preds: block_288 */
														r117 = flt ssa_83, abs(ssa_1705)
														/* succs: block_291 */
													} else {
														block block_290:
														/* preds: block_288 */
														r117 = imov ssa_1
														/* succs: block_291 */
													}
													block block_291:
													/* preds: block_289 block_290 */
													/* succs: block_292 block_293 */
													if r117 {
														block block_292:
														/* preds: block_291 */
														vec1 32 ssa_1788 = frcp ssa_1705
														vec1 32 ssa_1789 = fmul ssa_1705, ssa_1688
														vec1 32 ssa_1790 = ffma ssa_1707, ssa_1707, -ssa_1789
														vec1 32 ssa_1791 = fmax ssa_1790, ssa_1
														vec1 32 ssa_1792 = flt ssa_1790, ssa_1
														r111 = bcsel ssa_1792, ssa_1, r111
														vec1 32 ssa_1794 = fsqrt ssa_1791
														vec1 32 ssa_1795 = fadd ssa_1707, -ssa_1794
														r118 = fmul ssa_1795, ssa_1788
														vec1 32 ssa_1797 = fadd ssa_1707, ssa_1794
														r119 = fmul ssa_1797, ssa_1788
														/* succs: block_294 */
													} else {
														block block_293:
														/* preds: block_291 */
														vec1 32 ssa_1799 = fmul ssa_37, ssa_1688
														vec1 32 ssa_1800 = frcp ssa_1707
														r119 = fmul ssa_1799, ssa_1800
														r118 = imov r119
														/* succs: block_294 */
													}
													block block_294:
													/* preds: block_292 block_293 */
													vec1 32 ssa_1805 = fmul ssa_1708, ssa_33
													vec1 32 ssa_1806 = ffma ssa_1706, r118, -ssa_1805
													vec1 32 ssa_1807 = ffma ssa_1806, r118, ssa_1690
													vec1 32 ssa_1808 = ffma ssa_1706, r119, -ssa_1805
													vec1 32 ssa_1809 = ffma ssa_1808, r119, ssa_1690
													vec1 32 ssa_1810 = iand r111, ssa_30
													vec1 32 ssa_1811 = ine ssa_1810, ssa_1
													/* succs: block_295 block_299 */
													if ssa_1811 {
														block block_295:
														/* preds: block_294 */
														vec1 32 ssa_1812 = flt ssa_1, ssa_1807
														/* succs: block_296 block_297 */
														if ssa_1812 {
															block block_296:
															/* preds: block_295 */
															r89 = fmin r89, abs(ssa_1807)
															/* succs: block_298 */
														} else {
															block block_297:
															/* preds: block_295 */
															r88 = fmin r88, abs(ssa_1807)
															/* succs: block_298 */
														}
														block block_298:
														/* preds: block_296 block_297 */
														/* succs: block_300 */
													} else {
														block block_299:
														/* preds: block_294 */
														/* succs: block_300 */
													}
													block block_300:
													/* preds: block_298 block_299 */
													vec1 32 ssa_1819 = ult ssa_30, r111
													/* succs: block_301 block_305 */
													if ssa_1819 {
														block block_301:
														/* preds: block_300 */
														vec1 32 ssa_1820 = flt ssa_1809, ssa_1
														/* succs: block_302 block_303 */
														if ssa_1820 {
															block block_302:
															/* preds: block_301 */
															r89 = fmin r89, abs(ssa_1809)
															/* succs: block_304 */
														} else {
															block block_303:
															/* preds: block_301 */
															r88 = fmin r88, abs(ssa_1809)
															/* succs: block_304 */
														}
														block block_304:
														/* preds: block_302 block_303 */
														/* succs: block_306 */
													} else {
														block block_305:
														/* preds: block_300 */
														/* succs: block_306 */
													}
													block block_306:
													/* preds: block_304 block_305 */
													/* succs: block_308 */
												} else {
													block block_307:
													/* preds: block_287 */
													/* succs: block_308 */
												}
												block block_308:
												/* preds: block_306 block_307 */
												r85 = iadd r85, r116
												/* succs: block_310 */
											} else {
												block block_309:
												/* preds: block_259 */
												/* succs: block_310 */
											}
											block block_310:
											/* preds: block_308 block_309 */
											r87 = iadd r87, ssa_31
											/* succs: block_208 */
										}
										block block_311:
										/* preds: block_209 */
										vec1 32 ssa_1834 = ieq r85, ssa_1
										vec1 32 ssa_1835 = ior ssa_1834, ssa_1368
										/* succs: block_312 block_313 */
										if ssa_1835 {
											block block_312:
											/* preds: block_311 */
											r89 = fmin r89, r88
											/* succs: block_317 */
										} else {
											block block_313:
											/* preds: block_311 */
											vec1 32 ssa_1837 = ine r85, ssa_25
											/* succs: block_314 block_315 */
											if ssa_1837 {
												block block_314:
												/* preds: block_313 */
												vec1 32 ssa_1838 = ieq r85, ssa_30
												r89 = bcsel ssa_1838, r88, ssa_37
												/* succs: block_316 */
											} else {
												block block_315:
												/* preds: block_313 */
												/* succs: block_316 */
											}
											block block_316:
											/* preds: block_314 block_315 */
											/* succs: block_317 */
										}
										block block_317:
										/* preds: block_312 block_316 */
										vec1 32 ssa_1842 = fmin r89, ssa_37
										vec1 32 ssa_1843 = iand r85, ssa_30
										vec1 32 ssa_1844 = ieq ssa_1843, ssa_1
										vec1 32 ssa_1845 = iand ssa_1368, ssa_1844
										vec1 32 ssa_1846 = bcsel ssa_1845, ssa_1, r85
										vec1 32 ssa_1847 = ine ssa_1846, ssa_1
										/* succs: block_318 block_319 */
										if ssa_1847 {
											block block_318:
											/* preds: block_317 */
											r12 = fadd ssa_37, ssa_1842
											/* succs: block_320 */
										} else {
											block block_319:
											/* preds: block_317 */
											r12 = fadd ssa_37, -ssa_1842
											/* succs: block_320 */
										}
										block block_320:
										/* preds: block_318 block_319 */
										vec1 32 ssa_1851 = iand ssa_1358.x, ssa_33
										vec1 32 ssa_1852 = ine ssa_1851, ssa_1
										/* succs: block_321 block_322 */
										if ssa_1852 {
											block block_321:
											/* preds: block_320 */
											r12 = fadd ssa_35, -r12
											/* succs: block_323 */
										} else {
											block block_322:
											/* preds: block_320 */
											/* succs: block_323 */
										}
										block block_323:
										/* preds: block_321 block_322 */
										r9 = imov r12
										r10 = imov r9
										r11 = imov r10
										/* succs: block_401 */
									} else {
										block block_324:
										/* preds: block_198 */
										vec1 32 ssa_1855 = ieq ssa_1043.y, ssa_53
										/* succs: block_325 block_399 */
										if ssa_1855 {
											block block_325:
											/* preds: block_324 */
											vec1 32 ssa_1856 = fddx ssa_5.x
											vec4 32 ssa_1857 = intrinsic load_uniform (ssa_1) (0, 16) /* base=0 */ /* range=16 */	/* fastuidraw_painterStore */
											vec1 32 ssa_1858 = fmul ssa_5.x, ssa_1857.x
											vec1 32 ssa_1859 = fddy ssa_1858
											vec1 32 ssa_1860 = fadd abs(ssa_1856), abs(ssa_1859)
											vec1 32 ssa_1861 = fddx ssa_5.y
											vec1 32 ssa_1862 = fmul ssa_5.y, ssa_1857.x
											vec1 32 ssa_1863 = fddy ssa_1862
											vec1 32 ssa_1864 = fadd abs(ssa_1861), abs(ssa_1863)
											vec4 32 ssa_1865 = intrinsic load_input (ssa_1) (31, 0) /* base=31 */ /* component=0 */	/* fastuidraw_uint_varying0 */
											vec1 32 ssa_1866 = iand ssa_1865.x, ssa_75
											vec1 32 ssa_1867 = iand ssa_1865.x, ssa_26
											vec1 32 ssa_1868 = ine ssa_1867, ssa_1
											vec1 32 ssa_1869 = frcp ssa_1860
											vec1 32 ssa_1870 = frcp ssa_1864
											vec1 32 ssa_1871 = u2f32 ssa_1865.z
											vec1 32 ssa_1872 = u2f32 ssa_1865.y
											vec1 32 ssa_1873 = iadd ssa_1865.z, ssa_25
											vec1 32 ssa_1874 = fadd ssa_5.x, ssa_56
											vec1 32 ssa_1875 = fmul ssa_1871, ssa_84
											vec1 32 ssa_1876 = fmul ssa_1875, ssa_1874
											vec1 32 ssa_1877 = f2u32 ssa_1876
											vec1 32 ssa_1878 = umin ssa_1873, ssa_1877
											vec1 32 ssa_1879 = iadd ssa_1865.y, ssa_25
											vec1 32 ssa_1880 = fadd ssa_5.y, ssa_56
											vec1 32 ssa_1881 = fmul ssa_1872, ssa_84
											vec1 32 ssa_1882 = fmul ssa_1881, ssa_1880
											vec1 32 ssa_1883 = f2u32 ssa_1882
											r120 = umin ssa_1879, ssa_1883
											vec1 32 ssa_1885 = flt ssa_5.x, ssa_1
											/* succs: block_326 block_327 */
											if ssa_1885 {
												block block_326:
												/* preds: block_325 */
												r120 = iadd r120, ssa_1865.y
												r121 = imov ssa_51
												/* succs: block_328 */
											} else {
												block block_327:
												/* preds: block_325 */
												r121 = imov ssa_35
												/* succs: block_328 */
											}
											block block_328:
											/* preds: block_326 block_327 */
											vec1 32 ssa_1889 = ishl ssa_1865.y, ssa_30
											r122 = iadd ssa_1878, ssa_1889
											vec1 32 ssa_1891 = flt ssa_5.y, ssa_1
											/* succs: block_329 block_330 */
											if ssa_1891 {
												block block_329:
												/* preds: block_328 */
												r122 = iadd r122, ssa_1865.z
												r123 = imov ssa_51
												/* succs: block_331 */
											} else {
												block block_330:
												/* preds: block_328 */
												r123 = imov ssa_35
												/* succs: block_331 */
											}
											block block_331:
											/* preds: block_329 block_330 */
											vec1 32 ssa_1895 = iadd ssa_1866, r120
											vec1 32 ssa_1896 = ishl ssa_1895, ssa_31
											vec1 32 ssa_1897 = intrinsic load_ssbo (ssa_30, ssa_1896) ()
											vec1 32 ssa_1898 = ishl ssa_1897, ssa_73
											vec1 32 ssa_1899 = extract_u8 ssa_1898, ssa_32
											vec1 32 ssa_1900 = iadd ssa_1866, r122
											vec1 32 ssa_1901 = ishl ssa_1900, ssa_31
											vec1 32 ssa_1902 = intrinsic load_ssbo (ssa_30, ssa_1901) ()
											vec1 32 ssa_1903 = ishl ssa_1902, ssa_73
											vec1 32 ssa_1904 = extract_u8 ssa_1903, ssa_32
											vec1 32 ssa_1905 = ushr ssa_1902, ssa_72
											vec1 32 ssa_1906 = ushr ssa_1897, ssa_72
											r124 = iadd ssa_1906, ssa_1866
											r127 = imov ssa_1
											r126 = imov r127
											r125 = imov ssa_37
											/* succs: block_332 */
											loop {
												block block_332:
												/* preds: block_331 block_359 */
												vec1 32 ssa_1912 = uge r127, ssa_1899
												/* succs: block_333 block_334 */
												if ssa_1912 {
													block block_333:
													/* preds: block_332 */
													break
													/* succs: block_360 */
												} else {
													block block_334:
													/* preds: block_332 */
													/* succs: block_335 */
												}
												block block_335:
												/* preds: block_334 */
												vec1 32 ssa_1913 = ishl r124, ssa_31
												vec1 32 ssa_1914 = intrinsic load_ssbo (ssa_30, ssa_1913) ()
												vec1 32 ssa_1915 = unpack_half_2x16_split_x ssa_1914
												vec1 32 ssa_1916 = unpack_half_2x16_split_y ssa_1914
												vec1 32 ssa_1917 = fadd ssa_1915, -ssa_5.x
												vec1 32 ssa_1918 = fadd ssa_1916, -ssa_5.y
												vec1 32 ssa_1919 = iadd r124, ssa_30
												vec1 32 ssa_1920 = ishl ssa_1919, ssa_31
												vec1 32 ssa_1921 = intrinsic load_ssbo (ssa_30, ssa_1920) ()
												vec1 32 ssa_1922 = unpack_half_2x16_split_x ssa_1921
												vec1 32 ssa_1923 = unpack_half_2x16_split_y ssa_1921
												vec1 32 ssa_1924 = fadd ssa_1922, -ssa_5.x
												vec1 32 ssa_1925 = fadd ssa_1923, -ssa_5.y
												vec1 32 ssa_1926 = iadd r124, ssa_31
												vec1 32 ssa_1927 = ishl ssa_1926, ssa_31
												vec1 32 ssa_1928 = intrinsic load_ssbo (ssa_30, ssa_1927) ()
												vec1 32 ssa_1929 = unpack_half_2x16_split_x ssa_1928
												vec1 32 ssa_1930 = unpack_half_2x16_split_y ssa_1928
												vec1 32 ssa_1931 = fadd ssa_1929, -ssa_5.x
												vec1 32 ssa_1932 = fadd ssa_1930, -ssa_5.y
												vec1 32 ssa_1933 = flt ssa_1, r121
												/* succs: block_336 block_337 */
												if ssa_1933 {
													block block_336:
													/* preds: block_335 */
													vec1 32 ssa_1934 = fmax ssa_1924, ssa_1931
													vec1 32 ssa_1935 = fmax ssa_1917, ssa_1934
													vec1 32 ssa_1936 = fmul ssa_1935, ssa_1869
													r128 = flt ssa_1936, ssa_64
													/* succs: block_338 */
												} else {
													block block_337:
													/* preds: block_335 */
													r128 = imov ssa_1
													/* succs: block_338 */
												}
												block block_338:
												/* preds: block_336 block_337 */
												/* succs: block_339 block_340 */
												if r128 {
													block block_339:
													/* preds: block_338 */
													break
													/* succs: block_360 */
												} else {
													block block_340:
													/* preds: block_338 */
													/* succs: block_341 */
												}
												block block_341:
												/* preds: block_340 */
												vec1 32 ssa_1939 = flt r121, ssa_1
												/* succs: block_342 block_343 */
												if ssa_1939 {
													block block_342:
													/* preds: block_341 */
													vec1 32 ssa_1940 = fmin ssa_1924, ssa_1931
													vec1 32 ssa_1941 = fmin ssa_1917, ssa_1940
													vec1 32 ssa_1942 = fmul ssa_1941, ssa_1869
													r129 = flt ssa_37, ssa_1942
													/* succs: block_344 */
												} else {
													block block_343:
													/* preds: block_341 */
													r129 = imov ssa_1
													/* succs: block_344 */
												}
												block block_344:
												/* preds: block_342 block_343 */
												/* succs: block_345 block_346 */
												if r129 {
													block block_345:
													/* preds: block_344 */
													break
													/* succs: block_360 */
												} else {
													block block_346:
													/* preds: block_344 */
													/* succs: block_347 */
												}
												block block_347:
												/* preds: block_346 */
												vec1 32 ssa_1945 = flt ssa_1, ssa_1918
												vec1 32 ssa_1946 = bcsel ssa_1945, ssa_31, ssa_1
												vec1 32 ssa_1947 = flt ssa_1, ssa_1925
												vec1 32 ssa_1948 = bcsel ssa_1947, ssa_71, ssa_1
												vec1 32 ssa_1949 = flt ssa_1, ssa_1932
												vec1 32 ssa_1950 = bcsel ssa_1949, ssa_72, ssa_1
												vec1 32 ssa_1951 = ior ssa_1946, ssa_1948
												vec1 32 ssa_1952 = ior ssa_1951, ssa_1950
												vec1 32 ssa_1953 = ushr ssa_82, ssa_1952
												vec1 32 ssa_1954 = iand ssa_1953, ssa_32
												vec1 32 ssa_1955 = ine ssa_1954, ssa_1
												/* succs: block_348 block_358 */
												if ssa_1955 {
													block block_348:
													/* preds: block_347 */
													vec1 32 ssa_1956 = ffma -ssa_33, ssa_1924, ssa_1917
													vec1 32 ssa_1957 = ffma -ssa_33, ssa_1925, ssa_1918
													vec1 32 ssa_1958 = fadd ssa_1956, ssa_1931
													vec1 32 ssa_1959 = fadd ssa_1957, ssa_1932
													vec1 32 ssa_1960 = fadd ssa_1917, -ssa_1924
													vec1 32 ssa_1961 = fadd ssa_1918, -ssa_1925
													vec1 32 ssa_1962 = frcp ssa_1959
													vec1 32 ssa_1963 = fmul ssa_1959, ssa_1918
													vec1 32 ssa_1964 = ffma ssa_1961, ssa_1961, -ssa_1963
													vec1 32 ssa_1965 = fmax ssa_1964, ssa_1
													vec1 32 ssa_1966 = fsqrt ssa_1965
													vec1 32 ssa_1967 = fadd ssa_1961, -ssa_1966
													r130 = fmul ssa_1967, ssa_1962
													vec1 32 ssa_1969 = fadd ssa_1961, ssa_1966
													r131 = fmul ssa_1969, ssa_1962
													vec1 32 ssa_1971 = flt abs(ssa_1959), ssa_83
													/* succs: block_349 block_350 */
													if ssa_1971 {
														block block_349:
														/* preds: block_348 */
														vec1 32 ssa_1972 = fmul ssa_37, ssa_1918
														vec1 32 ssa_1973 = frcp ssa_1961
														r131 = fmul ssa_1972, ssa_1973
														r130 = imov r131
														/* succs: block_351 */
													} else {
														block block_350:
														/* preds: block_348 */
														/* succs: block_351 */
													}
													block block_351:
													/* preds: block_349 block_350 */
													vec1 32 ssa_1977 = fmul ssa_1960, ssa_33
													vec1 32 ssa_1978 = ffma ssa_1958, r130, -ssa_1977
													vec1 32 ssa_1979 = ffma ssa_1978, r130, ssa_1917
													vec1 32 ssa_1980 = ffma ssa_1958, r131, -ssa_1977
													vec1 32 ssa_1981 = ffma ssa_1980, r131, ssa_1917
													vec1 32 ssa_1982 = fmul ssa_1869, ssa_1979
													vec1 32 ssa_1983 = fmul ssa_1869, ssa_1981
													vec1 32 ssa_1984 = iand ssa_1954, ssa_30
													vec1 32 ssa_1985 = ine ssa_1984, ssa_1
													/* succs: block_352 block_353 */
													if ssa_1985 {
														block block_352:
														/* preds: block_351 */
														vec1 32 ssa_1986 = ffma.sat ssa_1982, r121, ssa_37
														r126 = fadd r126, ssa_1986
														r125 = fmin r125, abs(ssa_1982)
														/* succs: block_354 */
													} else {
														block block_353:
														/* preds: block_351 */
														/* succs: block_354 */
													}
													block block_354:
													/* preds: block_352 block_353 */
													vec1 32 ssa_1991 = ult ssa_30, ssa_1954
													/* succs: block_355 block_356 */
													if ssa_1991 {
														block block_355:
														/* preds: block_354 */
														vec1 32 ssa_1992 = ffma.sat ssa_1983, r121, ssa_37
														r126 = fadd r126, -ssa_1992
														r125 = fmin r125, abs(ssa_1983)
														/* succs: block_357 */
													} else {
														block block_356:
														/* preds: block_354 */
														/* succs: block_357 */
													}
													block block_357:
													/* preds: block_355 block_356 */
													/* succs: block_359 */
												} else {
													block block_358:
													/* preds: block_347 */
													/* succs: block_359 */
												}
												block block_359:
												/* preds: block_357 block_358 */
												r124 = iadd r124, ssa_32
												r127 = iadd r127, ssa_30
												/* succs: block_332 */
											}
											block block_360:
											/* preds: block_333 block_339 block_345 */
											r132 = fmov abs(r126)
											r133 = iadd ssa_1905, ssa_1866
											r136 = imov ssa_1
											r135 = imov r136
											r134 = imov ssa_37
											/* succs: block_361 */
											loop {
												block block_361:
												/* preds: block_360 block_388 */
												vec1 32 ssa_2007 = uge r136, ssa_1904
												/* succs: block_362 block_363 */
												if ssa_2007 {
													block block_362:
													/* preds: block_361 */
													break
													/* succs: block_389 */
												} else {
													block block_363:
													/* preds: block_361 */
													/* succs: block_364 */
												}
												block block_364:
												/* preds: block_363 */
												vec1 32 ssa_2008 = ishl r133, ssa_31
												vec1 32 ssa_2009 = intrinsic load_ssbo (ssa_30, ssa_2008) ()
												vec1 32 ssa_2010 = unpack_half_2x16_split_x ssa_2009
												vec1 32 ssa_2011 = unpack_half_2x16_split_y ssa_2009
												vec1 32 ssa_2012 = fadd ssa_2010, -ssa_5.y
												vec1 32 ssa_2013 = fadd ssa_2011, -ssa_5.x
												vec1 32 ssa_2014 = iadd r133, ssa_30
												vec1 32 ssa_2015 = ishl ssa_2014, ssa_31
												vec1 32 ssa_2016 = intrinsic load_ssbo (ssa_30, ssa_2015) ()
												vec1 32 ssa_2017 = unpack_half_2x16_split_x ssa_2016
												vec1 32 ssa_2018 = unpack_half_2x16_split_y ssa_2016
												vec1 32 ssa_2019 = fadd ssa_2017, -ssa_5.y
												vec1 32 ssa_2020 = fadd ssa_2018, -ssa_5.x
												vec1 32 ssa_2021 = iadd r133, ssa_31
												vec1 32 ssa_2022 = ishl ssa_2021, ssa_31
												vec1 32 ssa_2023 = intrinsic load_ssbo (ssa_30, ssa_2022) ()
												vec1 32 ssa_2024 = unpack_half_2x16_split_x ssa_2023
												vec1 32 ssa_2025 = unpack_half_2x16_split_y ssa_2023
												vec1 32 ssa_2026 = fadd ssa_2024, -ssa_5.y
												vec1 32 ssa_2027 = fadd ssa_2025, -ssa_5.x
												vec1 32 ssa_2028 = flt ssa_1, r123
												/* succs: block_365 block_366 */
												if ssa_2028 {
													block block_365:
													/* preds: block_364 */
													vec1 32 ssa_2029 = fmax ssa_2019, ssa_2026
													vec1 32 ssa_2030 = fmax ssa_2012, ssa_2029
													vec1 32 ssa_2031 = fmul ssa_2030, ssa_1870
													r137 = flt ssa_2031, ssa_64
													/* succs: block_367 */
												} else {
													block block_366:
													/* preds: block_364 */
													r137 = imov ssa_1
													/* succs: block_367 */
												}
												block block_367:
												/* preds: block_365 block_366 */
												/* succs: block_368 block_369 */
												if r137 {
													block block_368:
													/* preds: block_367 */
													break
													/* succs: block_389 */
												} else {
													block block_369:
													/* preds: block_367 */
													/* succs: block_370 */
												}
												block block_370:
												/* preds: block_369 */
												vec1 32 ssa_2034 = flt r123, ssa_1
												/* succs: block_371 block_372 */
												if ssa_2034 {
													block block_371:
													/* preds: block_370 */
													vec1 32 ssa_2035 = fmin ssa_2019, ssa_2026
													vec1 32 ssa_2036 = fmin ssa_2012, ssa_2035
													vec1 32 ssa_2037 = fmul ssa_2036, ssa_1870
													r138 = flt ssa_37, ssa_2037
													/* succs: block_373 */
												} else {
													block block_372:
													/* preds: block_370 */
													r138 = imov ssa_1
													/* succs: block_373 */
												}
												block block_373:
												/* preds: block_371 block_372 */
												/* succs: block_374 block_375 */
												if r138 {
													block block_374:
													/* preds: block_373 */
													break
													/* succs: block_389 */
												} else {
													block block_375:
													/* preds: block_373 */
													/* succs: block_376 */
												}
												block block_376:
												/* preds: block_375 */
												vec1 32 ssa_2040 = flt ssa_1, ssa_2013
												vec1 32 ssa_2041 = bcsel ssa_2040, ssa_31, ssa_1
												vec1 32 ssa_2042 = flt ssa_1, ssa_2020
												vec1 32 ssa_2043 = bcsel ssa_2042, ssa_71, ssa_1
												vec1 32 ssa_2044 = flt ssa_1, ssa_2027
												vec1 32 ssa_2045 = bcsel ssa_2044, ssa_72, ssa_1
												vec1 32 ssa_2046 = ior ssa_2041, ssa_2043
												vec1 32 ssa_2047 = ior ssa_2046, ssa_2045
												vec1 32 ssa_2048 = ushr ssa_82, ssa_2047
												vec1 32 ssa_2049 = iand ssa_2048, ssa_32
												vec1 32 ssa_2050 = ine ssa_2049, ssa_1
												/* succs: block_377 block_387 */
												if ssa_2050 {
													block block_377:
													/* preds: block_376 */
													vec1 32 ssa_2051 = ffma -ssa_33, ssa_2019, ssa_2012
													vec1 32 ssa_2052 = ffma -ssa_33, ssa_2020, ssa_2013
													vec1 32 ssa_2053 = fadd ssa_2051, ssa_2026
													vec1 32 ssa_2054 = fadd ssa_2052, ssa_2027
													vec1 32 ssa_2055 = fadd ssa_2012, -ssa_2019
													vec1 32 ssa_2056 = fadd ssa_2013, -ssa_2020
													vec1 32 ssa_2057 = frcp ssa_2054
													vec1 32 ssa_2058 = fmul ssa_2054, ssa_2013
													vec1 32 ssa_2059 = ffma ssa_2056, ssa_2056, -ssa_2058
													vec1 32 ssa_2060 = fmax ssa_2059, ssa_1
													vec1 32 ssa_2061 = fsqrt ssa_2060
													vec1 32 ssa_2062 = fadd ssa_2056, -ssa_2061
													r139 = fmul ssa_2062, ssa_2057
													vec1 32 ssa_2064 = fadd ssa_2056, ssa_2061
													r140 = fmul ssa_2064, ssa_2057
													vec1 32 ssa_2066 = flt abs(ssa_2054), ssa_83
													/* succs: block_378 block_379 */
													if ssa_2066 {
														block block_378:
														/* preds: block_377 */
														vec1 32 ssa_2067 = fmul ssa_37, ssa_2013
														vec1 32 ssa_2068 = frcp ssa_2056
														r140 = fmul ssa_2067, ssa_2068
														r139 = imov r140
														/* succs: block_380 */
													} else {
														block block_379:
														/* preds: block_377 */
														/* succs: block_380 */
													}
													block block_380:
													/* preds: block_378 block_379 */
													vec1 32 ssa_2072 = fmul ssa_2055, ssa_33
													vec1 32 ssa_2073 = ffma ssa_2053, r139, -ssa_2072
													vec1 32 ssa_2074 = ffma ssa_2073, r139, ssa_2012
													vec1 32 ssa_2075 = ffma ssa_2053, r140, -ssa_2072
													vec1 32 ssa_2076 = ffma ssa_2075, r140, ssa_2012
													vec1 32 ssa_2077 = fmul ssa_1870, ssa_2074
													vec1 32 ssa_2078 = fmul ssa_1870, ssa_2076
													vec1 32 ssa_2079 = iand ssa_2049, ssa_30
													vec1 32 ssa_2080 = ine ssa_2079, ssa_1
													/* succs: block_381 block_382 */
													if ssa_2080 {
														block block_381:
														/* preds: block_380 */
														vec1 32 ssa_2081 = ffma.sat ssa_2077, r123, ssa_37
														r135 = fadd r135, ssa_2081
														r134 = fmin r134, abs(ssa_2077)
														/* succs: block_383 */
													} else {
														block block_382:
														/* preds: block_380 */
														/* succs: block_383 */
													}
													block block_383:
													/* preds: block_381 block_382 */
													vec1 32 ssa_2086 = ult ssa_30, ssa_2049
													/* succs: block_384 block_385 */
													if ssa_2086 {
														block block_384:
														/* preds: block_383 */
														vec1 32 ssa_2087 = ffma.sat ssa_2078, r123, ssa_37
														r135 = fadd r135, -ssa_2087
														r134 = fmin r134, abs(ssa_2078)
														/* succs: block_386 */
													} else {
														block block_385:
														/* preds: block_383 */
														/* succs: block_386 */
													}
													block block_386:
													/* preds: block_384 block_385 */
													/* succs: block_388 */
												} else {
													block block_387:
													/* preds: block_376 */
													/* succs: block_388 */
												}
												block block_388:
												/* preds: block_386 block_387 */
												r133 = iadd r133, ssa_32
												r136 = iadd r136, ssa_30
												/* succs: block_361 */
											}
											block block_389:
											/* preds: block_362 block_368 block_374 */
											r141 = fmov abs(r135)
											/* succs: block_390 block_391 */
											if ssa_1868 {
												block block_390:
												/* preds: block_389 */
												vec1 32 ssa_2097 = fmul ssa_37, abs(r126)
												vec1 32 ssa_2098 = fmul ssa_37, abs(r135)
												vec1 32 ssa_2099 = ffract ssa_2097
												vec1 32 ssa_2100 = ffract ssa_2098
												r132 = fmul ssa_33, ssa_2099
												r141 = fmul ssa_33, ssa_2100
												/* succs: block_392 */
											} else {
												block block_391:
												/* preds: block_389 */
												/* succs: block_392 */
											}
											block block_392:
											/* preds: block_390 block_391 */
											vec1 32 ssa_2105 = fmin.sat abs(r125), ssa_37
											vec1 32 ssa_2106 = fmin.sat abs(r134), ssa_37
											vec1 32 ssa_2107 = ffma -ssa_33, ssa_2105, ssa_35
											vec1 32 ssa_2108 = ffma -ssa_33, ssa_2106, ssa_35
											vec1 32 ssa_2109 = fadd ssa_2107, ssa_2108
											vec1 32 ssa_2110 = flt ssa_85, ssa_2109
											/* succs: block_393 block_394 */
											if ssa_2110 {
												block block_393:
												/* preds: block_392 */
												vec1 32 ssa_2111 = fmul r141, ssa_2108
												vec1 32 ssa_2112 = ffma r132, ssa_2107, ssa_2111
												vec1 32 ssa_2113 = frcp ssa_2109
												r12 = fmul ssa_2112, ssa_2113
												/* succs: block_395 */
											} else {
												block block_394:
												/* preds: block_392 */
												vec1 32 ssa_2115 = fadd r132, r141
												r12 = fmul ssa_37, ssa_2115
												/* succs: block_395 */
											}
											block block_395:
											/* preds: block_393 block_394 */
											vec1 32 ssa_2118 = iand ssa_1865.x, ssa_33
											vec1 32 ssa_2119 = ine ssa_2118, ssa_1
											/* succs: block_396 block_397 */
											if ssa_2119 {
												block block_396:
												/* preds: block_395 */
												r12 = fadd ssa_35, -r12
												/* succs: block_398 */
											} else {
												block block_397:
												/* preds: block_395 */
												/* succs: block_398 */
											}
											block block_398:
											/* preds: block_396 block_397 */
											r9 = imov r12
											r10 = imov r9
											r11 = imov r10
											/* succs: block_400 */
										} else {
											block block_399:
											/* preds: block_324 */
											/* succs: block_400 */
										}
										block block_400:
										/* preds: block_398 block_399 */
										/* succs: block_401 */
									}
									block block_401:
									/* preds: block_323 block_400 */
									/* succs: block_402 */
								}
								block block_402:
								/* preds: block_197 block_401 */
								/* succs: block_403 */
							}
							block block_403:
							/* preds: block_171 block_402 */
							/* succs: block_404 */
						}
						block block_404:
						/* preds: block_145 block_403 */
						/* succs: block_406 */
					} else {
						block block_405:
						/* preds: block_143 */
						r9 = imov ssa_35
						r10 = imov r9
						r11 = imov r10
						r12 = imov r11
						/* succs: block_406 */
					}
					block block_406:
					/* preds: block_404 block_405 */
					/* succs: block_408 */
				} else {
					block block_407:
					/* preds: block_142 */
					r9 = imov ssa_35
					r10 = imov r9
					r11 = imov r10
					r12 = imov r11
					/* succs: block_408 */
				}
				block block_408:
				/* preds: block_406 block_407 */
				/* succs: block_409 */
			}
			block block_409:
			/* preds: block_141 block_408 */
			/* succs: block_410 */
		}
		block block_410:
		/* preds: block_139 block_409 */
		r4 = fmul r16, r12
		r3 = fmul r15, r11
		r2 = fmul r14, r10
		r1 = fmul r13, r9
		/* succs: block_412 */
	} else {
		block block_411:
		/* preds: block_0 */
		r1 = imov ssa_1
		r2 = imov r1
		r3 = imov r2
		r4 = imov r3
		/* succs: block_412 */
	}
	block block_412:
	/* preds: block_410 block_411 */
	vec4 32 ssa_2166 = intrinsic load_input (ssa_1) (32, 0) /* base=32 */ /* component=0 */	/* fastuidraw_uint_varying1 */
	vec1 32 ssa_2167 = ine ssa_2166.w, ssa_30
	/* succs: block_413 block_456 */
	if ssa_2167 {
		block block_413:
		/* preds: block_412 */
		vec1 32 ssa_2168 = ine ssa_2166.w, ssa_31
		/* succs: block_414 block_454 */
		if ssa_2168 {
			block block_414:
			/* preds: block_413 */
			vec1 32 ssa_2169 = ine ssa_2166.w, ssa_32
			/* succs: block_415 block_452 */
			if ssa_2169 {
				block block_415:
				/* preds: block_414 */
				vec1 32 ssa_2170 = ieq ssa_2166.w, ssa_71
				/* succs: block_416 block_417 */
				if ssa_2170 {
					block block_416:
					/* preds: block_415 */
					r8 = fadd ssa_35, -r1
					r5 = imov r8
					r6 = imov r5
					r7 = imov r6
					/* succs: block_451 */
				} else {
					block block_417:
					/* preds: block_415 */
					vec1 32 ssa_2172 = ine ssa_2166.w, ssa_86
					/* succs: block_418 block_449 */
					if ssa_2172 {
						block block_418:
						/* preds: block_417 */
						vec1 32 ssa_2173 = ine ssa_2166.w, ssa_68
						/* succs: block_419 block_447 */
						if ssa_2173 {
							block block_419:
							/* preds: block_418 */
							vec1 32 ssa_2174 = ine ssa_2166.w, ssa_87
							/* succs: block_420 block_445 */
							if ssa_2174 {
								block block_420:
								/* preds: block_419 */
								vec1 32 ssa_2175 = ine ssa_2166.w, ssa_72
								/* succs: block_421 block_443 */
								if ssa_2175 {
									block block_421:
									/* preds: block_420 */
									vec1 32 ssa_2176 = ieq ssa_2166.w, ssa_88
									/* succs: block_422 block_423 */
									if ssa_2176 {
										block block_422:
										/* preds: block_421 */
										r8 = fadd ssa_35, -r1
										r1 = imov ssa_1
										r2 = imov r1
										r3 = imov r2
										r4 = imov r3
										r5 = imov r8
										r6 = imov r5
										r7 = imov r6
										/* succs: block_442 */
									} else {
										block block_423:
										/* preds: block_421 */
										vec1 32 ssa_2178 = ieq ssa_2166.w, ssa_52
										/* succs: block_424 block_425 */
										if ssa_2178 {
											block block_424:
											/* preds: block_423 */
											r8 = fadd ssa_35, -r1
											r5 = imov r8
											r6 = imov r5
											r7 = imov r6
											/* succs: block_441 */
										} else {
											block block_425:
											/* preds: block_423 */
											vec1 32 ssa_2180 = ine ssa_2166.w, ssa_89
											/* succs: block_426 block_439 */
											if ssa_2180 {
												block block_426:
												/* preds: block_425 */
												vec1 32 ssa_2181 = ieq ssa_2166.w, ssa_90
												/* succs: block_427 block_428 */
												if ssa_2181 {
													block block_427:
													/* preds: block_426 */
													r8 = fadd ssa_35, -r1
													r5 = imov r8
													r6 = imov r5
													r7 = imov r6
													/* succs: block_438 */
												} else {
													block block_428:
													/* preds: block_426 */
													vec1 32 ssa_2183 = ine ssa_2166.w, ssa_91
													/* succs: block_429 block_436 */
													if ssa_2183 {
														block block_429:
														/* preds: block_428 */
														vec1 32 ssa_2184 = ine ssa_2166.w, ssa_29
														/* succs: block_430 block_434 */
														if ssa_2184 {
															block block_430:
															/* preds: block_429 */
															vec1 32 ssa_2185 = ieq ssa_2166.w, ssa_78
															/* succs: block_431 block_432 */
															if ssa_2185 {
																block block_431:
																/* preds: block_430 */
																r8 = fadd ssa_35, -r4
																r7 = fadd ssa_35, -r3
																r6 = fadd ssa_35, -r2
																r5 = fadd ssa_35, -r1
																/* succs: block_433 */
															} else {
																block block_432:
																/* preds: block_430 */
																/* succs: block_433 */
															}
															block block_433:
															/* preds: block_431 block_432 */
															/* succs: block_435 */
														} else {
															block block_434:
															/* preds: block_429 */
															r5 = imov r1
															r1 = imov ssa_1
															r6 = imov r2
															r2 = imov r1
															r7 = imov r3
															r3 = imov r2
															r8 = imov r4
															r4 = imov r3
															/* succs: block_435 */
														}
														block block_435:
														/* preds: block_433 block_434 */
														/* succs: block_437 */
													} else {
														block block_436:
														/* preds: block_428 */
														r5 = imov ssa_35
														r6 = imov r5
														r7 = imov r6
														r8 = imov r7
														/* succs: block_437 */
													}
													block block_437:
													/* preds: block_435 block_436 */
													/* succs: block_438 */
												}
												block block_438:
												/* preds: block_427 block_437 */
												/* succs: block_440 */
											} else {
												block block_439:
												/* preds: block_425 */
												r5 = imov r1
												r6 = imov r5
												r7 = imov r6
												r8 = imov r7
												/* succs: block_440 */
											}
											block block_440:
											/* preds: block_438 block_439 */
											/* succs: block_441 */
										}
										block block_441:
										/* preds: block_424 block_440 */
										/* succs: block_442 */
									}
									block block_442:
									/* preds: block_422 block_441 */
									/* succs: block_444 */
								} else {
									block block_443:
									/* preds: block_420 */
									r5 = imov ssa_1
									r6 = imov r5
									r7 = imov r6
									r8 = imov r7
									/* succs: block_444 */
								}
								block block_444:
								/* preds: block_442 block_443 */
								/* succs: block_446 */
							} else {
								block block_445:
								/* preds: block_419 */
								r2 = imov ssa_1
								r3 = imov r2
								r4 = imov r3
								r5 = imov r1
								r1 = imov r4
								r6 = imov r5
								r7 = imov r6
								r8 = imov r7
								/* succs: block_446 */
							}
							block block_446:
							/* preds: block_444 block_445 */
							/* succs: block_448 */
						} else {
							block block_447:
							/* preds: block_418 */
							r5 = imov ssa_1
							r6 = imov r5
							r7 = imov r6
							r8 = imov r7
							/* succs: block_448 */
						}
						block block_448:
						/* preds: block_446 block_447 */
						/* succs: block_450 */
					} else {
						block block_449:
						/* preds: block_417 */
						r5 = imov ssa_35
						r6 = imov r5
						r7 = imov r6
						r8 = imov r7
						/* succs: block_450 */
					}
					block block_450:
					/* preds: block_448 block_449 */
					/* succs: block_451 */
				}
				block block_451:
				/* preds: block_416 block_450 */
				/* succs: block_453 */
			} else {
				block block_452:
				/* preds: block_414 */
				r1 = imov ssa_1
				r2 = imov r1
				r3 = imov r2
				r4 = imov r3
				r5 = imov ssa_35
				r6 = imov r5
				r7 = imov r6
				r8 = imov r7
				/* succs: block_453 */
			}
			block block_453:
			/* preds: block_451 block_452 */
			/* succs: block_455 */
		} else {
			block block_454:
			/* preds: block_413 */
			r5 = imov ssa_1
			r6 = imov r5
			r7 = imov r6
			r8 = imov r7
			/* succs: block_455 */
		}
		block block_455:
		/* preds: block_453 block_454 */
		/* succs: block_457 */
	} else {
		block block_456:
		/* preds: block_412 */
		r1 = imov ssa_1
		r2 = imov r1
		r3 = imov r2
		r4 = imov r3
		r5 = imov r4
		r6 = imov r5
		r7 = imov r6
		r8 = imov r7
		/* succs: block_457 */
	}
	block block_457:
	/* preds: block_455 block_456 */
	vec4 32 ssa_2310 = vec4 r4, r3, r2, r1
	vec4 32 ssa_2311 = vec4 r8, r7, r6, r5
	intrinsic store_output (ssa_2310, ssa_1) (8, 15, 0) /* base=8 */ /* wrmask=xyzw */ /* component=0 */	/* fastuidraw_final_color0 */
	intrinsic store_output (ssa_2311, ssa_1) (9, 15, 0) /* base=9 */ /* wrmask=xyzw */ /* component=0 */	/* fastuidraw_final_color1 */
	/* succs: block_0 */
	block block_0:
}

FS compile failed: Failure to register allocate.  Reduce number of live scalar values to avoid this.
Native code for unnamed fragment shader GLSL1
SIMD8 shader: 2413 instructions. 11 loops. 131452 cycles. 0:0 spills:fills. Promoted 15 constants. Compacted 38608 to 27856 bytes (28%)
   START B0 (62 cycles)
add(16)         g4<1>UW         g1.4<1,4,0>UW   0x11001010V     { align1 WE_all 1H };
mov(8)          g74<1>UD        0x00000000UD                    { align1 1Q compacted };
pln(8)          g51<1>F         g16.4<0,1,0>F   g2<8,8,1>F      { align1 1Q compacted };
pln(8)          g105<1>F        g13<0,1,0>F     g2<8,8,1>F      { align1 1Q compacted };
pln(8)          g89<1>F         g13.4<0,1,0>F   g2<8,8,1>F      { align1 1Q compacted };
pln(8)          g70<1>F         g14<0,1,0>F     g2<8,8,1>F      { align1 1Q compacted };
pln(8)          g87<1>F         g14.4<0,1,0>F   g2<8,8,1>F      { align1 1Q compacted };
mov(8)          g84<1>UD        0x00000001UD                    { align1 1Q compacted };
mov(8)          g102<1>UD       0x00000002UD                    { align1 1Q compacted };
mov(8)          g52<1>D         1065353216D                     { align1 1Q };
mov(8)          g80<1>D         11892D                          { align1 1Q };
mov(8)          g86<1>F         g12.7<0,1,0>F                   { align1 1Q };
shl(8)          g101<1>D        g12.7<0,1,0>D   0x00000010UD    { align1 1Q };
cmp.nz.f0(8)    null<1>D        g11.3<0,1,0>D   -1D             { align1 1Q compacted };
pln(8)          g16<1>F         g17<0,1,0>F     g2<8,8,1>F      { align1 1Q compacted };
mov(8)          g106<1>F        g4<8,4,1>UW                     { align1 1Q };
mov(8)          g85<1>F         g4.4<8,4,1>UW                   { align1 1Q };
mov(8)          g63<1>UD        g86.1<16,8,2>UW                 { align1 1Q };
mov(8)          g5<1>UD         g101.1<16,8,2>UW                { align1 1Q };
add(8)          g116<1>D        g63<8,8,1>D     -32768D         { align1 1Q };
add(8)          g101<1>D        g5<8,8,1>D      -32768D         { align1 1Q };
(+f0) if(8)     JIP: 25784      UIP: 25816                      { align1 1Q };
   END B0 ->B1 ->B363
   START B1 <-B0 (22 cycles)
and.nz.f0(8)    null<1>UD       g11.7<0,1,0>UD  0x80000000UD    { align1 1Q };
mov(1)          g5<1>F          0.5F                            { align1 WE_all 1N };
mov(1)          g5.1<1>F        2F                              { align1 WE_all 1N };
(+f0) if(8)     JIP: 11880      UIP: 11880                      { align1 1Q };
   END B1 ->B2 ->B126
   START B2 <-B1 (26 cycles)
add(8)          g68<1>F         g51.1<4,4,0>F   -g51<4,4,0>F    { align1 1Q compacted };
add(8)          g69<1>F         g16.1<4,4,0>F   -g16<4,4,0>F    { align1 1Q compacted };
mul(8)          g49<1>F         g51<8,8,1>F     g6<0,1,0>F      { align1 1Q compacted };
mul(8)          g72<1>F         g16<8,8,1>F     g6<0,1,0>F      { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g11.7<0,1,0>UD  0x00002000UD    { align1 1Q };
add(8)          g71<1>F         -g49<4,4,0>F    g49.2<4,4,0>F   { align1 1Q compacted };
add(8)          g73<1>F         -g72<4,4,0>F    g72.2<4,4,0>F   { align1 1Q compacted };
(+f0) if(8)     JIP: 728        UIP: 736                        { align1 1Q };
   END B2 ->B3 ->B22
   START B3 <-B2 (50 cycles)
shl(8)          g62<1>D         g11.7<0,1,0>D   0x00000010UD    { align1 1Q };
shl(8)          g76<1>D         g11.7<0,1,0>D   0x0000000eUD    { align1 1Q };
add(8)          g65<1>F         g51<8,8,1>F     -g19.3<0,1,0>F  { align1 1Q compacted };
add(8)          g79<1>F         g16<8,8,1>F     -g19.7<0,1,0>F  { align1 1Q compacted };
shr(8)          g75<1>UD        g62<8,8,1>UD    0x0000001eUD    { align1 1Q compacted };
shr(8)          g77<1>UD        g76<8,8,1>UD    0x0000001eUD    { align1 1Q compacted };
cmp.z.f0(8)     null<1>D        g75<8,8,1>D     1D              { align1 1Q compacted };
(+f0) if(8)     JIP: 48         UIP: 280                        { align1 1Q };
   END B3 ->B4 ->B5
   START B4 <-B3 (20 cycles)
sel.ge(8)       g57<1>F         (abs)g65<8,8,1>F 0F             { align1 1Q compacted };
sel.l(8)        g31<1>F         g57<8,8,1>F     g20.3<0,1,0>F   { align1 1Q compacted };
else(8)         JIP: 248        UIP: 248                        { align1 1Q };
   END B4 ->B12
   START B5 <-B3 (18 cycles)
cmp.z.f0(8)     null<1>D        g75<8,8,1>D     2D              { align1 1Q compacted };
(+f0) if(8)     JIP: 64         UIP: 208                        { align1 1Q };
   END B5 ->B6 ->B7
   START B6 <-B5 (54 cycles)
math inv(8)     g81<1>F         g20.3<0,1,0>F   null<8,8,1>F    { align1 1Q compacted };
mul(8)          g82<1>F         g65<8,8,1>F     g81<8,8,1>F     { align1 1Q compacted };
rndd(8)         g83<1>F         g82<8,8,1>F                     { align1 1Q compacted };
mad(8)          g31<1>F         g65<4,4,1>F     g83<4,4,1>F     -g20.3<0,1,0>F { align16 1Q compacted };
else(8)         JIP: 160        UIP: 160                        { align1 1Q };
   END B6 ->B11
   START B7 <-B5 (18 cycles)
cmp.z.f0(8)     null<1>D        g75<8,8,1>D     3D              { align1 1Q compacted };
(+f0) if(8)     JIP: 104        UIP: 120                        { align1 1Q };
   END B7 ->B8 ->B9
   START B8 <-B7 (106 cycles)
mul(8)          g55<1>F         g20.3<0,1,0>F   2F              { align1 1Q };
math inv(8)     g59<1>F         g55<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mul(8)          g53<1>F         g65<8,8,1>F     g59<8,8,1>F     { align1 1Q compacted };
rndd(8)         g54<1>F         g53<8,8,1>F                     { align1 1Q compacted };
mad(8)          g88<1>F         g65<4,4,1>F     g54<4,4,1>F     -g55<4,4,1>F { align16 1Q compacted };
add(8)          g64<1>F         g88<8,8,1>F     -g20.3<0,1,0>F  { align1 1Q compacted };
add(8)          g31<1>F         g20.3<0,1,0>F   -(abs)g64<8,8,1>F { align1 1Q };
else(8)         JIP: 32         UIP: 32                         { align1 1Q };
   END B8 ->B10
   START B9 <-B7 (18 cycles)
sel.ge(8)       g67<1>F         g65<8,8,1>F     0F              { align1 1Q compacted };
sel.l(8)        g31<1>F         g67<8,8,1>F     g20.3<0,1,0>F   { align1 1Q compacted };
   END B9 ->B10
   START B10 <-B9 <-B8 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B10 ->B11
   START B11 <-B10 <-B6 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B11 ->B12
   START B12 <-B11 <-B4 (20 cycles)
endif(8)        JIP: 344                                        { align1 1Q };
cmp.z.f0(8)     null<1>D        g77<8,8,1>D     1D              { align1 1Q compacted };
(+f0) if(8)     JIP: 48         UIP: 288                        { align1 1Q };
   END B12 ->B13 ->B14
   START B13 <-B12 (20 cycles)
sel.ge(8)       g91<1>F         (abs)g79<8,8,1>F 0F             { align1 1Q compacted };
sel.l(8)        g32<1>F         g91<8,8,1>F     g20.7<0,1,0>F   { align1 1Q compacted };
else(8)         JIP: 256        UIP: 256                        { align1 1Q };
   END B13 ->B21
   START B14 <-B12 (18 cycles)
cmp.z.f0(8)     null<1>D        g77<8,8,1>D     2D              { align1 1Q compacted };
(+f0) if(8)     JIP: 72         UIP: 216                        { align1 1Q };
   END B14 ->B15 ->B16
   START B15 <-B14 (54 cycles)
math inv(8)     g92<1>F         g20.7<0,1,0>F   null<8,8,1>F    { align1 1Q };
mul(8)          g93<1>F         g79<8,8,1>F     g92<8,8,1>F     { align1 1Q compacted };
rndd(8)         g94<1>F         g93<8,8,1>F                     { align1 1Q compacted };
mad(8)          g32<1>F         g79<4,4,1>F     g94<4,4,1>F     -g20.7<0,1,0>F { align16 1Q compacted };
else(8)         JIP: 160        UIP: 160                        { align1 1Q };
   END B15 ->B20
   START B16 <-B14 (18 cycles)
cmp.z.f0(8)     null<1>D        g77<8,8,1>D     3D              { align1 1Q compacted };
(+f0) if(8)     JIP: 104        UIP: 120                        { align1 1Q };
   END B16 ->B17 ->B18
   START B17 <-B16 (106 cycles)
mul(8)          g95<1>F         g20.7<0,1,0>F   2F              { align1 1Q };
math inv(8)     g96<1>F         g95<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mul(8)          g97<1>F         g79<8,8,1>F     g96<8,8,1>F     { align1 1Q compacted };
rndd(8)         g98<1>F         g97<8,8,1>F                     { align1 1Q compacted };
mad(8)          g99<1>F         g79<4,4,1>F     g98<4,4,1>F     -g95<4,4,1>F { align16 1Q compacted };
add(8)          g100<1>F        g99<8,8,1>F     -g20.7<0,1,0>F  { align1 1Q compacted };
add(8)          g32<1>F         g20.7<0,1,0>F   -(abs)g100<8,8,1>F { align1 1Q };
else(8)         JIP: 32         UIP: 32                         { align1 1Q };
   END B17 ->B19
   START B18 <-B16 (18 cycles)
sel.ge(8)       g60<1>F         g79<8,8,1>F     0F              { align1 1Q compacted };
sel.l(8)        g32<1>F         g60<8,8,1>F     g20.7<0,1,0>F   { align1 1Q compacted };
   END B18 ->B19
   START B19 <-B18 <-B17 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B19 ->B20
   START B20 <-B19 <-B15 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B20 ->B21
   START B21 <-B20 <-B13 (8 cycles)
endif(8)        JIP: 32                                         { align1 1Q };
add(8)          g33<1>F         g31<8,8,1>F     g19.3<0,1,0>F   { align1 1Q compacted };
add(8)          g16<1>F         g32<8,8,1>F     g19.7<0,1,0>F   { align1 1Q compacted };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B21 ->B23
   START B22 <-B2 (2 cycles)
mov(8)          g33<1>D         g51<8,8,1>D                     { align1 1Q compacted };
   END B22 ->B23
   START B23 <-B22 <-B21 (36 cycles)
endif(8)        JIP: 11064                                      { align1 1Q };
shl(8)          g56<1>D         g11.7<0,1,0>D   0x00000015UD    { align1 1Q };
shr.nz.f0(8)    g103<1>UD       g56<8,8,1>UD    0x0000001eUD    { align1 1Q compacted };
(+f0) if(8)     JIP: 1936       UIP: 1984                       { align1 1Q };
   END B23 ->B24 ->B53
   START B24 <-B23 (18 cycles)
cmp.z.f0(8)     null<1>D        g103<8,8,1>D    2D              { align1 1Q compacted };
(+f0) if(8)     JIP: 528        UIP: 1472                       { align1 1Q };
   END B24 ->B25 ->B32
   START B25 <-B24 (134 cycles)
add(8)          g104<1>F        g33<8,8,1>F     -g21.3<0,1,0>F  { align1 1Q compacted };
add(8)          g47<1>F         g16<8,8,1>F     -g21.7<0,1,0>F  { align1 1Q compacted };
add(8)          g58<1>F         g22.3<0,1,0>F   -g21.3<0,1,0>F  { align1 1Q };
add(8)          g107<1>F        g22.7<0,1,0>F   -g21.7<0,1,0>F  { align1 1Q };
add(8)          g108<1>F        g23.7<0,1,0>F   -g23.3<0,1,0>F  { align1 1Q };
mul(8)          g61<1>F         g47<8,8,1>F     g47<8,8,1>F     { align1 1Q compacted };
mul(8)          g109<1>F        g47<8,8,1>F     g107<8,8,1>F    { align1 1Q compacted };
mul(8)          g113<1>F        g107<8,8,1>F    g107<8,8,1>F    { align1 1Q compacted };
mad(8)          g117<1>F        g61<4,4,1>F     g104<4,4,1>F    g104<4,4,1>F { align16 1Q compacted };
mad(8)          g110<1>F        g109<4,4,1>F    g58<4,4,1>F     g104<4,4,1>F { align16 1Q compacted };
mad(8)          g114<1>F        g113<4,4,1>F    g58<4,4,1>F     g58<4,4,1>F { align16 1Q compacted };
mad(8)          g118<1>F        g117<4,4,1>F    g23.3<0,1,0>F   -g23.3<0,1,0>F { align16 1Q compacted };
mad(8)          g111<1>F        g110<4,4,1>F    g108<4,4,1>F    -g23.3<0,1,0>F { align16 1Q compacted };
mad(8)          g115<1>F        g114<4,4,1>F    g108<4,4,1>F    -g108<4,4,1>F { align16 1Q compacted };
mul(8)          g112<1>F        g111<8,8,1>F    2F              { align1 1Q };
mul(8)          g119<1>F        g115<8,8,1>F    4F              { align1 1Q };
mul(8)          g120<1>F        g119<8,8,1>F    g118<8,8,1>F    { align1 1Q compacted };
mad.ge.f0(8)    g121<1>F        -g120<4,4,1>F   g112<4,4,1>F    g112<4,4,1>F { align16 1Q };
(+f0) if(8)     JIP: 272        UIP: 288                        { align1 1Q };
   END B25 ->B26 ->B30
   START B26 <-B25 (126 cycles)
math sqrt(8)    g122<1>F        (abs)g121<8,8,1>F null<8,8,1>F  { align1 1Q compacted };
math inv(8)     g123<1>F        g115<8,8,1>F    null<8,8,1>F    { align1 1Q compacted };
add(8)          g125<1>F        -g112<8,8,1>F   g122<8,8,1>F    { align1 1Q compacted };
add(8)          g127<1>F        -g112<8,8,1>F   -g122<8,8,1>F   { align1 1Q compacted };
mul(8)          g124<1>F        g123<8,8,1>F    0.5F            { align1 1Q };
mul(8)          g126<1>F        g125<8,8,1>F    g124<8,8,1>F    { align1 1Q compacted };
mul(8)          g2<1>F          g127<8,8,1>F    g124<8,8,1>F    { align1 1Q compacted };
cmp.le.f0(8)    g3<1>F          g126<8,8,1>F    1F              { align1 1Q };
cmp.ge.f0(8)    g4<1>F          g126<8,8,1>F    0F              { align1 1Q compacted };
cmp.le.f0(8)    g14<1>F         g2<8,8,1>F      1F              { align1 1Q };
cmp.ge.f0(8)    g15<1>F         g2<8,8,1>F      0F              { align1 1Q compacted };
and(8)          g12<1>UD        g4<8,8,1>UD     g3<8,8,1>UD     { align1 1Q compacted };
and(8)          g17<1>UD        g15<8,8,1>UD    g14<8,8,1>UD    { align1 1Q compacted };
mov(8)          g13<1>F         -g12<8,8,1>D                    { align1 1Q compacted };
mov(8)          g18<1>F         -g17<8,8,1>D                    { align1 1Q compacted };
cmp.z.f0(8)     null<1>F        g13<8,8,1>F     g18<8,8,1>F     { align1 1Q compacted };
(+f0) if(8)     JIP: 40         UIP: 56                         { align1 1Q };
   END B26 ->B27 ->B28
   START B27 <-B26 (4 cycles)
sel.ge(8)       g34<1>F         g126<8,8,1>F    g2<8,8,1>F      { align1 1Q compacted };
else(8)         JIP: 32         UIP: 32                         { align1 1Q };
   END B27 ->B29
   START B28 <-B26 (18 cycles)
mul(8)          g19<1>F         g18<8,8,1>F     g2<8,8,1>F      { align1 1Q compacted };
mad(8)          g34<1>F         g19<4,4,1>F     g126<4,4,1>F    g13<4,4,1>F { align16 1Q compacted };
   END B28 ->B29
   START B29 <-B28 <-B27 (6 cycles)
endif(8)        JIP: 32                                         { align1 1Q };
mov(8)          g23<1>D         1065353216D                     { align1 1Q };
else(8)         JIP: 32         UIP: 32                         { align1 1Q };
   END B29 ->B31
   START B30 <-B25 (4 cycles)
mov(8)          g23<1>UD        0x00000000UD                    { align1 1Q compacted };
mov(8)          g34<1>UD        0x00000000UD                    { align1 1Q compacted };
   END B30 ->B31
   START B31 <-B30 <-B29 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 960        UIP: 960                        { align1 1Q };
   END B31 ->B43
   START B32 <-B24 (18 cycles)
cmp.z.f0(8)     null<1>D        g103<8,8,1>D    1D              { align1 1Q compacted };
(+f0) if(8)     JIP: 144        UIP: 920                        { align1 1Q };
   END B32 ->B33 ->B34
   START B33 <-B32 (76 cycles)
add(8)          g20<1>F         g22.3<0,1,0>F   -g21.3<0,1,0>F  { align1 1Q };
add(8)          g31<1>F         g22.7<0,1,0>F   -g21.7<0,1,0>F  { align1 1Q };
add(8)          g32<1>F         g33<8,8,1>F     -g21.3<0,1,0>F  { align1 1Q compacted };
add(8)          g35<1>F         g16<8,8,1>F     -g21.7<0,1,0>F  { align1 1Q compacted };
mov(8)          g23<1>D         1065353216D                     { align1 1Q };
mul(8)          g38<1>F         g31<8,8,1>F     g31<8,8,1>F     { align1 1Q compacted };
mul(8)          g36<1>F         g31<8,8,1>F     g35<8,8,1>F     { align1 1Q compacted };
mad(8)          g39<1>F         g38<4,4,1>F     g20<4,4,1>F     g20<4,4,1>F { align16 1Q compacted };
mad(8)          g37<1>F         g36<4,4,1>F     g32<4,4,1>F     g20<4,4,1>F { align16 1Q compacted };
math inv(8)     g40<1>F         g39<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mul(8)          g34<1>F         g37<8,8,1>F     g40<8,8,1>F     { align1 1Q compacted };
else(8)         JIP: 792        UIP: 792                        { align1 1Q };
   END B33 ->B42
   START B34 <-B32 (18 cycles)
cmp.z.f0(8)     null<1>D        g103<8,8,1>D    3D              { align1 1Q compacted };
(+f0) if(8)     JIP: 736        UIP: 752                        { align1 1Q };
   END B34 ->B35 ->B40
   START B35 <-B34 (424 cycles)
add(8)          g41<1>F         g33<8,8,1>F     -g21.3<0,1,0>F  { align1 1Q compacted };
add(8)          g42<1>F         g16<8,8,1>F     -g21.7<0,1,0>F  { align1 1Q compacted };
mov(1)          g5.2<1>F        0.11735F                        { align1 WE_all 1N };
cmp.le.f0(8)    g43<1>F         g41<8,8,1>F     0F              { align1 1Q compacted };
csel.le(8)      g44<1>F         (abs)g41<4,4,1>F g42<4,4,1>F    g41<4,4,1>F { align16 1Q };
csel.le(8)      g45<1>F         g42<4,4,1>F     (abs)g41<4,4,1>F g41<4,4,1>F { align16 1Q };
mov(8)          g59<1>F         -g43<8,8,1>D                    { align1 1Q compacted };
cmp.ge.f0(8)    null<1>F        (abs)g45<8,8,1>F 1e+18F         { align1 1Q };
mul(8)          g53<1>F         g59<8,8,1>F     1.5708F         { align1 1Q };
(-f0) sel(8)    g46<1>UD        g52<8,8,1>UD    0x3e800000UD    { align1 1Q };
mul(8)          g50<1>F         g45<8,8,1>F     g46<8,8,1>F     { align1 1Q compacted };
mul(8)          g52<1>F         g44<8,8,1>F     g46<8,8,1>F     { align1 1Q compacted };
cmp.z.f0(8)     null<1>F        (abs)g41<8,8,1>F (abs)g42<8,8,1>F { align1 1Q compacted };
math inv(8)     g51<1>F         g50<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mul(8)          g86<1>F         g52<8,8,1>F     g51<8,8,1>F     { align1 1Q compacted };
sel.l(8)        g88<1>F         g42<8,8,1>F     g51<8,8,1>F     { align1 1Q compacted };
(-f0) sel(8)    g63<1>F         (abs)g86<8,8,1>F 1F             { align1 1Q };
sel.l(8)        g48<1>F         (abs)g63<8,8,1>F 1F             { align1 1Q };
sel.ge(8)       g78<1>F         (abs)g63<8,8,1>F 1F             { align1 1Q };
cmp.g.f0(8)     g57<1>F         (abs)g63<8,8,1>F 1F             { align1 1Q };
and(8)          g55<1>UD        g63<8,8,1>UD    0x80000000UD    { align1 1Q };
cmp.nz.f0(8)    null<1>F        g63<8,8,1>F     0F              { align1 1Q compacted };
math inv(8)     g66<1>F         g78<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mov(8)          g81<1>F         -g57<8,8,1>D                    { align1 1Q compacted };
(+f0) or(8)     g55<1>UD        g55<8,8,1>UD    0x3f800000UD    { align1 1Q };
mul(8)          g90<1>F         g48<8,8,1>F     g66<8,8,1>F     { align1 1Q compacted };
mul(8)          g49<1>F         g90<8,8,1>F     g90<8,8,1>F     { align1 1Q compacted };
mul(8)          g72<1>F         g49<8,8,1>F     -0.0121323F     { align1 1Q };
add(8)          g62<1>F         g72<8,8,1>F     0.0536814F      { align1 1Q };
mad(8)          g75<1>F         -g5.2<0,1,0>F   g49<4,4,1>F     g62<4,4,1>F { align16 1Q };
mov(1)          g5.3<1>F        0.193892F                       { align1 WE_all 1N };
mad(8)          g76<1>F         g5.3<0,1,0>F    g49<4,4,1>F     g75<4,4,1>F { align16 1Q };
mov(1)          g5.4<1>F        0.332676F                       { align1 WE_all 1N };
mad(8)          g77<1>F         -g5.4<0,1,0>F   g49<4,4,1>F     g76<4,4,1>F { align16 1Q };
mov(1)          g5.5<1>F        0.999979F                       { align1 WE_all 1N };
mad(8)          g65<1>F         g5.5<0,1,0>F    g49<4,4,1>F     g77<4,4,1>F { align16 1Q };
mov(1)          g5.6<1>F        1.5708F                         { align1 WE_all 1N };
mul(8)          g79<1>F         g65<8,8,1>F     g90<8,8,1>F     { align1 1Q compacted };
mad(8)          g82<1>F         g5.6<0,1,0>F    -g5.1<0,1,0>F   g79<4,4,1>F { align16 1Q };
mad(8)          g83<1>F         g79<4,4,1>F     g82<4,4,1>F     g81<4,4,1>F { align16 1Q compacted };
mad(8)          g54<1>F         g53<4,4,1>F     g55<4,4,1>F     g83<4,4,1>F { align16 1Q compacted };
csel.l(8)       g35<1>F         -g54<4,4,1>F    g54<4,4,1>F     g88<4,4,1>F { align16 1Q };
cmp.l.f0(8)     null<1>F        g35<8,8,1>F     g22.3<0,1,0>F   { align1 1Q compacted };
(+f0) if(8)     JIP: 32         UIP: 32                         { align1 1Q };
   END B35 ->B36 ->B37
   START B36 <-B35 (2 cycles)
add(8)          g35<1>F         g35<8,8,1>F     6.28319F        { align1 1Q };
   END B36 ->B37
   START B37 <-B35 <-B36 (22 cycles)
endif(8)        JIP: 136                                        { align1 1Q };
add(8)          g64<1>F         g35<8,8,1>F     -g22.3<0,1,0>F  { align1 1Q compacted };
cmp.l.f0(8)     null<1>F        g22.7<0,1,0>F   0F              { align1 1Q };
mul(8)          g36<1>F         g64<8,8,1>F     0.159155F       { align1 1Q };
(+f0) if(8)     JIP: 32         UIP: 32                         { align1 1Q };
   END B37 ->B38 ->B39
   START B38 <-B37 (2 cycles)
add(8)          g36<1>F         -g36<8,8,1>F    1F              { align1 1Q };
   END B38 ->B39
   START B39 <-B37 <-B38 (8 cycles)
endif(8)        JIP: 48                                         { align1 1Q };
mul(8)          g34<1>F         g36<8,8,1>F     (abs)g22.7<0,1,0>F { align1 1Q };
mov(8)          g23<1>D         1065353216D                     { align1 1Q };
else(8)         JIP: 32         UIP: 32                         { align1 1Q };
   END B39 ->B41
   START B40 <-B34 (2 cycles)
mov(8)          g34<1>D         1065353216D                     { align1 1Q };
   END B40 ->B41
   START B41 <-B40 <-B39 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B41 ->B42
   START B42 <-B41 <-B33 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B42 ->B43
   START B43 <-B42 <-B31 (52 cycles)
endif(8)        JIP: 424                                        { align1 1Q };
shl(8)          g67<1>D         g11.7<0,1,0>D   0x00000013UD    { align1 1Q };
shr(8)          g91<1>UD        g67<8,8,1>UD    0x0000001eUD    { align1 1Q compacted };
cmp.z.f0(8)     null<1>D        g91<8,8,1>D     1D              { align1 1Q compacted };
(+f0) if(8)     JIP: 40         UIP: 240                        { align1 1Q };
   END B43 ->B44 ->B45
   START B44 <-B43 (4 cycles)
mov.sat(8)      g37<1>F         (abs)g34<8,8,1>F                { align1 1Q compacted };
else(8)         JIP: 216        UIP: 216                        { align1 1Q };
   END B44 ->B52
   START B45 <-B43 (18 cycles)
cmp.z.f0(8)     null<1>D        g91<8,8,1>D     2D              { align1 1Q compacted };
(+f0) if(8)     JIP: 40         UIP: 176                        { align1 1Q };
   END B45 ->B46 ->B47
   START B46 <-B45 (4 cycles)
frc(8)          g37<1>F         g34<8,8,1>F                     { align1 1Q compacted };
else(8)         JIP: 152        UIP: 152                        { align1 1Q };
   END B46 ->B51
   START B47 <-B45 (18 cycles)
cmp.z.f0(8)     null<1>D        g91<8,8,1>D     3D              { align1 1Q compacted };
(+f0) if(8)     JIP: 104        UIP: 112                        { align1 1Q };
   END B47 ->B48 ->B49
   START B48 <-B47 (56 cycles)
mul(8)          g92<1>F         g34<8,8,1>F     0.5F            { align1 1Q };
add(8)          g94<1>F         g34<8,8,1>F     -1F             { align1 1Q };
rndd(8)         g93<1>F         g92<8,8,1>F                     { align1 1Q compacted };
mad(8)          g95<1>F         g94<4,4,1>F     g93<4,4,1>F     -g5.1<0,1,0>F { align16 1Q };
add(8)          g37<1>F         -(abs)g95<8,8,1>F 1F            { align1 1Q };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B48 ->B50
   START B49 <-B47 (2 cycles)
mov.sat(8)      g37<1>F         g34<8,8,1>F                     { align1 1Q compacted };
   END B49 ->B50
   START B50 <-B49 <-B48 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B50 ->B51
   START B51 <-B50 <-B46 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B51 ->B52
   START B52 <-B51 <-B44 (250 cycles)
endif(8)        JIP: 136                                        { align1 1Q };
mad(8)          g2<1>F          g27.3<0,1,0>F   g28.3<0,1,0>F   g37<4,4,1>F { align16 1Q compacted };
mov(8)          g3<1>F          g27.7<0,1,0>F                   { align1 1Q };
send(8)         g12<1>UW        g2<0,1,0>F
                            sampler sample_lz SIMD8 Surface = 1 Sampler = 0 mlen 2 rlen 4 { align1 1Q };
mul(8)          g97<1>F         g23<8,8,1>F     g12<8,8,1>F     { align1 1Q compacted };
mul(8)          g98<1>F         g23<8,8,1>F     g13<8,8,1>F     { align1 1Q compacted };
mul(8)          g99<1>F         g23<8,8,1>F     g14<8,8,1>F     { align1 1Q compacted };
mul(8)          g100<1>F        g23<8,8,1>F     g15<8,8,1>F     { align1 1Q compacted };
mul(8)          g38<1>F         g28.7<0,1,0>F   g97<8,8,1>F     { align1 1Q };
mul(8)          g39<1>F         g29.3<0,1,0>F   g98<8,8,1>F     { align1 1Q compacted };
mul(8)          g40<1>F         g29.7<0,1,0>F   g99<8,8,1>F     { align1 1Q };
mul(8)          g22<1>F         g30.3<0,1,0>F   g100<8,8,1>F    { align1 1Q compacted };
else(8)         JIP: 64         UIP: 64                         { align1 1Q };
   END B52 ->B54
   START B53 <-B23 (8 cycles)
mov(8)          g38<1>D         g28.7<0,1,0>D                   { align1 1Q };
mov(8)          g39<1>D         g29.3<0,1,0>D                   { align1 1Q compacted };
mov(8)          g40<1>D         g29.7<0,1,0>D                   { align1 1Q };
mov(8)          g22<1>D         g30.3<0,1,0>D                   { align1 1Q compacted };
   END B53 ->B54
   START B54 <-B53 <-B52 (26 cycles)
endif(8)        JIP: 9040                                       { align1 1Q };
mul(8)          g63<1>F         g38<8,8,1>F     g22<8,8,1>F     { align1 1Q compacted };
mul(8)          g86<1>F         g39<8,8,1>F     g22<8,8,1>F     { align1 1Q compacted };
mul(8)          g23<1>F         g40<8,8,1>F     g22<8,8,1>F     { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g11.7<0,1,0>UD  0x00000003UD    { align1 1Q };
(+f0) if(8)     JIP: 8968       UIP: 8968                       { align1 1Q };
   END B54 ->B55 ->B125
   START B55 <-B54 (46 cycles)
sel.ge(8)       g60<1>F         g33<8,8,1>F     0F              { align1 1Q compacted };
add(8)          g56<1>F         g25.3<0,1,0>F   -1F             { align1 1Q };
sel.ge(8)       g103<1>F        g16<8,8,1>F     0F              { align1 1Q compacted };
add(8)          g104<1>F        g25.7<0,1,0>F   -1F             { align1 1Q };
shl(8)          g47<1>D         g11.7<0,1,0>D   0x0000000aUD    { align1 1Q };
shl(8)          g58<1>D         g11.7<0,1,0>D   0x0000001eUD    { align1 1Q };
shl(8)          g107<1>D        g11.7<0,1,0>D   0x00000017UD    { align1 1Q };
sel.l(8)        g48<1>F         g60<8,8,1>F     g56<8,8,1>F     { align1 1Q compacted };
sel.l(8)        g78<1>F         g103<8,8,1>F    g104<8,8,1>F    { align1 1Q compacted };
shr(8)          g66<1>UD        g47<8,8,1>UD    0x0000001eUD    { align1 1Q compacted };
shr(8)          g90<1>UD        g58<8,8,1>UD    0x0000001eUD    { align1 1Q compacted };
shr.g.f0(8)     g108<1>UD       g107<8,8,1>UD   0x00000019UD    { align1 1Q compacted };
(+f0) if(8)     JIP: 144        UIP: 152                        { align1 1Q };
   END B55 ->B56 ->B57
   START B56 <-B55 (124 cycles)
mul(8)          g109<1>F        g69<8,8,1>F     g69<8,8,1>F     { align1 1Q compacted };
mul(8)          g111<1>F        g73<8,8,1>F     g73<8,8,1>F     { align1 1Q compacted };
mov(8)          g118<1>F        g108<8,8,1>UD                   { align1 1Q compacted };
mad(8)          g110<1>F        g109<4,4,1>F    g68<4,4,1>F     g68<4,4,1>F { align16 1Q compacted };
mad(8)          g112<1>F        g111<4,4,1>F    g71<4,4,1>F     g71<4,4,1>F { align16 1Q compacted };
add(8)          g113<1>F        g110<8,8,1>F    g112<8,8,1>F    { align1 1Q compacted };
mul(8)          g114<1>F        g113<8,8,1>F    0.5F            { align1 1Q };
sel.ge(8)       g115<1>F        g114<8,8,1>F    1F              { align1 1Q };
math log(8)     g61<1>F         g115<8,8,1>F    null<8,8,1>F    { align1 1Q compacted };
mul(8)          g117<1>F        g61<8,8,1>F     0.5F            { align1 1Q };
sel.l(8)        g15<1>F         g118<8,8,1>F    g117<8,8,1>F    { align1 1Q compacted };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B56 ->B58
   START B57 <-B55 (2 cycles)
mov(8)          g15<1>UD        0x00000000UD                    { align1 1Q compacted };
   END B57 ->B58
   START B58 <-B57 <-B56 (42 cycles)
endif(8)        JIP: 8664                                       { align1 1Q };
cmp.z.f0(8)     null<1>D        g66<8,8,1>D     0D              { align1 1Q compacted };
mov(1)          g5.7<1>F        4F                              { align1 WE_all 1N };
mov(1)          g68<1>F         3F                              { align1 WE_all 1N };
mov(1)          g68.1<1>F       6F                              { align1 WE_all 1N };
mov(1)          g68.2<1>F       0.166667F                       { align1 WE_all 1N };
(+f0) if(8)     JIP: 7008       UIP: 8432                       { align1 1Q };
   END B58 ->B59 ->B112
   START B59 <-B58 (20 cycles)
sel.l(8)        g119<1>F        g15<8,8,1>F     4.5F            { align1 1Q };
cmp.z.f0(8)     null<1>D        g90<8,8,1>D     1D              { align1 1Q compacted };
mov(1)          g68.3<1>F       32F                             { align1 WE_all 1N };
(+f0) if(8)     JIP: 592        UIP: 6920                       { align1 1Q };
   END B59 ->B60 ->B65
   START B60 <-B59 (296 cycles)
rndd(8)         g120<1>F        -g119<8,8,1>F                   { align1 1Q compacted };
sel.ge(8)       g121<1>F        g48<8,8,1>F     0F              { align1 1Q compacted };
sel.ge(8)       g122<1>F        g78<8,8,1>F     0F              { align1 1Q compacted };
mov(8)          g4<1>F          g8.7<0,1,0>F                    { align1 1Q };
mov(8)          g44<1>UD        0x00000001UD                    { align1 1Q compacted };
sel.l(8)        g123<1>F        g121<8,8,1>F    g25.3<0,1,0>F   { align1 1Q compacted };
sel.l(8)        g124<1>F        g122<8,8,1>F    g25.7<0,1,0>F   { align1 1Q compacted };
mad(8)          g41<1>F         g24.3<0,1,0>F   g26.3<0,1,0>F   g123<4,4,1>F { align16 1Q compacted };
mad(8)          g42<1>F         g24.7<0,1,0>F   g26.3<0,1,0>F   g124<4,4,1>F { align16 1Q compacted };
mov(8)          g2<1>D          g41<8,8,1>F                     { align1 1Q compacted };
mov(8)          g3<1>D          g42<8,8,1>F                     { align1 1Q compacted };
send(8)         g18<1>UW        g2<0,1,0>F
                            sampler ld_lz SIMD8 Surface = 4 Sampler = 3 mlen 3 rlen 4 { align1 1Q };
mov(8)          g30<1>UD        g18<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g31<1>UD        g19<8,8,1>UD                    { align1 1Q compacted };
shl(8)          g126<1>D        g21<8,8,1>D     0x00000008UD    { align1 1Q };
add(8)          g14<1>D         g20<8,8,1>D     g126<8,8,1>D    { align1 1Q compacted };
   END B60 ->B61
   START B62 <-B61 <-B63 (18 cycles)
cmp.ge.f0(8)    null<1>UD       g44<8,8,1>UD    g9.3<0,1,0>UD   { align1 1Q compacted };
   END B61 ->B62 ->B64
(+f0) break(8)  JIP: 208        UIP: 208                        { align1 1Q };
   END B62 ->B61 ->B63
   START B63 <-B62 (301 cycles)
rndd(8)         g127<1>F        g41<8,8,1>F                     { align1 1Q compacted };
rndd(8)         g2<1>F          g42<8,8,1>F                     { align1 1Q compacted };
mov(8)          g18<1>F         g30<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g19<1>F         g31<8,8,1>UD                    { align1 1Q compacted };
add(8)          g44<1>D         g44<8,8,1>D     1D              { align1 1Q compacted };
add(8)          g3<1>F          g41<8,8,1>F     -g127<8,8,1>F   { align1 1Q compacted };
add(8)          g4<1>F          g42<8,8,1>F     -g2<8,8,1>F     { align1 1Q compacted };
mul(8)          g20<1>F         g18<8,8,1>F     4F              { align1 1Q };
mul(8)          g21<1>F         g19<8,8,1>F     4F              { align1 1Q };
mad(8)          g41<1>F         g20<4,4,1>F     g5.7<0,1,0>F    g3<4,4,1>F { align16 1Q };
mad(8)          g42<1>F         g21<4,4,1>F     g5.7<0,1,0>F    g4<4,4,1>F { align16 1Q };
mov(8)          g12<1>D         g41<8,8,1>F                     { align1 1Q compacted };
mov(8)          g13<1>D         g42<8,8,1>F                     { align1 1Q compacted };
send(8)         g18<1>UW        g12<0,1,0>F
                            sampler ld_lz SIMD8 Surface = 4 Sampler = 3 mlen 3 rlen 4 { align1 1Q };
mov(8)          g30<1>UD        g18<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g31<1>UD        g19<8,8,1>UD                    { align1 1Q compacted };
shl(8)          g27<1>D         g21<8,8,1>D     0x00000008UD    { align1 1Q };
add(8)          g14<1>D         g20<8,8,1>D     g27<8,8,1>D     { align1 1Q compacted };
while(8)        JIP: -216                                       { align1 1Q };
   END B63 ->B62
   START B64 <-B61 (78 cycles)
rndd(8)         g28<1>F         g41<8,8,1>F                     { align1 1Q compacted };
rndd(8)         g29<1>F         g42<8,8,1>F                     { align1 1Q compacted };
mov(8)          g32<1>F         g30<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g33<1>F         g31<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g21<1>F         g14<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g18<1>F         -g120<8,8,1>F                   { align1 1Q compacted };
add(8)          g30<1>F         g41<8,8,1>F     -g28<8,8,1>F    { align1 1Q compacted };
add(8)          g31<1>F         g42<8,8,1>F     -g29<8,8,1>F    { align1 1Q compacted };
mul(8)          g34<1>F         g32<8,8,1>F     32F             { align1 1Q };
mul(8)          g35<1>F         g33<8,8,1>F     32F             { align1 1Q };
mad(8)          g36<1>F         g34<4,4,1>F     g68.3<0,1,0>F   g30<4,4,1>F { align16 1Q };
mad(8)          g37<1>F         g35<4,4,1>F     g68.3<0,1,0>F   g31<4,4,1>F { align16 1Q };
mul(8)          g19<1>F         g36<8,8,1>F     0.00012207F     { align1 1Q };
mul(8)          g20<1>F         g37<8,8,1>F     0.00012207F     { align1 1Q };
send(8)         g18<1>UW        g18<0,1,0>F
                            sampler sample_l SIMD8 Surface = 3 Sampler = 2 mlen 4 rlen 4 { align1 1Q };
else(8)         JIP: 6344       UIP: 6344                       { align1 1Q };
   END B64 ->B111
   START B65 <-B59 (36 cycles)
cmp.g.f0(8)     g39<1>F         g119<8,8,1>F    0.5F            { align1 1Q };
cmp.z.f0(8)     g40<1>D         g90<8,8,1>D     2D              { align1 1Q compacted };
or.nz.f0(8)     null<1>UD       g40<8,8,1>UD    g39<8,8,1>UD    { align1 1Q compacted };
(+f0) if(8)     JIP: 1080       UIP: 6280                       { align1 1Q };
   END B65 ->B66 ->B74
   START B66 <-B65 (382 cycles)
rnde(8)         g41<1>F         g119<8,8,1>F                    { align1 1Q compacted };
mov(8)          g29<1>F         g8.7<0,1,0>F                    { align1 1Q };
mov(8)          g50<1>UD        0x00000001UD                    { align1 1Q compacted };
mov(8)          g42<1>D         g41<8,8,1>F                     { align1 1Q compacted };
shl(8)          g43<1>D         g84<8,8,1>D     g42<8,8,1>UD    { align1 1Q };
mov(8)          g44<1>F         g43<8,8,1>D                     { align1 1Q compacted };
mul(8)          g51<1>F         g44<8,8,1>F     0.5F            { align1 1Q };
sel.ge(8)       g52<1>F         g48<8,8,1>F     g51<8,8,1>F     { align1 1Q compacted };
sel.ge(8)       g69<1>F         g78<8,8,1>F     g51<8,8,1>F     { align1 1Q compacted };
add(8)          g49<1>F         g25.3<0,1,0>F   -g51<8,8,1>F    { align1 1Q compacted };
add(8)          g71<1>F         g25.7<0,1,0>F   -g51<8,8,1>F    { align1 1Q };
sel.l(8)        g72<1>F         g52<8,8,1>F     g49<8,8,1>F     { align1 1Q compacted };
sel.l(8)        g73<1>F         g69<8,8,1>F     g71<8,8,1>F     { align1 1Q compacted };
mad(8)          g45<1>F         g24.3<0,1,0>F   g26.3<0,1,0>F   g72<4,4,1>F { align16 1Q compacted };
mad(8)          g46<1>F         g24.7<0,1,0>F   g26.3<0,1,0>F   g73<4,4,1>F { align16 1Q compacted };
mul(8)          g62<1>F         g45<8,8,1>F     0.25F           { align1 1Q };
mov(8)          g27<1>D         g45<8,8,1>F                     { align1 1Q compacted };
mul(8)          g75<1>F         g46<8,8,1>F     0.25F           { align1 1Q };
mov(8)          g28<1>D         g46<8,8,1>F                     { align1 1Q compacted };
rndd(8)         g76<1>F         g62<8,8,1>F                     { align1 1Q compacted };
rndd(8)         g77<1>F         g75<8,8,1>F                     { align1 1Q compacted };
send(8)         g27<1>UW        g27<0,1,0>F
                            sampler ld_lz SIMD8 Surface = 4 Sampler = 3 mlen 3 rlen 4 { align1 1Q };
mad(8)          g65<1>F         g45<4,4,1>F     g76<4,4,1>F     -g5.7<0,1,0>F { align16 1Q };
mad(8)          g79<1>F         g46<4,4,1>F     g77<4,4,1>F     -g5.7<0,1,0>F { align16 1Q };
mul(8)          g57<1>F         g65<8,8,1>F     g26.7<0,1,0>F   { align1 1Q compacted };
mul(8)          g81<1>F         g79<8,8,1>F     g26.7<0,1,0>F   { align1 1Q compacted };
mul(8)          g82<1>F         g57<8,8,1>F     0.03125F        { align1 1Q };
mul(8)          g59<1>F         g81<8,8,1>F     0.03125F        { align1 1Q };
rndd(8)         g83<1>F         g82<8,8,1>F                     { align1 1Q compacted };
rndd(8)         g53<1>F         g59<8,8,1>F                     { align1 1Q compacted };
mad(8)          g55<1>F         g57<4,4,1>F     g83<4,4,1>F     -g68.3<0,1,0>F { align16 1Q };
mad(8)          g54<1>F         g81<4,4,1>F     g53<4,4,1>F     -g68.3<0,1,0>F { align16 1Q };
mov(8)          g33<1>UD        g27<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g34<1>UD        g28<8,8,1>UD                    { align1 1Q compacted };
shl(8)          g64<1>D         g30<8,8,1>D     0x00000008UD    { align1 1Q };
add(8)          g4<1>D          g29<8,8,1>D     g64<8,8,1>D     { align1 1Q compacted };
   END B66 ->B67
   START B68 <-B67 <-B69 (18 cycles)
cmp.ge.f0(8)    null<1>UD       g50<8,8,1>UD    g9.3<0,1,0>UD   { align1 1Q compacted };
   END B67 ->B68 ->B70
(+f0) break(8)  JIP: 208        UIP: 208                        { align1 1Q };
   END B68 ->B67 ->B69
   START B69 <-B68 (300 cycles)
rndd(8)         g67<1>F         g45<8,8,1>F                     { align1 1Q compacted };
rndd(8)         g91<1>F         g46<8,8,1>F                     { align1 1Q compacted };
mov(8)          g94<1>F         g33<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g95<1>F         g34<8,8,1>UD                    { align1 1Q compacted };
add(8)          g50<1>D         g50<8,8,1>D     1D              { align1 1Q compacted };
add(8)          g92<1>F         g45<8,8,1>F     -g67<8,8,1>F    { align1 1Q compacted };
add(8)          g93<1>F         g46<8,8,1>F     -g91<8,8,1>F    { align1 1Q compacted };
mul(8)          g96<1>F         g94<8,8,1>F     4F              { align1 1Q };
mul(8)          g97<1>F         g95<8,8,1>F     4F              { align1 1Q };
mad(8)          g45<1>F         g96<4,4,1>F     g5.7<0,1,0>F    g92<4,4,1>F { align16 1Q };
mad(8)          g46<1>F         g97<4,4,1>F     g5.7<0,1,0>F    g93<4,4,1>F { align16 1Q };
mov(8)          g2<1>D          g45<8,8,1>F                     { align1 1Q compacted };
mov(8)          g3<1>D          g46<8,8,1>F                     { align1 1Q compacted };
send(8)         g27<1>UW        g2<0,1,0>F
                            sampler ld_lz SIMD8 Surface = 4 Sampler = 3 mlen 3 rlen 4 { align1 1Q };
mov(8)          g33<1>UD        g27<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g34<1>UD        g28<8,8,1>UD                    { align1 1Q compacted };
shl(8)          g98<1>D         g30<8,8,1>D     0x00000008UD    { align1 1Q };
add(8)          g4<1>D          g29<8,8,1>D     g98<8,8,1>D     { align1 1Q compacted };
while(8)        JIP: -216                                       { align1 1Q };
   END B69 ->B68
   START B70 <-B67 (90 cycles)
rndd(8)         g99<1>F         g45<8,8,1>F                     { align1 1Q compacted };
rndd(8)         g100<1>F        g46<8,8,1>F                     { align1 1Q compacted };
mov(8)          g103<1>F        g33<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g104<1>F        g34<8,8,1>UD                    { align1 1Q compacted };
sel.l(8)        g109<1>F        -g55<8,8,1>F    -g54<8,8,1>F    { align1 1Q compacted };
cmp.ge.f0(8)    g111<1>F        -g51<8,8,1>F    -g55<8,8,1>F    { align1 1Q compacted };
add(8)          g60<1>F         g45<8,8,1>F     -g99<8,8,1>F    { align1 1Q compacted };
add(8)          g56<1>F         g46<8,8,1>F     -g100<8,8,1>F   { align1 1Q compacted };
mul(8)          g47<1>F         g103<8,8,1>F    32F             { align1 1Q };
mul(8)          g58<1>F         g104<8,8,1>F    32F             { align1 1Q };
add(8)          g110<1>F        g109<8,8,1>F    31F             { align1 1Q };
mad(8)          g107<1>F        g47<4,4,1>F     g68.3<0,1,0>F   g60<4,4,1>F { align16 1Q };
mad(8)          g108<1>F        g58<4,4,1>F     g68.3<0,1,0>F   g56<4,4,1>F { align16 1Q };
cmp.ge.f0(8)    g112<1>F        g110<8,8,1>F    g51<8,8,1>F     { align1 1Q compacted };
cmp.ge.f0(8)    g114<1>F        -g51<8,8,1>F    -g54<8,8,1>F    { align1 1Q compacted };
and(8)          g113<1>UD       g112<8,8,1>UD   g111<8,8,1>UD   { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g113<8,8,1>UD   g114<8,8,1>UD   { align1 1Q compacted };
(+f0) if(8)     JIP: 128        UIP: 224                        { align1 1Q };
   END B70 ->B71 ->B72
   START B71 <-B70 (234 cycles)
mul(8)          g28<1>F         g107<8,8,1>F    0.00012207F     { align1 1Q };
mul(8)          g29<1>F         g108<8,8,1>F    0.00012207F     { align1 1Q };
mov(8)          g30<1>F         g4<8,8,1>UD                     { align1 1Q compacted };
mov(8)          g27<1>F         g42<8,8,1>D                     { align1 1Q compacted };
send(8)         g27<1>UW        g27<0,1,0>F
                            sampler sample_l SIMD8 Surface = 2 Sampler = 1 mlen 4 rlen 4 { align1 1Q };
mov(8)          g18<1>F         g27<8,8,1>F                     { align1 1Q compacted };
mov(8)          g19<1>F         g28<8,8,1>F                     { align1 1Q compacted };
mov(8)          g20<1>F         g29<8,8,1>F                     { align1 1Q compacted };
mov(8)          g21<1>F         g30<8,8,1>F                     { align1 1Q compacted };
else(8)         JIP: 112        UIP: 112                        { align1 1Q };
   END B71 ->B73
   START B72 <-B70 (232 cycles)
mul(8)          g28<1>F         g107<8,8,1>F    0.00012207F     { align1 1Q };
mul(8)          g29<1>F         g108<8,8,1>F    0.00012207F     { align1 1Q };
mov(8)          g30<1>F         g4<8,8,1>UD                     { align1 1Q compacted };
mov(8)          g27<1>F         g42<8,8,1>D                     { align1 1Q compacted };
send(8)         g27<1>UW        g27<0,1,0>F
                            sampler sample_l SIMD8 Surface = 3 Sampler = 2 mlen 4 rlen 4 { align1 1Q };
mov(8)          g18<1>F         g27<8,8,1>F                     { align1 1Q compacted };
mov(8)          g19<1>F         g28<8,8,1>F                     { align1 1Q compacted };
mov(8)          g20<1>F         g29<8,8,1>F                     { align1 1Q compacted };
mov(8)          g21<1>F         g30<8,8,1>F                     { align1 1Q compacted };
   END B72 ->B73
   START B73 <-B72 <-B71 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 5216       UIP: 5216                       { align1 1Q };
   END B73 ->B110
   START B74 <-B65 (288 cycles)
sel.ge(8)       g117<1>F        g48<8,8,1>F     2F              { align1 1Q };
sel.ge(8)       g118<1>F        g78<8,8,1>F     2F              { align1 1Q };
add(8)          g119<1>F        g25.3<0,1,0>F   -2F             { align1 1Q };
add(8)          g120<1>F        g25.7<0,1,0>F   -2F             { align1 1Q };
sel.l(8)        g121<1>F        g117<8,8,1>F    g119<8,8,1>F    { align1 1Q compacted };
sel.l(8)        g122<1>F        g118<8,8,1>F    g120<8,8,1>F    { align1 1Q compacted };
mad(8)          g123<1>F        g24.3<0,1,0>F   g26.3<0,1,0>F   g121<4,4,1>F { align16 1Q compacted };
mad(8)          g124<1>F        g24.7<0,1,0>F   g26.3<0,1,0>F   g122<4,4,1>F { align16 1Q compacted };
mad(8)          g51<1>F         g123<4,4,1>F    g26.3<0,1,0>F   -g5.0<0,1,0>F { align16 1Q };
mad(8)          g52<1>F         g124<4,4,1>F    g26.3<0,1,0>F   -g5.0<0,1,0>F { align16 1Q };
add(8)          g125<1>F        g51<8,8,1>F     -g24.3<0,1,0>F  { align1 1Q compacted };
add(8)          g126<1>F        g52<8,8,1>F     -g24.7<0,1,0>F  { align1 1Q compacted };
mul(8)          g127<1>F        g125<8,8,1>F    g26.7<0,1,0>F   { align1 1Q compacted };
mul(8)          g2<1>F          g126<8,8,1>F    g26.7<0,1,0>F   { align1 1Q compacted };
mul(8)          g3<1>F          g127<8,8,1>F    0.03125F        { align1 1Q };
frc(8)          g43<1>F         g127<8,8,1>F                    { align1 1Q compacted };
mul(8)          g14<1>F         g2<8,8,1>F      0.03125F        { align1 1Q };
frc(8)          g44<1>F         g2<8,8,1>F                      { align1 1Q compacted };
rndd(8)         g4<1>F          g3<8,8,1>F                      { align1 1Q compacted };
mul(8)          g45<1>F         g43<8,8,1>F     g43<8,8,1>F     { align1 1Q compacted };
add(8)          g50<1>F         -g43<8,8,1>F    1F              { align1 1Q };
rndd(8)         g25<1>F         g14<8,8,1>F                     { align1 1Q compacted };
mul(8)          g77<1>F         g44<8,8,1>F     g44<8,8,1>F     { align1 1Q compacted };
add(8)          g79<1>F         -g44<8,8,1>F    1F              { align1 1Q };
mad(8)          g12<1>F         g127<4,4,1>F    g4<4,4,1>F      -g68.3<0,1,0>F { align16 1Q };
mul(8)          g46<1>F         g45<8,8,1>F     g43<8,8,1>F     { align1 1Q compacted };
mul(8)          g69<1>F         g50<8,8,1>F     g50<8,8,1>F     { align1 1Q compacted };
mad(8)          g27<1>F         g2<4,4,1>F      g25<4,4,1>F     -g68.3<0,1,0>F { align16 1Q };
mul(8)          g65<1>F         g77<8,8,1>F     g44<8,8,1>F     { align1 1Q compacted };
mul(8)          g57<1>F         g79<8,8,1>F     g79<8,8,1>F     { align1 1Q compacted };
mad(8)          g71<1>F         g5.7<0,1,0>F    g46<4,4,1>F     g68.0<0,1,0>F { align16 1Q };
mul(8)          g76<1>F         g46<8,8,1>F     0.166667F       { align1 1Q };
mul(8)          g49<1>F         g69<8,8,1>F     g50<8,8,1>F     { align1 1Q compacted };
add(8)          g13<1>F         -g12<8,8,1>F    31F             { align1 1Q };
mad(8)          g82<1>F         g5.7<0,1,0>F    g65<4,4,1>F     g68.0<0,1,0>F { align16 1Q };
mul(8)          g54<1>F         g65<8,8,1>F     0.166667F       { align1 1Q };
mul(8)          g81<1>F         g57<8,8,1>F     g79<8,8,1>F     { align1 1Q compacted };
add(8)          g28<1>F         -g27<8,8,1>F    31F             { align1 1Q };
sel.ge(8)       g100<1>F        -g12<8,8,1>F    -g27<8,8,1>F    { align1 1Q compacted };
mad(8)          g73<1>F         g5.7<0,1,0>F    g49<4,4,1>F     g68.0<0,1,0>F { align16 1Q };
mad(8)          g72<1>F         g71<4,4,1>F     g45<4,4,1>F     -g68.1<0,1,0>F { align16 1Q };
cmp.ge.f0(8)    g60<1>F         g13<8,8,1>F     2.5F            { align1 1Q };
mad(8)          g55<1>F         g5.7<0,1,0>F    g81<4,4,1>F     g68.0<0,1,0>F { align16 1Q };
mad(8)          g83<1>F         g82<4,4,1>F     g77<4,4,1>F     -g68.1<0,1,0>F { align16 1Q };
cmp.le.f0(8)    g56<1>F         g100<8,8,1>F    -1.5F           { align1 1Q };
cmp.ge.f0(8)    g104<1>F        g28<8,8,1>F     2.5F            { align1 1Q };
mad(8)          g62<1>F         g73<4,4,1>F     g69<4,4,1>F     -g68.1<0,1,0>F { align16 1Q };
mul(8)          g75<1>F         g72<8,8,1>F     0.166667F       { align1 1Q };
and(8)          g103<1>UD       g56<8,8,1>UD    g60<8,8,1>UD    { align1 1Q compacted };
mad(8)          g59<1>F         g55<4,4,1>F     g57<4,4,1>F     -g68.1<0,1,0>F { align16 1Q };
mul(8)          g53<1>F         g83<8,8,1>F     0.166667F       { align1 1Q };
mad(8)          g88<1>F         g75<4,4,1>F     g68.2<0,1,0>F   g49<4,4,1>F { align16 1Q };
mad(8)          g64<1>F         g76<4,4,1>F     g68.2<0,1,0>F   g62<4,4,1>F { align16 1Q };
and.nz.f0(8)    null<1>UD       g103<8,8,1>UD   g104<8,8,1>UD   { align1 1Q compacted };
mad(8)          g67<1>F         g53<4,4,1>F     g68.2<0,1,0>F   g81<4,4,1>F { align16 1Q };
mad(8)          g91<1>F         g54<4,4,1>F     g68.2<0,1,0>F   g59<4,4,1>F { align16 1Q };
math inv(8)     g92<1>F         g88<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
math inv(8)     g93<1>F         g64<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
add(8)          g96<1>F         g88<8,8,1>F     g64<8,8,1>F     { align1 1Q compacted };
math inv(8)     g94<1>F         g67<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
math inv(8)     g95<1>F         g91<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
add(8)          g98<1>F         g67<8,8,1>F     g91<8,8,1>F     { align1 1Q compacted };
math inv(8)     g97<1>F         g96<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
math inv(8)     g99<1>F         g98<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mul(8)          g25<1>F         g64<8,8,1>F     g97<8,8,1>F     { align1 1Q compacted };
mul(8)          g69<1>F         g91<8,8,1>F     g99<8,8,1>F     { align1 1Q compacted };
(+f0) if(8)     JIP: 776        UIP: 4264                       { align1 1Q };
   END B74 ->B75 ->B80
   START B75 <-B74 (244 cycles)
mov(8)          g28<1>D         g51<8,8,1>F                     { align1 1Q compacted };
mov(8)          g29<1>D         g52<8,8,1>F                     { align1 1Q compacted };
mov(8)          g30<1>F         g8.7<0,1,0>F                    { align1 1Q };
mov(8)          g49<1>UD        0x00000001UD                    { align1 1Q compacted };
send(8)         g27<1>UW        g28<0,1,0>F
                            sampler ld_lz SIMD8 Surface = 4 Sampler = 3 mlen 3 rlen 4 { align1 1Q };
mov(8)          g36<1>UD        g27<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g37<1>UD        g28<8,8,1>UD                    { align1 1Q compacted };
shl(8)          g58<1>D         g30<8,8,1>D     0x00000008UD    { align1 1Q };
add(8)          g33<1>D         g29<8,8,1>D     g58<8,8,1>D     { align1 1Q compacted };
   END B75 ->B76
   START B77 <-B76 <-B78 (18 cycles)
cmp.ge.f0(8)    null<1>UD       g49<8,8,1>UD    g9.3<0,1,0>UD   { align1 1Q compacted };
   END B76 ->B77 ->B79
(+f0) break(8)  JIP: 208        UIP: 208                        { align1 1Q };
   END B77 ->B76 ->B78
   START B78 <-B77 (300 cycles)
rndd(8)         g107<1>F        g51<8,8,1>F                     { align1 1Q compacted };
rndd(8)         g108<1>F        g52<8,8,1>F                     { align1 1Q compacted };
mov(8)          g111<1>F        g36<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g112<1>F        g37<8,8,1>UD                    { align1 1Q compacted };
add(8)          g49<1>D         g49<8,8,1>D     1D              { align1 1Q compacted };
add(8)          g109<1>F        g51<8,8,1>F     -g107<8,8,1>F   { align1 1Q compacted };
add(8)          g110<1>F        g52<8,8,1>F     -g108<8,8,1>F   { align1 1Q compacted };
mul(8)          g113<1>F        g111<8,8,1>F    4F              { align1 1Q };
mul(8)          g114<1>F        g112<8,8,1>F    4F              { align1 1Q };
mad(8)          g51<1>F         g113<4,4,1>F    g5.7<0,1,0>F    g109<4,4,1>F { align16 1Q };
mad(8)          g52<1>F         g114<4,4,1>F    g5.7<0,1,0>F    g110<4,4,1>F { align16 1Q };
mov(8)          g31<1>D         g51<8,8,1>F                     { align1 1Q compacted };
mov(8)          g32<1>D         g52<8,8,1>F                     { align1 1Q compacted };
send(8)         g27<1>UW        g31<0,1,0>F
                            sampler ld_lz SIMD8 Surface = 4 Sampler = 3 mlen 3 rlen 4 { align1 1Q };
mov(8)          g36<1>UD        g27<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g37<1>UD        g28<8,8,1>UD                    { align1 1Q compacted };
shl(8)          g115<1>D        g30<8,8,1>D     0x00000008UD    { align1 1Q };
add(8)          g33<1>D         g29<8,8,1>D     g115<8,8,1>D    { align1 1Q compacted };
while(8)        JIP: -216                                       { align1 1Q };
   END B78 ->B77
   START B79 <-B76 (153 cycles)
rndd(8)         g61<1>F         g51<8,8,1>F                     { align1 1Q compacted };
rndd(8)         g117<1>F        g52<8,8,1>F                     { align1 1Q compacted };
mov(8)          g120<1>F        g36<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g121<1>F        g37<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g33<1>F         g33<8,8,1>UD                    { align1 1Q compacted };
add(8)          g118<1>F        g51<8,8,1>F     -g61<8,8,1>F    { align1 1Q compacted };
add(8)          g119<1>F        g52<8,8,1>F     -g117<8,8,1>F   { align1 1Q compacted };
mul(8)          g122<1>F        g120<8,8,1>F    32F             { align1 1Q };
mul(8)          g123<1>F        g121<8,8,1>F    32F             { align1 1Q };
mov(8)          g14<1>F         g33<8,8,1>F                     { align1 1Q compacted };
mov(8)          g36<1>F         g33<8,8,1>F                     { align1 1Q compacted };
mov(8)          g4<1>F          g33<8,8,1>F                     { align1 1Q compacted };
mad(8)          g124<1>F        g122<4,4,1>F    g68.3<0,1,0>F   g118<4,4,1>F { align16 1Q };
mad(8)          g125<1>F        g123<4,4,1>F    g68.3<0,1,0>F   g119<4,4,1>F { align16 1Q };
add(8)          g126<1>F        g124<8,8,1>F    -g43<8,8,1>F    { align1 1Q compacted };
add(8)          g127<1>F        g125<8,8,1>F    -g44<8,8,1>F    { align1 1Q compacted };
add(8)          g27<1>F         g126<8,8,1>F    -0.5F           { align1 1Q };
add(8)          g29<1>F         g126<8,8,1>F    1.5F            { align1 1Q };
add(8)          g37<1>F         g127<8,8,1>F    -0.5F           { align1 1Q };
add(8)          g39<1>F         g127<8,8,1>F    1.5F            { align1 1Q };
mad(8)          g28<1>F         g27<4,4,1>F     g92<4,4,1>F     g75<4,4,1>F { align16 1Q compacted };
mad(8)          g30<1>F         g29<4,4,1>F     g93<4,4,1>F     g76<4,4,1>F { align16 1Q compacted };
mad(8)          g38<1>F         g37<4,4,1>F     g94<4,4,1>F     g53<4,4,1>F { align16 1Q compacted };
mad(8)          g40<1>F         g39<4,4,1>F     g95<4,4,1>F     g54<4,4,1>F { align16 1Q compacted };
mul(8)          g31<1>F         g28<8,8,1>F     0.00012207F     { align1 1Q };
mul(8)          g12<1>F         g30<8,8,1>F     0.00012207F     { align1 1Q };
mul(8)          g32<1>F         g38<8,8,1>F     0.00012207F     { align1 1Q };
mul(8)          g35<1>F         g40<8,8,1>F     0.00012207F     { align1 1Q };
mov(8)          g34<1>F         g31<8,8,1>F                     { align1 1Q compacted };
mov(8)          g2<1>F          g12<8,8,1>F                     { align1 1Q compacted };
send(8)         g27<1>UW        g31<0,1,0>F
                            sampler sample_lz SIMD8 Surface = 2 Sampler = 1 mlen 3 rlen 4 { align1 1Q };
mov(8)          g13<1>F         g32<8,8,1>F                     { align1 1Q compacted };
mov(8)          g3<1>F          g35<8,8,1>F                     { align1 1Q compacted };
send(8)         g35<1>UW        g34<0,1,0>F
                            sampler sample_lz SIMD8 Surface = 2 Sampler = 1 mlen 3 rlen 4 { align1 1Q };
send(8)         g31<1>UW        g12<0,1,0>F
                            sampler sample_lz SIMD8 Surface = 2 Sampler = 1 mlen 3 rlen 4 { align1 1Q };
send(8)         g39<1>UW        g2<0,1,0>F
                            sampler sample_lz SIMD8 Surface = 2 Sampler = 1 mlen 3 rlen 4 { align1 1Q };
else(8)         JIP: 3504       UIP: 3504                       { align1 1Q };
   END B79 ->B109
   START B80 <-B74 (309 cycles)
mad(8)          g43<1>F         g51<4,4,1>F     g26.3<0,1,0>F   -g43<4,4,1>F { align16 1Q compacted };
mad(8)          g44<1>F         g52<4,4,1>F     g26.3<0,1,0>F   -g44<4,4,1>F { align16 1Q compacted };
mov(1)          g68.4<1>F       1.5F                            { align1 WE_all 1N };
mul(8)          g49<1>F         g76<8,8,1>F     g93<8,8,1>F     { align1 1Q compacted };
mul(8)          g71<1>F         g53<8,8,1>F     g94<8,8,1>F     { align1 1Q compacted };
mul(8)          g73<1>F         g54<8,8,1>F     g95<8,8,1>F     { align1 1Q compacted };
mov(8)          g4<1>F          g8.7<0,1,0>F                    { align1 1Q };
mov(8)          g81<1>UD        0x00000001UD                    { align1 1Q compacted };
mul(8)          g52<1>F         g75<8,8,1>F     g92<8,8,1>F     { align1 1Q compacted };
mad(8)          g45<1>F         g43<4,4,1>F     g26.3<0,1,0>F   -g5.0<0,1,0>F { align16 1Q };
mad(8)          g50<1>F         g43<4,4,1>F     g26.3<0,1,0>F   g68.4<0,1,0>F { align16 1Q };
mad(8)          g51<1>F         g44<4,4,1>F     g26.3<0,1,0>F   g68.4<0,1,0>F { align16 1Q };
mad(8)          g46<1>F         g44<4,4,1>F     g26.3<0,1,0>F   -g5.0<0,1,0>F { align16 1Q };
mad(8)          g72<1>F         g45<4,4,1>F     g26.3<0,1,0>F   g52<4,4,1>F { align16 1Q compacted };
mad(8)          g49<1>F         g50<4,4,1>F     g26.3<0,1,0>F   g49<4,4,1>F { align16 1Q compacted };
mad(8)          g77<1>F         g46<4,4,1>F     g26.3<0,1,0>F   g71<4,4,1>F { align16 1Q compacted };
mad(8)          g71<1>F         g51<4,4,1>F     g26.3<0,1,0>F   g73<4,4,1>F { align16 1Q compacted };
mul(8)          g62<1>F         g72<8,8,1>F     0.25F           { align1 1Q };
mov(8)          g2<1>D          g72<8,8,1>F                     { align1 1Q compacted };
mov(8)          g79<1>D         g72<8,8,1>D                     { align1 1Q compacted };
mul(8)          g75<1>F         g77<8,8,1>F     0.25F           { align1 1Q };
mov(8)          g3<1>D          g77<8,8,1>F                     { align1 1Q compacted };
mov(8)          g57<1>D         g77<8,8,1>D                     { align1 1Q compacted };
rndd(8)         g76<1>F         g62<8,8,1>F                     { align1 1Q compacted };
rndd(8)         g65<1>F         g75<8,8,1>F                     { align1 1Q compacted };
send(8)         g43<1>UW        g2<0,1,0>F
                            sampler ld_lz SIMD8 Surface = 4 Sampler = 3 mlen 3 rlen 4 { align1 1Q };
mad(8)          g82<1>F         g72<4,4,1>F     g76<4,4,1>F     -g5.7<0,1,0>F { align16 1Q };
mad(8)          g83<1>F         g77<4,4,1>F     g65<4,4,1>F     -g5.7<0,1,0>F { align16 1Q };
mul(8)          g55<1>F         g82<8,8,1>F     g26.7<0,1,0>F   { align1 1Q compacted };
mul(8)          g59<1>F         g83<8,8,1>F     g26.7<0,1,0>F   { align1 1Q compacted };
mul(8)          g53<1>F         g55<8,8,1>F     0.03125F        { align1 1Q };
mul(8)          g64<1>F         g59<8,8,1>F     0.03125F        { align1 1Q };
rndd(8)         g54<1>F         g53<8,8,1>F                     { align1 1Q compacted };
rndd(8)         g67<1>F         g64<8,8,1>F                     { align1 1Q compacted };
mad(8)          g88<1>F         g55<4,4,1>F     g54<4,4,1>F     -g68.3<0,1,0>F { align16 1Q };
mad(8)          g91<1>F         g59<4,4,1>F     g67<4,4,1>F     -g68.3<0,1,0>F { align16 1Q };
add(8)          g62<1>F         -g88<8,8,1>F    31F             { align1 1Q };
add(8)          g92<1>F         -g91<8,8,1>F    31F             { align1 1Q };
mov(8)          g50<1>UD        g43<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g51<1>UD        g44<8,8,1>UD                    { align1 1Q compacted };
shl(8)          g94<1>D         g46<8,8,1>D     0x00000008UD    { align1 1Q };
add(8)          g14<1>D         g45<8,8,1>D     g94<8,8,1>D     { align1 1Q compacted };
   END B80 ->B81
   START B82 <-B81 <-B83 (18 cycles)
cmp.ge.f0(8)    null<1>UD       g81<8,8,1>UD    g9.3<0,1,0>UD   { align1 1Q compacted };
   END B81 ->B82 ->B84
(+f0) break(8)  JIP: 208        UIP: 208                        { align1 1Q };
   END B82 ->B81 ->B83
   START B83 <-B82 (300 cycles)
rndd(8)         g95<1>F         g79<8,8,1>F                     { align1 1Q compacted };
rndd(8)         g96<1>F         g57<8,8,1>F                     { align1 1Q compacted };
mov(8)          g99<1>F         g50<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g100<1>F        g51<8,8,1>UD                    { align1 1Q compacted };
add(8)          g81<1>D         g81<8,8,1>D     1D              { align1 1Q compacted };
add(8)          g97<1>F         g79<8,8,1>F     -g95<8,8,1>F    { align1 1Q compacted };
add(8)          g98<1>F         g57<8,8,1>F     -g96<8,8,1>F    { align1 1Q compacted };
mul(8)          g60<1>F         g99<8,8,1>F     4F              { align1 1Q };
mul(8)          g56<1>F         g100<8,8,1>F    4F              { align1 1Q };
mad(8)          g79<1>F         g60<4,4,1>F     g5.7<0,1,0>F    g97<4,4,1>F { align16 1Q };
mad(8)          g57<1>F         g56<4,4,1>F     g5.7<0,1,0>F    g98<4,4,1>F { align16 1Q };
mov(8)          g12<1>D         g79<8,8,1>F                     { align1 1Q compacted };
mov(8)          g13<1>D         g57<8,8,1>F                     { align1 1Q compacted };
send(8)         g43<1>UW        g12<0,1,0>F
                            sampler ld_lz SIMD8 Surface = 4 Sampler = 3 mlen 3 rlen 4 { align1 1Q };
mov(8)          g50<1>UD        g43<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g51<1>UD        g44<8,8,1>UD                    { align1 1Q compacted };
shl(8)          g103<1>D        g46<8,8,1>D     0x00000008UD    { align1 1Q };
add(8)          g14<1>D         g45<8,8,1>D     g103<8,8,1>D    { align1 1Q compacted };
while(8)        JIP: -216                                       { align1 1Q };
   END B83 ->B82
   START B84 <-B81 (74 cycles)
rndd(8)         g104<1>F        g79<8,8,1>F                     { align1 1Q compacted };
rndd(8)         g47<1>F         g57<8,8,1>F                     { align1 1Q compacted };
mov(8)          g108<1>F        g50<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g109<1>F        g51<8,8,1>UD                    { align1 1Q compacted };
sel.l(8)        g114<1>F        g62<8,8,1>F     g92<8,8,1>F     { align1 1Q compacted };
cmp.le.f0(8)    g76<1>F         -g88<8,8,1>F    -0.5F           { align1 1Q };
add(8)          g58<1>F         g79<8,8,1>F     -g104<8,8,1>F   { align1 1Q compacted };
add(8)          g107<1>F        g57<8,8,1>F     -g47<8,8,1>F    { align1 1Q compacted };
mul(8)          g110<1>F        g108<8,8,1>F    32F             { align1 1Q };
mul(8)          g111<1>F        g109<8,8,1>F    32F             { align1 1Q };
cmp.ge.f0(8)    g115<1>F        g114<8,8,1>F    0.5F            { align1 1Q };
cmp.le.f0(8)    g117<1>F        -g91<8,8,1>F    -0.5F           { align1 1Q };
mad(8)          g112<1>F        g110<4,4,1>F    g68.3<0,1,0>F   g58<4,4,1>F { align16 1Q };
mad(8)          g113<1>F        g111<4,4,1>F    g68.3<0,1,0>F   g107<4,4,1>F { align16 1Q };
and(8)          g61<1>UD        g115<8,8,1>UD   g76<8,8,1>UD    { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g61<8,8,1>UD    g117<8,8,1>UD   { align1 1Q compacted };
(+f0) if(8)     JIP: 120        UIP: 208                        { align1 1Q };
   END B84 ->B85 ->B86
   START B85 <-B84 (232 cycles)
mul(8)          g43<1>F         g112<8,8,1>F    0.00012207F     { align1 1Q };
mul(8)          g44<1>F         g113<8,8,1>F    0.00012207F     { align1 1Q };
mov(8)          g45<1>F         g14<8,8,1>UD                    { align1 1Q compacted };
send(8)         g43<1>UW        g43<0,1,0>F
                            sampler sample_lz SIMD8 Surface = 2 Sampler = 1 mlen 3 rlen 4 { align1 1Q };
mov(8)          g27<1>F         g43<8,8,1>F                     { align1 1Q compacted };
mov(8)          g28<1>F         g44<8,8,1>F                     { align1 1Q compacted };
mov(8)          g29<1>F         g45<8,8,1>F                     { align1 1Q compacted };
mov(8)          g30<1>F         g46<8,8,1>F                     { align1 1Q compacted };
else(8)         JIP: 104        UIP: 104                        { align1 1Q };
   END B85 ->B87
   START B86 <-B84 (230 cycles)
mul(8)          g43<1>F         g112<8,8,1>F    0.00012207F     { align1 1Q };
mul(8)          g44<1>F         g113<8,8,1>F    0.00012207F     { align1 1Q };
mov(8)          g45<1>F         g14<8,8,1>UD                    { align1 1Q compacted };
send(8)         g43<1>UW        g43<0,1,0>F
                            sampler sample_lz SIMD8 Surface = 3 Sampler = 2 mlen 3 rlen 4 { align1 1Q };
mov(8)          g27<1>F         g43<8,8,1>F                     { align1 1Q compacted };
mov(8)          g28<1>F         g44<8,8,1>F                     { align1 1Q compacted };
mov(8)          g29<1>F         g45<8,8,1>F                     { align1 1Q compacted };
mov(8)          g30<1>F         g46<8,8,1>F                     { align1 1Q compacted };
   END B86 ->B87
   START B87 <-B86 <-B85 (248 cycles)
endif(8)        JIP: 2384                                       { align1 1Q };
mul(8)          g118<1>F        g49<8,8,1>F     0.25F           { align1 1Q };
mov(8)          g12<1>D         g49<8,8,1>F                     { align1 1Q compacted };
mov(8)          g13<1>F         g3<8,8,1>F                      { align1 1Q compacted };
mov(8)          g14<1>F         g8.7<0,1,0>F                    { align1 1Q };
mov(8)          g55<1>UD        0x00000001UD                    { align1 1Q compacted };
mov(8)          g83<1>D         g49<8,8,1>D                     { align1 1Q compacted };
rndd(8)         g119<1>F        g118<8,8,1>F                    { align1 1Q compacted };
send(8)         g43<1>UW        g12<0,1,0>F
                            sampler ld_lz SIMD8 Surface = 4 Sampler = 3 mlen 3 rlen 4 { align1 1Q };
mad(8)          g120<1>F        g49<4,4,1>F     g119<4,4,1>F    -g5.7<0,1,0>F { align16 1Q };
mul(8)          g121<1>F        g120<8,8,1>F    g26.7<0,1,0>F   { align1 1Q compacted };
mul(8)          g122<1>F        g121<8,8,1>F    0.03125F        { align1 1Q };
rndd(8)         g123<1>F        g122<8,8,1>F                    { align1 1Q compacted };
mad(8)          g124<1>F        g121<4,4,1>F    g123<4,4,1>F    -g68.3<0,1,0>F { align16 1Q };
add(8)          g73<1>F         -g124<8,8,1>F   31F             { align1 1Q };
mov(8)          g59<1>UD        g43<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g53<1>UD        g44<8,8,1>UD                    { align1 1Q compacted };
shl(8)          g126<1>D        g46<8,8,1>D     0x00000008UD    { align1 1Q };
add(8)          g52<1>D         g45<8,8,1>D     g126<8,8,1>D    { align1 1Q compacted };
   END B87 ->B88
   START B89 <-B88 <-B90 (18 cycles)
cmp.ge.f0(8)    null<1>UD       g55<8,8,1>UD    g9.3<0,1,0>UD   { align1 1Q compacted };
   END B88 ->B89 ->B91
(+f0) break(8)  JIP: 208        UIP: 208                        { align1 1Q };
   END B89 ->B88 ->B90
   START B90 <-B89 (301 cycles)
rndd(8)         g127<1>F        g83<8,8,1>F                     { align1 1Q compacted };
rndd(8)         g43<1>F         g77<8,8,1>F                     { align1 1Q compacted };
mov(8)          g46<1>F         g59<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g75<1>F         g53<8,8,1>UD                    { align1 1Q compacted };
add(8)          g55<1>D         g55<8,8,1>D     1D              { align1 1Q compacted };
add(8)          g44<1>F         g83<8,8,1>F     -g127<8,8,1>F   { align1 1Q compacted };
add(8)          g45<1>F         g77<8,8,1>F     -g43<8,8,1>F    { align1 1Q compacted };
mul(8)          g65<1>F         g46<8,8,1>F     4F              { align1 1Q };
mul(8)          g79<1>F         g75<8,8,1>F     4F              { align1 1Q };
mad(8)          g83<1>F         g65<4,4,1>F     g5.7<0,1,0>F    g44<4,4,1>F { align16 1Q };
mad(8)          g77<1>F         g79<4,4,1>F     g5.7<0,1,0>F    g45<4,4,1>F { align16 1Q };
mov(8)          g50<1>D         g83<8,8,1>F                     { align1 1Q compacted };
mov(8)          g51<1>D         g77<8,8,1>F                     { align1 1Q compacted };
send(8)         g43<1>UW        g50<0,1,0>F
                            sampler ld_lz SIMD8 Surface = 4 Sampler = 3 mlen 3 rlen 4 { align1 1Q };
mov(8)          g59<1>UD        g43<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g53<1>UD        g44<8,8,1>UD                    { align1 1Q compacted };
shl(8)          g57<1>D         g46<8,8,1>D     0x00000008UD    { align1 1Q };
add(8)          g52<1>D         g45<8,8,1>D     g57<8,8,1>D     { align1 1Q compacted };
while(8)        JIP: -216                                       { align1 1Q };
   END B90 ->B89
   START B91 <-B88 (74 cycles)
rndd(8)         g81<1>F         g83<8,8,1>F                     { align1 1Q compacted };
rndd(8)         g82<1>F         g77<8,8,1>F                     { align1 1Q compacted };
mov(8)          g59<1>F         g59<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g53<1>F         g53<8,8,1>UD                    { align1 1Q compacted };
sel.l(8)        g91<1>F         g73<8,8,1>F     g92<8,8,1>F     { align1 1Q compacted };
cmp.le.f0(8)    g75<1>F         -g124<8,8,1>F   -0.5F           { align1 1Q };
add(8)          g83<1>F         g83<8,8,1>F     -g81<8,8,1>F    { align1 1Q compacted };
add(8)          g55<1>F         g77<8,8,1>F     -g82<8,8,1>F    { align1 1Q compacted };
mul(8)          g54<1>F         g59<8,8,1>F     32F             { align1 1Q };
mul(8)          g88<1>F         g53<8,8,1>F     32F             { align1 1Q };
cmp.ge.f0(8)    g92<1>F         g91<8,8,1>F     0.5F            { align1 1Q };
mad(8)          g64<1>F         g54<4,4,1>F     g68.3<0,1,0>F   g83<4,4,1>F { align16 1Q };
mad(8)          g67<1>F         g88<4,4,1>F     g68.3<0,1,0>F   g55<4,4,1>F { align16 1Q };
and(8)          g93<1>UD        g92<8,8,1>UD    g75<8,8,1>UD    { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g93<8,8,1>UD    g117<8,8,1>UD   { align1 1Q compacted };
(+f0) if(8)     JIP: 120        UIP: 208                        { align1 1Q };
   END B91 ->B92 ->B93
   START B92 <-B91 (232 cycles)
mul(8)          g43<1>F         g64<8,8,1>F     0.00012207F     { align1 1Q };
mul(8)          g44<1>F         g67<8,8,1>F     0.00012207F     { align1 1Q };
mov(8)          g45<1>F         g52<8,8,1>UD                    { align1 1Q compacted };
send(8)         g43<1>UW        g43<0,1,0>F
                            sampler sample_lz SIMD8 Surface = 2 Sampler = 1 mlen 3 rlen 4 { align1 1Q };
mov(8)          g31<1>F         g43<8,8,1>F                     { align1 1Q compacted };
mov(8)          g32<1>F         g44<8,8,1>F                     { align1 1Q compacted };
mov(8)          g33<1>F         g45<8,8,1>F                     { align1 1Q compacted };
mov(8)          g34<1>F         g46<8,8,1>F                     { align1 1Q compacted };
else(8)         JIP: 104        UIP: 104                        { align1 1Q };
   END B92 ->B94
   START B93 <-B91 (230 cycles)
mul(8)          g43<1>F         g64<8,8,1>F     0.00012207F     { align1 1Q };
mul(8)          g44<1>F         g67<8,8,1>F     0.00012207F     { align1 1Q };
mov(8)          g45<1>F         g52<8,8,1>UD                    { align1 1Q compacted };
send(8)         g43<1>UW        g43<0,1,0>F
                            sampler sample_lz SIMD8 Surface = 3 Sampler = 2 mlen 3 rlen 4 { align1 1Q };
mov(8)          g31<1>F         g43<8,8,1>F                     { align1 1Q compacted };
mov(8)          g32<1>F         g44<8,8,1>F                     { align1 1Q compacted };
mov(8)          g33<1>F         g45<8,8,1>F                     { align1 1Q compacted };
mov(8)          g34<1>F         g46<8,8,1>F                     { align1 1Q compacted };
   END B93 ->B94
   START B94 <-B93 <-B92 (248 cycles)
endif(8)        JIP: 1552                                       { align1 1Q };
mul(8)          g94<1>F         g71<8,8,1>F     0.25F           { align1 1Q };
mov(8)          g51<1>D         g71<8,8,1>F                     { align1 1Q compacted };
mov(8)          g50<1>F         g2<8,8,1>F                      { align1 1Q compacted };
mov(8)          g52<1>F         g8.7<0,1,0>F                    { align1 1Q };
mov(8)          g54<1>UD        0x00000001UD                    { align1 1Q compacted };
mov(8)          g53<1>D         g71<8,8,1>D                     { align1 1Q compacted };
rndd(8)         g95<1>F         g94<8,8,1>F                     { align1 1Q compacted };
send(8)         g43<1>UW        g50<0,1,0>F
                            sampler ld_lz SIMD8 Surface = 4 Sampler = 3 mlen 3 rlen 4 { align1 1Q };
mad(8)          g96<1>F         g71<4,4,1>F     g95<4,4,1>F     -g5.7<0,1,0>F { align16 1Q };
mul(8)          g97<1>F         g96<8,8,1>F     g26.7<0,1,0>F   { align1 1Q compacted };
mul(8)          g98<1>F         g97<8,8,1>F     0.03125F        { align1 1Q };
rndd(8)         g99<1>F         g98<8,8,1>F                     { align1 1Q compacted };
mad(8)          g100<1>F        g97<4,4,1>F     g99<4,4,1>F     -g68.3<0,1,0>F { align16 1Q };
add(8)          g60<1>F         -g100<8,8,1>F   31F             { align1 1Q };
mov(8)          g88<1>UD        g43<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g64<1>UD        g44<8,8,1>UD                    { align1 1Q compacted };
shl(8)          g103<1>D        g46<8,8,1>D     0x00000008UD    { align1 1Q };
add(8)          g4<1>D          g45<8,8,1>D     g103<8,8,1>D    { align1 1Q compacted };
   END B94 ->B95
   START B96 <-B95 <-B97 (18 cycles)
cmp.ge.f0(8)    null<1>UD       g54<8,8,1>UD    g9.3<0,1,0>UD   { align1 1Q compacted };
   END B95 ->B96 ->B98
(+f0) break(8)  JIP: 208        UIP: 208                        { align1 1Q };
   END B96 ->B95 ->B97
   START B97 <-B96 (300 cycles)
rndd(8)         g104<1>F        g72<8,8,1>F                     { align1 1Q compacted };
rndd(8)         g47<1>F         g53<8,8,1>F                     { align1 1Q compacted };
mov(8)          g108<1>F        g88<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g109<1>F        g64<8,8,1>UD                    { align1 1Q compacted };
add(8)          g54<1>D         g54<8,8,1>D     1D              { align1 1Q compacted };
add(8)          g58<1>F         g72<8,8,1>F     -g104<8,8,1>F   { align1 1Q compacted };
add(8)          g107<1>F        g53<8,8,1>F     -g47<8,8,1>F    { align1 1Q compacted };
mul(8)          g110<1>F        g108<8,8,1>F    4F              { align1 1Q };
mul(8)          g111<1>F        g109<8,8,1>F    4F              { align1 1Q };
mad(8)          g72<1>F         g110<4,4,1>F    g5.7<0,1,0>F    g58<4,4,1>F { align16 1Q };
mad(8)          g53<1>F         g111<4,4,1>F    g5.7<0,1,0>F    g107<4,4,1>F { align16 1Q };
mov(8)          g2<1>D          g72<8,8,1>F                     { align1 1Q compacted };
mov(8)          g3<1>D          g53<8,8,1>F                     { align1 1Q compacted };
send(8)         g43<1>UW        g2<0,1,0>F
                            sampler ld_lz SIMD8 Surface = 4 Sampler = 3 mlen 3 rlen 4 { align1 1Q };
mov(8)          g88<1>UD        g43<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g64<1>UD        g44<8,8,1>UD                    { align1 1Q compacted };
shl(8)          g112<1>D        g46<8,8,1>D     0x00000008UD    { align1 1Q };
add(8)          g4<1>D          g45<8,8,1>D     g112<8,8,1>D    { align1 1Q compacted };
while(8)        JIP: -216                                       { align1 1Q };
   END B97 ->B96
   START B98 <-B95 (74 cycles)
rndd(8)         g113<1>F        g72<8,8,1>F                     { align1 1Q compacted };
rndd(8)         g114<1>F        g53<8,8,1>F                     { align1 1Q compacted };
mov(8)          g117<1>F        g88<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g118<1>F        g64<8,8,1>UD                    { align1 1Q compacted };
sel.l(8)        g123<1>F        g62<8,8,1>F     g60<8,8,1>F     { align1 1Q compacted };
add(8)          g115<1>F        g72<8,8,1>F     -g113<8,8,1>F   { align1 1Q compacted };
add(8)          g61<1>F         g53<8,8,1>F     -g114<8,8,1>F   { align1 1Q compacted };
mul(8)          g119<1>F        g117<8,8,1>F    32F             { align1 1Q };
mul(8)          g120<1>F        g118<8,8,1>F    32F             { align1 1Q };
cmp.ge.f0(8)    g124<1>F        g123<8,8,1>F    0.5F            { align1 1Q };
cmp.le.f0(8)    g126<1>F        -g100<8,8,1>F   -0.5F           { align1 1Q };
mad(8)          g121<1>F        g119<4,4,1>F    g68.3<0,1,0>F   g115<4,4,1>F { align16 1Q };
mad(8)          g122<1>F        g120<4,4,1>F    g68.3<0,1,0>F   g61<4,4,1>F { align16 1Q };
and(8)          g125<1>UD       g124<8,8,1>UD   g76<8,8,1>UD    { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g125<8,8,1>UD   g126<8,8,1>UD   { align1 1Q compacted };
(+f0) if(8)     JIP: 120        UIP: 208                        { align1 1Q };
   END B98 ->B99 ->B100
   START B99 <-B98 (232 cycles)
mul(8)          g43<1>F         g121<8,8,1>F    0.00012207F     { align1 1Q };
mul(8)          g44<1>F         g122<8,8,1>F    0.00012207F     { align1 1Q };
mov(8)          g45<1>F         g4<8,8,1>UD                     { align1 1Q compacted };
send(8)         g43<1>UW        g43<0,1,0>F
                            sampler sample_lz SIMD8 Surface = 2 Sampler = 1 mlen 3 rlen 4 { align1 1Q };
mov(8)          g35<1>F         g43<8,8,1>F                     { align1 1Q compacted };
mov(8)          g36<1>F         g44<8,8,1>F                     { align1 1Q compacted };
mov(8)          g37<1>F         g45<8,8,1>F                     { align1 1Q compacted };
mov(8)          g38<1>F         g46<8,8,1>F                     { align1 1Q compacted };
else(8)         JIP: 104        UIP: 104                        { align1 1Q };
   END B99 ->B101
   START B100 <-B98 (230 cycles)
mul(8)          g43<1>F         g121<8,8,1>F    0.00012207F     { align1 1Q };
mul(8)          g44<1>F         g122<8,8,1>F    0.00012207F     { align1 1Q };
mov(8)          g45<1>F         g4<8,8,1>UD                     { align1 1Q compacted };
send(8)         g43<1>UW        g43<0,1,0>F
                            sampler sample_lz SIMD8 Surface = 3 Sampler = 2 mlen 3 rlen 4 { align1 1Q };
mov(8)          g35<1>F         g43<8,8,1>F                     { align1 1Q compacted };
mov(8)          g36<1>F         g44<8,8,1>F                     { align1 1Q compacted };
mov(8)          g37<1>F         g45<8,8,1>F                     { align1 1Q compacted };
mov(8)          g38<1>F         g46<8,8,1>F                     { align1 1Q compacted };
   END B100 ->B101
   START B101 <-B100 <-B99 (246 cycles)
endif(8)        JIP: 720                                        { align1 1Q };
mov(8)          g2<1>F          g12<8,8,1>F                     { align1 1Q compacted };
mov(8)          g3<1>F          g51<8,8,1>F                     { align1 1Q compacted };
mov(8)          g4<1>F          g8.7<0,1,0>F                    { align1 1Q };
mov(8)          g64<1>UD        0x00000001UD                    { align1 1Q compacted };
send(8)         g43<1>UW        g2<0,1,0>F
                            sampler ld_lz SIMD8 Surface = 4 Sampler = 3 mlen 3 rlen 4 { align1 1Q };
mov(8)          g91<1>UD        g43<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g92<1>UD        g44<8,8,1>UD                    { align1 1Q compacted };
shl(8)          g127<1>D        g46<8,8,1>D     0x00000008UD    { align1 1Q };
add(8)          g4<1>D          g45<8,8,1>D     g127<8,8,1>D    { align1 1Q compacted };
   END B101 ->B102
   START B103 <-B102 <-B104 (18 cycles)
cmp.ge.f0(8)    null<1>UD       g64<8,8,1>UD    g9.3<0,1,0>UD   { align1 1Q compacted };
   END B102 ->B103 ->B105
(+f0) break(8)  JIP: 208        UIP: 208                        { align1 1Q };
   END B103 ->B102 ->B104
   START B104 <-B103 (300 cycles)
rndd(8)         g12<1>F         g49<8,8,1>F                     { align1 1Q compacted };
rndd(8)         g13<1>F         g71<8,8,1>F                     { align1 1Q compacted };
mov(8)          g43<1>F         g91<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g44<1>F         g92<8,8,1>UD                    { align1 1Q compacted };
add(8)          g64<1>D         g64<8,8,1>D     1D              { align1 1Q compacted };
add(8)          g14<1>F         g49<8,8,1>F     -g12<8,8,1>F    { align1 1Q compacted };
add(8)          g26<1>F         g71<8,8,1>F     -g13<8,8,1>F    { align1 1Q compacted };
mul(8)          g45<1>F         g43<8,8,1>F     4F              { align1 1Q };
mul(8)          g46<1>F         g44<8,8,1>F     4F              { align1 1Q };
mad(8)          g49<1>F         g45<4,4,1>F     g5.7<0,1,0>F    g14<4,4,1>F { align16 1Q };
mad(8)          g71<1>F         g46<4,4,1>F     g5.7<0,1,0>F    g26<4,4,1>F { align16 1Q };
mov(8)          g2<1>D          g49<8,8,1>F                     { align1 1Q compacted };
mov(8)          g3<1>D          g71<8,8,1>F                     { align1 1Q compacted };
send(8)         g43<1>UW        g2<0,1,0>F
                            sampler ld_lz SIMD8 Surface = 4 Sampler = 3 mlen 3 rlen 4 { align1 1Q };
mov(8)          g91<1>UD        g43<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g92<1>UD        g44<8,8,1>UD                    { align1 1Q compacted };
shl(8)          g50<1>D         g46<8,8,1>D     0x00000008UD    { align1 1Q };
add(8)          g4<1>D          g45<8,8,1>D     g50<8,8,1>D     { align1 1Q compacted };
while(8)        JIP: -216                                       { align1 1Q };
   END B104 ->B103
   START B105 <-B102 (74 cycles)
rndd(8)         g51<1>F         g49<8,8,1>F                     { align1 1Q compacted };
rndd(8)         g52<1>F         g71<8,8,1>F                     { align1 1Q compacted };
mov(8)          g72<1>F         g91<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g62<1>F         g92<8,8,1>UD                    { align1 1Q compacted };
sel.l(8)        g57<1>F         g73<8,8,1>F     g60<8,8,1>F     { align1 1Q compacted };
add(8)          g49<1>F         g49<8,8,1>F     -g51<8,8,1>F    { align1 1Q compacted };
add(8)          g71<1>F         g71<8,8,1>F     -g52<8,8,1>F    { align1 1Q compacted };
mul(8)          g76<1>F         g72<8,8,1>F     32F             { align1 1Q };
mul(8)          g77<1>F         g62<8,8,1>F     32F             { align1 1Q };
cmp.ge.f0(8)    g81<1>F         g57<8,8,1>F     0.5F            { align1 1Q };
mad(8)          g65<1>F         g76<4,4,1>F     g68.3<0,1,0>F   g49<4,4,1>F { align16 1Q };
mad(8)          g79<1>F         g77<4,4,1>F     g68.3<0,1,0>F   g71<4,4,1>F { align16 1Q };
and(8)          g82<1>UD        g81<8,8,1>UD    g75<8,8,1>UD    { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g82<8,8,1>UD    g126<8,8,1>UD   { align1 1Q compacted };
(+f0) if(8)     JIP: 120        UIP: 208                        { align1 1Q };
   END B105 ->B106 ->B107
   START B106 <-B105 (232 cycles)
mul(8)          g12<1>F         g65<8,8,1>F     0.00012207F     { align1 1Q };
mul(8)          g13<1>F         g79<8,8,1>F     0.00012207F     { align1 1Q };
mov(8)          g14<1>F         g4<8,8,1>UD                     { align1 1Q compacted };
send(8)         g43<1>UW        g12<0,1,0>F
                            sampler sample_lz SIMD8 Surface = 2 Sampler = 1 mlen 3 rlen 4 { align1 1Q };
mov(8)          g39<1>F         g43<8,8,1>F                     { align1 1Q compacted };
mov(8)          g40<1>F         g44<8,8,1>F                     { align1 1Q compacted };
mov(8)          g41<1>F         g45<8,8,1>F                     { align1 1Q compacted };
mov(8)          g42<1>F         g46<8,8,1>F                     { align1 1Q compacted };
else(8)         JIP: 104        UIP: 104                        { align1 1Q };
   END B106 ->B108
   START B107 <-B105 (230 cycles)
mul(8)          g12<1>F         g65<8,8,1>F     0.00012207F     { align1 1Q };
mul(8)          g13<1>F         g79<8,8,1>F     0.00012207F     { align1 1Q };
mov(8)          g14<1>F         g4<8,8,1>UD                     { align1 1Q compacted };
send(8)         g43<1>UW        g12<0,1,0>F
                            sampler sample_lz SIMD8 Surface = 3 Sampler = 2 mlen 3 rlen 4 { align1 1Q };
mov(8)          g39<1>F         g43<8,8,1>F                     { align1 1Q compacted };
mov(8)          g40<1>F         g44<8,8,1>F                     { align1 1Q compacted };
mov(8)          g41<1>F         g45<8,8,1>F                     { align1 1Q compacted };
mov(8)          g42<1>F         g46<8,8,1>F                     { align1 1Q compacted };
   END B107 ->B108
   START B108 <-B107 <-B106 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B108 ->B109
   START B109 <-B108 <-B79 (58 cycles)
endif(8)        JIP: 144                                        { align1 1Q };
lrp(8)          g83<1>F         g25<4,4,1>F     g31<4,4,1>F     g27<4,4,1>F { align16 1Q compacted };
lrp(8)          g55<1>F         g25<4,4,1>F     g32<4,4,1>F     g28<4,4,1>F { align16 1Q compacted };
lrp(8)          g59<1>F         g25<4,4,1>F     g33<4,4,1>F     g29<4,4,1>F { align16 1Q compacted };
lrp(8)          g53<1>F         g25<4,4,1>F     g34<4,4,1>F     g30<4,4,1>F { align16 1Q compacted };
lrp(8)          g54<1>F         g25<4,4,1>F     g39<4,4,1>F     g35<4,4,1>F { align16 1Q compacted };
lrp(8)          g88<1>F         g25<4,4,1>F     g40<4,4,1>F     g36<4,4,1>F { align16 1Q compacted };
lrp(8)          g64<1>F         g25<4,4,1>F     g41<4,4,1>F     g37<4,4,1>F { align16 1Q compacted };
lrp(8)          g67<1>F         g25<4,4,1>F     g42<4,4,1>F     g38<4,4,1>F { align16 1Q compacted };
lrp(8)          g91<1>F         g69<4,4,1>F     g54<4,4,1>F     g83<4,4,1>F { align16 1Q compacted };
lrp(8)          g92<1>F         g69<4,4,1>F     g88<4,4,1>F     g55<4,4,1>F { align16 1Q compacted };
lrp(8)          g93<1>F         g69<4,4,1>F     g64<4,4,1>F     g59<4,4,1>F { align16 1Q compacted };
lrp(8)          g94<1>F         g69<4,4,1>F     g67<4,4,1>F     g53<4,4,1>F { align16 1Q compacted };
mov(8)          g18<1>UD        g91<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g19<1>UD        g92<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g20<1>UD        g93<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g21<1>UD        g94<8,8,1>UD                    { align1 1Q compacted };
   END B109 ->B110
   START B110 <-B109 <-B73 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B110 ->B111
   START B111 <-B110 <-B64 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 1440       UIP: 1440                       { align1 1Q };
   END B111 ->B122
   START B112 <-B58 (18 cycles)
cmp.nz.f0(8)    null<1>D        g66<8,8,1>D     1D              { align1 1Q compacted };
(+f0) if(8)     JIP: 1336       UIP: 1400                       { align1 1Q };
   END B112 ->B113 ->B120
   START B113 <-B112 (22 cycles)
add(8)          g95<1>F         g48<8,8,1>F     g24.3<0,1,0>F   { align1 1Q compacted };
add(8)          g96<1>F         g78<8,8,1>F     g24.7<0,1,0>F   { align1 1Q compacted };
cmp.z.f0(8)     null<1>D        g90<8,8,1>D     1D              { align1 1Q compacted };
(+f0) if(8)     JIP: 160        UIP: 1264                       { align1 1Q };
   END B113 ->B114 ->B115
   START B114 <-B113 (328 cycles)
rndd(8)         g97<1>F         -g15<8,8,1>F                    { align1 1Q compacted };
mov(8)          g4<1>D          -g97<8,8,1>F                    { align1 1Q compacted };
shl(8)          g98<1>D         g84<8,8,1>D     g4<8,8,1>UD     { align1 1Q };
mov(8)          g99<1>F         g98<8,8,1>D                     { align1 1Q compacted };
math inv(8)     g100<1>F        g99<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mul(8)          g60<1>F         g95<8,8,1>F     g100<8,8,1>F    { align1 1Q compacted };
mul(8)          g56<1>F         g96<8,8,1>F     g100<8,8,1>F    { align1 1Q compacted };
mov(8)          g2<1>D          g60<8,8,1>F                     { align1 1Q compacted };
mov(8)          g3<1>D          g56<8,8,1>F                     { align1 1Q compacted };
send(8)         g24<1>UW        g2<0,1,0>F
                            sampler ld SIMD8 Surface = 5 Sampler = 4 mlen 3 rlen 4 { align1 1Q };
mov(8)          g18<1>F         g24<8,8,1>F                     { align1 1Q compacted };
mov(8)          g19<1>F         g25<8,8,1>F                     { align1 1Q compacted };
mov(8)          g20<1>F         g26<8,8,1>F                     { align1 1Q compacted };
mov(8)          g21<1>F         g27<8,8,1>F                     { align1 1Q compacted };
else(8)         JIP: 1120       UIP: 1120                       { align1 1Q };
   END B114 ->B119
   START B115 <-B113 (36 cycles)
cmp.g.f0(8)     g104<1>F        g15<8,8,1>F     0.5F            { align1 1Q };
cmp.z.f0(8)     g47<1>D         g90<8,8,1>D     2D              { align1 1Q compacted };
or.nz.f0(8)     null<1>UD       g47<8,8,1>UD    g104<8,8,1>UD   { align1 1Q compacted };
(+f0) if(8)     JIP: 152        UIP: 1056                       { align1 1Q };
   END B115 ->B116 ->B117
   START B116 <-B115 (382 cycles)
mov(8)          g2<1>F          [0F, 0F, 0F, 0F]VF              { align1 1Q compacted };
send(8)         g2<1>UW         g2<0,1,0>F
                            sampler resinfo SIMD8 Surface = 5 Sampler = 4 mlen 1 rlen 2 { align1 1Q };
mov(8)          g58<1>F         g2<8,8,1>D                      { align1 1Q compacted };
mov(8)          g107<1>F        g3<8,8,1>D                      { align1 1Q compacted };
math inv(8)     g108<1>F        g58<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
math inv(8)     g109<1>F        g107<8,8,1>F    null<8,8,1>F    { align1 1Q compacted };
mul(8)          g16<1>F         g95<8,8,1>F     g108<8,8,1>F    { align1 1Q compacted };
mul(8)          g17<1>F         g96<8,8,1>F     g109<8,8,1>F    { align1 1Q compacted };
send(8)         g12<1>UW        g15<0,1,0>F
                            sampler sample_l SIMD8 Surface = 5 Sampler = 4 mlen 3 rlen 4 { align1 1Q };
mov(8)          g18<1>F         g12<8,8,1>F                     { align1 1Q compacted };
mov(8)          g19<1>F         g13<8,8,1>F                     { align1 1Q compacted };
mov(8)          g20<1>F         g14<8,8,1>F                     { align1 1Q compacted };
mov(8)          g21<1>F         g15<8,8,1>F                     { align1 1Q compacted };
else(8)         JIP: 920        UIP: 920                        { align1 1Q };
   END B116 ->B118
   START B117 <-B115 (540 cycles)
add(8)          g2<1>F          g95<8,8,1>F     -0.5F           { align1 1Q };
add(8)          g3<1>F          g96<8,8,1>F     -0.5F           { align1 1Q };
mov(8)          g13<1>F         [0F, 0F, 0F, 0F]VF              { align1 1Q compacted };
frc(8)          g4<1>F          g2<8,8,1>F                      { align1 1Q compacted };
frc(8)          g12<1>F         g3<8,8,1>F                      { align1 1Q compacted };
send(8)         g24<1>UW        g13<0,1,0>F
                            sampler resinfo SIMD8 Surface = 5 Sampler = 4 mlen 1 rlen 2 { align1 1Q };
add(8)          g13<1>F         g2<8,8,1>F      -g4<8,8,1>F     { align1 1Q compacted };
mul(8)          g15<1>F         g4<8,8,1>F      g4<8,8,1>F      { align1 1Q compacted };
add(8)          g17<1>F         -g4<8,8,1>F     1F              { align1 1Q };
add(8)          g14<1>F         g3<8,8,1>F      -g12<8,8,1>F    { align1 1Q compacted };
mul(8)          g32<1>F         g12<8,8,1>F     g12<8,8,1>F     { align1 1Q compacted };
add(8)          g34<1>F         -g12<8,8,1>F    1F              { align1 1Q };
add(8)          g48<1>F         g13<8,8,1>F     -0.5F           { align1 1Q };
add(8)          g66<1>F         g13<8,8,1>F     1.5F            { align1 1Q };
mul(8)          g16<1>F         g15<8,8,1>F     g4<8,8,1>F      { align1 1Q compacted };
add(8)          g69<1>F         g14<8,8,1>F     -0.5F           { align1 1Q };
add(8)          g71<1>F         g14<8,8,1>F     1.5F            { align1 1Q };
mul(8)          g33<1>F         g32<8,8,1>F     g12<8,8,1>F     { align1 1Q compacted };
mul(8)          g35<1>F         g34<8,8,1>F     g34<8,8,1>F     { align1 1Q compacted };
mad(8)          g26<1>F         g5.7<0,1,0>F    g16<4,4,1>F     g68.0<0,1,0>F { align16 1Q };
mul(8)          g31<1>F         g16<8,8,1>F     0.166667F       { align1 1Q };
mad(8)          g37<1>F         g5.7<0,1,0>F    g33<4,4,1>F     g68.0<0,1,0>F { align16 1Q };
mul(8)          g42<1>F         g33<8,8,1>F     0.166667F       { align1 1Q };
mul(8)          g36<1>F         g35<8,8,1>F     g34<8,8,1>F     { align1 1Q compacted };
mad(8)          g27<1>F         g26<4,4,1>F     g15<4,4,1>F     -g68.1<0,1,0>F { align16 1Q };
mad(8)          g39<1>F         g5.7<0,1,0>F    g36<4,4,1>F     g68.0<0,1,0>F { align16 1Q };
mad(8)          g38<1>F         g37<4,4,1>F     g32<4,4,1>F     -g68.1<0,1,0>F { align16 1Q };
mul(8)          g30<1>F         g27<8,8,1>F     0.166667F       { align1 1Q };
mad(8)          g40<1>F         g39<4,4,1>F     g35<4,4,1>F     -g68.1<0,1,0>F { align16 1Q };
mul(8)          g41<1>F         g38<8,8,1>F     0.166667F       { align1 1Q };
mov(8)          g73<1>F         g24<8,8,1>D                     { align1 1Q compacted };
mov(8)          g62<1>F         g25<8,8,1>D                     { align1 1Q compacted };
mul(8)          g24<1>F         g17<8,8,1>F     g17<8,8,1>F     { align1 1Q compacted };
mad(8)          g45<1>F         g41<4,4,1>F     g68.2<0,1,0>F   g36<4,4,1>F { align16 1Q };
mad(8)          g46<1>F         g42<4,4,1>F     g68.2<0,1,0>F   g40<4,4,1>F { align16 1Q };
math inv(8)     g75<1>F         g73<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
math inv(8)     g76<1>F         g62<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mul(8)          g25<1>F         g24<8,8,1>F     g17<8,8,1>F     { align1 1Q compacted };
math inv(8)     g52<1>F         g45<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
math inv(8)     g84<1>F         g46<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
add(8)          g57<1>F         g45<8,8,1>F     g46<8,8,1>F     { align1 1Q compacted };
mad(8)          g28<1>F         g5.7<0,1,0>F    g25<4,4,1>F     g68.0<0,1,0>F { align16 1Q };
mad(8)          g43<1>F         g30<4,4,1>F     g68.2<0,1,0>F   g25<4,4,1>F { align16 1Q };
mad(8)          g49<1>F         g69<4,4,1>F     g52<4,4,1>F     g41<4,4,1>F { align16 1Q compacted };
math inv(8)     g81<1>F         g57<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mad(8)          g72<1>F         g71<4,4,1>F     g84<4,4,1>F     g42<4,4,1>F { align16 1Q compacted };
mad(8)          g29<1>F         g28<4,4,1>F     g24<4,4,1>F     -g68.1<0,1,0>F { align16 1Q };
math inv(8)     g50<1>F         g43<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mul(8)          g82<1>F         g46<8,8,1>F     g81<8,8,1>F     { align1 1Q compacted };
mul(8)          g3<1>F          g49<8,8,1>F     g75<8,8,1>F     { align1 1Q compacted };
mul(8)          g25<1>F         g72<8,8,1>F     g76<8,8,1>F     { align1 1Q compacted };
mad(8)          g78<1>F         g48<4,4,1>F     g50<4,4,1>F     g30<4,4,1>F { align16 1Q compacted };
mad(8)          g44<1>F         g31<4,4,1>F     g68.2<0,1,0>F   g29<4,4,1>F { align16 1Q };
mov(8)          g17<1>F         g3<8,8,1>F                      { align1 1Q compacted };
mov(8)          g33<1>F         g25<8,8,1>F                     { align1 1Q compacted };
mul(8)          g2<1>F          g78<8,8,1>F     g75<8,8,1>F     { align1 1Q compacted };
math inv(8)     g51<1>F         g44<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
add(8)          g77<1>F         g43<8,8,1>F     g44<8,8,1>F     { align1 1Q compacted };
mov(8)          g24<1>F         g2<8,8,1>F                      { align1 1Q compacted };
send(8)         g12<1>UW        g2<0,1,0>F
                            sampler sample_lz SIMD8 Surface = 5 Sampler = 4 mlen 2 rlen 4 { align1 1Q };
math inv(8)     g65<1>F         g77<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mad(8)          g90<1>F         g66<4,4,1>F     g51<4,4,1>F     g31<4,4,1>F { align16 1Q compacted };
send(8)         g28<1>UW        g24<0,1,0>F
                            sampler sample_lz SIMD8 Surface = 5 Sampler = 4 mlen 2 rlen 4 { align1 1Q };
mul(8)          g79<1>F         g44<8,8,1>F     g65<8,8,1>F     { align1 1Q compacted };
mul(8)          g16<1>F         g90<8,8,1>F     g76<8,8,1>F     { align1 1Q compacted };
mov(8)          g32<1>F         g16<8,8,1>F                     { align1 1Q compacted };
send(8)         g24<1>UW        g16<0,1,0>F
                            sampler sample_lz SIMD8 Surface = 5 Sampler = 4 mlen 2 rlen 4 { align1 1Q };
send(8)         g32<1>UW        g32<0,1,0>F
                            sampler sample_lz SIMD8 Surface = 5 Sampler = 4 mlen 2 rlen 4 { align1 1Q };
lrp(8)          g55<1>F         g79<4,4,1>F     g24<4,4,1>F     g12<4,4,1>F { align16 1Q compacted };
lrp(8)          g59<1>F         g79<4,4,1>F     g25<4,4,1>F     g13<4,4,1>F { align16 1Q compacted };
lrp(8)          g53<1>F         g79<4,4,1>F     g26<4,4,1>F     g14<4,4,1>F { align16 1Q compacted };
lrp(8)          g54<1>F         g79<4,4,1>F     g27<4,4,1>F     g15<4,4,1>F { align16 1Q compacted };
lrp(8)          g64<1>F         g79<4,4,1>F     g32<4,4,1>F     g28<4,4,1>F { align16 1Q compacted };
lrp(8)          g67<1>F         g79<4,4,1>F     g33<4,4,1>F     g29<4,4,1>F { align16 1Q compacted };
lrp(8)          g91<1>F         g79<4,4,1>F     g34<4,4,1>F     g30<4,4,1>F { align16 1Q compacted };
lrp(8)          g92<1>F         g79<4,4,1>F     g35<4,4,1>F     g31<4,4,1>F { align16 1Q compacted };
lrp(8)          g93<1>F         g82<4,4,1>F     g64<4,4,1>F     g55<4,4,1>F { align16 1Q compacted };
lrp(8)          g94<1>F         g82<4,4,1>F     g67<4,4,1>F     g59<4,4,1>F { align16 1Q compacted };
lrp(8)          g95<1>F         g82<4,4,1>F     g91<4,4,1>F     g53<4,4,1>F { align16 1Q compacted };
lrp(8)          g96<1>F         g82<4,4,1>F     g92<4,4,1>F     g54<4,4,1>F { align16 1Q compacted };
mov(8)          g18<1>UD        g93<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g19<1>UD        g94<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g20<1>UD        g95<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g21<1>UD        g96<8,8,1>UD                    { align1 1Q compacted };
   END B117 ->B118
   START B118 <-B117 <-B116 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B118 ->B119
   START B119 <-B118 <-B114 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 80         UIP: 80                         { align1 1Q };
   END B119 ->B121
   START B120 <-B112 (8 cycles)
mov(8)          g18<1>D         1065353216D                     { align1 1Q };
mov(8)          g19<1>D         1065353216D                     { align1 1Q };
mov(8)          g20<1>D         1065353216D                     { align1 1Q };
mov(8)          g21<1>D         1065353216D                     { align1 1Q };
   END B120 ->B121
   START B121 <-B120 <-B119 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B121 ->B122
   START B122 <-B121 <-B111 (20 cycles)
endif(8)        JIP: 144                                        { align1 1Q };
and.z.f0(8)     null<1>UD       g11.7<0,1,0>UD  0x01000000UD    { align1 1Q };
(+f0) if(8)     JIP: 64         UIP: 64                         { align1 1Q };
   END B122 ->B123 ->B124
   START B123 <-B122 (22 cycles)
mul(8)          g97<1>F         g18<8,8,1>F     g21<8,8,1>F     { align1 1Q compacted };
mul(8)          g98<1>F         g19<8,8,1>F     g21<8,8,1>F     { align1 1Q compacted };
mul(8)          g99<1>F         g20<8,8,1>F     g21<8,8,1>F     { align1 1Q compacted };
mov(8)          g18<1>UD        g97<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g19<1>UD        g98<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g20<1>UD        g99<8,8,1>UD                    { align1 1Q compacted };
   END B123 ->B124
   START B124 <-B122 <-B123 (10 cycles)
endif(8)        JIP: 48                                         { align1 1Q };
mul(8)          g63<1>F         g63<8,8,1>F     g18<8,8,1>F     { align1 1Q compacted };
mul(8)          g86<1>F         g86<8,8,1>F     g19<8,8,1>F     { align1 1Q compacted };
mul(8)          g23<1>F         g23<8,8,1>F     g20<8,8,1>F     { align1 1Q compacted };
mul(8)          g22<1>F         g22<8,8,1>F     g21<8,8,1>F     { align1 1Q compacted };
   END B124 ->B125
   START B125 <-B54 <-B124 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B125 ->B126
   START B126 <-B1 <-B125 (38 cycles)
endif(8)        JIP: 13824                                      { align1 1Q };
cmp.l.f0(8)     g100<1>UD       g9.7<0,1,0>UD   0x00000006UD    { align1 1Q };
cmp.ge.f0(8)    g60<1>UD        g9.7<0,1,0>UD   0x00000002UD    { align1 1Q };
and.nz.f0(8)    null<1>UD       g60<8,8,1>UD    g100<8,8,1>UD   { align1 1Q compacted };
(+f0) if(8)     JIP: 152        UIP: 13720                      { align1 1Q };
   END B126 ->B127 ->B128
   START B127 <-B126 (280 cycles)
add(8)          g56<1>F         g106<8,8,1>F    0.5F            { align1 1Q };
add(8)          g103<1>F        g85<8,8,1>F     0.5F            { align1 1Q };
mov(8)          g47<1>D         g56<8,8,1>F                     { align1 1Q compacted };
mad(8)          g104<1>F        g6.1<0,1,0>F    g6.0<0,1,0>F    g103<4,4,1>F { align16 1Q };
add(8)          g33<1>D         g47<8,8,1>D     g101<8,8,1>D    { align1 1Q compacted };
mov(8)          g58<1>D         g104<8,8,1>F                    { align1 1Q compacted };
add(8)          g34<1>D         g58<8,8,1>D     g116<8,8,1>D    { align1 1Q compacted };
send(8)         g19<1>UW        g33<0,1,0>F
                            sampler ld_lz SIMD8 Surface = 13 Sampler = 12 mlen 2 rlen 1 { align1 1Q };
mov(8)          g20<1>D         g19<8,8,1>D                     { align1 1Q compacted };
mov(8)          g17<1>D         g19<8,8,1>D                     { align1 1Q compacted };
mov(8)          g18<1>D         g19<8,8,1>D                     { align1 1Q compacted };
else(8)         JIP: 13584      UIP: 13584                      { align1 1Q };
   END B127 ->B362
   START B128 <-B126 (36 cycles)
cmp.l.f0(8)     g107<1>UD       g9.7<0,1,0>UD   0x0000000eUD    { align1 1Q };
cmp.ge.f0(8)    g108<1>UD       g9.7<0,1,0>UD   0x0000000aUD    { align1 1Q };
and.nz.f0(8)    null<1>UD       g108<8,8,1>UD   g107<8,8,1>UD   { align1 1Q compacted };
(+f0) if(8)     JIP: 160        UIP: 13512                      { align1 1Q };
   END B128 ->B129 ->B130
   START B129 <-B128 (282 cycles)
add(8)          g109<1>F        g106<8,8,1>F    0.5F            { align1 1Q };
add(8)          g110<1>F        g85<8,8,1>F     0.5F            { align1 1Q };
mov(8)          g112<1>D        g109<8,8,1>F                    { align1 1Q compacted };
mad(8)          g111<1>F        g6.1<0,1,0>F    g6.0<0,1,0>F    g110<4,4,1>F { align16 1Q };
add(8)          g34<1>D         g112<8,8,1>D    g101<8,8,1>D    { align1 1Q compacted };
mov(8)          g113<1>D        g111<8,8,1>F                    { align1 1Q compacted };
add(8)          g35<1>D         g113<8,8,1>D    g116<8,8,1>D    { align1 1Q compacted };
send(8)         g2<1>UW         g34<0,1,0>F
                            sampler ld_lz SIMD8 Surface = 13 Sampler = 12 mlen 2 rlen 1 { align1 1Q };
mov(8)          g20<1>D         g2<8,8,1>D                      { align1 1Q compacted };
mov(8)          g17<1>D         g2<8,8,1>D                      { align1 1Q compacted };
mov(8)          g18<1>D         g2<8,8,1>D                      { align1 1Q compacted };
mov(8)          g19<1>D         g2<8,8,1>D                      { align1 1Q compacted };
else(8)         JIP: 13368      UIP: 13368                      { align1 1Q };
   END B129 ->B361
   START B130 <-B128 (18 cycles)
cmp.nz.f0(8)    null<1>D        g9.7<0,1,0>D    1D              { align1 1Q };
(+f0) if(8)     JIP: 13256      UIP: 13320                      { align1 1Q };
   END B130 ->B131 ->B359
   START B131 <-B130 (18 cycles)
cmp.nz.f0(8)    null<1>D        g9.7<0,1,0>D    18D             { align1 1Q };
(+f0) if(8)     JIP: 13128      UIP: 13192                      { align1 1Q };
   END B131 ->B132 ->B357
   START B132 <-B131 (18 cycles)
cmp.z.f0(8)     null<1>D        g9.7<0,1,0>D    19D             { align1 1Q };
(+f0) if(8)     JIP: 160        UIP: 13064                      { align1 1Q };
   END B132 ->B133 ->B134
   START B133 <-B132 (282 cycles)
add(8)          g114<1>F        g106<8,8,1>F    0.5F            { align1 1Q };
add(8)          g115<1>F        g85<8,8,1>F     0.5F            { align1 1Q };
mov(8)          g117<1>D        g114<8,8,1>F                    { align1 1Q compacted };
mad(8)          g61<1>F         g6.1<0,1,0>F    g6.0<0,1,0>F    g115<4,4,1>F { align16 1Q };
add(8)          g35<1>D         g117<8,8,1>D    g101<8,8,1>D    { align1 1Q compacted };
mov(8)          g118<1>D        g61<8,8,1>F                     { align1 1Q compacted };
add(8)          g36<1>D         g118<8,8,1>D    g116<8,8,1>D    { align1 1Q compacted };
send(8)         g3<1>UW         g35<0,1,0>F
                            sampler ld_lz SIMD8 Surface = 13 Sampler = 12 mlen 2 rlen 1 { align1 1Q };
mov(8)          g20<1>D         g3<8,8,1>D                      { align1 1Q compacted };
mov(8)          g17<1>D         g3<8,8,1>D                      { align1 1Q compacted };
mov(8)          g18<1>D         g3<8,8,1>D                      { align1 1Q compacted };
mov(8)          g19<1>D         g3<8,8,1>D                      { align1 1Q compacted };
else(8)         JIP: 12920      UIP: 12920                      { align1 1Q };
   END B133 ->B356
   START B134 <-B132 (18 cycles)
cmp.z.f0(8)     null<1>D        g9.7<0,1,0>D    20D             { align1 1Q };
(+f0) if(8)     JIP: 1584       UIP: 12872                      { align1 1Q };
   END B134 ->B135 ->B160
   START B135 <-B134 (90 cycles)
mov(8)          g119<1>UD       g87<8,8,1>F                     { align1 1Q compacted };
mov(8)          g120<1>UD       g70<8,8,1>F                     { align1 1Q compacted };
add(8)          g121<1>F        g105<8,8,1>F    0.5F            { align1 1Q };
add(8)          g122<1>F        g89<8,8,1>F     0.5F            { align1 1Q };
mov(8)          g123<1>D        g121<8,8,1>F                    { align1 1Q compacted };
mov(8)          g124<1>D        g122<8,8,1>F                    { align1 1Q compacted };
add(8)          g125<1>D        g123<8,8,1>D    -1D             { align1 1Q compacted };
mov(8)          g127<1>F        g123<8,8,1>D                    { align1 1Q compacted };
add(8)          g126<1>D        g124<8,8,1>D    -1D             { align1 1Q compacted };
mov(8)          g2<1>F          g124<8,8,1>D                    { align1 1Q compacted };
add(8)          g3<1>F          g121<8,8,1>F    -g127<8,8,1>F   { align1 1Q compacted };
sel.l(8)        g11<1>D         g125<8,8,1>D    g126<8,8,1>D    { align1 1Q compacted };
add(8)          g4<1>F          g122<8,8,1>F    -g2<8,8,1>F     { align1 1Q compacted };
cmp.ge.f0(8)    null<1>D        g11<8,8,1>D     0D              { align1 1Q compacted };
(+f0) if(8)     JIP: 296        UIP: 304                        { align1 1Q };
   END B135 ->B136 ->B140
   START B136 <-B135 (36 cycles)
cmp.ge.f0(8)    g12<1>UD        g126<8,8,1>UD   g120<8,8,1>UD   { align1 1Q compacted };
cmp.ge.f0(8)    g13<1>UD        g125<8,8,1>UD   g119<8,8,1>UD   { align1 1Q compacted };
or.nz.f0(8)     null<1>UD       g13<8,8,1>UD    g12<8,8,1>UD    { align1 1Q compacted };
(+f0) if(8)     JIP: 40         UIP: 224                        { align1 1Q };
   END B136 ->B137 ->B138
   START B137 <-B136 (4 cycles)
mov(8)          g67<1>UD        0x00000000UD                    { align1 1Q compacted };
else(8)         JIP: 200        UIP: 200                        { align1 1Q };
   END B137 ->B139
   START B138 <-B136 (704 cycles)
shr(8)          g14<1>UD        g125<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
shr(8)          g16<1>UD        g126<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
add(8)          g21<1>D         g119<8,8,1>D    1D              { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g125<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
add(8)          g15<1>D         g7.3<0,1,0>D    g14<8,8,1>D     { align1 1Q compacted };
shr(8)          g24<1>UD        g21<8,8,1>UD    0x00000001UD    { align1 1Q compacted };
(-f0) sel(8)    g28<1>UD        g74<8,8,1>UD    0x00000008UD    { align1 1Q };
mul(8)          g25<1>D         g16<8,8,1>D     g24<8,8,1>D     { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g126<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
add(8)          g26<1>D         g15<8,8,1>D     g25<8,8,1>D     { align1 1Q compacted };
(-f0) sel(8)    g29<1>UD        g74<8,8,1>UD    0x00000010UD    { align1 1Q };
shl(8)          g2<1>D          g26<8,8,1>D     0x00000002UD    { align1 1Q };
add(8)          g30<1>D         g28<8,8,1>D     g29<8,8,1>D     { align1 1Q compacted };
send(8)         g27<1>UW        g2<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
add(8)          g31<1>D         -g30<8,8,1>D    24D             { align1 1Q compacted };
shl(8)          g32<1>D         g27<8,8,1>D     g31<8,8,1>UD    { align1 1Q };
mov(8)          g67<1>UD        g32.3<32,8,4>UB                 { align1 1Q };
   END B138 ->B139
   START B139 <-B138 <-B137 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B139 ->B141
   START B140 <-B135 (2 cycles)
mov(8)          g67<1>UD        0x00000000UD                    { align1 1Q compacted };
   END B140 ->B141
   START B141 <-B140 <-B139 (36 cycles)
endif(8)        JIP: 1120                                       { align1 1Q };
sel.l(8)        g33<1>D         g125<8,8,1>D    g124<8,8,1>D    { align1 1Q compacted };
cmp.ge.f0(8)    null<1>D        g33<8,8,1>D     0D              { align1 1Q compacted };
(+f0) if(8)     JIP: 296        UIP: 304                        { align1 1Q };
   END B141 ->B142 ->B146
   START B142 <-B141 (36 cycles)
cmp.ge.f0(8)    g34<1>UD        g124<8,8,1>UD   g120<8,8,1>UD   { align1 1Q compacted };
cmp.ge.f0(8)    g35<1>UD        g125<8,8,1>UD   g119<8,8,1>UD   { align1 1Q compacted };
or.nz.f0(8)     null<1>UD       g35<8,8,1>UD    g34<8,8,1>UD    { align1 1Q compacted };
(+f0) if(8)     JIP: 40         UIP: 224                        { align1 1Q };
   END B142 ->B143 ->B144
   START B143 <-B142 (4 cycles)
mov(8)          g91<1>UD        0x00000000UD                    { align1 1Q compacted };
else(8)         JIP: 200        UIP: 200                        { align1 1Q };
   END B143 ->B145
   START B144 <-B142 (704 cycles)
shr(8)          g36<1>UD        g125<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
shr(8)          g38<1>UD        g124<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
add(8)          g39<1>D         g119<8,8,1>D    1D              { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g125<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
add(8)          g37<1>D         g7.3<0,1,0>D    g36<8,8,1>D     { align1 1Q compacted };
shr(8)          g40<1>UD        g39<8,8,1>UD    0x00000001UD    { align1 1Q compacted };
(-f0) sel(8)    g44<1>UD        g74<8,8,1>UD    0x00000008UD    { align1 1Q };
mul(8)          g41<1>D         g38<8,8,1>D     g40<8,8,1>D     { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g124<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
add(8)          g42<1>D         g37<8,8,1>D     g41<8,8,1>D     { align1 1Q compacted };
(-f0) sel(8)    g45<1>UD        g74<8,8,1>UD    0x00000010UD    { align1 1Q };
shl(8)          g11<1>D         g42<8,8,1>D     0x00000002UD    { align1 1Q };
add(8)          g46<1>D         g44<8,8,1>D     g45<8,8,1>D     { align1 1Q compacted };
send(8)         g43<1>UW        g11<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
add(8)          g50<1>D         -g46<8,8,1>D    24D             { align1 1Q compacted };
shl(8)          g51<1>D         g43<8,8,1>D     g50<8,8,1>UD    { align1 1Q };
mov(8)          g91<1>UD        g51.3<32,8,4>UB                 { align1 1Q };
   END B144 ->B145
   START B145 <-B144 <-B143 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B145 ->B147
   START B146 <-B141 (2 cycles)
mov(8)          g91<1>UD        0x00000000UD                    { align1 1Q compacted };
   END B146 ->B147
   START B147 <-B146 <-B145 (36 cycles)
endif(8)        JIP: 784                                        { align1 1Q };
sel.l(8)        g52<1>D         g123<8,8,1>D    g126<8,8,1>D    { align1 1Q compacted };
cmp.ge.f0(8)    null<1>D        g52<8,8,1>D     0D              { align1 1Q compacted };
(+f0) if(8)     JIP: 296        UIP: 304                        { align1 1Q };
   END B147 ->B148 ->B152
   START B148 <-B147 (36 cycles)
cmp.ge.f0(8)    g84<1>UD        g126<8,8,1>UD   g120<8,8,1>UD   { align1 1Q compacted };
cmp.ge.f0(8)    g106<1>UD       g123<8,8,1>UD   g119<8,8,1>UD   { align1 1Q compacted };
or.nz.f0(8)     null<1>UD       g106<8,8,1>UD   g84<8,8,1>UD    { align1 1Q compacted };
(+f0) if(8)     JIP: 40         UIP: 224                        { align1 1Q };
   END B148 ->B149 ->B150
   START B149 <-B148 (4 cycles)
mov(8)          g92<1>UD        0x00000000UD                    { align1 1Q compacted };
else(8)         JIP: 200        UIP: 200                        { align1 1Q };
   END B149 ->B151
   START B150 <-B148 (704 cycles)
shr(8)          g85<1>UD        g123<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
shr(8)          g116<1>UD       g126<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
add(8)          g48<1>D         g119<8,8,1>D    1D              { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g123<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
add(8)          g101<1>D        g7.3<0,1,0>D    g85<8,8,1>D     { align1 1Q compacted };
shr(8)          g78<1>UD        g48<8,8,1>UD    0x00000001UD    { align1 1Q compacted };
(-f0) sel(8)    g49<1>UD        g74<8,8,1>UD    0x00000008UD    { align1 1Q };
mul(8)          g66<1>D         g116<8,8,1>D    g78<8,8,1>D     { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g126<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
add(8)          g90<1>D         g101<8,8,1>D    g66<8,8,1>D     { align1 1Q compacted };
(-f0) sel(8)    g71<1>UD        g74<8,8,1>UD    0x00000010UD    { align1 1Q };
shl(8)          g12<1>D         g90<8,8,1>D     0x00000002UD    { align1 1Q };
add(8)          g72<1>D         g49<8,8,1>D     g71<8,8,1>D     { align1 1Q compacted };
send(8)         g69<1>UW        g12<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
add(8)          g73<1>D         -g72<8,8,1>D    24D             { align1 1Q compacted };
shl(8)          g62<1>D         g69<8,8,1>D     g73<8,8,1>UD    { align1 1Q };
mov(8)          g92<1>UD        g62.3<32,8,4>UB                 { align1 1Q };
   END B150 ->B151
   START B151 <-B150 <-B149 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B151 ->B153
   START B152 <-B147 (2 cycles)
mov(8)          g92<1>UD        0x00000000UD                    { align1 1Q compacted };
   END B152 ->B153
   START B153 <-B152 <-B151 (36 cycles)
endif(8)        JIP: 448                                        { align1 1Q };
sel.l(8)        g75<1>D         g123<8,8,1>D    g124<8,8,1>D    { align1 1Q compacted };
cmp.ge.f0(8)    null<1>D        g75<8,8,1>D     0D              { align1 1Q compacted };
(+f0) if(8)     JIP: 296        UIP: 304                        { align1 1Q };
   END B153 ->B154 ->B158
   START B154 <-B153 (36 cycles)
cmp.ge.f0(8)    g76<1>UD        g124<8,8,1>UD   g120<8,8,1>UD   { align1 1Q compacted };
cmp.ge.f0(8)    g77<1>UD        g123<8,8,1>UD   g119<8,8,1>UD   { align1 1Q compacted };
or.nz.f0(8)     null<1>UD       g77<8,8,1>UD    g76<8,8,1>UD    { align1 1Q compacted };
(+f0) if(8)     JIP: 40         UIP: 224                        { align1 1Q };
   END B154 ->B155 ->B156
   START B155 <-B154 (4 cycles)
mov(8)          g93<1>UD        0x00000000UD                    { align1 1Q compacted };
else(8)         JIP: 200        UIP: 200                        { align1 1Q };
   END B155 ->B157
   START B156 <-B154 (704 cycles)
shr(8)          g65<1>UD        g123<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
shr(8)          g57<1>UD        g124<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
add(8)          g81<1>D         g119<8,8,1>D    1D              { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g123<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
add(8)          g79<1>D         g7.3<0,1,0>D    g65<8,8,1>D     { align1 1Q compacted };
shr(8)          g82<1>UD        g81<8,8,1>UD    0x00000001UD    { align1 1Q compacted };
(-f0) sel(8)    g53<1>UD        g74<8,8,1>UD    0x00000008UD    { align1 1Q };
mul(8)          g83<1>D         g57<8,8,1>D     g82<8,8,1>D     { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g124<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
add(8)          g55<1>D         g79<8,8,1>D     g83<8,8,1>D     { align1 1Q compacted };
(-f0) sel(8)    g54<1>UD        g74<8,8,1>UD    0x00000010UD    { align1 1Q };
shl(8)          g13<1>D         g55<8,8,1>D     0x00000002UD    { align1 1Q };
add(8)          g88<1>D         g53<8,8,1>D     g54<8,8,1>D     { align1 1Q compacted };
send(8)         g59<1>UW        g13<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
add(8)          g64<1>D         -g88<8,8,1>D    24D             { align1 1Q compacted };
shl(8)          g94<1>D         g59<8,8,1>D     g64<8,8,1>UD    { align1 1Q };
mov(8)          g93<1>UD        g94.3<32,8,4>UB                 { align1 1Q };
   END B156 ->B157
   START B157 <-B156 <-B155 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B157 ->B159
   START B158 <-B153 (2 cycles)
mov(8)          g93<1>UD        0x00000000UD                    { align1 1Q compacted };
   END B158 ->B159
   START B159 <-B158 <-B157 (80 cycles)
endif(8)        JIP: 112                                        { align1 1Q };
mov(8)          g95<1>F         g67<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g96<1>F         g91<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g98<1>F         g92<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g99<1>F         g93<8,8,1>UD                    { align1 1Q compacted };
lrp(8)          g97<1>F         g4<4,4,1>F      g96<4,4,1>F     g95<4,4,1>F { align16 1Q compacted };
lrp(8)          g100<1>F        g4<4,4,1>F      g99<4,4,1>F     g98<4,4,1>F { align16 1Q compacted };
lrp(8)          g60<1>F         g3<4,4,1>F      g100<4,4,1>F    g97<4,4,1>F { align16 1Q compacted };
mul(8)          g20<1>F         g60<8,8,1>F     0.00392157F     { align1 1Q };
mov(8)          g17<1>D         g20<8,8,1>D                     { align1 1Q compacted };
mov(8)          g18<1>D         g20<8,8,1>D                     { align1 1Q compacted };
mov(8)          g19<1>D         g20<8,8,1>D                     { align1 1Q compacted };
else(8)         JIP: 11304      UIP: 11304                      { align1 1Q };
   END B159 ->B355
   START B160 <-B134 (18 cycles)
cmp.z.f0(8)     null<1>D        g9.7<0,1,0>D    21D             { align1 1Q };
mov(1)          g68.5<1>F       1F                              { align1 WE_all 1N };
(+f0) if(8)     JIP: 1664       UIP: 11240                      { align1 1Q };
   END B160 ->B161 ->B186
   START B161 <-B160 (90 cycles)
mov(8)          g56<1>UD        g87<8,8,1>F                     { align1 1Q compacted };
mov(8)          g103<1>UD       g70<8,8,1>F                     { align1 1Q compacted };
add(8)          g104<1>F        g105<8,8,1>F    0.5F            { align1 1Q };
add(8)          g47<1>F         g89<8,8,1>F     0.5F            { align1 1Q };
mov(8)          g58<1>D         g104<8,8,1>F                    { align1 1Q compacted };
mov(8)          g107<1>D        g47<8,8,1>F                     { align1 1Q compacted };
add(8)          g108<1>D        g58<8,8,1>D     -1D             { align1 1Q compacted };
mov(8)          g110<1>F        g58<8,8,1>D                     { align1 1Q compacted };
add(8)          g109<1>D        g107<8,8,1>D    -1D             { align1 1Q compacted };
mov(8)          g111<1>F        g107<8,8,1>D                    { align1 1Q compacted };
add(8)          g112<1>F        g104<8,8,1>F    -g110<8,8,1>F   { align1 1Q compacted };
sel.l(8)        g114<1>D        g108<8,8,1>D    g109<8,8,1>D    { align1 1Q compacted };
add(8)          g113<1>F        g47<8,8,1>F     -g111<8,8,1>F   { align1 1Q compacted };
cmp.ge.f0(8)    null<1>D        g114<8,8,1>D    0D              { align1 1Q compacted };
(+f0) if(8)     JIP: 296        UIP: 304                        { align1 1Q };
   END B161 ->B162 ->B166
   START B162 <-B161 (36 cycles)
cmp.ge.f0(8)    g115<1>UD       g109<8,8,1>UD   g103<8,8,1>UD   { align1 1Q compacted };
cmp.ge.f0(8)    g61<1>UD        g108<8,8,1>UD   g56<8,8,1>UD    { align1 1Q compacted };
or.nz.f0(8)     null<1>UD       g61<8,8,1>UD    g115<8,8,1>UD   { align1 1Q compacted };
(+f0) if(8)     JIP: 40         UIP: 224                        { align1 1Q };
   END B162 ->B163 ->B164
   START B163 <-B162 (4 cycles)
mov(8)          g94<1>UD        0x00000000UD                    { align1 1Q compacted };
else(8)         JIP: 200        UIP: 200                        { align1 1Q };
   END B163 ->B165
   START B164 <-B162 (704 cycles)
shr(8)          g117<1>UD       g108<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
shr(8)          g119<1>UD       g109<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
add(8)          g120<1>D        g56<8,8,1>D     1D              { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g108<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
add(8)          g118<1>D        g7.3<0,1,0>D    g117<8,8,1>D    { align1 1Q compacted };
shr(8)          g121<1>UD       g120<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
(-f0) sel(8)    g125<1>UD       g74<8,8,1>UD    0x00000008UD    { align1 1Q };
mul(8)          g122<1>D        g119<8,8,1>D    g121<8,8,1>D    { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g109<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
add(8)          g123<1>D        g118<8,8,1>D    g122<8,8,1>D    { align1 1Q compacted };
(-f0) sel(8)    g126<1>UD       g74<8,8,1>UD    0x00000010UD    { align1 1Q };
shl(8)          g14<1>D         g123<8,8,1>D    0x00000002UD    { align1 1Q };
add(8)          g127<1>D        g125<8,8,1>D    g126<8,8,1>D    { align1 1Q compacted };
send(8)         g124<1>UW       g14<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
add(8)          g2<1>D          -g127<8,8,1>D   24D             { align1 1Q compacted };
shl(8)          g3<1>D          g124<8,8,1>D    g2<8,8,1>UD     { align1 1Q };
mov(8)          g94<1>UD        g3.3<32,8,4>UB                  { align1 1Q };
   END B164 ->B165
   START B165 <-B164 <-B163 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B165 ->B167
   START B166 <-B161 (2 cycles)
mov(8)          g94<1>UD        0x00000000UD                    { align1 1Q compacted };
   END B166 ->B167
   START B167 <-B166 <-B165 (36 cycles)
endif(8)        JIP: 1200                                       { align1 1Q };
sel.l(8)        g4<1>D          g108<8,8,1>D    g107<8,8,1>D    { align1 1Q compacted };
cmp.ge.f0(8)    null<1>D        g4<8,8,1>D      0D              { align1 1Q compacted };
(+f0) if(8)     JIP: 296        UIP: 304                        { align1 1Q };
   END B167 ->B168 ->B172
   START B168 <-B167 (36 cycles)
cmp.ge.f0(8)    g11<1>UD        g107<8,8,1>UD   g103<8,8,1>UD   { align1 1Q compacted };
cmp.ge.f0(8)    g12<1>UD        g108<8,8,1>UD   g56<8,8,1>UD    { align1 1Q compacted };
or.nz.f0(8)     null<1>UD       g12<8,8,1>UD    g11<8,8,1>UD    { align1 1Q compacted };
(+f0) if(8)     JIP: 40         UIP: 224                        { align1 1Q };
   END B168 ->B169 ->B170
   START B169 <-B168 (4 cycles)
mov(8)          g95<1>UD        0x00000000UD                    { align1 1Q compacted };
else(8)         JIP: 200        UIP: 200                        { align1 1Q };
   END B169 ->B171
   START B170 <-B168 (704 cycles)
shr(8)          g13<1>UD        g108<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
shr(8)          g15<1>UD        g107<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
add(8)          g16<1>D         g56<8,8,1>D     1D              { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g108<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
add(8)          g14<1>D         g7.3<0,1,0>D    g13<8,8,1>D     { align1 1Q compacted };
shr(8)          g21<1>UD        g16<8,8,1>UD    0x00000001UD    { align1 1Q compacted };
(-f0) sel(8)    g27<1>UD        g74<8,8,1>UD    0x00000008UD    { align1 1Q };
mul(8)          g24<1>D         g15<8,8,1>D     g21<8,8,1>D     { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g107<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
add(8)          g25<1>D         g14<8,8,1>D     g24<8,8,1>D     { align1 1Q compacted };
(-f0) sel(8)    g28<1>UD        g74<8,8,1>UD    0x00000010UD    { align1 1Q };
shl(8)          g15<1>D         g25<8,8,1>D     0x00000002UD    { align1 1Q };
add(8)          g29<1>D         g27<8,8,1>D     g28<8,8,1>D     { align1 1Q compacted };
send(8)         g26<1>UW        g15<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
add(8)          g30<1>D         -g29<8,8,1>D    24D             { align1 1Q compacted };
shl(8)          g31<1>D         g26<8,8,1>D     g30<8,8,1>UD    { align1 1Q };
mov(8)          g95<1>UD        g31.3<32,8,4>UB                 { align1 1Q };
   END B170 ->B171
   START B171 <-B170 <-B169 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B171 ->B173
   START B172 <-B167 (2 cycles)
mov(8)          g95<1>UD        0x00000000UD                    { align1 1Q compacted };
   END B172 ->B173
   START B173 <-B172 <-B171 (36 cycles)
endif(8)        JIP: 864                                        { align1 1Q };
sel.l(8)        g32<1>D         g58<8,8,1>D     g109<8,8,1>D    { align1 1Q compacted };
cmp.ge.f0(8)    null<1>D        g32<8,8,1>D     0D              { align1 1Q compacted };
(+f0) if(8)     JIP: 296        UIP: 304                        { align1 1Q };
   END B173 ->B174 ->B178
   START B174 <-B173 (36 cycles)
cmp.ge.f0(8)    g33<1>UD        g109<8,8,1>UD   g103<8,8,1>UD   { align1 1Q compacted };
cmp.ge.f0(8)    g34<1>UD        g58<8,8,1>UD    g56<8,8,1>UD    { align1 1Q compacted };
or.nz.f0(8)     null<1>UD       g34<8,8,1>UD    g33<8,8,1>UD    { align1 1Q compacted };
(+f0) if(8)     JIP: 40         UIP: 224                        { align1 1Q };
   END B174 ->B175 ->B176
   START B175 <-B174 (4 cycles)
mov(8)          g96<1>UD        0x00000000UD                    { align1 1Q compacted };
else(8)         JIP: 200        UIP: 200                        { align1 1Q };
   END B175 ->B177
   START B176 <-B174 (704 cycles)
shr(8)          g35<1>UD        g58<8,8,1>UD    0x00000001UD    { align1 1Q compacted };
shr(8)          g37<1>UD        g109<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
add(8)          g38<1>D         g56<8,8,1>D     1D              { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g58<8,8,1>UD    0x00000001UD    { align1 1Q compacted };
add(8)          g36<1>D         g7.3<0,1,0>D    g35<8,8,1>D     { align1 1Q compacted };
shr(8)          g39<1>UD        g38<8,8,1>UD    0x00000001UD    { align1 1Q compacted };
(-f0) sel(8)    g43<1>UD        g74<8,8,1>UD    0x00000008UD    { align1 1Q };
mul(8)          g40<1>D         g37<8,8,1>D     g39<8,8,1>D     { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g109<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
add(8)          g41<1>D         g36<8,8,1>D     g40<8,8,1>D     { align1 1Q compacted };
(-f0) sel(8)    g44<1>UD        g74<8,8,1>UD    0x00000010UD    { align1 1Q };
shl(8)          g16<1>D         g41<8,8,1>D     0x00000002UD    { align1 1Q };
add(8)          g45<1>D         g43<8,8,1>D     g44<8,8,1>D     { align1 1Q compacted };
send(8)         g42<1>UW        g16<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
add(8)          g46<1>D         -g45<8,8,1>D    24D             { align1 1Q compacted };
shl(8)          g70<1>D         g42<8,8,1>D     g46<8,8,1>UD    { align1 1Q };
mov(8)          g96<1>UD        g70.3<32,8,4>UB                 { align1 1Q };
   END B176 ->B177
   START B177 <-B176 <-B175 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B177 ->B179
   START B178 <-B173 (2 cycles)
mov(8)          g96<1>UD        0x00000000UD                    { align1 1Q compacted };
   END B178 ->B179
   START B179 <-B178 <-B177 (36 cycles)
endif(8)        JIP: 528                                        { align1 1Q };
sel.l(8)        g50<1>D         g58<8,8,1>D     g107<8,8,1>D    { align1 1Q compacted };
cmp.ge.f0(8)    null<1>D        g50<8,8,1>D     0D              { align1 1Q compacted };
(+f0) if(8)     JIP: 296        UIP: 304                        { align1 1Q };
   END B179 ->B180 ->B184
   START B180 <-B179 (36 cycles)
cmp.ge.f0(8)    g51<1>UD        g107<8,8,1>UD   g103<8,8,1>UD   { align1 1Q compacted };
cmp.ge.f0(8)    g52<1>UD        g58<8,8,1>UD    g56<8,8,1>UD    { align1 1Q compacted };
or.nz.f0(8)     null<1>UD       g52<8,8,1>UD    g51<8,8,1>UD    { align1 1Q compacted };
(+f0) if(8)     JIP: 40         UIP: 224                        { align1 1Q };
   END B180 ->B181 ->B182
   START B181 <-B180 (4 cycles)
mov(8)          g97<1>UD        0x00000000UD                    { align1 1Q compacted };
else(8)         JIP: 200        UIP: 200                        { align1 1Q };
   END B181 ->B183
   START B182 <-B180 (704 cycles)
shr(8)          g87<1>UD        g58<8,8,1>UD    0x00000001UD    { align1 1Q compacted };
shr(8)          g106<1>UD       g107<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
add(8)          g85<1>D         g56<8,8,1>D     1D              { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g58<8,8,1>UD    0x00000001UD    { align1 1Q compacted };
add(8)          g84<1>D         g7.3<0,1,0>D    g87<8,8,1>D     { align1 1Q compacted };
shr(8)          g101<1>UD       g85<8,8,1>UD    0x00000001UD    { align1 1Q compacted };
(-f0) sel(8)    g66<1>UD        g74<8,8,1>UD    0x00000008UD    { align1 1Q };
mul(8)          g116<1>D        g106<8,8,1>D    g101<8,8,1>D    { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g107<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
add(8)          g48<1>D         g84<8,8,1>D     g116<8,8,1>D    { align1 1Q compacted };
(-f0) sel(8)    g90<1>UD        g74<8,8,1>UD    0x00000010UD    { align1 1Q };
shl(8)          g21<1>D         g48<8,8,1>D     0x00000002UD    { align1 1Q };
add(8)          g69<1>D         g66<8,8,1>D     g90<8,8,1>D     { align1 1Q compacted };
send(8)         g78<1>UW        g21<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
add(8)          g49<1>D         -g69<8,8,1>D    24D             { align1 1Q compacted };
shl(8)          g71<1>D         g78<8,8,1>D     g49<8,8,1>UD    { align1 1Q };
mov(8)          g97<1>UD        g71.3<32,8,4>UB                 { align1 1Q };
   END B182 ->B183
   START B183 <-B182 <-B181 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B183 ->B185
   START B184 <-B179 (2 cycles)
mov(8)          g97<1>UD        0x00000000UD                    { align1 1Q compacted };
   END B184 ->B185
   START B185 <-B184 <-B183 (192 cycles)
endif(8)        JIP: 192                                        { align1 1Q };
mov(8)          g72<1>F         g94<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g73<1>F         g95<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g75<1>F         g96<8,8,1>UD                    { align1 1Q compacted };
mov(8)          g76<1>F         g97<8,8,1>UD                    { align1 1Q compacted };
mov(1)          g68.6<1>F       0.00784314F                     { align1 WE_all 1N };
lrp(8)          g62<1>F         g113<4,4,1>F    g73<4,4,1>F     g72<4,4,1>F { align16 1Q compacted };
lrp(8)          g77<1>F         g113<4,4,1>F    g76<4,4,1>F     g75<4,4,1>F { align16 1Q compacted };
lrp(8)          g65<1>F         g112<4,4,1>F    g77<4,4,1>F     g62<4,4,1>F { align16 1Q compacted };
mad(8)          g79<1>F         -g68.5<0,1,0>F  g65<4,4,1>F     g68.6<0,1,0>F { align16 1Q };
add(8)          g57<1>F         g79.1<4,4,0>F   -g79<4,4,0>F    { align1 1Q compacted };
mul(8)          g81<1>F         g79<8,8,1>F     g6<0,1,0>F      { align1 1Q compacted };
add(8)          g82<1>F         -g81<4,4,0>F    g81.2<4,4,0>F   { align1 1Q compacted };
mul(8)          g83<1>F         g82<8,8,1>F     g82<8,8,1>F     { align1 1Q compacted };
mad(8)          g55<1>F         g83<4,4,1>F     g57<4,4,1>F     g57<4,4,1>F { align16 1Q compacted };
math rsq(8)     g59<1>F         g55<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mad.sat(8)      g20<1>F         g5.0<0,1,0>F    g59<4,4,1>F     g79<4,4,1>F { align16 1Q };
mov(8)          g17<1>D         g20<8,8,1>D                     { align1 1Q compacted };
mov(8)          g18<1>D         g20<8,8,1>D                     { align1 1Q compacted };
mov(8)          g19<1>D         g20<8,8,1>D                     { align1 1Q compacted };
else(8)         JIP: 9592       UIP: 9592                       { align1 1Q };
   END B185 ->B354
   START B186 <-B160 (18 cycles)
cmp.z.f0(8)     null<1>D        g9.7<0,1,0>D    22D             { align1 1Q };
(+f0) if(8)     JIP: 6032       UIP: 9544                       { align1 1Q };
   END B186 ->B187 ->B297
   START B187 <-B186 (38 cycles)
and(8)          g98<1>UD        g7.3<0,1,0>UD   0x3fffffffUD    { align1 1Q };
add(8)          g53<1>F         g105.1<4,4,0>F  -g105<4,4,0>F   { align1 1Q compacted };
add(8)          g54<1>F         g89.1<4,4,0>F   -g89<4,4,0>F    { align1 1Q compacted };
mul(8)          g88<1>F         g105<8,8,1>F    g6<0,1,0>F      { align1 1Q compacted };
mul(8)          g67<1>F         g89<8,8,1>F     g6<0,1,0>F      { align1 1Q compacted };
and(8)          g92<1>UD        g7.3<0,1,0>UD   0x80000000UD    { align1 1Q };
mov(8)          g104<1>D        -989855744D                     { align1 1Q };
mov(8)          g103<1>D        -989855744D                     { align1 1Q };
mov(8)          g56<1>D         1157627904D                     { align1 1Q };
mov(8)          g60<1>D         1157627904D                     { align1 1Q };
shl(8)          g24<1>D         g98<8,8,1>D     0x00000002UD    { align1 1Q };
mov(8)          g100<1>D        g98<8,8,1>D                     { align1 1Q compacted };
add(8)          g64<1>F         -g88<4,4,0>F    g88.2<4,4,0>F   { align1 1Q compacted };
add(8)          g91<1>F         -g67<4,4,0>F    g67.2<4,4,0>F   { align1 1Q compacted };
cmp.nz.f0(8)    g93<1>D         g92<8,8,1>D     0D              { align1 1Q compacted };
send(8)         g99<1>UW        g24<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
   END B187 ->B188
   START B189 <-B188 <-B193 (18 cycles)
and.z.f0(8)     null<1>UD       g99<8,8,1>UD    0x00000001UD    { align1 1Q compacted };
   END B188 ->B189 ->B194
(+f0) break(8)  JIP: 288        UIP: 288                        { align1 1Q };
   END B189 ->B188 ->B190
   START B190 <-B189 (34 cycles)
shl(8)          g94<1>D         g99<8,8,1>D     0x0000001eUD    { align1 1Q };
shr.z.f0(8)     null<1>UD       g94<8,8,1>UD    0x0000001fUD    { align1 1Q compacted };
(+f0) if(8)     JIP: 80         UIP: 128                        { align1 1Q };
   END B190 ->B191 ->B192
   START B191 <-B190 (54 cycles)
add(8)          g95<1>F         g103<8,8,1>F    g60<8,8,1>F     { align1 1Q compacted };
mul(8)          g96<1>F         g95<8,8,1>F     0.5F            { align1 1Q };
cmp.l.f0(8)     g47<1>F         g96<8,8,1>F     g105<8,8,1>F    { align1 1Q compacted };
(+f0) sel(8)    g103<1>UD       g96<8,8,1>UD    g103<8,8,1>UD   { align1 1Q compacted };
(+f0) sel(8)    g60<1>UD        g60<8,8,1>UD    g96<8,8,1>UD    { align1 1Q compacted };
else(8)         JIP: 64         UIP: 64                         { align1 1Q };
   END B191 ->B193
   START B192 <-B190 (52 cycles)
add(8)          g97<1>F         g104<8,8,1>F    g56<8,8,1>F     { align1 1Q compacted };
mul(8)          g58<1>F         g97<8,8,1>F     0.5F            { align1 1Q };
cmp.l.f0(8)     g47<1>F         g58<8,8,1>F     g89<8,8,1>F     { align1 1Q compacted };
(+f0) sel(8)    g104<1>UD       g58<8,8,1>UD    g104<8,8,1>UD   { align1 1Q compacted };
(+f0) sel(8)    g56<1>UD        g56<8,8,1>UD    g58<8,8,1>UD    { align1 1Q compacted };
   END B192 ->B193
   START B193 <-B192 <-B191 (720 cycles)
endif(8)        JIP: 120                                        { align1 1Q };
cmp.nz.f0(8)    null<1>D        g47<8,8,1>D     0D              { align1 1Q compacted };
(-f0) sel(8)    g107<1>UD       g102<8,8,1>UD   0x00000011UD    { align1 1Q };
add(8)          g108<1>D        -g107<8,8,1>D   17D             { align1 1Q compacted };
shl(8)          g109<1>D        g99<8,8,1>D     g108<8,8,1>UD   { align1 1Q };
shr(8)          g110<1>UD       g109<8,8,1>UD   0x00000011UD    { align1 1Q compacted };
add(8)          g100<1>D        g110<8,8,1>D    g98<8,8,1>D     { align1 1Q compacted };
shl(8)          g25<1>D         g100<8,8,1>D    0x00000002UD    { align1 1Q };
send(8)         g111<1>UW       g25<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
mov(8)          g99<1>F         g111<8,8,1>F                    { align1 1Q compacted };
while(8)        JIP: -296                                       { align1 1Q };
   END B193 ->B189
   START B194 <-B188 (942 cycles)
shl(8)          g112<1>D        g99<8,8,1>D     0x0000000fUD    { align1 1Q };
shr(8)          g27<1>UD        g99<8,8,1>UD    0x00000011UD    { align1 1Q compacted };
add(8)          g28<1>D         g100<8,8,1>D    1D              { align1 1Q compacted };
mul(8)          g41<1>F         g91<8,8,1>F     g91<8,8,1>F     { align1 1Q compacted };
mul(8)          g43<1>F         g64<8,8,1>F     g91<8,8,1>F     { align1 1Q compacted };
mul(8)          g45<1>F         g64<8,8,1>F     g64<8,8,1>F     { align1 1Q compacted };
mov(8)          g110<1>D        1123024896D                     { align1 1Q };
mov(8)          g109<1>D        1123024896D                     { align1 1Q };
mov(8)          g108<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g113<1>UD       g112.1<16,8,2>UW                { align1 1Q };
shl(8)          g26<1>D         g28<8,8,1>D     0x00000002UD    { align1 1Q };
mad(8)          g42<1>F         g41<4,4,1>F     g54<4,4,1>F     g54<4,4,1>F { align16 1Q compacted };
mad(8)          g44<1>F         g43<4,4,1>F     g54<4,4,1>F     g53<4,4,1>F { align16 1Q compacted };
mad(8)          g46<1>F         g45<4,4,1>F     g53<4,4,1>F     g53<4,4,1>F { align16 1Q compacted };
add(8)          g107<1>D        g113<8,8,1>D    g98<8,8,1>D     { align1 1Q compacted };
send(8)         g29<1>UW        g26<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
shl(8)          g30<1>D         g29<8,8,1>D     0x00000008UD    { align1 1Q };
mov(8)          g32<1>F         g29.3<32,8,4>UB                 { align1 1Q };
shl(8)          g35<1>D         g29<8,8,1>D     0x00000010UD    { align1 1Q };
mov(8)          g31<1>F         g30.3<32,8,4>UB                 { align1 1Q };
mul(8)          g34<1>F         g32<8,8,1>F     0.00390625F     { align1 1Q };
mov(8)          g36<1>UD        g35.1<16,8,2>UW                 { align1 1Q };
mul(8)          g33<1>F         g31<8,8,1>F     0.00390625F     { align1 1Q };
lrp(8)          g38<1>F         g34<4,4,1>F     g56<4,4,1>F     g104<4,4,1>F { align16 1Q compacted };
add(8)          g58<1>D         g36<8,8,1>D     -32768D         { align1 1Q };
lrp(8)          g37<1>F         g33<4,4,1>F     g60<4,4,1>F     g103<4,4,1>F { align16 1Q compacted };
add(8)          g40<1>F         g38<8,8,1>F     -g89<8,8,1>F    { align1 1Q compacted };
add(8)          g39<1>F         g37<8,8,1>F     -g105<8,8,1>F   { align1 1Q compacted };
mul(8)          g70<1>F         g44<8,8,1>F     g40<8,8,1>F     { align1 1Q compacted };
mul(8)          g51<1>F         g46<8,8,1>F     g40<8,8,1>F     { align1 1Q compacted };
mul(8)          g101<1>F        g39<8,8,1>F     g54<8,8,1>F     { align1 1Q compacted };
mul(8)          g48<1>F         g39<8,8,1>F     g91<8,8,1>F     { align1 1Q compacted };
mad(8)          g50<1>F         g70<4,4,1>F     g39<4,4,1>F     -g42<4,4,1>F { align16 1Q compacted };
mad(8)          g52<1>F         -g51<4,4,1>F    g39<4,4,1>F     g44<4,4,1>F { align16 1Q compacted };
mad(8)          g116<1>F        g101<4,4,1>F    g53<4,4,1>F     -g40<4,4,1>F { align16 1Q compacted };
mad(8)          g78<1>F         g48<4,4,1>F     g64<4,4,1>F     -g40<4,4,1>F { align16 1Q compacted };
mul(8)          g87<1>F         g52<8,8,1>F     g54<8,8,1>F     { align1 1Q compacted };
mul(8)          g102<1>F        g52<8,8,1>F     g91<8,8,1>F     { align1 1Q compacted };
add(8)          g66<1>F         (abs)g116<8,8,1>F (abs)g78<8,8,1>F { align1 1Q compacted };
mad(8)          g84<1>F         g87<4,4,1>F     g53<4,4,1>F     g50<4,4,1>F { align16 1Q compacted };
mad(8)          g106<1>F        g102<4,4,1>F    g64<4,4,1>F     g50<4,4,1>F { align16 1Q compacted };
sel.ge(8)       g69<1>F         g66<8,8,1>F     1e-07F          { align1 1Q };
add(8)          g85<1>F         (abs)g84<8,8,1>F (abs)g106<8,8,1>F { align1 1Q compacted };
math inv(8)     g73<1>F         g69<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
sel.ge(8)       g90<1>F         g85<8,8,1>F     1e-07F          { align1 1Q };
mul(8)          g62<1>F         g40<8,8,1>F     g73<8,8,1>F     { align1 1Q compacted };
mul(8)          g75<1>F         g39<8,8,1>F     g73<8,8,1>F     { align1 1Q compacted };
math inv(8)     g49<1>F         g90<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mul(8)          g71<1>F         g50<8,8,1>F     g49<8,8,1>F     { align1 1Q compacted };
mul(8)          g72<1>F         g52<8,8,1>F     g49<8,8,1>F     { align1 1Q compacted };
mul(8)          g76<1>F         g72<8,8,1>F     g40<8,8,1>F     { align1 1Q compacted };
mad.l.f0(8)     g77<1>F         g76<4,4,1>F     g39<4,4,1>F     g71<4,4,1>F { align16 1Q };
(+f0) sel(8)    g65<1>F         -g77<8,8,1>F    g77<8,8,1>F     { align1 1Q compacted };
(+f0) sel(8)    g79<1>F         -g71<8,8,1>F    g71<8,8,1>F     { align1 1Q compacted };
(+f0) sel(8)    g57<1>F         -g72<8,8,1>F    g72<8,8,1>F     { align1 1Q compacted };
mul(8)          g81<1>F         g79<8,8,1>F     g75<8,8,1>F     { align1 1Q compacted };
mul(8)          g82<1>F         g62<8,8,1>F     g57<8,8,1>F     { align1 1Q compacted };
cmp.l.f0(8)     null<1>F        g81<8,8,1>F     -g82<8,8,1>F    { align1 1Q compacted };
(+f0) sel(8)    g83<1>F         g62<8,8,1>F     -g62<8,8,1>F    { align1 1Q compacted };
(+f0) sel(8)    g55<1>F         -g75<8,8,1>F    g75<8,8,1>F     { align1 1Q compacted };
   END B194 ->B195
   START B196 <-B195 <-B285 (18 cycles)
cmp.ge.f0(8)    null<1>UD       g108<8,8,1>UD   g27<8,8,1>UD    { align1 1Q compacted };
   END B195 ->B196 ->B286
(+f0) break(8)  JIP: 4488       UIP: 4488                       { align1 1Q };
   END B196 ->B195 ->B197
   START B197 <-B196 (1342 cycles)
shl(8)          g28<1>D         g107<8,8,1>D    0x00000002UD    { align1 1Q };
add(8)          g107<1>D        g107<8,8,1>D    1D              { align1 1Q compacted };
send(8)         g53<1>UW        g28<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
mov(8)          g59<1>F         g53<8,8,1>F                     { align1 1Q compacted };
shl(8)          g54<1>D         g53<8,8,1>D     0x00000010UD    { align1 1Q };
mov(8)          g88<1>UD        g54.1<16,8,2>UW                 { align1 1Q };
shl(8)          g64<1>D         g88<8,8,1>D     0x00000011UD    { align1 1Q };
and(8)          g92<1>UD        g88<8,8,1>UD    0x00008000UD    { align1 1Q };
shr(8)          g67<1>UD        g64<8,8,1>UD    0x00000011UD    { align1 1Q compacted };
cmp.nz.f0(8)    g100<1>D        g92<8,8,1>D     0D              { align1 1Q compacted };
add(8)          g91<1>D         g98<8,8,1>D     g67<8,8,1>D     { align1 1Q compacted };
shl(8)          g29<1>D         g91<8,8,1>D     0x00000002UD    { align1 1Q };
add(8)          g97<1>D         g91<8,8,1>D     1D              { align1 1Q compacted };
send(8)         g94<1>UW        g29<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
shl(8)          g30<1>D         g97<8,8,1>D     0x00000002UD    { align1 1Q };
send(8)         g99<1>UW        g30<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
mov(8)          g95<1>F         g94<16,8,2>HF                   { align1 1Q };
mov(8)          g96<1>F         g94.1<16,8,2>HF                 { align1 1Q };
mov(8)          g111<1>F        g99<16,8,2>HF                   { align1 1Q };
mov(8)          g112<1>F        g99.1<16,8,2>HF                 { align1 1Q };
(+f0) if(8)     JIP: 104        UIP: 184                        { align1 1Q };
   END B197 ->B198 ->B199
   START B198 <-B197 (640 cycles)
add(8)          g60<1>D         g91<8,8,1>D     2D              { align1 1Q compacted };
shl(8)          g31<1>D         g60<8,8,1>D     0x00000002UD    { align1 1Q };
send(8)         g56<1>UW        g31<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
mov(8)          g113<1>F        g56<16,8,2>HF                   { align1 1Q };
mov(8)          g114<1>F        g56.1<16,8,2>HF                 { align1 1Q };
else(8)         JIP: 96         UIP: 96                         { align1 1Q };
   END B198 ->B200
   START B199 <-B197 (36 cycles)
add(8)          g103<1>F        g95<8,8,1>F     g111<8,8,1>F    { align1 1Q compacted };
add(8)          g104<1>F        g96<8,8,1>F     g112<8,8,1>F    { align1 1Q compacted };
mov(8)          g114<1>D        g112<8,8,1>D                    { align1 1Q compacted };
mov(8)          g113<1>D        g111<8,8,1>D                    { align1 1Q compacted };
mul(8)          g115<1>F        g103<8,8,1>F    0.5F            { align1 1Q };
mul(8)          g61<1>F         g104<8,8,1>F    0.5F            { align1 1Q };
mov(8)          g111<1>D        g115<8,8,1>D                    { align1 1Q compacted };
mov(8)          g112<1>D        g61<8,8,1>D                     { align1 1Q compacted };
   END B199 ->B200
   START B200 <-B199 <-B198 (288 cycles)
endif(8)        JIP: 4016                                       { align1 1Q };
add(8)          g47<1>F         g95<8,8,1>F     -g105<8,8,1>F   { align1 1Q compacted };
add(8)          g115<1>F        g96<8,8,1>F     -g89<8,8,1>F    { align1 1Q compacted };
add(8)          g3<1>F          g111<8,8,1>F    -g105<8,8,1>F   { align1 1Q compacted };
add(8)          g4<1>F          g112<8,8,1>F    -g89<8,8,1>F    { align1 1Q compacted };
add(8)          g15<1>F         g113<8,8,1>F    -g105<8,8,1>F   { align1 1Q compacted };
add(8)          g16<1>F         g114<8,8,1>F    -g89<8,8,1>F    { align1 1Q compacted };
mul(8)          g61<1>F         g57<8,8,1>F     g115<8,8,1>F    { align1 1Q compacted };
mul(8)          g127<1>F        g55<8,8,1>F     g115<8,8,1>F    { align1 1Q compacted };
mul(8)          g11<1>F         g57<8,8,1>F     g4<8,8,1>F      { align1 1Q compacted };
mul(8)          g13<1>F         g55<8,8,1>F     g4<8,8,1>F      { align1 1Q compacted };
mul(8)          g21<1>F         g57<8,8,1>F     g16<8,8,1>F     { align1 1Q compacted };
mul(8)          g25<1>F         g55<8,8,1>F     g16<8,8,1>F     { align1 1Q compacted };
mad.g.f0(8)     g126<1>F        g61<4,4,1>F     g47<4,4,1>F     g79<4,4,1>F { align16 1Q };
mad(8)          g2<1>F          g127<4,4,1>F    g47<4,4,1>F     g83<4,4,1>F { align16 1Q compacted };
mad(8)          g12<1>F         g11<4,4,1>F     g3<4,4,1>F      g79<4,4,1>F { align16 1Q compacted };
mad(8)          g14<1>F         g13<4,4,1>F     g3<4,4,1>F      g83<4,4,1>F { align16 1Q compacted };
mad(8)          g24<1>F         g21<4,4,1>F     g15<4,4,1>F     g79<4,4,1>F { align16 1Q compacted };
mad(8)          g26<1>F         g25<4,4,1>F     g15<4,4,1>F     g83<4,4,1>F { align16 1Q compacted };
(-f0) sel(8)    g34<1>UD        g74<8,8,1>UD    0x00000002UD    { align1 1Q };
mad(8)          g28<1>F         g126<4,4,1>F    g12<4,4,1>F     -g5.1<0,1,0>F { align16 1Q };
add(8)          g32<1>F         g126<8,8,1>F    -g12<8,8,1>F    { align1 1Q compacted };
mad(8)          g29<1>F         g2<4,4,1>F      g14<4,4,1>F     -g5.1<0,1,0>F { align16 1Q };
add(8)          g33<1>F         g2<8,8,1>F      -g14<8,8,1>F    { align1 1Q compacted };
cmp.g.f0(8)     null<1>F        g12<8,8,1>F     0F              { align1 1Q compacted };
add(8)          g30<1>F         g28<8,8,1>F     g24<8,8,1>F     { align1 1Q compacted };
add(8)          g31<1>F         g29<8,8,1>F     g26<8,8,1>F     { align1 1Q compacted };
(-f0) sel(8)    g35<1>UD        g74<8,8,1>UD    0x00000004UD    { align1 1Q };
add(8)          g37<1>D         g34<8,8,1>D     g35<8,8,1>D     { align1 1Q compacted };
cmp.g.f0(8)     null<1>F        g24<8,8,1>F     0F              { align1 1Q compacted };
(-f0) sel(8)    g36<1>UD        g74<8,8,1>UD    0x00000008UD    { align1 1Q };
add(8)          g38<1>D         g37<8,8,1>D     g36<8,8,1>D     { align1 1Q compacted };
cmp.g.f0(8)     null<1>F        g2<8,8,1>F      0F              { align1 1Q compacted };
shr(8)          g39<1>UD        g80<8,8,1>UD    g38<8,8,1>UD    { align1 1Q compacted };
(-f0) sel(8)    g40<1>UD        g74<8,8,1>UD    0x00000002UD    { align1 1Q };
and(8)          g117<1>UD       g39<8,8,1>UD    0x00000003UD    { align1 1Q compacted };
cmp.g.f0(8)     null<1>F        g14<8,8,1>F     0F              { align1 1Q compacted };
(-f0) sel(8)    g41<1>UD        g74<8,8,1>UD    0x00000004UD    { align1 1Q };
add(8)          g43<1>D         g40<8,8,1>D     g41<8,8,1>D     { align1 1Q compacted };
cmp.g.f0(8)     null<1>F        g26<8,8,1>F     0F              { align1 1Q compacted };
(-f0) sel(8)    g42<1>UD        g74<8,8,1>UD    0x00000008UD    { align1 1Q };
add(8)          g44<1>D         g43<8,8,1>D     g42<8,8,1>D     { align1 1Q compacted };
shr(8)          g45<1>UD        g80<8,8,1>UD    g44<8,8,1>UD    { align1 1Q compacted };
and.nz.f0(8)    g118<1>UD       g45<8,8,1>UD    0x00000003UD    { align1 1Q compacted };
(+f0) if(8)     JIP: 720        UIP: 728                        { align1 1Q };
   END B200 ->B201 ->B221
   START B201 <-B200 (18 cycles)
mov.nz.f0(8)    null<1>D        g100<8,8,1>D                    { align1 1Q };
(+f0) if(8)     JIP: 48         UIP: 56                         { align1 1Q };
   END B201 ->B202 ->B203
   START B202 <-B201 (4 cycles)
cmp.g.f0(8)     g119<1>F        (abs)g31<8,8,1>F 0.0001F        { align1 1Q };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B202 ->B204
   START B203 <-B201 (2 cycles)
mov(8)          g119<1>UD       0x00000000UD                    { align1 1Q compacted };
   END B203 ->B204
   START B204 <-B203 <-B202 (20 cycles)
endif(8)        JIP: 616                                        { align1 1Q };
mov.nz.f0(8)    null<1>D        g119<8,8,1>D                    { align1 1Q };
(+f0) if(8)     JIP: 128        UIP: 168                        { align1 1Q };
   END B204 ->B205 ->B206
   START B205 <-B204 (94 cycles)
math inv(8)     g46<1>F         g31<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mul(8)          g70<1>F         g31<8,8,1>F     g2<8,8,1>F      { align1 1Q compacted };
mad.l.f0(8)     g50<1>F         -g70<4,4,1>F    g33<4,4,1>F     g33<4,4,1>F { align16 1Q };
sel.ge(8)       g51<1>F         g50<8,8,1>F     0F              { align1 1Q compacted };
(-f0) sel(8)    g118<1>UD       g118<8,8,1>UD   0x00000000UD    { align1 1Q };
math sqrt(8)    g52<1>F         g51<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
add(8)          g87<1>F         g33<8,8,1>F     -g52<8,8,1>F    { align1 1Q compacted };
add(8)          g84<1>F         g33<8,8,1>F     g52<8,8,1>F     { align1 1Q compacted };
mul(8)          g120<1>F        g87<8,8,1>F     g46<8,8,1>F     { align1 1Q compacted };
mul(8)          g121<1>F        g84<8,8,1>F     g46<8,8,1>F     { align1 1Q compacted };
else(8)         JIP: 56         UIP: 56                         { align1 1Q };
   END B205 ->B207
   START B206 <-B204 (38 cycles)
mul(8)          g102<1>F        g2<8,8,1>F      0.5F            { align1 1Q };
math inv(8)     g106<1>F        g33<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mul(8)          g121<1>F        g102<8,8,1>F    g106<8,8,1>F    { align1 1Q compacted };
mov(8)          g120<1>D        g121<8,8,1>D                    { align1 1Q compacted };
   END B206 ->B207
   START B207 <-B206 <-B205 (44 cycles)
endif(8)        JIP: 416                                        { align1 1Q };
mul(8)          g85<1>F         g32<8,8,1>F     2F              { align1 1Q };
and.nz.f0(8)    null<1>UD       g118<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
mad(8)          g101<1>F        -g85<4,4,1>F    g120<4,4,1>F    g30<4,4,1>F { align16 1Q compacted };
mad(8)          g48<1>F         -g85<4,4,1>F    g121<4,4,1>F    g30<4,4,1>F { align16 1Q compacted };
mad(8)          g116<1>F        g126<4,4,1>F    g120<4,4,1>F    g101<4,4,1>F { align16 1Q compacted };
mad(8)          g78<1>F         g126<4,4,1>F    g121<4,4,1>F    g48<4,4,1>F { align16 1Q compacted };
(+f0) if(8)     JIP: 144        UIP: 152                        { align1 1Q };
   END B207 ->B208 ->B212
   START B208 <-B207 (68 cycles)
cmp.ge.f0(8)    g66<1>F         g116<8,8,1>F    0F              { align1 1Q compacted };
cmp.ge.f0(8)    g90<1>F         g65<8,8,1>F     g116<8,8,1>F    { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g90<8,8,1>UD    g66<8,8,1>UD    { align1 1Q compacted };
(-f0) sel(8)    g122<1>UD       g74<8,8,1>UD    0x00000001UD    { align1 1Q };
cmp.l.f0(8)     null<1>F        g116<8,8,1>F    0F              { align1 1Q compacted };
(+f0) if(8)     JIP: 40         UIP: 48                         { align1 1Q };
   END B208 ->B209 ->B210
   START B209 <-B208 (4 cycles)
sel.l(8)        g110<1>F        g110<8,8,1>F    (abs)g116<8,8,1>F { align1 1Q compacted };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B209 ->B211
   START B210 <-B208 (2 cycles)
sel.l(8)        g109<1>F        g109<8,8,1>F    (abs)g116<8,8,1>F { align1 1Q compacted };
   END B210 ->B211
   START B211 <-B210 <-B209 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B211 ->B213
   START B212 <-B207 (2 cycles)
mov(8)          g122<1>UD       0x00000000UD                    { align1 1Q compacted };
   END B212 ->B213
   START B213 <-B212 <-B211 (20 cycles)
endif(8)        JIP: 192                                        { align1 1Q };
cmp.g.f0(8)     null<1>UD       g118<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
(+f0) if(8)     JIP: 152        UIP: 152                        { align1 1Q };
   END B213 ->B214 ->B220
   START B214 <-B213 (36 cycles)
cmp.ge.f0(8)    g69<1>F         g78<8,8,1>F     0F              { align1 1Q compacted };
cmp.ge.f0(8)    g49<1>F         g65<8,8,1>F     g78<8,8,1>F     { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g49<8,8,1>UD    g69<8,8,1>UD    { align1 1Q compacted };
(+f0) if(8)     JIP: 24         UIP: 24                         { align1 1Q };
   END B214 ->B215 ->B216
   START B215 <-B214 (2 cycles)
add(8)          g122<1>D        g122<8,8,1>D    -1D             { align1 1Q compacted };
   END B215 ->B216
   START B216 <-B214 <-B215 (20 cycles)
endif(8)        JIP: 88                                         { align1 1Q };
cmp.g.f0(8)     null<1>F        g78<8,8,1>F     0F              { align1 1Q compacted };
(+f0) if(8)     JIP: 40         UIP: 48                         { align1 1Q };
   END B216 ->B217 ->B218
   START B217 <-B216 (4 cycles)
sel.l(8)        g110<1>F        g110<8,8,1>F    (abs)g78<8,8,1>F { align1 1Q compacted };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B217 ->B219
   START B218 <-B216 (2 cycles)
sel.l(8)        g109<1>F        g109<8,8,1>F    (abs)g78<8,8,1>F { align1 1Q compacted };
   END B218 ->B219
   START B219 <-B218 <-B217 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B219 ->B220
   START B220 <-B213 <-B219 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B220 ->B222
   START B221 <-B200 (2 cycles)
mov(8)          g122<1>UD       0x00000000UD                    { align1 1Q compacted };
   END B221 ->B222
   START B222 <-B221 <-B220 (20 cycles)
endif(8)        JIP: 2856                                       { align1 1Q };
cmp.nz.f0(8)    null<1>D        g117<8,8,1>D    0D              { align1 1Q compacted };
(+f0) if(8)     JIP: 576        UIP: 576                        { align1 1Q };
   END B222 ->B223 ->B240
   START B223 <-B222 (18 cycles)
mov.nz.f0(8)    null<1>D        g100<8,8,1>D                    { align1 1Q };
(+f0) if(8)     JIP: 48         UIP: 56                         { align1 1Q };
   END B223 ->B224 ->B225
   START B224 <-B223 (4 cycles)
cmp.g.f0(8)     g123<1>F        (abs)g30<8,8,1>F 0.0001F        { align1 1Q };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B224 ->B226
   START B225 <-B223 (2 cycles)
mov(8)          g123<1>UD       0x00000000UD                    { align1 1Q compacted };
   END B225 ->B226
   START B226 <-B225 <-B224 (20 cycles)
endif(8)        JIP: 488                                        { align1 1Q };
mov.nz.f0(8)    null<1>D        g123<8,8,1>D                    { align1 1Q };
(+f0) if(8)     JIP: 128        UIP: 168                        { align1 1Q };
   END B226 ->B227 ->B228
   START B227 <-B226 (94 cycles)
math inv(8)     g71<1>F         g30<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mul(8)          g72<1>F         g30<8,8,1>F     g126<8,8,1>F    { align1 1Q compacted };
mad.l.f0(8)     g73<1>F         -g72<4,4,1>F    g32<4,4,1>F     g32<4,4,1>F { align16 1Q };
sel.ge(8)       g62<1>F         g73<8,8,1>F     0F              { align1 1Q compacted };
(-f0) sel(8)    g117<1>UD       g117<8,8,1>UD   0x00000000UD    { align1 1Q };
math sqrt(8)    g75<1>F         g62<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
add(8)          g76<1>F         g32<8,8,1>F     -g75<8,8,1>F    { align1 1Q compacted };
add(8)          g77<1>F         g32<8,8,1>F     g75<8,8,1>F     { align1 1Q compacted };
mul(8)          g124<1>F        g76<8,8,1>F     g71<8,8,1>F     { align1 1Q compacted };
mul(8)          g125<1>F        g77<8,8,1>F     g71<8,8,1>F     { align1 1Q compacted };
else(8)         JIP: 56         UIP: 56                         { align1 1Q };
   END B227 ->B229
   START B228 <-B226 (38 cycles)
mul(8)          g81<1>F         g126<8,8,1>F    0.5F            { align1 1Q };
math inv(8)     g82<1>F         g32<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mul(8)          g125<1>F        g81<8,8,1>F     g82<8,8,1>F     { align1 1Q compacted };
mov(8)          g124<1>D        g125<8,8,1>D                    { align1 1Q compacted };
   END B228 ->B229
   START B229 <-B228 <-B227 (44 cycles)
endif(8)        JIP: 288                                        { align1 1Q };
mul(8)          g53<1>F         g33<8,8,1>F     2F              { align1 1Q };
and.nz.f0(8)    null<1>UD       g117<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
mad(8)          g54<1>F         -g53<4,4,1>F    g124<4,4,1>F    g31<4,4,1>F { align16 1Q compacted };
mad(8)          g64<1>F         -g53<4,4,1>F    g125<4,4,1>F    g31<4,4,1>F { align16 1Q compacted };
mad(8)          g88<1>F         g2<4,4,1>F      g124<4,4,1>F    g54<4,4,1>F { align16 1Q compacted };
mad(8)          g67<1>F         g2<4,4,1>F      g125<4,4,1>F    g64<4,4,1>F { align16 1Q compacted };
(+f0) if(8)     JIP: 88         UIP: 88                         { align1 1Q };
   END B229 ->B230 ->B234
   START B230 <-B229 (18 cycles)
cmp.g.f0(8)     null<1>F        g88<8,8,1>F     0F              { align1 1Q compacted };
(+f0) if(8)     JIP: 40         UIP: 48                         { align1 1Q };
   END B230 ->B231 ->B232
   START B231 <-B230 (4 cycles)
sel.l(8)        g110<1>F        g110<8,8,1>F    (abs)g88<8,8,1>F { align1 1Q compacted };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B231 ->B233
   START B232 <-B230 (2 cycles)
sel.l(8)        g109<1>F        g109<8,8,1>F    (abs)g88<8,8,1>F { align1 1Q compacted };
   END B232 ->B233
   START B233 <-B232 <-B231 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B233 ->B234
   START B234 <-B229 <-B233 (20 cycles)
endif(8)        JIP: 128                                        { align1 1Q };
cmp.g.f0(8)     null<1>UD       g117<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
(+f0) if(8)     JIP: 88         UIP: 88                         { align1 1Q };
   END B234 ->B235 ->B239
   START B235 <-B234 (18 cycles)
cmp.l.f0(8)     null<1>F        g67<8,8,1>F     0F              { align1 1Q compacted };
(+f0) if(8)     JIP: 40         UIP: 48                         { align1 1Q };
   END B235 ->B236 ->B237
   START B236 <-B235 (4 cycles)
sel.l(8)        g110<1>F        g110<8,8,1>F    (abs)g67<8,8,1>F { align1 1Q compacted };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B236 ->B238
   START B237 <-B235 (2 cycles)
sel.l(8)        g109<1>F        g109<8,8,1>F    (abs)g67<8,8,1>F { align1 1Q compacted };
   END B237 ->B238
   START B238 <-B237 <-B236 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B238 ->B239
   START B239 <-B234 <-B238 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B239 ->B240
   START B240 <-B222 <-B239 (38 cycles)
endif(8)        JIP: 2256                                       { align1 1Q };
add(8)          g58<1>D         g58<8,8,1>D     g122<8,8,1>D    { align1 1Q compacted };
add(8)          g91<1>D         g108<8,8,1>D    1D              { align1 1Q compacted };
cmp.l.f0(8)     null<1>UD       g91<8,8,1>UD    g27<8,8,1>UD    { align1 1Q compacted };
(+f0) if(8)     JIP: 2192       UIP: 2192                       { align1 1Q };
   END B240 ->B241 ->B285
   START B241 <-B240 (706 cycles)
mov(8)          g92<1>UD        g59.1<16,8,2>UW                 { align1 1Q };
shl(8)          g94<1>D         g92<8,8,1>D     0x00000011UD    { align1 1Q };
and(8)          g97<1>UD        g92<8,8,1>UD    0x00008000UD    { align1 1Q };
shr(8)          g95<1>UD        g94<8,8,1>UD    0x00000011UD    { align1 1Q compacted };
cmp.nz.f0(8)    g104<1>D        g97<8,8,1>D     0D              { align1 1Q compacted };
add(8)          g96<1>D         g98<8,8,1>D     g95<8,8,1>D     { align1 1Q compacted };
shl(8)          g32<1>D         g96<8,8,1>D     0x00000002UD    { align1 1Q };
add(8)          g56<1>D         g96<8,8,1>D     1D              { align1 1Q compacted };
send(8)         g99<1>UW        g32<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
shl(8)          g33<1>D         g56<8,8,1>D     0x00000002UD    { align1 1Q };
send(8)         g103<1>UW       g33<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
mov(8)          g100<1>F        g99<16,8,2>HF                   { align1 1Q };
mov(8)          g60<1>F         g99.1<16,8,2>HF                 { align1 1Q };
mov(8)          g126<1>F        g103<16,8,2>HF                  { align1 1Q };
mov(8)          g127<1>F        g103.1<16,8,2>HF                { align1 1Q };
(+f0) if(8)     JIP: 104        UIP: 184                        { align1 1Q };
   END B241 ->B242 ->B243
   START B242 <-B241 (640 cycles)
add(8)          g47<1>D         g96<8,8,1>D     2D              { align1 1Q compacted };
shl(8)          g34<1>D         g47<8,8,1>D     0x00000002UD    { align1 1Q };
send(8)         g111<1>UW       g34<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
mov(8)          g2<1>F          g111<16,8,2>HF                  { align1 1Q };
mov(8)          g3<1>F          g111.1<16,8,2>HF                { align1 1Q };
else(8)         JIP: 96         UIP: 96                         { align1 1Q };
   END B242 ->B244
   START B243 <-B241 (36 cycles)
add(8)          g112<1>F        g100<8,8,1>F    g126<8,8,1>F    { align1 1Q compacted };
add(8)          g113<1>F        g60<8,8,1>F     g127<8,8,1>F    { align1 1Q compacted };
mov(8)          g3<1>D          g127<8,8,1>D                    { align1 1Q compacted };
mov(8)          g2<1>D          g126<8,8,1>D                    { align1 1Q compacted };
mul(8)          g4<1>F          g112<8,8,1>F    0.5F            { align1 1Q };
mul(8)          g11<1>F         g113<8,8,1>F    0.5F            { align1 1Q };
mov(8)          g126<1>D        g4<8,8,1>D                      { align1 1Q compacted };
mov(8)          g127<1>D        g11<8,8,1>D                     { align1 1Q compacted };
   END B243 ->B244
   START B244 <-B243 <-B242 (288 cycles)
endif(8)        JIP: 1784                                       { align1 1Q };
add(8)          g114<1>F        g100<8,8,1>F    -g105<8,8,1>F   { align1 1Q compacted };
add(8)          g115<1>F        g60<8,8,1>F     -g89<8,8,1>F    { align1 1Q compacted };
add(8)          g120<1>F        g126<8,8,1>F    -g105<8,8,1>F   { align1 1Q compacted };
add(8)          g121<1>F        g127<8,8,1>F    -g89<8,8,1>F    { align1 1Q compacted };
add(8)          g126<1>F        g2<8,8,1>F      -g105<8,8,1>F   { align1 1Q compacted };
add(8)          g127<1>F        g3<8,8,1>F      -g89<8,8,1>F    { align1 1Q compacted };
mul(8)          g61<1>F         g57<8,8,1>F     g115<8,8,1>F    { align1 1Q compacted };
mul(8)          g118<1>F        g55<8,8,1>F     g115<8,8,1>F    { align1 1Q compacted };
mul(8)          g122<1>F        g57<8,8,1>F     g121<8,8,1>F    { align1 1Q compacted };
mul(8)          g124<1>F        g55<8,8,1>F     g121<8,8,1>F    { align1 1Q compacted };
mul(8)          g2<1>F          g57<8,8,1>F     g127<8,8,1>F    { align1 1Q compacted };
mul(8)          g4<1>F          g55<8,8,1>F     g127<8,8,1>F    { align1 1Q compacted };
mad.g.f0(8)     g117<1>F        g61<4,4,1>F     g114<4,4,1>F    g79<4,4,1>F { align16 1Q };
mad(8)          g119<1>F        g118<4,4,1>F    g114<4,4,1>F    g83<4,4,1>F { align16 1Q compacted };
mad(8)          g123<1>F        g122<4,4,1>F    g120<4,4,1>F    g79<4,4,1>F { align16 1Q compacted };
mad(8)          g125<1>F        g124<4,4,1>F    g120<4,4,1>F    g83<4,4,1>F { align16 1Q compacted };
mad(8)          g3<1>F          g2<4,4,1>F      g126<4,4,1>F    g79<4,4,1>F { align16 1Q compacted };
mad(8)          g11<1>F         g4<4,4,1>F      g126<4,4,1>F    g83<4,4,1>F { align16 1Q compacted };
(-f0) sel(8)    g31<1>UD        g74<8,8,1>UD    0x00000002UD    { align1 1Q };
mad(8)          g12<1>F         g117<4,4,1>F    g123<4,4,1>F    -g5.1<0,1,0>F { align16 1Q };
add(8)          g29<1>F         g117<8,8,1>F    -g123<8,8,1>F   { align1 1Q compacted };
mad(8)          g13<1>F         g119<4,4,1>F    g125<4,4,1>F    -g5.1<0,1,0>F { align16 1Q };
add(8)          g30<1>F         g119<8,8,1>F    -g125<8,8,1>F   { align1 1Q compacted };
cmp.g.f0(8)     null<1>F        g123<8,8,1>F    0F              { align1 1Q compacted };
add(8)          g25<1>F         g12<8,8,1>F     g3<8,8,1>F      { align1 1Q compacted };
add(8)          g28<1>F         g13<8,8,1>F     g11<8,8,1>F     { align1 1Q compacted };
(-f0) sel(8)    g32<1>UD        g74<8,8,1>UD    0x00000004UD    { align1 1Q };
add(8)          g34<1>D         g31<8,8,1>D     g32<8,8,1>D     { align1 1Q compacted };
cmp.g.f0(8)     null<1>F        g3<8,8,1>F      0F              { align1 1Q compacted };
(-f0) sel(8)    g33<1>UD        g74<8,8,1>UD    0x00000008UD    { align1 1Q };
add(8)          g35<1>D         g34<8,8,1>D     g33<8,8,1>D     { align1 1Q compacted };
cmp.g.f0(8)     null<1>F        g119<8,8,1>F    0F              { align1 1Q compacted };
shr(8)          g36<1>UD        g80<8,8,1>UD    g35<8,8,1>UD    { align1 1Q compacted };
(-f0) sel(8)    g37<1>UD        g74<8,8,1>UD    0x00000002UD    { align1 1Q };
and(8)          g12<1>UD        g36<8,8,1>UD    0x00000003UD    { align1 1Q compacted };
cmp.g.f0(8)     null<1>F        g125<8,8,1>F    0F              { align1 1Q compacted };
(-f0) sel(8)    g38<1>UD        g74<8,8,1>UD    0x00000004UD    { align1 1Q };
add(8)          g40<1>D         g37<8,8,1>D     g38<8,8,1>D     { align1 1Q compacted };
cmp.g.f0(8)     null<1>F        g11<8,8,1>F     0F              { align1 1Q compacted };
(-f0) sel(8)    g39<1>UD        g74<8,8,1>UD    0x00000008UD    { align1 1Q };
add(8)          g41<1>D         g40<8,8,1>D     g39<8,8,1>D     { align1 1Q compacted };
shr(8)          g42<1>UD        g80<8,8,1>UD    g41<8,8,1>UD    { align1 1Q compacted };
and.nz.f0(8)    g13<1>UD        g42<8,8,1>UD    0x00000003UD    { align1 1Q compacted };
(+f0) if(8)     JIP: 720        UIP: 728                        { align1 1Q };
   END B244 ->B245 ->B265
   START B245 <-B244 (18 cycles)
mov.nz.f0(8)    null<1>D        g104<8,8,1>D                    { align1 1Q };
(+f0) if(8)     JIP: 48         UIP: 56                         { align1 1Q };
   END B245 ->B246 ->B247
   START B246 <-B245 (4 cycles)
cmp.g.f0(8)     g14<1>F         (abs)g28<8,8,1>F 0.0001F        { align1 1Q };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B246 ->B248
   START B247 <-B245 (2 cycles)
mov(8)          g14<1>UD        0x00000000UD                    { align1 1Q compacted };
   END B247 ->B248
   START B248 <-B247 <-B246 (20 cycles)
endif(8)        JIP: 616                                        { align1 1Q };
mov.nz.f0(8)    null<1>D        g14<8,8,1>D                     { align1 1Q };
(+f0) if(8)     JIP: 128        UIP: 168                        { align1 1Q };
   END B248 ->B249 ->B250
   START B249 <-B248 (94 cycles)
math inv(8)     g43<1>F         g28<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mul(8)          g44<1>F         g28<8,8,1>F     g119<8,8,1>F    { align1 1Q compacted };
mad.l.f0(8)     g45<1>F         -g44<4,4,1>F    g30<4,4,1>F     g30<4,4,1>F { align16 1Q };
sel.ge(8)       g46<1>F         g45<8,8,1>F     0F              { align1 1Q compacted };
(-f0) sel(8)    g13<1>UD        g13<8,8,1>UD    0x00000000UD    { align1 1Q };
math sqrt(8)    g70<1>F         g46<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
add(8)          g50<1>F         g30<8,8,1>F     -g70<8,8,1>F    { align1 1Q compacted };
add(8)          g51<1>F         g30<8,8,1>F     g70<8,8,1>F     { align1 1Q compacted };
mul(8)          g15<1>F         g50<8,8,1>F     g43<8,8,1>F     { align1 1Q compacted };
mul(8)          g16<1>F         g51<8,8,1>F     g43<8,8,1>F     { align1 1Q compacted };
else(8)         JIP: 56         UIP: 56                         { align1 1Q };
   END B249 ->B251
   START B250 <-B248 (38 cycles)
mul(8)          g52<1>F         g119<8,8,1>F    0.5F            { align1 1Q };
math inv(8)     g87<1>F         g30<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mul(8)          g16<1>F         g52<8,8,1>F     g87<8,8,1>F     { align1 1Q compacted };
mov(8)          g15<1>D         g16<8,8,1>D                     { align1 1Q compacted };
   END B250 ->B251
   START B251 <-B250 <-B249 (45 cycles)
endif(8)        JIP: 416                                        { align1 1Q };
mul(8)          g84<1>F         g29<8,8,1>F     2F              { align1 1Q };
and.nz.f0(8)    null<1>UD       g13<8,8,1>UD    0x00000001UD    { align1 1Q compacted };
mad(8)          g102<1>F        -g84<4,4,1>F    g15<4,4,1>F     g25<4,4,1>F { align16 1Q compacted };
mad(8)          g85<1>F         -g84<4,4,1>F    g16<4,4,1>F     g25<4,4,1>F { align16 1Q compacted };
mad(8)          g106<1>F        g117<4,4,1>F    g15<4,4,1>F     g102<4,4,1>F { align16 1Q compacted };
mad(8)          g101<1>F        g117<4,4,1>F    g16<4,4,1>F     g85<4,4,1>F { align16 1Q compacted };
(+f0) if(8)     JIP: 144        UIP: 152                        { align1 1Q };
   END B251 ->B252 ->B256
   START B252 <-B251 (68 cycles)
cmp.ge.f0(8)    g116<1>F        g106<8,8,1>F    0F              { align1 1Q compacted };
cmp.ge.f0(8)    g48<1>F         g65<8,8,1>F     g106<8,8,1>F    { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g48<8,8,1>UD    g116<8,8,1>UD   { align1 1Q compacted };
(-f0) sel(8)    g21<1>UD        g74<8,8,1>UD    0x00000001UD    { align1 1Q };
cmp.l.f0(8)     null<1>F        g106<8,8,1>F    0F              { align1 1Q compacted };
(+f0) if(8)     JIP: 40         UIP: 48                         { align1 1Q };
   END B252 ->B253 ->B254
   START B253 <-B252 (4 cycles)
sel.l(8)        g110<1>F        g110<8,8,1>F    (abs)g106<8,8,1>F { align1 1Q compacted };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B253 ->B255
   START B254 <-B252 (2 cycles)
sel.l(8)        g109<1>F        g109<8,8,1>F    (abs)g106<8,8,1>F { align1 1Q compacted };
   END B254 ->B255
   START B255 <-B254 <-B253 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B255 ->B257
   START B256 <-B251 (2 cycles)
mov(8)          g21<1>UD        0x00000000UD                    { align1 1Q compacted };
   END B256 ->B257
   START B257 <-B256 <-B255 (20 cycles)
endif(8)        JIP: 192                                        { align1 1Q };
cmp.g.f0(8)     null<1>UD       g13<8,8,1>UD    0x00000001UD    { align1 1Q compacted };
(+f0) if(8)     JIP: 152        UIP: 152                        { align1 1Q };
   END B257 ->B258 ->B264
   START B258 <-B257 (36 cycles)
cmp.ge.f0(8)    g78<1>F         g101<8,8,1>F    0F              { align1 1Q compacted };
cmp.ge.f0(8)    g66<1>F         g65<8,8,1>F     g101<8,8,1>F    { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g66<8,8,1>UD    g78<8,8,1>UD    { align1 1Q compacted };
(+f0) if(8)     JIP: 24         UIP: 24                         { align1 1Q };
   END B258 ->B259 ->B260
   START B259 <-B258 (2 cycles)
add(8)          g21<1>D         g21<8,8,1>D     -1D             { align1 1Q compacted };
   END B259 ->B260
   START B260 <-B258 <-B259 (20 cycles)
endif(8)        JIP: 88                                         { align1 1Q };
cmp.g.f0(8)     null<1>F        g101<8,8,1>F    0F              { align1 1Q compacted };
(+f0) if(8)     JIP: 40         UIP: 48                         { align1 1Q };
   END B260 ->B261 ->B262
   START B261 <-B260 (4 cycles)
sel.l(8)        g110<1>F        g110<8,8,1>F    (abs)g101<8,8,1>F { align1 1Q compacted };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B261 ->B263
   START B262 <-B260 (2 cycles)
sel.l(8)        g109<1>F        g109<8,8,1>F    (abs)g101<8,8,1>F { align1 1Q compacted };
   END B262 ->B263
   START B263 <-B262 <-B261 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B263 ->B264
   START B264 <-B257 <-B263 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B264 ->B266
   START B265 <-B244 (2 cycles)
mov(8)          g21<1>UD        0x00000000UD                    { align1 1Q compacted };
   END B265 ->B266
   START B266 <-B265 <-B264 (20 cycles)
endif(8)        JIP: 624                                        { align1 1Q };
cmp.nz.f0(8)    null<1>D        g12<8,8,1>D     0D              { align1 1Q compacted };
(+f0) if(8)     JIP: 576        UIP: 576                        { align1 1Q };
   END B266 ->B267 ->B284
   START B267 <-B266 (18 cycles)
mov.nz.f0(8)    null<1>D        g104<8,8,1>D                    { align1 1Q };
(+f0) if(8)     JIP: 48         UIP: 56                         { align1 1Q };
   END B267 ->B268 ->B269
   START B268 <-B267 (4 cycles)
cmp.g.f0(8)     g24<1>F         (abs)g25<8,8,1>F 0.0001F        { align1 1Q };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B268 ->B270
   START B269 <-B267 (2 cycles)
mov(8)          g24<1>UD        0x00000000UD                    { align1 1Q compacted };
   END B269 ->B270
   START B270 <-B269 <-B268 (20 cycles)
endif(8)        JIP: 488                                        { align1 1Q };
mov.nz.f0(8)    null<1>D        g24<8,8,1>D                     { align1 1Q };
(+f0) if(8)     JIP: 128        UIP: 168                        { align1 1Q };
   END B270 ->B271 ->B272
   START B271 <-B270 (94 cycles)
math inv(8)     g90<1>F         g25<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mul(8)          g69<1>F         g25<8,8,1>F     g117<8,8,1>F    { align1 1Q compacted };
mad.l.f0(8)     g49<1>F         -g69<4,4,1>F    g29<4,4,1>F     g29<4,4,1>F { align16 1Q };
sel.ge(8)       g71<1>F         g49<8,8,1>F     0F              { align1 1Q compacted };
(-f0) sel(8)    g12<1>UD        g12<8,8,1>UD    0x00000000UD    { align1 1Q };
math sqrt(8)    g72<1>F         g71<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
add(8)          g73<1>F         g29<8,8,1>F     -g72<8,8,1>F    { align1 1Q compacted };
add(8)          g62<1>F         g29<8,8,1>F     g72<8,8,1>F     { align1 1Q compacted };
mul(8)          g25<1>F         g73<8,8,1>F     g90<8,8,1>F     { align1 1Q compacted };
mul(8)          g26<1>F         g62<8,8,1>F     g90<8,8,1>F     { align1 1Q compacted };
else(8)         JIP: 56         UIP: 56                         { align1 1Q };
   END B271 ->B273
   START B272 <-B270 (38 cycles)
mul(8)          g75<1>F         g117<8,8,1>F    0.5F            { align1 1Q };
math inv(8)     g76<1>F         g29<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mul(8)          g26<1>F         g75<8,8,1>F     g76<8,8,1>F     { align1 1Q compacted };
mov(8)          g25<1>D         g26<8,8,1>D                     { align1 1Q compacted };
   END B272 ->B273
   START B273 <-B272 <-B271 (45 cycles)
endif(8)        JIP: 288                                        { align1 1Q };
mul(8)          g77<1>F         g30<8,8,1>F     2F              { align1 1Q };
and.nz.f0(8)    null<1>UD       g12<8,8,1>UD    0x00000001UD    { align1 1Q compacted };
mad(8)          g81<1>F         -g77<4,4,1>F    g25<4,4,1>F     g28<4,4,1>F { align16 1Q compacted };
mad(8)          g59<1>F         -g77<4,4,1>F    g26<4,4,1>F     g28<4,4,1>F { align16 1Q compacted };
mad(8)          g82<1>F         g119<4,4,1>F    g25<4,4,1>F     g81<4,4,1>F { align16 1Q compacted };
mad(8)          g53<1>F         g119<4,4,1>F    g26<4,4,1>F     g59<4,4,1>F { align16 1Q compacted };
(+f0) if(8)     JIP: 88         UIP: 88                         { align1 1Q };
   END B273 ->B274 ->B278
   START B274 <-B273 (18 cycles)
cmp.g.f0(8)     null<1>F        g82<8,8,1>F     0F              { align1 1Q compacted };
(+f0) if(8)     JIP: 40         UIP: 48                         { align1 1Q };
   END B274 ->B275 ->B276
   START B275 <-B274 (4 cycles)
sel.l(8)        g110<1>F        g110<8,8,1>F    (abs)g82<8,8,1>F { align1 1Q compacted };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B275 ->B277
   START B276 <-B274 (2 cycles)
sel.l(8)        g109<1>F        g109<8,8,1>F    (abs)g82<8,8,1>F { align1 1Q compacted };
   END B276 ->B277
   START B277 <-B276 <-B275 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B277 ->B278
   START B278 <-B273 <-B277 (20 cycles)
endif(8)        JIP: 128                                        { align1 1Q };
cmp.g.f0(8)     null<1>UD       g12<8,8,1>UD    0x00000001UD    { align1 1Q compacted };
(+f0) if(8)     JIP: 88         UIP: 88                         { align1 1Q };
   END B278 ->B279 ->B283
   START B279 <-B278 (18 cycles)
cmp.l.f0(8)     null<1>F        g53<8,8,1>F     0F              { align1 1Q compacted };
(+f0) if(8)     JIP: 40         UIP: 48                         { align1 1Q };
   END B279 ->B280 ->B281
   START B280 <-B279 (4 cycles)
sel.l(8)        g110<1>F        g110<8,8,1>F    (abs)g53<8,8,1>F { align1 1Q compacted };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B280 ->B282
   START B281 <-B279 (2 cycles)
sel.l(8)        g109<1>F        g109<8,8,1>F    (abs)g53<8,8,1>F { align1 1Q compacted };
   END B281 ->B282
   START B282 <-B281 <-B280 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B282 ->B283
   START B283 <-B278 <-B282 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B283 ->B284
   START B284 <-B266 <-B283 (4 cycles)
endif(8)        JIP: 24                                         { align1 1Q };
add(8)          g58<1>D         g58<8,8,1>D     g21<8,8,1>D     { align1 1Q compacted };
   END B284 ->B285
   START B285 <-B240 <-B284 (6 cycles)
endif(8)        JIP: 24                                         { align1 1Q };
add(8)          g108<1>D        g108<8,8,1>D    2D              { align1 1Q compacted };
while(8)        JIP: -4496                                      { align1 1Q };
   END B285 ->B196
   START B286 <-B195 (34 cycles)
cmp.z.f0(8)     g54<1>D         g58<8,8,1>D     0D              { align1 1Q compacted };
or.nz.f0(8)     null<1>UD       g54<8,8,1>UD    g93<8,8,1>UD    { align1 1Q compacted };
(+f0) if(8)     JIP: 40         UIP: 104                        { align1 1Q };
   END B286 ->B287 ->B288
   START B287 <-B286 (4 cycles)
sel.l(8)        g110<1>F        g110<8,8,1>F    g109<8,8,1>F    { align1 1Q compacted };
else(8)         JIP: 80         UIP: 80                         { align1 1Q };
   END B287 ->B291
   START B288 <-B286 (18 cycles)
cmp.nz.f0(8)    null<1>D        g58<8,8,1>D     -1D             { align1 1Q compacted };
(+f0) if(8)     JIP: 40         UIP: 40                         { align1 1Q };
   END B288 ->B289 ->B290
   START B289 <-B288 (18 cycles)
cmp.z.f0(8)     null<1>D        g58<8,8,1>D     1D              { align1 1Q compacted };
(+f0) sel(8)    g110<1>UD       g109<8,8,1>UD   0x3f000000UD    { align1 1Q };
   END B289 ->B290
   START B290 <-B288 <-B289 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B290 ->B291
   START B291 <-B290 <-B287 (86 cycles)
endif(8)        JIP: 248                                        { align1 1Q };
sel.l(8)        g88<1>F         g110<8,8,1>F    0.5F            { align1 1Q };
and(8)          g64<1>UD        g58<8,8,1>UD    0x00000001UD    { align1 1Q compacted };
cmp.z.f0(8)     g67<1>D         g64<8,8,1>D     0D              { align1 1Q compacted };
and.nz.f0(8)    null<1>UD       g93<8,8,1>UD    g67<8,8,1>UD    { align1 1Q compacted };
(-f0) sel(8)    g91<1>UD        g58<8,8,1>UD    0x00000000UD    { align1 1Q };
cmp.nz.f0(8)    null<1>D        g91<8,8,1>D     0D              { align1 1Q compacted };
(+f0) if(8)     JIP: 48         UIP: 64                         { align1 1Q };
   END B291 ->B292 ->B293
   START B292 <-B291 (4 cycles)
add(8)          g20<1>F         g88<8,8,1>F     0.5F            { align1 1Q };
else(8)         JIP: 32         UIP: 32                         { align1 1Q };
   END B292 ->B294
   START B293 <-B291 (2 cycles)
add(8)          g20<1>F         -g88<8,8,1>F    0.5F            { align1 1Q };
   END B293 ->B294
   START B294 <-B293 <-B292 (20 cycles)
endif(8)        JIP: 104                                        { align1 1Q };
and.nz.f0(8)    null<1>UD       g7.3<0,1,0>UD   0x40000000UD    { align1 1Q };
(+f0) if(8)     JIP: 32         UIP: 32                         { align1 1Q };
   END B294 ->B295 ->B296
   START B295 <-B294 (2 cycles)
add(8)          g20<1>F         -g20<8,8,1>F    1F              { align1 1Q };
   END B295 ->B296
   START B296 <-B294 <-B295 (10 cycles)
endif(8)        JIP: 40                                         { align1 1Q };
mov(8)          g17<1>D         g20<8,8,1>D                     { align1 1Q compacted };
mov(8)          g18<1>D         g20<8,8,1>D                     { align1 1Q compacted };
mov(8)          g19<1>D         g20<8,8,1>D                     { align1 1Q compacted };
else(8)         JIP: 3528       UIP: 3528                       { align1 1Q };
   END B296 ->B353
   START B297 <-B186 (18 cycles)
cmp.z.f0(8)     null<1>D        g9.7<0,1,0>D    23D             { align1 1Q };
(+f0) if(8)     JIP: 3480       UIP: 3480                       { align1 1Q };
   END B297 ->B298 ->B352
   START B298 <-B297 (86 cycles)
add(8)          g92<1>F         g105.1<4,4,0>F  -g105<4,4,0>F   { align1 1Q compacted };
mul(8)          g93<1>F         g105<8,8,1>F    g6<0,1,0>F      { align1 1Q compacted };
add(8)          g96<1>F         g89.1<4,4,0>F   -g89<4,4,0>F    { align1 1Q compacted };
mul(8)          g97<1>F         g89<8,8,1>F     g6<0,1,0>F      { align1 1Q compacted };
and(8)          g100<1>UD       g7.3<0,1,0>UD   0x3fffffffUD    { align1 1Q };
and(8)          g60<1>UD        g7.3<0,1,0>UD   0x80000000UD    { align1 1Q };
mov(8)          g47<1>F         g8.3<0,1,0>UD                   { align1 1Q compacted };
mov(8)          g58<1>F         g7.7<0,1,0>UD                   { align1 1Q };
add(8)          g107<1>D        g8.3<0,1,0>D    -1D             { align1 1Q compacted };
add(8)          g108<1>F        g105<8,8,1>F    32F             { align1 1Q };
add(8)          g113<1>D        g7.7<0,1,0>D    -1D             { align1 1Q };
add(8)          g114<1>F        g89<8,8,1>F     32F             { align1 1Q };
add(8)          g94<1>F         -g93<4,4,0>F    g93.2<4,4,0>F   { align1 1Q compacted };
add(8)          g98<1>F         -g97<4,4,0>F    g97.2<4,4,0>F   { align1 1Q compacted };
cmp.nz.f0(8)    g56<1>D         g60<8,8,1>D     0D              { align1 1Q compacted };
mul(8)          g109<1>F        g47<8,8,1>F     0.015625F       { align1 1Q };
cmp.l.f0(8)     null<1>F        g105<8,8,1>F    0F              { align1 1Q compacted };
mul(8)          g115<1>F        g58<8,8,1>F     0.015625F       { align1 1Q };
add(8)          g95<1>F         (abs)g92<8,8,1>F (abs)g94<8,8,1>F { align1 1Q compacted };
add(8)          g99<1>F         (abs)g96<8,8,1>F (abs)g98<8,8,1>F { align1 1Q compacted };
mul(8)          g110<1>F        g109<8,8,1>F    g108<8,8,1>F    { align1 1Q compacted };
mul(8)          g61<1>F         g115<8,8,1>F    g114<8,8,1>F    { align1 1Q compacted };
math inv(8)     g103<1>F        g95<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
math inv(8)     g104<1>F        g99<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mov(8)          g111<1>UD       g110<8,8,1>F                    { align1 1Q compacted };
mov(8)          g117<1>UD       g61<8,8,1>F                     { align1 1Q compacted };
sel.l(8)        g112<1>UD       g107<8,8,1>UD   g111<8,8,1>UD   { align1 1Q compacted };
sel.l(8)        g27<1>UD        g113<8,8,1>UD   g117<8,8,1>UD   { align1 1Q compacted };
(+f0) if(8)     JIP: 56         UIP: 72                         { align1 1Q };
   END B298 ->B299 ->B300
   START B299 <-B298 (6 cycles)
add(8)          g27<1>D         g27<8,8,1>D     g7.7<0,1,0>D    { align1 1Q compacted };
mov(8)          g28<1>D         -1082130432D                    { align1 1Q };
else(8)         JIP: 32         UIP: 32                         { align1 1Q };
   END B299 ->B301
   START B300 <-B298 (2 cycles)
mov(8)          g28<1>D         1065353216D                     { align1 1Q };
   END B300 ->B301
   START B301 <-B300 <-B299 (22 cycles)
endif(8)        JIP: 3104                                       { align1 1Q };
shl(8)          g118<1>D        g7.7<0,1,0>D    0x00000001UD    { align1 1Q };
cmp.l.f0(8)     null<1>F        g89<8,8,1>F     0F              { align1 1Q compacted };
add(8)          g29<1>D         g112<8,8,1>D    g118<8,8,1>D    { align1 1Q compacted };
(+f0) if(8)     JIP: 56         UIP: 72                         { align1 1Q };
   END B301 ->B302 ->B303
   START B302 <-B301 (6 cycles)
add(8)          g29<1>D         g29<8,8,1>D     g8.3<0,1,0>D    { align1 1Q compacted };
mov(8)          g30<1>D         -1082130432D                    { align1 1Q };
else(8)         JIP: 32         UIP: 32                         { align1 1Q };
   END B302 ->B304
   START B303 <-B301 (2 cycles)
mov(8)          g30<1>D         1065353216D                     { align1 1Q };
   END B303 ->B304
   START B304 <-B303 <-B302 (658 cycles)
endif(8)        JIP: 2984                                       { align1 1Q };
add(8)          g119<1>D        g100<8,8,1>D    g27<8,8,1>D     { align1 1Q compacted };
add(8)          g123<1>D        g100<8,8,1>D    g29<8,8,1>D     { align1 1Q compacted };
mov(8)          g34<1>UD        0x00000000UD                    { align1 1Q compacted };
mov(8)          g33<1>UD        0x00000000UD                    { align1 1Q compacted };
mov(8)          g32<1>D         1056964608D                     { align1 1Q };
shl(8)          g35<1>D         g119<8,8,1>D    0x00000002UD    { align1 1Q };
shl(8)          g36<1>D         g123<8,8,1>D    0x00000002UD    { align1 1Q };
send(8)         g120<1>UW       g35<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
send(8)         g124<1>UW       g36<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
shl(8)          g121<1>D        g120<8,8,1>D    0x00000018UD    { align1 1Q };
shr(8)          g2<1>UD         g120<8,8,1>UD   0x00000008UD    { align1 1Q compacted };
shl(8)          g125<1>D        g124<8,8,1>D    0x00000018UD    { align1 1Q };
shr(8)          g127<1>UD       g124<8,8,1>UD   0x00000008UD    { align1 1Q compacted };
mov(8)          g122<1>UD       g121.3<32,8,4>UB                { align1 1Q };
add(8)          g31<1>D         g2<8,8,1>D      g100<8,8,1>D    { align1 1Q compacted };
mov(8)          g126<1>UD       g125.3<32,8,4>UB                { align1 1Q };
   END B304 ->B305
   START B306 <-B305 <-B323 (18 cycles)
cmp.ge.f0(8)    null<1>UD       g34<8,8,1>UD    g122<8,8,1>UD   { align1 1Q compacted };
   END B305 ->B306 ->B324
(+f0) break(8)  JIP: 1128       UIP: 1128                       { align1 1Q };
   END B306 ->B305 ->B307
   START B307 <-B306 (664 cycles)
shl(8)          g37<1>D         g31<8,8,1>D     0x00000002UD    { align1 1Q };
add(8)          g11<1>D         g31<8,8,1>D     1D              { align1 1Q compacted };
add(8)          g21<1>D         g31<8,8,1>D     2D              { align1 1Q compacted };
cmp.g.f0(8)     null<1>F        g28<8,8,1>F     0F              { align1 1Q compacted };
send(8)         g3<1>UW         g37<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
shl(8)          g38<1>D         g11<8,8,1>D     0x00000002UD    { align1 1Q };
shl(8)          g39<1>D         g21<8,8,1>D     0x00000002UD    { align1 1Q };
send(8)         g12<1>UW        g38<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
send(8)         g24<1>UW        g39<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
mov(8)          g4<1>F          g3<16,8,2>HF                    { align1 1Q };
mov(8)          g6<1>F          g3.1<16,8,2>HF                  { align1 1Q };
add(8)          g8<1>F          g4<8,8,1>F      -g105<8,8,1>F   { align1 1Q compacted };
add(8)          g9<1>F          g6<8,8,1>F      -g89<8,8,1>F    { align1 1Q compacted };
mov(8)          g13<1>F         g12<16,8,2>HF                   { align1 1Q };
mov(8)          g14<1>F         g12.1<16,8,2>HF                 { align1 1Q };
mov(8)          g25<1>F         g24<16,8,2>HF                   { align1 1Q };
mov(8)          g26<1>F         g24.1<16,8,2>HF                 { align1 1Q };
add(8)          g15<1>F         g13<8,8,1>F     -g105<8,8,1>F   { align1 1Q compacted };
add(8)          g16<1>F         g14<8,8,1>F     -g89<8,8,1>F    { align1 1Q compacted };
add(8)          g27<1>F         g25<8,8,1>F     -g105<8,8,1>F   { align1 1Q compacted };
add(8)          g29<1>F         g26<8,8,1>F     -g89<8,8,1>F    { align1 1Q compacted };
(+f0) if(8)     JIP: 72         UIP: 80                         { align1 1Q };
   END B307 ->B308 ->B309
   START B308 <-B307 (52 cycles)
sel.ge(8)       g35<1>F         g15<8,8,1>F     g27<8,8,1>F     { align1 1Q compacted };
sel.ge(8)       g36<1>F         g8<8,8,1>F      g35<8,8,1>F     { align1 1Q compacted };
mul(8)          g37<1>F         g36<8,8,1>F     g103<8,8,1>F    { align1 1Q compacted };
cmp.l.f0(8)     g35<1>F         g37<8,8,1>F     -0.5F           { align1 1Q };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B308 ->B310
   START B309 <-B307 (2 cycles)
mov(8)          g35<1>UD        0x00000000UD                    { align1 1Q compacted };
   END B309 ->B310
   START B310 <-B309 <-B308 (20 cycles)
endif(8)        JIP: 768                                        { align1 1Q };
mov.nz.f0(8)    null<1>D        g35<8,8,1>D                     { align1 1Q };
(+f0) break(8)  JIP: 736        UIP: 736                        { align1 1Q };
   END B310 ->B305 ->B311
   START B311 <-B310 (18 cycles)
cmp.l.f0(8)     null<1>F        g28<8,8,1>F     0F              { align1 1Q compacted };
(+f0) if(8)     JIP: 72         UIP: 80                         { align1 1Q };
   END B311 ->B312 ->B313
   START B312 <-B311 (52 cycles)
sel.l(8)        g38<1>F         g15<8,8,1>F     g27<8,8,1>F     { align1 1Q compacted };
sel.l(8)        g39<1>F         g8<8,8,1>F      g38<8,8,1>F     { align1 1Q compacted };
mul(8)          g40<1>F         g39<8,8,1>F     g103<8,8,1>F    { align1 1Q compacted };
cmp.g.f0(8)     g36<1>F         g40<8,8,1>F     0.5F            { align1 1Q };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B312 ->B314
   START B313 <-B311 (2 cycles)
mov(8)          g36<1>UD        0x00000000UD                    { align1 1Q compacted };
   END B313 ->B314
   START B314 <-B313 <-B312 (20 cycles)
endif(8)        JIP: 632                                        { align1 1Q };
mov.nz.f0(8)    null<1>D        g36<8,8,1>D                     { align1 1Q };
(+f0) break(8)  JIP: 600        UIP: 600                        { align1 1Q };
   END B314 ->B305 ->B315
   START B315 <-B314 (148 cycles)
cmp.g.f0(8)     null<1>F        g9<8,8,1>F      0F              { align1 1Q compacted };
(-f0) sel(8)    g41<1>UD        g74<8,8,1>UD    0x00000002UD    { align1 1Q };
cmp.g.f0(8)     null<1>F        g16<8,8,1>F     0F              { align1 1Q compacted };
(-f0) sel(8)    g42<1>UD        g74<8,8,1>UD    0x00000004UD    { align1 1Q };
or(8)           g44<1>UD        g41<8,8,1>UD    g42<8,8,1>UD    { align1 1Q compacted };
cmp.g.f0(8)     null<1>F        g29<8,8,1>F     0F              { align1 1Q compacted };
(-f0) sel(8)    g43<1>UD        g74<8,8,1>UD    0x00000008UD    { align1 1Q };
or(8)           g45<1>UD        g44<8,8,1>UD    g43<8,8,1>UD    { align1 1Q compacted };
shr(8)          g46<1>UD        g80<8,8,1>UD    g45<8,8,1>UD    { align1 1Q compacted };
and.nz.f0(8)    g70<1>UD        g46<8,8,1>UD    0x00000003UD    { align1 1Q compacted };
(+f0) if(8)     JIP: 448        UIP: 448                        { align1 1Q };
   END B315 ->B316 ->B323
   START B316 <-B315 (133 cycles)
mad(8)          g50<1>F         g8<4,4,1>F      g15<4,4,1>F     -g5.1<0,1,0>F { align16 1Q };
mad(8)          g51<1>F         g9<4,4,1>F      g16<4,4,1>F     -g5.1<0,1,0>F { align16 1Q };
add(8)          g84<1>F         g8<8,8,1>F      -g15<8,8,1>F    { align1 1Q compacted };
add(8)          g102<1>F        g9<8,8,1>F      -g16<8,8,1>F    { align1 1Q compacted };
add(8)          g52<1>F         g50<8,8,1>F     g27<8,8,1>F     { align1 1Q compacted };
add(8)          g87<1>F         g51<8,8,1>F     g29<8,8,1>F     { align1 1Q compacted };
math inv(8)     g106<1>F        g87<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mul(8)          g85<1>F         g87<8,8,1>F     g9<8,8,1>F      { align1 1Q compacted };
cmp.l.f0(8)     null<1>F        (abs)g87<8,8,1>F 0.0001F        { align1 1Q };
mad(8)          g101<1>F        -g85<4,4,1>F    g102<4,4,1>F    g102<4,4,1>F { align16 1Q compacted };
sel.ge(8)       g116<1>F        g101<8,8,1>F    0F              { align1 1Q compacted };
math sqrt(8)    g48<1>F         g116<8,8,1>F    null<8,8,1>F    { align1 1Q compacted };
add(8)          g78<1>F         g102<8,8,1>F    -g48<8,8,1>F    { align1 1Q compacted };
add(8)          g66<1>F         g102<8,8,1>F    g48<8,8,1>F     { align1 1Q compacted };
mul(8)          g37<1>F         g78<8,8,1>F     g106<8,8,1>F    { align1 1Q compacted };
mul(8)          g38<1>F         g66<8,8,1>F     g106<8,8,1>F    { align1 1Q compacted };
(+f0) if(8)     JIP: 56         UIP: 56                         { align1 1Q };
   END B316 ->B317 ->B318
   START B317 <-B316 (38 cycles)
mul(8)          g90<1>F         g9<8,8,1>F      0.5F            { align1 1Q };
math inv(8)     g69<1>F         g102<8,8,1>F    null<8,8,1>F    { align1 1Q compacted };
mul(8)          g38<1>F         g90<8,8,1>F     g69<8,8,1>F     { align1 1Q compacted };
mov(8)          g37<1>D         g38<8,8,1>D                     { align1 1Q compacted };
   END B317 ->B318
   START B318 <-B316 <-B317 (65 cycles)
endif(8)        JIP: 224                                        { align1 1Q };
mul(8)          g49<1>F         g84<8,8,1>F     2F              { align1 1Q };
and.nz.f0(8)    null<1>UD       g70<8,8,1>UD    0x00000001UD    { align1 1Q compacted };
mad(8)          g71<1>F         -g49<4,4,1>F    g37<4,4,1>F     g52<4,4,1>F { align16 1Q compacted };
mad(8)          g73<1>F         -g49<4,4,1>F    g38<4,4,1>F     g52<4,4,1>F { align16 1Q compacted };
mad(8)          g72<1>F         g8<4,4,1>F      g37<4,4,1>F     g71<4,4,1>F { align16 1Q compacted };
mad(8)          g62<1>F         g8<4,4,1>F      g38<4,4,1>F     g73<4,4,1>F { align16 1Q compacted };
mul(8)          g75<1>F         g103<8,8,1>F    g72<8,8,1>F     { align1 1Q compacted };
mul(8)          g76<1>F         g103<8,8,1>F    g62<8,8,1>F     { align1 1Q compacted };
(+f0) if(8)     JIP: 48         UIP: 48                         { align1 1Q };
   END B318 ->B319 ->B320
   START B319 <-B318 (22 cycles)
mad.sat(8)      g77<1>F         g5.0<0,1,0>F    g28<4,4,1>F     g75<4,4,1>F { align16 1Q };
sel.l(8)        g32<1>F         g32<8,8,1>F     (abs)g75<8,8,1>F { align1 1Q compacted };
add(8)          g33<1>F         g33<8,8,1>F     g77<8,8,1>F     { align1 1Q compacted };
   END B319 ->B320
   START B320 <-B318 <-B319 (20 cycles)
endif(8)        JIP: 88                                         { align1 1Q };
cmp.g.f0(8)     null<1>UD       g70<8,8,1>UD    0x00000001UD    { align1 1Q compacted };
(+f0) if(8)     JIP: 48         UIP: 48                         { align1 1Q };
   END B320 ->B321 ->B322
   START B321 <-B320 (22 cycles)
mad.sat(8)      g65<1>F         g5.0<0,1,0>F    g28<4,4,1>F     g76<4,4,1>F { align16 1Q };
sel.l(8)        g32<1>F         g32<8,8,1>F     (abs)g76<8,8,1>F { align1 1Q compacted };
add(8)          g33<1>F         g33<8,8,1>F     -g65<8,8,1>F    { align1 1Q compacted };
   END B321 ->B322
   START B322 <-B320 <-B321 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B322 ->B323
   START B323 <-B315 <-B322 (8 cycles)
endif(8)        JIP: 32                                         { align1 1Q };
add(8)          g31<1>D         g31<8,8,1>D     3D              { align1 1Q compacted };
add(8)          g34<1>D         g34<8,8,1>D     1D              { align1 1Q compacted };
while(8)        JIP: -1136                                      { align1 1Q };
   END B323 ->B306
   START B324 <-B305 (10 cycles)
mov(8)          g39<1>F         (abs)g33<8,8,1>F                { align1 1Q compacted };
add(8)          g40<1>D         g127<8,8,1>D    g100<8,8,1>D    { align1 1Q compacted };
mov(8)          g43<1>UD        0x00000000UD                    { align1 1Q compacted };
mov(8)          g42<1>UD        0x00000000UD                    { align1 1Q compacted };
mov(8)          g41<1>D         1056964608D                     { align1 1Q };
   END B324 ->B325
   START B326 <-B325 <-B343 (18 cycles)
cmp.ge.f0(8)    null<1>UD       g43<8,8,1>UD    g126<8,8,1>UD   { align1 1Q compacted };
   END B325 ->B326 ->B344
(+f0) break(8)  JIP: 1128       UIP: 1128                       { align1 1Q };
   END B326 ->B325 ->B327
   START B327 <-B326 (664 cycles)
shl(8)          g44<1>D         g40<8,8,1>D     0x00000002UD    { align1 1Q };
add(8)          g55<1>D         g40<8,8,1>D     1D              { align1 1Q compacted };
add(8)          g67<1>D         g40<8,8,1>D     2D              { align1 1Q compacted };
cmp.g.f0(8)     null<1>F        g30<8,8,1>F     0F              { align1 1Q compacted };
send(8)         g79<1>UW        g44<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
shl(8)          g45<1>D         g55<8,8,1>D     0x00000002UD    { align1 1Q };
shl(8)          g46<1>D         g67<8,8,1>D     0x00000002UD    { align1 1Q };
send(8)         g59<1>UW        g45<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
send(8)         g91<1>UW        g46<8,8,1>UD
                            dp data 1 ( untyped surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q };
mov(8)          g57<1>F         g79<16,8,2>HF                   { align1 1Q };
mov(8)          g81<1>F         g79.1<16,8,2>HF                 { align1 1Q };
add(8)          g82<1>F         g57<8,8,1>F     -g89<8,8,1>F    { align1 1Q compacted };
add(8)          g83<1>F         g81<8,8,1>F     -g105<8,8,1>F   { align1 1Q compacted };
mov(8)          g53<1>F         g59<16,8,2>HF                   { align1 1Q };
mov(8)          g54<1>F         g59.1<16,8,2>HF                 { align1 1Q };
mov(8)          g92<1>F         g91<16,8,2>HF                   { align1 1Q };
mov(8)          g93<1>F         g91.1<16,8,2>HF                 { align1 1Q };
add(8)          g88<1>F         g53<8,8,1>F     -g89<8,8,1>F    { align1 1Q compacted };
add(8)          g64<1>F         g54<8,8,1>F     -g105<8,8,1>F   { align1 1Q compacted };
add(8)          g94<1>F         g92<8,8,1>F     -g89<8,8,1>F    { align1 1Q compacted };
add(8)          g95<1>F         g93<8,8,1>F     -g105<8,8,1>F   { align1 1Q compacted };
(+f0) if(8)     JIP: 72         UIP: 80                         { align1 1Q };
   END B327 ->B328 ->B329
   START B328 <-B327 (52 cycles)
sel.ge(8)       g96<1>F         g88<8,8,1>F     g94<8,8,1>F     { align1 1Q compacted };
sel.ge(8)       g97<1>F         g82<8,8,1>F     g96<8,8,1>F     { align1 1Q compacted };
mul(8)          g98<1>F         g97<8,8,1>F     g104<8,8,1>F    { align1 1Q compacted };
cmp.l.f0(8)     g44<1>F         g98<8,8,1>F     -0.5F           { align1 1Q };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B328 ->B330
   START B329 <-B327 (2 cycles)
mov(8)          g44<1>UD        0x00000000UD                    { align1 1Q compacted };
   END B329 ->B330
   START B330 <-B329 <-B328 (20 cycles)
endif(8)        JIP: 768                                        { align1 1Q };
mov.nz.f0(8)    null<1>D        g44<8,8,1>D                     { align1 1Q };
(+f0) break(8)  JIP: 736        UIP: 736                        { align1 1Q };
   END B330 ->B325 ->B331
   START B331 <-B330 (18 cycles)
cmp.l.f0(8)     null<1>F        g30<8,8,1>F     0F              { align1 1Q compacted };
(+f0) if(8)     JIP: 72         UIP: 80                         { align1 1Q };
   END B331 ->B332 ->B333
   START B332 <-B331 (52 cycles)
sel.l(8)        g99<1>F         g88<8,8,1>F     g94<8,8,1>F     { align1 1Q compacted };
sel.l(8)        g100<1>F        g82<8,8,1>F     g99<8,8,1>F     { align1 1Q compacted };
mul(8)          g60<1>F         g100<8,8,1>F    g104<8,8,1>F    { align1 1Q compacted };
cmp.g.f0(8)     g45<1>F         g60<8,8,1>F     0.5F            { align1 1Q };
else(8)         JIP: 24         UIP: 24                         { align1 1Q };
   END B332 ->B334
   START B333 <-B331 (2 cycles)
mov(8)          g45<1>UD        0x00000000UD                    { align1 1Q compacted };
   END B333 ->B334
   START B334 <-B333 <-B332 (20 cycles)
endif(8)        JIP: 632                                        { align1 1Q };
mov.nz.f0(8)    null<1>D        g45<8,8,1>D                     { align1 1Q };
(+f0) break(8)  JIP: 600        UIP: 600                        { align1 1Q };
   END B334 ->B325 ->B335
   START B335 <-B334 (148 cycles)
cmp.g.f0(8)     null<1>F        g83<8,8,1>F     0F              { align1 1Q compacted };
(-f0) sel(8)    g103<1>UD       g74<8,8,1>UD    0x00000002UD    { align1 1Q };
cmp.g.f0(8)     null<1>F        g64<8,8,1>F     0F              { align1 1Q compacted };
(-f0) sel(8)    g47<1>UD        g74<8,8,1>UD    0x00000004UD    { align1 1Q };
or(8)           g107<1>UD       g103<8,8,1>UD   g47<8,8,1>UD    { align1 1Q compacted };
cmp.g.f0(8)     null<1>F        g95<8,8,1>F     0F              { align1 1Q compacted };
(-f0) sel(8)    g58<1>UD        g74<8,8,1>UD    0x00000008UD    { align1 1Q };
or(8)           g108<1>UD       g107<8,8,1>UD   g58<8,8,1>UD    { align1 1Q compacted };
shr(8)          g109<1>UD       g80<8,8,1>UD    g108<8,8,1>UD   { align1 1Q compacted };
and.nz.f0(8)    g110<1>UD       g109<8,8,1>UD   0x00000003UD    { align1 1Q compacted };
(+f0) if(8)     JIP: 448        UIP: 448                        { align1 1Q };
   END B335 ->B336 ->B343
   START B336 <-B335 (132 cycles)
mad(8)          g111<1>F        g82<4,4,1>F     g88<4,4,1>F     -g5.1<0,1,0>F { align16 1Q };
mad(8)          g112<1>F        g83<4,4,1>F     g64<4,4,1>F     -g5.1<0,1,0>F { align16 1Q };
add(8)          g115<1>F        g82<8,8,1>F     -g88<8,8,1>F    { align1 1Q compacted };
add(8)          g61<1>F         g83<8,8,1>F     -g64<8,8,1>F    { align1 1Q compacted };
add(8)          g113<1>F        g111<8,8,1>F    g94<8,8,1>F     { align1 1Q compacted };
add(8)          g114<1>F        g112<8,8,1>F    g95<8,8,1>F     { align1 1Q compacted };
math inv(8)     g117<1>F        g114<8,8,1>F    null<8,8,1>F    { align1 1Q compacted };
mul(8)          g118<1>F        g114<8,8,1>F    g83<8,8,1>F     { align1 1Q compacted };
cmp.l.f0(8)     null<1>F        (abs)g114<8,8,1>F 0.0001F       { align1 1Q };
mad(8)          g119<1>F        -g118<4,4,1>F   g61<4,4,1>F     g61<4,4,1>F { align16 1Q compacted };
sel.ge(8)       g120<1>F        g119<8,8,1>F    0F              { align1 1Q compacted };
math sqrt(8)    g121<1>F        g120<8,8,1>F    null<8,8,1>F    { align1 1Q compacted };
add(8)          g122<1>F        g61<8,8,1>F     -g121<8,8,1>F   { align1 1Q compacted };
add(8)          g123<1>F        g61<8,8,1>F     g121<8,8,1>F    { align1 1Q compacted };
mul(8)          g46<1>F         g122<8,8,1>F    g117<8,8,1>F    { align1 1Q compacted };
mul(8)          g70<1>F         g123<8,8,1>F    g117<8,8,1>F    { align1 1Q compacted };
(+f0) if(8)     JIP: 56         UIP: 56                         { align1 1Q };
   END B336 ->B337 ->B338
   START B337 <-B336 (38 cycles)
mul(8)          g124<1>F        g83<8,8,1>F     0.5F            { align1 1Q };
math inv(8)     g125<1>F        g61<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mul(8)          g70<1>F         g124<8,8,1>F    g125<8,8,1>F    { align1 1Q compacted };
mov(8)          g46<1>D         g70<8,8,1>D                     { align1 1Q compacted };
   END B337 ->B338
   START B338 <-B336 <-B337 (65 cycles)
endif(8)        JIP: 224                                        { align1 1Q };
mul(8)          g127<1>F        g115<8,8,1>F    2F              { align1 1Q };
and.nz.f0(8)    null<1>UD       g110<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
mad(8)          g2<1>F          -g127<4,4,1>F   g46<4,4,1>F     g113<4,4,1>F { align16 1Q compacted };
mad(8)          g4<1>F          -g127<4,4,1>F   g70<4,4,1>F     g113<4,4,1>F { align16 1Q compacted };
mad(8)          g3<1>F          g82<4,4,1>F     g46<4,4,1>F     g2<4,4,1>F { align16 1Q compacted };
mad(8)          g6<1>F          g82<4,4,1>F     g70<4,4,1>F     g4<4,4,1>F { align16 1Q compacted };
mul(8)          g8<1>F          g104<8,8,1>F    g3<8,8,1>F      { align1 1Q compacted };
mul(8)          g9<1>F          g104<8,8,1>F    g6<8,8,1>F      { align1 1Q compacted };
(+f0) if(8)     JIP: 48         UIP: 48                         { align1 1Q };
   END B338 ->B339 ->B340
   START B339 <-B338 (23 cycles)
mad.sat(8)      g11<1>F         g5.0<0,1,0>F    g30<4,4,1>F     g8<4,4,1>F { align16 1Q };
sel.l(8)        g41<1>F         g41<8,8,1>F     (abs)g8<8,8,1>F { align1 1Q compacted };
add(8)          g42<1>F         g42<8,8,1>F     g11<8,8,1>F     { align1 1Q compacted };
   END B339 ->B340
   START B340 <-B338 <-B339 (20 cycles)
endif(8)        JIP: 88                                         { align1 1Q };
cmp.g.f0(8)     null<1>UD       g110<8,8,1>UD   0x00000001UD    { align1 1Q compacted };
(+f0) if(8)     JIP: 48         UIP: 48                         { align1 1Q };
   END B340 ->B341 ->B342
   START B341 <-B340 (22 cycles)
mad.sat(8)      g12<1>F         g5.0<0,1,0>F    g30<4,4,1>F     g9<4,4,1>F { align16 1Q };
sel.l(8)        g41<1>F         g41<8,8,1>F     (abs)g9<8,8,1>F { align1 1Q compacted };
add(8)          g42<1>F         g42<8,8,1>F     -g12<8,8,1>F    { align1 1Q compacted };
   END B341 ->B342
   START B342 <-B340 <-B341 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B342 ->B343
   START B343 <-B335 <-B342 (8 cycles)
endif(8)        JIP: 32                                         { align1 1Q };
add(8)          g40<1>D         g40<8,8,1>D     3D              { align1 1Q compacted };
add(8)          g43<1>D         g43<8,8,1>D     1D              { align1 1Q compacted };
while(8)        JIP: -1136                                      { align1 1Q };
   END B343 ->B326
   START B344 <-B325 (20 cycles)
mov(8)          g50<1>F         (abs)g42<8,8,1>F                { align1 1Q compacted };
mov.nz.f0(8)    null<1>D        g56<8,8,1>D                     { align1 1Q };
(+f0) if(8)     JIP: 96         UIP: 96                         { align1 1Q };
   END B344 ->B345 ->B346
   START B345 <-B344 (36 cycles)
mul(8)          g13<1>F         (abs)g33<8,8,1>F 0.5F           { align1 1Q };
mul(8)          g14<1>F         (abs)g42<8,8,1>F 0.5F           { align1 1Q };
frc(8)          g15<1>F         g13<8,8,1>F                     { align1 1Q compacted };
frc(8)          g16<1>F         g14<8,8,1>F                     { align1 1Q compacted };
mul(8)          g39<1>F         g15<8,8,1>F     2F              { align1 1Q };
mul(8)          g50<1>F         g16<8,8,1>F     2F              { align1 1Q };
   END B345 ->B346
   START B346 <-B344 <-B345 (75 cycles)
endif(8)        JIP: 296                                        { align1 1Q };
sel.sat.l(8)    g21<1>F         (abs)g32<8,8,1>F 0.5F           { align1 1Q };
sel.sat.l(8)    g24<1>F         (abs)g41<8,8,1>F 0.5F           { align1 1Q };
mad(8)          g25<1>F         g68.5<0,1,0>F   g21<4,4,1>F     -g5.1<0,1,0>F { align16 1Q };
mad(8)          g26<1>F         g68.5<0,1,0>F   g24<4,4,1>F     -g5.1<0,1,0>F { align16 1Q };
add(8)          g27<1>F         g25<8,8,1>F     g26<8,8,1>F     { align1 1Q compacted };
cmp.g.f0(8)     null<1>F        g27<8,8,1>F     0.001F          { align1 1Q };
(+f0) if(8)     JIP: 64         UIP: 88                         { align1 1Q };
   END B346 ->B347 ->B348
   START B347 <-B346 (41 cycles)
mul(8)          g28<1>F         g50<8,8,1>F     g26<8,8,1>F     { align1 1Q compacted };
math inv(8)     g30<1>F         g27<8,8,1>F     null<8,8,1>F    { align1 1Q compacted };
mad(8)          g29<1>F         g28<4,4,1>F     g25<4,4,1>F     g39<4,4,1>F { align16 1Q compacted };
mul(8)          g20<1>F         g29<8,8,1>F     g30<8,8,1>F     { align1 1Q compacted };
else(8)         JIP: 40         UIP: 40                         { align1 1Q };
   END B347 ->B349
   START B348 <-B346 (18 cycles)
add(8)          g31<1>F         g39<8,8,1>F     g50<8,8,1>F     { align1 1Q compacted };
mul(8)          g20<1>F         g31<8,8,1>F     0.5F            { align1 1Q };
   END B348 ->B349
   START B349 <-B348 <-B347 (20 cycles)
endif(8)        JIP: 104                                        { align1 1Q };
and.nz.f0(8)    null<1>UD       g7.3<0,1,0>UD   0x40000000UD    { align1 1Q };
(+f0) if(8)     JIP: 32         UIP: 32                         { align1 1Q };
   END B349 ->B350 ->B351
   START B350 <-B349 (2 cycles)
add(8)          g20<1>F         -g20<8,8,1>F    1F              { align1 1Q };
   END B350 ->B351
   START B351 <-B349 <-B350 (8 cycles)
endif(8)        JIP: 40                                         { align1 1Q };
mov(8)          g17<1>D         g20<8,8,1>D                     { align1 1Q compacted };
mov(8)          g18<1>D         g20<8,8,1>D                     { align1 1Q compacted };
mov(8)          g19<1>D         g20<8,8,1>D                     { align1 1Q compacted };
   END B351 ->B352
   START B352 <-B297 <-B351 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B352 ->B353
   START B353 <-B352 <-B296 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B353 ->B354
   START B354 <-B353 <-B185 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B354 ->B355
   START B355 <-B354 <-B159 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B355 ->B356
   START B356 <-B355 <-B133 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 80         UIP: 80                         { align1 1Q };
   END B356 ->B358
   START B357 <-B131 (8 cycles)
mov(8)          g17<1>D         1065353216D                     { align1 1Q };
mov(8)          g18<1>D         1065353216D                     { align1 1Q };
mov(8)          g19<1>D         1065353216D                     { align1 1Q };
mov(8)          g20<1>D         1065353216D                     { align1 1Q };
   END B357 ->B358
   START B358 <-B357 <-B356 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 80         UIP: 80                         { align1 1Q };
   END B358 ->B360
   START B359 <-B130 (8 cycles)
mov(8)          g17<1>D         1065353216D                     { align1 1Q };
mov(8)          g18<1>D         1065353216D                     { align1 1Q };
mov(8)          g19<1>D         1065353216D                     { align1 1Q };
mov(8)          g20<1>D         1065353216D                     { align1 1Q };
   END B359 ->B360
   START B360 <-B359 <-B358 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B360 ->B361
   START B361 <-B360 <-B129 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B361 ->B362
   START B362 <-B361 <-B127 (12 cycles)
endif(8)        JIP: 48                                         { align1 1Q };
mul(8)          g120<1>F        g63<8,8,1>F     g20<8,8,1>F     { align1 1Q compacted };
mul(8)          g121<1>F        g86<8,8,1>F     g19<8,8,1>F     { align1 1Q compacted };
mul(8)          g122<1>F        g23<8,8,1>F     g18<8,8,1>F     { align1 1Q compacted };
mul(8)          g123<1>F        g22<8,8,1>F     g17<8,8,1>F     { align1 1Q compacted };
else(8)         JIP: 48         UIP: 48                         { align1 1Q };
   END B362 ->B364
   START B363 <-B0 (8 cycles)
mov(8)          g123<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g122<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g121<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g120<1>UD       0x00000000UD                    { align1 1Q compacted };
   END B363 ->B364
   START B364 <-B363 <-B362 (20 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
cmp.nz.f0(8)    null<1>D        g10.7<0,1,0>D   1D              { align1 1Q };
(+f0) if(8)     JIP: 1648       UIP: 1712                       { align1 1Q };
   END B364 ->B365 ->B407
   START B365 <-B364 (18 cycles)
cmp.nz.f0(8)    null<1>D        g10.7<0,1,0>D   2D              { align1 1Q };
(+f0) if(8)     JIP: 1552       UIP: 1584                       { align1 1Q };
   END B365 ->B366 ->B405
   START B366 <-B365 (18 cycles)
cmp.nz.f0(8)    null<1>D        g10.7<0,1,0>D   3D              { align1 1Q };
(+f0) if(8)     JIP: 1392       UIP: 1488                       { align1 1Q };
   END B366 ->B367 ->B403
   START B367 <-B366 (18 cycles)
cmp.z.f0(8)     null<1>D        g10.7<0,1,0>D   4D              { align1 1Q };
(+f0) if(8)     JIP: 72         UIP: 1328                       { align1 1Q };
   END B367 ->B368 ->B369
   START B368 <-B367 (24 cycles)
add(8)          g124<1>F        -g123<8,8,1>F   1F              { align1 1Q };
mov(8)          g127<1>D        g124<8,8,1>D                    { align1 1Q compacted };
mov(8)          g126<1>D        g124<8,8,1>D                    { align1 1Q compacted };
mov(8)          g125<1>D        g124<8,8,1>D                    { align1 1Q compacted };
else(8)         JIP: 1272       UIP: 1272                       { align1 1Q };
   END B368 ->B402
   START B369 <-B367 (18 cycles)
cmp.nz.f0(8)    null<1>D        g10.7<0,1,0>D   5D              { align1 1Q };
(+f0) if(8)     JIP: 1160       UIP: 1224                       { align1 1Q };
   END B369 ->B370 ->B400
   START B370 <-B369 (18 cycles)
cmp.nz.f0(8)    null<1>D        g10.7<0,1,0>D   6D              { align1 1Q };
(+f0) if(8)     JIP: 1064       UIP: 1096                       { align1 1Q };
   END B370 ->B371 ->B398
   START B371 <-B370 (18 cycles)
cmp.nz.f0(8)    null<1>D        g10.7<0,1,0>D   7D              { align1 1Q };
(+f0) if(8)     JIP: 936        UIP: 1000                       { align1 1Q };
   END B371 ->B372 ->B396
   START B372 <-B371 (18 cycles)
cmp.nz.f0(8)    null<1>D        g10.7<0,1,0>D   8D              { align1 1Q };
(+f0) if(8)     JIP: 840        UIP: 872                        { align1 1Q };
   END B372 ->B373 ->B394
   START B373 <-B372 (18 cycles)
cmp.z.f0(8)     null<1>D        g10.7<0,1,0>D   9D              { align1 1Q };
(+f0) if(8)     JIP: 104        UIP: 776                        { align1 1Q };
   END B373 ->B374 ->B375
   START B374 <-B373 (24 cycles)
add(8)          g124<1>F        -g123<8,8,1>F   1F              { align1 1Q };
mov(8)          g122<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g121<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g120<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g123<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g127<1>D        g124<8,8,1>D                    { align1 1Q compacted };
mov(8)          g126<1>D        g124<8,8,1>D                    { align1 1Q compacted };
mov(8)          g125<1>D        g124<8,8,1>D                    { align1 1Q compacted };
else(8)         JIP: 688        UIP: 688                        { align1 1Q };
   END B374 ->B393
   START B375 <-B373 (18 cycles)
cmp.z.f0(8)     null<1>D        g10.7<0,1,0>D   10D             { align1 1Q };
(+f0) if(8)     JIP: 72         UIP: 640                        { align1 1Q };
   END B375 ->B376 ->B377
   START B376 <-B375 (24 cycles)
add(8)          g124<1>F        -g123<8,8,1>F   1F              { align1 1Q };
mov(8)          g127<1>D        g124<8,8,1>D                    { align1 1Q compacted };
mov(8)          g126<1>D        g124<8,8,1>D                    { align1 1Q compacted };
mov(8)          g125<1>D        g124<8,8,1>D                    { align1 1Q compacted };
else(8)         JIP: 584        UIP: 584                        { align1 1Q };
   END B376 ->B392
   START B377 <-B375 (18 cycles)
cmp.nz.f0(8)    null<1>D        g10.7<0,1,0>D   11D             { align1 1Q };
(+f0) if(8)     JIP: 504        UIP: 536                        { align1 1Q };
   END B377 ->B378 ->B390
   START B378 <-B377 (18 cycles)
cmp.z.f0(8)     null<1>D        g10.7<0,1,0>D   12D             { align1 1Q };
(+f0) if(8)     JIP: 72         UIP: 440                        { align1 1Q };
   END B378 ->B379 ->B380
   START B379 <-B378 (24 cycles)
add(8)          g124<1>F        -g123<8,8,1>F   1F              { align1 1Q };
mov(8)          g127<1>D        g124<8,8,1>D                    { align1 1Q compacted };
mov(8)          g126<1>D        g124<8,8,1>D                    { align1 1Q compacted };
mov(8)          g125<1>D        g124<8,8,1>D                    { align1 1Q compacted };
else(8)         JIP: 384        UIP: 384                        { align1 1Q };
   END B379 ->B389
   START B380 <-B378 (18 cycles)
cmp.nz.f0(8)    null<1>D        g10.7<0,1,0>D   13D             { align1 1Q };
(+f0) if(8)     JIP: 272        UIP: 336                        { align1 1Q };
   END B380 ->B381 ->B387
   START B381 <-B380 (18 cycles)
cmp.nz.f0(8)    null<1>D        g10.7<0,1,0>D   14D             { align1 1Q };
(+f0) if(8)     JIP: 144        UIP: 208                        { align1 1Q };
   END B381 ->B382 ->B385
   START B382 <-B381 (18 cycles)
cmp.z.f0(8)     null<1>D        g10.7<0,1,0>D   15D             { align1 1Q };
(+f0) if(8)     JIP: 80         UIP: 80                         { align1 1Q };
   END B382 ->B383 ->B384
   START B383 <-B382 (8 cycles)
add(8)          g124<1>F        -g120<8,8,1>F   1F              { align1 1Q };
add(8)          g125<1>F        -g121<8,8,1>F   1F              { align1 1Q };
add(8)          g126<1>F        -g122<8,8,1>F   1F              { align1 1Q };
add(8)          g127<1>F        -g123<8,8,1>F   1F              { align1 1Q };
   END B383 ->B384
   START B384 <-B382 <-B383 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 80         UIP: 80                         { align1 1Q };
   END B384 ->B386
   START B385 <-B381 (16 cycles)
mov(8)          g127<1>D        g123<8,8,1>D                    { align1 1Q compacted };
mov(8)          g126<1>D        g122<8,8,1>D                    { align1 1Q compacted };
mov(8)          g125<1>D        g121<8,8,1>D                    { align1 1Q compacted };
mov(8)          g124<1>D        g120<8,8,1>D                    { align1 1Q compacted };
mov(8)          g123<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g122<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g121<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g120<1>UD       0x00000000UD                    { align1 1Q compacted };
   END B385 ->B386
   START B386 <-B385 <-B384 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 80         UIP: 80                         { align1 1Q };
   END B386 ->B388
   START B387 <-B380 (8 cycles)
mov(8)          g127<1>D        1065353216D                     { align1 1Q };
mov(8)          g126<1>D        1065353216D                     { align1 1Q };
mov(8)          g125<1>D        1065353216D                     { align1 1Q };
mov(8)          g124<1>D        1065353216D                     { align1 1Q };
   END B387 ->B388
   START B388 <-B387 <-B386 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B388 ->B389
   START B389 <-B388 <-B379 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 48         UIP: 48                         { align1 1Q };
   END B389 ->B391
   START B390 <-B377 (8 cycles)
mov(8)          g127<1>D        g123<8,8,1>D                    { align1 1Q compacted };
mov(8)          g126<1>D        g123<8,8,1>D                    { align1 1Q compacted };
mov(8)          g125<1>D        g123<8,8,1>D                    { align1 1Q compacted };
mov(8)          g124<1>D        g123<8,8,1>D                    { align1 1Q compacted };
   END B390 ->B391
   START B391 <-B390 <-B389 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B391 ->B392
   START B392 <-B391 <-B376 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B392 ->B393
   START B393 <-B392 <-B374 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 48         UIP: 48                         { align1 1Q };
   END B393 ->B395
   START B394 <-B372 (8 cycles)
mov(8)          g127<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g126<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g125<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g124<1>UD       0x00000000UD                    { align1 1Q compacted };
   END B394 ->B395
   START B395 <-B394 <-B393 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 80         UIP: 80                         { align1 1Q };
   END B395 ->B397
   START B396 <-B371 (28 cycles)
mov(8)          g122<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g121<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g120<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g127<1>D        g123<8,8,1>D                    { align1 1Q compacted };
mov(8)          g123<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g126<1>D        g127<8,8,1>D                    { align1 1Q compacted };
mov(8)          g125<1>D        g127<8,8,1>D                    { align1 1Q compacted };
mov(8)          g124<1>D        g127<8,8,1>D                    { align1 1Q compacted };
   END B396 ->B397
   START B397 <-B396 <-B395 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 48         UIP: 48                         { align1 1Q };
   END B397 ->B399
   START B398 <-B370 (8 cycles)
mov(8)          g127<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g126<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g125<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g124<1>UD       0x00000000UD                    { align1 1Q compacted };
   END B398 ->B399
   START B399 <-B398 <-B397 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 80         UIP: 80                         { align1 1Q };
   END B399 ->B401
   START B400 <-B369 (8 cycles)
mov(8)          g127<1>D        1065353216D                     { align1 1Q };
mov(8)          g126<1>D        1065353216D                     { align1 1Q };
mov(8)          g125<1>D        1065353216D                     { align1 1Q };
mov(8)          g124<1>D        1065353216D                     { align1 1Q };
   END B400 ->B401
   START B401 <-B400 <-B399 (2 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
   END B401 ->B402
   START B402 <-B401 <-B368 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 112        UIP: 112                        { align1 1Q };
   END B402 ->B404
   START B403 <-B366 (16 cycles)
mov(8)          g123<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g122<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g121<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g120<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g127<1>D        1065353216D                     { align1 1Q };
mov(8)          g126<1>D        1065353216D                     { align1 1Q };
mov(8)          g125<1>D        1065353216D                     { align1 1Q };
mov(8)          g124<1>D        1065353216D                     { align1 1Q };
   END B403 ->B404
   START B404 <-B403 <-B402 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 48         UIP: 48                         { align1 1Q };
   END B404 ->B406
   START B405 <-B365 (8 cycles)
mov(8)          g127<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g126<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g125<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g124<1>UD       0x00000000UD                    { align1 1Q compacted };
   END B405 ->B406
   START B406 <-B405 <-B404 (4 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
else(8)         JIP: 80         UIP: 80                         { align1 1Q };
   END B406 ->B408
   START B407 <-B364 (16 cycles)
mov(8)          g123<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g122<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g121<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g120<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g127<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g126<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g125<1>UD       0x00000000UD                    { align1 1Q compacted };
mov(8)          g124<1>UD       0x00000000UD                    { align1 1Q compacted };
   END B407 ->B408
   START B408 <-B407 <-B406 (22 cycles)
endif(8)        JIP: 16                                         { align1 1Q };
mov(16)         g118<1>UD       g0<8,8,1>UD                     { align1 WE_all 1H compacted };
sendc(8)        null<1>UW       g118<0,1,0>F
                            render RT write SIMD8/DualSrcLow LastRT Surface = 0 mlen 10 rlen 0 { align1 1Q EOT };
   END B408

NIR (SSA form) for fragment shader:
shader: MESA_SHADER_FRAGMENT
name: BLORP-blit
inputs: 0
outputs: 0
uniforms: 0
shared: 0
decl_var shader_in INTERP_MODE_FLAT vec4 coord_transform (VARYING_SLOT_VAR3, 34, 0)
decl_var shader_in INTERP_MODE_FLAT uint src_z (VARYING_SLOT_VAR5.z, 36, 0)
decl_var shader_in INTERP_MODE_SMOOTH vec4 gl_FragCoord (VARYING_SLOT_POS, 0, 0)
decl_var shader_out INTERP_MODE_NONE vec4 gl_FragColor (FRAG_RESULT_COLOR, 4, 0)
decl_function main (0 params)

impl main {
	block block_0:
	/* preds: */
	vec2 32 ssa_0 = intrinsic load_barycentric_pixel () (1) /* interp_mode=1 */
	vec1 32 ssa_1 = load_const (0x00000000 /* 0.000000 */)
	vec4 32 ssa_2 = intrinsic load_interpolated_input (ssa_0, ssa_1) (0, 0) /* base=0 */ /* component=0 */
	vec1 32 ssa_3 = f2i32 ssa_2.x
	vec1 32 ssa_4 = f2i32 ssa_2.y
	vec1 32 ssa_5 = i2f32 ssa_3
	vec1 32 ssa_6 = i2f32 ssa_4
	vec4 32 ssa_7 = intrinsic load_input (ssa_1) (34, 0) /* base=34 */ /* component=0 */	/* coord_transform */
	vec1 32 ssa_8 = ffma ssa_5, ssa_7.x, ssa_7.y
	vec1 32 ssa_9 = ffma ssa_6, ssa_7.z, ssa_7.w
	vec1 32 ssa_10 = f2i32 ssa_8
	vec1 32 ssa_11 = f2i32 ssa_9
	vec1 32 ssa_12 = intrinsic load_input (ssa_1) (36, 2) /* base=36 */ /* component=2 */	/* src_z */
	vec3 32 ssa_13 = vec3 ssa_10, ssa_11, ssa_12
	vec4 32 ssa_14 = txf ssa_13 (coord), ssa_1 (lod), 0 (texture), 0 (sampler), 
	intrinsic store_output (ssa_14, ssa_1) (4, 15, 0) /* base=4 */ /* wrmask=xyzw */ /* component=0 */	/* gl_FragColor */
	/* succs: block_0 */
	block block_0:
}

NIR (final form) for fragment shader:
shader: MESA_SHADER_FRAGMENT
name: BLORP-blit
inputs: 0
outputs: 0
uniforms: 0
shared: 0
decl_var shader_in INTERP_MODE_FLAT vec4 coord_transform (VARYING_SLOT_VAR3, 34, 0)
decl_var shader_in INTERP_MODE_FLAT uint src_z (VARYING_SLOT_VAR5.z, 36, 0)
decl_var shader_in INTERP_MODE_SMOOTH vec4 gl_FragCoord (VARYING_SLOT_POS, 0, 0)
decl_var shader_out INTERP_MODE_NONE vec4 gl_FragColor (FRAG_RESULT_COLOR, 4, 0)
decl_function main (0 params)

impl main {
	block block_0:
	/* preds: */
	vec2 32 ssa_0 = intrinsic load_barycentric_pixel () (1) /* interp_mode=1 */
	vec1 32 ssa_1 = load_const (0x00000000 /* 0.000000 */)
	vec4 32 ssa_2 = intrinsic load_interpolated_input (ssa_0, ssa_1) (0, 0) /* base=0 */ /* component=0 */
	vec1 32 ssa_3 = f2i32 ssa_2.x
	vec1 32 ssa_4 = f2i32 ssa_2.y
	vec1 32 ssa_5 = i2f32 ssa_3
	vec1 32 ssa_6 = i2f32 ssa_4
	vec4 32 ssa_7 = intrinsic load_input (ssa_1) (34, 0) /* base=34 */ /* component=0 */	/* coord_transform */
	vec1 32 ssa_8 = ffma ssa_5, ssa_7.x, ssa_7.y
	vec1 32 ssa_9 = ffma ssa_6, ssa_7.z, ssa_7.w
	vec1 32 ssa_10 = f2i32 ssa_8
	vec1 32 ssa_11 = f2i32 ssa_9
	vec1 32 ssa_12 = intrinsic load_input (ssa_1) (36, 2) /* base=36 */ /* component=2 */	/* src_z */
	vec3 32 ssa_13 = vec3 ssa_10, ssa_11, ssa_12
	vec4 32 ssa_14 = txf ssa_13 (coord), ssa_1 (lod), 0 (texture), 0 (sampler), 
	intrinsic store_output (ssa_14, ssa_1) (4, 15, 0) /* base=4 */ /* wrmask=xyzw */ /* component=0 */	/* gl_FragColor */
	/* succs: block_0 */
	block block_0:
}

Native code for unnamed fragment shader BLORP-blit
SIMD8 shader: 14 instructions. 0 loops. 308 cycles. 0:0 spills:fills. Promoted 0 constants. Compacted 224 to 160 bytes (29%)
   START B0 (308 cycles)
add(16)         g6<1>UW         g1.4<1,4,0>UW   0x11001010V     { align1 WE_all 1H };
mov(8)          g15<1>F         g7.3<0,1,0>F                    { align1 1Q compacted };
mov(8)          g2<1>F          g6<8,4,1>UW                     { align1 1Q };
mov(8)          g3<1>F          g6.4<8,4,1>UW                   { align1 1Q };
mov(8)          g7<1>D          g2<8,8,1>F                      { align1 1Q compacted };
mov(8)          g8<1>D          g3<8,8,1>F                      { align1 1Q compacted };
mov(8)          g9<1>F          g7<8,8,1>D                      { align1 1Q compacted };
mov(8)          g10<1>F         g8<8,8,1>D                      { align1 1Q compacted };
mad(8)          g11<1>F         g4.7<0,1,0>F    g4.3<0,1,0>F    g9<4,4,1>F { align16 1Q compacted };
mad(8)          g12<1>F         g5.7<0,1,0>F    g5.3<0,1,0>F    g10<4,4,1>F { align16 1Q compacted };
mov(8)          g13<1>D         g11<8,8,1>F                     { align1 1Q compacted };
mov(8)          g14<1>D         g12<8,8,1>F                     { align1 1Q compacted };
send(8)         g124<1>UW       g13<0,1,0>F
                            sampler ld_lz SIMD8 Surface = 1 Sampler = 0 mlen 3 rlen 4 { align1 1Q };
sendc(8)        null<1>UW       g124<0,1,0>F
                            render RT write SIMD8 LastRT Surface = 0 mlen 4 rlen 0 { align1 1Q EOT };
   END B0

Native code for unnamed fragment shader BLORP-blit
SIMD16 shader: 14 instructions. 0 loops. 322 cycles. 0:0 spills:fills. Promoted 0 constants. Compacted 224 to 160 bytes (29%)
   START B0 (322 cycles)
add(32)         g10<1>UW        g1.4<1,4,0>UW   0x11001010V     { align1 WE_all };
mov(16)         g27<1>F         g9.3<0,1,0>F                    { align1 1H compacted };
mov(16)         g2<1>F          g10<8,4,1>UW                    { align1 1H };
mov(16)         g4<1>F          g10.4<8,4,1>UW                  { align1 1H };
mov(16)         g11<1>D         g2<8,8,1>F                      { align1 1H compacted };
mov(16)         g13<1>D         g4<8,8,1>F                      { align1 1H compacted };
mov(16)         g15<1>F         g11<8,8,1>D                     { align1 1H compacted };
mov(16)         g17<1>F         g13<8,8,1>D                     { align1 1H compacted };
mad(16)         g19<1>F         g6.7<0,1,0>F    g6.3<0,1,0>F    g15<4,4,1>F { align16 1H compacted };
mad(16)         g21<1>F         g7.7<0,1,0>F    g7.3<0,1,0>F    g17<4,4,1>F { align16 1H compacted };
mov(16)         g23<1>D         g19<8,8,1>F                     { align1 1H compacted };
mov(16)         g25<1>D         g21<8,8,1>F                     { align1 1H compacted };
send(16)        g120<1>UW       g23<0,1,0>F
                            sampler ld_lz SIMD16 Surface = 1 Sampler = 0 mlen 6 rlen 8 { align1 1H };
sendc(16)       null<1>UW       g120<0,1,0>F
                            render RT write SIMD16 LastRT Surface = 0 mlen 8 rlen 0 { align1 1H EOT };
   END B0

NIR (SSA form) for fragment shader:
shader: MESA_SHADER_FRAGMENT
name: BLORP-blit
inputs: 0
outputs: 0
uniforms: 0
shared: 0
decl_var shader_in INTERP_MODE_FLAT vec4 coord_transform (VARYING_SLOT_VAR3, 34, 0)
decl_var shader_in INTERP_MODE_FLAT uint src_z (VARYING_SLOT_VAR5.z, 36, 0)
decl_var shader_in INTERP_MODE_SMOOTH vec4 gl_FragCoord (VARYING_SLOT_POS, 0, 0)
decl_var shader_out INTERP_MODE_NONE vec4 gl_FragColor (FRAG_RESULT_COLOR, 4, 0)
decl_function main (0 params)

impl main {
	block block_0:
	/* preds: */
	vec2 32 ssa_0 = intrinsic load_barycentric_pixel () (1) /* interp_mode=1 */
	vec1 32 ssa_1 = load_const (0x00000000 /* 0.000000 */)
	vec4 32 ssa_2 = intrinsic load_interpolated_input (ssa_0, ssa_1) (0, 0) /* base=0 */ /* component=0 */
	vec1 32 ssa_3 = f2i32 ssa_2.x
	vec1 32 ssa_4 = f2i32 ssa_2.y
	vec1 32 ssa_5 = i2f32 ssa_3
	vec1 32 ssa_6 = i2f32 ssa_4
	vec4 32 ssa_7 = intrinsic load_input (ssa_1) (34, 0) /* base=34 */ /* component=0 */	/* coord_transform */
	vec1 32 ssa_8 = ffma ssa_5, ssa_7.x, ssa_7.y
	vec1 32 ssa_9 = ffma ssa_6, ssa_7.z, ssa_7.w
	vec1 32 ssa_10 = f2i32 ssa_8
	vec1 32 ssa_11 = f2i32 ssa_9
	vec1 32 ssa_12 = intrinsic load_input (ssa_1) (36, 2) /* base=36 */ /* component=2 */	/* src_z */
	vec3 32 ssa_13 = vec3 ssa_10, ssa_11, ssa_12
	vec4 32 ssa_14 = txf ssa_13 (coord), ssa_1 (lod), 0 (texture), 0 (sampler), 
	intrinsic store_output (ssa_14, ssa_1) (4, 15, 0) /* base=4 */ /* wrmask=xyzw */ /* component=0 */	/* gl_FragColor */
	/* succs: block_0 */
	block block_0:
}

NIR (final form) for fragment shader:
shader: MESA_SHADER_FRAGMENT
name: BLORP-blit
inputs: 0
outputs: 0
uniforms: 0
shared: 0
decl_var shader_in INTERP_MODE_FLAT vec4 coord_transform (VARYING_SLOT_VAR3, 34, 0)
decl_var shader_in INTERP_MODE_FLAT uint src_z (VARYING_SLOT_VAR5.z, 36, 0)
decl_var shader_in INTERP_MODE_SMOOTH vec4 gl_FragCoord (VARYING_SLOT_POS, 0, 0)
decl_var shader_out INTERP_MODE_NONE vec4 gl_FragColor (FRAG_RESULT_COLOR, 4, 0)
decl_function main (0 params)

impl main {
	block block_0:
	/* preds: */
	vec2 32 ssa_0 = intrinsic load_barycentric_pixel () (1) /* interp_mode=1 */
	vec1 32 ssa_1 = load_const (0x00000000 /* 0.000000 */)
	vec4 32 ssa_2 = intrinsic load_interpolated_input (ssa_0, ssa_1) (0, 0) /* base=0 */ /* component=0 */
	vec1 32 ssa_3 = f2i32 ssa_2.x
	vec1 32 ssa_4 = f2i32 ssa_2.y
	vec1 32 ssa_5 = i2f32 ssa_3
	vec1 32 ssa_6 = i2f32 ssa_4
	vec4 32 ssa_7 = intrinsic load_input (ssa_1) (34, 0) /* base=34 */ /* component=0 */	/* coord_transform */
	vec1 32 ssa_8 = ffma ssa_5, ssa_7.x, ssa_7.y
	vec1 32 ssa_9 = ffma ssa_6, ssa_7.z, ssa_7.w
	vec1 32 ssa_10 = f2i32 ssa_8
	vec1 32 ssa_11 = f2i32 ssa_9
	vec1 32 ssa_12 = intrinsic load_input (ssa_1) (36, 2) /* base=36 */ /* component=2 */	/* src_z */
	vec3 32 ssa_13 = vec3 ssa_10, ssa_11, ssa_12
	vec4 32 ssa_14 = txf ssa_13 (coord), ssa_1 (lod), 0 (texture), 0 (sampler), 
	intrinsic store_output (ssa_14, ssa_1) (4, 15, 0) /* base=4 */ /* wrmask=xyzw */ /* component=0 */	/* gl_FragColor */
	/* succs: block_0 */
	block block_0:
}

Native code for unnamed fragment shader BLORP-blit
SIMD8 shader: 14 instructions. 0 loops. 106 cycles. 0:0 spills:fills. Promoted 0 constants. Compacted 224 to 144 bytes (36%)
   START B0 (106 cycles)
add(16)         g6<1>UW         g1.4<1,4,0>UW   0x11001010V     { align1 WE_all 1H };
mov(8)          g124<1>UD       g0<8,8,1>UD                     { align1 WE_all 1Q compacted };
mov(8)          g127<1>F        g7.3<0,1,0>F                    { align1 1Q compacted };
mov(8)          g2<1>F          g6<8,4,1>UW                     { align1 1Q };
mov(8)          g3<1>F          g6.4<8,4,1>UW                   { align1 1Q };
mov(8)          g7<1>D          g2<8,8,1>F                      { align1 1Q compacted };
mov(8)          g8<1>D          g3<8,8,1>F                      { align1 1Q compacted };
mov(8)          g9<1>F          g7<8,8,1>D                      { align1 1Q compacted };
mov(8)          g10<1>F         g8<8,8,1>D                      { align1 1Q compacted };
mad(8)          g11<1>F         g4.7<0,1,0>F    g4.3<0,1,0>F    g9<4,4,1>F { align16 1Q compacted };
mad(8)          g12<1>F         g5.7<0,1,0>F    g5.3<0,1,0>F    g10<4,4,1>F { align16 1Q compacted };
mov(8)          g125<1>D        g11<8,8,1>F                     { align1 1Q compacted };
mov(8)          g126<1>D        g12<8,8,1>F                     { align1 1Q compacted };
sendc(8)        null<1>UW       g124<0,1,0>F
                            sampler ld_lz SIMD8 Surface = 1 Sampler = 0 mlen 4 rlen 0 { align1 1Q EOT };
   END B0

Native code for unnamed fragment shader BLORP-blit
SIMD16 shader: 14 instructions. 0 loops. 118 cycles. 0:0 spills:fills. Promoted 0 constants. Compacted 224 to 144 bytes (36%)
   START B0 (118 cycles)
add(32)         g10<1>UW        g1.4<1,4,0>UW   0x11001010V     { align1 WE_all };
mov(8)          g121<1>UD       g0<8,8,1>UD                     { align1 WE_all 1Q compacted };
mov(16)         g126<1>F        g9.3<0,1,0>F                    { align1 1H compacted };
mov(16)         g2<1>F          g10<8,4,1>UW                    { align1 1H };
mov(16)         g4<1>F          g10.4<8,4,1>UW                  { align1 1H };
mov(16)         g11<1>D         g2<8,8,1>F                      { align1 1H compacted };
mov(16)         g13<1>D         g4<8,8,1>F                      { align1 1H compacted };
mov(16)         g15<1>F         g11<8,8,1>D                     { align1 1H compacted };
mov(16)         g17<1>F         g13<8,8,1>D                     { align1 1H compacted };
mad(16)         g19<1>F         g6.7<0,1,0>F    g6.3<0,1,0>F    g15<4,4,1>F { align16 1H compacted };
mad(16)         g21<1>F         g7.7<0,1,0>F    g7.3<0,1,0>F    g17<4,4,1>F { align16 1H compacted };
mov(16)         g122<1>D        g19<8,8,1>F                     { align1 1H compacted };
mov(16)         g124<1>D        g21<8,8,1>F                     { align1 1H compacted };
sendc(16)       null<1>UW       g121<0,1,0>F
                            sampler ld_lz SIMD16 Surface = 1 Sampler = 0 mlen 7 rlen 0 { align1 1H EOT };
   END B0