[   67.515108] [drm:drm_mode_addfb2 [drm]] [FB:109]
[   67.515122] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000165f8087
[   67.515132] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000001f28c742 state to 00000000165f8087
[   67.515140] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000489220b3 state to 00000000165f8087
[   67.515147] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:109] for [PLANE:31:plane 1A] state 000000001f28c742
[   67.515156] [drm:drm_atomic_check_only [drm]] checking 00000000165f8087
[   67.515279] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 109
[   67.515313] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
[   67.515374] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000165f8087 nonblocking
[   67.524037] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000165f8087
[   67.524048] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000165f8087
[   67.546394] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000279e4237
[   67.546405] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:86:DP-1] 0000000029db8bcc state to 00000000279e4237
[   67.546414] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000ece9e573 state to 00000000279e4237
[   67.546415] HV: set broadcast_rgb to 1
[   67.546425] [drm:drm_atomic_check_only [drm]] checking 00000000279e4237
[   67.546445] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:86:DP-1]
[   67.546451] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:86:DP-1] keeps [ENCODER:85:DDI B], now on [CRTC:48:pipe A]
[   67.546458] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:48:pipe A] needs all connectors, enable: y, active: y
[   67.546468] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:48:pipe A] to 00000000279e4237
[   67.546483] [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:pipe A] to 00000000279e4237
[   67.546503] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000001710af25 state to 00000000279e4237
[   67.546539] [drm:intel_atomic_check [i915]] [CONNECTOR:86:DP-1] Limiting display bpp to 24 instead of EDID bpp 24, requested bpp 36, max platform bpp 36
[   67.546570] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max rate 540000 max bpp 24 pixel clock 594000KHz
[   67.546592] [drm:intel_dp_compute_config [i915]] Force DSC en = 0
[   67.546613] [drm:intel_dp_compute_config [i915]] DP lane count 4 clock 540000 bpp 24
[   67.546633] [drm:intel_dp_compute_config [i915]] DP link rate required 1782000 available 2160000
[   67.546655] [drm:intel_atomic_check [i915]] hw max bpp: 24, pipe bpp: 24, dithering: 0
[   67.546686] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 109
[   67.546710] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
[   67.546742] [drm:intel_dump_pipe_config [i915]] [CRTC:48:pipe A] enable: yes [fastset]
[   67.546768] [drm:intel_dump_pipe_config [i915]] active: yes, output_types: DP (0x80), output format: RGB
[   67.546788] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 24, dithering: 0
[   67.546809] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 6920601, gmch_n: 8388608, link_m: 1153433, link_n: 1048576, tu: 64
[   67.546834] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 0, infoframes enabled: 0x0
[   67.546858] [drm:intel_dump_pipe_config [i915]] requested mode:
[   67.546869] [drm:drm_mode_debug_printmodeline [drm]] Modeline "": 0 594000 3840 4016 4104 4400 2160 2168 2178 2250 0x0 0x5
[   67.546889] [drm:intel_dump_pipe_config [i915]] adjusted mode:
[   67.546902] [drm:drm_mode_debug_printmodeline [drm]] Modeline "": 0 594000 3840 4016 4104 4400 2160 2168 2178 2250 0x0 0x5
[   67.546927] [drm:intel_dump_pipe_config [i915]] crtc timings: 594000 3840 4016 4104 4400 2160 2168 2178 2250, type: 0x0 flags: 0x5
[   67.546950] [drm:intel_dump_pipe_config [i915]] port clock: 540000, pipe src size: 3840x2160, pixel rate 594000
[   67.546971] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
[   67.546996] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled, force thru: no
[   67.547021] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
[   67.547042] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x1, cfgcr1: 0x0, cfgcr2: 0x0
[   67.547064] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 1A] fb: [FB:109] 3840x2160 format = XR24 little-endian (0x34325258), visible: yes
[   67.547088] [drm:intel_dump_pipe_config [i915]] 	rotation: 0x1, scaler: -1
[   67.547114] [drm:intel_dump_pipe_config [i915]] 	src: 3840.000000x2160.000000+0.000000+0.000000 dst: 3840x2160+0+0
[   67.547124] [drm:drm_atomic_commit [drm]] committing 00000000279e4237
[   67.547168] [drm:intel_ddi_update_pipe [i915]] Panel doesn't support DRRS
[   67.557517] [drm:verify_connector_state.isra.121 [i915]] [CONNECTOR:86:DP-1]
[   67.557539] [drm:intel_atomic_commit_tail [i915]] [CRTC:48:pipe A]
[   67.557573] [drm:verify_single_dpll_state.isra.154 [i915]] DPLL 1
[   67.557592] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000279e4237
[   67.557601] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000279e4237
[   67.559007] [drm:drm_mode_addfb2 [drm]] [FB:108]
[   67.559063] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000279e4237
[   67.559095] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 000000004e6f7c20 state to 00000000279e4237
[   67.559117] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000b7709d8e state to 00000000279e4237
[   67.559141] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:108] for [PLANE:31:plane 1A] state 000000004e6f7c20
[   67.559170] [drm:drm_atomic_check_only [drm]] checking 00000000279e4237
[   67.559329] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 108
[   67.559381] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
[   67.559465] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000279e4237 nonblocking
[   67.574003] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000279e4237
[   67.574015] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a921e8dc
[   67.574027] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000279e4237
[   67.574037] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a921e8dc
[   67.574044] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a921e8dc
[   67.577474] [drm:drm_mode_addfb2 [drm]] [FB:109]
[   67.577488] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a921e8dc
[   67.577497] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:31:plane 1A] 00000000b4aeba2f state to 00000000a921e8dc
[   67.577506] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:pipe A] 00000000640e4b38 state to 00000000a921e8dc
[   67.577512] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:109] for [PLANE:31:plane 1A] state 00000000b4aeba2f
[   67.577521] [drm:drm_atomic_check_only [drm]] checking 00000000a921e8dc
[   67.577667] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:48:pipe A] has [PLANE:31:plane 1A] with fb 109
[   67.577690] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:31:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
[   67.577756] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a921e8dc nonblocking
[   67.590671] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a921e8dc
[   67.590682] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a921e8dc