[ 1296.591807] Console: switching to colour dummy device 80x25 [ 1296.591836] [IGT] testdisplay: executing [ 1296.596122] [drm:drm_mode_addfb2] [FB:228] [ 1296.630404] [drm:drm_mode_setcrtc] [CRTC:83:pipe A] [ 1296.630426] [drm:drm_mode_setcrtc] [CONNECTOR:191:eDP-1] [ 1306.659381] [drm:drm_mode_addfb2] [FB:192] [ 1306.684887] [drm:drm_mode_setcrtc] [CRTC:83:pipe A] [ 1306.684910] [drm:drm_mode_setcrtc] [CONNECTOR:191:eDP-1] [ 1306.684924] [drm:intel_atomic_check] [CONNECTOR:191:eDP-1] Limiting display bpp to 24 instead of EDID bpp 24, requested bpp 36, max platform bpp 36 [ 1306.684931] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max rate 270000 max bpp 24 pixel clock 138780KHz [ 1306.684932] [drm:intel_dp_compute_config] Force DSC en = 0 [ 1306.684933] [drm:intel_dp_compute_config] DP lane count 2 clock 270000 bpp 24 [ 1306.684933] [drm:intel_dp_compute_config] DP link rate required 416340 available 540000 [ 1306.684937] [drm:intel_atomic_check] hw max bpp: 24, pipe bpp: 24, dithering: 0 [ 1306.684949] [drm:intel_dump_pipe_config] [CRTC:83:pipe A] enable: yes [fastset] [ 1306.684951] [drm:intel_dump_pipe_config] active: yes, output_types: EDP (0x100), output format: RGB [ 1306.684952] [drm:intel_dump_pipe_config] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0 [ 1306.684954] [drm:intel_dump_pipe_config] dp m_n: lanes: 2; gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64 [ 1306.684955] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0, infoframes enabled: 0x0 [ 1306.684956] [drm:intel_dump_pipe_config] requested mode: [ 1306.684958] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 48 111000 1920 1966 1996 2080 1080 1082 1086 1112 0x40 0xa [ 1306.684959] [drm:intel_dump_pipe_config] adjusted mode: [ 1306.684960] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa [ 1306.684961] [drm:intel_dump_pipe_config] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa [ 1306.684962] [drm:intel_dump_pipe_config] port clock: 270000, pipe src size: 1920x1080, pixel rate 138780 [ 1306.684963] [drm:intel_dump_pipe_config] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 [ 1306.684965] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled, force thru: no [ 1306.684966] [drm:intel_dump_pipe_config] ips: 0, double wide: 0 [ 1306.684968] [drm:icl_dump_hw_state] dpll_hw_state: cfgcr0: 0x1c001a5, cfgcr1: 0x8b, mg_refclkin_ctl: 0x0, hg_clktop2_coreclkctl1: 0x0, mg_clktop2_hsclkctl: 0x0, mg_pll_div0: 0x0, mg_pll_div2: 0x0, mg_pll_lf: 0x0, mg_pll_frac_lock: 0x0, mg_pll_ssc: 0x0, mg_pll_bias: 0x0, mg_pll_tdc_coldst_bias: 0x0 [ 1306.684970] [drm:intel_dump_pipe_config] [PLANE:31:plane 1A] fb: [FB:192] 1920x1080 format = XR24 little-endian (0x34325258), visible: yes [ 1306.684971] [drm:intel_dump_pipe_config] rotation: 0x1, scaler: -1 [ 1306.684973] [drm:intel_dump_pipe_config] src: 1920.000000x1080.000000+0.000000+0.000000 dst: 1920x1080+0+0 [ 1306.685999] [drm:intel_ddi_update_pipe] Panel doesn't support DRRS [ 1306.708335] [drm:verify_connector_state] [CONNECTOR:191:eDP-1] [ 1306.708345] [drm:intel_atomic_commit_tail] [CRTC:83:pipe A] [ 1306.708376] [drm:verify_single_dpll_state.isra.157] DPLL 0 root@linux-Ice-Lake-Client-Platform:/home/linux# dmesg [ 1296.591807] Console: switching to colour dummy device 80x25 [ 1296.591836] [IGT] testdisplay: executing [ 1296.596122] [drm:drm_mode_addfb2] [FB:228] [ 1296.630404] [drm:drm_mode_setcrtc] [CRTC:83:pipe A] [ 1296.630426] [drm:drm_mode_setcrtc] [CONNECTOR:191:eDP-1] [ 1306.659381] [drm:drm_mode_addfb2] [FB:192] [ 1306.684887] [drm:drm_mode_setcrtc] [CRTC:83:pipe A] [ 1306.684910] [drm:drm_mode_setcrtc] [CONNECTOR:191:eDP-1] [ 1306.684924] [drm:intel_atomic_check] [CONNECTOR:191:eDP-1] Limiting display bpp to 24 instead of EDID bpp 24, requested bpp 36, max platform bpp 36 [ 1306.684931] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max rate 270000 max bpp 24 pixel clock 138780KHz [ 1306.684932] [drm:intel_dp_compute_config] Force DSC en = 0 [ 1306.684933] [drm:intel_dp_compute_config] DP lane count 2 clock 270000 bpp 24 [ 1306.684933] [drm:intel_dp_compute_config] DP link rate required 416340 available 540000 [ 1306.684937] [drm:intel_atomic_check] hw max bpp: 24, pipe bpp: 24, dithering: 0 [ 1306.684949] [drm:intel_dump_pipe_config] [CRTC:83:pipe A] enable: yes [fastset] [ 1306.684951] [drm:intel_dump_pipe_config] active: yes, output_types: EDP (0x100), output format: RGB [ 1306.684952] [drm:intel_dump_pipe_config] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0 [ 1306.684954] [drm:intel_dump_pipe_config] dp m_n: lanes: 2; gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64 [ 1306.684955] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0, infoframes enabled: 0x0 [ 1306.684956] [drm:intel_dump_pipe_config] requested mode: [ 1306.684958] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 48 111000 1920 1966 1996 2080 1080 1082 1086 1112 0x40 0xa [ 1306.684959] [drm:intel_dump_pipe_config] adjusted mode: [ 1306.684960] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa [ 1306.684961] [drm:intel_dump_pipe_config] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa [ 1306.684962] [drm:intel_dump_pipe_config] port clock: 270000, pipe src size: 1920x1080, pixel rate 138780 [ 1306.684963] [drm:intel_dump_pipe_config] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 [ 1306.684965] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled, force thru: no [ 1306.684966] [drm:intel_dump_pipe_config] ips: 0, double wide: 0 [ 1306.684968] [drm:icl_dump_hw_state] dpll_hw_state: cfgcr0: 0x1c001a5, cfgcr1: 0x8b, mg_refclkin_ctl: 0x0, hg_clktop2_coreclkctl1: 0x0, mg_clktop2_hsclkctl: 0x0, mg_pll_div0: 0x0, mg_pll_div2: 0x0, mg_pll_lf: 0x0, mg_pll_frac_lock: 0x0, mg_pll_ssc: 0x0, mg_pll_bias: 0x0, mg_pll_tdc_coldst_bias: 0x0 [ 1306.684970] [drm:intel_dump_pipe_config] [PLANE:31:plane 1A] fb: [FB:192] 1920x1080 format = XR24 little-endian (0x34325258), visible: yes [ 1306.684971] [drm:intel_dump_pipe_config] rotation: 0x1, scaler: -1 [ 1306.684973] [drm:intel_dump_pipe_config] src: 1920.000000x1080.000000+0.000000+0.000000 dst: 1920x1080+0+0 [ 1306.685999] [drm:intel_ddi_update_pipe] Panel doesn't support DRRS [ 1306.708335] [drm:verify_connector_state] [CONNECTOR:191:eDP-1] [ 1306.708345] [drm:intel_atomic_commit_tail] [CRTC:83:pipe A] [ 1306.708376] [drm:verify_single_dpll_state.isra.157] DPLL 0 [ 1316.708686] [drm:skl_compute_wm] [PLANE:31:plane 1A] ddb ( 0 - 992) -> ( 0 - 0), size 992 -> 0 [ 1316.708692] [drm:skl_compute_wm] [PLANE:31:plane 1A] level *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7,*twm -> wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm [ 1316.708698] [drm:skl_compute_wm] [PLANE:31:plane 1A] lines 1, 2, 2, 2, 3, 5, 7, 8, 0 -> 0, 0, 0, 0, 0, 0, 0, 0, 0 [ 1316.708702] [drm:skl_compute_wm] [PLANE:31:plane 1A] blocks 9, 33, 33, 33, 49, 81, 113, 129, 23 -> 0, 0, 0, 0, 0, 0, 0, 0, 0 [ 1316.708706] [drm:skl_compute_wm] [PLANE:31:plane 1A] min_ddb 11, 38, 38, 38, 55, 91, 126, 143, 0 -> 0, 0, 0, 0, 0, 0, 0, 0, 0 [ 1316.708715] [drm:intel_bw_atomic_check] pipe A data rate 0 num active planes 0 [ 1316.731713] [IGT] testdisplay: exiting, ret=0 [ 1316.731889] Setting dangerous option i915.reset - tainting kernel [ 1316.747394] [drm:intel_atomic_check] [CONNECTOR:191:eDP-1] Limiting display bpp to 24 instead of EDID bpp 24, requested bpp 36, max platform bpp 36 [ 1316.747411] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max rate 270000 max bpp 24 pixel clock 138780KHz [ 1316.747414] [drm:intel_dp_compute_config] Force DSC en = 0 [ 1316.747416] [drm:intel_dp_compute_config] DP lane count 2 clock 270000 bpp 24 [ 1316.747418] [drm:intel_dp_compute_config] DP link rate required 416340 available 540000 [ 1316.747428] [drm:intel_atomic_check] hw max bpp: 24, pipe bpp: 24, dithering: 0 [ 1316.747463] [drm:skl_compute_wm] [PLANE:31:plane 1A] ddb ( 0 - 0) -> ( 0 - 992), size 0 -> 992 [ 1316.747467] [drm:skl_compute_wm] [PLANE:31:plane 1A] level wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm -> *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7,*twm [ 1316.747471] [drm:skl_compute_wm] [PLANE:31:plane 1A] lines 0, 0, 0, 0, 0, 0, 0, 0, 0 -> 1, 2, 2, 2, 3, 5, 7, 8, 0 [ 1316.747475] [drm:skl_compute_wm] [PLANE:31:plane 1A] blocks 0, 0, 0, 0, 0, 0, 0, 0, 0 -> 9, 33, 33, 33, 49, 81, 113, 129, 23 [ 1316.747479] [drm:skl_compute_wm] [PLANE:31:plane 1A] min_ddb 0, 0, 0, 0, 0, 0, 0, 0, 0 -> 11, 38, 38, 38, 55, 91, 126, 143, 0 [ 1316.747489] [drm:intel_bw_atomic_check] pipe A data rate 555120 num active planes 1 [ 1316.747495] [drm:intel_dump_pipe_config] [CRTC:83:pipe A] enable: yes [fastset] [ 1316.747500] [drm:intel_dump_pipe_config] active: yes, output_types: EDP (0x100), output format: RGB [ 1316.747503] [drm:intel_dump_pipe_config] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0 [ 1316.747508] [drm:intel_dump_pipe_config] dp m_n: lanes: 2; gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64 [ 1316.747511] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0, infoframes enabled: 0x0 [ 1316.747514] [drm:intel_dump_pipe_config] requested mode: [ 1316.747520] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa [ 1316.747523] [drm:intel_dump_pipe_config] adjusted mode: [ 1316.747526] [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa [ 1316.747530] [drm:intel_dump_pipe_config] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa [ 1316.747533] [drm:intel_dump_pipe_config] port clock: 270000, pipe src size: 1920x1080, pixel rate 138780 [ 1316.747537] [drm:intel_dump_pipe_config] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 [ 1316.747541] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled, force thru: no [ 1316.747543] [drm:intel_dump_pipe_config] ips: 0, double wide: 0 [ 1316.747550] [drm:icl_dump_hw_state] dpll_hw_state: cfgcr0: 0x1c001a5, cfgcr1: 0x8b, mg_refclkin_ctl: 0x0, hg_clktop2_coreclkctl1: 0x0, mg_clktop2_hsclkctl: 0x0, mg_pll_div0: 0x0, mg_pll_div2: 0x0, mg_pll_lf: 0x0, mg_pll_frac_lock: 0x0, mg_pll_ssc: 0x0, mg_pll_bias: 0x0, mg_pll_tdc_coldst_bias: 0x0 [ 1316.747555] [drm:intel_dump_pipe_config] [PLANE:31:plane 1A] fb: [FB:229] 1920x1080 format = XR24 little-endian (0x34325258), visible: yes [ 1316.747558] [drm:intel_dump_pipe_config] rotation: 0x1, scaler: -1 [ 1316.747564] [drm:intel_dump_pipe_config] src: 1920.000000x1080.000000+0.000000+0.000000 dst: 1920x1080+0+0 [ 1316.747567] [drm:intel_dump_pipe_config] [PLANE:38:plane 2A] fb: [NOFB], visible: no [ 1316.747570] [drm:intel_dump_pipe_config] [PLANE:45:plane 3A] fb: [NOFB], visible: no [ 1316.747573] [drm:intel_dump_pipe_config] [PLANE:52:plane 4A] fb: [NOFB], visible: no [ 1316.747575] [drm:intel_dump_pipe_config] [PLANE:59:plane 5A] fb: [NOFB], visible: no [ 1316.747578] [drm:intel_dump_pipe_config] [PLANE:66:plane 6A] fb: [NOFB], visible: no [ 1316.747580] [drm:intel_dump_pipe_config] [PLANE:73:plane 7A] fb: [NOFB], visible: no [ 1316.747583] [drm:intel_dump_pipe_config] [PLANE:80:cursor A] fb: [NOFB], visible: no [ 1316.747626] [drm:intel_ddi_update_pipe] Panel doesn't support DRRS [ 1316.764260] [drm:verify_connector_state] [CONNECTOR:191:eDP-1] [ 1316.764272] [drm:intel_atomic_commit_tail] [CRTC:83:pipe A] [ 1316.764307] [drm:verify_single_dpll_state.isra.157] DPLL 0 [ 1316.764415] Console: switching to colour frame buffer device 240x67