The dual head setup was recently re-broken (after having been fixed a while ago) with SURFACE_CNTL beeing written with the wrong value from the second head. The problem is that usually, only the first head had a correct value in there, and the driver would regular mixup which register setup was used to restore that value. This patch fixes it once for all by making sure the second head does carry the proper value too. Index: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c =================================================================== --- xc.orig/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c 2004-12-05 20:21:41.581119792 +1100 +++ xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c 2004-12-05 20:22:00.795198808 +1100 @@ -6750,6 +6750,23 @@ } + /* We must set SURFACE_CNTL properly on the second screen too */ + save->surface_cntl = 0; +#if X_BYTE_ORDER == X_BIG_ENDIAN + /* Alhought we current onlu use aperture 0, also setting aperture 1 should not harm -ReneR */ + switch (pScrn->bitsPerPixel) { + case 16: + save->surface_cntl |= RADEON_NONSURF_AP0_SWP_16BPP; + save->surface_cntl |= RADEON_NONSURF_AP1_SWP_16BPP; + break; + + case 32: + save->surface_cntl |= RADEON_NONSURF_AP0_SWP_32BPP; + save->surface_cntl |= RADEON_NONSURF_AP1_SWP_32BPP; + break; + } +#endif + RADEONTRACE(("Pitch = %d bytes (virtualX = %d, displayWidth = %d)\n", save->crtc2_pitch, pScrn->virtualX, info->CurrentLayout.displayWidth)); Index: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c =================================================================== --- xc.orig/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c 2004-08-12 15:00:22.000000000 +1000 +++ xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c 2004-12-05 20:22:00.799198200 +1100 @@ -291,10 +291,8 @@ OUTREGP(RADEON_DP_DATATYPE, 0, ~RADEON_HOST_BIG_ENDIAN_EN); #endif - /* Restore SURFACE_CNTL - only the first head contains valid data -ReneR */ - if (!info->IsSecondary) { - OUTREG(RADEON_SURFACE_CNTL, info->ModeReg.surface_cntl); - } + /* Restore SURFACE_CNTL */ + OUTREG(RADEON_SURFACE_CNTL, info->ModeReg.surface_cntl); RADEONWaitForFifo(pScrn, 1); OUTREG(RADEON_DEFAULT_SC_BOTTOM_RIGHT, (RADEON_DEFAULT_SC_RIGHT_MAX