--- i830_driver.c.old 2008-03-28 14:18:59.000000000 +0500 +++ i830_driver.c 2008-03-28 14:56:43.000000000 +0500 @@ -171,6 +171,8 @@ #include #include #include +#include +#include #include "xf86.h" #include "xf86_OSproc.h" @@ -195,11 +197,19 @@ #include "i830_display.h" #include "i830_debug.h" #include "i830_bios.h" +#include "i830_video.h" + +#ifdef INTEL_XVMC +#define _INTEL_XVMC_SERVER_ +#include "i830_hwmc.h" +#endif #ifdef XF86DRI #include "dri.h" #include -#include +#ifdef XF86DRI_MM +#include "xf86mm.h" +#endif #endif #ifdef I830_USE_EXA @@ -231,7 +241,7 @@ {PCI_CHIP_I945_GM, "945GM"}, {PCI_CHIP_I945_GME, "945GME"}, {PCI_CHIP_I965_G, "965G"}, - {PCI_CHIP_I965_G_1, "965G"}, + {PCI_CHIP_G35_G, "G35"}, {PCI_CHIP_I965_Q, "965Q"}, {PCI_CHIP_I946_GZ, "946GZ"}, {PCI_CHIP_I965_GM, "965GM"}, @@ -254,7 +264,7 @@ {PCI_CHIP_I945_GM, PCI_CHIP_I945_GM, RES_SHARED_VGA}, {PCI_CHIP_I945_GME, PCI_CHIP_I945_GME, RES_SHARED_VGA}, {PCI_CHIP_I965_G, PCI_CHIP_I965_G, RES_SHARED_VGA}, - {PCI_CHIP_I965_G_1, PCI_CHIP_I965_G_1, RES_SHARED_VGA}, + {PCI_CHIP_G35_G, PCI_CHIP_G35_G, RES_SHARED_VGA}, {PCI_CHIP_I965_Q, PCI_CHIP_I965_Q, RES_SHARED_VGA}, {PCI_CHIP_I946_GZ, PCI_CHIP_I946_GZ, RES_SHARED_VGA}, {PCI_CHIP_I965_GM, PCI_CHIP_I965_GM, RES_SHARED_VGA}, @@ -1088,9 +1098,11 @@ chipname = "945GME"; break; case PCI_CHIP_I965_G: - case PCI_CHIP_I965_G_1: chipname = "965G"; break; + case PCI_CHIP_G35_G: + chipname = "G35"; + break; case PCI_CHIP_I965_Q: chipname = "965Q"; break; @@ -1317,50 +1329,22 @@ pI830->directRenderingDisabled = TRUE; } - pI830->mmModeFlags = 0; - if (!pI830->directRenderingDisabled) { - pI830->mmModeFlags = I830_KERNEL_TEX; -#ifdef XF86DRI_MM - Bool tmp = FALSE; - - if (!IS_I965G(pI830)) - pI830->mmModeFlags |= I830_KERNEL_MM; -#endif + pI830->allocate_classic_textures = TRUE; from = X_PROBED; #ifdef XF86DRI_MM - if (xf86GetOptValBool(pI830->Options, - OPTION_INTELTEXPOOL, &tmp)) { - from = X_CONFIG; - if (tmp) { - pI830->mmModeFlags |= I830_KERNEL_TEX; - pI830->mmModeFlags &= ~I830_KERNEL_MM; - } else { - pI830->mmModeFlags &= ~I830_KERNEL_TEX; - pI830->mmModeFlags |= I830_KERNEL_MM; - } - } -#endif + if (!IS_I965G(pI830)) { + Bool tmp; - xf86DrvMsg(pScrn->scrnIndex, from, - "Will %stry to allocate texture pool " - "for old Mesa 3D driver.\n", - (pI830->mmModeFlags & I830_KERNEL_TEX) ? - "" : "not "); - -#ifdef XF86DRI_MM - pI830->mmSize = I830_MM_MAXSIZE; - from = X_INFO; - if (xf86GetOptValInteger(pI830->Options, OPTION_INTELMMSIZE, - &(pI830->mmSize))) { - from = X_CONFIG; + if (xf86GetOptValBool(pI830->Options, + OPTION_INTELTEXPOOL, &tmp)) { + from = X_CONFIG; + if (!tmp) + pI830->allocate_classic_textures = FALSE; + } } - xf86DrvMsg(pScrn->scrnIndex, from, - "Will try to reserve %d kiB of AGP aperture space\n" - "\tfor the DRM memory manager.\n", - pI830->mmSize); #endif } } @@ -1592,10 +1576,9 @@ * whoever gets control next should do. */ static void -ResetState(ScrnInfoPtr pScrn, Bool flush) +i830_stop_ring(ScrnInfoPtr pScrn, Bool flush) { I830Ptr pI830 = I830PTR(pScrn); - int i; unsigned long temp; DPRINTF(PFX, "ResetState: flush is %s\n", BOOLTOSTRING(flush)); @@ -1605,73 +1588,24 @@ if (pI830->entityPrivate) pI830->entityPrivate->RingRunning = 0; - /* Reset the fence registers to 0 */ - if (IS_I965G(pI830)) { - for (i = 0; i < FENCE_NEW_NR; i++) { - OUTREG(FENCE_NEW + i * 8, 0); - OUTREG(FENCE_NEW + 4 + i * 8, 0); - } - } else { - for (i = 0; i < FENCE_NR; i++) - OUTREG(FENCE + i * 4, 0); - } /* Flush the ring buffer (if enabled), then disable it. */ - /* God this is ugly */ -#define flush_ring() do { \ - temp = INREG(LP_RING + RING_LEN); \ - if (temp & RING_VALID) { \ - I830RefreshRing(pScrn); \ - I830Sync(pScrn); \ - DO_RING_IDLE(); \ - } \ - } while(0) -#ifdef I830_USE_XAA - if (!pI830->useEXA && flush && pI830->AccelInfoRec) - flush_ring(); -#endif -#ifdef I830_USE_EXA - if (pI830->useEXA && flush && pI830->EXADriverPtr) - flush_ring(); -#endif - - OUTREG(LP_RING + RING_LEN, 0); - OUTREG(LP_RING + RING_HEAD, 0); - OUTREG(LP_RING + RING_TAIL, 0); - OUTREG(LP_RING + RING_START, 0); - - xf86_hide_cursors (pScrn); -} - -static void -SetFenceRegs(ScrnInfoPtr pScrn) -{ - I830Ptr pI830 = I830PTR(pScrn); - int i; - - DPRINTF(PFX, "SetFenceRegs\n"); - - if (!I830IsPrimary(pScrn)) return; - - if (IS_I965G(pI830)) { - for (i = 0; i < FENCE_NEW_NR; i++) { - OUTREG(FENCE_NEW + i * 8, pI830->fence[i]); - OUTREG(FENCE_NEW + 4 + i * 8, pI830->fence[i+FENCE_NEW_NR]); - if (I810_DEBUG & DEBUG_VERBOSE_VGA) { - ErrorF("Fence Start Register : %x\n", pI830->fence[i]); - ErrorF("Fence End Register : %x\n", pI830->fence[i+FENCE_NEW_NR]); - } - } - } else { - for (i = 0; i < FENCE_NR; i++) { - OUTREG(FENCE + i * 4, pI830->fence[i]); - if (I810_DEBUG & DEBUG_VERBOSE_VGA) - ErrorF("Fence Register : %x\n", pI830->fence[i]); + if (!pI830->noAccel) { + temp = INREG(LP_RING + RING_LEN); + if (temp & RING_VALID) { + i830_refresh_ring(pScrn); + I830Sync(pScrn); + DO_RING_IDLE(); } + + OUTREG(LP_RING + RING_LEN, 0); + OUTREG(LP_RING + RING_HEAD, 0); + OUTREG(LP_RING + RING_TAIL, 0); + OUTREG(LP_RING + RING_START, 0); } } static void -SetRingRegs(ScrnInfoPtr pScrn) +i830_start_ring(ScrnInfoPtr pScrn) { I830Ptr pI830 = I830PTR(pScrn); unsigned int itemp; @@ -1708,7 +1642,26 @@ itemp = (pI830->LpRing->mem->size - 4096) & I830_RING_NR_PAGES; itemp |= (RING_NO_REPORT | RING_VALID); OUTREG(LP_RING + RING_LEN, itemp); - I830RefreshRing(pScrn); + i830_refresh_ring(pScrn); +} + +void +i830_refresh_ring(ScrnInfoPtr pScrn) +{ + I830Ptr pI830 = I830PTR(pScrn); + + /* If we're reaching RefreshRing as a result of grabbing the DRI lock + * before we've set up the ringbuffer, don't bother. + */ + if (pI830->LpRing->mem == NULL) + return; + + pI830->LpRing->head = INREG(LP_RING + RING_HEAD) & I830_HEAD_MASK; + pI830->LpRing->tail = INREG(LP_RING + RING_TAIL); + pI830->LpRing->space = pI830->LpRing->head - (pI830->LpRing->tail + 8); + if (pI830->LpRing->space < 0) + pI830->LpRing->space += pI830->LpRing->mem->size; + i830MarkSync(pScrn); } /* @@ -1735,13 +1688,57 @@ OUTREG(DSPCLK_GATE_D, OVRUNIT_CLOCK_GATE_DISABLE); } - if (!pI830->noAccel) - SetRingRegs(pScrn); - SetFenceRegs(pScrn); + i830_start_ring(pScrn); if (!pI830->SWCursor) I830InitHWCursor(pScrn); } +enum pipe { + PIPE_A = 0, + PIPE_B, +}; + +static Bool +i830_pipe_enabled(I830Ptr pI830, enum pipe pipe) +{ + if (pipe == PIPE_A) + return (INREG(PIPEACONF) & PIPEACONF_ENABLE); + else + return (INREG(PIPEBCONF) & PIPEBCONF_ENABLE); +} + +static void +i830_save_palette(I830Ptr pI830, enum pipe pipe) +{ + int i; + + if (!i830_pipe_enabled(pI830, pipe)) + return; + + for(i= 0; i < 256; i++) { + if (pipe == PIPE_A) + pI830->savePaletteA[i] = INREG(PALETTE_A + (i << 2)); + else + pI830->savePaletteB[i] = INREG(PALETTE_B + (i << 2)); + } +} + +static void +i830_restore_palette(I830Ptr pI830, enum pipe pipe) +{ + int i; + + if (!i830_pipe_enabled(pI830, pipe)) + return; + + for(i= 0; i < 256; i++) { + if (pipe == PIPE_A) + OUTREG(PALETTE_A + (i << 2), pI830->savePaletteA[i]); + else + OUTREG(PALETTE_B + (i << 2), pI830->savePaletteB[i]); + } +} + static Bool SaveHWState(ScrnInfoPtr pScrn) { @@ -2308,7 +2305,7 @@ pI830->CacheLines = -1; } - pI830->disableTiling = FALSE; + pI830->tiling = TRUE; if (I830IsPrimary(pScrn)) { /* Alloc our pointers for the primary head */ @@ -2398,7 +2395,7 @@ * 3: untiled, small */ - pI830->disableTiling = FALSE; + pI830->tiling = TRUE; #ifdef XF86DRI_MM savedMMSize = pI830->mmSize; #define MM_TURNS 4 @@ -2411,7 +2408,7 @@ if (i >= MM_TURNS/2) { /* For further allocations, disable tiling */ - pI830->disableTiling = TRUE; + pI830->tiling = FALSE; pScrn->displayWidth = savedDisplayWidth; if (pI830->allowPageFlip) xf86DrvMsg(pScrn->scrnIndex, X_WARNING, @@ -2468,7 +2465,7 @@ } } else #endif - pI830->disableTiling = TRUE; /* no DRI - so disableTiling */ + pI830->tiling = FALSE; /* no DRI - so disableTiling */ if (!allocation_done) { if (!i830_allocate_2d_memory(pScrn)) { @@ -2486,7 +2483,7 @@ if (!IS_I965G(pI830) && pScrn->displayWidth > 2048) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Cannot support DRI with frame buffer width > 2048.\n"); - pI830->disableTiling = TRUE; + pI830->tiling = FALSE; pI830->directRenderingDisabled = TRUE; } @@ -2909,7 +2906,7 @@ xf86_hide_cursors (pScrn); - ResetState(pScrn, TRUE); + i830_stop_ring(pScrn, TRUE); RestoreHWState(pScrn); @@ -2957,7 +2954,7 @@ "Existing errors found in hardware state.\n"); } - ResetState(pScrn, FALSE); + i830_stop_ring(pScrn, FALSE); SetHWOperatingState(pScrn); /* Clear the framebuffer */ @@ -2978,7 +2975,7 @@ } i830DescribeOutputConfiguration(pScrn); - ResetState(pScrn, TRUE); + i830_stop_ring(pScrn, TRUE); SetHWOperatingState(pScrn); #ifdef XF86DRI @@ -2993,7 +2990,7 @@ I830DRIResume(screenInfo.screens[scrnIndex]); - I830RefreshRing(pScrn); + i830_refresh_ring(pScrn); I830Sync(pScrn); DO_RING_IDLE();