diff --git a/src/nv_crtc.c b/src/nv_crtc.c
index c02725b..c977b15 100644
--- a/src/nv_crtc.c
+++ b/src/nv_crtc.c
@@ -673,7 +673,7 @@ nv_crtc_mode_set_regs(xf86CrtcPtr crtc, DisplayModePtr mode)
 	/* This register seems to be used by the bios to make certain decisions on some G70 cards? */
 	regp->CRTC[NV_VGA_CRTCX_SCRATCH4] = savep->CRTC[NV_VGA_CRTCX_SCRATCH4];
 
-	regp->CRTC[NV_VGA_CRTCX_45] = 0x80;
+	regp->CRTC[NV_VGA_CRTCX_45] = 0x00;
 
 	/* What does this do?:
 	 * bit0: crtc0
@@ -781,10 +781,7 @@ nv_crtc_mode_set_fp_regs(xf86CrtcPtr crtc, DisplayModePtr mode, DisplayModePtr a
 
 	regp->fp_horiz_regs[REG_DISP_END] = adjusted_mode->HDisplay - 1;
 	regp->fp_horiz_regs[REG_DISP_TOTAL] = adjusted_mode->HTotal - 1;
-	if ((adjusted_mode->HSyncStart - adjusted_mode->HDisplay) >= pNv->VBIOS.digital_min_front_porch)
-		regp->fp_horiz_regs[REG_DISP_CRTC] = adjusted_mode->HDisplay;
-	else
-		regp->fp_horiz_regs[REG_DISP_CRTC] = adjusted_mode->HSyncStart - pNv->VBIOS.digital_min_front_porch - 1;
+		regp->fp_horiz_regs[REG_DISP_CRTC] = 0x9e5;
 	regp->fp_horiz_regs[REG_DISP_SYNC_START] = adjusted_mode->HSyncStart - 1;
 	regp->fp_horiz_regs[REG_DISP_SYNC_END] = adjusted_mode->HSyncEnd - 1;
 	regp->fp_horiz_regs[REG_DISP_VALID_START] = adjusted_mode->HSkew;
@@ -792,9 +789,9 @@ nv_crtc_mode_set_fp_regs(xf86CrtcPtr crtc, DisplayModePtr mode, DisplayModePtr a
 
 	regp->fp_vert_regs[REG_DISP_END] = adjusted_mode->VDisplay - 1;
 	regp->fp_vert_regs[REG_DISP_TOTAL] = adjusted_mode->VTotal - 1;
-	regp->fp_vert_regs[REG_DISP_CRTC] = adjusted_mode->VTotal - 5 - 1;
-	regp->fp_vert_regs[REG_DISP_SYNC_START] = adjusted_mode->VSyncStart - 1;
-	regp->fp_vert_regs[REG_DISP_SYNC_END] = adjusted_mode->VSyncEnd - 1;
+	regp->fp_vert_regs[REG_DISP_CRTC] = 0x640;
+	regp->fp_vert_regs[REG_DISP_SYNC_START] = adjusted_mode->VSyncStart;
+	regp->fp_vert_regs[REG_DISP_SYNC_END] = adjusted_mode->VSyncEnd;
 	regp->fp_vert_regs[REG_DISP_VALID_START] = 0;
 	regp->fp_vert_regs[REG_DISP_VALID_END] = adjusted_mode->VDisplay - 1;
 
@@ -832,11 +829,10 @@ nv_crtc_mode_set_fp_regs(xf86CrtcPtr crtc, DisplayModePtr mode, DisplayModePtr a
 	if (nvReadEXTDEV(pNv, NV_PEXTDEV_BOOT_0) & NV_PEXTDEV_BOOT_0_STRAP_FP_IFACE_12BIT)
 		regp->fp_control |= NV_RAMDAC_FP_CONTROL_WIDTH_12;
 
-	if (is_lvds && pNv->VBIOS.fp.dual_link)
 		regp->fp_control |= (8 << 28);
 
 	/* Use the generic value, and enable x-scaling, y-scaling, and the TMDS enable bit */
-	regp->debug_0 = 0x01101191;
+	regp->debug_0 = 0x01101111;
 	/* We want automatic scaling */
 	regp->debug_1 = 0;
 	/* This can override HTOTAL and VTOTAL */
@@ -1428,7 +1424,7 @@ static void nv_crtc_load_state_ext(xf86CrtcPtr crtc, RIVA_HW_STATE *state)
 		nv_fix_nv40_hw_cursor(pNv, nv_crtc->head);
 	NVWriteVgaCrtc(pNv, nv_crtc->head, NV_VGA_CRTCX_INTERLACE, regp->CRTC[NV_VGA_CRTCX_INTERLACE]);
 
-	NVWriteVgaCrtc(pNv, nv_crtc->head, NV_VGA_CRTCX_26, regp->CRTC[NV_VGA_CRTCX_26]);
+//	NVWriteVgaCrtc(pNv, nv_crtc->head, NV_VGA_CRTCX_26, regp->CRTC[NV_VGA_CRTCX_26]);
 	NVWriteVgaCrtc(pNv, nv_crtc->head, NV_VGA_CRTCX_3B, regp->CRTC[NV_VGA_CRTCX_3B]);
 	NVWriteVgaCrtc(pNv, nv_crtc->head, NV_VGA_CRTCX_SCRATCH4, regp->CRTC[NV_VGA_CRTCX_SCRATCH4]);
 	if (pNv->Architecture >= NV_ARCH_10) {