This is a pre-release version of the X server from The X.Org Foundation. It is not supported in any way. Bugs may be filed in the bugzilla at http://bugs.freedesktop.org/. Select the "xorg" product for bugs you find in this release. Before reporting bugs in pre-release versions please check the latest version in the X.Org Foundation git repository. See http://wiki.x.org/wiki/GitPage for git access instructions. X.Org X Server 1.5.99.1 Release Date: (unreleased) X Protocol Version 11, Revision 0 Build Operating System: Linux 2.6.28-rc5 i686 Current Operating System: Linux leisereiter 2.6.28-rc5 #43 Sun Nov 16 16:08:23 CET 2008 i686 Build Date: 16 November 2008 06:33:26PM Before reporting problems, check http://wiki.x.org to make sure that you have the latest version. Markers: (--) probed, (**) from config file, (==) default setting, (++) from command line, (!!) notice, (II) informational, (WW) warning, (EE) error, (NI) not implemented, (??) unknown. (==) Log file: "/var/log/Xorg.0.log", Time: Mon Nov 17 12:17:23 2008 (==) Using config file: "/etc/X11/xorg.conf" (==) ServerLayout "andrem060405" (**) |-->Screen "Screen0" (0) (**) | |-->Monitor "Monitor0" (**) | |-->Device "Card0" (**) |-->Input Device "Mouse0" (**) |-->Input Device "Keyboard0" (**) Option "BlankTime" "0" (**) Option "AllowEmptyInput" "false" (**) Option "AutoAddDevices" "false" (**) Not automatically adding devices (==) Automatically enabling devices (==) No FontPath specified. Using compiled-in default. (==) FontPath set to: /usr/share/fonts/misc/, /usr/share/fonts/TTF/, /usr/share/fonts/OTF, /usr/share/fonts/Type1/, /usr/share/fonts/100dpi/, /usr/share/fonts/75dpi/ (==) ModulePath set to "/usr/lib/xorg/modules" (II) Loader magic: 0x1e60 (II) Module ABI versions: X.Org ANSI C Emulation: 0.4 X.Org Video Driver: 5.0 X.Org XInput driver : 4.0 X.Org Server Extension : 2.0 (II) Loader running on linux (--) using VT number 7 (--) PCI:*(0@0:2:0) unknown vendor (0x8086) unknown chipset (0x3582) rev 2, Mem @ 0xe0000000/0, 0xd0000000/0, I/O @ 0x00001800/0 (--) PCI: (0@0:2:1) unknown vendor (0x8086) unknown chipset (0x3582) rev 2, Mem @ 0xe8000000/0, 0xd0080000/0 (II) Open ACPI successful (/var/run/acpid.socket) (II) System resource ranges: [0] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [5] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] (II) LoadModule: "extmod" (II) Loading /usr/lib/xorg/modules/extensions//libextmod.so (II) Module extmod: vendor="X.Org Foundation" compiled for 1.5.99.1, module version = 1.0.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 2.0 (II) Loading extension MIT-SCREEN-SAVER (II) Loading extension XFree86-VidModeExtension (II) Loading extension XFree86-DGA (II) Loading extension DPMS (II) Loading extension XVideo (II) Loading extension XVideo-MotionCompensation (II) Loading extension X-Resource (II) LoadModule: "dbe" (II) Loading /usr/lib/xorg/modules/extensions//libdbe.so (II) Module dbe: vendor="X.Org Foundation" compiled for 1.5.99.1, module version = 1.0.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 2.0 (II) Loading extension DOUBLE-BUFFER (II) LoadModule: "glx" (II) Loading /usr/lib/xorg/modules/extensions//libglx.so (II) Module glx: vendor="X.Org Foundation" compiled for 1.5.99.1, module version = 1.0.0 ABI class: X.Org Server Extension, version 2.0 (==) AIGLX enabled (==) Exporting typical set of GLX visuals (II) Loading extension GLX (II) LoadModule: "dri" (II) Loading /usr/lib/xorg/modules/extensions//libdri.so (II) Module dri: vendor="X.Org Foundation" compiled for 1.5.99.1, module version = 1.0.0 ABI class: X.Org Server Extension, version 2.0 (II) Loading extension XFree86-DRI (II) LoadModule: "dri2" (II) Loading /usr/lib/xorg/modules/extensions//libdri2.so (II) Module dri2: vendor="X.Org Foundation" compiled for 1.5.99.1, module version = 1.0.0 ABI class: X.Org Server Extension, version 2.0 (II) Loading extension DRI2 (II) LoadModule: "intel" (II) Loading /usr/lib/xorg/modules/drivers//intel_drv.so (II) Module intel: vendor="X.Org Foundation" compiled for 1.5.99.1, module version = 2.4.97 Module class: X.Org Video Driver ABI class: X.Org Video Driver, version 5.0 (II) LoadModule: "mouse" (II) Loading /usr/lib/xorg/modules/input//mouse_drv.so (II) Module mouse: vendor="X.Org Foundation" compiled for 1.5.99.1, module version = 1.3.0 Module class: X.Org XInput Driver ABI class: X.Org XInput driver, version 4.0 (II) LoadModule: "kbd" (II) Loading /usr/lib/xorg/modules/input//kbd_drv.so (II) Module kbd: vendor="X.Org Foundation" compiled for 1.5.99.1, module version = 1.3.1 Module class: X.Org XInput Driver ABI class: X.Org XInput driver, version 4.0 (II) intel: Driver for Intel Integrated Graphics Chipsets: i810, i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G, E7221 (i915), 915GM, 945G, 945GM, 945GME, 965G, G35, 965Q, 946GZ, 965GM, 965GME/GLE, G33, Q35, Q33, Mobile Intel® GM45 Express Chipset, Intel Integrated Graphics Device, G45/G43, Q45/Q43, G41 (II) Primary Device is: PCI 00@00:02:0 (II) resource ranges after xf86ClaimFixedResources() call: [0] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [5] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] (II) resource ranges after probing: [0] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] 0 0 0x000a0000 - 0x000affff (0x10000) MS[B] [5] 0 0 0x000b0000 - 0x000b7fff (0x8000) MS[B] [6] 0 0 0x000b8000 - 0x000bffff (0x8000) MS[B] [7] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [8] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [9] 0 0 0x000003b0 - 0x000003bb (0xc) IS[B] [10] 0 0 0x000003c0 - 0x000003df (0x20) IS[B] (II) Loading sub module "vgahw" (II) LoadModule: "vgahw" (II) Loading /usr/lib/xorg/modules//libvgahw.so (II) Module vgahw: vendor="X.Org Foundation" compiled for 1.5.99.1, module version = 0.1.0 ABI class: X.Org Video Driver, version 5.0 (**) intel(0): Depth 16, (--) framebuffer bpp 16 (==) intel(0): RGB weight 565 (==) intel(0): Default visual is TrueColor (**) intel(0): Option "DRI" "true" (**) intel(0): Option "ModeDebug" "true" (II) intel(0): Integrated Graphics Chipset: Intel(R) 855GM (--) intel(0): Chipset: "852GM/855GM" (--) intel(0): Linear framebuffer at 0xE0000000 (--) intel(0): IO registers at addr 0xD0000000 (WW) intel(0): libpciaccess reported 0 rom size, guessing 64kB (==) intel(0): Using EXA for acceleration (II) intel(0): Hardware state on X startup: (II) intel(0): DumpRegsBegin (II) intel(0): CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present) (II) intel(0): C0DRB0: 0x00000000 (0x0000) (II) intel(0): C0DRB1: 0x00000000 (0x0000) (II) intel(0): C0DRB2: 0x00000000 (0x0000) (II) intel(0): C0DRB3: 0x00000000 (0x0000) (II) intel(0): C1DRB0: 0x00000000 (0x0000) (II) intel(0): C1DRB1: 0x00000000 (0x0000) (II) intel(0): C1DRB2: 0x00000000 (0x0000) (II) intel(0): C1DRB3: 0x00000000 (0x0000) (II) intel(0): C0DRA01: 0x00000000 (0x0000) (II) intel(0): C0DRA23: 0x00000000 (0x0000) (II) intel(0): C1DRA01: 0x00000000 (0x0000) (II) intel(0): C1DRA23: 0x00000000 (0x0000) (II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) (II) intel(0): VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4) (II) intel(0): DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled) (II) intel(0): CACHE_MODE_0: 0x00000000 (II) intel(0): D_STATE: 0x0000030f (II) intel(0): DSPCLK_GATE_D: 0x00000000 (clock gates disabled:) (II) intel(0): RENCLK_GATE_D1: 0x00000000 (II) intel(0): RENCLK_GATE_D2: 0x00000000 (II) intel(0): SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected) (II) intel(0): SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected) (II) intel(0): SDVOUDI: 0x00000000 (II) intel(0): DSPARB: 0x00015455 (II) intel(0): DSPFW1: 0x00000000 (II) intel(0): DSPFW2: 0x00000000 (II) intel(0): DSPFW3: 0x00000000 (II) intel(0): ADPA: 0x40009c18 (disabled, pipe B, +hsync, +vsync) (II) intel(0): LVDS: 0xc0000300 (enabled, pipe B, 18 bit, 1 channel) (II) intel(0): DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOB: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOC: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOA_SRCDIM: 0x00000000 (II) intel(0): DVOB_SRCDIM: 0x00000000 (II) intel(0): DVOC_SRCDIM: 0x00000000 (II) intel(0): PP_CONTROL: 0x00000001 (power target: on) (II) intel(0): PP_STATUS: 0xc0000008 (on, ready, sequencing idle) (II) intel(0): PP_ON_DELAYS: 0x00fa09c4 (II) intel(0): PP_OFF_DELAYS: 0x00fa09c4 (II) intel(0): PP_DIVISOR: 0x00270f04 (II) intel(0): PFIT_CONTROL: 0x80000668 (II) intel(0): PFIT_PGM_RATIOS: 0x00000000 (II) intel(0): PORT_HOTPLUG_EN: 0x00000000 (II) intel(0): PORT_HOTPLUG_STAT: 0x00000000 (II) intel(0): DSPACNTR: 0x00000000 (disabled, pipe A) (II) intel(0): DSPASTRIDE: 0x00000000 (0 bytes) (II) intel(0): DSPAPOS: 0x00000000 (0, 0) (II) intel(0): DSPASIZE: 0x00000000 (1, 1) (II) intel(0): DSPABASE: 0x00000000 (II) intel(0): DSPASURF: 0x00000000 (II) intel(0): DSPATILEOFF: 0x00000000 (II) intel(0): PIPEACONF: 0x80000000 (enabled, single-wide) (II) intel(0): PIPEASRC: 0x027f01df (640, 480) (II) intel(0): PIPEASTAT: 0x80000207 (status: FIFO_UNDERRUN VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS) (II) intel(0): FPA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): FPA1: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): DPLL_A: 0x808b0000 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 13, p2 = 4) (II) intel(0): DPLL_A_MD: 0x00000000 (II) intel(0): HTOTAL_A: 0x031f027f (640 active, 800 total) (II) intel(0): HBLANK_A: 0x03170287 (648 start, 792 end) (II) intel(0): HSYNC_A: 0x02ef028f (656 start, 752 end) (II) intel(0): VTOTAL_A: 0x020c01df (480 active, 525 total) (II) intel(0): VBLANK_A: 0x020401e7 (488 start, 517 end) (II) intel(0): VSYNC_A: 0x01eb01e9 (490 start, 492 end) (II) intel(0): BCLRPAT_A: 0x00000000 (II) intel(0): VSYNCSHIFT_A: 0x00000000 (II) intel(0): DSPBCNTR: 0x49000000 (disabled, pipe B) (II) intel(0): DSPBSTRIDE: 0x00000280 (640 bytes) (II) intel(0): DSPBPOS: 0x00000000 (0, 0) (II) intel(0): DSPBSIZE: 0x018f02cf (720, 400) (II) intel(0): DSPBBASE: 0x00000000 (II) intel(0): DSPBSURF: 0x00000000 (II) intel(0): DSPBTILEOFF: 0x00000000 (II) intel(0): PIPEBCONF: 0x80000000 (enabled, single-wide) (II) intel(0): PIPEBSRC: 0x027f018f (640, 400) (II) intel(0): PIPEBSTAT: 0x80000202 (status: FIFO_UNDERRUN VSYNC_INT_STATUS VBLANK_INT_STATUS) (II) intel(0): FPB0: 0x00061207 (n = 6, m1 = 18, m2 = 7) (II) intel(0): FPB1: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): DPLL_B: 0x90016000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 1, p2 = 14) (II) intel(0): DPLL_B_MD: 0x00000000 (II) intel(0): HTOTAL_B: 0x053f03ff (1024 active, 1344 total) (II) intel(0): HBLANK_B: 0x053f03ff (1024 start, 1344 end) (II) intel(0): HSYNC_B: 0x049f0417 (1048 start, 1184 end) (II) intel(0): VTOTAL_B: 0x032502ff (768 active, 806 total) (II) intel(0): VBLANK_B: 0x032502ff (768 start, 806 end) (II) intel(0): VSYNC_B: 0x03080302 (771 start, 777 end) (II) intel(0): BCLRPAT_B: 0x00000000 (II) intel(0): VSYNCSHIFT_B: 0x00000000 (II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (II) intel(0): VCLK_POST_DIV: 0x0000888b (II) intel(0): VGACNTRL: 0x2204008e (enabled) (II) intel(0): TV_CTL: 0x00000000 (II) intel(0): TV_DAC: 0x00000000 (II) intel(0): TV_CSC_Y: 0x00000000 (II) intel(0): TV_CSC_Y2: 0x00000000 (II) intel(0): TV_CSC_U: 0x00000000 (II) intel(0): TV_CSC_U2: 0x00000000 (II) intel(0): TV_CSC_V: 0x00000000 (II) intel(0): TV_CSC_V2: 0x00000000 (II) intel(0): TV_CLR_KNOBS: 0x00000000 (II) intel(0): TV_CLR_LEVEL: 0x00000000 (II) intel(0): TV_H_CTL_1: 0x00000000 (II) intel(0): TV_H_CTL_2: 0x00000000 (II) intel(0): TV_H_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_1: 0x00000000 (II) intel(0): TV_V_CTL_2: 0x00000000 (II) intel(0): TV_V_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_4: 0x00000000 (II) intel(0): TV_V_CTL_5: 0x00000000 (II) intel(0): TV_V_CTL_6: 0x00000000 (II) intel(0): TV_V_CTL_7: 0x00000000 (II) intel(0): TV_SC_CTL_1: 0x00000000 (II) intel(0): TV_SC_CTL_2: 0x00000000 (II) intel(0): TV_SC_CTL_3: 0x00000000 (II) intel(0): TV_WIN_POS: 0x00000000 (II) intel(0): TV_WIN_SIZE: 0x00000000 (II) intel(0): TV_FILTER_CTL_1: 0x00000000 (II) intel(0): TV_FILTER_CTL_2: 0x00000000 (II) intel(0): TV_FILTER_CTL_3: 0x00000000 (II) intel(0): TV_CC_CONTROL: 0x00000000 (II) intel(0): TV_CC_DATA: 0x00000000 (II) intel(0): TV_H_LUMA_0: 0x00000000 (II) intel(0): TV_H_LUMA_59: 0x00000000 (II) intel(0): TV_H_CHROMA_0: 0x00000000 (II) intel(0): TV_H_CHROMA_59: 0x00000000 (II) intel(0): FBC_CFB_BASE: 0x00000000 (II) intel(0): FBC_LL_BASE: 0x00000000 (II) intel(0): FBC_CONTROL: 0x00000000 (II) intel(0): FBC_COMMAND: 0x00000000 (II) intel(0): FBC_STATUS: 0x20000000 (II) intel(0): FBC_CONTROL2: 0x00000000 (II) intel(0): FBC_FENCE_OFF: 0x00000000 (II) intel(0): FBC_MOD_NUM: 0x00000000 (II) intel(0): MI_MODE: 0x00000000 (II) intel(0): MI_ARB_STATE: 0x00000000 (II) intel(0): MI_RDRET_STATE: 0x00000000 (II) intel(0): ECOSKPD: 0x00000307 (II) intel(0): DP_B: 0x00000000 (II) intel(0): DPB_AUX_CH_CTL: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_C: 0x00000000 (II) intel(0): DPC_AUX_CH_CTL: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_D: 0x00000000 (II) intel(0): DPD_AUX_CH_CTL: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA5: 0x00000000 (II) intel(0): pipe A dot 25153 n 2 m1 18 m2 7 p1 13 p2 4 (II) intel(0): pipe B dot 64232 n 6 m1 18 m2 7 p1 1 p2 14 (II) intel(0): DumpRegsEnd (II) intel(0): 2 display pipes available. (II) Loading sub module "ddc" (II) LoadModule: "ddc" (II) Module "ddc" already built-in (II) Loading sub module "i2c" (II) LoadModule: "i2c" (II) Module "i2c" already built-in (II) intel(0): Output VGA using monitor section Monitor0 (II) intel(0): Output LVDS has no monitor section (II) intel(0): I2C bus "LVDSDDC_C" initialized. (II) intel(0): Attempting to determine panel fixed mode. (II) intel(0): I2C device "LVDSDDC_C:E-EDID segment register" registered at address 0x60. (II) intel(0): I2C device "LVDSDDC_C:ddc2" registered at address 0xA0. (II) intel(0): found backlight control method /sys/class/backlight/thinkpad_screen (II) intel(0): I2C bus "DVODDC_D" initialized. (II) Loading sub module "sil164" (II) LoadModule: "sil164" (II) Loading /usr/lib/xorg/modules/drivers//sil164.so (II) Module sil164: vendor="X.Org Foundation" compiled for 1.5.99.1, module version = 1.0.0 ABI class: X.Org Video Driver, version 5.0 (II) intel(0): I2C bus "DVOI2C_E" initialized. (II) Loading sub module "ch7xxx" (II) LoadModule: "ch7xxx" (II) Loading /usr/lib/xorg/modules/drivers//ch7xxx.so (II) Module ch7xxx: vendor="X.Org Foundation" compiled for 1.5.99.1, module version = 1.0.0 ABI class: X.Org Video Driver, version 5.0 (II) intel(0): I2C bus "DVOI2C_E" removed. (II) intel(0): I2C bus "DVOI2C_E" initialized. (II) Loading sub module "ivch" (II) LoadModule: "ivch" (II) Loading /usr/lib/xorg/modules/drivers//ivch.so (II) Module ivch: vendor="X.Org Foundation" compiled for 1.5.99.1, module version = 1.0.0 ABI class: X.Org Video Driver, version 5.0 (II) intel(0): I2C bus "DVOI2C_E" removed. (II) intel(0): I2C bus "DVOI2C_B" initialized. (II) Loading sub module "tfp410" (II) LoadModule: "tfp410" (II) Loading /usr/lib/xorg/modules/drivers//tfp410.so (II) Module tfp410: vendor="X.Org Foundation" compiled for 1.5.99.1, module version = 1.0.0 ABI class: X.Org Video Driver, version 5.0 (II) intel(0): I2C bus "DVOI2C_B" removed. (II) intel(0): I2C bus "DVOI2C_E" initialized. (II) Loading sub module "ch7017" (II) LoadModule: "ch7017" (II) Loading /usr/lib/xorg/modules/drivers//ch7017.so (II) Module ch7017: vendor="X.Org Foundation" compiled for 1.5.99.1, module version = 1.0.0 ABI class: X.Org Video Driver, version 5.0 (II) intel(0): I2C bus "DVOI2C_E" removed. (II) intel(0): I2C bus "DVOI2C_E" initialized. (II) intel(0): I2C bus "DVOI2C_E" removed. (II) intel(0): I2C bus "DVODDC_D" removed. (II) intel(0): Mode for pipe A: (II) intel(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 491 520 -hsync -vsync (37.9 kHz) (II) intel(0): chosen: dotclock 31500 vco 1008000 ((m 126, m1 20, m2 14), n 4, (p 32, p1 8, p2 4)) (II) intel(0): I2C bus "CRTDDC_A" initialized. (II) intel(0): I2C bus "CRTDDC_A" removed. (II) intel(0): EDID for output VGA (II) intel(0): EDID for output LVDS (II) intel(0): Printing probed modes for output LVDS (II) intel(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 806 (48.4 kHz) (II) intel(0): Output VGA disconnected (II) intel(0): Output LVDS connected (II) intel(0): Using exact sizes for initial modes (II) intel(0): Output LVDS using initial mode 1024x768 (II) intel(0): detected 128 kB GTT. (II) intel(0): detected 8060 kB stolen memory. (==) intel(0): video overlay key set to 0x83e (==) intel(0): Intel XvMC decoder disabled (==) intel(0): Will not try to enable page flipping (==) intel(0): Triple buffering disabled (==) intel(0): Using gamma correction (1.0, 1.0, 1.0) (**) intel(0): Display dimensions: (288, 216) mm (**) intel(0): DPI set to (90, 120) (II) Loading sub module "fb" (II) LoadModule: "fb" (II) Loading /usr/lib/xorg/modules//libfb.so (II) Module fb: vendor="X.Org Foundation" compiled for 1.5.99.1, module version = 1.0.0 ABI class: X.Org ANSI C Emulation, version 0.4 (II) Loading sub module "exa" (II) LoadModule: "exa" (II) Loading /usr/lib/xorg/modules//libexa.so (II) Module exa: vendor="X.Org Foundation" compiled for 1.5.99.1, module version = 2.4.0 ABI class: X.Org Video Driver, version 5.0 (II) Loading sub module "ramdac" (II) LoadModule: "ramdac" (II) Module "ramdac" already built-in (II) intel(0): Comparing regs from server start up to After PreInit (WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd0000009 (WW) intel(0): PP_STATUS before: on, ready, sequencing idle (WW) intel(0): PP_STATUS after: on, ready, sequencing on (WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x80000202 to 0x00000202 (WW) intel(0): PIPEBSTAT before: status: FIFO_UNDERRUN VSYNC_INT_STATUS VBLANK_INT_STATUS (WW) intel(0): PIPEBSTAT after: status: VSYNC_INT_STATUS VBLANK_INT_STATUS (II) Loading sub module "dri" (II) LoadModule: "dri" (II) Reloading /usr/lib/xorg/modules/extensions//libdri.so (II) Loading sub module "dri2" (II) LoadModule: "dri2" (II) Reloading /usr/lib/xorg/modules/extensions//libdri2.so (II) do I need RAC? No, I don't. (II) resource ranges after preInit: [0] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] 0 0 0x000a0000 - 0x000affff (0x10000) MS[B](OprD) [5] 0 0 0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD) [6] 0 0 0x000b8000 - 0x000bffff (0x8000) MS[B](OprD) [7] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [8] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [9] 0 0 0x000003b0 - 0x000003bb (0xc) IS[B](OprU) [10] 0 0 0x000003c0 - 0x000003df (0x20) IS[B](OprU) (II) intel(0): Kernel reported 110080 total, 1 used (II) intel(0): I830CheckAvailableMemory: 440316 kB available (WW) intel(0): DRI2 requires UXA drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 11, (OK) drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 11, (OK) drmOpenByBusid: Searching for BusID pci:0000:00:02.0 drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 11, (OK) drmOpenByBusid: drmOpenMinor returns 11 drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0 (II) [drm] DRM interface version 1.3 (II) [drm] DRM open master succeeded. (II) intel(0): [drm] Using the DRM lock SAREA also for drawables. (II) intel(0): [drm] framebuffer mapped by ddx driver (II) intel(0): [drm] added 1 reserved context for kernel (II) intel(0): X context handle = 0x1 (II) intel(0): [drm] installed DRM signal handler (**) intel(0): Framebuffer compression enabled (**) intel(0): Tiling enabled (==) intel(0): VideoRam: 131072 KB (II) intel(0): Attempting memory allocation with tiled buffers. (WW) intel(0): xf86AllocateGARTMemory: allocation of 1536 pages failed (Cannot allocate memory) (WW) intel(0): Allocation error, framebuffer compression disabled (WW) intel(0): xf86AllocateGARTMemory: allocation of 10 pages failed (Cannot allocate memory) (II) intel(0): Tiled allocation successful. (II) intel(0): [drm] Registers = 0xd0000000 (II) intel(0): [dri] visual configs initialized (II) intel(0): Page Flipping disabled (II) intel(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000 (II) EXA(0): Offscreen pixmap area of 6291456 bytes (II) EXA(0): Driver registered support for the following operations: (II) Solid (II) Copy (II) Composite (RENDER acceleration) (==) intel(0): Backing store disabled (==) intel(0): Silken mouse enabled (II) intel(0): Initializing HW Cursor (II) intel(0): [DRI] installation complete (II) intel(0): xf86BindGARTMemory: bind key 0 at 0x073f4000 (pgoffset 29684) (II) intel(0): xf86BindGARTMemory: bind key 1 at 0x073f5000 (pgoffset 29685) (II) intel(0): xf86BindGARTMemory: bind key 2 at 0x073f9000 (pgoffset 29689) (II) intel(0): xf86BindGARTMemory: bind key 3 at 0x073fa000 (pgoffset 29690) (II) intel(0): xf86BindGARTMemory: bind key 4 at 0x073fe000 (pgoffset 29694) (II) intel(0): Fixed memory allocation layout: (II) intel(0): 0x00000000-0x005fffff: exa offscreen (6144 kB) (II) intel(0): 0x007df000: end of stolen memory (II) intel(0): 0x007df000-0x073f3fff: DRI memory manager (110676 kB) (II) intel(0): 0x073f4000-0x073f4fff: Core cursor (4 kB, 0x000000001e1f7000 physical ) (II) intel(0): 0x073f5000-0x073f8fff: ARGB cursor (16 kB, 0x000000001e28c000 physical ) (II) intel(0): 0x073f9000-0x073f9fff: Core cursor (4 kB, 0x000000001f07a000 physical ) (II) intel(0): 0x073fa000-0x073fdfff: ARGB cursor (16 kB, 0x000000001e238000 physical ) (II) intel(0): 0x073fe000-0x073fefff: overlay registers (4 kB, 0x000000001f357000 physical ) (II) intel(0): 0x08000000: end of aperture (II) intel(0): BO memory allocation layout: (II) intel(0): 0x007df000: start of memory manager (II) intel(0): 0x00800000-0x009fffff: depth buffer (2048 kB) X tiled (II) intel(0): 0x00a00000-0x00bfffff: back buffer (2048 kB) X tiled (II) intel(0): 0x00c00000-0x00dfffff: front buffer (2048 kB) X tiled (II) intel(0): 0x00e00000-0x00e07fff: logical 3D context (32 kB) (II) intel(0): 0x073f4000: end of memory manager (WW) intel(0): PRB0_CTL (0x0001f001) indicates ring buffer enabled (WW) intel(0): Existing errors found in hardware state. (II) intel(0): using SSC reference clock of 66 MHz (WW) intel(0): Chosen PLL clock of 66.5 Mhz more than 2% away from desired 65.0 Mhz (II) intel(0): Mode for pipe B: (II) intel(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 806 (48.4 kHz) (II) intel(0): chosen: dotclock 66523 vco 931333 ((m 127, m1 20, m2 15), n 7, (p 14, p1 1, p2 14)) (II) intel(0): Selecting standard 18 bit TMDS pixel format. (II) intel(0): Mode for pipe A: (II) intel(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 491 520 -hsync -vsync (37.9 kHz) (II) intel(0): chosen: dotclock 31500 vco 1008000 ((m 126, m1 20, m2 14), n 4, (p 32, p1 8, p2 4)) (II) intel(0): Hardware state at EnterVT: (II) intel(0): DumpRegsBegin (II) intel(0): CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present) (II) intel(0): C0DRB0: 0x00000000 (0x0000) (II) intel(0): C0DRB1: 0x00000000 (0x0000) (II) intel(0): C0DRB2: 0x00000000 (0x0000) (II) intel(0): C0DRB3: 0x00000000 (0x0000) (II) intel(0): C1DRB0: 0x00000000 (0x0000) (II) intel(0): C1DRB1: 0x00000000 (0x0000) (II) intel(0): C1DRB2: 0x00000000 (0x0000) (II) intel(0): C1DRB3: 0x00000000 (0x0000) (II) intel(0): C0DRA01: 0x00000000 (0x0000) (II) intel(0): C0DRA23: 0x00000000 (0x0000) (II) intel(0): C1DRA01: 0x00000000 (0x0000) (II) intel(0): C1DRA23: 0x00000000 (0x0000) (II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) (II) intel(0): VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4) (II) intel(0): DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled) (II) intel(0): CACHE_MODE_0: 0x00000000 (II) intel(0): D_STATE: 0x0000030f (II) intel(0): DSPCLK_GATE_D: 0x00000000 (clock gates disabled:) (II) intel(0): RENCLK_GATE_D1: 0x00000001 (II) intel(0): RENCLK_GATE_D2: 0x00000000 (II) intel(0): SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected) (II) intel(0): SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected) (II) intel(0): SDVOUDI: 0x00000000 (II) intel(0): DSPARB: 0x0001fe00 (II) intel(0): DSPFW1: 0x00000000 (II) intel(0): DSPFW2: 0x00000000 (II) intel(0): DSPFW3: 0x00000000 (II) intel(0): ADPA: 0x40009c18 (disabled, pipe B, +hsync, +vsync) (II) intel(0): LVDS: 0xc0000300 (enabled, pipe B, 18 bit, 1 channel) (II) intel(0): DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOB: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOC: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOA_SRCDIM: 0x00000000 (II) intel(0): DVOB_SRCDIM: 0x00000000 (II) intel(0): DVOC_SRCDIM: 0x00000000 (II) intel(0): PP_CONTROL: 0x00000001 (power target: on) (II) intel(0): PP_STATUS: 0xd0000009 (on, ready, sequencing on) (II) intel(0): PP_ON_DELAYS: 0x00fa09c4 (II) intel(0): PP_OFF_DELAYS: 0x00fa09c4 (II) intel(0): PP_DIVISOR: 0x00270f04 (II) intel(0): PFIT_CONTROL: 0x00000008 (II) intel(0): PFIT_PGM_RATIOS: 0x00000000 (II) intel(0): PORT_HOTPLUG_EN: 0x00000000 (II) intel(0): PORT_HOTPLUG_STAT: 0x00000000 (II) intel(0): DSPACNTR: 0x54000000 (disabled, pipe A) (II) intel(0): DSPASTRIDE: 0x00000800 (2048 bytes) (II) intel(0): DSPAPOS: 0x00000000 (0, 0) (II) intel(0): DSPASIZE: 0x01df027f (640, 480) (II) intel(0): DSPABASE: 0x00c00000 (II) intel(0): DSPASURF: 0x00000000 (II) intel(0): DSPATILEOFF: 0x00000000 (II) intel(0): PIPEACONF: 0x80000000 (enabled, single-wide) (II) intel(0): PIPEASRC: 0x027f01df (640, 480) (II) intel(0): PIPEASTAT: 0x80020200 (status: FIFO_UNDERRUN VBLANK_INT_ENABLE VSYNC_INT_STATUS) (II) intel(0): FPA0: 0x0004140e (n = 4, m1 = 20, m2 = 14) (II) intel(0): FPA1: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): DPLL_A: 0x90860000 (enabled, non-dvo, default clock, DAC/serial mode, p1 = 8, p2 = 4) (II) intel(0): DPLL_A_MD: 0x00000000 (II) intel(0): HTOTAL_A: 0x033f027f (640 active, 832 total) (II) intel(0): HBLANK_A: 0x033f027f (640 start, 832 end) (II) intel(0): HSYNC_A: 0x02bf0297 (664 start, 704 end) (II) intel(0): VTOTAL_A: 0x020701df (480 active, 520 total) (II) intel(0): VBLANK_A: 0x020701df (480 start, 520 end) (II) intel(0): VSYNC_A: 0x01ea01e8 (489 start, 491 end) (II) intel(0): BCLRPAT_A: 0x00000000 (II) intel(0): VSYNCSHIFT_A: 0x00000000 (II) intel(0): DSPBCNTR: 0xd5000000 (enabled, pipe B) (II) intel(0): DSPBSTRIDE: 0x00000800 (2048 bytes) (II) intel(0): DSPBPOS: 0x00000000 (0, 0) (II) intel(0): DSPBSIZE: 0x02ff03ff (1024, 768) (II) intel(0): DSPBBASE: 0x00c00000 (II) intel(0): DSPBSURF: 0x00000000 (II) intel(0): DSPBTILEOFF: 0x00000000 (II) intel(0): PIPEBCONF: 0x80000000 (enabled, single-wide) (II) intel(0): PIPEBSRC: 0x03ff02ff (1024, 768) (II) intel(0): PIPEBSTAT: 0x80000202 (status: FIFO_UNDERRUN VSYNC_INT_STATUS VBLANK_INT_STATUS) (II) intel(0): FPB0: 0x0007140f (n = 7, m1 = 20, m2 = 15) (II) intel(0): FPB1: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): DPLL_B: 0x90016000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 1, p2 = 14) (II) intel(0): DPLL_B_MD: 0x00000000 (II) intel(0): HTOTAL_B: 0x053f03ff (1024 active, 1344 total) (II) intel(0): HBLANK_B: 0x053f03ff (1024 start, 1344 end) (II) intel(0): HSYNC_B: 0x049f0417 (1048 start, 1184 end) (II) intel(0): VTOTAL_B: 0x032502ff (768 active, 806 total) (II) intel(0): VBLANK_B: 0x032502ff (768 start, 806 end) (II) intel(0): VSYNC_B: 0x03080302 (771 start, 777 end) (II) intel(0): BCLRPAT_B: 0x00000000 (II) intel(0): VSYNCSHIFT_B: 0x00000000 (II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (II) intel(0): VCLK_POST_DIV: 0x0000888b (II) intel(0): VGACNTRL: 0x80000000 (disabled) (II) intel(0): TV_CTL: 0x00000000 (II) intel(0): TV_DAC: 0x00000000 (II) intel(0): TV_CSC_Y: 0x00000000 (II) intel(0): TV_CSC_Y2: 0x00000000 (II) intel(0): TV_CSC_U: 0x00000000 (II) intel(0): TV_CSC_U2: 0x00000000 (II) intel(0): TV_CSC_V: 0x00000000 (II) intel(0): TV_CSC_V2: 0x00000000 (II) intel(0): TV_CLR_KNOBS: 0x00000000 (II) intel(0): TV_CLR_LEVEL: 0x00000000 (II) intel(0): TV_H_CTL_1: 0x00000000 (II) intel(0): TV_H_CTL_2: 0x00000000 (II) intel(0): TV_H_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_1: 0x00000000 (II) intel(0): TV_V_CTL_2: 0x00000000 (II) intel(0): TV_V_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_4: 0x00000000 (II) intel(0): TV_V_CTL_5: 0x00000000 (II) intel(0): TV_V_CTL_6: 0x00000000 (II) intel(0): TV_V_CTL_7: 0x00000000 (II) intel(0): TV_SC_CTL_1: 0x00000000 (II) intel(0): TV_SC_CTL_2: 0x00000000 (II) intel(0): TV_SC_CTL_3: 0x00000000 (II) intel(0): TV_WIN_POS: 0x00000000 (II) intel(0): TV_WIN_SIZE: 0x00000000 (II) intel(0): TV_FILTER_CTL_1: 0x00000000 (II) intel(0): TV_FILTER_CTL_2: 0x00000000 (II) intel(0): TV_FILTER_CTL_3: 0x00000000 (II) intel(0): TV_CC_CONTROL: 0x00000000 (II) intel(0): TV_CC_DATA: 0x00000000 (II) intel(0): TV_H_LUMA_0: 0x00000000 (II) intel(0): TV_H_LUMA_59: 0x00000000 (II) intel(0): TV_H_CHROMA_0: 0x00000000 (II) intel(0): TV_H_CHROMA_59: 0x00000000 (II) intel(0): FBC_CFB_BASE: 0x00000000 (II) intel(0): FBC_LL_BASE: 0x00000000 (II) intel(0): FBC_CONTROL: 0x00000000 (II) intel(0): FBC_COMMAND: 0x00000000 (II) intel(0): FBC_STATUS: 0x20000000 (II) intel(0): FBC_CONTROL2: 0x00000000 (II) intel(0): FBC_FENCE_OFF: 0x00000000 (II) intel(0): FBC_MOD_NUM: 0x00000000 (II) intel(0): MI_MODE: 0x00000000 (II) intel(0): MI_ARB_STATE: 0x00000000 (II) intel(0): MI_RDRET_STATE: 0x00000000 (II) intel(0): ECOSKPD: 0x00000307 (II) intel(0): DP_B: 0x00000000 (II) intel(0): DPB_AUX_CH_CTL: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_C: 0x00000000 (II) intel(0): DPC_AUX_CH_CTL: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_D: 0x00000000 (II) intel(0): DPD_AUX_CH_CTL: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA5: 0x00000000 (II) intel(0): pipe A dot 31500 n 4 m1 20 m2 14 p1 8 p2 4 (II) intel(0): pipe B dot 66523 n 7 m1 20 m2 15 p1 1 p2 14 (II) intel(0): DumpRegsEnd (II) intel(0): Output configuration: (II) intel(0): Pipe A is off (II) intel(0): Display plane A is now disabled and connected to pipe A. (WW) intel(0): Hardware claims pipe A is on while software believes it is off (II) intel(0): Pipe B is on (II) intel(0): Display plane B is now enabled and connected to pipe B. (II) intel(0): Output VGA is connected to pipe none (II) intel(0): Output LVDS is connected to pipe B (II) intel(0): [drm] mapped front buffer at 0xe0c00000, handle = 0xe0c00000 (II) intel(0): [drm] mapped back buffer at 0xe0a00000, handle = 0xe0a00000 (II) intel(0): [drm] mapped depth buffer at 0xe0800000, handle = 0xe0800000 (II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message. (II) intel(0): DPMS enabled (II) intel(0): Set up overlay video (II) intel(0): direct rendering: XF86DRI Enabled (--) RandR disabled (II) Initializing built-in extension Generic Event Extension (II) Initializing built-in extension SHAPE (II) Initializing built-in extension MIT-SHM (II) Initializing built-in extension XInputExtension (II) Initializing built-in extension XTEST (II) Initializing built-in extension BIG-REQUESTS (II) Initializing built-in extension SYNC (II) Initializing built-in extension XKEYBOARD (II) Initializing built-in extension XC-MISC (II) Initializing built-in extension XINERAMA (II) Initializing built-in extension XFIXES (II) Initializing built-in extension RENDER (II) Initializing built-in extension RANDR (II) Initializing built-in extension COMPOSITE (II) Initializing built-in extension DAMAGE (II) AIGLX: Screen 0 is not DRI2 capable drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 12, (OK) drmOpenByBusid: Searching for BusID pci:0000:00:02.0 drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 12, (OK) drmOpenByBusid: drmOpenMinor returns 12 drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0 (II) AIGLX: enabled GLX_SGI_make_current_read (II) AIGLX: enabled GLX_MESA_copy_sub_buffer (II) AIGLX: enabled GLX_SGI_swap_control and GLX_MESA_swap_control (II) AIGLX: enabled GLX_texture_from_pixmap with driver support (II) AIGLX: Loaded and initialized /usr/lib/dri/i915_dri.so (II) GLX: Initialized DRI GL provider for screen 0 (II) intel(0): Setting screen physical size to 270 x 203 (**) Option "Protocol" "auto" (**) Option "Device" "/dev/input/mice" (II) Mouse0: Setting mouse protocol to "ExplorerPS/2" (**) Mouse0: Device: "/dev/input/mice" (**) Mouse0: Protocol: "auto" (**) Option "CorePointer" (**) Mouse0: always reports core events (**) Option "Device" "/dev/input/mice" (==) Mouse0: Emulate3Buttons, Emulate3Timeout: 50 (**) Mouse0: ZAxisMapping: buttons 4 and 5 (**) Mouse0: Buttons: 9 (**) Mouse0: Sensitivity: 1 (**) Option "CoreKeyboard" (**) Keyboard0: always reports core events (**) Option "Protocol" "standard" (**) Keyboard0: Protocol: standard (**) Option "AutoRepeat" "500 30" (**) Option "XkbRules" "xorg" (**) Keyboard0: XkbRules: "xorg" (**) Option "XkbModel" "pc105" (**) Keyboard0: XkbModel: "pc105" (**) Option "XkbLayout" "de" (**) Keyboard0: XkbLayout: "de" (**) Option "XkbVariant" "nodeadkeys" (**) Keyboard0: XkbVariant: "nodeadkeys" (**) Option "CustomKeycodes" "off" (**) Keyboard0: CustomKeycodes disabled (II) evaluating device (Mouse0) (II) XINPUT: Adding extended input device "Mouse0" (type: MOUSE) (II) evaluating device (Keyboard0) (II) XINPUT: Adding extended input device "Keyboard0" (type: KEYBOARD) (**) Mouse0: (accel) keeping acceleration scheme 1 (**) Mouse0: (accel) filter chain progression: 2.00 (**) Mouse0: (accel) filter stage 0: 20.00 ms (**) Mouse0: (accel) set acceleration profile 0 (II) Mouse0: Setting mouse protocol to "ExplorerPS/2" (II) Mouse0: ps2EnableDataReporting: succeeded (EE) intel(0): underrun on pipe B! (II) 3rd Button detected: disabling emulate3Button (II) AIGLX: Suspending AIGLX clients for VT switch (II) intel(0): Comparing regs from server start up to After LeaveVT (WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd0000009 (WW) intel(0): PP_STATUS before: on, ready, sequencing idle (WW) intel(0): PP_STATUS after: on, ready, sequencing on (WW) intel(0): Register 0x70024 (PIPEASTAT) changed from 0x80000207 to 0x00020200 (WW) intel(0): PIPEASTAT before: status: FIFO_UNDERRUN VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS (WW) intel(0): PIPEASTAT after: status: VBLANK_INT_ENABLE VSYNC_INT_STATUS (WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x80000202 to 0x00020200 (WW) intel(0): PIPEBSTAT before: status: FIFO_UNDERRUN VSYNC_INT_STATUS VBLANK_INT_STATUS (WW) intel(0): PIPEBSTAT after: status: VBLANK_INT_ENABLE VSYNC_INT_STATUS (II) intel(0): DumpRegsBegin (II) intel(0): CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present) (II) intel(0): C0DRB0: 0x00000000 (0x0000) (II) intel(0): C0DRB1: 0x00000000 (0x0000) (II) intel(0): C0DRB2: 0x00000000 (0x0000) (II) intel(0): C0DRB3: 0x00000000 (0x0000) (II) intel(0): C1DRB0: 0x00000000 (0x0000) (II) intel(0): C1DRB1: 0x00000000 (0x0000) (II) intel(0): C1DRB2: 0x00000000 (0x0000) (II) intel(0): C1DRB3: 0x00000000 (0x0000) (II) intel(0): C0DRA01: 0x00000000 (0x0000) (II) intel(0): C0DRA23: 0x00000000 (0x0000) (II) intel(0): C1DRA01: 0x00000000 (0x0000) (II) intel(0): C1DRA23: 0x00000000 (0x0000) (II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) (II) intel(0): VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4) (II) intel(0): DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled) (II) intel(0): CACHE_MODE_0: 0x00000000 (II) intel(0): D_STATE: 0x0000030f (II) intel(0): DSPCLK_GATE_D: 0x00000000 (clock gates disabled:) (II) intel(0): RENCLK_GATE_D1: 0x00000000 (II) intel(0): RENCLK_GATE_D2: 0x00000000 (II) intel(0): SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected) (II) intel(0): SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected) (II) intel(0): SDVOUDI: 0x00000000 (II) intel(0): DSPARB: 0x00015455 (II) intel(0): DSPFW1: 0x00000000 (II) intel(0): DSPFW2: 0x00000000 (II) intel(0): DSPFW3: 0x00000000 (II) intel(0): ADPA: 0x40009c18 (disabled, pipe B, +hsync, +vsync) (II) intel(0): LVDS: 0xc0000300 (enabled, pipe B, 18 bit, 1 channel) (II) intel(0): DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOB: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOC: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOA_SRCDIM: 0x00000000 (II) intel(0): DVOB_SRCDIM: 0x00000000 (II) intel(0): DVOC_SRCDIM: 0x00000000 (II) intel(0): PP_CONTROL: 0x00000001 (power target: on) (II) intel(0): PP_STATUS: 0xd0000009 (on, ready, sequencing on) (II) intel(0): PP_ON_DELAYS: 0x00fa09c4 (II) intel(0): PP_OFF_DELAYS: 0x00fa09c4 (II) intel(0): PP_DIVISOR: 0x00270f04 (II) intel(0): PFIT_CONTROL: 0x80000668 (II) intel(0): PFIT_PGM_RATIOS: 0x00000000 (II) intel(0): PORT_HOTPLUG_EN: 0x00000000 (II) intel(0): PORT_HOTPLUG_STAT: 0x00000000 (II) intel(0): DSPACNTR: 0x00000000 (disabled, pipe A) (II) intel(0): DSPASTRIDE: 0x00000000 (0 bytes) (II) intel(0): DSPAPOS: 0x00000000 (0, 0) (II) intel(0): DSPASIZE: 0x00000000 (1, 1) (II) intel(0): DSPABASE: 0x00000000 (II) intel(0): DSPASURF: 0x00000000 (II) intel(0): DSPATILEOFF: 0x00000000 (II) intel(0): PIPEACONF: 0x80000000 (enabled, single-wide) (II) intel(0): PIPEASRC: 0x027f01df (640, 480) (II) intel(0): PIPEASTAT: 0x80020200 (status: FIFO_UNDERRUN VBLANK_INT_ENABLE VSYNC_INT_STATUS) (II) intel(0): FPA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): FPA1: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): DPLL_A: 0x808b0000 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 13, p2 = 4) (II) intel(0): DPLL_A_MD: 0x00000000 (II) intel(0): HTOTAL_A: 0x031f027f (640 active, 800 total) (II) intel(0): HBLANK_A: 0x03170287 (648 start, 792 end) (II) intel(0): HSYNC_A: 0x02ef028f (656 start, 752 end) (II) intel(0): VTOTAL_A: 0x020c01df (480 active, 525 total) (II) intel(0): VBLANK_A: 0x020401e7 (488 start, 517 end) (II) intel(0): VSYNC_A: 0x01eb01e9 (490 start, 492 end) (II) intel(0): BCLRPAT_A: 0x00000000 (II) intel(0): VSYNCSHIFT_A: 0x00000000 (II) intel(0): DSPBCNTR: 0x49000000 (disabled, pipe B) (II) intel(0): DSPBSTRIDE: 0x00000280 (640 bytes) (II) intel(0): DSPBPOS: 0x00000000 (0, 0) (II) intel(0): DSPBSIZE: 0x018f02cf (720, 400) (II) intel(0): DSPBBASE: 0x00000000 (II) intel(0): DSPBSURF: 0x00000000 (II) intel(0): DSPBTILEOFF: 0x00000000 (II) intel(0): PIPEBCONF: 0x80000000 (enabled, single-wide) (II) intel(0): PIPEBSRC: 0x027f018f (640, 400) (II) intel(0): PIPEBSTAT: 0x00020200 (status: VBLANK_INT_ENABLE VSYNC_INT_STATUS) (II) intel(0): FPB0: 0x00061207 (n = 6, m1 = 18, m2 = 7) (II) intel(0): FPB1: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): DPLL_B: 0x90016000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 1, p2 = 14) (II) intel(0): DPLL_B_MD: 0x00000000 (II) intel(0): HTOTAL_B: 0x053f03ff (1024 active, 1344 total) (II) intel(0): HBLANK_B: 0x053f03ff (1024 start, 1344 end) (II) intel(0): HSYNC_B: 0x049f0417 (1048 start, 1184 end) (II) intel(0): VTOTAL_B: 0x032502ff (768 active, 806 total) (II) intel(0): VBLANK_B: 0x032502ff (768 start, 806 end) (II) intel(0): VSYNC_B: 0x03080302 (771 start, 777 end) (II) intel(0): BCLRPAT_B: 0x00000000 (II) intel(0): VSYNCSHIFT_B: 0x00000000 (II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (II) intel(0): VCLK_POST_DIV: 0x0000888b (II) intel(0): VGACNTRL: 0x2204008e (enabled) (II) intel(0): TV_CTL: 0x00000000 (II) intel(0): TV_DAC: 0x00000000 (II) intel(0): TV_CSC_Y: 0x00000000 (II) intel(0): TV_CSC_Y2: 0x00000000 (II) intel(0): TV_CSC_U: 0x00000000 (II) intel(0): TV_CSC_U2: 0x00000000 (II) intel(0): TV_CSC_V: 0x00000000 (II) intel(0): TV_CSC_V2: 0x00000000 (II) intel(0): TV_CLR_KNOBS: 0x00000000 (II) intel(0): TV_CLR_LEVEL: 0x00000000 (II) intel(0): TV_H_CTL_1: 0x00000000 (II) intel(0): TV_H_CTL_2: 0x00000000 (II) intel(0): TV_H_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_1: 0x00000000 (II) intel(0): TV_V_CTL_2: 0x00000000 (II) intel(0): TV_V_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_4: 0x00000000 (II) intel(0): TV_V_CTL_5: 0x00000000 (II) intel(0): TV_V_CTL_6: 0x00000000 (II) intel(0): TV_V_CTL_7: 0x00000000 (II) intel(0): TV_SC_CTL_1: 0x00000000 (II) intel(0): TV_SC_CTL_2: 0x00000000 (II) intel(0): TV_SC_CTL_3: 0x00000000 (II) intel(0): TV_WIN_POS: 0x00000000 (II) intel(0): TV_WIN_SIZE: 0x00000000 (II) intel(0): TV_FILTER_CTL_1: 0x00000000 (II) intel(0): TV_FILTER_CTL_2: 0x00000000 (II) intel(0): TV_FILTER_CTL_3: 0x00000000 (II) intel(0): TV_CC_CONTROL: 0x00000000 (II) intel(0): TV_CC_DATA: 0x00000000 (II) intel(0): TV_H_LUMA_0: 0x00000000 (II) intel(0): TV_H_LUMA_59: 0x00000000 (II) intel(0): TV_H_CHROMA_0: 0x00000000 (II) intel(0): TV_H_CHROMA_59: 0x00000000 (II) intel(0): FBC_CFB_BASE: 0x00000000 (II) intel(0): FBC_LL_BASE: 0x00000000 (II) intel(0): FBC_CONTROL: 0x00000000 (II) intel(0): FBC_COMMAND: 0x00000000 (II) intel(0): FBC_STATUS: 0x20000000 (II) intel(0): FBC_CONTROL2: 0x00000000 (II) intel(0): FBC_FENCE_OFF: 0x00000000 (II) intel(0): FBC_MOD_NUM: 0x00000000 (II) intel(0): MI_MODE: 0x00000000 (II) intel(0): MI_ARB_STATE: 0x00000000 (II) intel(0): MI_RDRET_STATE: 0x00000000 (II) intel(0): ECOSKPD: 0x00000307 (II) intel(0): DP_B: 0x00000000 (II) intel(0): DPB_AUX_CH_CTL: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_C: 0x00000000 (II) intel(0): DPC_AUX_CH_CTL: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_D: 0x00000000 (II) intel(0): DPD_AUX_CH_CTL: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA5: 0x00000000 (II) intel(0): pipe A dot 25153 n 2 m1 18 m2 7 p1 13 p2 4 (II) intel(0): pipe B dot 64232 n 6 m1 18 m2 7 p1 1 p2 14 (II) intel(0): DumpRegsEnd (II) intel(0): xf86UnbindGARTMemory: unbind key 0 (II) intel(0): xf86UnbindGARTMemory: unbind key 1 (II) intel(0): xf86UnbindGARTMemory: unbind key 2 (II) intel(0): xf86UnbindGARTMemory: unbind key 3 (II) intel(0): xf86UnbindGARTMemory: unbind key 4 (II) Open ACPI successful (/var/run/acpid.socket) (II) AIGLX: Resuming AIGLX clients after VT switch (II) intel(0): xf86BindGARTMemory: bind key 0 at 0x073f4000 (pgoffset 29684) (II) intel(0): xf86BindGARTMemory: bind key 1 at 0x073f5000 (pgoffset 29685) (II) intel(0): xf86BindGARTMemory: bind key 2 at 0x073f9000 (pgoffset 29689) (II) intel(0): xf86BindGARTMemory: bind key 3 at 0x073fa000 (pgoffset 29690) (II) intel(0): xf86BindGARTMemory: bind key 4 at 0x073fe000 (pgoffset 29694) (II) intel(0): Fixed memory allocation layout: (II) intel(0): 0x00000000-0x005fffff: exa offscreen (6144 kB) (II) intel(0): 0x007df000: end of stolen memory (II) intel(0): 0x007df000-0x073f3fff: DRI memory manager (110676 kB) (II) intel(0): 0x073f4000-0x073f4fff: Core cursor (4 kB, 0x000000001e1f7000 physical ) (II) intel(0): 0x073f5000-0x073f8fff: ARGB cursor (16 kB, 0x000000001e28c000 physical ) (II) intel(0): 0x073f9000-0x073f9fff: Core cursor (4 kB, 0x000000001f07a000 physical ) (II) intel(0): 0x073fa000-0x073fdfff: ARGB cursor (16 kB, 0x000000001e238000 physical ) (II) intel(0): 0x073fe000-0x073fefff: overlay registers (4 kB, 0x000000001f357000 physical ) (II) intel(0): 0x08000000: end of aperture (II) intel(0): BO memory allocation layout: (II) intel(0): 0x007df000: start of memory manager (II) intel(0): 0x00800000-0x009fffff: depth buffer (2048 kB) X tiled (II) intel(0): 0x00a00000-0x00bfffff: back buffer (2048 kB) X tiled (II) intel(0): 0x00c00000-0x00dfffff: front buffer (2048 kB) X tiled (II) intel(0): 0x00e00000-0x00e07fff: logical 3D context (32 kB) (II) intel(0): 0x073f4000: end of memory manager (WW) intel(0): PRB0_CTL (0x0001f001) indicates ring buffer enabled (WW) intel(0): Existing errors found in hardware state. (II) intel(0): using SSC reference clock of 66 MHz (WW) intel(0): Chosen PLL clock of 66.5 Mhz more than 2% away from desired 65.0 Mhz (II) intel(0): Mode for pipe B: (II) intel(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 806 (48.4 kHz) (II) intel(0): chosen: dotclock 66523 vco 931333 ((m 127, m1 20, m2 15), n 7, (p 14, p1 1, p2 14)) (II) intel(0): Selecting standard 18 bit TMDS pixel format. (II) intel(0): Hardware state at EnterVT: (II) intel(0): DumpRegsBegin (II) intel(0): CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present) (II) intel(0): C0DRB0: 0x00000000 (0x0000) (II) intel(0): C0DRB1: 0x00000000 (0x0000) (II) intel(0): C0DRB2: 0x00000000 (0x0000) (II) intel(0): C0DRB3: 0x00000000 (0x0000) (II) intel(0): C1DRB0: 0x00000000 (0x0000) (II) intel(0): C1DRB1: 0x00000000 (0x0000) (II) intel(0): C1DRB2: 0x00000000 (0x0000) (II) intel(0): C1DRB3: 0x00000000 (0x0000) (II) intel(0): C0DRA01: 0x00000000 (0x0000) (II) intel(0): C0DRA23: 0x00000000 (0x0000) (II) intel(0): C1DRA01: 0x00000000 (0x0000) (II) intel(0): C1DRA23: 0x00000000 (0x0000) (II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) (II) intel(0): VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4) (II) intel(0): DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled) (II) intel(0): CACHE_MODE_0: 0x00000000 (II) intel(0): D_STATE: 0x0000030f (II) intel(0): DSPCLK_GATE_D: 0x00000000 (clock gates disabled:) (II) intel(0): RENCLK_GATE_D1: 0x00000001 (II) intel(0): RENCLK_GATE_D2: 0x00000000 (II) intel(0): SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected) (II) intel(0): SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected) (II) intel(0): SDVOUDI: 0x00000000 (II) intel(0): DSPARB: 0x0001fe00 (II) intel(0): DSPFW1: 0x00000000 (II) intel(0): DSPFW2: 0x00000000 (II) intel(0): DSPFW3: 0x00000000 (II) intel(0): ADPA: 0x40009c18 (disabled, pipe B, +hsync, +vsync) (II) intel(0): LVDS: 0xc0000300 (enabled, pipe B, 18 bit, 1 channel) (II) intel(0): DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOB: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOC: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOA_SRCDIM: 0x00000000 (II) intel(0): DVOB_SRCDIM: 0x00000000 (II) intel(0): DVOC_SRCDIM: 0x00000000 (II) intel(0): PP_CONTROL: 0x00000001 (power target: on) (II) intel(0): PP_STATUS: 0xc0000008 (on, ready, sequencing idle) (II) intel(0): PP_ON_DELAYS: 0x00fa09c4 (II) intel(0): PP_OFF_DELAYS: 0x00fa09c4 (II) intel(0): PP_DIVISOR: 0x00270f04 (II) intel(0): PFIT_CONTROL: 0x00000008 (II) intel(0): PFIT_PGM_RATIOS: 0x00000000 (II) intel(0): PORT_HOTPLUG_EN: 0x00000000 (II) intel(0): PORT_HOTPLUG_STAT: 0x00000000 (II) intel(0): DSPACNTR: 0x00000000 (disabled, pipe A) (II) intel(0): DSPASTRIDE: 0x00000000 (0 bytes) (II) intel(0): DSPAPOS: 0x00000000 (0, 0) (II) intel(0): DSPASIZE: 0x00000000 (1, 1) (II) intel(0): DSPABASE: 0x00000000 (II) intel(0): DSPASURF: 0x00000000 (II) intel(0): DSPATILEOFF: 0x00000000 (II) intel(0): PIPEACONF: 0x80000000 (enabled, single-wide) (II) intel(0): PIPEASRC: 0x027f01df (640, 480) (II) intel(0): PIPEASTAT: 0x80000207 (status: FIFO_UNDERRUN VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS) (II) intel(0): FPA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): FPA1: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): DPLL_A: 0x808b0000 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 13, p2 = 4) (II) intel(0): DPLL_A_MD: 0x00000000 (II) intel(0): HTOTAL_A: 0x031f027f (640 active, 800 total) (II) intel(0): HBLANK_A: 0x03170287 (648 start, 792 end) (II) intel(0): HSYNC_A: 0x02ef028f (656 start, 752 end) (II) intel(0): VTOTAL_A: 0x020c01df (480 active, 525 total) (II) intel(0): VBLANK_A: 0x020401e7 (488 start, 517 end) (II) intel(0): VSYNC_A: 0x01eb01e9 (490 start, 492 end) (II) intel(0): BCLRPAT_A: 0x00000000 (II) intel(0): VSYNCSHIFT_A: 0x00000000 (II) intel(0): DSPBCNTR: 0xd5000000 (enabled, pipe B) (II) intel(0): DSPBSTRIDE: 0x00000800 (2048 bytes) (II) intel(0): DSPBPOS: 0x00000000 (0, 0) (II) intel(0): DSPBSIZE: 0x02ff03ff (1024, 768) (II) intel(0): DSPBBASE: 0x00c00000 (II) intel(0): DSPBSURF: 0x00000000 (II) intel(0): DSPBTILEOFF: 0x00000000 (II) intel(0): PIPEBCONF: 0x80000000 (enabled, single-wide) (II) intel(0): PIPEBSRC: 0x03ff02ff (1024, 768) (II) intel(0): PIPEBSTAT: 0x80000202 (status: FIFO_UNDERRUN VSYNC_INT_STATUS VBLANK_INT_STATUS) (II) intel(0): FPB0: 0x0007140f (n = 7, m1 = 20, m2 = 15) (II) intel(0): FPB1: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): DPLL_B: 0x90016000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 1, p2 = 14) (II) intel(0): DPLL_B_MD: 0x00000000 (II) intel(0): HTOTAL_B: 0x053f03ff (1024 active, 1344 total) (II) intel(0): HBLANK_B: 0x053f03ff (1024 start, 1344 end) (II) intel(0): HSYNC_B: 0x049f0417 (1048 start, 1184 end) (II) intel(0): VTOTAL_B: 0x032502ff (768 active, 806 total) (II) intel(0): VBLANK_B: 0x032502ff (768 start, 806 end) (II) intel(0): VSYNC_B: 0x03080302 (771 start, 777 end) (II) intel(0): BCLRPAT_B: 0x00000000 (II) intel(0): VSYNCSHIFT_B: 0x00000000 (II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (II) intel(0): VCLK_POST_DIV: 0x0000888b (II) intel(0): VGACNTRL: 0x80000000 (disabled) (II) intel(0): TV_CTL: 0x00000000 (II) intel(0): TV_DAC: 0x00000000 (II) intel(0): TV_CSC_Y: 0x00000000 (II) intel(0): TV_CSC_Y2: 0x00000000 (II) intel(0): TV_CSC_U: 0x00000000 (II) intel(0): TV_CSC_U2: 0x00000000 (II) intel(0): TV_CSC_V: 0x00000000 (II) intel(0): TV_CSC_V2: 0x00000000 (II) intel(0): TV_CLR_KNOBS: 0x00000000 (II) intel(0): TV_CLR_LEVEL: 0x00000000 (II) intel(0): TV_H_CTL_1: 0x00000000 (II) intel(0): TV_H_CTL_2: 0x00000000 (II) intel(0): TV_H_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_1: 0x00000000 (II) intel(0): TV_V_CTL_2: 0x00000000 (II) intel(0): TV_V_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_4: 0x00000000 (II) intel(0): TV_V_CTL_5: 0x00000000 (II) intel(0): TV_V_CTL_6: 0x00000000 (II) intel(0): TV_V_CTL_7: 0x00000000 (II) intel(0): TV_SC_CTL_1: 0x00000000 (II) intel(0): TV_SC_CTL_2: 0x00000000 (II) intel(0): TV_SC_CTL_3: 0x00000000 (II) intel(0): TV_WIN_POS: 0x00000000 (II) intel(0): TV_WIN_SIZE: 0x00000000 (II) intel(0): TV_FILTER_CTL_1: 0x00000000 (II) intel(0): TV_FILTER_CTL_2: 0x00000000 (II) intel(0): TV_FILTER_CTL_3: 0x00000000 (II) intel(0): TV_CC_CONTROL: 0x00000000 (II) intel(0): TV_CC_DATA: 0x00000000 (II) intel(0): TV_H_LUMA_0: 0x00000000 (II) intel(0): TV_H_LUMA_59: 0x00000000 (II) intel(0): TV_H_CHROMA_0: 0x00000000 (II) intel(0): TV_H_CHROMA_59: 0x00000000 (II) intel(0): FBC_CFB_BASE: 0x00000000 (II) intel(0): FBC_LL_BASE: 0x00000000 (II) intel(0): FBC_CONTROL: 0x00000000 (II) intel(0): FBC_COMMAND: 0x00000000 (II) intel(0): FBC_STATUS: 0x20000000 (II) intel(0): FBC_CONTROL2: 0x00000000 (II) intel(0): FBC_FENCE_OFF: 0x00000000 (II) intel(0): FBC_MOD_NUM: 0x00000000 (II) intel(0): MI_MODE: 0x00000000 (II) intel(0): MI_ARB_STATE: 0x00000000 (II) intel(0): MI_RDRET_STATE: 0x00000000 (II) intel(0): ECOSKPD: 0x00000307 (II) intel(0): DP_B: 0x00000000 (II) intel(0): DPB_AUX_CH_CTL: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_C: 0x00000000 (II) intel(0): DPC_AUX_CH_CTL: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_D: 0x00000000 (II) intel(0): DPD_AUX_CH_CTL: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA5: 0x00000000 (II) intel(0): pipe A dot 25153 n 2 m1 18 m2 7 p1 13 p2 4 (II) intel(0): pipe B dot 66523 n 7 m1 20 m2 15 p1 1 p2 14 (II) intel(0): DumpRegsEnd (II) intel(0): Output configuration: (II) intel(0): Pipe A is off (II) intel(0): Display plane A is now disabled and connected to pipe A. (WW) intel(0): Hardware claims pipe A is on while software believes it is off (II) intel(0): Pipe B is on (II) intel(0): Display plane B is now enabled and connected to pipe B. (II) intel(0): Output VGA is connected to pipe none (II) intel(0): Output LVDS is connected to pipe B (II) intel(0): [drm] mapped front buffer at 0xe0c00000, handle = 0x2c180000 (II) Mouse0: ps2EnableDataReporting: succeeded (EE) intel(0): underrun on pipe B! (II) AIGLX: Suspending AIGLX clients for VT switch (II) intel(0): Comparing regs from server start up to After LeaveVT (WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd0000009 (WW) intel(0): PP_STATUS before: on, ready, sequencing idle (WW) intel(0): PP_STATUS after: on, ready, sequencing on (WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x80000202 to 0x00020200 (WW) intel(0): PIPEBSTAT before: status: FIFO_UNDERRUN VSYNC_INT_STATUS VBLANK_INT_STATUS (WW) intel(0): PIPEBSTAT after: status: VBLANK_INT_ENABLE VSYNC_INT_STATUS (II) intel(0): DumpRegsBegin (II) intel(0): CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present) (II) intel(0): C0DRB0: 0x00000000 (0x0000) (II) intel(0): C0DRB1: 0x00000000 (0x0000) (II) intel(0): C0DRB2: 0x00000000 (0x0000) (II) intel(0): C0DRB3: 0x00000000 (0x0000) (II) intel(0): C1DRB0: 0x00000000 (0x0000) (II) intel(0): C1DRB1: 0x00000000 (0x0000) (II) intel(0): C1DRB2: 0x00000000 (0x0000) (II) intel(0): C1DRB3: 0x00000000 (0x0000) (II) intel(0): C0DRA01: 0x00000000 (0x0000) (II) intel(0): C0DRA23: 0x00000000 (0x0000) (II) intel(0): C1DRA01: 0x00000000 (0x0000) (II) intel(0): C1DRA23: 0x00000000 (0x0000) (II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) (II) intel(0): VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4) (II) intel(0): DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled) (II) intel(0): CACHE_MODE_0: 0x00000000 (II) intel(0): D_STATE: 0x0000030f (II) intel(0): DSPCLK_GATE_D: 0x00000000 (clock gates disabled:) (II) intel(0): RENCLK_GATE_D1: 0x00000000 (II) intel(0): RENCLK_GATE_D2: 0x00000000 (II) intel(0): SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected) (II) intel(0): SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected) (II) intel(0): SDVOUDI: 0x00000000 (II) intel(0): DSPARB: 0x00015455 (II) intel(0): DSPFW1: 0x00000000 (II) intel(0): DSPFW2: 0x00000000 (II) intel(0): DSPFW3: 0x00000000 (II) intel(0): ADPA: 0x40009c18 (disabled, pipe B, +hsync, +vsync) (II) intel(0): LVDS: 0xc0000300 (enabled, pipe B, 18 bit, 1 channel) (II) intel(0): DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOB: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOC: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOA_SRCDIM: 0x00000000 (II) intel(0): DVOB_SRCDIM: 0x00000000 (II) intel(0): DVOC_SRCDIM: 0x00000000 (II) intel(0): PP_CONTROL: 0x00000001 (power target: on) (II) intel(0): PP_STATUS: 0xd0000009 (on, ready, sequencing on) (II) intel(0): PP_ON_DELAYS: 0x00fa09c4 (II) intel(0): PP_OFF_DELAYS: 0x00fa09c4 (II) intel(0): PP_DIVISOR: 0x00270f04 (II) intel(0): PFIT_CONTROL: 0x80000668 (II) intel(0): PFIT_PGM_RATIOS: 0x00000000 (II) intel(0): PORT_HOTPLUG_EN: 0x00000000 (II) intel(0): PORT_HOTPLUG_STAT: 0x00000000 (II) intel(0): DSPACNTR: 0x00000000 (disabled, pipe A) (II) intel(0): DSPASTRIDE: 0x00000000 (0 bytes) (II) intel(0): DSPAPOS: 0x00000000 (0, 0) (II) intel(0): DSPASIZE: 0x00000000 (1, 1) (II) intel(0): DSPABASE: 0x00000000 (II) intel(0): DSPASURF: 0x00000000 (II) intel(0): DSPATILEOFF: 0x00000000 (II) intel(0): PIPEACONF: 0x80000000 (enabled, single-wide) (II) intel(0): PIPEASRC: 0x027f01df (640, 480) (II) intel(0): PIPEASTAT: 0x80000207 (status: FIFO_UNDERRUN VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS) (II) intel(0): FPA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): FPA1: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): DPLL_A: 0x808b0000 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 13, p2 = 4) (II) intel(0): DPLL_A_MD: 0x00000000 (II) intel(0): HTOTAL_A: 0x031f027f (640 active, 800 total) (II) intel(0): HBLANK_A: 0x03170287 (648 start, 792 end) (II) intel(0): HSYNC_A: 0x02ef028f (656 start, 752 end) (II) intel(0): VTOTAL_A: 0x020c01df (480 active, 525 total) (II) intel(0): VBLANK_A: 0x020401e7 (488 start, 517 end) (II) intel(0): VSYNC_A: 0x01eb01e9 (490 start, 492 end) (II) intel(0): BCLRPAT_A: 0x00000000 (II) intel(0): VSYNCSHIFT_A: 0x00000000 (II) intel(0): DSPBCNTR: 0x49000000 (disabled, pipe B) (II) intel(0): DSPBSTRIDE: 0x00000280 (640 bytes) (II) intel(0): DSPBPOS: 0x00000000 (0, 0) (II) intel(0): DSPBSIZE: 0x018f02cf (720, 400) (II) intel(0): DSPBBASE: 0x00000000 (II) intel(0): DSPBSURF: 0x00000000 (II) intel(0): DSPBTILEOFF: 0x00000000 (II) intel(0): PIPEBCONF: 0x80000000 (enabled, single-wide) (II) intel(0): PIPEBSRC: 0x027f018f (640, 400) (II) intel(0): PIPEBSTAT: 0x00020200 (status: VBLANK_INT_ENABLE VSYNC_INT_STATUS) (II) intel(0): FPB0: 0x00061207 (n = 6, m1 = 18, m2 = 7) (II) intel(0): FPB1: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): DPLL_B: 0x90016000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 1, p2 = 14) (II) intel(0): DPLL_B_MD: 0x00000000 (II) intel(0): HTOTAL_B: 0x053f03ff (1024 active, 1344 total) (II) intel(0): HBLANK_B: 0x053f03ff (1024 start, 1344 end) (II) intel(0): HSYNC_B: 0x049f0417 (1048 start, 1184 end) (II) intel(0): VTOTAL_B: 0x032502ff (768 active, 806 total) (II) intel(0): VBLANK_B: 0x032502ff (768 start, 806 end) (II) intel(0): VSYNC_B: 0x03080302 (771 start, 777 end) (II) intel(0): BCLRPAT_B: 0x00000000 (II) intel(0): VSYNCSHIFT_B: 0x00000000 (II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (II) intel(0): VCLK_POST_DIV: 0x0000888b (II) intel(0): VGACNTRL: 0x2204008e (enabled) (II) intel(0): TV_CTL: 0x00000000 (II) intel(0): TV_DAC: 0x00000000 (II) intel(0): TV_CSC_Y: 0x00000000 (II) intel(0): TV_CSC_Y2: 0x00000000 (II) intel(0): TV_CSC_U: 0x00000000 (II) intel(0): TV_CSC_U2: 0x00000000 (II) intel(0): TV_CSC_V: 0x00000000 (II) intel(0): TV_CSC_V2: 0x00000000 (II) intel(0): TV_CLR_KNOBS: 0x00000000 (II) intel(0): TV_CLR_LEVEL: 0x00000000 (II) intel(0): TV_H_CTL_1: 0x00000000 (II) intel(0): TV_H_CTL_2: 0x00000000 (II) intel(0): TV_H_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_1: 0x00000000 (II) intel(0): TV_V_CTL_2: 0x00000000 (II) intel(0): TV_V_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_4: 0x00000000 (II) intel(0): TV_V_CTL_5: 0x00000000 (II) intel(0): TV_V_CTL_6: 0x00000000 (II) intel(0): TV_V_CTL_7: 0x00000000 (II) intel(0): TV_SC_CTL_1: 0x00000000 (II) intel(0): TV_SC_CTL_2: 0x00000000 (II) intel(0): TV_SC_CTL_3: 0x00000000 (II) intel(0): TV_WIN_POS: 0x00000000 (II) intel(0): TV_WIN_SIZE: 0x00000000 (II) intel(0): TV_FILTER_CTL_1: 0x00000000 (II) intel(0): TV_FILTER_CTL_2: 0x00000000 (II) intel(0): TV_FILTER_CTL_3: 0x00000000 (II) intel(0): TV_CC_CONTROL: 0x00000000 (II) intel(0): TV_CC_DATA: 0x00000000 (II) intel(0): TV_H_LUMA_0: 0x00000000 (II) intel(0): TV_H_LUMA_59: 0x00000000 (II) intel(0): TV_H_CHROMA_0: 0x00000000 (II) intel(0): TV_H_CHROMA_59: 0x00000000 (II) intel(0): FBC_CFB_BASE: 0x00000000 (II) intel(0): FBC_LL_BASE: 0x00000000 (II) intel(0): FBC_CONTROL: 0x00000000 (II) intel(0): FBC_COMMAND: 0x00000000 (II) intel(0): FBC_STATUS: 0x20000000 (II) intel(0): FBC_CONTROL2: 0x00000000 (II) intel(0): FBC_FENCE_OFF: 0x00000000 (II) intel(0): FBC_MOD_NUM: 0x00000000 (II) intel(0): MI_MODE: 0x00000000 (II) intel(0): MI_ARB_STATE: 0x00000000 (II) intel(0): MI_RDRET_STATE: 0x00000000 (II) intel(0): ECOSKPD: 0x00000307 (II) intel(0): DP_B: 0x00000000 (II) intel(0): DPB_AUX_CH_CTL: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_C: 0x00000000 (II) intel(0): DPC_AUX_CH_CTL: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_D: 0x00000000 (II) intel(0): DPD_AUX_CH_CTL: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA5: 0x00000000 (II) intel(0): pipe A dot 25153 n 2 m1 18 m2 7 p1 13 p2 4 (II) intel(0): pipe B dot 64232 n 6 m1 18 m2 7 p1 1 p2 14 (II) intel(0): DumpRegsEnd (II) intel(0): xf86UnbindGARTMemory: unbind key 0 (II) intel(0): xf86UnbindGARTMemory: unbind key 1 (II) intel(0): xf86UnbindGARTMemory: unbind key 2 (II) intel(0): xf86UnbindGARTMemory: unbind key 3 (II) intel(0): xf86UnbindGARTMemory: unbind key 4 (II) Open ACPI successful (/var/run/acpid.socket) (II) AIGLX: Resuming AIGLX clients after VT switch (II) intel(0): xf86BindGARTMemory: bind key 0 at 0x073f4000 (pgoffset 29684) (II) intel(0): xf86BindGARTMemory: bind key 1 at 0x073f5000 (pgoffset 29685) (II) intel(0): xf86BindGARTMemory: bind key 2 at 0x073f9000 (pgoffset 29689) (II) intel(0): xf86BindGARTMemory: bind key 3 at 0x073fa000 (pgoffset 29690) (II) intel(0): xf86BindGARTMemory: bind key 4 at 0x073fe000 (pgoffset 29694) (II) intel(0): Fixed memory allocation layout: (II) intel(0): 0x00000000-0x005fffff: exa offscreen (6144 kB) (II) intel(0): 0x007df000: end of stolen memory (II) intel(0): 0x007df000-0x073f3fff: DRI memory manager (110676 kB) (II) intel(0): 0x073f4000-0x073f4fff: Core cursor (4 kB, 0x000000001e1f7000 physical ) (II) intel(0): 0x073f5000-0x073f8fff: ARGB cursor (16 kB, 0x000000001e28c000 physical ) (II) intel(0): 0x073f9000-0x073f9fff: Core cursor (4 kB, 0x000000001f07a000 physical ) (II) intel(0): 0x073fa000-0x073fdfff: ARGB cursor (16 kB, 0x000000001e238000 physical ) (II) intel(0): 0x073fe000-0x073fefff: overlay registers (4 kB, 0x000000001f357000 physical ) (II) intel(0): 0x08000000: end of aperture (II) intel(0): BO memory allocation layout: (II) intel(0): 0x007df000: start of memory manager (II) intel(0): 0x00800000-0x009fffff: depth buffer (2048 kB) X tiled (II) intel(0): 0x00a00000-0x00bfffff: back buffer (2048 kB) X tiled (II) intel(0): 0x00c00000-0x00dfffff: front buffer (2048 kB) X tiled (II) intel(0): 0x00e00000-0x00e07fff: logical 3D context (32 kB) (II) intel(0): 0x073f4000: end of memory manager (WW) intel(0): PRB0_CTL (0x0001f001) indicates ring buffer enabled (WW) intel(0): Existing errors found in hardware state. (II) intel(0): using SSC reference clock of 66 MHz (WW) intel(0): Chosen PLL clock of 66.5 Mhz more than 2% away from desired 65.0 Mhz (II) intel(0): Mode for pipe B: (II) intel(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 806 (48.4 kHz) (II) intel(0): chosen: dotclock 66523 vco 931333 ((m 127, m1 20, m2 15), n 7, (p 14, p1 1, p2 14)) (II) intel(0): Selecting standard 18 bit TMDS pixel format. (II) intel(0): Hardware state at EnterVT: (II) intel(0): DumpRegsBegin (II) intel(0): CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present) (II) intel(0): C0DRB0: 0x00000000 (0x0000) (II) intel(0): C0DRB1: 0x00000000 (0x0000) (II) intel(0): C0DRB2: 0x00000000 (0x0000) (II) intel(0): C0DRB3: 0x00000000 (0x0000) (II) intel(0): C1DRB0: 0x00000000 (0x0000) (II) intel(0): C1DRB1: 0x00000000 (0x0000) (II) intel(0): C1DRB2: 0x00000000 (0x0000) (II) intel(0): C1DRB3: 0x00000000 (0x0000) (II) intel(0): C0DRA01: 0x00000000 (0x0000) (II) intel(0): C0DRA23: 0x00000000 (0x0000) (II) intel(0): C1DRA01: 0x00000000 (0x0000) (II) intel(0): C1DRA23: 0x00000000 (0x0000) (II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) (II) intel(0): VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4) (II) intel(0): DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled) (II) intel(0): CACHE_MODE_0: 0x00000000 (II) intel(0): D_STATE: 0x0000030f (II) intel(0): DSPCLK_GATE_D: 0x00000000 (clock gates disabled:) (II) intel(0): RENCLK_GATE_D1: 0x00000001 (II) intel(0): RENCLK_GATE_D2: 0x00000000 (II) intel(0): SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected) (II) intel(0): SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected) (II) intel(0): SDVOUDI: 0x00000000 (II) intel(0): DSPARB: 0x0001fe00 (II) intel(0): DSPFW1: 0x00000000 (II) intel(0): DSPFW2: 0x00000000 (II) intel(0): DSPFW3: 0x00000000 (II) intel(0): ADPA: 0x40009c18 (disabled, pipe B, +hsync, +vsync) (II) intel(0): LVDS: 0xc0000300 (enabled, pipe B, 18 bit, 1 channel) (II) intel(0): DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOB: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOC: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOA_SRCDIM: 0x00000000 (II) intel(0): DVOB_SRCDIM: 0x00000000 (II) intel(0): DVOC_SRCDIM: 0x00000000 (II) intel(0): PP_CONTROL: 0x00000001 (power target: on) (II) intel(0): PP_STATUS: 0xd0000009 (on, ready, sequencing on) (II) intel(0): PP_ON_DELAYS: 0x00fa09c4 (II) intel(0): PP_OFF_DELAYS: 0x00fa09c4 (II) intel(0): PP_DIVISOR: 0x00270f04 (II) intel(0): PFIT_CONTROL: 0x00000008 (II) intel(0): PFIT_PGM_RATIOS: 0x00000000 (II) intel(0): PORT_HOTPLUG_EN: 0x00000000 (II) intel(0): PORT_HOTPLUG_STAT: 0x00000000 (II) intel(0): DSPACNTR: 0x00000000 (disabled, pipe A) (II) intel(0): DSPASTRIDE: 0x00000000 (0 bytes) (II) intel(0): DSPAPOS: 0x00000000 (0, 0) (II) intel(0): DSPASIZE: 0x00000000 (1, 1) (II) intel(0): DSPABASE: 0x00000000 (II) intel(0): DSPASURF: 0x00000000 (II) intel(0): DSPATILEOFF: 0x00000000 (II) intel(0): PIPEACONF: 0x80000000 (enabled, single-wide) (II) intel(0): PIPEASRC: 0x027f01df (640, 480) (II) intel(0): PIPEASTAT: 0x80000207 (status: FIFO_UNDERRUN VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS) (II) intel(0): FPA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): FPA1: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): DPLL_A: 0x808b0000 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 13, p2 = 4) (II) intel(0): DPLL_A_MD: 0x00000000 (II) intel(0): HTOTAL_A: 0x031f027f (640 active, 800 total) (II) intel(0): HBLANK_A: 0x03170287 (648 start, 792 end) (II) intel(0): HSYNC_A: 0x02ef028f (656 start, 752 end) (II) intel(0): VTOTAL_A: 0x020c01df (480 active, 525 total) (II) intel(0): VBLANK_A: 0x020401e7 (488 start, 517 end) (II) intel(0): VSYNC_A: 0x01eb01e9 (490 start, 492 end) (II) intel(0): BCLRPAT_A: 0x00000000 (II) intel(0): VSYNCSHIFT_A: 0x00000000 (II) intel(0): DSPBCNTR: 0xd5000000 (enabled, pipe B) (II) intel(0): DSPBSTRIDE: 0x00000800 (2048 bytes) (II) intel(0): DSPBPOS: 0x00000000 (0, 0) (II) intel(0): DSPBSIZE: 0x02ff03ff (1024, 768) (II) intel(0): DSPBBASE: 0x00c00000 (II) intel(0): DSPBSURF: 0x00000000 (II) intel(0): DSPBTILEOFF: 0x00000000 (II) intel(0): PIPEBCONF: 0x80000000 (enabled, single-wide) (II) intel(0): PIPEBSRC: 0x03ff02ff (1024, 768) (II) intel(0): PIPEBSTAT: 0x80020202 (status: FIFO_UNDERRUN VBLANK_INT_ENABLE VSYNC_INT_STATUS VBLANK_INT_STATUS) (II) intel(0): FPB0: 0x0007140f (n = 7, m1 = 20, m2 = 15) (II) intel(0): FPB1: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): DPLL_B: 0x90016000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 1, p2 = 14) (II) intel(0): DPLL_B_MD: 0x00000000 (II) intel(0): HTOTAL_B: 0x053f03ff (1024 active, 1344 total) (II) intel(0): HBLANK_B: 0x053f03ff (1024 start, 1344 end) (II) intel(0): HSYNC_B: 0x049f0417 (1048 start, 1184 end) (II) intel(0): VTOTAL_B: 0x032502ff (768 active, 806 total) (II) intel(0): VBLANK_B: 0x032502ff (768 start, 806 end) (II) intel(0): VSYNC_B: 0x03080302 (771 start, 777 end) (II) intel(0): BCLRPAT_B: 0x00000000 (II) intel(0): VSYNCSHIFT_B: 0x00000000 (II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (II) intel(0): VCLK_POST_DIV: 0x0000888b (II) intel(0): VGACNTRL: 0x80000000 (disabled) (II) intel(0): TV_CTL: 0x00000000 (II) intel(0): TV_DAC: 0x00000000 (II) intel(0): TV_CSC_Y: 0x00000000 (II) intel(0): TV_CSC_Y2: 0x00000000 (II) intel(0): TV_CSC_U: 0x00000000 (II) intel(0): TV_CSC_U2: 0x00000000 (II) intel(0): TV_CSC_V: 0x00000000 (II) intel(0): TV_CSC_V2: 0x00000000 (II) intel(0): TV_CLR_KNOBS: 0x00000000 (II) intel(0): TV_CLR_LEVEL: 0x00000000 (II) intel(0): TV_H_CTL_1: 0x00000000 (II) intel(0): TV_H_CTL_2: 0x00000000 (II) intel(0): TV_H_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_1: 0x00000000 (II) intel(0): TV_V_CTL_2: 0x00000000 (II) intel(0): TV_V_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_4: 0x00000000 (II) intel(0): TV_V_CTL_5: 0x00000000 (II) intel(0): TV_V_CTL_6: 0x00000000 (II) intel(0): TV_V_CTL_7: 0x00000000 (II) intel(0): TV_SC_CTL_1: 0x00000000 (II) intel(0): TV_SC_CTL_2: 0x00000000 (II) intel(0): TV_SC_CTL_3: 0x00000000 (II) intel(0): TV_WIN_POS: 0x00000000 (II) intel(0): TV_WIN_SIZE: 0x00000000 (II) intel(0): TV_FILTER_CTL_1: 0x00000000 (II) intel(0): TV_FILTER_CTL_2: 0x00000000 (II) intel(0): TV_FILTER_CTL_3: 0x00000000 (II) intel(0): TV_CC_CONTROL: 0x00000000 (II) intel(0): TV_CC_DATA: 0x00000000 (II) intel(0): TV_H_LUMA_0: 0x00000000 (II) intel(0): TV_H_LUMA_59: 0x00000000 (II) intel(0): TV_H_CHROMA_0: 0x00000000 (II) intel(0): TV_H_CHROMA_59: 0x00000000 (II) intel(0): FBC_CFB_BASE: 0x00000000 (II) intel(0): FBC_LL_BASE: 0x00000000 (II) intel(0): FBC_CONTROL: 0x00000000 (II) intel(0): FBC_COMMAND: 0x00000000 (II) intel(0): FBC_STATUS: 0x20000000 (II) intel(0): FBC_CONTROL2: 0x00000000 (II) intel(0): FBC_FENCE_OFF: 0x00000000 (II) intel(0): FBC_MOD_NUM: 0x00000000 (II) intel(0): MI_MODE: 0x00000000 (II) intel(0): MI_ARB_STATE: 0x00000000 (II) intel(0): MI_RDRET_STATE: 0x00000000 (II) intel(0): ECOSKPD: 0x00000307 (II) intel(0): DP_B: 0x00000000 (II) intel(0): DPB_AUX_CH_CTL: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_C: 0x00000000 (II) intel(0): DPC_AUX_CH_CTL: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_D: 0x00000000 (II) intel(0): DPD_AUX_CH_CTL: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA5: 0x00000000 (II) intel(0): pipe A dot 25153 n 2 m1 18 m2 7 p1 13 p2 4 (II) intel(0): pipe B dot 66523 n 7 m1 20 m2 15 p1 1 p2 14 (II) intel(0): DumpRegsEnd (II) intel(0): Output configuration: (II) intel(0): Pipe A is off (II) intel(0): Display plane A is now disabled and connected to pipe A. (WW) intel(0): Hardware claims pipe A is on while software believes it is off (II) intel(0): Pipe B is on (II) intel(0): Display plane B is now enabled and connected to pipe B. (II) intel(0): Output VGA is connected to pipe none (II) intel(0): Output LVDS is connected to pipe B (II) Mouse0: ps2EnableDataReporting: succeeded (EE) intel(0): underrun on pipe B! (II) AIGLX: Suspending AIGLX clients for VT switch (II) intel(0): Comparing regs from server start up to After LeaveVT (WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd0000009 (WW) intel(0): PP_STATUS before: on, ready, sequencing idle (WW) intel(0): PP_STATUS after: on, ready, sequencing on (WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x80000202 to 0x00020200 (WW) intel(0): PIPEBSTAT before: status: FIFO_UNDERRUN VSYNC_INT_STATUS VBLANK_INT_STATUS (WW) intel(0): PIPEBSTAT after: status: VBLANK_INT_ENABLE VSYNC_INT_STATUS (II) intel(0): DumpRegsBegin (II) intel(0): CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present) (II) intel(0): C0DRB0: 0x00000000 (0x0000) (II) intel(0): C0DRB1: 0x00000000 (0x0000) (II) intel(0): C0DRB2: 0x00000000 (0x0000) (II) intel(0): C0DRB3: 0x00000000 (0x0000) (II) intel(0): C1DRB0: 0x00000000 (0x0000) (II) intel(0): C1DRB1: 0x00000000 (0x0000) (II) intel(0): C1DRB2: 0x00000000 (0x0000) (II) intel(0): C1DRB3: 0x00000000 (0x0000) (II) intel(0): C0DRA01: 0x00000000 (0x0000) (II) intel(0): C0DRA23: 0x00000000 (0x0000) (II) intel(0): C1DRA01: 0x00000000 (0x0000) (II) intel(0): C1DRA23: 0x00000000 (0x0000) (II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) (II) intel(0): VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4) (II) intel(0): DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled) (II) intel(0): CACHE_MODE_0: 0x00000000 (II) intel(0): D_STATE: 0x0000030f (II) intel(0): DSPCLK_GATE_D: 0x00000000 (clock gates disabled:) (II) intel(0): RENCLK_GATE_D1: 0x00000000 (II) intel(0): RENCLK_GATE_D2: 0x00000000 (II) intel(0): SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected) (II) intel(0): SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected) (II) intel(0): SDVOUDI: 0x00000000 (II) intel(0): DSPARB: 0x00015455 (II) intel(0): DSPFW1: 0x00000000 (II) intel(0): DSPFW2: 0x00000000 (II) intel(0): DSPFW3: 0x00000000 (II) intel(0): ADPA: 0x40009c18 (disabled, pipe B, +hsync, +vsync) (II) intel(0): LVDS: 0xc0000300 (enabled, pipe B, 18 bit, 1 channel) (II) intel(0): DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOB: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOC: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOA_SRCDIM: 0x00000000 (II) intel(0): DVOB_SRCDIM: 0x00000000 (II) intel(0): DVOC_SRCDIM: 0x00000000 (II) intel(0): PP_CONTROL: 0x00000001 (power target: on) (II) intel(0): PP_STATUS: 0xd0000009 (on, ready, sequencing on) (II) intel(0): PP_ON_DELAYS: 0x00fa09c4 (II) intel(0): PP_OFF_DELAYS: 0x00fa09c4 (II) intel(0): PP_DIVISOR: 0x00270f04 (II) intel(0): PFIT_CONTROL: 0x80000668 (II) intel(0): PFIT_PGM_RATIOS: 0x00000000 (II) intel(0): PORT_HOTPLUG_EN: 0x00000000 (II) intel(0): PORT_HOTPLUG_STAT: 0x00000000 (II) intel(0): DSPACNTR: 0x00000000 (disabled, pipe A) (II) intel(0): DSPASTRIDE: 0x00000000 (0 bytes) (II) intel(0): DSPAPOS: 0x00000000 (0, 0) (II) intel(0): DSPASIZE: 0x00000000 (1, 1) (II) intel(0): DSPABASE: 0x00000000 (II) intel(0): DSPASURF: 0x00000000 (II) intel(0): DSPATILEOFF: 0x00000000 (II) intel(0): PIPEACONF: 0x80000000 (enabled, single-wide) (II) intel(0): PIPEASRC: 0x027f01df (640, 480) (II) intel(0): PIPEASTAT: 0x80000207 (status: FIFO_UNDERRUN VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS) (II) intel(0): FPA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): FPA1: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): DPLL_A: 0x808b0000 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 13, p2 = 4) (II) intel(0): DPLL_A_MD: 0x00000000 (II) intel(0): HTOTAL_A: 0x031f027f (640 active, 800 total) (II) intel(0): HBLANK_A: 0x03170287 (648 start, 792 end) (II) intel(0): HSYNC_A: 0x02ef028f (656 start, 752 end) (II) intel(0): VTOTAL_A: 0x020c01df (480 active, 525 total) (II) intel(0): VBLANK_A: 0x020401e7 (488 start, 517 end) (II) intel(0): VSYNC_A: 0x01eb01e9 (490 start, 492 end) (II) intel(0): BCLRPAT_A: 0x00000000 (II) intel(0): VSYNCSHIFT_A: 0x00000000 (II) intel(0): DSPBCNTR: 0x49000000 (disabled, pipe B) (II) intel(0): DSPBSTRIDE: 0x00000280 (640 bytes) (II) intel(0): DSPBPOS: 0x00000000 (0, 0) (II) intel(0): DSPBSIZE: 0x018f02cf (720, 400) (II) intel(0): DSPBBASE: 0x00000000 (II) intel(0): DSPBSURF: 0x00000000 (II) intel(0): DSPBTILEOFF: 0x00000000 (II) intel(0): PIPEBCONF: 0x80000000 (enabled, single-wide) (II) intel(0): PIPEBSRC: 0x027f018f (640, 400) (II) intel(0): PIPEBSTAT: 0x00020200 (status: VBLANK_INT_ENABLE VSYNC_INT_STATUS) (II) intel(0): FPB0: 0x00061207 (n = 6, m1 = 18, m2 = 7) (II) intel(0): FPB1: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): DPLL_B: 0x90016000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 1, p2 = 14) (II) intel(0): DPLL_B_MD: 0x00000000 (II) intel(0): HTOTAL_B: 0x053f03ff (1024 active, 1344 total) (II) intel(0): HBLANK_B: 0x053f03ff (1024 start, 1344 end) (II) intel(0): HSYNC_B: 0x049f0417 (1048 start, 1184 end) (II) intel(0): VTOTAL_B: 0x032502ff (768 active, 806 total) (II) intel(0): VBLANK_B: 0x032502ff (768 start, 806 end) (II) intel(0): VSYNC_B: 0x03080302 (771 start, 777 end) (II) intel(0): BCLRPAT_B: 0x00000000 (II) intel(0): VSYNCSHIFT_B: 0x00000000 (II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (II) intel(0): VCLK_POST_DIV: 0x0000888b (II) intel(0): VGACNTRL: 0x2204008e (enabled) (II) intel(0): TV_CTL: 0x00000000 (II) intel(0): TV_DAC: 0x00000000 (II) intel(0): TV_CSC_Y: 0x00000000 (II) intel(0): TV_CSC_Y2: 0x00000000 (II) intel(0): TV_CSC_U: 0x00000000 (II) intel(0): TV_CSC_U2: 0x00000000 (II) intel(0): TV_CSC_V: 0x00000000 (II) intel(0): TV_CSC_V2: 0x00000000 (II) intel(0): TV_CLR_KNOBS: 0x00000000 (II) intel(0): TV_CLR_LEVEL: 0x00000000 (II) intel(0): TV_H_CTL_1: 0x00000000 (II) intel(0): TV_H_CTL_2: 0x00000000 (II) intel(0): TV_H_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_1: 0x00000000 (II) intel(0): TV_V_CTL_2: 0x00000000 (II) intel(0): TV_V_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_4: 0x00000000 (II) intel(0): TV_V_CTL_5: 0x00000000 (II) intel(0): TV_V_CTL_6: 0x00000000 (II) intel(0): TV_V_CTL_7: 0x00000000 (II) intel(0): TV_SC_CTL_1: 0x00000000 (II) intel(0): TV_SC_CTL_2: 0x00000000 (II) intel(0): TV_SC_CTL_3: 0x00000000 (II) intel(0): TV_WIN_POS: 0x00000000 (II) intel(0): TV_WIN_SIZE: 0x00000000 (II) intel(0): TV_FILTER_CTL_1: 0x00000000 (II) intel(0): TV_FILTER_CTL_2: 0x00000000 (II) intel(0): TV_FILTER_CTL_3: 0x00000000 (II) intel(0): TV_CC_CONTROL: 0x00000000 (II) intel(0): TV_CC_DATA: 0x00000000 (II) intel(0): TV_H_LUMA_0: 0x00000000 (II) intel(0): TV_H_LUMA_59: 0x00000000 (II) intel(0): TV_H_CHROMA_0: 0x00000000 (II) intel(0): TV_H_CHROMA_59: 0x00000000 (II) intel(0): FBC_CFB_BASE: 0x00000000 (II) intel(0): FBC_LL_BASE: 0x00000000 (II) intel(0): FBC_CONTROL: 0x00000000 (II) intel(0): FBC_COMMAND: 0x00000000 (II) intel(0): FBC_STATUS: 0x20000000 (II) intel(0): FBC_CONTROL2: 0x00000000 (II) intel(0): FBC_FENCE_OFF: 0x00000000 (II) intel(0): FBC_MOD_NUM: 0x00000000 (II) intel(0): MI_MODE: 0x00000000 (II) intel(0): MI_ARB_STATE: 0x00000000 (II) intel(0): MI_RDRET_STATE: 0x00000000 (II) intel(0): ECOSKPD: 0x00000307 (II) intel(0): DP_B: 0x00000000 (II) intel(0): DPB_AUX_CH_CTL: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_C: 0x00000000 (II) intel(0): DPC_AUX_CH_CTL: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_D: 0x00000000 (II) intel(0): DPD_AUX_CH_CTL: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA5: 0x00000000 (II) intel(0): pipe A dot 25153 n 2 m1 18 m2 7 p1 13 p2 4 (II) intel(0): pipe B dot 64232 n 6 m1 18 m2 7 p1 1 p2 14 (II) intel(0): DumpRegsEnd (II) intel(0): xf86UnbindGARTMemory: unbind key 0 (II) intel(0): xf86UnbindGARTMemory: unbind key 1 (II) intel(0): xf86UnbindGARTMemory: unbind key 2 (II) intel(0): xf86UnbindGARTMemory: unbind key 3 (II) intel(0): xf86UnbindGARTMemory: unbind key 4 (II) Open ACPI successful (/var/run/acpid.socket) (II) AIGLX: Resuming AIGLX clients after VT switch (II) intel(0): xf86BindGARTMemory: bind key 0 at 0x073f4000 (pgoffset 29684) (II) intel(0): xf86BindGARTMemory: bind key 1 at 0x073f5000 (pgoffset 29685) (II) intel(0): xf86BindGARTMemory: bind key 2 at 0x073f9000 (pgoffset 29689) (II) intel(0): xf86BindGARTMemory: bind key 3 at 0x073fa000 (pgoffset 29690) (II) intel(0): xf86BindGARTMemory: bind key 4 at 0x073fe000 (pgoffset 29694) (II) intel(0): Fixed memory allocation layout: (II) intel(0): 0x00000000-0x005fffff: exa offscreen (6144 kB) (II) intel(0): 0x007df000: end of stolen memory (II) intel(0): 0x007df000-0x073f3fff: DRI memory manager (110676 kB) (II) intel(0): 0x073f4000-0x073f4fff: Core cursor (4 kB, 0x000000001e1f7000 physical ) (II) intel(0): 0x073f5000-0x073f8fff: ARGB cursor (16 kB, 0x000000001e28c000 physical ) (II) intel(0): 0x073f9000-0x073f9fff: Core cursor (4 kB, 0x000000001f07a000 physical ) (II) intel(0): 0x073fa000-0x073fdfff: ARGB cursor (16 kB, 0x000000001e238000 physical ) (II) intel(0): 0x073fe000-0x073fefff: overlay registers (4 kB, 0x000000001f357000 physical ) (II) intel(0): 0x08000000: end of aperture (II) intel(0): BO memory allocation layout: (II) intel(0): 0x007df000: start of memory manager (II) intel(0): 0x00800000-0x009fffff: depth buffer (2048 kB) X tiled (II) intel(0): 0x00a00000-0x00bfffff: back buffer (2048 kB) X tiled (II) intel(0): 0x00c00000-0x00dfffff: front buffer (2048 kB) X tiled (II) intel(0): 0x00e00000-0x00e07fff: logical 3D context (32 kB) (II) intel(0): 0x073f4000: end of memory manager (WW) intel(0): PRB0_CTL (0x0001f001) indicates ring buffer enabled (WW) intel(0): Existing errors found in hardware state. (II) intel(0): using SSC reference clock of 66 MHz (WW) intel(0): Chosen PLL clock of 66.5 Mhz more than 2% away from desired 65.0 Mhz (II) intel(0): Mode for pipe B: (II) intel(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 806 (48.4 kHz) (II) intel(0): chosen: dotclock 66523 vco 931333 ((m 127, m1 20, m2 15), n 7, (p 14, p1 1, p2 14)) (II) intel(0): Selecting standard 18 bit TMDS pixel format. (II) intel(0): Hardware state at EnterVT: (II) intel(0): DumpRegsBegin (II) intel(0): CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present) (II) intel(0): C0DRB0: 0x00000000 (0x0000) (II) intel(0): C0DRB1: 0x00000000 (0x0000) (II) intel(0): C0DRB2: 0x00000000 (0x0000) (II) intel(0): C0DRB3: 0x00000000 (0x0000) (II) intel(0): C1DRB0: 0x00000000 (0x0000) (II) intel(0): C1DRB1: 0x00000000 (0x0000) (II) intel(0): C1DRB2: 0x00000000 (0x0000) (II) intel(0): C1DRB3: 0x00000000 (0x0000) (II) intel(0): C0DRA01: 0x00000000 (0x0000) (II) intel(0): C0DRA23: 0x00000000 (0x0000) (II) intel(0): C1DRA01: 0x00000000 (0x0000) (II) intel(0): C1DRA23: 0x00000000 (0x0000) (II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) (II) intel(0): VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4) (II) intel(0): DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled) (II) intel(0): CACHE_MODE_0: 0x00000000 (II) intel(0): D_STATE: 0x0000030f (II) intel(0): DSPCLK_GATE_D: 0x00000000 (clock gates disabled:) (II) intel(0): RENCLK_GATE_D1: 0x00000001 (II) intel(0): RENCLK_GATE_D2: 0x00000000 (II) intel(0): SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected) (II) intel(0): SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected) (II) intel(0): SDVOUDI: 0x00000000 (II) intel(0): DSPARB: 0x0001fe00 (II) intel(0): DSPFW1: 0x00000000 (II) intel(0): DSPFW2: 0x00000000 (II) intel(0): DSPFW3: 0x00000000 (II) intel(0): ADPA: 0x40009c18 (disabled, pipe B, +hsync, +vsync) (II) intel(0): LVDS: 0xc0000300 (enabled, pipe B, 18 bit, 1 channel) (II) intel(0): DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOB: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOC: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOA_SRCDIM: 0x00000000 (II) intel(0): DVOB_SRCDIM: 0x00000000 (II) intel(0): DVOC_SRCDIM: 0x00000000 (II) intel(0): PP_CONTROL: 0x00000001 (power target: on) (II) intel(0): PP_STATUS: 0xc0000008 (on, ready, sequencing idle) (II) intel(0): PP_ON_DELAYS: 0x00fa09c4 (II) intel(0): PP_OFF_DELAYS: 0x00fa09c4 (II) intel(0): PP_DIVISOR: 0x00270f04 (II) intel(0): PFIT_CONTROL: 0x00000008 (II) intel(0): PFIT_PGM_RATIOS: 0x00000000 (II) intel(0): PORT_HOTPLUG_EN: 0x00000000 (II) intel(0): PORT_HOTPLUG_STAT: 0x00000000 (II) intel(0): DSPACNTR: 0x00000000 (disabled, pipe A) (II) intel(0): DSPASTRIDE: 0x00000000 (0 bytes) (II) intel(0): DSPAPOS: 0x00000000 (0, 0) (II) intel(0): DSPASIZE: 0x00000000 (1, 1) (II) intel(0): DSPABASE: 0x00000000 (II) intel(0): DSPASURF: 0x00000000 (II) intel(0): DSPATILEOFF: 0x00000000 (II) intel(0): PIPEACONF: 0x80000000 (enabled, single-wide) (II) intel(0): PIPEASRC: 0x027f01df (640, 480) (II) intel(0): PIPEASTAT: 0x80000207 (status: FIFO_UNDERRUN VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS) (II) intel(0): FPA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): FPA1: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): DPLL_A: 0x808b0000 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 13, p2 = 4) (II) intel(0): DPLL_A_MD: 0x00000000 (II) intel(0): HTOTAL_A: 0x031f027f (640 active, 800 total) (II) intel(0): HBLANK_A: 0x03170287 (648 start, 792 end) (II) intel(0): HSYNC_A: 0x02ef028f (656 start, 752 end) (II) intel(0): VTOTAL_A: 0x020c01df (480 active, 525 total) (II) intel(0): VBLANK_A: 0x020401e7 (488 start, 517 end) (II) intel(0): VSYNC_A: 0x01eb01e9 (490 start, 492 end) (II) intel(0): BCLRPAT_A: 0x00000000 (II) intel(0): VSYNCSHIFT_A: 0x00000000 (II) intel(0): DSPBCNTR: 0xd5000000 (enabled, pipe B) (II) intel(0): DSPBSTRIDE: 0x00000800 (2048 bytes) (II) intel(0): DSPBPOS: 0x00000000 (0, 0) (II) intel(0): DSPBSIZE: 0x02ff03ff (1024, 768) (II) intel(0): DSPBBASE: 0x00c00000 (II) intel(0): DSPBSURF: 0x00000000 (II) intel(0): DSPBTILEOFF: 0x00000000 (II) intel(0): PIPEBCONF: 0x80000000 (enabled, single-wide) (II) intel(0): PIPEBSRC: 0x03ff02ff (1024, 768) (II) intel(0): PIPEBSTAT: 0x80000202 (status: FIFO_UNDERRUN VSYNC_INT_STATUS VBLANK_INT_STATUS) (II) intel(0): FPB0: 0x0007140f (n = 7, m1 = 20, m2 = 15) (II) intel(0): FPB1: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): DPLL_B: 0x90016000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 1, p2 = 14) (II) intel(0): DPLL_B_MD: 0x00000000 (II) intel(0): HTOTAL_B: 0x053f03ff (1024 active, 1344 total) (II) intel(0): HBLANK_B: 0x053f03ff (1024 start, 1344 end) (II) intel(0): HSYNC_B: 0x049f0417 (1048 start, 1184 end) (II) intel(0): VTOTAL_B: 0x032502ff (768 active, 806 total) (II) intel(0): VBLANK_B: 0x032502ff (768 start, 806 end) (II) intel(0): VSYNC_B: 0x03080302 (771 start, 777 end) (II) intel(0): BCLRPAT_B: 0x00000000 (II) intel(0): VSYNCSHIFT_B: 0x00000000 (II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (II) intel(0): VCLK_POST_DIV: 0x0000888b (II) intel(0): VGACNTRL: 0x80000000 (disabled) (II) intel(0): TV_CTL: 0x00000000 (II) intel(0): TV_DAC: 0x00000000 (II) intel(0): TV_CSC_Y: 0x00000000 (II) intel(0): TV_CSC_Y2: 0x00000000 (II) intel(0): TV_CSC_U: 0x00000000 (II) intel(0): TV_CSC_U2: 0x00000000 (II) intel(0): TV_CSC_V: 0x00000000 (II) intel(0): TV_CSC_V2: 0x00000000 (II) intel(0): TV_CLR_KNOBS: 0x00000000 (II) intel(0): TV_CLR_LEVEL: 0x00000000 (II) intel(0): TV_H_CTL_1: 0x00000000 (II) intel(0): TV_H_CTL_2: 0x00000000 (II) intel(0): TV_H_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_1: 0x00000000 (II) intel(0): TV_V_CTL_2: 0x00000000 (II) intel(0): TV_V_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_4: 0x00000000 (II) intel(0): TV_V_CTL_5: 0x00000000 (II) intel(0): TV_V_CTL_6: 0x00000000 (II) intel(0): TV_V_CTL_7: 0x00000000 (II) intel(0): TV_SC_CTL_1: 0x00000000 (II) intel(0): TV_SC_CTL_2: 0x00000000 (II) intel(0): TV_SC_CTL_3: 0x00000000 (II) intel(0): TV_WIN_POS: 0x00000000 (II) intel(0): TV_WIN_SIZE: 0x00000000 (II) intel(0): TV_FILTER_CTL_1: 0x00000000 (II) intel(0): TV_FILTER_CTL_2: 0x00000000 (II) intel(0): TV_FILTER_CTL_3: 0x00000000 (II) intel(0): TV_CC_CONTROL: 0x00000000 (II) intel(0): TV_CC_DATA: 0x00000000 (II) intel(0): TV_H_LUMA_0: 0x00000000 (II) intel(0): TV_H_LUMA_59: 0x00000000 (II) intel(0): TV_H_CHROMA_0: 0x00000000 (II) intel(0): TV_H_CHROMA_59: 0x00000000 (II) intel(0): FBC_CFB_BASE: 0x00000000 (II) intel(0): FBC_LL_BASE: 0x00000000 (II) intel(0): FBC_CONTROL: 0x00000000 (II) intel(0): FBC_COMMAND: 0x00000000 (II) intel(0): FBC_STATUS: 0x20000000 (II) intel(0): FBC_CONTROL2: 0x00000000 (II) intel(0): FBC_FENCE_OFF: 0x00000000 (II) intel(0): FBC_MOD_NUM: 0x00000000 (II) intel(0): MI_MODE: 0x00000000 (II) intel(0): MI_ARB_STATE: 0x00000000 (II) intel(0): MI_RDRET_STATE: 0x00000000 (II) intel(0): ECOSKPD: 0x00000307 (II) intel(0): DP_B: 0x00000000 (II) intel(0): DPB_AUX_CH_CTL: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_C: 0x00000000 (II) intel(0): DPC_AUX_CH_CTL: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_D: 0x00000000 (II) intel(0): DPD_AUX_CH_CTL: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA5: 0x00000000 (II) intel(0): pipe A dot 25153 n 2 m1 18 m2 7 p1 13 p2 4 (II) intel(0): pipe B dot 66523 n 7 m1 20 m2 15 p1 1 p2 14 (II) intel(0): DumpRegsEnd (II) intel(0): Output configuration: (II) intel(0): Pipe A is off (II) intel(0): Display plane A is now disabled and connected to pipe A. (WW) intel(0): Hardware claims pipe A is on while software believes it is off (II) intel(0): Pipe B is on (II) intel(0): Display plane B is now enabled and connected to pipe B. (II) intel(0): Output VGA is connected to pipe none (II) intel(0): Output LVDS is connected to pipe B (II) Mouse0: ps2EnableDataReporting: succeeded (EE) intel(0): underrun on pipe B! (II) AIGLX: Suspending AIGLX clients for VT switch (II) intel(0): Comparing regs from server start up to After LeaveVT (WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd0000009 (WW) intel(0): PP_STATUS before: on, ready, sequencing idle (WW) intel(0): PP_STATUS after: on, ready, sequencing on (WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x80000202 to 0x00020200 (WW) intel(0): PIPEBSTAT before: status: FIFO_UNDERRUN VSYNC_INT_STATUS VBLANK_INT_STATUS (WW) intel(0): PIPEBSTAT after: status: VBLANK_INT_ENABLE VSYNC_INT_STATUS (II) intel(0): DumpRegsBegin (II) intel(0): CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present) (II) intel(0): C0DRB0: 0x00000000 (0x0000) (II) intel(0): C0DRB1: 0x00000000 (0x0000) (II) intel(0): C0DRB2: 0x00000000 (0x0000) (II) intel(0): C0DRB3: 0x00000000 (0x0000) (II) intel(0): C1DRB0: 0x00000000 (0x0000) (II) intel(0): C1DRB1: 0x00000000 (0x0000) (II) intel(0): C1DRB2: 0x00000000 (0x0000) (II) intel(0): C1DRB3: 0x00000000 (0x0000) (II) intel(0): C0DRA01: 0x00000000 (0x0000) (II) intel(0): C0DRA23: 0x00000000 (0x0000) (II) intel(0): C1DRA01: 0x00000000 (0x0000) (II) intel(0): C1DRA23: 0x00000000 (0x0000) (II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) (II) intel(0): VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4) (II) intel(0): DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled) (II) intel(0): CACHE_MODE_0: 0x00000000 (II) intel(0): D_STATE: 0x0000030f (II) intel(0): DSPCLK_GATE_D: 0x00000000 (clock gates disabled:) (II) intel(0): RENCLK_GATE_D1: 0x00000000 (II) intel(0): RENCLK_GATE_D2: 0x00000000 (II) intel(0): SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected) (II) intel(0): SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected) (II) intel(0): SDVOUDI: 0x00000000 (II) intel(0): DSPARB: 0x00015455 (II) intel(0): DSPFW1: 0x00000000 (II) intel(0): DSPFW2: 0x00000000 (II) intel(0): DSPFW3: 0x00000000 (II) intel(0): ADPA: 0x40009c18 (disabled, pipe B, +hsync, +vsync) (II) intel(0): LVDS: 0xc0000300 (enabled, pipe B, 18 bit, 1 channel) (II) intel(0): DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOB: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOC: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOA_SRCDIM: 0x00000000 (II) intel(0): DVOB_SRCDIM: 0x00000000 (II) intel(0): DVOC_SRCDIM: 0x00000000 (II) intel(0): PP_CONTROL: 0x00000001 (power target: on) (II) intel(0): PP_STATUS: 0xd0000009 (on, ready, sequencing on) (II) intel(0): PP_ON_DELAYS: 0x00fa09c4 (II) intel(0): PP_OFF_DELAYS: 0x00fa09c4 (II) intel(0): PP_DIVISOR: 0x00270f04 (II) intel(0): PFIT_CONTROL: 0x80000668 (II) intel(0): PFIT_PGM_RATIOS: 0x00000000 (II) intel(0): PORT_HOTPLUG_EN: 0x00000000 (II) intel(0): PORT_HOTPLUG_STAT: 0x00000000 (II) intel(0): DSPACNTR: 0x00000000 (disabled, pipe A) (II) intel(0): DSPASTRIDE: 0x00000000 (0 bytes) (II) intel(0): DSPAPOS: 0x00000000 (0, 0) (II) intel(0): DSPASIZE: 0x00000000 (1, 1) (II) intel(0): DSPABASE: 0x00000000 (II) intel(0): DSPASURF: 0x00000000 (II) intel(0): DSPATILEOFF: 0x00000000 (II) intel(0): PIPEACONF: 0x80000000 (enabled, single-wide) (II) intel(0): PIPEASRC: 0x027f01df (640, 480) (II) intel(0): PIPEASTAT: 0x80000207 (status: FIFO_UNDERRUN VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS) (II) intel(0): FPA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): FPA1: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): DPLL_A: 0x808b0000 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 13, p2 = 4) (II) intel(0): DPLL_A_MD: 0x00000000 (II) intel(0): HTOTAL_A: 0x031f027f (640 active, 800 total) (II) intel(0): HBLANK_A: 0x03170287 (648 start, 792 end) (II) intel(0): HSYNC_A: 0x02ef028f (656 start, 752 end) (II) intel(0): VTOTAL_A: 0x020c01df (480 active, 525 total) (II) intel(0): VBLANK_A: 0x020401e7 (488 start, 517 end) (II) intel(0): VSYNC_A: 0x01eb01e9 (490 start, 492 end) (II) intel(0): BCLRPAT_A: 0x00000000 (II) intel(0): VSYNCSHIFT_A: 0x00000000 (II) intel(0): DSPBCNTR: 0x49000000 (disabled, pipe B) (II) intel(0): DSPBSTRIDE: 0x00000280 (640 bytes) (II) intel(0): DSPBPOS: 0x00000000 (0, 0) (II) intel(0): DSPBSIZE: 0x018f02cf (720, 400) (II) intel(0): DSPBBASE: 0x00000000 (II) intel(0): DSPBSURF: 0x00000000 (II) intel(0): DSPBTILEOFF: 0x00000000 (II) intel(0): PIPEBCONF: 0x80000000 (enabled, single-wide) (II) intel(0): PIPEBSRC: 0x027f018f (640, 400) (II) intel(0): PIPEBSTAT: 0x00020200 (status: VBLANK_INT_ENABLE VSYNC_INT_STATUS) (II) intel(0): FPB0: 0x00061207 (n = 6, m1 = 18, m2 = 7) (II) intel(0): FPB1: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): DPLL_B: 0x90016000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 1, p2 = 14) (II) intel(0): DPLL_B_MD: 0x00000000 (II) intel(0): HTOTAL_B: 0x053f03ff (1024 active, 1344 total) (II) intel(0): HBLANK_B: 0x053f03ff (1024 start, 1344 end) (II) intel(0): HSYNC_B: 0x049f0417 (1048 start, 1184 end) (II) intel(0): VTOTAL_B: 0x032502ff (768 active, 806 total) (II) intel(0): VBLANK_B: 0x032502ff (768 start, 806 end) (II) intel(0): VSYNC_B: 0x03080302 (771 start, 777 end) (II) intel(0): BCLRPAT_B: 0x00000000 (II) intel(0): VSYNCSHIFT_B: 0x00000000 (II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (II) intel(0): VCLK_POST_DIV: 0x0000888b (II) intel(0): VGACNTRL: 0x2204008e (enabled) (II) intel(0): TV_CTL: 0x00000000 (II) intel(0): TV_DAC: 0x00000000 (II) intel(0): TV_CSC_Y: 0x00000000 (II) intel(0): TV_CSC_Y2: 0x00000000 (II) intel(0): TV_CSC_U: 0x00000000 (II) intel(0): TV_CSC_U2: 0x00000000 (II) intel(0): TV_CSC_V: 0x00000000 (II) intel(0): TV_CSC_V2: 0x00000000 (II) intel(0): TV_CLR_KNOBS: 0x00000000 (II) intel(0): TV_CLR_LEVEL: 0x00000000 (II) intel(0): TV_H_CTL_1: 0x00000000 (II) intel(0): TV_H_CTL_2: 0x00000000 (II) intel(0): TV_H_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_1: 0x00000000 (II) intel(0): TV_V_CTL_2: 0x00000000 (II) intel(0): TV_V_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_4: 0x00000000 (II) intel(0): TV_V_CTL_5: 0x00000000 (II) intel(0): TV_V_CTL_6: 0x00000000 (II) intel(0): TV_V_CTL_7: 0x00000000 (II) intel(0): TV_SC_CTL_1: 0x00000000 (II) intel(0): TV_SC_CTL_2: 0x00000000 (II) intel(0): TV_SC_CTL_3: 0x00000000 (II) intel(0): TV_WIN_POS: 0x00000000 (II) intel(0): TV_WIN_SIZE: 0x00000000 (II) intel(0): TV_FILTER_CTL_1: 0x00000000 (II) intel(0): TV_FILTER_CTL_2: 0x00000000 (II) intel(0): TV_FILTER_CTL_3: 0x00000000 (II) intel(0): TV_CC_CONTROL: 0x00000000 (II) intel(0): TV_CC_DATA: 0x00000000 (II) intel(0): TV_H_LUMA_0: 0x00000000 (II) intel(0): TV_H_LUMA_59: 0x00000000 (II) intel(0): TV_H_CHROMA_0: 0x00000000 (II) intel(0): TV_H_CHROMA_59: 0x00000000 (II) intel(0): FBC_CFB_BASE: 0x00000000 (II) intel(0): FBC_LL_BASE: 0x00000000 (II) intel(0): FBC_CONTROL: 0x00000000 (II) intel(0): FBC_COMMAND: 0x00000000 (II) intel(0): FBC_STATUS: 0x20000000 (II) intel(0): FBC_CONTROL2: 0x00000000 (II) intel(0): FBC_FENCE_OFF: 0x00000000 (II) intel(0): FBC_MOD_NUM: 0x00000000 (II) intel(0): MI_MODE: 0x00000000 (II) intel(0): MI_ARB_STATE: 0x00000000 (II) intel(0): MI_RDRET_STATE: 0x00000000 (II) intel(0): ECOSKPD: 0x00000307 (II) intel(0): DP_B: 0x00000000 (II) intel(0): DPB_AUX_CH_CTL: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_C: 0x00000000 (II) intel(0): DPC_AUX_CH_CTL: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_D: 0x00000000 (II) intel(0): DPD_AUX_CH_CTL: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA5: 0x00000000 (II) intel(0): pipe A dot 25153 n 2 m1 18 m2 7 p1 13 p2 4 (II) intel(0): pipe B dot 64232 n 6 m1 18 m2 7 p1 1 p2 14 (II) intel(0): DumpRegsEnd (II) intel(0): xf86UnbindGARTMemory: unbind key 0 (II) intel(0): xf86UnbindGARTMemory: unbind key 1 (II) intel(0): xf86UnbindGARTMemory: unbind key 2 (II) intel(0): xf86UnbindGARTMemory: unbind key 3 (II) intel(0): xf86UnbindGARTMemory: unbind key 4 (II) Open ACPI successful (/var/run/acpid.socket) (II) AIGLX: Resuming AIGLX clients after VT switch (II) intel(0): xf86BindGARTMemory: bind key 0 at 0x073f4000 (pgoffset 29684) (II) intel(0): xf86BindGARTMemory: bind key 1 at 0x073f5000 (pgoffset 29685) (II) intel(0): xf86BindGARTMemory: bind key 2 at 0x073f9000 (pgoffset 29689) (II) intel(0): xf86BindGARTMemory: bind key 3 at 0x073fa000 (pgoffset 29690) (II) intel(0): xf86BindGARTMemory: bind key 4 at 0x073fe000 (pgoffset 29694) (II) intel(0): Fixed memory allocation layout: (II) intel(0): 0x00000000-0x005fffff: exa offscreen (6144 kB) (II) intel(0): 0x007df000: end of stolen memory (II) intel(0): 0x007df000-0x073f3fff: DRI memory manager (110676 kB) (II) intel(0): 0x073f4000-0x073f4fff: Core cursor (4 kB, 0x000000001e1f7000 physical ) (II) intel(0): 0x073f5000-0x073f8fff: ARGB cursor (16 kB, 0x000000001e28c000 physical ) (II) intel(0): 0x073f9000-0x073f9fff: Core cursor (4 kB, 0x000000001f07a000 physical ) (II) intel(0): 0x073fa000-0x073fdfff: ARGB cursor (16 kB, 0x000000001e238000 physical ) (II) intel(0): 0x073fe000-0x073fefff: overlay registers (4 kB, 0x000000001f357000 physical ) (II) intel(0): 0x08000000: end of aperture (II) intel(0): BO memory allocation layout: (II) intel(0): 0x007df000: start of memory manager (II) intel(0): 0x00800000-0x009fffff: depth buffer (2048 kB) X tiled (II) intel(0): 0x00a00000-0x00bfffff: back buffer (2048 kB) X tiled (II) intel(0): 0x00c00000-0x00dfffff: front buffer (2048 kB) X tiled (II) intel(0): 0x00e00000-0x00e07fff: logical 3D context (32 kB) (II) intel(0): 0x073f4000: end of memory manager (WW) intel(0): PRB0_CTL (0x0001f001) indicates ring buffer enabled (WW) intel(0): Existing errors found in hardware state. (II) intel(0): using SSC reference clock of 66 MHz (WW) intel(0): Chosen PLL clock of 66.5 Mhz more than 2% away from desired 65.0 Mhz (II) intel(0): Mode for pipe B: (II) intel(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 806 (48.4 kHz) (II) intel(0): chosen: dotclock 66523 vco 931333 ((m 127, m1 20, m2 15), n 7, (p 14, p1 1, p2 14)) (II) intel(0): Selecting standard 18 bit TMDS pixel format. (II) intel(0): Hardware state at EnterVT: (II) intel(0): DumpRegsBegin (II) intel(0): CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present) (II) intel(0): C0DRB0: 0x00000000 (0x0000) (II) intel(0): C0DRB1: 0x00000000 (0x0000) (II) intel(0): C0DRB2: 0x00000000 (0x0000) (II) intel(0): C0DRB3: 0x00000000 (0x0000) (II) intel(0): C1DRB0: 0x00000000 (0x0000) (II) intel(0): C1DRB1: 0x00000000 (0x0000) (II) intel(0): C1DRB2: 0x00000000 (0x0000) (II) intel(0): C1DRB3: 0x00000000 (0x0000) (II) intel(0): C0DRA01: 0x00000000 (0x0000) (II) intel(0): C0DRA23: 0x00000000 (0x0000) (II) intel(0): C1DRA01: 0x00000000 (0x0000) (II) intel(0): C1DRA23: 0x00000000 (0x0000) (II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) (II) intel(0): VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4) (II) intel(0): DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled) (II) intel(0): CACHE_MODE_0: 0x00000000 (II) intel(0): D_STATE: 0x0000030f (II) intel(0): DSPCLK_GATE_D: 0x00000000 (clock gates disabled:) (II) intel(0): RENCLK_GATE_D1: 0x00000001 (II) intel(0): RENCLK_GATE_D2: 0x00000000 (II) intel(0): SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected) (II) intel(0): SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected) (II) intel(0): SDVOUDI: 0x00000000 (II) intel(0): DSPARB: 0x0001fe00 (II) intel(0): DSPFW1: 0x00000000 (II) intel(0): DSPFW2: 0x00000000 (II) intel(0): DSPFW3: 0x00000000 (II) intel(0): ADPA: 0x40009c18 (disabled, pipe B, +hsync, +vsync) (II) intel(0): LVDS: 0xc0000300 (enabled, pipe B, 18 bit, 1 channel) (II) intel(0): DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOB: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOC: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOA_SRCDIM: 0x00000000 (II) intel(0): DVOB_SRCDIM: 0x00000000 (II) intel(0): DVOC_SRCDIM: 0x00000000 (II) intel(0): PP_CONTROL: 0x00000001 (power target: on) (II) intel(0): PP_STATUS: 0xc0000008 (on, ready, sequencing idle) (II) intel(0): PP_ON_DELAYS: 0x00fa09c4 (II) intel(0): PP_OFF_DELAYS: 0x00fa09c4 (II) intel(0): PP_DIVISOR: 0x00270f04 (II) intel(0): PFIT_CONTROL: 0x00000008 (II) intel(0): PFIT_PGM_RATIOS: 0x00000000 (II) intel(0): PORT_HOTPLUG_EN: 0x00000000 (II) intel(0): PORT_HOTPLUG_STAT: 0x00000000 (II) intel(0): DSPACNTR: 0x00000000 (disabled, pipe A) (II) intel(0): DSPASTRIDE: 0x00000000 (0 bytes) (II) intel(0): DSPAPOS: 0x00000000 (0, 0) (II) intel(0): DSPASIZE: 0x00000000 (1, 1) (II) intel(0): DSPABASE: 0x00000000 (II) intel(0): DSPASURF: 0x00000000 (II) intel(0): DSPATILEOFF: 0x00000000 (II) intel(0): PIPEACONF: 0x80000000 (enabled, single-wide) (II) intel(0): PIPEASRC: 0x027f01df (640, 480) (II) intel(0): PIPEASTAT: 0x80000207 (status: FIFO_UNDERRUN VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS) (II) intel(0): FPA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): FPA1: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): DPLL_A: 0x808b0000 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 13, p2 = 4) (II) intel(0): DPLL_A_MD: 0x00000000 (II) intel(0): HTOTAL_A: 0x031f027f (640 active, 800 total) (II) intel(0): HBLANK_A: 0x03170287 (648 start, 792 end) (II) intel(0): HSYNC_A: 0x02ef028f (656 start, 752 end) (II) intel(0): VTOTAL_A: 0x020c01df (480 active, 525 total) (II) intel(0): VBLANK_A: 0x020401e7 (488 start, 517 end) (II) intel(0): VSYNC_A: 0x01eb01e9 (490 start, 492 end) (II) intel(0): BCLRPAT_A: 0x00000000 (II) intel(0): VSYNCSHIFT_A: 0x00000000 (II) intel(0): DSPBCNTR: 0xd5000000 (enabled, pipe B) (II) intel(0): DSPBSTRIDE: 0x00000800 (2048 bytes) (II) intel(0): DSPBPOS: 0x00000000 (0, 0) (II) intel(0): DSPBSIZE: 0x02ff03ff (1024, 768) (II) intel(0): DSPBBASE: 0x00c00000 (II) intel(0): DSPBSURF: 0x00000000 (II) intel(0): DSPBTILEOFF: 0x00000000 (II) intel(0): PIPEBCONF: 0x80000000 (enabled, single-wide) (II) intel(0): PIPEBSRC: 0x03ff02ff (1024, 768) (II) intel(0): PIPEBSTAT: 0x80000202 (status: FIFO_UNDERRUN VSYNC_INT_STATUS VBLANK_INT_STATUS) (II) intel(0): FPB0: 0x0007140f (n = 7, m1 = 20, m2 = 15) (II) intel(0): FPB1: 0x00021207 (n = 2, m1 = 18, m2 = 7) (II) intel(0): DPLL_B: 0x90016000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 1, p2 = 14) (II) intel(0): DPLL_B_MD: 0x00000000 (II) intel(0): HTOTAL_B: 0x053f03ff (1024 active, 1344 total) (II) intel(0): HBLANK_B: 0x053f03ff (1024 start, 1344 end) (II) intel(0): HSYNC_B: 0x049f0417 (1048 start, 1184 end) (II) intel(0): VTOTAL_B: 0x032502ff (768 active, 806 total) (II) intel(0): VBLANK_B: 0x032502ff (768 start, 806 end) (II) intel(0): VSYNC_B: 0x03080302 (771 start, 777 end) (II) intel(0): BCLRPAT_B: 0x00000000 (II) intel(0): VSYNCSHIFT_B: 0x00000000 (II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (II) intel(0): VCLK_POST_DIV: 0x0000888b (II) intel(0): VGACNTRL: 0x80000000 (disabled) (II) intel(0): TV_CTL: 0x00000000 (II) intel(0): TV_DAC: 0x00000000 (II) intel(0): TV_CSC_Y: 0x00000000 (II) intel(0): TV_CSC_Y2: 0x00000000 (II) intel(0): TV_CSC_U: 0x00000000 (II) intel(0): TV_CSC_U2: 0x00000000 (II) intel(0): TV_CSC_V: 0x00000000 (II) intel(0): TV_CSC_V2: 0x00000000 (II) intel(0): TV_CLR_KNOBS: 0x00000000 (II) intel(0): TV_CLR_LEVEL: 0x00000000 (II) intel(0): TV_H_CTL_1: 0x00000000 (II) intel(0): TV_H_CTL_2: 0x00000000 (II) intel(0): TV_H_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_1: 0x00000000 (II) intel(0): TV_V_CTL_2: 0x00000000 (II) intel(0): TV_V_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_4: 0x00000000 (II) intel(0): TV_V_CTL_5: 0x00000000 (II) intel(0): TV_V_CTL_6: 0x00000000 (II) intel(0): TV_V_CTL_7: 0x00000000 (II) intel(0): TV_SC_CTL_1: 0x00000000 (II) intel(0): TV_SC_CTL_2: 0x00000000 (II) intel(0): TV_SC_CTL_3: 0x00000000 (II) intel(0): TV_WIN_POS: 0x00000000 (II) intel(0): TV_WIN_SIZE: 0x00000000 (II) intel(0): TV_FILTER_CTL_1: 0x00000000 (II) intel(0): TV_FILTER_CTL_2: 0x00000000 (II) intel(0): TV_FILTER_CTL_3: 0x00000000 (II) intel(0): TV_CC_CONTROL: 0x00000000 (II) intel(0): TV_CC_DATA: 0x00000000 (II) intel(0): TV_H_LUMA_0: 0x00000000 (II) intel(0): TV_H_LUMA_59: 0x00000000 (II) intel(0): TV_H_CHROMA_0: 0x00000000 (II) intel(0): TV_H_CHROMA_59: 0x00000000 (II) intel(0): FBC_CFB_BASE: 0x00000000 (II) intel(0): FBC_LL_BASE: 0x00000000 (II) intel(0): FBC_CONTROL: 0x00000000 (II) intel(0): FBC_COMMAND: 0x00000000 (II) intel(0): FBC_STATUS: 0x20000000 (II) intel(0): FBC_CONTROL2: 0x00000000 (II) intel(0): FBC_FENCE_OFF: 0x00000000 (II) intel(0): FBC_MOD_NUM: 0x00000000 (II) intel(0): MI_MODE: 0x00000000 (II) intel(0): MI_ARB_STATE: 0x00000000 (II) intel(0): MI_RDRET_STATE: 0x00000000 (II) intel(0): ECOSKPD: 0x00000307 (II) intel(0): DP_B: 0x00000000 (II) intel(0): DPB_AUX_CH_CTL: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_C: 0x00000000 (II) intel(0): DPC_AUX_CH_CTL: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_D: 0x00000000 (II) intel(0): DPD_AUX_CH_CTL: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA5: 0x00000000 (II) intel(0): pipe A dot 25153 n 2 m1 18 m2 7 p1 13 p2 4 (II) intel(0): pipe B dot 66523 n 7 m1 20 m2 15 p1 1 p2 14 (II) intel(0): DumpRegsEnd (II) intel(0): Output configuration: (II) intel(0): Pipe A is off (II) intel(0): Display plane A is now disabled and connected to pipe A. (WW) intel(0): Hardware claims pipe A is on while software believes it is off (II) intel(0): Pipe B is on (II) intel(0): Display plane B is now enabled and connected to pipe B. (II) intel(0): Output VGA is connected to pipe none (II) intel(0): Output LVDS is connected to pipe B (II) Mouse0: ps2EnableDataReporting: succeeded (EE) intel(0): underrun on pipe B!