This is a pre-release version of the X server from The X.Org Foundation. It is not supported in any way. Bugs may be filed in the bugzilla at http://bugs.freedesktop.org/. Select the "xorg" product for bugs you find in this release. Before reporting bugs in pre-release versions please check the latest version in the X.Org Foundation git repository. See http://wiki.x.org/wiki/GitPage for git access instructions. X.Org X Server 1.5.99.3 Release Date: (unreleased) X Protocol Version 11, Revision 0 Build Operating System: Linux 2.6.24-19-server i686 Ubuntu Current Operating System: Linux acer-tormod 2.6.28-3-generic #4-Ubuntu SMP Fri Dec 12 22:48:15 UTC 2008 i686 Build Date: 17 December 2008 03:10:17AM xorg-server 2:1.5.99.3-0ubuntu3 (buildd@rothera.buildd) Before reporting problems, check http://wiki.x.org to make sure that you have the latest version. Markers: (--) probed, (**) from config file, (==) default setting, (++) from command line, (!!) notice, (II) informational, (WW) warning, (EE) error, (NI) not implemented, (??) unknown. (==) Log file: "/var/log/Xorg.0.log", Time: Wed Dec 24 13:51:08 2008 (==) Using config file: "/etc/X11/xorg.conf" (==) No Layout section. Using the first Screen section. (**) |-->Screen "Default Screen" (0) (**) | |-->Monitor "Configured Monitor" (**) | |-->Device "Configured Video Device" (==) Automatically adding devices (==) Automatically enabling devices (==) No FontPath specified. Using compiled-in default. (WW) The directory "/usr/share/fonts/X11/cyrillic" does not exist. Entry deleted from font path. (==) FontPath set to: /usr/share/fonts/X11/misc, /usr/share/fonts/X11/100dpi/:unscaled, /usr/share/fonts/X11/75dpi/:unscaled, /usr/share/fonts/X11/Type1, /usr/share/fonts/X11/100dpi, /usr/share/fonts/X11/75dpi, /var/lib/defoma/x-ttcidfont-conf.d/dirs/TrueType (==) ModulePath set to "/usr/lib/xorg/modules" (II) Cannot locate a core pointer device. (II) Cannot locate a core keyboard device. (II) The server relies on HAL to provide the list of input devices. If no devices become available, reconfigure HAL or disable AllowEmptyInput. (II) Loader magic: 0x1ac0 (II) Module ABI versions: X.Org ANSI C Emulation: 0.4 X.Org Video Driver: 5.0 X.Org XInput driver : 4.0 X.Org Server Extension : 2.0 (II) Loader running on linux (++) using VT number 7 (--) PCI:*(0@0:2:0) Intel Corporation Mobile 915GM/GMS/910GML Express Graphics Controller rev 4, Mem @ 0xd0180000/0, 0xc0000000/0, 0xd0200000/0, I/O @ 0x0000ea00/0 (--) PCI: (0@0:2:1) Intel Corporation Mobile 915GM/GMS/910GML Express Graphics Controller rev 4, Mem @ 0xd0100000/0 (II) Open ACPI successful (/var/run/acpid.socket) (II) System resource ranges: [0] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [5] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] (II) LoadModule: "extmod" (II) Loading /usr/lib/xorg/modules/extensions//libextmod.so (II) Module extmod: vendor="X.Org Foundation" compiled for 1.5.99.3, module version = 1.0.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 2.0 (II) Loading extension MIT-SCREEN-SAVER (II) Loading extension XFree86-VidModeExtension (II) Loading extension XFree86-DGA (II) Loading extension DPMS (II) Loading extension XVideo (II) Loading extension XVideo-MotionCompensation (II) Loading extension X-Resource (II) LoadModule: "dbe" (II) Loading /usr/lib/xorg/modules/extensions//libdbe.so (II) Module dbe: vendor="X.Org Foundation" compiled for 1.5.99.3, module version = 1.0.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 2.0 (II) Loading extension DOUBLE-BUFFER (II) LoadModule: "glx" (II) Loading /usr/lib/xorg/modules/extensions//libglx.so (II) Module glx: vendor="X.Org Foundation" compiled for 1.5.99.3, module version = 1.0.0 ABI class: X.Org Server Extension, version 2.0 (==) AIGLX enabled (==) Exporting typical set of GLX visuals (II) Loading extension GLX (II) LoadModule: "record" (II) Loading /usr/lib/xorg/modules/extensions//librecord.so (II) Module record: vendor="X.Org Foundation" compiled for 1.5.99.3, module version = 1.13.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 2.0 (II) Loading extension RECORD (II) LoadModule: "dri" (II) Loading /usr/lib/xorg/modules/extensions//libdri.so (II) Module dri: vendor="X.Org Foundation" compiled for 1.5.99.3, module version = 1.0.0 ABI class: X.Org Server Extension, version 2.0 (II) Loading extension XFree86-DRI (II) LoadModule: "dri2" (II) Loading /usr/lib/xorg/modules/extensions//libdri2.so (II) Module dri2: vendor="X.Org Foundation" compiled for 1.5.99.3, module version = 1.0.0 ABI class: X.Org Server Extension, version 2.0 (II) Loading extension DRI2 (II) Scanning /usr/share/xserver-xorg/pci directory for additional PCI ID's supported by the drivers (II) Matched intel from file name intel.ids (==) Matched intel for the autoconfigured driver (==) Assigned the driver to the xf86ConfigLayout (II) LoadModule: "intel" (II) Loading /usr/lib/xorg/modules/drivers//intel_drv.so (II) Module intel: vendor="X.Org Foundation" compiled for 1.5.99.3, module version = 2.6.99 Module class: X.Org Video Driver ABI class: X.Org Video Driver, version 5.0 (II) intel: Driver for Intel Integrated Graphics Chipsets: i810, i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G, E7221 (i915), 915GM, 945G, 945GM, 945GME, 965G, G35, 965Q, 946GZ, 965GM, 965GME/GLE, G33, Q35, Q33, Mobile Intel® GM45 Express Chipset, Intel Integrated Graphics Device, G45/G43, Q45/Q43, G41 (II) Primary Device is: PCI 00@00:02:0 (II) resource ranges after xf86ClaimFixedResources() call: [0] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [5] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] (II) resource ranges after probing: [0] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] 0 0 0x000a0000 - 0x000affff (0x10000) MS[B] [5] 0 0 0x000b0000 - 0x000b7fff (0x8000) MS[B] [6] 0 0 0x000b8000 - 0x000bffff (0x8000) MS[B] [7] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [8] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [9] 0 0 0x000003b0 - 0x000003bb (0xc) IS[B] [10] 0 0 0x000003c0 - 0x000003df (0x20) IS[B] (II) Loading sub module "vgahw" (II) LoadModule: "vgahw" (II) Loading /usr/lib/xorg/modules//libvgahw.so (II) Module vgahw: vendor="X.Org Foundation" compiled for 1.5.99.3, module version = 0.1.0 ABI class: X.Org Video Driver, version 5.0 (II) intel(0): Creating default Display subsection in Screen section "Default Screen" for depth/fbbpp 24/32 (==) intel(0): Depth 24, (--) framebuffer bpp 32 (==) intel(0): RGB weight 888 (==) intel(0): Default visual is TrueColor (**) intel(0): Option "ModeDebug" (II) intel(0): Integrated Graphics Chipset: Intel(R) 915GM (--) intel(0): Chipset: "915GM" (--) intel(0): Linear framebuffer at 0xC0000000 (--) intel(0): IO registers at addr 0xD0180000 (WW) intel(0): libpciaccess reported 0 rom size, guessing 64kB (==) intel(0): Using EXA for acceleration (II) intel(0): Hardware state on X startup: (II) intel(0): DumpRegsBegin (II) intel(0): CHDECMISC: 0x22b97828 (XOR bank/rank, ch2 enh disabled, ch1 enh enabled, ch0 enh disabled, flex disabled, ep not present) (II) intel(0): C0DRB0: 0x000f0400 (0x0400) (II) intel(0): C0DRB1: 0x0000000f (0x000f) (II) intel(0): C0DRB2: 0x00000000 (0x0000) (II) intel(0): C0DRB3: 0x01080000 (0x0000) (II) intel(0): C1DRB0: 0x05040302 (0x0302) (II) intel(0): C1DRB1: 0x07060504 (0x0504) (II) intel(0): C1DRB2: 0x09080706 (0x0706) (II) intel(0): C1DRB3: 0x0b0a0908 (0x0908) (II) intel(0): C0DRA01: 0x04020108 (0x0108) (II) intel(0): C0DRA23: 0x00000402 (0x0402) (II) intel(0): C1DRA01: 0x0d0c0b0a (0x0b0a) (II) intel(0): C1DRA23: 0x0f0e0d0c (0x0d0c) (II) intel(0): VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) (II) intel(0): VCLK_POST_DIV: 0x00800080 (vga0 p1 = 2, p2 = 4, vga1 p1 = 2, p2 = 2) (II) intel(0): DPLL_TEST: 0x00010001 () (II) intel(0): CACHE_MODE_0: 0x00006820 (II) intel(0): D_STATE: 0x00000000 (II) intel(0): DSPCLK_GATE_D: 0x00001000 (clock gates disabled: DPLUNIT) (II) intel(0): RENCLK_GATE_D1: 0x00000000 (II) intel(0): RENCLK_GATE_D2: 0x00000000 (II) intel(0): SDVOB: 0x00480004 (disabled, pipe A, stall disabled, detected, SDVO mult 1) (II) intel(0): SDVOC: 0x00480000 (disabled, pipe A, stall disabled, not detected, SDVO mult 1) (II) intel(0): SDVOUDI: 0x000000a0 (II) intel(0): DSPARB: 0x00001d9c (II) intel(0): DSPFW1: 0x00000000 (II) intel(0): DSPFW2: 0x00000000 (II) intel(0): DSPFW3: 0x00000000 (II) intel(0): ADPA: 0x80008018 (enabled, pipe A, +hsync, +vsync) (II) intel(0): LVDS: 0x40000300 (disabled, pipe B, 18 bit, 1 channel) (II) intel(0): DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOB: 0x00480004 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOC: 0x00480000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOA_SRCDIM: 0x00000000 (II) intel(0): DVOB_SRCDIM: 0x00000000 (II) intel(0): DVOC_SRCDIM: 0x00000000 (II) intel(0): PP_CONTROL: 0x00000000 (power target: off) (II) intel(0): PP_STATUS: 0x00000000 (off, not ready, sequencing idle) (II) intel(0): PP_ON_DELAYS: 0x025907d1 (II) intel(0): PP_OFF_DELAYS: 0x01f507d1 (II) intel(0): PP_DIVISOR: 0x00270f05 (II) intel(0): PFIT_CONTROL: 0x00002668 (II) intel(0): PFIT_PGM_RATIOS: 0x00000000 (II) intel(0): PORT_HOTPLUG_EN: 0x00000000 (II) intel(0): PORT_HOTPLUG_STAT: 0x00000000 (II) intel(0): DSPACNTR: 0x00000000 (disabled, pipe A) (II) intel(0): DSPASTRIDE: 0x00000000 (0 bytes) (II) intel(0): DSPAPOS: 0x00000000 (0, 0) (II) intel(0): DSPASIZE: 0x00000000 (1, 1) (II) intel(0): DSPABASE: 0x00000000 (II) intel(0): DSPASURF: 0x00000000 (II) intel(0): DSPATILEOFF: 0x00000000 (II) intel(0): PIPEACONF: 0x80000000 (enabled, single-wide) (II) intel(0): PIPEASRC: 0x027f01df (640, 480) (II) intel(0): PIPEASTAT: 0x00000000 (status:) (II) intel(0): FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): DPLL_A: 0x84800000 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10) (II) intel(0): DPLL_A_MD: 0x00000000 (II) intel(0): HTOTAL_A: 0x031f027f (640 active, 800 total) (II) intel(0): HBLANK_A: 0x03170287 (648 start, 792 end) (II) intel(0): HSYNC_A: 0x02ef028f (656 start, 752 end) (II) intel(0): VTOTAL_A: 0x020c01df (480 active, 525 total) (II) intel(0): VBLANK_A: 0x020401e7 (488 start, 517 end) (II) intel(0): VSYNC_A: 0x01eb01e9 (490 start, 492 end) (II) intel(0): BCLRPAT_A: 0x00000000 (II) intel(0): VSYNCSHIFT_A: 0x00000000 (II) intel(0): DSPBCNTR: 0x01000000 (disabled, pipe B) (II) intel(0): DSPBSTRIDE: 0x00000000 (0 bytes) (II) intel(0): DSPBPOS: 0x00000000 (0, 0) (II) intel(0): DSPBSIZE: 0x00000000 (1, 1) (II) intel(0): DSPBBASE: 0x00000000 (II) intel(0): DSPBSURF: 0x00000000 (II) intel(0): DSPBTILEOFF: 0x00000000 (II) intel(0): PIPEBCONF: 0x00000000 (disabled, single-wide) (II) intel(0): PIPEBSRC: 0x027f01df (640, 480) (II) intel(0): PIPEBSTAT: 0x00000000 (status:) (II) intel(0): FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): DPLL_B: 0x04800000 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10) (II) intel(0): DPLL_B_MD: 0x00000000 (II) intel(0): HTOTAL_B: 0x031f027f (640 active, 800 total) (II) intel(0): HBLANK_B: 0x03170287 (648 start, 792 end) (II) intel(0): HSYNC_B: 0x02ef028f (656 start, 752 end) (II) intel(0): VTOTAL_B: 0x020c01df (480 active, 525 total) (II) intel(0): VBLANK_B: 0x020401e7 (488 start, 517 end) (II) intel(0): VSYNC_B: 0x01eb01e9 (490 start, 492 end) (II) intel(0): BCLRPAT_B: 0x00000000 (II) intel(0): VSYNCSHIFT_B: 0x00000000 (II) intel(0): VCLK_DIVISOR_VGA0: 0x00031108 (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (II) intel(0): VCLK_POST_DIV: 0x00800080 (II) intel(0): VGACNTRL: 0x0020008e (enabled) (II) intel(0): TV_CTL: 0x000c0c00 (II) intel(0): TV_DAC: 0x70000000 (II) intel(0): TV_CSC_Y: 0x0332012d (II) intel(0): TV_CSC_Y2: 0x07d30104 (II) intel(0): TV_CSC_U: 0x0733052d (II) intel(0): TV_CSC_U2: 0x05c70200 (II) intel(0): TV_CSC_V: 0x0340030c (II) intel(0): TV_CSC_V2: 0x06d00200 (II) intel(0): TV_CLR_KNOBS: 0x00606000 (II) intel(0): TV_CLR_LEVEL: 0x010b00e1 (II) intel(0): TV_H_CTL_1: 0x00400359 (II) intel(0): TV_H_CTL_2: 0x80480022 (II) intel(0): TV_H_CTL_3: 0x007c0344 (II) intel(0): TV_V_CTL_1: 0x00f01415 (II) intel(0): TV_V_CTL_2: 0x00060607 (II) intel(0): TV_V_CTL_3: 0x80120001 (II) intel(0): TV_V_CTL_4: 0x000900f0 (II) intel(0): TV_V_CTL_5: 0x000a00f0 (II) intel(0): TV_V_CTL_6: 0x000900f0 (II) intel(0): TV_V_CTL_7: 0x000a00f0 (II) intel(0): TV_SC_CTL_1: 0xc1710087 (II) intel(0): TV_SC_CTL_2: 0x6b405140 (II) intel(0): TV_SC_CTL_3: 0x00000000 (II) intel(0): TV_WIN_POS: 0x00360024 (II) intel(0): TV_WIN_SIZE: 0x02640198 (II) intel(0): TV_FILTER_CTL_1: 0x80000d63 (II) intel(0): TV_FILTER_CTL_2: 0x0001e1e2 (II) intel(0): TV_FILTER_CTL_3: 0x0000f0f1 (II) intel(0): TV_CC_CONTROL: 0x00000000 (II) intel(0): TV_CC_DATA: 0x00000000 (II) intel(0): TV_H_LUMA_0: 0xb1403000 (II) intel(0): TV_H_LUMA_59: 0x0000b060 (II) intel(0): TV_H_CHROMA_0: 0xb1403000 (II) intel(0): TV_H_CHROMA_59: 0x0000b060 (II) intel(0): FBC_CFB_BASE: 0x00000000 (II) intel(0): FBC_LL_BASE: 0x00000000 (II) intel(0): FBC_CONTROL: 0x00000000 (II) intel(0): FBC_COMMAND: 0x00000000 (II) intel(0): FBC_STATUS: 0x20000000 (II) intel(0): FBC_CONTROL2: 0x00000000 (II) intel(0): FBC_FENCE_OFF: 0x00000000 (II) intel(0): FBC_MOD_NUM: 0x00000000 (II) intel(0): MI_MODE: 0x00000200 (II) intel(0): MI_ARB_STATE: 0x00000040 (II) intel(0): MI_RDRET_STATE: 0x00000000 (II) intel(0): ECOSKPD: 0x00000307 (II) intel(0): DP_B: 0x00000000 (II) intel(0): DPB_AUX_CH_CTL: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_C: 0x00000000 (II) intel(0): DPC_AUX_CH_CTL: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_D: 0x00000000 (II) intel(0): DPD_AUX_CH_CTL: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA5: 0x00000000 (II) intel(0): FENCE START 0: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 0: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 1: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 1: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 2: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 2: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 3: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 3: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 4: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 4: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 5: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 5: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 6: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 6: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 7: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 7: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 8: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 8: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 9: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 9: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 10: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 10: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 11: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 11: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 12: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 12: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 13: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 13: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 14: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 14: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 15: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 15: 0xffffffff ( 0xfffff000 end) (II) intel(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10 (II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10 (II) intel(0): DumpRegsEnd (II) intel(0): 2 display pipes available. (II) Loading sub module "ddc" (II) LoadModule: "ddc" (II) Module "ddc" already built-in (II) Loading sub module "i2c" (II) LoadModule: "i2c" (II) Module "i2c" already built-in (II) intel(0): Output VGA using monitor section Configured Monitor (II) intel(0): Output LVDS has no monitor section (II) intel(0): I2C bus "LVDSDDC_C" initialized. (II) intel(0): Attempting to determine panel fixed mode. (II) intel(0): I2C device "LVDSDDC_C:E-EDID segment register" registered at address 0x60. (II) intel(0): I2C device "LVDSDDC_C:ddc2" registered at address 0xA0. (II) intel(0): I2C bus "SDVOCTRL_E for SDVOB" initialized. (II) intel(0): I2C device "SDVOCTRL_E for SDVOB:SDVO Controller B" registered at address 0x70. (II) intel(0): I2C bus "SDVOB DDC Bus" initialized. (II) intel(0): SDVOB: W: 02 (SDVO_CMD_GET_DEVICE_CAPS) (II) intel(0): SDVOB: R: 02 3C 06 01 01 01 01 00 (Success) (II) intel(0): SDVOB: W: 9D (SDVO_CMD_GET_SUPP_ENCODE) (II) intel(0): SDVOB: R: 00 00 (Not supported) (II) intel(0): Output TMDS-1 has no monitor section (II) intel(0): SDVOB: W: 10 00 (SDVO_CMD_SET_TARGET_INPUT) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 1D (SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE) (II) intel(0): SDVOB: R: C4 09 20 4E (Success) (II) intel(0): SDVOB: device VID/DID: 02:3C.06, clock range 25.0MHz - 200.0MHz (II) intel(0): SDVOB: 1 input channel (II) intel(0): SDVOB: TMDS0 output reported (II) intel(0): Output TV has no monitor section (II) intel(0): SDVOB: W: 20 (SDVO_CMD_GET_CLOCK_RATE_MULT) (II) intel(0): SDVOB: R: 01 (Success) (II) intel(0): Current clock rate multiplier: 1 (II) intel(0): SDVOB: W: 04 (SDVO_CMD_GET_ACTIVE_OUTPUTS) (II) intel(0): SDVOB: R: 00 00 (Success) (II) intel(0): SDVOB: W: 10 00 (SDVO_CMD_SET_TARGET_INPUT) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 12 (SDVO_CMD_GET_INPUT_TIMINGS_PART1) (II) intel(0): SDVOB: R: 64 19 00 40 41 00 26 30 (Success) (II) intel(0): SDVOB: W: 13 (SDVO_CMD_GET_INPUT_TIMINGS_PART2) (II) intel(0): SDVOB: R: 18 88 36 00 18 00 00 00 (Success) (II) intel(0): SDVOB: W: 11 01 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 18 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVOB: R: 64 19 00 40 41 00 26 30 (Success) (II) intel(0): SDVOB: W: 19 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVOB: R: 18 88 36 00 18 00 00 00 (Success) (WW) intel(0): Option "ModeDebug" requires an string value (II) intel(0): Mode for pipe A: (II) intel(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 491 520 -hsync -vsync (37.9 kHz) (II) intel(0): chosen: dotclock 31500 vco 2520000 ((m 105, m1 17, m2 8), n 2, (p 80, p1 8, p2 10)) (II) intel(0): I2C bus "CRTDDC_A" initialized. (II) intel(0): I2C bus "CRTDDC_A" removed. (II) intel(0): SDVOB: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVOB: R: (Success) (II) intel(0): I2C bus "CRTDDC_A" initialized. (II) intel(0): I2C device "CRTDDC_A:E-EDID segment register" registered at address 0x60. (II) intel(0): I2C device "CRTDDC_A:ddc2" registered at address 0xA0. (II) intel(0): I2C device "CRTDDC_A:ddc2" removed. (II) intel(0): I2C device "CRTDDC_A:E-EDID segment register" removed. (II) intel(0): I2C bus "CRTDDC_A" removed. (II) intel(0): I2C bus "CRTDDC_D" initialized. (II) intel(0): I2C device "CRTDDC_D:E-EDID segment register" registered at address 0x60. (II) intel(0): I2C device "CRTDDC_D:ddc2" registered at address 0xA0. (II) intel(0): I2C device "CRTDDC_D:ddc2" removed. (II) intel(0): I2C device "CRTDDC_D:E-EDID segment register" removed. (II) intel(0): I2C bus "CRTDDC_D" removed. (II) intel(0): I2C bus "CRTDDC_E" initialized. (II) intel(0): I2C device "CRTDDC_E:E-EDID segment register" registered at address 0x60. (II) intel(0): I2C device "CRTDDC_E:ddc2" registered at address 0xA0. (II) intel(0): I2C device "CRTDDC_E:ddc2" removed. (II) intel(0): I2C device "CRTDDC_E:E-EDID segment register" removed. (II) intel(0): I2C bus "CRTDDC_E" removed. (II) intel(0): LID switch detect open with SWF14 0xc0000000 (II) intel(0): SDVOB: W: 0B (SDVO_CMD_GET_ATTACHED_DISPLAYS) (II) intel(0): SDVOB: R: 01 00 (Success) (II) intel(0): I2C device "SDVOB DDC Bus:E-EDID segment register" registered at address 0x60. (II) intel(0): I2C device "SDVOB DDC Bus:ddc2" registered at address 0xA0. (II) intel(0): SDVOB: W: 7A 02 (SDVO_CMD_SET_CONTROL_BUS_SWITCH) (II) intel(0): SDVOB: W: 7A 02 (SDVO_CMD_SET_CONTROL_BUS_SWITCH) (II) intel(0): EDID vendor "BNQ", prod id 30489 (II) intel(0): Mode for pipe A: (II) intel(0): Modeline "NTSC 480i"x0.0 107.52 1280 1368 1496 1712 1024 1027 1034 1104 (62.8 kHz) (II) intel(0): Adjusted mode for pipe A: (II) intel(0): Modeline "NTSC 480i"x0.0 108.00 1280 1368 1496 1712 1024 1027 1034 1104 (63.1 kHz) (II) intel(0): chosen: dotclock 108000 vco 2160000 ((m 90, m1 14, m2 8), n 2, (p 20, p1 2, p2 10)) (II) intel(0): No TV connection detected (II) intel(0): SDVOB: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVOB: R: (Success) (II) intel(0): Output VGA connected (II) intel(0): Output LVDS connected (II) intel(0): Output TMDS-1 connected (II) intel(0): Output TV disconnected (II) intel(0): Using exact sizes for initial modes (II) intel(0): Output VGA using initial mode 1024x768 (II) intel(0): Output LVDS using initial mode 1024x768 (II) intel(0): Output TMDS-1 using initial mode 1024x768 (II) intel(0): SDVOB: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 11 01 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 17 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 10 00 (SDVO_CMD_SET_TARGET_INPUT) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 21 01 (SDVO_CMD_SET_CLOCK_RATE_MULT) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVOB: R: (Success) (II) intel(0): detected 256 kB GTT. (II) intel(0): detected 7932 kB stolen memory. (==) intel(0): video overlay key set to 0x101fe (==) intel(0): Will not try to enable page flipping (==) intel(0): Triple buffering disabled (==) intel(0): Using gamma correction (1.0, 1.0, 1.0) (==) intel(0): DPI set to (96, 96) (II) Loading sub module "fb" (II) LoadModule: "fb" (II) Loading /usr/lib/xorg/modules//libfb.so (II) Module fb: vendor="X.Org Foundation" compiled for 1.5.99.3, module version = 1.0.0 ABI class: X.Org ANSI C Emulation, version 0.4 (II) Loading sub module "exa" (II) LoadModule: "exa" (II) Loading /usr/lib/xorg/modules//libexa.so (II) Module exa: vendor="X.Org Foundation" compiled for 1.5.99.3, module version = 2.4.0 ABI class: X.Org Video Driver, version 5.0 (II) Loading sub module "ramdac" (II) LoadModule: "ramdac" (II) Module "ramdac" already built-in (II) intel(0): Comparing regs from server start up to After PreInit (WW) intel(0): Register 0x68080 (TV_FILTER_CTL_1) changed from 0x80000d63 to 0x800010bb (WW) intel(0): Register 0x68084 (TV_FILTER_CTL_2) changed from 0x0001e1e2 to 0x00028283 (WW) intel(0): Register 0x68088 (TV_FILTER_CTL_3) changed from 0x0000f0f1 to 0x00014141 (==) Depth 24 pixmap format is 32 bpp (II) do I need RAC? No, I don't. (II) resource ranges after preInit: [0] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] 0 0 0x000a0000 - 0x000affff (0x10000) MS[B](OprD) [5] 0 0 0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD) [6] 0 0 0x000b8000 - 0x000bffff (0x8000) MS[B](OprD) [7] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [8] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [9] 0 0 0x000003b0 - 0x000003bb (0xc) IS[B](OprU) [10] 0 0 0x000003c0 - 0x000003df (0x20) IS[B](OprU) (II) intel(0): Kernel reported 238848 total, 1 used (II) intel(0): I830CheckAvailableMemory: 955388 kB available (WW) intel(0): DRI2 requires UXA drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 11, (OK) drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 11, (OK) drmOpenByBusid: Searching for BusID pci:0000:00:02.0 drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 11, (OK) drmOpenByBusid: drmOpenMinor returns 11 drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0 (II) [drm] DRM interface version 1.3 (II) [drm] DRM open master succeeded. (II) intel(0): [drm] Using the DRM lock SAREA also for drawables. (II) intel(0): [drm] framebuffer mapped by ddx driver (II) intel(0): [drm] added 1 reserved context for kernel (II) intel(0): X context handle = 0x1 (II) intel(0): [drm] installed DRM signal handler (**) intel(0): Framebuffer compression enabled (**) intel(0): Tiling enabled (==) intel(0): VideoRam: 262144 KB (II) intel(0): Attempting memory allocation with tiled buffers. (II) intel(0): Tiled allocation successful. (II) intel(0): [drm] Registers = 0xd0180000 (II) intel(0): [drm] Initialized kernel agp heap manager, 33554432 (II) intel(0): [dri] visual configs initialized (II) intel(0): Page Flipping disabled (II) intel(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000 (II) EXA(0): Offscreen pixmap area of 41287680 bytes (II) EXA(0): Driver registered support for the following operations: (II) Solid (II) Copy (II) Composite (RENDER acceleration) (==) intel(0): Backing store disabled (==) intel(0): Silken mouse enabled (II) intel(0): Initializing HW Cursor (II) intel(0): [DRI] installation complete (II) intel(0): SDVOB: W: 20 (SDVO_CMD_GET_CLOCK_RATE_MULT) (II) intel(0): SDVOB: R: 01 (Success) (II) intel(0): Current clock rate multiplier: 1 (II) intel(0): SDVOB: W: 04 (SDVO_CMD_GET_ACTIVE_OUTPUTS) (II) intel(0): SDVOB: R: 00 00 (Success) (II) intel(0): SDVOB: W: 10 00 (SDVO_CMD_SET_TARGET_INPUT) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 12 (SDVO_CMD_GET_INPUT_TIMINGS_PART1) (II) intel(0): SDVOB: R: 64 19 00 40 41 00 26 30 (Success) (II) intel(0): SDVOB: W: 13 (SDVO_CMD_GET_INPUT_TIMINGS_PART2) (II) intel(0): SDVOB: R: 18 88 36 00 18 00 00 00 (Success) (II) intel(0): SDVOB: W: 11 01 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 18 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVOB: R: 64 19 00 40 41 00 26 30 (Success) (II) intel(0): SDVOB: W: 19 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVOB: R: 18 88 36 00 18 00 00 00 (Success) (II) intel(0): xf86BindGARTMemory: bind key 0 at 0x0b294000 (pgoffset 45716) (II) intel(0): xf86BindGARTMemory: bind key 1 at 0x0d9f4000 (pgoffset 55796) (II) intel(0): Fixed memory allocation layout: (II) intel(0): 0x00000000-0x005fffff: compressed frame buffer (6144 kB, 0x000000003f800000 physical ) (II) intel(0): 0x00600000-0x00600fff: compressed ll buffer (4 kB, 0x000000003fe00000 physical ) (II) intel(0): 0x00601000-0x0060afff: HW cursors (40 kB, 0x000000003fe01000 physical ) (II) intel(0): 0x0060b000-0x0060bfff: overlay registers (4 kB, 0x000000003fe0b000 physical ) (II) intel(0): 0x007bf000: end of stolen memory (II) intel(0): 0x007bf000-0x0b293fff: DRI memory manager (174932 kB) (II) intel(0): 0x0b294000-0x0d9f3fff: exa offscreen (40320 kB) (II) intel(0): 0x0d9f4000-0x0f9f3fff: classic textures (32768 kB) (II) intel(0): 0x10000000: end of aperture (II) intel(0): BO memory allocation layout: (II) intel(0): 0x007bf000: start of memory manager (II) intel(0): 0x01000000-0x01d1ffff: depth buffer (13440 kB) X tiled (II) intel(0): 0x02000000-0x02d1ffff: back buffer (13440 kB) X tiled (II) intel(0): 0x03000000-0x03d1ffff: front buffer (13440 kB) X tiled (II) intel(0): 0x007df000-0x007e6fff: logical 3D context (32 kB) (II) intel(0): 0x0b294000: end of memory manager (WW) intel(0): ESR is 0x00000011, page table error, instruction error (WW) intel(0): PGTBL_ER is 0x00000010, display A pte (WW) intel(0): Existing errors found in hardware state. (II) intel(0): SDVOB: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVOB: R: (Success) (II) intel(0): Mode for pipe A: (II) intel(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz) (II) intel(0): Adjusted mode for pipe A: (II) intel(0): Modeline "1024x768"x60.0 130.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (96.7 kHz) (II) intel(0): chosen: dotclock 129600 vco 2592000 ((m 81, m1 12, m2 9), n 1, (p 20, p1 2, p2 10)) (II) intel(0): SDVOB: W: 07 01 00 00 00 (SDVO_CMD_SET_IN_OUT_MAP) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 11 01 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 17 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 10 00 (SDVO_CMD_SET_TARGET_INPUT) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 21 02 (SDVO_CMD_SET_CLOCK_RATE_MULT) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 03 (SDVO_CMD_GET_TRAINED_INPUTS) (II) intel(0): SDVOB: R: 01 (Success) (II) intel(0): SDVOB: W: 05 01 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVOB: R: (Success) (II) intel(0): Mode for pipe B: (II) intel(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 806 (48.4 kHz) (II) intel(0): chosen: dotclock 65142 vco 1824000 ((m 76, m1 11, m2 9), n 2, (p 28, p1 2, p2 14)) (II) intel(0): Selecting standard 18 bit TMDS pixel format. (II) intel(0): Hardware state at EnterVT: (II) intel(0): DumpRegsBegin (II) intel(0): CHDECMISC: 0x22b97828 (XOR bank/rank, ch2 enh disabled, ch1 enh enabled, ch0 enh disabled, flex disabled, ep not present) (II) intel(0): C0DRB0: 0x000f0400 (0x0400) (II) intel(0): C0DRB1: 0x0000000f (0x000f) (II) intel(0): C0DRB2: 0x00000000 (0x0000) (II) intel(0): C0DRB3: 0x01080000 (0x0000) (II) intel(0): C1DRB0: 0x05040302 (0x0302) (II) intel(0): C1DRB1: 0x07060504 (0x0504) (II) intel(0): C1DRB2: 0x09080706 (0x0706) (II) intel(0): C1DRB3: 0x0b0a0908 (0x0908) (II) intel(0): C0DRA01: 0x04020108 (0x0108) (II) intel(0): C0DRA23: 0x00000402 (0x0402) (II) intel(0): C1DRA01: 0x0d0c0b0a (0x0b0a) (II) intel(0): C1DRA23: 0x0f0e0d0c (0x0d0c) (II) intel(0): VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) (II) intel(0): VCLK_POST_DIV: 0x00800080 (vga0 p1 = 2, p2 = 4, vga1 p1 = 2, p2 = 2) (II) intel(0): DPLL_TEST: 0x00010001 () (II) intel(0): CACHE_MODE_0: 0x00006820 (II) intel(0): D_STATE: 0x00000000 (II) intel(0): DSPCLK_GATE_D: 0x00001000 (clock gates disabled: DPLUNIT) (II) intel(0): RENCLK_GATE_D1: 0x00000000 (II) intel(0): RENCLK_GATE_D2: 0x00000000 (II) intel(0): SDVOB: 0x80c80084 (enabled, pipe A, stall disabled, detected, SDVO mult 2) (II) intel(0): SDVOC: 0x00480000 (disabled, pipe A, stall disabled, not detected, SDVO mult 1) (II) intel(0): SDVOUDI: 0x000000a0 (II) intel(0): DSPARB: 0x00002f2f (II) intel(0): DSPFW1: 0x00000000 (II) intel(0): DSPFW2: 0x00000000 (II) intel(0): DSPFW3: 0x00000000 (II) intel(0): ADPA: 0x00008c18 (disabled, pipe A, +hsync, +vsync) (II) intel(0): LVDS: 0xc0000300 (enabled, pipe B, 18 bit, 1 channel) (II) intel(0): DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOB: 0x80c80084 (enabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOC: 0x00480000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOA_SRCDIM: 0x00000000 (II) intel(0): DVOB_SRCDIM: 0x00000000 (II) intel(0): DVOC_SRCDIM: 0x00000000 (II) intel(0): PP_CONTROL: 0x00000001 (power target: on) (II) intel(0): PP_STATUS: 0xd000000a (on, ready, sequencing on) (II) intel(0): PP_ON_DELAYS: 0x025907d1 (II) intel(0): PP_OFF_DELAYS: 0x01f507d1 (II) intel(0): PP_DIVISOR: 0x00270f05 (II) intel(0): PFIT_CONTROL: 0x00000008 (II) intel(0): PFIT_PGM_RATIOS: 0x00000000 (II) intel(0): PORT_HOTPLUG_EN: 0x00000000 (II) intel(0): PORT_HOTPLUG_STAT: 0x00000000 (II) intel(0): DSPACNTR: 0xd8000000 (enabled, pipe A) (II) intel(0): DSPASTRIDE: 0x00002000 (8192 bytes) (II) intel(0): DSPAPOS: 0x00000000 (0, 0) (II) intel(0): DSPASIZE: 0x02ff03ff (1024, 768) (II) intel(0): DSPABASE: 0x03000000 (II) intel(0): DSPASURF: 0x00000000 (II) intel(0): DSPATILEOFF: 0x00000000 (II) intel(0): PIPEACONF: 0x80000000 (enabled, single-wide) (II) intel(0): PIPEASRC: 0x03ff02ff (1024, 768) (II) intel(0): PIPEASTAT: 0x00000203 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS) (II) intel(0): FPA0: 0x00010c09 (n = 1, m1 = 12, m2 = 9) (II) intel(0): FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): DPLL_A: 0xd4020000 (enabled, dvo, default clock, DAC/serial mode, p1 = 2, p2 = 10) (II) intel(0): DPLL_A_MD: 0x00000000 (II) intel(0): HTOTAL_A: 0x053f03ff (1024 active, 1344 total) (II) intel(0): HBLANK_A: 0x053f03ff (1024 start, 1344 end) (II) intel(0): HSYNC_A: 0x049f0417 (1048 start, 1184 end) (II) intel(0): VTOTAL_A: 0x032502ff (768 active, 806 total) (II) intel(0): VBLANK_A: 0x032502ff (768 start, 806 end) (II) intel(0): VSYNC_A: 0x03080302 (771 start, 777 end) (II) intel(0): BCLRPAT_A: 0x00000000 (II) intel(0): VSYNCSHIFT_A: 0x00000000 (II) intel(0): DSPBCNTR: 0xd9000000 (enabled, pipe B) (II) intel(0): DSPBSTRIDE: 0x00002000 (8192 bytes) (II) intel(0): DSPBPOS: 0x00000000 (0, 0) (II) intel(0): DSPBSIZE: 0x02ff03ff (1024, 768) (II) intel(0): DSPBBASE: 0x03000000 (II) intel(0): DSPBSURF: 0x00000000 (II) intel(0): DSPBTILEOFF: 0x00000000 (II) intel(0): PIPEBCONF: 0x80000000 (enabled, single-wide) (II) intel(0): PIPEBSRC: 0x03ff02ff (1024, 768) (II) intel(0): PIPEBSTAT: 0x00000202 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS) (II) intel(0): FPB0: 0x00020b09 (n = 2, m1 = 11, m2 = 9) (II) intel(0): FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): DPLL_B: 0x98020000 (enabled, non-dvo, default clock, LVDS mode, p1 = 2, p2 = 14) (II) intel(0): DPLL_B_MD: 0x00000000 (II) intel(0): HTOTAL_B: 0x053f03ff (1024 active, 1344 total) (II) intel(0): HBLANK_B: 0x053f03ff (1024 start, 1344 end) (II) intel(0): HSYNC_B: 0x049f0417 (1048 start, 1184 end) (II) intel(0): VTOTAL_B: 0x032502ff (768 active, 806 total) (II) intel(0): VBLANK_B: 0x032502ff (768 start, 806 end) (II) intel(0): VSYNC_B: 0x03080302 (771 start, 777 end) (II) intel(0): BCLRPAT_B: 0x00000000 (II) intel(0): VSYNCSHIFT_B: 0x00000000 (II) intel(0): VCLK_DIVISOR_VGA0: 0x00031108 (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (II) intel(0): VCLK_POST_DIV: 0x00800080 (II) intel(0): VGACNTRL: 0x80000000 (disabled) (II) intel(0): TV_CTL: 0x000c0c00 (II) intel(0): TV_DAC: 0x70000000 (II) intel(0): TV_CSC_Y: 0x0332012d (II) intel(0): TV_CSC_Y2: 0x07d30104 (II) intel(0): TV_CSC_U: 0x0733052d (II) intel(0): TV_CSC_U2: 0x05c70200 (II) intel(0): TV_CSC_V: 0x0340030c (II) intel(0): TV_CSC_V2: 0x06d00200 (II) intel(0): TV_CLR_KNOBS: 0x00606000 (II) intel(0): TV_CLR_LEVEL: 0x010b00e1 (II) intel(0): TV_H_CTL_1: 0x00400359 (II) intel(0): TV_H_CTL_2: 0x80480022 (II) intel(0): TV_H_CTL_3: 0x007c0344 (II) intel(0): TV_V_CTL_1: 0x00f01415 (II) intel(0): TV_V_CTL_2: 0x00060607 (II) intel(0): TV_V_CTL_3: 0x80120001 (II) intel(0): TV_V_CTL_4: 0x000900f0 (II) intel(0): TV_V_CTL_5: 0x000a00f0 (II) intel(0): TV_V_CTL_6: 0x000900f0 (II) intel(0): TV_V_CTL_7: 0x000a00f0 (II) intel(0): TV_SC_CTL_1: 0xc1710087 (II) intel(0): TV_SC_CTL_2: 0x6b405140 (II) intel(0): TV_SC_CTL_3: 0x00000000 (II) intel(0): TV_WIN_POS: 0x00360024 (II) intel(0): TV_WIN_SIZE: 0x02640198 (II) intel(0): TV_FILTER_CTL_1: 0x800010bb (II) intel(0): TV_FILTER_CTL_2: 0x00028283 (II) intel(0): TV_FILTER_CTL_3: 0x00014141 (II) intel(0): TV_CC_CONTROL: 0x00000000 (II) intel(0): TV_CC_DATA: 0x00000000 (II) intel(0): TV_H_LUMA_0: 0xb1403000 (II) intel(0): TV_H_LUMA_59: 0x0000b060 (II) intel(0): TV_H_CHROMA_0: 0xb1403000 (II) intel(0): TV_H_CHROMA_59: 0x0000b060 (II) intel(0): FBC_CFB_BASE: 0x00000000 (II) intel(0): FBC_LL_BASE: 0x00000000 (II) intel(0): FBC_CONTROL: 0x00000000 (II) intel(0): FBC_COMMAND: 0x00000000 (II) intel(0): FBC_STATUS: 0x20000000 (II) intel(0): FBC_CONTROL2: 0x00000000 (II) intel(0): FBC_FENCE_OFF: 0x00000000 (II) intel(0): FBC_MOD_NUM: 0x00000000 (II) intel(0): MI_MODE: 0x00000200 (II) intel(0): MI_ARB_STATE: 0x00000040 (II) intel(0): MI_RDRET_STATE: 0x00000000 (II) intel(0): ECOSKPD: 0x00000307 (II) intel(0): DP_B: 0x00000000 (II) intel(0): DPB_AUX_CH_CTL: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_C: 0x00000000 (II) intel(0): DPC_AUX_CH_CTL: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_D: 0x00000000 (II) intel(0): DPD_AUX_CH_CTL: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA5: 0x00000000 (II) intel(0): FENCE START 0: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 0: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 1: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 1: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 2: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 2: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 3: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 3: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 4: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 4: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 5: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 5: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 6: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 6: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 7: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 7: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 8: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 8: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 9: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 9: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 10: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 10: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 11: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 11: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 12: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 12: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 13: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 13: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 14: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 14: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 15: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 15: 0xffffffff ( 0xfffff000 end) (II) intel(0): pipe A dot 129600 n 1 m1 12 m2 9 p1 2 p2 10 (II) intel(0): pipe B dot 65142 n 2 m1 11 m2 9 p1 2 p2 14 (II) intel(0): DumpRegsEnd (II) intel(0): Output configuration: (II) intel(0): Pipe A is on (II) intel(0): Display plane A is now enabled and connected to pipe A. (II) intel(0): Pipe B is on (II) intel(0): Display plane B is now enabled and connected to pipe B. (II) intel(0): Output VGA is connected to pipe none (II) intel(0): Output LVDS is connected to pipe B (II) intel(0): Output TMDS-1 is connected to pipe A (II) intel(0): Output TV is connected to pipe none (II) intel(0): [drm] mapped front buffer at 0xc3000000, handle = 0xc3000000 (II) intel(0): [drm] mapped back buffer at 0xc2000000, handle = 0xc2000000 (II) intel(0): [drm] mapped depth buffer at 0xc1000000, handle = 0xc1000000 (II) intel(0): [drm] mapped classic textures at 0xcd9f4000, handle = 0xcd9f4000 (II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message. (II) intel(0): DPMS enabled (==) intel(0): Intel XvMC decoder disabled (II) intel(0): Set up textured video (II) intel(0): Set up overlay video (II) intel(0): direct rendering: XF86DRI Enabled (--) RandR disabled (II) Initializing built-in extension Generic Event Extension (II) Initializing built-in extension SHAPE (II) Initializing built-in extension MIT-SHM (II) Initializing built-in extension XInputExtension (II) Initializing built-in extension XTEST (II) Initializing built-in extension BIG-REQUESTS (II) Initializing built-in extension SYNC (II) Initializing built-in extension XKEYBOARD (II) Initializing built-in extension XC-MISC (II) Initializing built-in extension SECURITY (II) Initializing built-in extension XINERAMA (II) Initializing built-in extension XFIXES (II) Initializing built-in extension RENDER (II) Initializing built-in extension RANDR (II) Initializing built-in extension COMPOSITE (II) Initializing built-in extension DAMAGE (II) AIGLX: Screen 0 is not DRI2 capable drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 12, (OK) drmOpenByBusid: Searching for BusID pci:0000:00:02.0 drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 12, (OK) drmOpenByBusid: drmOpenMinor returns 12 drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0 (II) AIGLX: enabled GLX_SGI_make_current_read (II) AIGLX: enabled GLX_MESA_copy_sub_buffer (II) AIGLX: enabled GLX_SGI_swap_control and GLX_MESA_swap_control (II) AIGLX: enabled GLX_texture_from_pixmap with driver support (II) AIGLX: Loaded and initialized /usr/lib/dri/i915_dri.so (II) GLX: Initialized DRI GL provider for screen 0 (II) intel(0): Setting screen physical size to 270 x 203 (II) intel(0): SDVOB: W: 03 (SDVO_CMD_GET_TRAINED_INPUTS) (II) intel(0): SDVOB: R: 01 (Success) (II) intel(0): SDVOB: W: 05 01 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVOB: R: (Success) (II) config/hal: Adding input device Macintosh mouse button emulation (II) LoadModule: "evdev" (II) Loading /usr/lib/xorg/modules/input//evdev_drv.so (II) Module evdev: vendor="X.Org Foundation" compiled for 1.5.99.3, module version = 2.1.0 Module class: X.Org XInput Driver ABI class: X.Org XInput driver, version 4.0 (**) Macintosh mouse button emulation: always reports core events (**) Macintosh mouse button emulation: Device: "/dev/input/event0" (II) Macintosh mouse button emulation: Found 3 mouse buttons (II) Macintosh mouse button emulation: Found x and y relative axes (II) Macintosh mouse button emulation: Configuring as mouse (**) Macintosh mouse button emulation: YAxisMapping: buttons 4 and 5 (**) Macintosh mouse button emulation: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200 (II) XINPUT: Adding extended input device "Macintosh mouse button emulation" (type: MOUSE) (**) Macintosh mouse button emulation: (accel) keeping acceleration scheme 1 (**) Macintosh mouse button emulation: (accel) filter chain progression: 2.00 (**) Macintosh mouse button emulation: (accel) filter stage 0: 20.00 ms (**) Macintosh mouse button emulation: (accel) set acceleration profile 0 (II) config/hal: Adding input device HID 1267:0103 (**) HID 1267:0103: always reports core events (**) HID 1267:0103: Device: "/dev/input/event1" (II) HID 1267:0103: Found keys (II) HID 1267:0103: Configuring as keyboard (II) XINPUT: Adding extended input device "HID 1267:0103" (type: KEYBOARD) (**) Option "xkb_rules" "evdev" (**) HID 1267:0103: xkb_rules: "evdev" (**) Option "xkb_model" "pc105" (**) HID 1267:0103: xkb_model: "pc105" (**) Option "xkb_layout" "no" (**) HID 1267:0103: xkb_layout: "no" (II) config/hal: Adding input device HID 1267:0103 (**) HID 1267:0103: always reports core events (**) HID 1267:0103: Device: "/dev/input/event2" (II) HID 1267:0103: Found 1 mouse buttons (II) HID 1267:0103: Found keys (II) HID 1267:0103: Configuring as keyboard (**) HID 1267:0103: YAxisMapping: buttons 4 and 5 (**) HID 1267:0103: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200 (II) XINPUT: Adding extended input device "HID 1267:0103" (type: KEYBOARD) (**) Option "xkb_rules" "evdev" (**) HID 1267:0103: xkb_rules: "evdev" (**) Option "xkb_model" "pc105" (**) HID 1267:0103: xkb_model: "pc105" (**) Option "xkb_layout" "no" (**) HID 1267:0103: xkb_layout: "no" (II) config/hal: Adding input device HID 062a:0000 (**) HID 062a:0000: always reports core events (**) HID 062a:0000: Device: "/dev/input/event3" (II) HID 062a:0000: Found 5 mouse buttons (II) HID 062a:0000: Found x and y relative axes (II) HID 062a:0000: Configuring as mouse (**) HID 062a:0000: YAxisMapping: buttons 4 and 5 (**) HID 062a:0000: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200 (II) XINPUT: Adding extended input device "HID 062a:0000" (type: MOUSE) (**) HID 062a:0000: (accel) keeping acceleration scheme 1 (**) HID 062a:0000: (accel) filter chain progression: 2.00 (**) HID 062a:0000: (accel) filter stage 0: 20.00 ms (**) HID 062a:0000: (accel) set acceleration profile 0 (II) intel(0): I2C bus "CRTDDC_A" initialized. (II) intel(0): I2C bus "CRTDDC_A" removed. (II) intel(0): I2C bus "CRTDDC_A" initialized. (II) intel(0): I2C device "CRTDDC_A:E-EDID segment register" registered at address 0x60. (II) intel(0): I2C device "CRTDDC_A:ddc2" registered at address 0xA0. (II) intel(0): I2C device "CRTDDC_A:ddc2" removed. (II) intel(0): I2C device "CRTDDC_A:E-EDID segment register" removed. (II) intel(0): I2C bus "CRTDDC_A" removed. (II) intel(0): I2C bus "CRTDDC_D" initialized. (II) intel(0): I2C device "CRTDDC_D:E-EDID segment register" registered at address 0x60. (II) intel(0): I2C device "CRTDDC_D:ddc2" registered at address 0xA0. (II) intel(0): I2C device "CRTDDC_D:ddc2" removed. (II) intel(0): I2C device "CRTDDC_D:E-EDID segment register" removed. (II) intel(0): I2C bus "CRTDDC_D" removed. (II) intel(0): I2C bus "CRTDDC_E" initialized. (II) intel(0): I2C device "CRTDDC_E:E-EDID segment register" registered at address 0x60. (II) intel(0): I2C device "CRTDDC_E:ddc2" registered at address 0xA0. (II) intel(0): I2C device "CRTDDC_E:ddc2" removed. (II) intel(0): I2C device "CRTDDC_E:E-EDID segment register" removed. (II) intel(0): I2C bus "CRTDDC_E" removed. (II) intel(0): LID switch detect open with SWF14 0xc0820000 (II) intel(0): SDVOB: W: 0B (SDVO_CMD_GET_ATTACHED_DISPLAYS) (II) intel(0): SDVOB: R: 01 00 (Success) (II) intel(0): SDVOB: W: 7A 02 (SDVO_CMD_SET_CONTROL_BUS_SWITCH) (II) intel(0): SDVOB: W: 7A 02 (SDVO_CMD_SET_CONTROL_BUS_SWITCH) (II) intel(0): EDID vendor "BNQ", prod id 30489 (II) intel(0): No TV connection detected AUDIT: Wed Dec 24 13:51:13 2008: 8837: client 4 rejected from local host ( uid=0 gid=0 pid=8862 ) (II) AIGLX: Suspending AIGLX clients for VT switch (II) intel(0): SDVOB: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 11 01 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 17 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 10 00 (SDVO_CMD_SET_TARGET_INPUT) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 21 01 (SDVO_CMD_SET_CLOCK_RATE_MULT) (II) intel(0): SDVOB: R: (Success) (II) intel(0): SDVOB: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVOB: R: (Success) (II) intel(0): Comparing regs from server start up to After LeaveVT (WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0x00000000 to 0x08000001 (WW) intel(0): PP_STATUS before: off, not ready, sequencing idle (WW) intel(0): PP_STATUS after: off, not ready, sequencing idle (WW) intel(0): Register 0x70024 (PIPEASTAT) changed from 0x00000000 to 0x00020000 (WW) intel(0): PIPEASTAT before: status: (WW) intel(0): PIPEASTAT after: status: VBLANK_INT_ENABLE (WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x00000000 to 0x00020000 (WW) intel(0): PIPEBSTAT before: status: (WW) intel(0): PIPEBSTAT after: status: VBLANK_INT_ENABLE (II) intel(0): DumpRegsBegin (II) intel(0): CHDECMISC: 0x22b97828 (XOR bank/rank, ch2 enh disabled, ch1 enh enabled, ch0 enh disabled, flex disabled, ep not present) (II) intel(0): C0DRB0: 0x000f0400 (0x0400) (II) intel(0): C0DRB1: 0x0000000f (0x000f) (II) intel(0): C0DRB2: 0x00000000 (0x0000) (II) intel(0): C0DRB3: 0x01080000 (0x0000) (II) intel(0): C1DRB0: 0x05040302 (0x0302) (II) intel(0): C1DRB1: 0x07060504 (0x0504) (II) intel(0): C1DRB2: 0x09080706 (0x0706) (II) intel(0): C1DRB3: 0x0b0a0908 (0x0908) (II) intel(0): C0DRA01: 0x04020108 (0x0108) (II) intel(0): C0DRA23: 0x00000402 (0x0402) (II) intel(0): C1DRA01: 0x0d0c0b0a (0x0b0a) (II) intel(0): C1DRA23: 0x0f0e0d0c (0x0d0c) (II) intel(0): VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) (II) intel(0): VCLK_POST_DIV: 0x00800080 (vga0 p1 = 2, p2 = 4, vga1 p1 = 2, p2 = 2) (II) intel(0): DPLL_TEST: 0x00010001 () (II) intel(0): CACHE_MODE_0: 0x00006820 (II) intel(0): D_STATE: 0x00000000 (II) intel(0): DSPCLK_GATE_D: 0x00001000 (clock gates disabled: DPLUNIT) (II) intel(0): RENCLK_GATE_D1: 0x00000000 (II) intel(0): RENCLK_GATE_D2: 0x00000000 (II) intel(0): SDVOB: 0x00480004 (disabled, pipe A, stall disabled, detected, SDVO mult 1) (II) intel(0): SDVOC: 0x00480000 (disabled, pipe A, stall disabled, not detected, SDVO mult 1) (II) intel(0): SDVOUDI: 0x000000a0 (II) intel(0): DSPARB: 0x00001d9c (II) intel(0): DSPFW1: 0x00000000 (II) intel(0): DSPFW2: 0x00000000 (II) intel(0): DSPFW3: 0x00000000 (II) intel(0): ADPA: 0x80008018 (enabled, pipe A, +hsync, +vsync) (II) intel(0): LVDS: 0x40000300 (disabled, pipe B, 18 bit, 1 channel) (II) intel(0): DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOB: 0x00480004 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOC: 0x00480000 (disabled, pipe A, no stall, -hsync, -vsync) (II) intel(0): DVOA_SRCDIM: 0x00000000 (II) intel(0): DVOB_SRCDIM: 0x00000000 (II) intel(0): DVOC_SRCDIM: 0x00000000 (II) intel(0): PP_CONTROL: 0x00000000 (power target: off) (II) intel(0): PP_STATUS: 0x08000001 (off, not ready, sequencing idle) (II) intel(0): PP_ON_DELAYS: 0x025907d1 (II) intel(0): PP_OFF_DELAYS: 0x01f507d1 (II) intel(0): PP_DIVISOR: 0x00270f05 (II) intel(0): PFIT_CONTROL: 0x00002668 (II) intel(0): PFIT_PGM_RATIOS: 0x00000000 (II) intel(0): PORT_HOTPLUG_EN: 0x00000000 (II) intel(0): PORT_HOTPLUG_STAT: 0x00000000 (II) intel(0): DSPACNTR: 0x00000000 (disabled, pipe A) (II) intel(0): DSPASTRIDE: 0x00000000 (0 bytes) (II) intel(0): DSPAPOS: 0x00000000 (0, 0) (II) intel(0): DSPASIZE: 0x00000000 (1, 1) (II) intel(0): DSPABASE: 0x00000000 (II) intel(0): DSPASURF: 0x00000000 (II) intel(0): DSPATILEOFF: 0x00000000 (II) intel(0): PIPEACONF: 0x80000000 (enabled, single-wide) (II) intel(0): PIPEASRC: 0x027f01df (640, 480) (II) intel(0): PIPEASTAT: 0x00020000 (status: VBLANK_INT_ENABLE) (II) intel(0): FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): DPLL_A: 0x84800000 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10) (II) intel(0): DPLL_A_MD: 0x00000000 (II) intel(0): HTOTAL_A: 0x031f027f (640 active, 800 total) (II) intel(0): HBLANK_A: 0x03170287 (648 start, 792 end) (II) intel(0): HSYNC_A: 0x02ef028f (656 start, 752 end) (II) intel(0): VTOTAL_A: 0x020c01df (480 active, 525 total) (II) intel(0): VBLANK_A: 0x020401e7 (488 start, 517 end) (II) intel(0): VSYNC_A: 0x01eb01e9 (490 start, 492 end) (II) intel(0): BCLRPAT_A: 0x00000000 (II) intel(0): VSYNCSHIFT_A: 0x00000000 (II) intel(0): DSPBCNTR: 0x01000000 (disabled, pipe B) (II) intel(0): DSPBSTRIDE: 0x00000000 (0 bytes) (II) intel(0): DSPBPOS: 0x00000000 (0, 0) (II) intel(0): DSPBSIZE: 0x00000000 (1, 1) (II) intel(0): DSPBBASE: 0x00000000 (II) intel(0): DSPBSURF: 0x00000000 (II) intel(0): DSPBTILEOFF: 0x00000000 (II) intel(0): PIPEBCONF: 0x00000000 (disabled, single-wide) (II) intel(0): PIPEBSRC: 0x027f01df (640, 480) (II) intel(0): PIPEBSTAT: 0x00020000 (status: VBLANK_INT_ENABLE) (II) intel(0): FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): DPLL_B: 0x04800000 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10) (II) intel(0): DPLL_B_MD: 0x00000000 (II) intel(0): HTOTAL_B: 0x031f027f (640 active, 800 total) (II) intel(0): HBLANK_B: 0x03170287 (648 start, 792 end) (II) intel(0): HSYNC_B: 0x02ef028f (656 start, 752 end) (II) intel(0): VTOTAL_B: 0x020c01df (480 active, 525 total) (II) intel(0): VBLANK_B: 0x020401e7 (488 start, 517 end) (II) intel(0): VSYNC_B: 0x01eb01e9 (490 start, 492 end) (II) intel(0): BCLRPAT_B: 0x00000000 (II) intel(0): VSYNCSHIFT_B: 0x00000000 (II) intel(0): VCLK_DIVISOR_VGA0: 0x00031108 (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (II) intel(0): VCLK_POST_DIV: 0x00800080 (II) intel(0): VGACNTRL: 0x0020008e (enabled) (II) intel(0): TV_CTL: 0x000c0c00 (II) intel(0): TV_DAC: 0x70000000 (II) intel(0): TV_CSC_Y: 0x0332012d (II) intel(0): TV_CSC_Y2: 0x07d30104 (II) intel(0): TV_CSC_U: 0x0733052d (II) intel(0): TV_CSC_U2: 0x05c70200 (II) intel(0): TV_CSC_V: 0x0340030c (II) intel(0): TV_CSC_V2: 0x06d00200 (II) intel(0): TV_CLR_KNOBS: 0x00606000 (II) intel(0): TV_CLR_LEVEL: 0x010b00e1 (II) intel(0): TV_H_CTL_1: 0x00400359 (II) intel(0): TV_H_CTL_2: 0x80480022 (II) intel(0): TV_H_CTL_3: 0x007c0344 (II) intel(0): TV_V_CTL_1: 0x00f01415 (II) intel(0): TV_V_CTL_2: 0x00060607 (II) intel(0): TV_V_CTL_3: 0x80120001 (II) intel(0): TV_V_CTL_4: 0x000900f0 (II) intel(0): TV_V_CTL_5: 0x000a00f0 (II) intel(0): TV_V_CTL_6: 0x000900f0 (II) intel(0): TV_V_CTL_7: 0x000a00f0 (II) intel(0): TV_SC_CTL_1: 0xc1710087 (II) intel(0): TV_SC_CTL_2: 0x6b405140 (II) intel(0): TV_SC_CTL_3: 0x00000000 (II) intel(0): TV_WIN_POS: 0x00360024 (II) intel(0): TV_WIN_SIZE: 0x02640198 (II) intel(0): TV_FILTER_CTL_1: 0x80000d63 (II) intel(0): TV_FILTER_CTL_2: 0x0001e1e2 (II) intel(0): TV_FILTER_CTL_3: 0x0000f0f1 (II) intel(0): TV_CC_CONTROL: 0x00000000 (II) intel(0): TV_CC_DATA: 0x00000000 (II) intel(0): TV_H_LUMA_0: 0xb1403000 (II) intel(0): TV_H_LUMA_59: 0x0000b060 (II) intel(0): TV_H_CHROMA_0: 0xb1403000 (II) intel(0): TV_H_CHROMA_59: 0x0000b060 (II) intel(0): FBC_CFB_BASE: 0x00000000 (II) intel(0): FBC_LL_BASE: 0x00000000 (II) intel(0): FBC_CONTROL: 0x00000000 (II) intel(0): FBC_COMMAND: 0x00000000 (II) intel(0): FBC_STATUS: 0x20000000 (II) intel(0): FBC_CONTROL2: 0x00000000 (II) intel(0): FBC_FENCE_OFF: 0x00000000 (II) intel(0): FBC_MOD_NUM: 0x00000000 (II) intel(0): MI_MODE: 0x00000200 (II) intel(0): MI_ARB_STATE: 0x00000040 (II) intel(0): MI_RDRET_STATE: 0x00000000 (II) intel(0): ECOSKPD: 0x00000307 (II) intel(0): DP_B: 0x00000000 (II) intel(0): DPB_AUX_CH_CTL: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPB_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_C: 0x00000000 (II) intel(0): DPC_AUX_CH_CTL: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPC_AUX_CH_DATA5: 0x00000000 (II) intel(0): DP_D: 0x00000000 (II) intel(0): DPD_AUX_CH_CTL: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA1: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA2: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA3: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA4: 0x00000000 (II) intel(0): DPD_AUX_CH_DATA5: 0x00000000 (II) intel(0): FENCE START 0: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 0: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 1: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 1: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 2: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 2: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 3: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 3: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 4: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 4: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 5: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 5: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 6: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 6: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 7: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 7: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 8: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 8: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 9: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 9: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 10: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 10: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 11: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 11: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 12: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 12: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 13: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 13: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 14: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 14: 0xffffffff ( 0xfffff000 end) (II) intel(0): FENCE START 15: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start) (II) intel(0): FENCE END 15: 0xffffffff ( 0xfffff000 end) (II) intel(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10 (II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10 (II) intel(0): DumpRegsEnd (II) intel(0): xf86UnbindGARTMemory: unbind key 0 (II) intel(0): xf86UnbindGARTMemory: unbind key 1