--- radeon_render.c.KEM	2005-01-25 23:03:13.000000000 -0500
+++ radeon_render.c	2005-04-04 10:56:16.000000000 -0400
@@ -219,15 +219,16 @@
     return tmp.l;
 }
 
-/* Compute log base 2 of val. */
+/* Compute ceil(log base 2 of val). */
 static __inline__ int
 ATILog2(int val)
 {
 	int bits;
 
-	for (bits = 0; val != 0; val >>= 1, ++bits)
+	for (bits = 0; val > 1<<bits; ++bits)
 		;
-	return bits - 1;
+
+	return bits;
 }
 
 static void RadeonInit3DEngine(ScrnInfoPtr pScrn)
@@ -444,14 +445,14 @@
     }
 #endif
 
-    dst_pitch = (width * tex_bytepp + 31) & ~31;
+    dst_pitch = ((1<<ATILog2(width)) * tex_bytepp + 31) & ~31;
     size = dst_pitch * height;
 
     /* Allocate off-screen space for texture pre-rendering as well */
     if (!AllocateLinear(pScrn, size + offscreensize))
 	return FALSE;
 
-    if (flags & XAA_RENDER_REPEAT) {
+    if (1 || flags & XAA_RENDER_REPEAT) {
 	txformat |= ATILog2(width) << RADEON_TXFORMAT_WIDTH_SHIFT;
 	txformat |= ATILog2(height) << RADEON_TXFORMAT_HEIGHT_SHIFT;
     } else {
@@ -617,6 +618,7 @@
 
     ACCEL_PREAMBLE();
 
+#if 0
     /* R100 chips seem to have cache problems and do not reload small textures
      * from memory for small render areas. Thus we have to render a
      * 'sufficiently large' portion of the texture (may contain uninitialized
@@ -705,6 +707,7 @@
 	FINISH_ACCEL();
 #endif
     }
+#endif
 
     /* Note: we can't simply set up the 3D surface at the same location as the
      * front buffer, because the 2048x2048 limit on coordinates may be smaller